1 | /* |
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2 | * $Id: test.cpp 138 2010-05-12 17:34:01Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | * Platforms : Morpheo + Environment |
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7 | */ |
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8 | |
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9 | #define CYCLE_MAX 0 |
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10 | |
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11 | #include "../include/test.h" |
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12 | |
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13 | #include "Environment.h" |
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14 | #include "Behavioural/include/Allocation.h" |
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15 | #include "Common/include/Time.h" |
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16 | #include "../../../IPs/systemC/shared/mapping_memory.h" |
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17 | #include "../../../IPs/systemC/processor/Morpheo/Common/include/Test.h" |
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18 | |
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19 | using namespace std; |
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20 | using namespace environment; |
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21 | using namespace morpheo; |
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22 | |
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23 | int test(string filename_simulator, |
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24 | string filename_generator, |
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25 | string filename_instance , |
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26 | string filename_software , |
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27 | uint32_t nb_cache_dedicated, |
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28 | uint32_t nb_cache_shared , |
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29 | uint32_t cache_size , |
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30 | uint32_t cache_ratio , |
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31 | morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void) |
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32 | ) |
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33 | { |
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34 | //============================================================================== |
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35 | //===== [ DECLARATION ]========================================================= |
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36 | //============================================================================== |
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37 | |
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38 | |
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39 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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40 | //~~~~~ [ Morpheo ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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41 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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42 | |
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43 | // 1) Translation |
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44 | if (setlocale (LC_ALL, "") == NULL) |
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45 | { |
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46 | msgError("Error setlocale.\n"); |
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47 | exit (EXIT_FAILURE); |
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48 | } |
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49 | |
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50 | // 2) Morpheo Construction |
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51 | Morpheo * morpheo; |
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52 | try |
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53 | { |
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54 | morpheo = new Morpheo |
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55 | ("morpheo", |
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56 | filename_simulator, |
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57 | filename_generator, |
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58 | filename_instance , |
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59 | get_custom_information |
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60 | ); |
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61 | } |
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62 | catch (morpheo::ErrorMorpheo & error) |
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63 | { |
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64 | std::cerr << error.what() << std::endl; |
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65 | |
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66 | msgError("%s\n",STR_KO); |
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67 | |
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68 | return EXIT_FAILURE; |
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69 | } |
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70 | |
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71 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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72 | //~~~~~ [ Environment ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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73 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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74 | |
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75 | uint32_t nb_thread = morpheo->_nb_thread; |
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76 | uint32_t nb_entity = 1; |
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77 | |
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78 | // Cache access |
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79 | uint32_t * iaccess_nb_context = new uint32_t [nb_entity]; |
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80 | uint32_t * iaccess_nb_instruction= new uint32_t [nb_entity]; |
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81 | uint32_t * iaccess_nb_packet = new uint32_t [nb_entity]; |
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82 | uint32_t * iaccess_size_address = new uint32_t [nb_entity]; |
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83 | uint32_t * iaccess_size_data = new uint32_t [nb_entity]; |
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84 | |
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85 | uint32_t * daccess_nb_context = new uint32_t [nb_entity]; |
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86 | uint32_t * daccess_nb_packet = new uint32_t [nb_entity]; |
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87 | uint32_t * daccess_size_address = new uint32_t [nb_entity]; |
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88 | uint32_t * daccess_size_data = new uint32_t [nb_entity]; |
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89 | |
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90 | uint32_t * buffer_irsp_size = new uint32_t [nb_entity]; |
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91 | uint32_t * buffer_drsp_size = new uint32_t [nb_entity]; |
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92 | |
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93 | for (uint32_t i=0; i<nb_entity; i++) |
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94 | { |
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95 | iaccess_nb_context [i] = morpheo->_nb_thread; |
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96 | iaccess_nb_instruction [i] = max<uint32_t>(morpheo->_icache_nb_instruction,morpheo->_nb_icache_port); |
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97 | iaccess_nb_packet [i] = 1<<morpheo->_size_icache_packet_id; |
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98 | iaccess_size_address [i] = morpheo->_size_icache_address; |
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99 | iaccess_size_data [i] = morpheo->_size_icache_instruction; |
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100 | |
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101 | daccess_nb_context [i] = morpheo->_nb_thread; |
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102 | daccess_nb_packet [i] = 1<<morpheo->_size_dcache_packet_id; |
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103 | daccess_size_address [i] = morpheo->_size_dcache_address; |
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104 | daccess_size_data [i] = morpheo->_size_dcache_data; |
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105 | |
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106 | buffer_irsp_size [i] = 8; |
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107 | buffer_drsp_size [i] = 8; |
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108 | } |
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109 | |
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110 | uint32_t cache_nb_line ; |
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111 | uint32_t cache_size_line ; |
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112 | uint32_t cache_size_word ; |
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113 | uint32_t cache_associativity ; |
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114 | uint32_t cache_hit_latence ; |
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115 | uint32_t cache_miss_penality ; |
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116 | |
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117 | // Instruction/Data cache |
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118 | uint32_t * icache_nb_level = new uint32_t [nb_entity]; |
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119 | uint32_t * icache_nb_port = new uint32_t [nb_entity]; |
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120 | uint32_t ** icache_nb_line = new uint32_t * [nb_entity]; |
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121 | uint32_t ** icache_size_line = new uint32_t * [nb_entity]; |
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122 | uint32_t ** icache_size_word = new uint32_t * [nb_entity]; |
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123 | uint32_t ** icache_associativity = new uint32_t * [nb_entity]; |
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124 | uint32_t ** icache_hit_latence = new uint32_t * [nb_entity]; |
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125 | uint32_t ** icache_miss_penality = new uint32_t * [nb_entity]; |
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126 | |
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127 | uint32_t * dcache_nb_level = new uint32_t [nb_entity]; |
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128 | uint32_t * dcache_nb_port = new uint32_t [nb_entity]; |
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129 | uint32_t ** dcache_nb_line = new uint32_t * [nb_entity]; |
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130 | uint32_t ** dcache_size_line = new uint32_t * [nb_entity]; |
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131 | uint32_t ** dcache_size_word = new uint32_t * [nb_entity]; |
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132 | uint32_t ** dcache_associativity = new uint32_t * [nb_entity]; |
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133 | uint32_t ** dcache_hit_latence = new uint32_t * [nb_entity]; |
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134 | uint32_t ** dcache_miss_penality = new uint32_t * [nb_entity]; |
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135 | |
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136 | for (uint32_t i=0; i<nb_entity; i++) |
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137 | { |
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138 | cache_size_word = max(max<uint32_t>(morpheo->_icache_nb_instruction,morpheo->_nb_icache_port)*morpheo->_size_icache_instruction,morpheo->_size_dcache_data)/8; |
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139 | cache_size_line = 8; |
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140 | |
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141 | if (cache_size<(cache_size_line*cache_size_word)) |
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142 | { |
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143 | msgError("cache is too small\n"); |
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144 | exit(EXIT_FAILURE); |
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145 | } |
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146 | |
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147 | cache_nb_line = cache_size/(cache_size_line*cache_size_word); |
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148 | cache_associativity = 1; |
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149 | cache_hit_latence = 1; |
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150 | cache_miss_penality = 5; |
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151 | |
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152 | icache_nb_level [i] = nb_cache_dedicated; |
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153 | icache_nb_port [i] = morpheo->_nb_icache_port; |
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154 | icache_nb_line [i] = new uint32_t [icache_nb_level[i]]; |
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155 | icache_size_line [i] = new uint32_t [icache_nb_level[i]]; |
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156 | icache_size_word [i] = new uint32_t [icache_nb_level[i]]; |
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157 | icache_associativity [i] = new uint32_t [icache_nb_level[i]]; |
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158 | icache_hit_latence [i] = new uint32_t [icache_nb_level[i]]; |
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159 | icache_miss_penality [i] = new uint32_t [icache_nb_level[i]]; |
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160 | |
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161 | dcache_nb_level [i] = icache_nb_level [i]; |
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162 | dcache_nb_port [i] = morpheo->_nb_dcache_port; |
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163 | dcache_nb_line [i] = new uint32_t [dcache_nb_level[i]]; |
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164 | dcache_size_line [i] = new uint32_t [dcache_nb_level[i]]; |
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165 | dcache_size_word [i] = new uint32_t [dcache_nb_level[i]]; |
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166 | dcache_associativity [i] = new uint32_t [dcache_nb_level[i]]; |
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167 | dcache_hit_latence [i] = new uint32_t [dcache_nb_level[i]]; |
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168 | dcache_miss_penality [i] = new uint32_t [dcache_nb_level[i]]; |
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169 | |
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170 | for (uint32_t j=0; j<icache_nb_level[i]; ++j) |
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171 | { |
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172 | icache_nb_line [i][j] = cache_nb_line ; |
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173 | icache_size_line [i][j] = cache_size_line ; |
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174 | icache_size_word [i][j] = cache_size_word ; |
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175 | icache_associativity [i][j] = cache_associativity; |
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176 | icache_hit_latence [i][j] = cache_hit_latence ; |
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177 | icache_miss_penality [i][j] = cache_miss_penality; |
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178 | |
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179 | dcache_nb_line [i][j] = cache_nb_line ; |
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180 | dcache_size_line [i][j] = cache_size_line ; |
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181 | dcache_size_word [i][j] = cache_size_word ; |
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182 | dcache_associativity [i][j] = cache_associativity; |
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183 | dcache_hit_latence [i][j] = cache_hit_latence ; |
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184 | dcache_miss_penality [i][j] = cache_miss_penality; |
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185 | |
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186 | cache_nb_line *= cache_ratio; |
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187 | cache_size_line *= cache_ratio; |
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188 | // cache_size_word *= cache_ratio; |
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189 | cache_associativity *= cache_ratio; |
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190 | cache_hit_latence *= cache_ratio; |
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191 | cache_miss_penality *= cache_ratio; |
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192 | } |
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193 | } |
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194 | |
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195 | // Cache shared |
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196 | uint32_t * cache_shared_nb_line = new uint32_t [nb_cache_shared]; |
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197 | uint32_t * cache_shared_size_line = new uint32_t [nb_cache_shared]; |
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198 | uint32_t * cache_shared_size_word = new uint32_t [nb_cache_shared]; |
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199 | uint32_t * cache_shared_associativity = new uint32_t [nb_cache_shared]; |
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200 | uint32_t * cache_shared_hit_latence = new uint32_t [nb_cache_shared]; |
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201 | uint32_t * cache_shared_miss_penality = new uint32_t [nb_cache_shared]; |
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202 | |
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203 | for (uint32_t i=0; i<nb_cache_shared; ++i) |
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204 | { |
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205 | cache_shared_nb_line [i] = cache_nb_line ; |
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206 | cache_shared_size_line [i] = cache_size_line ; |
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207 | cache_shared_size_word [i] = cache_size_word ; |
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208 | cache_shared_associativity [i] = cache_associativity; |
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209 | cache_shared_hit_latence [i] = cache_hit_latence ; |
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210 | cache_shared_miss_penality [i] = cache_miss_penality; |
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211 | |
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212 | cache_nb_line *= cache_ratio; |
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213 | cache_size_line *= cache_ratio; |
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214 | // cache_size_word *= cache_ratio; |
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215 | cache_associativity *= cache_ratio; |
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216 | cache_hit_latence *= cache_ratio; |
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217 | cache_miss_penality *= cache_ratio; |
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218 | } |
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219 | |
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220 | // TTY |
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221 | uint32_t nb_component_tty = 1; |
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222 | uint32_t * tty_address = new uint32_t [nb_component_tty]; |
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223 | uint32_t * nb_tty = new uint32_t [nb_component_tty]; |
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224 | for (uint32_t i=0; i<nb_component_tty; ++i) |
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225 | { |
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226 | tty_address [i] = TTY_BASE; |
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227 | nb_tty [i] = nb_thread; |
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228 | } |
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229 | string ** name_tty = new string * [nb_component_tty]; |
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230 | for (uint32_t i=0; i<nb_component_tty; ++i) |
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231 | { |
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232 | name_tty [i] = new string [nb_tty[i]]; |
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233 | for (uint32_t j=0; j<nb_tty[i]; ++j) |
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234 | name_tty [i][j] = "tty_"+toString(i)+"_"+toString(j); |
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235 | } |
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236 | |
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237 | // Ramlock |
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238 | uint32_t nb_component_ramlock = 1; |
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239 | uint32_t * ramlock_address = new uint32_t [nb_component_ramlock]; |
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240 | uint32_t * nb_lock = new uint32_t [nb_component_ramlock]; |
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241 | for (uint32_t i=0; i<nb_component_ramlock; ++i) |
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242 | { |
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243 | ramlock_address [i] = RAMLOCK_BASE; |
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244 | nb_lock [i] = 100*nb_thread; |
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245 | } |
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246 | |
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247 | // Sim2OS |
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248 | uint32_t sim2os_address = SIM2OS_BASE; |
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249 | uint32_t sim2os_size = SIM2OS_SIZE; |
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250 | |
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251 | SOCLIB_SEGMENT_TABLE * segtable = new SOCLIB_SEGMENT_TABLE; |
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252 | segtable->setMSBNumber (8); |
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253 | segtable->setDefaultTarget(0,0); |
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254 | |
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255 | // Add a segment ,name ,address of base ,size ,global index,local index,uncache |
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256 | segtable->addSegment("text" ,TEXT_BASE ,TEXT_SIZE ,0 ,0 ,false); |
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257 | segtable->addSegment("data" ,DATA_CACHED_BASE ,DATA_CACHED_SIZE ,0 ,0 ,false); |
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258 | segtable->addSegment("data_stack" ,DATA_STACK_BASE ,DATA_STACK_SIZE ,0 ,0 ,false); |
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259 | segtable->addSegment("data_unc" ,DATA_UNCACHED_BASE,DATA_UNCACHED_SIZE,0 ,0 ,true ); |
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260 | |
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261 | Parameters * param_environment = new Parameters |
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262 | (nb_thread, |
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263 | nb_entity, |
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264 | |
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265 | iaccess_nb_context, |
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266 | iaccess_nb_instruction, |
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267 | iaccess_nb_packet, |
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268 | iaccess_size_address, |
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269 | iaccess_size_data, |
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270 | |
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271 | daccess_nb_context, |
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272 | daccess_nb_packet, |
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273 | daccess_size_address, |
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274 | daccess_size_data, |
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275 | |
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276 | buffer_irsp_size, |
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277 | buffer_drsp_size, |
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278 | |
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279 | icache_nb_level , |
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280 | icache_nb_port , |
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281 | icache_nb_line , |
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282 | icache_size_line , |
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283 | icache_size_word , |
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284 | icache_associativity, |
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285 | icache_hit_latence , |
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286 | icache_miss_penality, |
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287 | dcache_nb_level , |
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288 | dcache_nb_port , |
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289 | dcache_nb_line , |
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290 | dcache_size_line , |
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291 | dcache_size_word , |
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292 | dcache_associativity, |
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293 | dcache_hit_latence , |
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294 | dcache_miss_penality, |
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295 | |
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296 | nb_cache_shared , |
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297 | // cache_shared_nb_port , |
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298 | cache_shared_nb_line , |
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299 | cache_shared_size_line , |
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300 | cache_shared_size_word , |
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301 | cache_shared_associativity , |
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302 | cache_shared_hit_latence , |
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303 | cache_shared_miss_penality , |
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304 | |
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305 | nb_component_tty, |
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306 | tty_address, |
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307 | nb_tty, |
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308 | name_tty, |
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309 | false, |
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310 | |
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311 | nb_component_ramlock, |
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312 | ramlock_address, |
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313 | nb_lock, |
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314 | |
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315 | sim2os_address, |
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316 | sim2os_size, |
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317 | segtable |
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318 | ); |
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319 | |
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320 | // cout << param_environment->print(0) << endl; |
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321 | |
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322 | Environment * environment = new Environment ("environment",param_environment); |
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323 | |
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324 | const char * sections_text [] = {".text",NULL}; |
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325 | const char * sections_data [] = {".data",".rodata",".bss",".sdata",".sbss", NULL}; |
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326 | |
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327 | if (environment->init("text", filename_software.c_str(), sections_text) == false) exit (EXIT_FAILURE); |
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328 | if (environment->init("data", filename_software.c_str(), sections_data) == false) exit (EXIT_FAILURE); |
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329 | |
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330 | // segtable->print(); |
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331 | |
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332 | //============================================================================== |
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333 | //===== [ SIGNAL ]============================================================== |
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334 | //============================================================================== |
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335 | #ifdef SYSTEMCASS_SPECIFIC |
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336 | sc_clock * CLOCK = new sc_clock ("CLOCK__________________", 1.0, 0.5); |
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337 | #else |
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338 | sc_time period (TIME_PERIOD, TIME_UNIT); |
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339 | sc_clock * CLOCK = new sc_clock ("CLOCK__________________", period); |
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340 | #endif |
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341 | sc_signal<Tcontrol_t> * NRESET = new sc_signal<Tcontrol_t> ("NRESET_________________"); |
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342 | |
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343 | sc_signal<Tcontrol_t > ** ICACHE_REQ_VAL ; |
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344 | sc_signal<Tcontrol_t > ** ICACHE_REQ_ACK ; |
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345 | sc_signal<Ticache_context_t > ** ICACHE_REQ_THREAD_ID ; |
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346 | sc_signal<Ticache_packet_t > ** ICACHE_REQ_PACKET_ID ; |
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347 | sc_signal<Ticache_address_t > ** ICACHE_REQ_ADDRESS ; |
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348 | sc_signal<Ticache_type_t > ** ICACHE_REQ_TYPE ; |
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349 | |
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350 | sc_signal<Tcontrol_t > ** ICACHE_RSP_VAL ; |
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351 | sc_signal<Tcontrol_t > ** ICACHE_RSP_ACK ; |
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352 | sc_signal<Ticache_context_t > ** ICACHE_RSP_THREAD_ID ; |
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353 | sc_signal<Ticache_packet_t > ** ICACHE_RSP_PACKET_ID ; |
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354 | sc_signal<Ticache_instruction_t> *** ICACHE_RSP_INSTRUCTION; |
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355 | sc_signal<Ticache_error_t > ** ICACHE_RSP_ERROR ; |
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356 | |
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357 | sc_signal<Tcontrol_t > ** DCACHE_REQ_VAL ; |
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358 | sc_signal<Tcontrol_t > ** DCACHE_REQ_ACK ; |
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359 | sc_signal<Tdcache_context_t > ** DCACHE_REQ_THREAD_ID ; |
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360 | sc_signal<Tdcache_packet_t > ** DCACHE_REQ_PACKET_ID ; |
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361 | sc_signal<Tdcache_address_t > ** DCACHE_REQ_ADDRESS ; |
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362 | sc_signal<Tdcache_data_t > ** DCACHE_REQ_WDATA ; |
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363 | sc_signal<Tdcache_type_t > ** DCACHE_REQ_TYPE ; |
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364 | |
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365 | sc_signal<Tcontrol_t > ** DCACHE_RSP_VAL ; |
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366 | sc_signal<Tcontrol_t > ** DCACHE_RSP_ACK ; |
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367 | sc_signal<Tdcache_context_t > ** DCACHE_RSP_THREAD_ID ; |
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368 | sc_signal<Tdcache_packet_t > ** DCACHE_RSP_PACKET_ID ; |
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369 | sc_signal<Tdcache_data_t > ** DCACHE_RSP_RDATA ; |
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370 | sc_signal<Tdcache_error_t > ** DCACHE_RSP_ERROR ; |
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371 | |
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372 | sc_signal<Tcontrol_t > ** INTERRUPT_ENABLE ; |
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373 | |
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374 | ALLOC1_SC_SIGNAL(ICACHE_REQ_VAL ,"ICACHE_REQ_VAL_________",Tcontrol_t ,morpheo->_nb_icache_port); |
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375 | ALLOC1_SC_SIGNAL(ICACHE_REQ_ACK ,"ICACHE_REQ_ACK_________",Tcontrol_t ,morpheo->_nb_icache_port); |
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376 | ALLOC1_SC_SIGNAL(ICACHE_REQ_THREAD_ID ,"ICACHE_REQ_THREAD_ID___",Ticache_context_t ,morpheo->_nb_icache_port); |
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377 | ALLOC1_SC_SIGNAL(ICACHE_REQ_PACKET_ID ,"ICACHE_REQ_PACKET_ID___",Ticache_packet_t ,morpheo->_nb_icache_port); |
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378 | ALLOC1_SC_SIGNAL(ICACHE_REQ_ADDRESS ,"ICACHE_REQ_ADDRESS_____",Ticache_address_t ,morpheo->_nb_icache_port); |
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379 | ALLOC1_SC_SIGNAL(ICACHE_REQ_TYPE ,"ICACHE_REQ_TYPE________",Ticache_type_t ,morpheo->_nb_icache_port); |
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380 | |
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381 | ALLOC1_SC_SIGNAL(ICACHE_RSP_VAL ,"ICACHE_RSP_VAL_________",Tcontrol_t ,morpheo->_nb_icache_port); |
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382 | ALLOC1_SC_SIGNAL(ICACHE_RSP_ACK ,"ICACHE_RSP_ACK_________",Tcontrol_t ,morpheo->_nb_icache_port); |
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383 | ALLOC1_SC_SIGNAL(ICACHE_RSP_THREAD_ID ,"ICACHE_RSP_THREAD_ID___",Ticache_context_t ,morpheo->_nb_icache_port); |
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384 | ALLOC1_SC_SIGNAL(ICACHE_RSP_PACKET_ID ,"ICACHE_RSP_PACKET_ID___",Ticache_packet_t ,morpheo->_nb_icache_port); |
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385 | ALLOC2_SC_SIGNAL(ICACHE_RSP_INSTRUCTION ,"ICACHE_RSP_INSTRUCTION_",Ticache_instruction_t,morpheo->_nb_icache_port,morpheo->_icache_nb_instruction[it1]); |
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386 | ALLOC1_SC_SIGNAL(ICACHE_RSP_ERROR ,"ICACHE_RSP_ERROR_______",Ticache_error_t ,morpheo->_nb_icache_port); |
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387 | |
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388 | ALLOC1_SC_SIGNAL(DCACHE_REQ_VAL ,"DCACHE_REQ_VAL_________",Tcontrol_t ,morpheo->_nb_dcache_port); |
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389 | ALLOC1_SC_SIGNAL(DCACHE_REQ_ACK ,"DCACHE_REQ_ACK_________",Tcontrol_t ,morpheo->_nb_dcache_port); |
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390 | ALLOC1_SC_SIGNAL(DCACHE_REQ_THREAD_ID ,"DCACHE_REQ_THREAD_ID___",Tdcache_context_t ,morpheo->_nb_dcache_port); |
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391 | ALLOC1_SC_SIGNAL(DCACHE_REQ_PACKET_ID ,"DCACHE_REQ_PACKET_ID___",Tdcache_packet_t ,morpheo->_nb_dcache_port); |
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392 | ALLOC1_SC_SIGNAL(DCACHE_REQ_ADDRESS ,"DCACHE_REQ_ADDRESS_____",Tdcache_address_t ,morpheo->_nb_dcache_port); |
---|
393 | ALLOC1_SC_SIGNAL(DCACHE_REQ_WDATA ,"DCACHE_REQ_WDATA_______",Tdcache_data_t ,morpheo->_nb_dcache_port); |
---|
394 | ALLOC1_SC_SIGNAL(DCACHE_REQ_TYPE ,"DCACHE_REQ_TYPE________",Tdcache_type_t ,morpheo->_nb_dcache_port); |
---|
395 | |
---|
396 | ALLOC1_SC_SIGNAL(DCACHE_RSP_VAL ,"DCACHE_RSP_VAL_________",Tcontrol_t ,morpheo->_nb_dcache_port); |
---|
397 | ALLOC1_SC_SIGNAL(DCACHE_RSP_ACK ,"DCACHE_RSP_ACK_________",Tcontrol_t ,morpheo->_nb_dcache_port); |
---|
398 | ALLOC1_SC_SIGNAL(DCACHE_RSP_THREAD_ID ,"DCACHE_RSP_THREAD_ID___",Tdcache_context_t ,morpheo->_nb_dcache_port); |
---|
399 | ALLOC1_SC_SIGNAL(DCACHE_RSP_PACKET_ID ,"DCACHE_RSP_PACKET_ID___",Tdcache_packet_t ,morpheo->_nb_dcache_port); |
---|
400 | ALLOC1_SC_SIGNAL(DCACHE_RSP_RDATA ,"DCACHE_RSP_RDATA_______",Tdcache_data_t ,morpheo->_nb_dcache_port); |
---|
401 | ALLOC1_SC_SIGNAL(DCACHE_RSP_ERROR ,"DCACHE_RSP_ERROR_______",Tdcache_error_t ,morpheo->_nb_dcache_port); |
---|
402 | |
---|
403 | ALLOC1_SC_SIGNAL(INTERRUPT_ENABLE ,"INTERRUPT_ENABLE_______",Tcontrol_t ,morpheo->_nb_thread); |
---|
404 | |
---|
405 | //============================================================================== |
---|
406 | //===== [ INSTANCE ]============================================================ |
---|
407 | //============================================================================== |
---|
408 | |
---|
409 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
410 | //~~~~~ [ Morpheo ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
411 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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412 | |
---|
413 | (*(morpheo->in_CLOCK)) (*(CLOCK)); |
---|
414 | (*(morpheo->in_NRESET)) (*(NRESET)); |
---|
415 | |
---|
416 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_REQ_VAL ,ICACHE_REQ_VAL ,morpheo->_nb_icache_port); |
---|
417 | _INSTANCE1_SC_SIGNAL(morpheo, in_ICACHE_REQ_ACK ,ICACHE_REQ_ACK ,morpheo->_nb_icache_port); |
---|
418 | if (morpheo->_have_port_icache_thread_id) |
---|
419 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_REQ_THREAD_ID ,ICACHE_REQ_THREAD_ID ,morpheo->_nb_icache_port); |
---|
420 | if (morpheo->_have_port_icache_packet_id) |
---|
421 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_REQ_PACKET_ID ,ICACHE_REQ_PACKET_ID ,morpheo->_nb_icache_port); |
---|
422 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_REQ_ADDRESS ,ICACHE_REQ_ADDRESS ,morpheo->_nb_icache_port); |
---|
423 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_REQ_TYPE ,ICACHE_REQ_TYPE ,morpheo->_nb_icache_port); |
---|
424 | |
---|
425 | _INSTANCE1_SC_SIGNAL(morpheo, in_ICACHE_RSP_VAL ,ICACHE_RSP_VAL ,morpheo->_nb_icache_port); |
---|
426 | _INSTANCE1_SC_SIGNAL(morpheo,out_ICACHE_RSP_ACK ,ICACHE_RSP_ACK ,morpheo->_nb_icache_port); |
---|
427 | if (morpheo->_have_port_icache_thread_id) |
---|
428 | _INSTANCE1_SC_SIGNAL(morpheo, in_ICACHE_RSP_THREAD_ID ,ICACHE_RSP_THREAD_ID ,morpheo->_nb_icache_port); |
---|
429 | if (morpheo->_have_port_icache_packet_id) |
---|
430 | _INSTANCE1_SC_SIGNAL(morpheo, in_ICACHE_RSP_PACKET_ID ,ICACHE_RSP_PACKET_ID ,morpheo->_nb_icache_port); |
---|
431 | _INSTANCE2_SC_SIGNAL(morpheo, in_ICACHE_RSP_INSTRUCTION ,ICACHE_RSP_INSTRUCTION ,morpheo->_nb_icache_port,morpheo->_icache_nb_instruction[it1]); |
---|
432 | _INSTANCE1_SC_SIGNAL(morpheo, in_ICACHE_RSP_ERROR ,ICACHE_RSP_ERROR ,morpheo->_nb_icache_port); |
---|
433 | |
---|
434 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_VAL ,DCACHE_REQ_VAL ,morpheo->_nb_dcache_port); |
---|
435 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_REQ_ACK ,DCACHE_REQ_ACK ,morpheo->_nb_dcache_port); |
---|
436 | if (morpheo->_have_port_dcache_thread_id) |
---|
437 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_THREAD_ID ,DCACHE_REQ_THREAD_ID ,morpheo->_nb_dcache_port); |
---|
438 | if (morpheo->_have_port_dcache_packet_id) |
---|
439 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_PACKET_ID ,DCACHE_REQ_PACKET_ID ,morpheo->_nb_dcache_port); |
---|
440 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_ADDRESS ,DCACHE_REQ_ADDRESS ,morpheo->_nb_dcache_port); |
---|
441 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_WDATA ,DCACHE_REQ_WDATA ,morpheo->_nb_dcache_port); |
---|
442 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_REQ_TYPE ,DCACHE_REQ_TYPE ,morpheo->_nb_dcache_port); |
---|
443 | |
---|
444 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_RSP_VAL ,DCACHE_RSP_VAL ,morpheo->_nb_dcache_port); |
---|
445 | _INSTANCE1_SC_SIGNAL(morpheo,out_DCACHE_RSP_ACK ,DCACHE_RSP_ACK ,morpheo->_nb_dcache_port); |
---|
446 | if (morpheo->_have_port_dcache_thread_id) |
---|
447 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_RSP_THREAD_ID ,DCACHE_RSP_THREAD_ID ,morpheo->_nb_dcache_port); |
---|
448 | if (morpheo->_have_port_dcache_packet_id) |
---|
449 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_RSP_PACKET_ID ,DCACHE_RSP_PACKET_ID ,morpheo->_nb_dcache_port); |
---|
450 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_RSP_RDATA ,DCACHE_RSP_RDATA ,morpheo->_nb_dcache_port); |
---|
451 | _INSTANCE1_SC_SIGNAL(morpheo, in_DCACHE_RSP_ERROR ,DCACHE_RSP_ERROR ,morpheo->_nb_dcache_port); |
---|
452 | |
---|
453 | _INSTANCE1_SC_SIGNAL(morpheo, in_INTERRUPT_ENABLE ,INTERRUPT_ENABLE ,morpheo->_nb_thread); |
---|
454 | |
---|
455 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
456 | //~~~~~ [ Environment ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
457 | //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
458 | |
---|
459 | (*(environment->CLOCK)) (*(CLOCK)); |
---|
460 | (*(environment->NRESET)) (*(NRESET)); |
---|
461 | |
---|
462 | for (uint32_t i=0; i<morpheo->_nb_icache_port; ++i) |
---|
463 | { |
---|
464 | (*(environment->ICACHE_REQ_VAL [0][i] )) (*(ICACHE_REQ_VAL [i] )); |
---|
465 | (*(environment->ICACHE_REQ_ACK [0][i] )) (*(ICACHE_REQ_ACK [i] )); |
---|
466 | (*(environment->ICACHE_REQ_CONTEXT_ID [0][i] )) (*(ICACHE_REQ_THREAD_ID [i] )); |
---|
467 | (*(environment->ICACHE_REQ_PACKET_ID [0][i] )) (*(ICACHE_REQ_PACKET_ID [i] )); |
---|
468 | (*(environment->ICACHE_REQ_ADDRESS [0][i] )) (*(ICACHE_REQ_ADDRESS [i] )); |
---|
469 | (*(environment->ICACHE_REQ_TYPE [0][i] )) (*(ICACHE_REQ_TYPE [i] )); |
---|
470 | |
---|
471 | (*(environment->ICACHE_RSP_VAL [0][i] )) (*(ICACHE_RSP_VAL [i] )); |
---|
472 | (*(environment->ICACHE_RSP_ACK [0][i] )) (*(ICACHE_RSP_ACK [i] )); |
---|
473 | (*(environment->ICACHE_RSP_CONTEXT_ID [0][i] )) (*(ICACHE_RSP_THREAD_ID [i] )); |
---|
474 | (*(environment->ICACHE_RSP_PACKET_ID [0][i] )) (*(ICACHE_RSP_PACKET_ID [i] )); |
---|
475 | (*(environment->ICACHE_RSP_ERROR [0][i] )) (*(ICACHE_RSP_ERROR [i] )); |
---|
476 | |
---|
477 | for (uint32_t j=0; j<morpheo->_icache_nb_instruction[i]; ++j) |
---|
478 | (*(environment->ICACHE_RSP_INSTRUCTION [0][i][j])) (*(ICACHE_RSP_INSTRUCTION [i][j])); |
---|
479 | } |
---|
480 | for (uint32_t i=0; i<morpheo->_nb_dcache_port; ++i) |
---|
481 | { |
---|
482 | (*(environment->DCACHE_REQ_VAL [0][i] )) (*(DCACHE_REQ_VAL [i] )); |
---|
483 | (*(environment->DCACHE_REQ_ACK [0][i] )) (*(DCACHE_REQ_ACK [i] )); |
---|
484 | (*(environment->DCACHE_REQ_CONTEXT_ID [0][i] )) (*(DCACHE_REQ_THREAD_ID [i] )); |
---|
485 | (*(environment->DCACHE_REQ_PACKET_ID [0][i] )) (*(DCACHE_REQ_PACKET_ID [i] )); |
---|
486 | (*(environment->DCACHE_REQ_ADDRESS [0][i] )) (*(DCACHE_REQ_ADDRESS [i] )); |
---|
487 | (*(environment->DCACHE_REQ_WDATA [0][i] )) (*(DCACHE_REQ_WDATA [i] )); |
---|
488 | (*(environment->DCACHE_REQ_TYPE [0][i] )) (*(DCACHE_REQ_TYPE [i] )); |
---|
489 | |
---|
490 | (*(environment->DCACHE_RSP_VAL [0][i] )) (*(DCACHE_RSP_VAL [i] )); |
---|
491 | (*(environment->DCACHE_RSP_ACK [0][i] )) (*(DCACHE_RSP_ACK [i] )); |
---|
492 | (*(environment->DCACHE_RSP_CONTEXT_ID [0][i] )) (*(DCACHE_RSP_THREAD_ID [i] )); |
---|
493 | (*(environment->DCACHE_RSP_PACKET_ID [0][i] )) (*(DCACHE_RSP_PACKET_ID [i] )); |
---|
494 | (*(environment->DCACHE_RSP_RDATA [0][i] )) (*(DCACHE_RSP_RDATA [i] )); |
---|
495 | (*(environment->DCACHE_RSP_ERROR [0][i] )) (*(DCACHE_RSP_ERROR [i] )); |
---|
496 | } |
---|
497 | |
---|
498 | //_INSTANCE2_SC_SIGNAL(environment,INTERRUPT_ENABLE ,1,morpheo->_nb_thread); |
---|
499 | |
---|
500 | //============================================================================== |
---|
501 | //===== [ SIMULATION ]========================================================== |
---|
502 | //============================================================================== |
---|
503 | |
---|
504 | // initialisation |
---|
505 | |
---|
506 | msgInformation("<test> Simulation Init\n"); |
---|
507 | |
---|
508 | sc_time t (0, TIME_UNIT); |
---|
509 | sc_start(t); |
---|
510 | |
---|
511 | msgInformation("<test> Simulation Start\n"); |
---|
512 | |
---|
513 | bool morpheo_error = false; |
---|
514 | try |
---|
515 | { |
---|
516 | Time * _time_global = new Time(); |
---|
517 | |
---|
518 | for (uint32_t i=0; i<morpheo->_nb_thread; ++i) |
---|
519 | INTERRUPT_ENABLE[i]->write(0); |
---|
520 | |
---|
521 | NRESET->write(0); |
---|
522 | SC_START(5); |
---|
523 | NRESET->write(1); |
---|
524 | |
---|
525 | // Infinite loop |
---|
526 | do |
---|
527 | { |
---|
528 | // Time * _time_local = new Time(); |
---|
529 | SC_START(100000); |
---|
530 | // delete _time_local; |
---|
531 | } while (not morpheo ->simulation_end() and // morpheo condition stop |
---|
532 | not environment->simulation_end()); // test ok |
---|
533 | delete _time_global; |
---|
534 | } |
---|
535 | catch (morpheo::ErrorMorpheo & error) |
---|
536 | { |
---|
537 | std::cerr << error.what() << std::endl; |
---|
538 | |
---|
539 | msgError("%s\n",STR_KO); |
---|
540 | |
---|
541 | morpheo_error = true; |
---|
542 | } |
---|
543 | |
---|
544 | bool morpheo_end = morpheo->simulation_end(); |
---|
545 | bool environment_end = environment->simulation_end(); |
---|
546 | |
---|
547 | |
---|
548 | //============================================================================== |
---|
549 | //===== [ DESTRUCTION ]========================================================= |
---|
550 | //============================================================================== |
---|
551 | |
---|
552 | delete CLOCK; |
---|
553 | delete NRESET; |
---|
554 | |
---|
555 | DELETE1_SC_SIGNAL(ICACHE_REQ_VAL ,morpheo->_nb_icache_port); |
---|
556 | DELETE1_SC_SIGNAL(ICACHE_REQ_ACK ,morpheo->_nb_icache_port); |
---|
557 | DELETE1_SC_SIGNAL(ICACHE_REQ_THREAD_ID ,morpheo->_nb_icache_port); |
---|
558 | DELETE1_SC_SIGNAL(ICACHE_REQ_PACKET_ID ,morpheo->_nb_icache_port); |
---|
559 | DELETE1_SC_SIGNAL(ICACHE_REQ_ADDRESS ,morpheo->_nb_icache_port); |
---|
560 | DELETE1_SC_SIGNAL(ICACHE_REQ_TYPE ,morpheo->_nb_icache_port); |
---|
561 | |
---|
562 | DELETE1_SC_SIGNAL(ICACHE_RSP_VAL ,morpheo->_nb_icache_port); |
---|
563 | DELETE1_SC_SIGNAL(ICACHE_RSP_ACK ,morpheo->_nb_icache_port); |
---|
564 | DELETE1_SC_SIGNAL(ICACHE_RSP_THREAD_ID ,morpheo->_nb_icache_port); |
---|
565 | DELETE1_SC_SIGNAL(ICACHE_RSP_PACKET_ID ,morpheo->_nb_icache_port); |
---|
566 | DELETE1_SC_SIGNAL(ICACHE_RSP_ERROR ,morpheo->_nb_icache_port); |
---|
567 | DELETE2_SC_SIGNAL(ICACHE_RSP_INSTRUCTION ,morpheo->_nb_icache_port,morpheo->_icache_nb_instruction[it1]); |
---|
568 | |
---|
569 | DELETE1_SC_SIGNAL(DCACHE_REQ_VAL ,morpheo->_nb_dcache_port); |
---|
570 | DELETE1_SC_SIGNAL(DCACHE_REQ_ACK ,morpheo->_nb_dcache_port); |
---|
571 | DELETE1_SC_SIGNAL(DCACHE_REQ_THREAD_ID ,morpheo->_nb_dcache_port); |
---|
572 | DELETE1_SC_SIGNAL(DCACHE_REQ_PACKET_ID ,morpheo->_nb_dcache_port); |
---|
573 | DELETE1_SC_SIGNAL(DCACHE_REQ_ADDRESS ,morpheo->_nb_dcache_port); |
---|
574 | DELETE1_SC_SIGNAL(DCACHE_REQ_WDATA ,morpheo->_nb_dcache_port); |
---|
575 | DELETE1_SC_SIGNAL(DCACHE_REQ_TYPE ,morpheo->_nb_dcache_port); |
---|
576 | |
---|
577 | DELETE1_SC_SIGNAL(DCACHE_RSP_VAL ,morpheo->_nb_dcache_port); |
---|
578 | DELETE1_SC_SIGNAL(DCACHE_RSP_ACK ,morpheo->_nb_dcache_port); |
---|
579 | DELETE1_SC_SIGNAL(DCACHE_RSP_THREAD_ID ,morpheo->_nb_dcache_port); |
---|
580 | DELETE1_SC_SIGNAL(DCACHE_RSP_PACKET_ID ,morpheo->_nb_dcache_port); |
---|
581 | DELETE1_SC_SIGNAL(DCACHE_RSP_RDATA ,morpheo->_nb_dcache_port); |
---|
582 | DELETE1_SC_SIGNAL(DCACHE_RSP_ERROR ,morpheo->_nb_dcache_port); |
---|
583 | |
---|
584 | DELETE1_SC_SIGNAL(INTERRUPT_ENABLE ,morpheo->_nb_thread); |
---|
585 | |
---|
586 | delete environment; |
---|
587 | |
---|
588 | delete param_environment; |
---|
589 | delete segtable; |
---|
590 | |
---|
591 | delete [] nb_lock ; |
---|
592 | delete [] ramlock_address; |
---|
593 | |
---|
594 | for (uint32_t i=0;i<nb_component_tty;++i) |
---|
595 | delete [] name_tty [i]; |
---|
596 | delete [] name_tty; |
---|
597 | delete [] nb_tty; |
---|
598 | delete [] tty_address; |
---|
599 | |
---|
600 | delete [] cache_shared_miss_penality; |
---|
601 | delete [] cache_shared_hit_latence ; |
---|
602 | delete [] cache_shared_associativity; |
---|
603 | delete [] cache_shared_size_word ; |
---|
604 | delete [] cache_shared_size_line ; |
---|
605 | delete [] cache_shared_nb_line ; |
---|
606 | |
---|
607 | for (uint32_t i=0; i<nb_entity; i++) |
---|
608 | { |
---|
609 | delete [] dcache_miss_penality [i]; |
---|
610 | delete [] dcache_hit_latence [i]; |
---|
611 | delete [] dcache_associativity [i]; |
---|
612 | delete [] dcache_size_word [i]; |
---|
613 | delete [] dcache_size_line [i]; |
---|
614 | delete [] dcache_nb_line [i]; |
---|
615 | } |
---|
616 | delete [] dcache_miss_penality ; |
---|
617 | delete [] dcache_hit_latence ; |
---|
618 | delete [] dcache_associativity ; |
---|
619 | delete [] dcache_size_word ; |
---|
620 | delete [] dcache_size_line ; |
---|
621 | delete [] dcache_nb_line ; |
---|
622 | delete [] dcache_nb_level ; |
---|
623 | delete [] dcache_nb_port ; |
---|
624 | |
---|
625 | for (uint32_t i=0; i<nb_entity; i++) |
---|
626 | { |
---|
627 | delete [] icache_miss_penality [i]; |
---|
628 | delete [] icache_hit_latence [i]; |
---|
629 | delete [] icache_associativity [i]; |
---|
630 | delete [] icache_size_word [i]; |
---|
631 | delete [] icache_size_line [i]; |
---|
632 | delete [] icache_nb_line [i]; |
---|
633 | } |
---|
634 | delete [] icache_miss_penality; |
---|
635 | delete [] icache_hit_latence ; |
---|
636 | delete [] icache_associativity; |
---|
637 | delete [] icache_size_word ; |
---|
638 | delete [] icache_size_line ; |
---|
639 | delete [] icache_nb_line ; |
---|
640 | delete [] icache_nb_level ; |
---|
641 | delete [] icache_nb_port ; |
---|
642 | |
---|
643 | delete [] buffer_drsp_size ; |
---|
644 | delete [] buffer_irsp_size ; |
---|
645 | delete [] daccess_size_data ; |
---|
646 | delete [] daccess_size_address ; |
---|
647 | delete [] daccess_nb_packet ; |
---|
648 | delete [] daccess_nb_context ; |
---|
649 | delete [] iaccess_size_data ; |
---|
650 | delete [] iaccess_size_address ; |
---|
651 | delete [] iaccess_nb_packet ; |
---|
652 | delete [] iaccess_nb_instruction; |
---|
653 | delete [] iaccess_nb_context ; |
---|
654 | |
---|
655 | delete morpheo; |
---|
656 | |
---|
657 | bool test_ok = false; |
---|
658 | if (not morpheo_error) |
---|
659 | { |
---|
660 | if (not morpheo_end and not environment_end) |
---|
661 | { |
---|
662 | msgError("<test> Simulation End : Unknow\n"); |
---|
663 | } |
---|
664 | else |
---|
665 | { |
---|
666 | if (morpheo_end) |
---|
667 | { |
---|
668 | msgInformation("<test> Simulation End : MORPHEO\n"); |
---|
669 | test_ok = true; |
---|
670 | } |
---|
671 | if (environment_end) |
---|
672 | { |
---|
673 | msgInformation("<test> Simulation End : ENVIRONMENT\n"); |
---|
674 | test_ok = true; |
---|
675 | } |
---|
676 | } |
---|
677 | } |
---|
678 | |
---|
679 | if (test_ok) |
---|
680 | { |
---|
681 | msgInformation("%s\n",STR_OK); |
---|
682 | return EXIT_SUCCESS; |
---|
683 | } |
---|
684 | else |
---|
685 | { |
---|
686 | msgInformation("%s\n",STR_KO); |
---|
687 | return EXIT_FAILURE; |
---|
688 | } |
---|
689 | } |
---|