Last change
on this file since 99 was
98,
checked in by rosiere, 16 years ago
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1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...)
2) Change VHDL Execute_queue -> use Generic/Queue?
3) Complete document on VHDL generation
4) Add soc test
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Property svn:keywords set to
Id
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File size:
1.0 KB
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1 | /* |
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2 | * Test_008 |
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3 | * |
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4 | * end_ko : infinite_loop |
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5 | * end_ok : Write in R1 the stop address and stop an data |
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6 | * The store in the destination of an jump |
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7 | * start : write an value in special register (epcr), and read this special register |
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8 | */ |
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9 | |
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10 | .file "crt0.s" |
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11 | /* |
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12 | .section .vector |
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13 | */ |
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14 | .section .text |
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15 | .align 4 |
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16 | |
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17 | /* ---[ 0x0 : Print a error ]------------------------------------------- */ |
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18 | |
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19 | .org 0x0 |
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20 | _end_ko : |
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21 | _infinite_loop : |
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22 | l.j _infinite_loop |
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23 | l.nop |
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24 | |
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25 | _end_ok : |
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26 | l.movhi r1, hi(_tty) |
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27 | l.ori r1, r1, lo(_tty) |
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28 | l.sw 4(r1), r1 /* stop address */ |
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29 | |
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30 | |
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31 | /* ---[ 0x100: RESET exception ]----------------------------------------- */ |
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32 | .org 0x100 |
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33 | .global _start |
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34 | _start: |
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35 | /* r1 : data */ |
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36 | l.movhi r1, hi(0xdeadbeef) |
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37 | l.ori r1, r1, lo(0xdeadbeef) |
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38 | /* EPCR <- r1 */ |
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39 | l.mtspr r0, r1, 32 |
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40 | /* r2 <- EPCR */ |
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41 | l.mfspr r2, r0, 32 |
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42 | /* test if two register is same */ |
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43 | l.sfeq r2, r1 |
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44 | l.bnf _end_ko |
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45 | l.nop |
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46 | l.j _end_ok |
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47 | l.nop |
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48 | |
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