/*
 * $Id$
 *
 * [ Description ]
 * 
 */

#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h"

namespace morpheo                    {
namespace behavioural {
namespace stage_1_ifetch {
namespace predictor {
namespace meta_predictor {
namespace two_level_branch_predictor {


#ifdef SYSTEMC
  Two_Level_Branch_Predictor::Two_Level_Branch_Predictor (sc_module_name name,
#else
  Two_Level_Branch_Predictor::Two_Level_Branch_Predictor (string name,
#endif
#ifdef STATISTICS
			      morpheo::behavioural::Parameters_Statistics             param_statistics,
#endif
			      morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::Parameters param ):
			      _name              (name)
			      ,_param            (param)
#ifdef STATISTICS
			      ,_param_statistics (param_statistics)
#endif
  {
    log_printf(FUNC,Two_Level_Branch_Predictor,"Two_Level_Branch_Predictor","Begin");

#ifdef STATISTICS
    // Allocation of statistics
    _stat = new Statistics (static_cast<string>(_name),
			    param_statistics          ,
			    param);
#endif

#ifdef VHDL_TESTBENCH
    // Creation of a testbench
    //  -> port
    //  -> clock's signals
    _vhdl_testbench = new Vhdl_Testbench (_name);
    vhdl_testbench_port           ();
    _vhdl_testbench->set_clock    ("in_CLOCK",true);
#endif

#ifdef VHDL
    // generate the vhdl
    vhdl();
#endif

#ifdef SYSTEMC
    allocation ();

#if (defined(STATISTICS) || defined (VHDL_TESTBENCH))
    SC_METHOD (transition);
    dont_initialize ();
    sensitive_pos << *(in_CLOCK);
#endif

//     SC_METHOD (genMoore);
//     dont_initialize ();
//     sensitive_neg << *(in_CLOCK);

#ifdef SYSTEMCASS_SPECIFIC
    // List dependency information
#endif    

#endif
    log_printf(FUNC,Two_Level_Branch_Predictor,"Two_Level_Branch_Predictor","End");
  };
  
  Two_Level_Branch_Predictor::~Two_Level_Branch_Predictor (void)
  {
    log_printf(FUNC,Two_Level_Branch_Predictor,"~Two_Level_Branch_Predictor","Begin");

#ifdef VHDL_TESTBENCH
    // generate the test bench
    _vhdl_testbench->generate_file();
    delete _vhdl_testbench;
#endif

#ifdef STATISTICS
    _stat->generate_file(statistics(0));
    
    delete _stat;
#endif

#ifdef SYSTEMC
    deallocation ();
#endif

    log_printf(FUNC,Two_Level_Branch_Predictor,"~Two_Level_Branch_Predictor","End");
  };

}; // end namespace two_level_branch_predictor
}; // end namespace meta_predictor
}; // end namespace predictor
}; // end namespace stage_1_ifetch
}; // end namespace behavioural
}; // end namespace morpheo              
