#ifdef VHDL_TESTBENCH
/*
 * $Id$
 *
 * [ Description ]
 * 
 */

#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"

namespace morpheo                    {
namespace behavioural {
@NAMESPACE_BEGIN

  void @COMPONENT::vhdl_testbench_transition ()
  {
    log_printf(FUNC,@COMPONENT,"vhdl_testbench_transition","Begin");

    // Evaluation before read the ouput signal
    sc_start(0);

    // In order with file @COMPONENT_vhdl_testbench_port.cpp
    // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
    // (because we have no control on the ordonnancer's policy)

    _vhdl_testbench->add_input (PORT_READ( in_NRESET));
    
    // add_test :
    //  - True  : the cycle must be compare with the output of systemC
    //  - False : no test
    _vhdl_testbench->add_test(true);

    _vhdl_testbench->new_cycle (); // always at the end

    log_printf(FUNC,@COMPONENT,"vhdl_testbench_transition","End");
  };

@NAMESPACE_END
}; // end namespace behavioural
}; // end namespace morpheo              
#endif
