Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/Makefile.deps (revision 103) @@ -13,4 +13,7 @@ include $(DIR_MORPHEO)/Behavioural/Makefile.deps endif +ifndef Queue +include $(DIR_MORPHEO)/Behavioural/Generic/Queue/Makefile.deps +endif #-----[ Directory ]---------------------------------------- @@ -21,7 +24,9 @@ Write_queue_LIBRARY = -lWrite_queue \ + $(Queue_LIBRARY) \ $(Behavioural_LIBRARY) Write_queue_DIR_LIBRARY = -L$(Write_queue_DIR)/lib \ + $(Queue_DIR_LIBRARY) \ $(Behavioural_DIR_LIBRARY) @@ -30,4 +35,5 @@ Write_queue_library : @\ + $(MAKE) Queue_library; \ $(MAKE) Behavioural_library; \ $(MAKE) --directory=$(Write_queue_DIR) --makefile=Makefile; @@ -35,4 +41,5 @@ Write_queue_library_clean : @\ + $(MAKE) Queue_library_clean; \ $(MAKE) Behavioural_library_clean; \ $(MAKE) --directory=$(Write_queue_DIR) --makefile=Makefile clean; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 103) @@ -46,4 +46,5 @@ //public : uint32_t _size_general_register ; //public : uint32_t _size_special_register ; + public : uint32_t _size_internal_queue ; //public : bool _have_port_context_id ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp (revision 103) @@ -47,5 +47,5 @@ test(); - + if (is_toplevel) { @@ -67,4 +67,20 @@ copy(); } + + _size_internal_queue = + ( _size_context_id + + _size_front_end_id + + _size_ooo_engine_id + + _size_rob_ptr + + 1 + + _size_general_register + + _size_general_data + + 1 + + _size_special_register + + _size_special_data + + _size_exception + + 1 + + _size_instruction_address + ); log_printf(FUNC,Write_queue,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 103) @@ -101,6 +101,17 @@ PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i], (*it)->_num_reg_re); PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i], (*it)->_data_re ); - PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i], (*it)->_data_re ); } +#ifdef SYSTEMC_VHDL_COMPATIBILITY + else + { + if (_param->_have_port_ooo_engine_id) + PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i], 0); + PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i], 0); + PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i], 0); + PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i], 0); + PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i], 0); + } +#endif + PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [i], val and (*it)->_write_rd ); PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [i], val and (*it)->_write_re ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl.cpp (revision 103) @@ -9,4 +9,5 @@ #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h" #include "Behavioural/include/Vhdl.h" +#include "Behavioural/Generic/Queue/include/Queue.h" namespace morpheo { @@ -25,4 +26,33 @@ { log_printf(FUNC,Write_queue,FUNCTION,"Begin"); + + morpheo::behavioural::generic::queue::Parameters * param_queue; + morpheo::behavioural::generic::queue::Queue * queue; + + param_queue = new morpheo::behavioural::generic::queue::Parameters + (_param->_size_queue, + _param->_size_internal_queue, + _param->_nb_bypass_write + ); + + std::cout << "size internal queue :" << _param->_size_internal_queue << "." << std::endl; + + std::string queue_name = _name + "_queue"; + queue = new morpheo::behavioural::generic::queue::Queue + (queue_name.c_str() +#ifdef STATISTICS + ,NULL +#endif + ,param_queue + ,USE_VHDL); + + _component->set_component(queue->_component +#ifdef POSITION + , 50, 50, 50, 50 +#endif + , INSTANCE_LIBRARY + ); + + Vhdl * vhdl = new Vhdl (_name); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_body.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_body.cpp (revision 103) @@ -25,4 +25,231 @@ log_printf(FUNC,Write_queue,FUNCTION,"Begin"); vhdl->set_body (""); + vhdl->set_comment(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Instance queue "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,""); + + vhdl->set_body (0,"instance_"+_name+"_queue : "+_name+"_queue"); + vhdl->set_body (0,"port map ("); + vhdl->set_body (1," in_CLOCK \t=>\t in_CLOCK "); + vhdl->set_body (1,", in_NRESET \t=>\t in_NRESET"); + vhdl->set_body (1,", in_INSERT_VAL \t=>\tsig_QUEUE_INSERT_VAL"); + vhdl->set_body (1,",out_INSERT_ACK \t=>\tsig_QUEUE_INSERT_ACK"); + vhdl->set_body (1,", in_INSERT_DATA \t=>\tsig_QUEUE_INSERT_DATA"); + vhdl->set_body (1,",out_RETIRE_VAL \t=>\tsig_QUEUE_RETIRE_VAL"); + vhdl->set_body (1,", in_RETIRE_ACK \t=>\tsig_QUEUE_RETIRE_ACK"); + vhdl->set_body (1,",out_RETIRE_DATA \t=>\tsig_QUEUE_RETIRE_DATA"); + for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + { + vhdl->set_body (1,",out_SLOT_"+toString(i)+"_VAL \t=>\tsig_QUEUE_SLOT_"+toString(i)+"_VAL"); + vhdl->set_body (1,",out_SLOT_"+toString(i)+"_DATA \t=>\tsig_QUEUE_SLOT_"+toString(i)+"_DATA"); + } + vhdl->set_body (0,");"); + + vhdl->set_body (0,""); + + + vhdl->set_comment(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Insides "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,""); + + vhdl->set_body (0,"write_rd_re_bis: process (in_CLOCK)"); + vhdl->set_body (0,"begin -- process write rd/re bis"); + vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); +// #ifdef SYSTEMC_VHDL_COMPATIBILITY +// vhdl->set_body (2,"if (in_NRESET = '0') then"); +// vhdl->set_body (2,"reg_GPR_WRITE <= '0';"); +// vhdl->set_body (2,"reg_SPR_WRITE <= '0';"); +// vhdl->set_body (2,"else"); +// #endif + vhdl->set_body (2,"reg_UPDATE <= (in_WRITE_QUEUE_OUT_ACK and sig_WRITE_QUEUE_OUT_VAL) or (not sig_QUEUE_RETIRE_VAL);"); + + vhdl->set_body (2,"if (sig_GPR_WRITE_0_VAL = '1' and in_GPR_WRITE_0_ACK = '1') then"); + vhdl->set_body (3,"reg_GPR_WRITE <= '0';"); + vhdl->set_body (2,"else"); + vhdl->set_body (3,"reg_GPR_WRITE <= sig_GPR_WRITE;"); + vhdl->set_body (2,"end if;"); + + vhdl->set_body (2,"if (sig_SPR_WRITE_0_VAL = '1' and in_SPR_WRITE_0_ACK = '1') then"); + vhdl->set_body (3,"reg_SPR_WRITE <= '0';"); + vhdl->set_body (2,"else"); + vhdl->set_body (3,"reg_SPR_WRITE <= sig_SPR_WRITE;"); + vhdl->set_body (2,"end if;"); + +// #ifdef SYSTEMC_VHDL_COMPATIBILITY +// vhdl->set_body (2,"end if;"); +// #endif + vhdl->set_body (1,"end if;"); + vhdl->set_body (0,"end process write_rd_re_bis;"); + + vhdl->set_body (0,"sig_GPR_WRITE <= sig_WRITE_RD when (reg_UPDATE = '1') else reg_GPR_WRITE;"); + vhdl->set_body (0,"sig_SPR_WRITE <= sig_WRITE_RE when (reg_UPDATE = '1') else reg_SPR_WRITE;"); + vhdl->set_body (0,"sig_GPR_WRITE_0_VAL <= sig_QUEUE_RETIRE_VAL and sig_GPR_WRITE;"); + vhdl->set_body (0,"sig_SPR_WRITE_0_VAL <= sig_QUEUE_RETIRE_VAL and sig_SPR_WRITE;"); + vhdl->set_body (0,"sig_DELETE_QUEUE_FRONT <= sig_QUEUE_RETIRE_VAL and not sig_GPR_WRITE and not sig_SPR_WRITE when (sig_WRITE_QUEUE_OUT_EXCEPTION = "+toString(EXCEPTION_MEMORY_LOAD_SPECULATIVE)+") else '0';"); + vhdl->set_body (0,"sig_WRITE_QUEUE_OUT_VAL <= sig_QUEUE_RETIRE_VAL and not sig_DELETE_QUEUE_FRONT and not sig_GPR_WRITE and not sig_SPR_WRITE;"); + vhdl->set_body (0,"sig_QUEUE_RETIRE_ACK <= sig_DELETE_QUEUE_FRONT or (in_WRITE_QUEUE_OUT_ACK and sig_WRITE_QUEUE_OUT_VAL);"); + + if (_param->_nb_bypass_write > 0) + { + vhdl->set_body (0,"sig_BYPASS_WRITE_0_GPR_VAL <= sig_GPR_WRITE_0_VAL;"); + vhdl->set_body (0,"sig_BYPASS_WRITE_0_SPR_VAL <= sig_SPR_WRITE_0_VAL;"); + } + + for (uint32_t i=1; i<_param->_nb_bypass_write; i++) + { + vhdl->set_body (0,"sig_BYPASS_WRITE_"+toString(i)+"_GPR_VAL <= sig_QUEUE_SLOT_"+toString(i)+"_VAL and sig_BYPASS_WRITE_"+toString(i)+"_WRITE_RD;"); + vhdl->set_body (0,"sig_BYPASS_WRITE_"+toString(i)+"_SPR_VAL <= sig_QUEUE_SLOT_"+toString(i)+"_VAL and sig_BYPASS_WRITE_"+toString(i)+"_WRITE_RE;"); + } + + vhdl->set_body (0,""); + + + vhdl->set_comment(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Input Buffer "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,""); + + { + uint32_t min = 0; + uint32_t max, size; + + if(_param->_have_port_context_id ) + { + size = _param->_size_context_id; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_CONTEXT_ID;"); + min = max+1; + } + if(_param->_have_port_front_end_id ) + { + size = _param->_size_front_end_id; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_FRONT_END_ID;"); + min = max+1; + } + if(_param->_have_port_ooo_engine_id ) + { + size = _param->_size_ooo_engine_id; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_OOO_ENGINE_ID;"); + min = max+1; + } + if(_param->_have_port_rob_ptr) + { + size = _param->_size_rob_ptr; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_PACKET_ID;"); + min = max+1; + } + + size = 1; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_WRITE_RD;"); + min = max+1; + + size = _param->_size_general_register; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_NUM_REG_RD;"); + min = max+1; + + size = _param->_size_general_data; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_DATA_RD;"); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_WRITE_RE;"); + min = max+1; + + size = _param->_size_special_register; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_NUM_REG_RE;"); + min = max+1; + + size = _param->_size_special_data; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_DATA_RE;"); + min = max+1; + + size = _param->_size_exception; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_EXCEPTION;"); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_NO_SEQUENCE;"); + min = max+1; + + size = _param->_size_instruction_address; + max = min-1+size; + vhdl->set_body (0,"sig_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_WRITE_QUEUE_IN_ADDRESS;"); + min = max+1; + } + + vhdl->set_body (0,""); + + + vhdl->set_comment(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Output Buffer "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,""); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_VAL <= sig_WRITE_QUEUE_OUT_VAL;"); + if(_param->_have_port_context_id) + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_CONTEXT_ID <= sig_WRITE_QUEUE_OUT_CONTEXT_ID ;"); + if(_param->_have_port_front_end_id) + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_FRONT_END_ID <= sig_WRITE_QUEUE_OUT_FRONT_END_ID ;"); + if(_param->_have_port_ooo_engine_id) + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_OOO_ENGINE_ID <= sig_WRITE_QUEUE_OUT_OOO_ENGINE_ID;"); + if(_param->_have_port_rob_ptr) + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_PACKET_ID <= sig_WRITE_QUEUE_OUT_PACKET_ID ;"); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_FLAGS <= sig_WRITE_QUEUE_OUT_FLAGS ;"); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_EXCEPTION <= sig_WRITE_QUEUE_OUT_EXCEPTION ;"); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_NO_SEQUENCE <= sig_WRITE_QUEUE_OUT_NO_SEQUENCE ;"); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_ADDRESS <= sig_WRITE_QUEUE_OUT_ADDRESS ;"); + vhdl->set_body (0,"out_WRITE_QUEUE_OUT_DATA <= sig_WRITE_QUEUE_OUT_DATA ;"); + vhdl->set_body (""); + + vhdl->set_body (0,"out_GPR_WRITE_0_VAL <= sig_GPR_WRITE_0_VAL;"); + if(_param->_have_port_ooo_engine_id) + vhdl->set_body (0,"out_GPR_WRITE_0_OOO_ENGINE_ID <= sig_GPR_WRITE_0_OOO_ENGINE_ID;"); + vhdl->set_body (0,"out_GPR_WRITE_0_NUM_REG <= sig_GPR_WRITE_0_NUM_REG;"); + vhdl->set_body (0,"out_GPR_WRITE_0_DATA <= sig_GPR_WRITE_0_DATA;"); + + for (uint32_t i=1; i<_param->_nb_gpr_write; i++) + vhdl->set_body (0,"out_GPR_WRITE_"+toString(i)+"_VAL <= '0';"); + + vhdl->set_body (0,"out_SPR_WRITE_0_VAL <= sig_SPR_WRITE_0_VAL;"); + if(_param->_have_port_ooo_engine_id) + vhdl->set_body (0,"out_SPR_WRITE_0_OOO_ENGINE_ID <= sig_SPR_WRITE_0_OOO_ENGINE_ID;"); + vhdl->set_body (0,"out_SPR_WRITE_0_NUM_REG <= sig_SPR_WRITE_0_NUM_REG;"); + vhdl->set_body (0,"out_SPR_WRITE_0_DATA <= sig_SPR_WRITE_0_DATA;"); + + for (uint32_t i=1; i<_param->_nb_spr_write; i++) + vhdl->set_body (0,"out_SPR_WRITE_"+toString(i)+"_VAL <= '0';"); + + vhdl->set_body (""); + + for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + { + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_GPR_VAL <= sig_BYPASS_WRITE_"+toString(i)+"_GPR_VAL;"); + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG <= sig_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG;"); + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_GPR_DATA <= sig_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;"); + + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_SPR_VAL <= sig_BYPASS_WRITE_"+toString(i)+"_SPR_VAL;"); + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG <= sig_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG;"); + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_SPR_DATA <= sig_BYPASS_WRITE_"+toString(i)+"_SPR_DATA;"); + + if(_param->_have_port_ooo_engine_id) + vhdl->set_body (0,"out_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID <= sig_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID;"); + } + log_printf(FUNC,Write_queue,FUNCTION,"End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_declaration.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_vhdl_declaration.cpp (revision 103) @@ -1,3 +1,3 @@ -#ifdef VHDL + #ifdef VHDL /* * $Id$ @@ -24,4 +24,141 @@ { log_printf(FUNC,Write_queue,FUNCTION,"Begin"); + + vhdl->set_alias ("sig_QUEUE_INSERT_VAL ",1," in_WRITE_QUEUE_IN_VAL",std_logic_range(1)); + vhdl->set_alias ("sig_QUEUE_INSERT_ACK ",1,"out_WRITE_QUEUE_IN_ACK",std_logic_range(1)); + vhdl->set_signal ("sig_QUEUE_INSERT_DATA ",_param->_size_internal_queue); + vhdl->set_signal ("sig_QUEUE_RETIRE_DATA ",_param->_size_internal_queue); + vhdl->set_signal ("sig_QUEUE_RETIRE_VAL ",1); + vhdl->set_signal ("sig_QUEUE_RETIRE_ACK ",1); + for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + { + vhdl->set_signal ("sig_QUEUE_SLOT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("sig_QUEUE_SLOT_"+toString(i)+"_DATA",_param->_size_internal_queue); + } + for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + { + vhdl->set_signal ("sig_BYPASS_WRITE_"+toString(i)+"_GPR_VAL",1); + vhdl->set_signal ("sig_BYPASS_WRITE_"+toString(i)+"_SPR_VAL",1); + } + + vhdl->set_signal ("sig_GPR_WRITE_0_VAL",1); + vhdl->set_signal ("sig_SPR_WRITE_0_VAL",1); + vhdl->set_signal ("sig_DELETE_QUEUE_FRONT",1); + vhdl->set_signal ("sig_WRITE_QUEUE_OUT_VAL",1); + vhdl->set_signal ("reg_GPR_WRITE",1); + vhdl->set_signal ("reg_SPR_WRITE",1); + vhdl->set_signal ("sig_GPR_WRITE",1); + vhdl->set_signal ("sig_SPR_WRITE",1); + vhdl->set_signal ("reg_UPDATE",1); + + uint32_t min = 0; + uint32_t max, size; + uint32_t min_ooo, max_ooo; + uint32_t pos_write_rd, min_gpr_num_reg, max_gpr_num_reg, min_gpr_data, max_gpr_data; + uint32_t pos_write_re, min_spr_num_reg, max_spr_num_reg, min_spr_data, max_spr_data; + + if(_param->_have_port_context_id ) + { + size = _param->_size_context_id; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_CONTEXT_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + } + if(_param->_have_port_front_end_id ) + { + size = _param->_size_front_end_id; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_FRONT_END_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + } + if(_param->_have_port_ooo_engine_id ) + { + size = _param->_size_ooo_engine_id; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_OOO_ENGINE_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("sig_GPR_WRITE_0_OOO_ENGINE_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("sig_SPR_WRITE_0_OOO_ENGINE_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min_ooo = min; + max_ooo = max; + min = max+1; + } + if(_param->_have_port_rob_ptr) + { + size = _param->_size_rob_ptr; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_PACKET_ID ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + } + + size = 1; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_RD ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + pos_write_rd = max; + min = max+1; + + size = _param->_size_general_register; + max = min-1+size; + vhdl->set_alias ("sig_GPR_WRITE_0_NUM_REG ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min_gpr_num_reg = min; + max_gpr_num_reg = max; + min = max+1; + + size = _param->_size_general_data; + max = min-1+size; + vhdl->set_alias ("sig_GPR_WRITE_0_DATA ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_DATA ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min_gpr_data = min; + max_gpr_data = max; + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_RE ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + pos_write_re = max; + min = max+1; + + size = _param->_size_special_register; + max = min-1+size; + vhdl->set_alias ("sig_SPR_WRITE_0_NUM_REG ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min_spr_num_reg = min; + max_spr_num_reg = max; + min = max+1; + + size = _param->_size_special_data; + max = min-1+size; + vhdl->set_alias ("sig_SPR_WRITE_0_DATA ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_FLAGS ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min_spr_data = min; + max_spr_data = max; + min = max+1; + + size = _param->_size_exception; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_EXCEPTION ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_NO_SEQUENCE ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_instruction_address; + max = min-1+size; + vhdl->set_alias ("sig_WRITE_QUEUE_OUT_ADDRESS ",std_logic(size),"sig_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + { + if(_param->_have_port_ooo_engine_id) + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID",std_logic(_param->_size_ooo_engine_id),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,max_ooo,min_ooo)); + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG",std_logic(_param->_size_general_register),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,max_gpr_num_reg,min_gpr_num_reg)); + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_GPR_DATA",std_logic(_param->_size_general_data),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,max_gpr_data,min_gpr_data)); + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG",std_logic(_param->_size_special_register),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,max_spr_num_reg,min_spr_num_reg)); + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_SPR_DATA",std_logic(_param->_size_special_data),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,max_spr_data,min_spr_data)); + + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_WRITE_RD",std_logic(1),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,pos_write_rd,pos_write_rd)); + vhdl->set_alias ("sig_BYPASS_WRITE_"+toString(i)+"_WRITE_RE",std_logic(1),"sig_QUEUE_SLOT_"+toString(i)+"_DATA",std_logic_range(_param->_size_internal_queue,pos_write_re,pos_write_re)); + } + log_printf(FUNC,Write_queue,FUNCTION,"End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h (revision 103) @@ -75,6 +75,6 @@ // ~~~~~[ Interface "slot" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_OUT(Tcontrol_t) ** out_SLOT_VAL ; - public : SC_OUT(Tdata_t ) ** out_SLOT_DATA; + public : SC_OUT(Tcontrol_t) ** out_SLOT_VAL ; //[nb_port_slot] + public : SC_OUT(Tdata_t ) ** out_SLOT_DATA; //[nb_port_slot] // ~~~~~[ Interface "ptr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp (revision 103) @@ -46,4 +46,5 @@ else vhdl->set_body (0,"signal_SLOT_"+toString(i)+" <= const_PTR_INIT when signal_SLOT_"+toString(i-1)+" = const_PTR_MAX else signal_SLOT_"+toString(i-1)+"+'1';"); + } @@ -51,15 +52,38 @@ { if (_param->_nb_port_slot > 1) - vhdl->set_body (0,"out_SLOT_"+toString(i)+"_VAL <= '1' when reg_NB_ELT > "+std_logic_cst(log2(_param->_size_queue+1),i)+" else '0';"); - else - vhdl->set_body (0,"out_SLOT_"+toString(i)+"_VAL <= not signal_EMPTY;"); - + vhdl->set_body (0,"signal_SLOT_"+toString(i)+"_VAL <= '1' when reg_NB_ELT > "+std_logic_cst(log2(_param->_size_queue+1),i)+" else '0';"); + else + vhdl->set_body (0,"signal_SLOT_"+toString(i)+"_VAL <= not signal_EMPTY;"); + + vhdl->set_body (0,"out_SLOT_"+toString(i)+"_VAL <= signal_SLOT_"+toString(i)+"_VAL;"); + +#ifdef SYSTEMC_VHDL_COMPATIBILITY + std::string str_val_disable=std_logic_cst(_param->_size_data,0)+" when signal_SLOT_"+toString(i)+"_VAL='0' else"; +#endif if (_param->_nb_port_slot > 1) - vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <= reg_DATA(conv_integer(signal_SLOT_"+toString(i)+"));"); + { + vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <= "); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (1,str_val_disable); +#endif + vhdl->set_body (1,"reg_DATA(conv_integer(signal_SLOT_"+toString(i)+"));"); + } else if (_param->_size_queue > 1) - vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <= reg_DATA(conv_integer(signal_PTR_READ));"); + { + vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <="); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (1,str_val_disable); +#endif + vhdl->set_body (1,"reg_DATA(conv_integer(signal_PTR_READ));"); + } else - vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <= reg_DATA(conv_integer(0));"); + { + vhdl->set_body (0,"out_SLOT_"+toString(i)+"_DATA <="); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (1,str_val_disable); +#endif + vhdl->set_body (1,"reg_DATA(conv_integer(0));"); + } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp (revision 103) @@ -38,4 +38,8 @@ } + if (_param->_nb_port_slot>0) + for (uint32_t i=0; i<_param->_nb_port_slot; ++i) + vhdl->set_signal ("signal_SLOT_"+toString(i)+"_VAL", 1); + if (_param->_nb_port_slot>1) { Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common (revision 103) @@ -23,4 +23,5 @@ #-----[ Directory ]---------------------------------------- +#DIR_TMP = . DIR_TMP = $(MORPHEO_TMP) DIR_INC = include Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 103) @@ -29,10 +29,11 @@ declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; \ + declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*.vhdl|$(GREP_NOT) "(_Pack\.|_Testbench\.)")); \ + declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ + if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; \ declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*_Testbench.vhdl)); \ declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ - if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; \ - declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*.vhdl|$(GREP_NOT) "(_Pack\.|_Testbench\.)")); \ - declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; + sim : vhdl @@ -85,5 +86,5 @@ @\ if $(TEST) -f Makefile.mkf; then $(MAKE) -f Makefile.mkf clean; fi; \ - $(RM) $(DIR_WORK) transcript Makefile.mkf $(FPGA_CFG_FILE_LOCAL) *.wlf; + $(RM) $(DIR_WORK) transcript Makefile.mkf *.wlf; synthesis_clean_all : synthesis_clean Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 103) @@ -3,5 +3,5 @@ # -all: _Generic/Queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest +all: _Generic/Queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest _Generic/Queue/SelfTest: @@ -11,7 +11,11 @@ gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest +_Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest: + gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest + clean: gmake clean -C Generic/Queue/SelfTest gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest + gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest re: clean all @@ -20,3 +24,4 @@ gmake install -C Generic/Queue/SelfTest gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest + gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 103) @@ -10,8 +10,8 @@ #define MORPHEO_MAJOR_VERSION 0 #define MORPHEO_MINOR_VERSION 2 -#define MORPHEO_REVISION "102" +#define MORPHEO_REVISION "103" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "15" +#define MORPHEO_DATE_DAY "16" #define MORPHEO_DATE_MONTH "01" #define MORPHEO_DATE_YEAR "2009" Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 103) @@ -24,4 +24,8 @@ #target_dep all Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest +target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest +target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest + + # mkf include path var_define _mkf_path include_mkf Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/ToBase2.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/ToBase2.h (revision 102) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/ToBase2.h (revision 103) @@ -17,6 +17,6 @@ std::ostringstream res; T mask = 1<<(size-1); - - while (mask != 0) + + for (uint32_t i=0; i