Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Queue.h	(revision 103)
@@ -75,6 +75,6 @@
 
     // ~~~~~[ Interface "slot" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_OUT(Tcontrol_t)           ** out_SLOT_VAL ;
-  public    : SC_OUT(Tdata_t   )           ** out_SLOT_DATA;
+  public    : SC_OUT(Tcontrol_t)           ** out_SLOT_VAL ; //[nb_port_slot]
+  public    : SC_OUT(Tdata_t   )           ** out_SLOT_DATA; //[nb_port_slot]
 
     // ~~~~~[ Interface "ptr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_body.cpp	(revision 103)
@@ -46,4 +46,5 @@
             else
               vhdl->set_body   (0,"signal_SLOT_"+toString(i)+"           <= const_PTR_INIT when signal_SLOT_"+toString(i-1)+" = const_PTR_MAX else signal_SLOT_"+toString(i-1)+"+'1';");
+
           }
         
@@ -51,15 +52,38 @@
       {
         if (_param->_nb_port_slot > 1)
-          vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_VAL        <= '1' when reg_NB_ELT > "+std_logic_cst(log2(_param->_size_queue+1),i)+" else '0';");
-        else
-          vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_VAL        <= not signal_EMPTY;");
-        
+          vhdl->set_body   (0,"signal_SLOT_"+toString(i)+"_VAL     <= '1' when reg_NB_ELT > "+std_logic_cst(log2(_param->_size_queue+1),i)+" else '0';");
+        else
+          vhdl->set_body   (0,"signal_SLOT_"+toString(i)+"_VAL     <= not signal_EMPTY;");
+        
+        vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_VAL        <= signal_SLOT_"+toString(i)+"_VAL;");
+        
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+        std::string str_val_disable=std_logic_cst(_param->_size_data,0)+" when signal_SLOT_"+toString(i)+"_VAL='0' else";
+#endif
         if (_param->_nb_port_slot > 1)
-          vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <= reg_DATA(conv_integer(signal_SLOT_"+toString(i)+"));");
+          {
+            vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <= ");
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+            vhdl->set_body   (1,str_val_disable);
+#endif
+            vhdl->set_body   (1,"reg_DATA(conv_integer(signal_SLOT_"+toString(i)+"));");
+          }
         else
           if (_param->_size_queue > 1)
-            vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <= reg_DATA(conv_integer(signal_PTR_READ));");
+            {
+              vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <=");
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+              vhdl->set_body   (1,str_val_disable);
+#endif
+              vhdl->set_body   (1,"reg_DATA(conv_integer(signal_PTR_READ));");
+            }
           else
-            vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <= reg_DATA(conv_integer(0));");
+            {
+              vhdl->set_body   (0,"out_SLOT_"+toString(i)+"_DATA       <=");
+#ifdef SYSTEMC_VHDL_COMPATIBILITY
+              vhdl->set_body   (1,str_val_disable);
+#endif
+              vhdl->set_body   (1,"reg_DATA(conv_integer(0));");
+            }
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_vhdl_declaration.cpp	(revision 103)
@@ -38,4 +38,8 @@
       }
 
+    if (_param->_nb_port_slot>0)
+    for (uint32_t i=0; i<_param->_nb_port_slot; ++i)
+    vhdl->set_signal  ("signal_SLOT_"+toString(i)+"_VAL", 1);
+
     if (_param->_nb_port_slot>1)
       {
