Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 105)
@@ -68,5 +68,5 @@
   ALLOC2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ," in_INSERT_NO_EXECUTE              ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   ALLOC2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ," in_INSERT_IS_DELAY_SLOT           ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
-  ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS                 ," in_INSERT_ADDRESS                 ",Taddress_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT            ," in_INSERT_ADDRESS_NEXT            ",Taddress_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION               ," in_INSERT_EXCEPTION               ",Texception_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION_USE           ," in_INSERT_EXCEPTION_USE           ",Texception_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -153,4 +153,5 @@
   ALLOC_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,"out_UPDATE_IS_DELAY_SLOT            ",Tcontrol_t        );
   ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS                  ,"out_UPDATE_ADDRESS                  ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         ,"out_UPDATE_ADDRESS_EPCR_VAL         ",Tcontrol_t        );
   ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,"out_UPDATE_ADDRESS_EPCR             ",Taddress_t        );
   ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,"out_UPDATE_ADDRESS_EEAR_VAL         ",Tcontrol_t        );
@@ -205,5 +206,5 @@
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
-  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -302,4 +303,5 @@
   INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_IS_DELAY_SLOT            );
   INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS                  );
+  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EPCR_VAL         );
   INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EPCR             );
   INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EEAR_VAL         );
@@ -418,5 +420,5 @@
 		  in_INSERT_IS_DELAY_SLOT           [i][j]->write(0);
 		  in_INSERT_NO_EXECUTE              [i][j]->write(0);
-		  in_INSERT_ADDRESS                 [i][j]->write(addr);
+		  in_INSERT_ADDRESS_NEXT            [i][j]->write(addr);
 		  in_INSERT_EXCEPTION               [i][j]->write(0);
 		  in_INSERT_EXCEPTION_USE           [i][j]->write(0);
@@ -615,5 +617,5 @@
   DELETE2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   DELETE2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
-  DELETE2_SC_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+  DELETE2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -698,4 +700,5 @@
   DELETE_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            );
   DELETE_SC_SIGNAL (out_UPDATE_ADDRESS                  );
+  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         );
   DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             );
   DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 105)
@@ -83,5 +83,5 @@
   public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_NO_EXECUTE                ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_IS_DELAY_SLOT             ;//[nb_rename_unit][nb_inst_insert]
-  public    : SC_IN (Taddress_t         ) ***  in_INSERT_ADDRESS                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Taddress_t         ) ***  in_INSERT_ADDRESS_NEXT              ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_IN (Texception_t       ) ***  in_INSERT_EXCEPTION                 ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_IN (Texception_t       ) ***  in_INSERT_EXCEPTION_USE             ;//[nb_rename_unit][nb_inst_insert]
@@ -179,4 +179,5 @@
   public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_IS_DELAY_SLOT             ;
   public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS                   ;
+  public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_ADDRESS_EPCR_VAL          ;
   public    : SC_OUT(Taddress_t         )   * out_UPDATE_ADDRESS_EPCR              ;
   public    : SC_OUT(Tcontrol_t         )   * out_UPDATE_ADDRESS_EEAR_VAL          ;
@@ -229,5 +230,5 @@
   private   : bool                         ** reg_EVENT_FLUSH                      ;//[nb_front_end][nb_context]
 
-  private   : Taddress_t                   ** reg_PC_PREVIOUS                      ;//[nb_front_end][nb_context]
+//private   : Taddress_t                   ** reg_PC_PREVIOUS                      ;//[nb_front_end][nb_context]
   private   : Taddress_t                   ** reg_PC_CURRENT                       ;//[nb_front_end][nb_context]
   private   : Taddress_t                   ** reg_PC_CURRENT_IS_DS                 ;//[nb_front_end][nb_context]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 105)
@@ -42,7 +42,11 @@
       ROB_END_BRANCH_MISS_SPECULATIVE, // 
       ROB_END_BRANCH_MISS            , // 
+      ROB_END_LOAD_MISS_SPECULATIVE  , // 
+      ROB_END_LOAD_MISS_UPDATE       , // 
+      ROB_END_LOAD_MISS              , // 
       ROB_END_MISS                   , // 
       ROB_END_EXCEPTION_WAIT_HEAD    , // 
-      ROB_END_EXCEPTION               // 
+      ROB_END_EXCEPTION_UPDATE       , // 
+      ROB_END_EXCEPTION                // 
     } rob_state_t;
 
@@ -58,5 +62,5 @@
   public  : Toperation_t       operation               ;
   public  : Tcontrol_t         is_delay_slot           ;
-  public  : Tgeneral_data_t    address                 ;
+//public  : Tgeneral_data_t    address                 ;
   public  : Tcontrol_t         use_store_queue         ;
   public  : Tcontrol_t         use_load_queue          ;
@@ -86,5 +90,6 @@
   public  : Tspecial_data_t    flags                   ;
   public  : Tcontrol_t         no_sequence             ;
-  public  : Tgeneral_data_t    data_commit             ; // branch's destination
+//public  : Tgeneral_data_t    data_commit             ; // branch's destination
+  public  : Taddress_t         address_next            ;
 
 //   public  : entry_t (uint32_t           ptr                     ,
@@ -177,6 +182,10 @@
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_BRANCH_MISS_SPECULATIVE: return "ROB_END_BRANCH_MISS_SPECULATIVE" ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_BRANCH_MISS            : return "ROB_END_BRANCH_MISS"             ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_LOAD_MISS_SPECULATIVE  : return "ROB_END_LOAD_MISS_SPECULATIVE"   ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_LOAD_MISS_UPDATE       : return "ROB_END_LOAD_MISS_UPDATE"        ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_LOAD_MISS              : return "ROB_END_LOAD_MISS"               ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_MISS                   : return "ROB_END_MISS"                    ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_EXCEPTION_WAIT_HEAD    : return "ROB_END_EXCEPTION_WAIT_HEAD"     ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_EXCEPTION_UPDATE       : return "ROB_END_EXCEPTION_UPDATE"        ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_EXCEPTION              : return "ROB_END_EXCEPTION"               ; break;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 105)
@@ -71,5 +71,5 @@
       _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE              ,"no_execute"           ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT           ,"is_delay_slot"        ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
-      _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS                 ,"address"              ,Taddress_t        ,_param->_size_instruction_address   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS_NEXT            ,"address_next"         ,Taddress_t        ,_param->_size_instruction_address   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION               ,"exception"            ,Texception_t      ,_param->_size_exception             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE           ,"exception_use"        ,Texception_t      ,_param->_size_exception             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -192,4 +192,5 @@
       ALLOC_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT            ,"is_delay_slot"   ,Tcontrol_t         ,1);
       ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS                  ,"address"         ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR_VAL         ,"address_epcr_val",Tcontrol_t         ,1);
       ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR             ,"address_epcr"    ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL         ,"address_eear_val",Tcontrol_t         ,1);
@@ -284,5 +285,5 @@
     ALLOC2(reg_EVENT_FLUSH          ,bool          ,_param->_nb_front_end,_param->_nb_context [it1]);
 
-    ALLOC2(reg_PC_PREVIOUS          ,Taddress_t    ,_param->_nb_front_end,_param->_nb_context [it1]);
+//  ALLOC2(reg_PC_PREVIOUS          ,Taddress_t    ,_param->_nb_front_end,_param->_nb_context [it1]);
     ALLOC2(reg_PC_CURRENT           ,Taddress_t    ,_param->_nb_front_end,_param->_nb_context [it1]);
     ALLOC2(reg_PC_CURRENT_IS_DS     ,Taddress_t    ,_param->_nb_front_end,_param->_nb_context [it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 105)
@@ -39,5 +39,5 @@
         DELETE2_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
         DELETE2_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
-        DELETE2_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_instruction_address               );
+        DELETE2_SIGNAL( in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_instruction_address               );
         DELETE2_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_exception             );
         DELETE2_SIGNAL( in_INSERT_EXCEPTION_USE           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_exception             );
@@ -129,4 +129,5 @@
         DELETE_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,1                         );
         DELETE_SIGNAL (out_UPDATE_ADDRESS                  ,_param->_size_instruction_address     );
+        DELETE_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         ,1                         );
         DELETE_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,_param->_size_instruction_address     );
         DELETE_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,1                         );
@@ -188,5 +189,5 @@
         DELETE2(reg_EVENT_STATE          ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE2(reg_EVENT_FLUSH          ,_param->_nb_front_end,_param->_nb_context [it1]);
-        DELETE2(reg_PC_PREVIOUS          ,_param->_nb_front_end,_param->_nb_context [it1]);
+//      DELETE2(reg_PC_PREVIOUS          ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE2(reg_PC_CURRENT           ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE2(reg_PC_CURRENT_IS_DS     ,_param->_nb_front_end,_param->_nb_context [it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 105)
@@ -80,4 +80,5 @@
 		    (state == ROB_END_KO         ) or 
 		    (state == ROB_END_BRANCH_MISS) or 
+		    (state == ROB_END_LOAD_MISS  ) or 
 		    (state == ROB_END_MISS       )//  or 
 // 		    (state == ROB_END_EXCEPTION)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp	(revision 105)
@@ -99,5 +99,5 @@
 		      if (_param->_have_port_depth)
 		      PORT_WRITE(out_BRANCH_COMPLETE_DEPTH        [i], entry->depth           );
-		      PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS      [i], entry->data_commit     );
+		      PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS      [i], entry->address_next    );
 // 		      PORT_WRITE(out_BRANCH_COMPLETE_FLAG         [i],(entry->flags&FLAG_F)!=0);
 		      PORT_WRITE(out_BRANCH_COMPLETE_NO_SEQUENCE  [i], entry->no_sequence     );
@@ -117,18 +117,67 @@
     // ===================================================================
     {
-      Tcontrol_t val = false;
-
-      if (not _rob[reg_NUM_BANK_HEAD].empty())
-	{
-	  entry_t    * entry = _rob [reg_NUM_BANK_HEAD].front();
-	  rob_state_t  state = entry->state;
-
-	  val   = (state == ROB_END_EXCEPTION);
-	  
-	  if (val)
-	    {
-	      throw ERRORMORPHEO(FUNCTION,_("Moore : exception is not yet supported (Coming Soon).\n"));
-	    }
-	}
+      internal_UPDATE_VAL = 0;
+      internal_UPDATE_NUM_BANK = reg_NUM_BANK_HEAD;
+
+      if (not _rob[internal_UPDATE_NUM_BANK].empty())
+	{
+          log_printf(TRACE,Commit_unit,FUNCTION,"  * UPDATE");
+          log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank : %d",internal_UPDATE_NUM_BANK);
+
+	  entry_t * entry = _rob [internal_UPDATE_NUM_BANK].front();
+
+          switch (entry->state)
+            {
+            case ROB_END_EXCEPTION_UPDATE :
+              {
+                internal_UPDATE_VAL = 1;
+                throw ERRORMORPHEO(FUNCTION,_("Moore : exception is not yet supported (Coming Soon).\n"));
+                break;
+              }
+            case ROB_END_LOAD_MISS_UPDATE :
+              {
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * ROB_END_LOAD_MISS_UPDATE");
+
+                internal_UPDATE_VAL = 1;
+
+                Tcontext_t front_end_id = entry->front_end_id;
+                Tcontext_t context_id   = entry->context_id  ;
+
+                log_printf(TRACE,Commit_unit,FUNCTION,"      * front_end_id : %d",front_end_id);
+                log_printf(TRACE,Commit_unit,FUNCTION,"      * context_id   : %d",context_id  );
+
+                if (_param->_have_port_front_end_id)
+                PORT_WRITE(out_UPDATE_FRONT_END_ID    ,front_end_id);
+                if (_param->_have_port_context_id)
+                PORT_WRITE(out_UPDATE_CONTEXT_ID      ,context_id  );
+                if (_param->_have_port_depth)
+                PORT_WRITE(out_UPDATE_DEPTH           ,entry->depth);
+                PORT_WRITE(out_UPDATE_TYPE            ,EVENT_TYPE_LOAD_MISS_SPECULATION);
+//                 PORT_WRITE(out_UPDATE_IS_DELAY_SLOT   ,reg_PC_CURRENT_IS_DS      [front_end_id][context_id]);
+//                 PORT_WRITE(out_UPDATE_ADDRESS         ,reg_PC_CURRENT            [front_end_id][context_id]);
+//                 PORT_WRITE(out_UPDATE_ADDRESS_EPCR_VAL,reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id]);
+//                 PORT_WRITE(out_UPDATE_ADDRESS_EPCR    ,reg_PC_NEXT               [front_end_id][context_id]);
+//                 PORT_WRITE(out_UPDATE_ADDRESS_EEAR_VAL,0);
+// //              PORT_WRITE(out_UPDATE_ADDRESS_EEAR    ,);
+
+                PORT_WRITE(out_UPDATE_IS_DELAY_SLOT   ,0);
+                PORT_WRITE(out_UPDATE_ADDRESS         ,reg_PC_NEXT [front_end_id][context_id]);
+                PORT_WRITE(out_UPDATE_ADDRESS_EPCR_VAL,0);
+//              PORT_WRITE(out_UPDATE_ADDRESS_EPCR    ,);
+                PORT_WRITE(out_UPDATE_ADDRESS_EEAR_VAL,0);
+//              PORT_WRITE(out_UPDATE_ADDRESS_EEAR    ,);
+
+                break;
+              }
+            default :
+              {
+//                 internal_UPDATE_VAL = 0; 
+              }
+            }
+	}
+      
+      PORT_WRITE(out_UPDATE_VAL, internal_UPDATE_VAL);
+
+      log_printf(TRACE,Commit_unit,FUNCTION,"  * UPDATE (end)");
     }
  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 105)
@@ -51,5 +51,5 @@
               reg_PC_CURRENT_IS_DS      [i][j] = 0;
               reg_PC_CURRENT_IS_DS_TAKE [i][j] = 0;
-//            reg_PC_NEXT               [i][j] = (0x100+4)>>2;
+              reg_PC_NEXT               [i][j] = (0x100+4)>>2;
 	    }
 
@@ -138,5 +138,5 @@
 		  entry->operation               = operation;
 		  entry->is_delay_slot           = PORT_READ(in_INSERT_IS_DELAY_SLOT         [x][y]);
-		  entry->address                 = PORT_READ(in_INSERT_ADDRESS               [x][y]);
+// 		  entry->address                 = PORT_READ(in_INSERT_ADDRESS               [x][y]);
 		  entry->exception               = exception;
 		  entry->exception_use           = PORT_READ(in_INSERT_EXCEPTION_USE         [x][y]);
@@ -162,4 +162,6 @@
 		  entry->num_reg_re_phy_old      = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD    [x][y]);
 		  entry->num_reg_re_phy_new      = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW    [x][y]);
+                  entry->no_sequence             = type == TYPE_BRANCH;
+		  entry->address_next            = PORT_READ(in_INSERT_ADDRESS_NEXT          [x][y]);
 
                   // Test if exception :
@@ -295,5 +297,5 @@
                       case ROB_MISS_WAIT_END   : {state = ROB_END_KO_SPECULATIVE; break;}
                         // Store OK, Load and other instruction
-                      case ROB_OTHER_WAIT_END  : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:((have_miss_speculation)?ROB_END_MISS:ROB_END_OK_SPECULATIVE); break;}
+                      case ROB_OTHER_WAIT_END  : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:((have_miss_speculation)?ROB_END_LOAD_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE); break;}
                       default :
                         {
@@ -304,9 +306,13 @@
 
 		    // update Re Order Buffer
-		    entry->state       = state;
-		    entry->exception   = exception;
-		    entry->flags       = PORT_READ(in_COMMIT_FLAGS       [x]);
-		    entry->no_sequence = PORT_READ(in_COMMIT_NO_SEQUENCE [x]);
-		    entry->data_commit = PORT_READ(in_COMMIT_ADDRESS     [x]);
+		    entry->state        = state;
+		    entry->exception    = exception;
+		    entry->flags        = PORT_READ(in_COMMIT_FLAGS       [x]);
+		    entry->no_sequence  = PORT_READ(in_COMMIT_NO_SEQUENCE [x]);
+                    // jalr, jr : address_dest is in register
+                    if ((entry->type      == TYPE_BRANCH) and
+                        (entry->operation == OPERATION_BRANCH_L_JALR) and
+                        (entry->read_rb))
+		    entry->address_next = PORT_READ(in_COMMIT_ADDRESS     [x]);
 		  }
 	      }
@@ -345,10 +351,24 @@
 	      Ttype_t    type         = entry->type        ;
 
-              if (state == ROB_END_BRANCH_MISS)
+              if ((state == ROB_END_OK         ) or // LOAD_MISS
+// 		  (state == ROB_END_KO         ) or 
+		  (state == ROB_END_BRANCH_MISS)//  or 
+// 		  (state == ROB_END_LOAD_MISS  ) or 
+// 		  (state == ROB_END_MISS       ) or 
+// 		  (state == ROB_END_EXCEPTION  )
+		  )
+                {
+//                reg_PC_PREVIOUS           [front_end_id][context_id] = reg_PC_CURRENT [front_end_id][context_id];
+                  reg_PC_CURRENT            [front_end_id][context_id] = reg_PC_NEXT    [front_end_id][context_id];
+                  reg_PC_CURRENT_IS_DS      [front_end_id][context_id] = entry->type == TYPE_BRANCH;
+                  reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id] = entry->no_sequence;
+                  reg_PC_NEXT               [front_end_id][context_id] = (entry->no_sequence)?(entry->address_next):(reg_PC_CURRENT [front_end_id][context_id]+1);
+                }
+
+              if ((state == ROB_END_BRANCH_MISS) or
+                  (state == ROB_END_LOAD_MISS))
                 {
                   reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
                   reg_EVENT_FLUSH [front_end_id][context_id] = true;
-
-                  // TODO Compute address !!!!!!!!!!!
                 }
 	      
@@ -412,7 +432,33 @@
 	// =====[ UPDATE ]====================================================
 	// ===================================================================
-        {
-          // Not yet implemented
-        }
+        if (internal_UPDATE_VAL and PORT_READ(in_UPDATE_ACK))
+          {
+            log_printf(TRACE,Commit_unit,FUNCTION,"  * UPDATE");
+
+            entry_t * entry = _rob [internal_UPDATE_NUM_BANK].front();
+
+            switch (entry->state)
+              {
+//               case ROB_END_EXCEPTION_UPDATE :
+//                 {
+//                   entry->state = ROB_END_KO;
+//                   throw ERRORMORPHEO(FUNCTION,_("Moore : exception is not yet supported (Coming Soon).\n"));
+//                   break;
+//                 }
+              case ROB_END_LOAD_MISS_UPDATE :
+                {
+                  log_printf(TRACE,Commit_unit,FUNCTION,"    * ROB_END_LOAD_MISS_UPDATE");
+
+                  entry->state = ROB_END_LOAD_MISS;
+                  break;
+                }
+              default :
+                {
+                  throw ERRORMORPHEO(FUNCTION,_("Update : invalid state.\n"));
+                  break;
+                }
+              }
+
+          }
 
 	// ===================================================================
@@ -438,6 +484,6 @@
 
               Tdepth_t     depth_min    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[front_end_id][context_id]):0;
-//               Tdepth_t     depth_max    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0;
-//               Tcontrol_t   depth_full   = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]);
+              Tdepth_t     depth_max    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0;
+              Tcontrol_t   depth_full   = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]);
               
               // is a valid instruction ?
@@ -455,18 +501,21 @@
               // ....... max ...X... min ....... KO
               
-//               Tcontrol_t   is_valid      = ((depth == depth_min) or 
-//                                             depth_full or
-//                                             ((depth_min <= depth_max)?
-//                                              ((depth >= depth_min) and (depth <=depth_max)):
-//                                              ((depth >= depth_min) or  (depth <=depth_max))));
-
               bool         flush         = reg_EVENT_FLUSH [front_end_id][context_id];
-              Tcontrol_t   is_valid      = ((depth == depth_min) and not flush);
+
+              Tcontrol_t   is_valid      = (((depth == depth_min) or 
+                                             depth_full or
+                                             ((depth_min <= depth_max)?
+                                              ((depth >= depth_min) and (depth <=depth_max)):
+                                              ((depth >= depth_min) or  (depth <=depth_max))))
+                                             and not flush);
+
+//            Tcontrol_t   is_valid      = ((depth == depth_min) and not flush);
 
               log_printf(TRACE,Commit_unit,FUNCTION,"  * HEAD              [%d]",i);
-              log_printf(TRACE,Commit_unit,FUNCTION,"    * is_valid        : %d",is_valid);
+              log_printf(TRACE,Commit_unit,FUNCTION,"    * is_valid        : %d ((depth == depth_min) and not flush)",is_valid);
               log_printf(TRACE,Commit_unit,FUNCTION,"    * depth           : %d",depth    );
               log_printf(TRACE,Commit_unit,FUNCTION,"    * depth_min       : %d",depth_min);
-//               log_printf(TRACE,Commit_unit,FUNCTION,"    * depth_max       : %d",depth_max);
+              log_printf(TRACE,Commit_unit,FUNCTION,"    * depth_max       : %d",depth_max);
+              log_printf(TRACE,Commit_unit,FUNCTION,"    * depth_full      : %d",depth_full);
               log_printf(TRACE,Commit_unit,FUNCTION,"    * flush           : %d",flush);
 
@@ -481,4 +530,5 @@
 		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS     ; break;}
                     case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS     ; break;}
+                    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS     ; break;}
 		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO; break;}
 		  //case ROB_STORE_WAIT_HEAD_KO          : {state = ; break;}
@@ -498,4 +548,7 @@
 		    case ROB_END_KO                      :
                     case ROB_END_BRANCH_MISS             :
+                    case ROB_END_LOAD_MISS_UPDATE        :
+                    case ROB_END_LOAD_MISS               :
+		    case ROB_END_EXCEPTION_UPDATE        :
 		    case ROB_END_EXCEPTION               :
 		    default                              : 
@@ -517,4 +570,5 @@
 		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_KO                 ; break;}
 		    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_BRANCH_MISS        ; break;}
+		    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_LOAD_MISS_UPDATE   ; break;}
 		    default : {break;}
 		  }
@@ -528,6 +582,6 @@
 		  switch (state)
 		    {
-		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK; break;}
-		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION; break;}
+		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK;        break;}
+		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION_UPDATE; break;}
 		    default : {break;}
 		    }
@@ -549,6 +603,9 @@
       for (uint32_t j=0; j<_param->_nb_context [i]; j++)
         {
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d] num_inst_all : %d, num_inst_mem : %d",i,j,reg_NB_INST_COMMIT_ALL[i][j],reg_NB_INST_COMMIT_MEM[i][j]);
           log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d] state        : %s",i,j,toString(reg_EVENT_STATE [i][j]).c_str());
+          log_printf(TRACE,Commit_unit,FUNCTION,"    * num_inst_all : %d",reg_NB_INST_COMMIT_ALL[i][j]);
+          log_printf(TRACE,Commit_unit,FUNCTION,"    * num_inst_mem : %d",reg_NB_INST_COMMIT_MEM[i][j]);
+          log_printf(TRACE,Commit_unit,FUNCTION,"    * PC_CURRENT   : %.8x - %d %d",reg_PC_CURRENT [i][j], reg_PC_CURRENT_IS_DS [i][j], reg_PC_CURRENT_IS_DS_TAKE [i][j]);
+          log_printf(TRACE,Commit_unit,FUNCTION,"    * PC_NEXT      : %.8x",reg_PC_NEXT [i][j]);
         }
 	
@@ -567,5 +624,5 @@
 	     it++)
 	  {
-            log_printf(TRACE,Commit_unit,FUNCTION,"      [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.8x (%.8x) %.1d, %.1d %.4d, %.1d %.4d, %s - %d",
+            log_printf(TRACE,Commit_unit,FUNCTION,"      [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s - %d",
                        x,
                        (*it)->front_end_id            ,
@@ -575,6 +632,6 @@
                        (*it)->type                    ,
                        (*it)->operation               ,
-                       (*it)->address                 ,
-                       (*it)->address << 2            ,
+//                     (*it)->address                 ,
+//                     (*it)->address << 2            ,
                        (*it)->is_delay_slot           ,
                        (*it)->use_store_queue         ,
@@ -603,10 +660,11 @@
                        (*it)->num_reg_re_phy_new      );
             
-            log_printf(TRACE,Commit_unit,FUNCTION,"             %.2d %.2d %.1d %.1d %.8x",
+            log_printf(TRACE,Commit_unit,FUNCTION,"             %.2d %.2d %.1d %.1d %.8x (%.8x)",
                        (*it)->exception_use ,
                        (*it)->exception     ,
                        (*it)->flags         ,
                        (*it)->no_sequence   ,
-                       (*it)->data_commit   
+                       (*it)->address_next  ,
+                       (*it)->address_next<<2
                        );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 105)
@@ -59,5 +59,5 @@
   ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE    ," in_RENAME_IN_NO_EXECUTE    ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ," in_RENAME_IN_IS_DELAY_SLOT ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS       ," in_RENAME_IN_ADDRESS       ",Taddress_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT  ," in_RENAME_IN_ADDRESS_NEXT  ",Taddress_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT  ," in_RENAME_IN_HAS_IMMEDIAT  ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT      ," in_RENAME_IN_IMMEDIAT      ",Tgeneral_data_t   ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -84,5 +84,5 @@
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_NO_EXECUTE   ,"out_RENAME_OUT_NO_EXECUTE   ",Tcontrol_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT,"out_RENAME_OUT_IS_DELAY_SLOT",Tcontrol_t        ,_param->_nb_inst_rename);
-  ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS      ,"out_RENAME_OUT_ADDRESS      ",Taddress_t        ,_param->_nb_inst_rename);
+  ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS_NEXT ,"out_RENAME_OUT_ADDRESS_NEXT ",Taddress_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT ,"out_RENAME_OUT_HAS_IMMEDIAT ",Tcontrol_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_IMMEDIAT     ,"out_RENAME_OUT_IMMEDIAT     ",Tgeneral_data_t   ,_param->_nb_inst_rename);
@@ -121,5 +121,5 @@
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NO_EXECUTE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS_NEXT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_HAS_IMMEDIAT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -149,5 +149,5 @@
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NO_EXECUTE   ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_IS_DELAY_SLOT,_param->_nb_inst_rename);
-  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS      ,_param->_nb_inst_rename);
+  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS_NEXT ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_HAS_IMMEDIAT ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_IMMEDIAT     ,_param->_nb_inst_rename);
@@ -213,5 +213,5 @@
 	    in_RENAME_IN_NO_EXECUTE   [i][j]->write(rand()%2);
 	    in_RENAME_IN_IS_DELAY_SLOT[i][j]->write(rand()%2);
-	    in_RENAME_IN_ADDRESS      [i][j]->write(address++                                                             );
+	    in_RENAME_IN_ADDRESS_NEXT [i][j]->write(address++                                                             );
 	    in_RENAME_IN_HAS_IMMEDIAT [i][j]->write(range<Tcontrol_t        >(rand(),1                                   ));
 	    in_RENAME_IN_IMMEDIAT     [i][j]->write(range<Tgeneral_data_t   >(rand(),_param->_size_general_data          ));
@@ -259,5 +259,5 @@
 
 	      // Test
-	      address = out_RENAME_OUT_ADDRESS [i]->read();
+	      address = out_RENAME_OUT_ADDRESS_NEXT [i]->read();
 
 	      TEST(bool, address<nb_rename_in, true);
@@ -269,5 +269,5 @@
 	      for (uint32_t x=0; x<_param->_nb_front_end; x++)
 		for (uint32_t y=0; y<_param->_nb_inst_decod[x]; y++)
-		  if (in_RENAME_IN_ADDRESS [x][y]->read() == address)
+		  if (in_RENAME_IN_ADDRESS_NEXT [x][y]->read() == address)
 		    {
 		      find = true;
@@ -329,5 +329,5 @@
   delete []  in_RENAME_IN_NO_EXECUTE    ;
   delete []  in_RENAME_IN_IS_DELAY_SLOT ;
-  delete []  in_RENAME_IN_ADDRESS       ;
+  delete []  in_RENAME_IN_ADDRESS_NEXT  ;
   delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
   delete []  in_RENAME_IN_IMMEDIAT      ;
@@ -354,5 +354,5 @@
   delete [] out_RENAME_OUT_NO_EXECUTE   ;
   delete [] out_RENAME_OUT_IS_DELAY_SLOT;
-  delete [] out_RENAME_OUT_ADDRESS      ;
+  delete [] out_RENAME_OUT_ADDRESS_NEXT ;
   delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
   delete [] out_RENAME_OUT_IMMEDIAT     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 105)
@@ -76,5 +76,5 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE    ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod]
-  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS       ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS_NEXT  ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT  ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IN_IMMEDIAT      ;//[nb_front_end][nb_inst_decod]
@@ -102,5 +102,5 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_NO_EXECUTE   ;//[nb_inst_rename]
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename]
-  public    : SC_OUT(Taddress_t        )   ** out_RENAME_OUT_ADDRESS      ;//[nb_inst_rename]
+  public    : SC_OUT(Taddress_t        )   ** out_RENAME_OUT_ADDRESS_NEXT ;//[nb_inst_rename]
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_HAS_IMMEDIAT ;//[nb_inst_rename]
   public    : SC_OUT(Tgeneral_data_t   )   ** out_RENAME_OUT_IMMEDIAT     ;//[nb_inst_rename]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 105)
@@ -97,5 +97,5 @@
 			<< (*(in_RENAME_IN_NO_EXECUTE    [i][j]))
 			<< (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]))
-			<< (*(in_RENAME_IN_ADDRESS       [i][j]))
+			<< (*(in_RENAME_IN_ADDRESS_NEXT  [i][j]))
 			<< (*(in_RENAME_IN_HAS_IMMEDIAT  [i][j]))
 			<< (*(in_RENAME_IN_IMMEDIAT      [i][j]))
@@ -163,6 +163,6 @@
 		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]));
-		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_VAL           [i][j]));
-		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_ADDRESS       [i][j]));
+		  (*(out_RENAME_OUT_ADDRESS_NEXT  [x])) (*(in_RENAME_IN_VAL           [i][j]));
+		  (*(out_RENAME_OUT_ADDRESS_NEXT  [x])) (*(in_RENAME_IN_ADDRESS_NEXT  [i][j]));
 		  (*(out_RENAME_OUT_HAS_IMMEDIAT  [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_HAS_IMMEDIAT  [x])) (*(in_RENAME_IN_HAS_IMMEDIAT  [i][j]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 105)
@@ -69,5 +69,5 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -99,5 +99,5 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   );
-      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   );
+      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 105)
@@ -40,5 +40,5 @@
 	delete []  in_RENAME_IN_NO_EXECUTE    ;
 	delete []  in_RENAME_IN_IS_DELAY_SLOT ;
-	delete []  in_RENAME_IN_ADDRESS       ;
+	delete []  in_RENAME_IN_ADDRESS_NEXT  ;
 	delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
 	delete []  in_RENAME_IN_IMMEDIAT      ;
@@ -66,5 +66,5 @@
 	delete [] out_RENAME_OUT_TYPE         ;
 	delete [] out_RENAME_OUT_OPERATION    ;
-	delete [] out_RENAME_OUT_ADDRESS      ;
+	delete [] out_RENAME_OUT_ADDRESS_NEXT ;
 	delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
 	delete [] out_RENAME_OUT_IMMEDIAT     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 105)
@@ -75,5 +75,5 @@
 		PORT_WRITE(out_RENAME_OUT_NO_EXECUTE   [i],PORT_READ(in_RENAME_IN_NO_EXECUTE    [x][y]));
 		PORT_WRITE(out_RENAME_OUT_IS_DELAY_SLOT[i],PORT_READ(in_RENAME_IN_IS_DELAY_SLOT [x][y]));
-		PORT_WRITE(out_RENAME_OUT_ADDRESS      [i],PORT_READ(in_RENAME_IN_ADDRESS       [x][y]));
+		PORT_WRITE(out_RENAME_OUT_ADDRESS_NEXT [i],PORT_READ(in_RENAME_IN_ADDRESS_NEXT  [x][y]));
 		PORT_WRITE(out_RENAME_OUT_HAS_IMMEDIAT [i],PORT_READ(in_RENAME_IN_HAS_IMMEDIAT  [x][y]));
 		PORT_WRITE(out_RENAME_OUT_IMMEDIAT     [i],PORT_READ(in_RENAME_IN_IMMEDIAT      [x][y]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 105)
@@ -57,5 +57,5 @@
   ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ," in_RENAME_IN_NO_EXECUTE        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ," in_RENAME_IN_IS_DELAY_SLOT     ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ," in_RENAME_IN_ADDRESS           ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ," in_RENAME_IN_ADDRESS_NEXT      ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ," in_RENAME_IN_HAS_IMMEDIAT      ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT          ," in_RENAME_IN_IMMEDIAT          ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -81,5 +81,5 @@
   ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,"out_INSERT_NO_EXECUTE           ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,"out_INSERT_IS_DELAY_SLOT        ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS              ,"out_INSERT_ADDRESS              ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT         ,"out_INSERT_ADDRESS_NEXT         ",Tgeneral_data_t   ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,"out_INSERT_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_IMMEDIAT             ,"out_INSERT_IMMEDIAT             ",Tgeneral_data_t   ,_param->_nb_inst_insert);
@@ -155,5 +155,5 @@
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
-  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -183,5 +183,5 @@
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert);
@@ -297,5 +297,5 @@
   DELETE2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
-  DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -322,5 +322,5 @@
   DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 105)
@@ -78,5 +78,5 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE        ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT     ;//[nb_front_end][nb_inst_decod]
-  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS           ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS_NEXT      ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT      ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IN_IMMEDIAT          ;//[nb_front_end][nb_inst_decod]
@@ -104,5 +104,5 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_NO_EXECUTE           ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_IS_DELAY_SLOT        ;//[nb_inst_insert]
-  public    : SC_OUT(Taddress_t        )   ** out_INSERT_ADDRESS              ;//[nb_inst_insert]
+  public    : SC_OUT(Taddress_t        )   ** out_INSERT_ADDRESS_NEXT         ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_HAS_IMMEDIAT         ;//[nb_inst_insert]
   public    : SC_OUT(Tgeneral_data_t   )   ** out_INSERT_IMMEDIAT             ;//[nb_inst_insert]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 105)
@@ -69,5 +69,5 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IMMEDIAT      ,"immediat"     ,Tgeneral_data_t   ,_param->_size_general_data          , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -99,5 +99,5 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE           ,"no_execute"           ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_INSERT_IS_DELAY_SLOT        ,"is_delay_slot"        ,Tcontrol_t        ,1                                   );
-      ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS              ,"address"              ,Taddress_t        ,_param->_size_instruction_address   );
+      ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS_NEXT         ,"address_next"         ,Taddress_t        ,_param->_size_instruction_address   );
       ALLOC1_SIGNAL_OUT(out_INSERT_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data          );
@@ -301,6 +301,6 @@
 	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT",
 		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT");
-	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      ,
-		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      );
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
 	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAS_IMMEDIAT" ,
 		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAS_IMMEDIAT" );
@@ -349,6 +349,6 @@
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH"       ,
 		              dest,"out_INSERT_"    +toString(i)+"_DEPTH"       );
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS"     ,
-		              dest,"out_INSERT_"    +toString(i)+"_ADDRESS"     );
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS_NEXT",
+		              dest,"out_INSERT_"    +toString(i)+"_ADDRESS_NEXT");
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_HAS_IMMEDIAT",
 		              dest,"out_INSERT_"    +toString(i)+"_HAS_IMMEDIAT");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 105)
@@ -37,5 +37,5 @@
         DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
         DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
-        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data          );
+        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address   );
         DELETE2_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
         DELETE2_SIGNAL( in_RENAME_IN_IMMEDIAT          ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data          );
@@ -62,5 +62,5 @@
         DELETE1_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert,1                                   );
         DELETE1_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert,1                                   );
-        DELETE1_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert,_param->_size_instruction_address   );
         DELETE1_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert,1                                   );
         DELETE1_SIGNAL(out_INSERT_IMMEDIAT             ,_param->_nb_inst_insert,_param->_size_general_data          );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 105)
@@ -57,5 +57,5 @@
   ALLOC2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ," in_RENAME_NO_EXECUTE                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ," in_RENAME_IS_DELAY_SLOT             ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
-  ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS                   ," in_RENAME_ADDRESS                   ",Taddress_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS_NEXT              ," in_RENAME_ADDRESS_NEXT              ",Taddress_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ," in_RENAME_HAS_IMMEDIAT              ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IMMEDIAT                  ," in_RENAME_IMMEDIAT                  ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -143,4 +143,5 @@
   ALLOC_SC_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"out_COMMIT_EVENT_IS_DELAY_SLOT       ",Tcontrol_t        );
   ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,"out_COMMIT_EVENT_ADDRESS             ",Taddress_t        );
+  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ",Tcontrol_t        );
   ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,"out_COMMIT_EVENT_ADDRESS_EPCR        ",Taddress_t        );
   ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ",Tcontrol_t        );
@@ -193,5 +194,5 @@
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
-  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -292,4 +293,5 @@
   INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_IS_DELAY_SLOT       );
   INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS             );
+  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
   INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR        );
   INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
@@ -376,5 +378,5 @@
   DELETE2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
-  DELETE2_SC_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL( in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -462,4 +464,5 @@
   DELETE_SC_SIGNAL  (out_COMMIT_EVENT_IS_DELAY_SLOT       );
   DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS             );
+  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
   DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EPCR        );
   DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 105)
@@ -77,5 +77,5 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_NO_EXECUTE                ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IS_DELAY_SLOT             ;//[nb_front_end][nb_inst_decod]
-  public    : SC_IN (Taddress_t        )  ***  in_RENAME_ADDRESS                   ;//[nb_front_end][nb_inst_decod]
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_ADDRESS_NEXT              ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_HAS_IMMEDIAT              ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tgeneral_data_t   )  ***  in_RENAME_IMMEDIAT                  ;//[nb_front_end][nb_inst_decod]
@@ -169,4 +169,5 @@
   public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_IS_DELAY_SLOT       ;
   public    : SC_OUT(Taddress_t        )    * out_COMMIT_EVENT_ADDRESS             ;
+  public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ;
   public    : SC_OUT(Taddress_t        )    * out_COMMIT_EVENT_ADDRESS_EPCR        ;
   public    : SC_OUT(Tcontrol_t        )    * out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 105)
@@ -66,5 +66,5 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE                ,"NO_EXECUTE"                ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT             ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
-      _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS                   ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS_NEXT              ,"ADDRESS_NEXT"              ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT              ,"HAS_IMMEDIAT"              ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT                  ,"IMMEDIAT"                  ,Tgeneral_data_t   ,_param->_size_general_data           ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -182,4 +182,5 @@
       ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    );
       ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS             ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"ADDRESS_EPCR_VAL"          ,Tcontrol_t        ,1                                    );
       ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EPCR        ,"ADDRESS_EPCR"              ,Taddress_t        ,_param->_size_instruction_address    );
       ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"ADDRESS_EEAR_VAL"          ,Tcontrol_t        ,1                                    );
@@ -412,6 +413,6 @@
                     PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
                                         dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
-                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS"      ,
-                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_ADDRESS"      );
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS_NEXT" ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_ADDRESS_NEXT" );
                     PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAS_IMMEDIAT" ,
                                         dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_HAS_IMMEDIAT" );
@@ -476,6 +477,6 @@
             COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_IS_DELAY_SLOT" ,
                                      dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
-            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_ADDRESS"       ,
-                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS"       );
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_ADDRESS_NEXT"  ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT"  );
             COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_EXCEPTION_USE" ,
                                      dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE" );
@@ -754,5 +755,5 @@
 
             //    in_INSERT_DEPTH          - component_rename_unit
-            //    in_INSERT_ADDRESS        - component_rename_unit
+            //    in_INSERT_ADDRESS_NEXT   - component_rename_unit
             //    in_INSERT_EXCEPTION_USE  - component_rename_unit
             //    in_INSERT_EXCEPTION      - component_rename_unit
@@ -946,4 +947,5 @@
         PORT_MAP(_component,src ,"out_UPDATE_IS_DELAY_SLOT"   ,dest,"out_COMMIT_EVENT_IS_DELAY_SLOT"   );
         PORT_MAP(_component,src ,"out_UPDATE_ADDRESS"         ,dest,"out_COMMIT_EVENT_ADDRESS"         );
+        PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL");
         PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR"    ,dest,"out_COMMIT_EVENT_ADDRESS_EPCR"    );
         PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 104)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 105)
@@ -36,5 +36,5 @@
         DELETE2_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
         DELETE2_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
-        DELETE2_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_instruction_address    );
         DELETE2_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
         DELETE2_SIGNAL( in_RENAME_IMMEDIAT                  ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_general_data           );
@@ -84,5 +84,5 @@
         DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception              );
         DELETE2_SIGNAL( in_EXECUTE_LOOP_NO_SEQUENCE         ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1                                    );
-        DELETE2_SIGNAL( in_EXECUTE_LOOP_ADDRESS             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data           );
+        DELETE2_SIGNAL( in_EXECUTE_LOOP_ADDRESS             ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_instruction_address    );
         DELETE2_SIGNAL( in_EXECUTE_LOOP_DATA                ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data           );
         
@@ -110,5 +110,5 @@
         DELETE1_SIGNAL(out_BRANCH_COMPLETE_CONTEXT_ID       ,_param->_nb_inst_branch_complete,_param->_size_context_id  );
         DELETE1_SIGNAL(out_BRANCH_COMPLETE_DEPTH            ,_param->_nb_inst_branch_complete,_param->_size_depth       );
-        DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_branch_complete,_param->_size_general_data);
+        DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_branch_complete,_param->_size_instruction_address);
         DELETE1_SIGNAL(out_BRANCH_COMPLETE_NO_SEQUENCE      ,_param->_nb_inst_branch_complete,1                         );
         DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_branch_complete,1                         );
@@ -122,4 +122,5 @@
         DELETE_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,1                                    );
         DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,_param->_size_general_data           );
+        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,1                                    );
         DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,_param->_size_general_data           );
         DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,1                                    );
@@ -128,6 +129,6 @@
         DELETE2_SIGNAL( in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
         DELETE2_SIGNAL(out_EVENT_ACK                        ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
-        DELETE2_SIGNAL( in_EVENT_ADDRESS                    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_general_data           );
-        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_general_data           ); 
+        DELETE2_SIGNAL( in_EVENT_ADDRESS                    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_instruction_address);
+        DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_instruction_address); 
         DELETE2_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL           ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
         DELETE2_SIGNAL( in_EVENT_IS_DS_TAKE                 ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
