Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp	(revision 107)
@@ -267,5 +267,5 @@
 	  LABEL("  * address wait     : %.8x",a_addr);
 
-	  TEST(Tgeneral_address_t,out_ADDRESS_INSTRUCTION_ADDRESS        ->read(),a_addr);
+	  TEST(Tgeneral_address_t,out_ADDRESS_INSTRUCTION_ADDRESS        ->read(),a_addr-a_addr%_param->_nb_instruction);
 	  for (uint32_t i=0; i<_param->_nb_instruction; i++)
 	  TEST(Tcontrol_t        ,out_ADDRESS_INSTRUCTION_ENABLE     [i] ->read(),a_enable[i]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp	(revision 107)
@@ -30,6 +30,7 @@
     internal_ADDRESS_VAL = reg_PC_ACCESS_VAL;
 
-    PORT_WRITE(out_ADDRESS_VAL                        ,internal_ADDRESS_VAL                      );
-    PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS        ,reg_PC_ACCESS                            );
+    PORT_WRITE(out_ADDRESS_VAL                        ,internal_ADDRESS_VAL                     );
+    // Align pc on instruction packet address.
+    PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS        ,reg_PC_ACCESS - (reg_PC_ACCESS%_param->_nb_instruction));
     if (_param->_have_port_inst_ifetch_ptr)
     PORT_WRITE(out_ADDRESS_INST_IFETCH_PTR            ,reg_PC_ACCESS_INST_IFETCH_PTR            );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp	(revision 101)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp	(revision 107)
@@ -35,7 +35,8 @@
         reg_PC_NEXT          = 0x100>>2;
         reg_PC_NEXT_IS_DS_TAKE                  = 0;
-        reg_PC_NEXT_INSTRUCTION_ENABLE [0]      = 1;
-        for (uint32_t i=1; i<_param->_nb_instruction; i++)
+        uint32_t index = reg_PC_NEXT % _param->_nb_instruction;
+        for (uint32_t i=0; i<_param->_nb_instruction; i++)
         reg_PC_NEXT_INSTRUCTION_ENABLE [i]      = 0;
+        reg_PC_NEXT_INSTRUCTION_ENABLE [index]  = 1;
         reg_PC_NEXT_INST_IFETCH_PTR             = 0;
         reg_PC_NEXT_BRANCH_STATE                = 0;
@@ -182,7 +183,9 @@
 // 	    reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0;
 	    
-	    reg_PC_NEXT_INSTRUCTION_ENABLE [0]      = 1; // only the instruction at the event address is valid, because we have no information on the branch presence in the instruction bundle.
-	    for (uint32_t i=1; i<_param->_nb_instruction; i++)
-	      reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0;
+            // only the instruction at the event address is valid, because we have no information on the branch presence in the instruction bundle.
+            uint32_t index = reg_PC_NEXT % _param->_nb_instruction;
+            for (uint32_t i=0; i<_param->_nb_instruction; i++)
+            reg_PC_NEXT_INSTRUCTION_ENABLE [i]      = 0;
+            reg_PC_NEXT_INSTRUCTION_ENABLE [index]  = 1;
 
             reg_PC_NEXT_NEXT_VAL                    = PORT_READ(in_EVENT_ADDRESS_NEXT_VAL);
