Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 107) @@ -67,5 +67,5 @@ (context_event_val == false)) // Have not a context_event (spr_access, exception, ...) { - predict_val [i] = false; +// predict_val [i] = false; Tcontext_t x = it->grp; @@ -106,4 +106,6 @@ instruction_decod (_decod_instruction, _decod_param[x]); + + log_printf(TRACE,Decod,FUNCTION," * address_next : %.8x (%.8x)",_decod_instruction->_address_next,(_decod_instruction->_address_next<<2)); } else @@ -167,9 +169,10 @@ { log_printf(TRACE,Decod,FUNCTION," * type is branch"); + log_printf(TRACE,Decod,FUNCTION," * predict_val : %d",ifetch_ack [x][y]); log_printf(TRACE,Decod,FUNCTION," * predict_ack : %d",PORT_READ(in_PREDICT_ACK [i])); log_printf(TRACE,Decod,FUNCTION," * address src : %.8x (%.8x)",_decod_instruction->_address ,_decod_instruction->_address <<2); log_printf(TRACE,Decod,FUNCTION," * address dest : %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2); - + predict_val [i] = ifetch_ack [x][y] // and decod_val [i] ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Parameters_print.cpp (revision 107) @@ -29,5 +29,4 @@ xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); - xml.singleton_begin("nb_branch_speculated "); xml.attribut("value",toString(_nb_branch_speculated )); xml.singleton_end(); // xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); xml.singleton_begin("nb_context_select "); xml.attribut("value",toString(_nb_context_select )); xml.singleton_end(); @@ -43,4 +42,5 @@ xml. balise_open_end(); xml. singleton_begin("nb_inst_fetch "); xml.attribut("value",toString(_nb_inst_fetch [i])); xml.singleton_end(); + xml. singleton_begin("nb_branch_speculated "); xml.attribut("value",toString(_nb_branch_speculated [i])); xml.singleton_end(); xml. balise_close(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp (revision 107) @@ -267,5 +267,5 @@ LABEL(" * address wait : %.8x",a_addr); - TEST(Tgeneral_address_t,out_ADDRESS_INSTRUCTION_ADDRESS ->read(),a_addr); + TEST(Tgeneral_address_t,out_ADDRESS_INSTRUCTION_ADDRESS ->read(),a_addr-a_addr%_param->_nb_instruction); for (uint32_t i=0; i<_param->_nb_instruction; i++) TEST(Tcontrol_t ,out_ADDRESS_INSTRUCTION_ENABLE [i] ->read(),a_enable[i]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp (revision 107) @@ -30,6 +30,7 @@ internal_ADDRESS_VAL = reg_PC_ACCESS_VAL; - PORT_WRITE(out_ADDRESS_VAL ,internal_ADDRESS_VAL ); - PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS ,reg_PC_ACCESS ); + PORT_WRITE(out_ADDRESS_VAL ,internal_ADDRESS_VAL ); + // Align pc on instruction packet address. + PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS ,reg_PC_ACCESS - (reg_PC_ACCESS%_param->_nb_instruction)); if (_param->_have_port_inst_ifetch_ptr) PORT_WRITE(out_ADDRESS_INST_IFETCH_PTR ,reg_PC_ACCESS_INST_IFETCH_PTR ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 107) @@ -35,7 +35,8 @@ reg_PC_NEXT = 0x100>>2; reg_PC_NEXT_IS_DS_TAKE = 0; - reg_PC_NEXT_INSTRUCTION_ENABLE [0] = 1; - for (uint32_t i=1; i<_param->_nb_instruction; i++) + uint32_t index = reg_PC_NEXT % _param->_nb_instruction; + for (uint32_t i=0; i<_param->_nb_instruction; i++) reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0; + reg_PC_NEXT_INSTRUCTION_ENABLE [index] = 1; reg_PC_NEXT_INST_IFETCH_PTR = 0; reg_PC_NEXT_BRANCH_STATE = 0; @@ -182,7 +183,9 @@ // reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0; - reg_PC_NEXT_INSTRUCTION_ENABLE [0] = 1; // only the instruction at the event address is valid, because we have no information on the branch presence in the instruction bundle. - for (uint32_t i=1; i<_param->_nb_instruction; i++) - reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0; + // only the instruction at the event address is valid, because we have no information on the branch presence in the instruction bundle. + uint32_t index = reg_PC_NEXT % _param->_nb_instruction; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0; + reg_PC_NEXT_INSTRUCTION_ENABLE [index] = 1; reg_PC_NEXT_NEXT_VAL = PORT_READ(in_EVENT_ADDRESS_NEXT_VAL); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_transition.cpp (revision 107) @@ -92,7 +92,8 @@ // detect new branch !!! insert in branch target buffer - log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * hit : %d",hit); - log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * num_bank : %d",num_bank ); - log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * num_entry : %d",num_entry); + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * hit : %d",hit); + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * miss_pred : %d",miss_pred); + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * num_bank : %d",num_bank ); + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * num_entry : %d",num_entry); Tcounter_t accurate_new = 0; @@ -106,12 +107,18 @@ // * in all case : is valid in this step Tcounter_t accurate_old = reg_BTB[num_bank][num_entry]._accurate; + + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * accurate_old : %d",accurate_old); + // hit : increase accurate // miss : decrease accurate - Tcounter_t accurate_new = (miss_pred)?((accurate_old>0)?(accurate_old-1):accurate_old):((accurate_old<_param->_accurate_max)?(accurate_old+1):accurate_old); + accurate_new = (miss_pred)?((accurate_old>0)?(accurate_old-1):accurate_old):((accurate_old<_param->_accurate_max)?(accurate_old+1):accurate_old); // test if accurate go to the threshold if ((accurate_old >= _param->_accurate_limit) and (accurate_new < _param->_accurate_limit)) - accurate_new = 0; + { + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * decrease downto the accurate_limid (%d)",_param->_accurate_limit); + accurate_new = 0; + } //reg_BTB[num_bank][num_entry]._val : no update because hit @@ -135,5 +142,5 @@ // reg_BTB[num_bank][num_entry]._condition = PORT_READ(in_UPDATE_CONDITION [i]); // reg_BTB[num_bank][num_entry]._last_take = PORT_READ(in_UPDATE_LAST_TAKE [i]); - reg_BTB[num_bank][num_entry]._address_dest_val = 0; +// reg_BTB[num_bank][num_entry]._address_dest_val = 0; } @@ -144,4 +151,7 @@ // reg_BTB[num_bank][num_entry]._address_dest = PORT_READ(in_UPDATE_ADDRESS_DEST [i]); // } + + log_printf(TRACE,Branch_Target_Buffer_Register,FUNCTION," * accurate_new : %d",accurate_new); + reg_BTB[num_bank][num_entry]._val = 1; reg_BTB[num_bank][num_entry]._context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue.cpp (revision 107) @@ -92,5 +92,5 @@ PORT_WRITE(out_PREDICT_ACK [i], 1); - // constant direction : never / always + // constant direction : never / always switch (_param->_predictor_scheme) { @@ -166,42 +166,42 @@ # ifdef SYSTEMCASS_SPECIFIC - // List dependency information - for (uint32_t i=0; i<_param->_nb_inst_predict; i++) - { - - switch (_param->_predictor_scheme) - { - case PREDICTOR_STATIC : - { - (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_STATIC [i])); - - break; - } - case PREDICTOR_LAST_TAKE : - { - (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_LAST_TAKE [i])); - - break; - } - case PREDICTOR_COUNTER : - case PREDICTOR_LOCAL : - case PREDICTOR_GLOBAL : - case PREDICTOR_META : - case PREDICTOR_CUSTOM : - { - (*(out_PREDICT_ACK [i])) (*(in_PREDICT_PREDICTOR_ACK [i])); - (*(out_PREDICT_HISTORY [i])) (*(in_PREDICT_PREDICTOR_HISTORY [i])); - (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_PREDICTOR_DIRECTION [i])); - (*(out_PREDICT_PREDICTOR_VAL [i])) (*(in_PREDICT_VAL [i])); - (*(out_PREDICT_PREDICTOR_ADDRESS_SRC [i])) (*(in_PREDICT_ADDRESS_SRC [i])); - - break; - } - default : - { - break; - } - } - } +// // List dependency information +// for (uint32_t i=0; i<_param->_nb_inst_predict; i++) +// { + +// switch (_param->_predictor_scheme) +// { +// case PREDICTOR_STATIC : +// { +// (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_STATIC [i])); + +// break; +// } +// case PREDICTOR_LAST_TAKE : +// { +// (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_LAST_TAKE [i])); + +// break; +// } +// case PREDICTOR_COUNTER : +// case PREDICTOR_LOCAL : +// case PREDICTOR_GLOBAL : +// case PREDICTOR_META : +// case PREDICTOR_CUSTOM : +// { +// (*(out_PREDICT_ACK [i])) (*(in_PREDICT_PREDICTOR_ACK [i])); +// (*(out_PREDICT_HISTORY [i])) (*(in_PREDICT_PREDICTOR_HISTORY [i])); +// (*(out_PREDICT_DIRECTION [i])) (*(in_PREDICT_PREDICTOR_DIRECTION [i])); +// (*(out_PREDICT_PREDICTOR_VAL [i])) (*(in_PREDICT_VAL [i])); +// (*(out_PREDICT_PREDICTOR_ADDRESS_SRC [i])) (*(in_PREDICT_ADDRESS_SRC [i])); + +// break; +// } +// default : +// { +// break; +// } +// } +// } # endif } @@ -222,13 +222,13 @@ # ifdef SYSTEMCASS_SPECIFIC - // List dependency information - for (uint32_t i=0; i<_param->_nb_inst_update; i++) - { - (*(out_UPDATE_PREDICTOR_VAL [i])) (*(in_UPDATE_VAL [i])); - (*(out_UPDATE_ACK [i])) (*(in_UPDATE_PREDICTOR_ACK [i])); - (*(out_UPDATE_PREDICTOR_ADDRESS [i])) (*(in_UPDATE_ADDRESS [i])); - (*(out_UPDATE_PREDICTOR_HISTORY [i])) (*(in_UPDATE_HISTORY [i])); - (*(out_UPDATE_PREDICTOR_DIRECTION [i])) (*(in_UPDATE_DIRECTION [i])); - } +// // List dependency information +// for (uint32_t i=0; i<_param->_nb_inst_update; i++) +// { +// (*(out_UPDATE_PREDICTOR_VAL [i])) (*(in_UPDATE_VAL [i])); +// (*(out_UPDATE_ACK [i])) (*(in_UPDATE_PREDICTOR_ACK [i])); +// (*(out_UPDATE_PREDICTOR_ADDRESS [i])) (*(in_UPDATE_ADDRESS [i])); +// (*(out_UPDATE_PREDICTOR_HISTORY [i])) (*(in_UPDATE_HISTORY [i])); +// (*(out_UPDATE_PREDICTOR_DIRECTION [i])) (*(in_UPDATE_DIRECTION [i])); +// } # endif } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_predict.cpp (revision 107) @@ -23,34 +23,48 @@ void Direction_Glue::genMealy_predict (void) { - log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + log_begin(Direction_Glue,FUNCTION); + log_function(Direction_Glue,FUNCTION,_name.c_str()); // constant direction : never / always - switch (_param->_predictor_scheme) + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) { - case PREDICTOR_STATIC : - { - for (uint32_t i=0; i<_param->_nb_inst_predict; i++) - PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_STATIC [i])); - - break; - } - case PREDICTOR_LAST_TAKE : - { - for (uint32_t i=0; i<_param->_nb_inst_predict; i++) - PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_LAST_TAKE [i])); + log_printf(TRACE,Direction_Glue,FUNCTION," * PREDICT [%d]",i); - break; - } - case PREDICTOR_COUNTER : - case PREDICTOR_LOCAL : - case PREDICTOR_GLOBAL : - case PREDICTOR_META : - case PREDICTOR_CUSTOM : - { - for (uint32_t i=0; i<_param->_nb_inst_predict; i++) - { - // not use : - // in_PREDICT_LAST_TAKE - // in_PREDICT_STATIC + Tcontrol_t direction; + + switch (_param->_predictor_scheme) + { + // defined as constant in Direction_Glue.cpp +// case PREDICTOR_NEVER_TAKE : +// { +// direction = 0; +// break; +// } +// case PREDICTOR_ALWAYS_TAKE : +// { +// direction = 1; +// break; +// } + case PREDICTOR_STATIC : + { + direction = PORT_READ(in_PREDICT_STATIC [i]); + break; + } + case PREDICTOR_LAST_TAKE : + { + direction = PORT_READ(in_PREDICT_LAST_TAKE [i]); + break; + } + case PREDICTOR_COUNTER : + case PREDICTOR_LOCAL : + case PREDICTOR_GLOBAL : + case PREDICTOR_META : + case PREDICTOR_CUSTOM : + { + // not use : + // in_PREDICT_LAST_TAKE + // in_PREDICT_STATIC + + direction = PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [i]); PORT_WRITE(out_PREDICT_PREDICTOR_VAL [i], PORT_READ(in_PREDICT_VAL [i])); @@ -58,19 +72,20 @@ PORT_WRITE(out_PREDICT_PREDICTOR_ADDRESS_SRC [i], PORT_READ(in_PREDICT_ADDRESS_SRC [i])); PORT_WRITE(out_PREDICT_HISTORY [i], PORT_READ(in_PREDICT_PREDICTOR_HISTORY [i])); - PORT_WRITE(out_PREDICT_DIRECTION [i], PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [i])); - } + + break; + } + default : + { + ERRORMORPHEO(FUNCTION,"No valid predictor scheme"); + break; + } + } + + log_printf(TRACE,Direction_Glue,FUNCTION," * direction : %d",direction); - break; - } - default : - { - ERRORMORPHEO(FUNCTION,"No valid predictor scheme"); - break; - } + PORT_WRITE(out_PREDICT_DIRECTION [i], direction); } - - - log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + log_end(Direction_Glue,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/src/Direction_Glue_genMealy_update.cpp (revision 107) @@ -23,5 +23,6 @@ void Direction_Glue::genMealy_update (void) { - log_printf(FUNC,Direction_Glue,FUNCTION,"Begin"); + log_begin(Direction_Glue,FUNCTION); + log_function(Direction_Glue,FUNCTION,_name.c_str()); for (uint32_t i=0; i<_param->_nb_inst_update; i++) @@ -34,5 +35,5 @@ } - log_printf(FUNC,Direction_Glue,FUNCTION,"End"); + log_end(Direction_Glue,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_decod.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_decod.cpp (revision 107) @@ -50,9 +50,14 @@ uint32_t port = 0; for (uint32_t i=0; i<_param->_nb_inst_decod[decod_unit]; i++) + { + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * DECOD [%d][%d]",decod_unit,i); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * val : %d",PORT_READ(in_DECOD_VAL [decod_unit][i])); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * port : %d",port); + // Test if decod_unit have detected a branch if ((port>=_param->_nb_inst_branch_decod) or (PORT_READ(in_DECOD_VAL [decod_unit][i]) == 0)) { - log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * DECOD[%d][%d] : not valid",decod_unit,i); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * DECOD [%d][%d] : not valid",decod_unit,i); ack [i] = false; } @@ -74,5 +79,5 @@ Tcontrol_t miss_decod = (branch_state == BRANCH_STATE_NONE); - log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * DECOD[%d][%d] : valid",decod_unit,i); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * DECOD [%d][%d] : valid",decod_unit,i); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * branch_state : %d",branch_state); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * match_inst_ifetch_ptr : %d",match_inst_ifetch_ptr); @@ -246,9 +251,9 @@ PORT_WRITE(out_DECOD_UPT_UPDATE_PREDICTION_ID [port],depth); - port ++; + port ++; // have find port } + } // Write output - for (uint32_t i=0; i<_param->_nb_inst_branch_decod; i++) { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 107) @@ -117,9 +117,11 @@ // if pc_current is a delay slot, then pc_previous is a branchement instruction, also hit must be set. // else : an another branch instruction have eject this branch : can't accurate - Tcontrol_t hit = PORT_READ(in_PREDICT_BTB_HIT[i]); - Tcontrol_t is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]) and not (pc_current_is_ds_take and not hit); + Tcontrol_t hit = PORT_READ(in_PREDICT_BTB_HIT[i]); + Tcontrol_t is_accurate = not (pc_current_is_ds_take and not hit); + Tcontrol_t btb_is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * hit : %d" ,hit); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * is_accurate : %d" ,is_accurate); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * btb_is_accurate : %d" ,btb_is_accurate); // STEP (3) : Test if BTB find a branch instruction in the packet @@ -158,4 +160,6 @@ else { + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * branch is not in the last slot of the packet"); + Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); Taddress_t address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); @@ -166,5 +170,5 @@ log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * address_src : 0x%.8x (0x%.8x)",address_src ,address_src <<2); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * address_dest : 0x%.8x (0x%.8x)",address_dest,address_dest<<2); - + switch (condition) { @@ -178,4 +182,6 @@ pc_next = address_dest; branch_state = BRANCH_STATE_NSPEC_TAKE; +// is_accurate &= btb_is_accurate; + break; } @@ -190,4 +196,6 @@ pc_next = address_dest; branch_state = BRANCH_STATE_NSPEC_TAKE; +// is_accurate &= btb_is_accurate; + break; } @@ -201,5 +209,5 @@ // Test direction direction = PORT_READ(in_PREDICT_DIR_DIRECTION [i]); // Direction is not the "flag predict" ... also flag_unset and flag_set is the same - if (direction = 1) + if (direction == 1) { branch_state = BRANCH_STATE_SPEC_TAKE; @@ -211,4 +219,6 @@ pc_next = address_src+2; // +1 = delay slot } + +// is_accurate &= btb_is_accurate; break; } @@ -223,4 +233,6 @@ pc_next = address_dest; branch_state = BRANCH_STATE_SPEC_TAKE; + is_accurate &= btb_is_accurate; + break; } @@ -235,4 +247,6 @@ pc_next = address_dest; branch_state = BRANCH_STATE_NSPEC_TAKE; + is_accurate &= btb_is_accurate; + break; } @@ -244,6 +258,8 @@ push = false; direction = true; - pc_next = PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i]); + pc_next = PORT_READ(in_PREDICT_RAS_HIT [i])?PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i]):address_dest; branch_state = BRANCH_STATE_SPEC_TAKE; + is_accurate &= (PORT_READ(in_PREDICT_RAS_HIT [i]) or btb_is_accurate); // if miss - prediction is not accurate + break; } @@ -255,4 +271,8 @@ } + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * direction : %d",direction); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * branch_state : %d",branch_state); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * pc_next : %.8x",pc_next); + if (use_dir) { @@ -270,6 +290,4 @@ PORT_WRITE(out_PREDICT_RAS_PUSH [i], push); PORT_WRITE(out_PREDICT_RAS_ADDRESS_PUSH [i], address_src+2); - - is_accurate &= PORT_READ(in_PREDICT_RAS_HIT [i]); // if miss - prediction is not accurate } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp (revision 107) @@ -363,4 +363,5 @@ in_UPDATE_VAL [port3]->write(1); in_UPDATE_FLUSH[port3]->write(1); + in_UPDATE_PUSH [port3]->write(0); for (uint32_t i=0; i<_param->_nb_context; i++) for (uint32_t j=0; j<_param->_size_queue[i]/2; j++) @@ -582,4 +583,5 @@ LABEL("Update FLUSH"); in_UPDATE_VAL [port3]->write(1); + in_UPDATE_PUSH [port3]->write(0); in_UPDATE_FLUSH[port3]->write(1); for (uint32_t i=0; i<_param->_nb_context; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 107) @@ -237,12 +237,21 @@ if (flush) { + Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); + Tptr_t value = (push)?1:0; + // All pointer is set at 0 - reg_TOP [context_id] = 0; + reg_TOP [context_id] = value; // reg_BOTTOM [context_id] = 0; - reg_NB_ELT [context_id] = 0; - - reg_PREDICT_TOP [context_id] = 0; + reg_NB_ELT [context_id] = value; + + reg_PREDICT_TOP [context_id] = value; // reg_PREDICT_BOTTOM [context_id] = 0; - reg_PREDICT_NB_ELT [context_id] = 0; + reg_PREDICT_NB_ELT [context_id] = value; + + if (push) + { + // reinsert push value + reg_stack [context_id][0]._address = PORT_READ(in_UPDATE_ADDRESS [i]); + } } else @@ -313,6 +322,6 @@ // previous is push, now must be pop - // Test if the stack is empty - if (nb_elt_old>0) // ?? + // Test if the stack is empty (if previous flush) + if (nb_elt_old>0) { top_new = (top_old==0)?(_param->_size_queue[context_id]-1):(top_old-1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 107) @@ -1005,5 +1005,6 @@ request.address_dest = 0x21071981+i; request.address_good = request.address_dest; - request.condition = (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK:BRANCH_CONDITION_FLAG_SET; + request.condition = // (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK: + BRANCH_CONDITION_FLAG_SET; have_ras |= (update_ras(request.condition)); @@ -1451,5 +1452,6 @@ request.address_dest = rand(); - request.condition = (rand()%2)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_FLAG_SET; + request.condition = // (rand()%2)?BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK: + BRANCH_CONDITION_FLAG_SET; request.take = 1; @@ -1597,5 +1599,6 @@ request.address_dest = rand(); request.address_good = request.address_dest; - request.condition = (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK:BRANCH_CONDITION_FLAG_SET; + request.condition = // (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK: + BRANCH_CONDITION_FLAG_SET; have_ufpt_ras |= (update_ras(request.condition)); @@ -2157,5 +2160,6 @@ request.address_dest = rand(); - request.condition = (rand()%2)?BRANCH_CONDITION_READ_STACK:BRANCH_CONDITION_FLAG_SET; + request.condition = // (rand()%2)?BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK: + BRANCH_CONDITION_FLAG_SET; request.take = 1; @@ -2303,5 +2307,6 @@ request.address_dest = rand(); request.address_good = request.address_dest; - request.condition = (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK:BRANCH_CONDITION_FLAG_SET; + request.condition = // (rand()%2)?BRANCH_CONDITION_NONE_WITH_WRITE_STACK: + BRANCH_CONDITION_FLAG_SET; have_ufpt_ras |= (update_ras(request.condition)); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 107) @@ -175,16 +175,19 @@ Tcontrol_t state_is_ok_ko = ((state == UPDATE_PREDICTION_STATE_OK ) or (state == UPDATE_PREDICTION_STATE_KO )); - Tcontrol_t state_is_event = ((state == UPDATE_PREDICTION_STATE_KO ) or - (state == UPDATE_PREDICTION_STATE_EVENT)// or +// Tcontrol_t state_is_event = ((state == UPDATE_PREDICTION_STATE_KO ) or +// (state == UPDATE_PREDICTION_STATE_EVENT)// or // ((have_event[context])?(state == UPDATE_PREDICTION_STATE_OK):false) - ); - - Tcontrol_t state_is_event_update = state_is_event and need_update(condition); - Tcontrol_t state_is_event_no_update = state_is_event and not need_update(condition); +// ); + +// Tcontrol_t state_is_event_update = state_is_event and need_update(condition); +// Tcontrol_t state_is_event_no_update = state_is_event and not need_update(condition); if (retire_ras_from_upt [context]) { - val = state_is_event_update; - val_without_ack = state_is_event_no_update; +// val = state_is_event_update; +// val_without_ack = state_is_event_no_update; + val = ((state == UPDATE_PREDICTION_STATE_KO ) or + ((state == UPDATE_PREDICTION_STATE_EVENT) and need_update(condition))); + val_without_ack = ((state == UPDATE_PREDICTION_STATE_EVENT) and not need_update(condition)); } else @@ -205,5 +208,7 @@ ras_flush = (state == UPDATE_PREDICTION_STATE_KO); // miss prediction, RAS is corrupted ras_push = push_ras(condition); - ras_address = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras; + // If corrupt, RAS must be flushed. + // Also, if instruction l.jal, l.jalr, push addr+2 (delay slot), else (no flush) restore RAS + ras_address = (ras_flush)?(reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src+2):reg_UPDATE_PREDICTION_TABLE [context][depth]._address_ras; ras_index = reg_UPDATE_PREDICTION_TABLE [context][depth]._index_ras; ras_prediction_ifetch = ifetch; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 107) @@ -422,5 +422,13 @@ // In all case : update good_take - reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; + reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; + + // Write address_dest if need read register + Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; + + if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or + (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or + (condition == BRANCH_CONDITION_READ_STACK ) ) + reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr; } @@ -599,13 +607,12 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); -#ifdef DEBUG_TEST - if (reg_EVENT_STATE [i] != EVENT_STATE_UPDATE_CONTEXT) - throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); -#endif - - // Change state - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); - - reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; + // if different : an other branch is occured + if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT) + { + // Change state + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); + + reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; + } } @@ -866,13 +873,16 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) - log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d, %.8d %.8x %.4d - %s", + log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", j, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src, + reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src<<2, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest, + reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest<<2, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras, + reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras<<2, reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras, toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() @@ -886,9 +896,11 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) - log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d %.1d, %.8d %.8x %.4d - %s", + log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", j, reg_UPDATE_PREDICTION_TABLE [i][j]._condition, reg_UPDATE_PREDICTION_TABLE [i][j]._address_src, + reg_UPDATE_PREDICTION_TABLE [i][j]._address_src<<2, reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest, + reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest<<2, reg_UPDATE_PREDICTION_TABLE [i][j]._last_take, reg_UPDATE_PREDICTION_TABLE [i][j]._good_take, @@ -896,4 +908,5 @@ reg_UPDATE_PREDICTION_TABLE [i][j]._history, reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras, + reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras<<2, reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras, toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str() Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 107) @@ -10,8 +10,8 @@ #define MORPHEO_MAJOR_VERSION 0 #define MORPHEO_MINOR_VERSION 2 -#define MORPHEO_REVISION "106" +#define MORPHEO_REVISION "107" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "09" +#define MORPHEO_DATE_DAY "11" #define MORPHEO_DATE_MONTH "02" #define MORPHEO_DATE_YEAR "2009" Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 107) @@ -5,5 +5,5 @@ - + @@ -80,5 +80,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 106) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 107) @@ -24,6 +24,6 @@ - - + +