Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp	(revision 107)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/src/Branch_Target_Buffer_Glue_genMealy_predict.cpp	(revision 108)
@@ -28,6 +28,18 @@
       {
         log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"  * PREDICT [%d]",i);
+
+	Tcontrol_t val          = PORT_READ(in_PREDICT_VAL          [i]);
+	Tcontrol_t register_ack = PORT_READ(in_PREDICT_REGISTER_ACK [i]);
+	Tcontrol_t sort_val     = (_param->_have_port_victim)?PORT_READ(in_PREDICT_SORT_VAL   [i]):true;
+	Tcontrol_t victim_ack   = (_param->_have_port_victim)?PORT_READ(in_PREDICT_VICTIM_ACK [i]):true;
+
+        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * val          : %d",val         );
+        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * register_ack : %d",register_ack);
+        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * sort_val     : %d",sort_val    );
+        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * victim_ack   : %d",victim_ack  );
+	
 	Tptr_t          index       = (_param->_have_port_victim)?PORT_READ(in_PREDICT_SORT_INDEX [i]):0;
-	Tcontrol_t      hit         = PORT_READ(in_PREDICT_REGISTER_HIT         [i][index]);
+        Tcontrol_t      hit         = // (_param->_have_port_victim)?sort_val:
+                                      PORT_READ(in_PREDICT_REGISTER_HIT [i][index]);
 	Tgeneral_data_t address_src = PORT_READ(in_PREDICT_REGISTER_ADDRESS_SRC [i][index]);
 
@@ -44,18 +56,8 @@
 	PORT_WRITE(out_PREDICT_IS_ACCURATE  [i],PORT_READ(in_PREDICT_REGISTER_IS_ACCURATE   [i][index]));
 
-	Tcontrol_t val          = PORT_READ(in_PREDICT_VAL          [i]);
-	Tcontrol_t register_ack = PORT_READ(in_PREDICT_REGISTER_ACK [i]);
-	Tcontrol_t sort_val     = (_param->_have_port_victim)?PORT_READ(in_PREDICT_SORT_VAL   [i]):true;
-	Tcontrol_t victim_ack   = (_param->_have_port_victim)?PORT_READ(in_PREDICT_VICTIM_ACK [i]):true;
-
-        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * val          : %d",val         );
-        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * register_ack : %d",register_ack);
-        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * sort_val     : %d",sort_val    );
-        log_printf(TRACE,Branch_Target_Buffer_Glue,FUNCTION,"    * victim_ack   : %d",victim_ack  );
-	
 	PORT_WRITE(out_PREDICT_ACK            [i], (
 //                                                  val          and 
                                                     register_ack and
-                                                    sort_val     and
+//                                                  sort_val     and
                                                     victim_ack
                                                     ));
@@ -63,5 +65,5 @@
                                                     val          and 
 //                                                  register_ack and
-                                                    sort_val     and
+//                                                  sort_val     and
                                                     victim_ack
                                                     ));
@@ -71,6 +73,6 @@
 	PORT_WRITE(out_PREDICT_VICTIM_VAL     [i], (
                                                     val          and 
-                                                    register_ack and
-                                                    sort_val     // and
+                                                    register_ack // and
+//                                                  sort_val     and
 //                                                  victim_ack
                                                     ));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp	(revision 107)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_genMealy_predict.cpp	(revision 108)
@@ -54,4 +54,5 @@
 	    //  * context is the same
 	    //  * address_src must be higher that the address, because the address lower is previous the current pc.
+            //  * prediction is no accurate is address_dest is not valid.
 	    PORT_WRITE(out_PREDICT_HIT          [i][j],hit);
 	    PORT_WRITE(out_PREDICT_ADDRESS_SRC  [i][j],reg_BTB[num_bank][j]._address_src );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp	(revision 107)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp	(revision 108)
@@ -224,9 +224,11 @@
 		                       dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_ADDRESS_SRC");
 
-	      // out_OUTPUT_VAL     -> glue
-	      // out_OUTPUT_INDEX   -> glue
-	      // out_OUTPUT_ADDRESS -> no exist
 	    }
-	}
+
+          // 1 output
+          // out_OUTPUT_VAL     -> glue
+          // out_OUTPUT_INDEX   -> glue
+          // out_OUTPUT_ADDRESS -> no exist
+        }
 
 	//================================================================
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 107)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 108)
@@ -126,4 +126,9 @@
                       if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i])
                         reg_UPT_EMPTY [i] = false;
+
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_TOP             : %d",reg_UPT_TOP            [i]);
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_TOP_EVENT       : %d",reg_UPT_TOP_EVENT      [i]);
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_UPDATE          : %d",reg_UPT_UPDATE         [i]);
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * reg_UPT_EMPTY           : %d",reg_UPT_EMPTY          [i]);
                     }
 
@@ -210,5 +215,5 @@
 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss_decod    : %d",miss_decod);
 	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * upt_ptr_write : %d",upt_ptr_write);
-	      
+
               if (miss_ifetch or miss_decod)
 		{
@@ -218,5 +223,4 @@
                     throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state."));
 #endif
-                  
                   if (reg_UFPT_NB_NEED_UPDATE [context] == 0)
                     {
@@ -312,124 +316,8 @@
               reg_UPT_EMPTY   [context] = false;
 //            reg_UPT_UPDATE  [context] = reg_UPT_TOP [context];
+
+//               if (miss_ifetch or miss_decod)
+//                 reg_UPT_TOP_EVENT [context] = reg_UPT_TOP [context];
 	    }
-
-	// ===================================================================
-	// =====[ BRANCH_COMPLETE ]===========================================
-	// ===================================================================
-        
-        // The branch is complete
-        //   * Hit  prediction : 
-        //     * update status
-        //   * Miss prediction :
-	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
-	  if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i])
-	    {
-	      Tcontext_t context   = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
-	      Tdepth_t   depth     = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
-              Tcontrol_t miss      = internal_BRANCH_COMPLETE_MISS_PREDICTION [i];
-              Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE            [i];
-              Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST    [i];
-
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * BRANCH_COMPLETE[%d] - Accepted",i);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context    : %d",context);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth      : %d",depth);
-	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss       : %d",miss);
-	      
-              if (miss)
-		{
-                  // Have a miss !!!
-                  // Flush UPFT
-                  flush_UFPT [context] = true;
-                  
-                  // Flush UPT
-                  uint32_t top        = reg_UPT_TOP [context];
-                  uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 
-
-                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * top        : %d",top);
-                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * new_update : %d",new_update);
-
-                  for (uint32_t j=(depth+1)%_param->_size_upt_queue[context];
-                                j!=top; 
-                                j=(j+1)%_param->_size_upt_queue[context])
-                    reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT;
-                  
-                  
-//                reg_UPT_BOTTOM    [context];
-                  reg_UPT_TOP       [context] = depth;
-                  reg_UPT_TOP_EVENT [context] = top;
-
-                  if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context])
-                    reg_UPT_EMPTY [context] = true;
-
-#ifdef DEBUG_TEST
-                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
-                    throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
-#endif
-                  
-                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth);
-                  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO;
-                  
-                  Taddress_t    address_src         = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src;
-                  event_state_t event_state         = reg_EVENT_STATE [context];
-                  bool          previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or
-                                                       (event_state == EVENT_STATE_MISS_FLUSH_UPT          ) or
-                                                       (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or
-                                                       (event_state == EVENT_STATE_EVENT_FLUSH_UPT));
-//                   bool          update_ras          = (new_update != depth);
-
-//                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * update_ras : %d",update_ras);
-
-                  if (reg_UFPT_NB_NEED_UPDATE [context] > 0)
-                    {
-                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context);
-                      reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT;
-                    }
-                  else
-                    {
-//                       if (not previous_update_ras)
-                        {
-                          // have ras prediction ?
-                          log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context);
-
-                          reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT;
-             
-                        }
-                    }
-
-                  if (not previous_update_ras)
-                    {
-                      reg_UPT_UPDATE [context]  = new_update;
-                    }
-                  // else no update
-
-                  reg_EVENT_DEPTH           [context] = depth;
-                  reg_EVENT_ADDRESS_SRC     [context] = address_src; // delay_slot is compute in Context_State
-                  reg_EVENT_ADDRESS_DEST_VAL[context] = good_take;
-                  reg_EVENT_ADDRESS_DEST    [context] = good_addr;
-		}
-	      else
-		{
-                  // Hit case
-
-#ifdef DEBUG_TEST
-                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
-                    throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
-#endif
-                    
-                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth);
-                  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK;
-		}
-
-	      // In all case : update good_take
-	      reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take    = good_take;
-
-              // Write address_dest if need read register
-              Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition;
-              
-              if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or
-                  (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK   ) or
-                  (condition == BRANCH_CONDITION_READ_STACK                       ) )
-                reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr;
-            }
 
 	// ===================================================================
@@ -599,4 +487,128 @@
         }
 
+
+	// ===================================================================
+	// =====[ BRANCH_COMPLETE ]===========================================
+	// ===================================================================
+        
+        // The branch is complete
+        //   * Hit  prediction : 
+        //     * update status
+        //   * Miss prediction :
+	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
+	  if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i])
+	    {
+	      Tcontext_t context   = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
+	      Tdepth_t   depth     = (_param->_have_port_depth     )?PORT_READ(in_BRANCH_COMPLETE_DEPTH      [i]):0;
+              Tcontrol_t miss      = internal_BRANCH_COMPLETE_MISS_PREDICTION [i];
+              Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE            [i];
+              Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST    [i];
+
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * BRANCH_COMPLETE[%d] - Accepted",i);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * context    : %d",context);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth      : %d",depth);
+	      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss       : %d",miss);
+	      
+              if (miss)
+		{
+                  // Have a miss !!!
+                  // Flush UPFT
+                  flush_UFPT [context] = true;
+                  
+                  // Flush UPT
+                  uint32_t top        = reg_UPT_TOP [context];
+                  uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 
+
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * top        : %d",top);
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * new_update : %d",new_update);
+
+                  for (uint32_t j=(depth+1)%_param->_size_upt_queue[context];
+                                j!=top; 
+                                j=(j+1)%_param->_size_upt_queue[context])
+                    reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT;
+                  
+                  
+//                reg_UPT_BOTTOM    [context];
+                  reg_UPT_TOP       [context] = depth;
+                  reg_UPT_TOP_EVENT [context] = top;
+
+                  if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context])
+                    reg_UPT_EMPTY [context] = true;
+
+#ifdef DEBUG_TEST
+                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
+                    throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
+#endif
+                  
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth);
+                  reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO;
+                  
+                  Taddress_t    address_src         = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src;
+                  event_state_t event_state         = reg_EVENT_STATE [context];
+                  bool          previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or
+                                                       (event_state == EVENT_STATE_MISS_FLUSH_UPT          ) or
+                                                       (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or
+                                                       (event_state == EVENT_STATE_EVENT_FLUSH_UPT));
+//                   bool          update_ras          = (new_update != depth);
+
+//                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * update_ras : %d",update_ras);
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * previous_update_ras : %d",previous_update_ras);
+
+                  if (reg_UFPT_NB_NEED_UPDATE [context] > 0)
+                    {
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context);
+                      reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT;
+                    }
+                  else
+                    {
+//                       if (not previous_update_ras)
+                        {
+                          // have ras prediction ?
+                          log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context);
+
+                          reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT;
+             
+                        }
+                    }
+
+                  if (not previous_update_ras)
+                    {
+                      reg_UPT_UPDATE [context]  = new_update;
+                    }
+                  // else no update
+
+                  reg_EVENT_DEPTH           [context] = depth;
+                  reg_EVENT_ADDRESS_SRC     [context] = address_src; // delay_slot is compute in Context_State
+                  reg_EVENT_ADDRESS_DEST_VAL[context] = good_take;
+                  reg_EVENT_ADDRESS_DEST    [context] = good_addr;
+		}
+	      else
+		{
+                  // Hit case
+
+// #ifdef DEBUG_TEST
+//                   if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
+//                     throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
+// #endif
+
+                  if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END)
+                    {
+                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth);
+                      reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK;
+                    }
+		}
+
+	      // In all case : update good_take
+	      reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take    = good_take;
+
+              // Write address_dest if need read register
+              Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition;
+              
+              if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or
+                  (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK   ) or
+                  (condition == BRANCH_CONDITION_READ_STACK                       ) )
+                reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr;
+            }
+
  	// ===================================================================
 	// =====[ BRANCH_EVENT ]==============================================
@@ -695,18 +707,42 @@
                     uint32_t bottom     = reg_UPT_BOTTOM [i];
                     uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1; 
-                    uint32_t full       = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]);
+                    bool     full       = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]);
+//                     bool     empty      = reg_UPT_EMPTY [i];
+
                     log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * top        : %d",top);
                     log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * depth      : %d",depth);
                     log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * new_update : %d",new_update);
 
-                    // Test empty
-                    if (not reg_UPT_EMPTY [i])
+                    event_state_t event_state         = reg_EVENT_STATE [i];
+                    bool          previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or
+                                                         (event_state == EVENT_STATE_MISS_FLUSH_UPT          ) or
+                                                         (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or
+                                                         (event_state == EVENT_STATE_EVENT_FLUSH_UPT));
+
+                    bool find = false; // have slot to update ???
+
+                    // flush all slot after the event
+                    for (uint32_t j=(depth+1)%_param->_size_upt_queue[i];
+                         j!=top; 
+                         j=(j+1)%_param->_size_upt_queue[i])
+                      if ((reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_END) and
+                          (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY))
+                        {
+                          find = true;
+                          reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT;
+                        }
+                    
+                    if ((reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END) and
+                        (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_EMPTY))
                       {
-#ifdef DEBUG_TEST
-                        if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END)
-                          throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state."));
-#endif
+                        find = true;
                         reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT;
-
+                      }
+
+                    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * find       : %d",find);
+                    
+                    // Test if have update slot
+                    if (find)
+                      {
                         // flush all slot after the event
                         for (uint32_t j=(depth+1)%_param->_size_upt_queue[i];
@@ -714,25 +750,23 @@
                              j=(j+1)%_param->_size_upt_queue[i])
                           reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT;
+
+                        reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT;
+                        
+                        // reg_UPT_BOTTOM    [i];
+                        // TODO : special case : event is an exception on branch, also depth is not valid
+                        reg_UPT_TOP       [i] = depth; // depth is again valid
+                        reg_UPT_TOP_EVENT [i] = top;
+                        
+                        if (bottom == reg_UPT_TOP [i])
+                          reg_UPT_EMPTY [i] = true;
                       }
+
+                    bool          update_ras = find and ((top != depth) or full);
+                    
+                    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * update_ras : %d",update_ras);
+                    
+                    if (not previous_update_ras and update_ras)
+                      reg_UPT_UPDATE [i]  = new_update;
               
-//                  reg_UPT_BOTTOM    [i];
-                    // TODO : special case : event is an exception on branch, also depth is not valid
-                    reg_UPT_TOP       [i] = depth; // depth is again valid
-                    reg_UPT_TOP_EVENT [i] = top;
-
-                    if (bottom == reg_UPT_TOP [i])
-                      reg_UPT_EMPTY [i] = true;
-
-                    reg_EVENT_VAL     [i] = true;
-                    reg_EVENT_UPT_PTR [i] = depth;
-                    event_state_t event_state         = reg_EVENT_STATE [i];
-                    bool          previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or
-                                                         (event_state == EVENT_STATE_MISS_FLUSH_UPT          ) or
-                                                         (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or
-                                                         (event_state == EVENT_STATE_EVENT_FLUSH_UPT));
-                    bool          update_ras          = (top != depth) or full;
-
-                    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * update_ras : %d",update_ras);
-                    
                     // new state :
                     //   * test if ufpt is empty
@@ -741,4 +775,7 @@
                     //            * ok : nothing
                     //            * ko : flush upt
+                    reg_EVENT_VAL     [i] = true;
+                    reg_EVENT_UPT_PTR [i] = depth;
+
                     if (reg_UFPT_NB_NEED_UPDATE [i] > 0)
                       {
@@ -766,12 +803,11 @@
                         else
                           {
+                            // special case : nothing
+                            reg_EVENT_VAL     [i] = false;
+
                             reg_EVENT_STATE [i] = EVENT_STATE_OK;
                           }
                       }
-                    
-                    if (not previous_update_ras and update_ras)
-                      {
-                        reg_UPT_UPDATE [i]  = new_update;
-                      }
+
                     // else no update
                     
@@ -817,8 +853,12 @@
                 {
                   for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j)
-                    {
-                      reg_UFPT_NB_UPDATE [i] ++;
-                      reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT;
-                    }
+                    // EMPTY : no event
+                    // END   : already update
+                    // EVENT : previous event
+                    if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state == UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD)
+                      {
+                        reg_UFPT_NB_UPDATE [i] ++;
+                        reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT;
+                      }
 
                   // TOP is next write slot : last slot is TOP-1
@@ -862,7 +902,7 @@
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_STATE           : %s"  ,toString(reg_EVENT_STATE [i]).c_str());
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_DEPTH           : %d"  ,reg_EVENT_DEPTH           [i]);
-        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_SRC     : %.8x",reg_EVENT_ADDRESS_SRC     [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_SRC     : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC     [i],reg_EVENT_ADDRESS_SRC     [i]<<2);
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST_VAL: %d"  ,reg_EVENT_ADDRESS_DEST_VAL[i]);
-        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST    : %.8x",reg_EVENT_ADDRESS_DEST    [i]);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST    : %.8x (%.8x)",reg_EVENT_ADDRESS_DEST    [i],reg_EVENT_ADDRESS_DEST    [i]<<2);
 
 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update_Fetch_Prediction_Table   [%d]",i);
@@ -914,4 +954,15 @@
       }
 #endif
+
+#ifdef DEBUG_TEST
+    for (uint32_t i=0; i<_param->_nb_context; i++)
+      {
+        if (reg_UFPT_NB_NEED_UPDATE [i] > _param->_size_ufpt_queue[i])
+          throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_NEED_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_NEED_UPDATE [i],_param->_size_ufpt_queue[i]));
+        if (reg_UFPT_NB_UPDATE [i] > _param->_size_ufpt_queue[i])
+          throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_UPDATE [i],_param->_size_ufpt_queue[i]));
+      }
+#endif
+
       }
 
