Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_min.cfg	(revision 108)
@@ -11,4 +11,5 @@
 1	1	+1	# nb_inst_branch_complete 
 0	0	+1	# nb_branch_speculated    [0][0] [nb_front_end][nb_context]
+1       1       +1      # size_nb_inst_decod
 32	32	+1	# size_general_data       
 1	1	+1	# size_store_queue_ptr    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/config_mono_rename_unit.cfg	(revision 108)
@@ -11,4 +11,5 @@
 1	1	+1	# nb_inst_branch_complete 
 0	0	+1	# nb_branch_speculated    [0][0] [nb_front_end][nb_context]
+1       1       +1      # size_nb_inst_decod
 32	32	+1	# size_general_data       
 1	1	+1	# size_store_queue_ptr    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp	(revision 108)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h"
 
-#define NB_PARAMS 15
+#define NB_PARAMS 16
 
 void usage (int argc, char * argv[])
@@ -25,4 +25,5 @@
   err (_(" * nb_inst_branch_complete                            (uint32_t         )\n"));
   err (_(" * nb_branch_speculated    [nb_front_end][nb_context] (uint32_t         )\n"));
+  err (_(" * size_nb_inst_decod                                 (uint32_t         )\n"));
   err (_(" * size_general_data                                  (uint32_t         )\n"));
   err (_(" * size_store_queue_ptr                               (uint32_t         )\n"));
@@ -88,4 +89,5 @@
     }
 
+  uint32_t          _size_nb_inst_decod      = fromString<uint32_t         >(argv[x++]);
   uint32_t          _size_general_data       = fromString<uint32_t         >(argv[x++]);
   uint32_t          _size_store_queue_ptr    = fromString<uint32_t         >(argv[x++]);
@@ -112,4 +114,5 @@
 	 _nb_inst_branch_complete ,
 	 _nb_branch_speculated    ,
+	 _size_nb_inst_decod      ,
 	 _size_general_data       ,
 	 _size_store_queue_ptr    ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 108)
@@ -68,4 +68,7 @@
   ALLOC2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ," in_INSERT_NO_EXECUTE              ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   ALLOC2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ," in_INSERT_IS_DELAY_SLOT           ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#ifdef DEBUG
+  ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS                 ," in_INSERT_ADDRESS                 ",Taddress_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#endif
   ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT            ," in_INSERT_ADDRESS_NEXT            ",Taddress_t        ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION               ," in_INSERT_EXCEPTION               ",Texception_t      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -167,4 +170,5 @@
   ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_ALL             ,"out_NB_INST_COMMIT_ALL             ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
   ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_MEM             ,"out_NB_INST_COMMIT_MEM             ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_NB_INST_DECOD_ALL              ," in_NB_INST_DECOD_ALL              ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
   ALLOC2_SC_SIGNAL( in_DEPTH_MIN                      ," in_DEPTH_MIN                      ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
   ALLOC2_SC_SIGNAL( in_DEPTH_MAX                      ," in_DEPTH_MAX                      ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -206,4 +210,7 @@
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#ifdef DEBUG
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#endif
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -317,4 +324,5 @@
   INSTANCE2_SC_SIGNAL(_Commit_unit,out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end,_param->_nb_context[it1]);
   INSTANCE2_SC_SIGNAL(_Commit_unit,out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_Commit_unit, in_NB_INST_DECOD_ALL              ,_param->_nb_front_end,_param->_nb_context[it1]);
   
   if (_param->_have_port_depth)
@@ -617,4 +625,7 @@
   DELETE2_SC_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   DELETE2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#ifdef DEBUG
+  DELETE2_SC_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#endif
   DELETE2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
   DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -714,4 +725,5 @@
   DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_NB_INST_DECOD_ALL              ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL( in_DEPTH_MIN                      ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL( in_DEPTH_MAX                      ,_param->_nb_front_end,_param->_nb_context[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 108)
@@ -83,4 +83,7 @@
   public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_NO_EXECUTE                ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_IS_DELAY_SLOT             ;//[nb_rename_unit][nb_inst_insert]
+#ifdef DEBUG
+  public    : SC_IN (Taddress_t         ) ***  in_INSERT_ADDRESS                   ;//[nb_rename_unit][nb_inst_insert]
+#endif
   public    : SC_IN (Taddress_t         ) ***  in_INSERT_ADDRESS_NEXT              ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_IN (Texception_t       ) ***  in_INSERT_EXCEPTION                 ;//[nb_rename_unit][nb_inst_insert]
@@ -195,4 +198,5 @@
   public    : SC_OUT(Tcounter_t         ) *** out_NB_INST_COMMIT_ALL               ;//[nb_front_end][nb_context]
   public    : SC_OUT(Tcounter_t         ) *** out_NB_INST_COMMIT_MEM               ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcounter_t         ) ***  in_NB_INST_DECOD_ALL                ;//[nb_front_end][nb_context]
 										   
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	   
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 108)
@@ -81,4 +81,5 @@
 			uint32_t            nb_inst_branch_complete ,
 			uint32_t         ** nb_branch_speculated    ,
+                        uint32_t            size_nb_inst_decod      ,
 			uint32_t            size_general_data       ,
 			uint32_t            size_store_queue_ptr    ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 108)
@@ -90,5 +90,9 @@
   public  : Tspecial_data_t    flags                   ;
   public  : Tcontrol_t         no_sequence             ;
+  public  : Tcontrol_t         speculative             ;
 //public  : Tgeneral_data_t    data_commit             ; // branch's destination
+#ifdef DEBUG
+  public  : Taddress_t         address                 ;
+#endif
   public  : Taddress_t         address_next            ;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 108)
@@ -71,4 +71,7 @@
       _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE              ,"no_execute"           ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT           ,"is_delay_slot"        ,Tcontrol_t        ,1                                   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#ifdef DEBUG
+      _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS                 ,"address"              ,Taddress_t        ,_param->_size_instruction_address   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+#endif
       _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS_NEXT            ,"address_next"         ,Taddress_t        ,_param->_size_instruction_address   ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION               ,"exception"            ,Texception_t      ,_param->_size_exception             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -216,4 +219,5 @@
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL             ,"commit_all",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM             ,"commit_mem",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL              ,"decod_all" ,Tcounter_t         ,_param->_size_nb_inst_decod ,_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 108)
@@ -39,4 +39,7 @@
         DELETE2_SIGNAL( in_INSERT_NO_EXECUTE              ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
         DELETE2_SIGNAL( in_INSERT_IS_DELAY_SLOT           ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1                                   );
+#ifdef DEBUG
+        DELETE2_SIGNAL( in_INSERT_ADDRESS                 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_instruction_address               );
+#endif
         DELETE2_SIGNAL( in_INSERT_ADDRESS_NEXT            ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_instruction_address               );
         DELETE2_SIGNAL( in_INSERT_EXCEPTION               ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_exception             );
@@ -143,4 +146,5 @@
         DELETE2_SIGNAL(out_NB_INST_COMMIT_ALL             ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_nb_inst_commit);
         DELETE2_SIGNAL(out_NB_INST_COMMIT_MEM             ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_nb_inst_commit);
+        DELETE2_SIGNAL( in_NB_INST_DECOD_ALL              ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_nb_inst_decod);
 
         DELETE2_SIGNAL( in_DEPTH_MIN                      ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 108)
@@ -77,5 +77,6 @@
               case EVENT_STATE_WAITEND  : 
                 {
-                  if (reg_NB_INST_COMMIT_ALL [i][j] == 0)
+                  Tcounter_t nb_inst_all = PORT_READ(in_NB_INST_DECOD_ALL [i][j]) + reg_NB_INST_COMMIT_ALL [i][j];
+                  if (nb_inst_all == 0)
                     {
                       reg_EVENT_STATE [i][j] = EVENT_STATE_END;
@@ -163,4 +164,8 @@
 		  entry->num_reg_re_phy_new      = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW    [x][y]);
                   entry->no_sequence             = type == TYPE_BRANCH;
+                  entry->speculative             = true;
+#ifdef DEBUG
+		  entry->address                 = PORT_READ(in_INSERT_ADDRESS               [x][y]);
+#endif
 		  entry->address_next            = PORT_READ(in_INSERT_ADDRESS_NEXT          [x][y]);
 
@@ -173,26 +178,38 @@
                   //                       other -> wait end of instruction
                   //            * OTHER
-		  if (exception == EXCEPTION_NONE)
-		    {
-                      Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]);
-                      // no_execute : l.j, l.nop, l.rfe
-
-                      log_printf(TRACE,Commit_unit,FUNCTION,"    * no_execute     : %d",no_execute);
-
-		      switch (type)
-			{
-			case TYPE_BRANCH : {entry->state=(no_execute==1)?ROB_BRANCH_COMPLETE:ROB_BRANCH_WAIT_END; break;}
-			case TYPE_MEMORY : {entry->state=(is_store  ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END; break;}
-			default          : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:ROB_OTHER_WAIT_END; break;}
-			}
-		    }
-		  else
-		    {
-                      // Have an exception : wait head of ROB
-
-                      // in_INSERT_NO_EXECUTE [x][y] : l.sys, l.trap
-
-		      entry->state = ROB_END_EXCEPTION_WAIT_HEAD;
-		    }
+
+//                   bool       flush      = reg_EVENT_FLUSH [front_end_id][context_id];
+
+//                   log_printf(TRACE,Commit_unit,FUNCTION,"    * flush          : %d",flush);
+
+//                   if (flush)
+//                     {
+//                       entry->state    = ROB_END_MISS; // All type (branch, memory and others), because, is not execute
+//                     }
+//                   else
+                    {
+                      if (exception == EXCEPTION_NONE)
+                        {
+                          Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]);
+                          // no_execute : l.j, l.nop, l.rfe
+                          
+                          log_printf(TRACE,Commit_unit,FUNCTION,"    * no_execute     : %d",no_execute);
+                          
+                          switch (type)
+                            {
+                            case TYPE_BRANCH : {entry->state=(no_execute==1)?ROB_BRANCH_COMPLETE:ROB_BRANCH_WAIT_END  ; break;}
+                            case TYPE_MEMORY : {entry->state=(is_store  ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END; break;}
+                            default          : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:ROB_OTHER_WAIT_END; break;}
+                            }
+                        }
+                      else
+                        {
+                          // Have an exception : wait head of ROB
+                          
+                          // in_INSERT_NO_EXECUTE [x][y] : l.sys, l.trap
+                          
+                          entry->state = ROB_END_EXCEPTION_WAIT_HEAD;
+                        }
+                    }
 
                   // Push in rob
@@ -351,8 +368,8 @@
 	      Ttype_t    type         = entry->type        ;
 
-              if ((state == ROB_END_OK         ) or // LOAD_MISS
+              if ((state == ROB_END_OK         ) or
 // 		  (state == ROB_END_KO         ) or 
-		  (state == ROB_END_BRANCH_MISS)//  or 
-// 		  (state == ROB_END_LOAD_MISS  ) or 
+		  (state == ROB_END_BRANCH_MISS) or 
+ 		  (state == ROB_END_LOAD_MISS  )//  or 
 // 		  (state == ROB_END_MISS       ) or 
 // 		  (state == ROB_END_EXCEPTION  )
@@ -468,7 +485,16 @@
 	// =====[ EVENT ]=====================================================
 	// ===================================================================
-        {
-          // Not yet implemented
-        }
+//         for (uint32_t i=0; i < _param->_nb_front_end; ++i)
+//           for (uint32_t j=0; j < _param->_nb_context[i]; ++j)
+//             if (PORT_READ(in_EVENT_VAL [i][j]) and internal_EVENT_ACK [i][j])
+//               {
+//                 log_printf(TRACE,Commit_unit,FUNCTION,"  * EVENT [%d][%d]",i,j);
+
+//                 reg_PC_CURRENT            [i][j] = PORT_READ(in_EVENT_ADDRESS      [i][j]);
+//                 reg_PC_CURRENT_IS_DS      [i][j] = PORT_READ(in_EVENT_IS_DS_TAKE   [i][j]); // ??
+//                 reg_PC_CURRENT_IS_DS_TAKE [i][j] = PORT_READ(in_EVENT_IS_DS_TAKE   [i][j]);
+//                 reg_PC_NEXT               [i][j] = PORT_READ(in_EVENT_ADDRESS_NEXT [i][j]);
+//                 // PORT_READ(in_EVENT_ADDRESS_NEXT_VAL [i][j]);
+//               }
 
 	// ===================================================================
@@ -505,10 +531,10 @@
               
               bool         flush         = reg_EVENT_FLUSH [front_end_id][context_id];
-
-              Tcontrol_t   is_valid      = (((depth == depth_min) or 
-                                             depth_full or
-                                             ((depth_min <= depth_max)?
-                                              ((depth >= depth_min) and (depth <=depth_max)):
-                                              ((depth >= depth_min) or  (depth <=depth_max))))
+              bool         speculative   = entry->speculative and not (depth == depth_min);
+              Tcontrol_t   is_valid      = ((not speculative or 
+                                             (speculative and (depth_full or // all is valid
+                                                               ((depth_min <= depth_max)? // test if depth is overflow
+                                                                ((depth >= depth_min) and (depth <=depth_max)):
+                                                                ((depth >= depth_min) or  (depth <=depth_max))))))
                                              and not flush);
 
@@ -532,11 +558,18 @@
 		    case ROB_BRANCH_WAIT_END             : {state = ROB_MISS_WAIT_END; break;}
 		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS     ; break;}
+                    case ROB_END_BRANCH_MISS             :
                     case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS     ; break;}
+                    case ROB_END_LOAD_MISS_UPDATE        :
+                    case ROB_END_LOAD_MISS               :
                     case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS     ; break;}
 		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO; break;}
 		  //case ROB_STORE_WAIT_HEAD_KO          : {state = ; break;}
 		    case ROB_OTHER_WAIT_END              : {state = ROB_MISS_WAIT_END; break;}
+		    case ROB_END_OK                      :
 		    case ROB_END_OK_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_KO                      :
 		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_EXCEPTION_UPDATE        :
+		    case ROB_END_EXCEPTION               :
 		    case ROB_END_EXCEPTION_WAIT_HEAD     : {state = ROB_END_MISS     ; break;}
 		                                         
@@ -548,14 +581,7 @@
 		      // can't have miss speculation     
 		    case ROB_STORE_HEAD_OK               :
-		    case ROB_END_OK                      :
-		    case ROB_END_KO                      :
-                    case ROB_END_BRANCH_MISS             :
-                    case ROB_END_LOAD_MISS_UPDATE        :
-                    case ROB_END_LOAD_MISS               :
-		    case ROB_END_EXCEPTION_UPDATE        :
-		    case ROB_END_EXCEPTION               :
 		    default                              : 
 		      {
-			throw ERRORMORPHEO(FUNCTION,_("Miss Speculation : Invalide state.\n"));
+			throw ERRORMORPHEO(FUNCTION,toString(_("Miss Speculation : Invalide state : %s.\n"),toString(state).c_str()));
 			break;
 		      }
@@ -566,5 +592,7 @@
 	      // test if instruction is not speculative
 	      //------------------------------------------------------
-	      if (entry->depth == depth_min)
+              entry->speculative = speculative;
+// 	      if (entry->depth == depth_min)
+	      if (not speculative)
 		{
 		  switch (state)
@@ -574,5 +602,5 @@
 		    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_BRANCH_MISS        ; break;}
 		    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_LOAD_MISS_UPDATE   ; break;}
-		    default : {break;}
+		    default : {break;} // else, no change
 		  }
 		}
@@ -587,5 +615,5 @@
 		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK;        break;}
 		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION_UPDATE; break;}
-		    default : {break;}
+		    default : {break;} // else, no change
 		    }
 		}
@@ -599,80 +627,131 @@
     // ===================================================================
 
-    log_printf(TRACE,Commit_unit,FUNCTION,"  * Dump ROB (Re-Order-Buffer)");
-    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_head : %d",reg_NUM_BANK_HEAD);
-    log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_tail : %d",reg_NUM_BANK_TAIL);
-
-    for (uint32_t i=0; i<_param->_nb_front_end; i++)
-      for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+#ifdef STATISTICS
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      if (usage_is_set(_usage,USE_STATISTICS))
+        *(_stat_bank_nb_inst [i]) += _rob[i].size();
+#endif
+
+#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Commit_unit == true)
+    {
+      log_printf(TRACE,Commit_unit,FUNCTION,"  * Dump ROB (Re-Order-Buffer)");
+      log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_head : %d",reg_NUM_BANK_HEAD);
+      log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank_tail : %d",reg_NUM_BANK_TAIL);
+      
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+          {
+            log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d]",i,j);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STATE  : %s",toString(reg_EVENT_STATE [i][j]).c_str());
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_FLUSH  : %d",reg_EVENT_FLUSH [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_ALL  : %d",reg_NB_INST_COMMIT_ALL[i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_MEM  : %d",reg_NB_INST_COMMIT_MEM[i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * PC_CURRENT   : %.8x (%.8x) - %d %d",reg_PC_CURRENT [i][j],reg_PC_CURRENT [i][j]<<2, reg_PC_CURRENT_IS_DS [i][j], reg_PC_CURRENT_IS_DS_TAKE [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * PC_NEXT      : %.8x (%.8x)",reg_PC_NEXT [i][j],reg_PC_NEXT [i][j]<<2);
+          }
+
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
         {
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d] state        : %s",i,j,toString(reg_EVENT_STATE [i][j]).c_str());
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * num_inst_all : %d",reg_NB_INST_COMMIT_ALL[i][j]);
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * num_inst_mem : %d",reg_NB_INST_COMMIT_MEM[i][j]);
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * PC_CURRENT   : %.8x (%.8x) - %d %d",reg_PC_CURRENT [i][j],reg_PC_CURRENT [i][j]<<2, reg_PC_CURRENT_IS_DS [i][j], reg_PC_CURRENT_IS_DS_TAKE [i][j]);
-          log_printf(TRACE,Commit_unit,FUNCTION,"    * PC_NEXT      : %.8x (%.8x)",reg_PC_NEXT [i][j],reg_PC_NEXT [i][j]<<2);
+          uint32_t num_bank = (reg_NUM_BANK_HEAD+i)%_param->_nb_bank;
+
+          log_printf(TRACE,Commit_unit,FUNCTION,"      * Bank [%d] size : %d, ptr : %d",num_bank,(int)_rob[num_bank].size(), reg_BANK_PTR [i]);
+          
+          uint32_t x=0;
+          for (std::list<entry_t*>::iterator it=_rob[num_bank].begin();
+               it!=_rob[num_bank].end();
+               it++)
+            {
+              log_printf(TRACE,Commit_unit,FUNCTION,"        [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s - %d",
+                         x,
+                         (*it)->front_end_id            ,
+                         (*it)->context_id              ,
+                         (*it)->rename_unit_id          ,
+                         (*it)->depth                   ,
+                         (*it)->type                    ,
+                         (*it)->operation               ,
+                         (*it)->is_delay_slot           ,
+                         (*it)->use_store_queue         ,
+                         (*it)->store_queue_ptr_write   ,
+                         (*it)->use_load_queue          ,
+                         (*it)->load_queue_ptr_write    ,
+                         toString((*it)->state).c_str() ,
+                         (*it)->ptr                     );
+              log_printf(TRACE,Commit_unit,FUNCTION,"               %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ",
+                         (*it)->read_ra                 ,
+                         (*it)->num_reg_ra_log          ,
+                         (*it)->num_reg_ra_phy          ,
+                         (*it)->read_rb                 ,
+                         (*it)->num_reg_rb_log          ,
+                         (*it)->num_reg_rb_phy          ,
+                         (*it)->read_rc                 ,
+                         (*it)->num_reg_rc_log          ,
+                         (*it)->num_reg_rc_phy          ,
+                         (*it)->write_rd                ,
+                         (*it)->num_reg_rd_log          ,
+                         (*it)->num_reg_rd_phy_old      ,
+                         (*it)->num_reg_rd_phy_new      ,
+                         (*it)->write_re                ,
+                         (*it)->num_reg_re_log          ,
+                         (*it)->num_reg_re_phy_old      ,
+                         (*it)->num_reg_re_phy_new      );
+              
+              log_printf(TRACE,Commit_unit,FUNCTION,"               %.2d %.2d %.1d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)",
+                         (*it)->exception_use ,
+                         (*it)->exception     ,
+                         (*it)->flags         ,
+                         (*it)->no_sequence   ,
+                         (*it)->speculative   ,
+                         (*it)->address       ,
+                         (*it)->address<<2    ,
+                         (*it)->address_next  ,
+                         (*it)->address_next<<2
+                         );
+              
+              x++;
+            }
         }
-	
-    for (uint32_t i=0; i<_param->_nb_bank; i++)
-      {
-        log_printf(TRACE,Commit_unit,FUNCTION,"    * Bank [%d] size : %d, ptr : %d",i,(int)_rob[i].size(), reg_BANK_PTR [i]);
-
-#ifdef STATISTICS
-        if (usage_is_set(_usage,USE_STATISTICS))
-          *(_stat_bank_nb_inst [i]) += _rob[i].size();
-#endif
-
-	uint32_t x=0;
-	for (std::list<entry_t*>::iterator it=_rob[i].begin();
-	     it!=_rob[i].end();
-	     it++)
-	  {
-            log_printf(TRACE,Commit_unit,FUNCTION,"      [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s - %d",
-                       x,
-                       (*it)->front_end_id            ,
-                       (*it)->context_id              ,
-                       (*it)->rename_unit_id          ,
-                       (*it)->depth                   ,
-                       (*it)->type                    ,
-                       (*it)->operation               ,
-//                     (*it)->address                 ,
-//                     (*it)->address << 2            ,
-                       (*it)->is_delay_slot           ,
-                       (*it)->use_store_queue         ,
-                       (*it)->store_queue_ptr_write   ,
-                       (*it)->use_load_queue          ,
-                       (*it)->load_queue_ptr_write    ,
-                       toString((*it)->state).c_str() ,
-                       (*it)->ptr                     );
-            log_printf(TRACE,Commit_unit,FUNCTION,"             %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ",
-                       (*it)->read_ra                 ,
-                       (*it)->num_reg_ra_log          ,
-                       (*it)->num_reg_ra_phy          ,
-                       (*it)->read_rb                 ,
-                       (*it)->num_reg_rb_log          ,
-                       (*it)->num_reg_rb_phy          ,
-                       (*it)->read_rc                 ,
-                       (*it)->num_reg_rc_log          ,
-                       (*it)->num_reg_rc_phy          ,
-                       (*it)->write_rd                ,
-                       (*it)->num_reg_rd_log          ,
-                       (*it)->num_reg_rd_phy_old      ,
-                       (*it)->num_reg_rd_phy_new      ,
-                       (*it)->write_re                ,
-                       (*it)->num_reg_re_log          ,
-                       (*it)->num_reg_re_phy_old      ,
-                       (*it)->num_reg_re_phy_new      );
-            
-            log_printf(TRACE,Commit_unit,FUNCTION,"             %.2d %.2d %.1d %.1d %.8x (%.8x)",
-                       (*it)->exception_use ,
-                       (*it)->exception     ,
-                       (*it)->flags         ,
-                       (*it)->no_sequence   ,
-                       (*it)->address_next  ,
-                       (*it)->address_next<<2
-                       );
-
-	    x++;
-	  }
-      }
+    }
+#endif
+
+#ifdef DEBUG_TEST
+    {
+      uint32_t x=reg_NUM_BANK_HEAD;
+      if (not _rob[x].empty())
+        {
+          entry_t * entry = _rob [x].front();
+
+          if (false
+//            or (entry->state == ROB_EMPTY                      )
+//            or (entry->state == ROB_BRANCH_WAIT_END            )
+//            or (entry->state == ROB_BRANCH_COMPLETE            )
+//            or (entry->state == ROB_STORE_WAIT_HEAD_OK         )
+//          //or (entry->state == ROB_STORE_WAIT_HEAD_KO         )
+//            or (entry->state == ROB_STORE_HEAD_OK              )
+//            or (entry->state == ROB_STORE_HEAD_KO              )
+//            or (entry->state == ROB_OTHER_WAIT_END             )
+//            or (entry->state == ROB_MISS_WAIT_END              )
+//            or (entry->state == ROB_END_OK_SPECULATIVE         )
+              or (entry->state == ROB_END_OK                     )
+//            or (entry->state == ROB_END_KO_SPECULATIVE         )
+//            or (entry->state == ROB_END_KO                     )
+//            or (entry->state == ROB_END_BRANCH_MISS_SPECULATIVE)
+              or (entry->state == ROB_END_BRANCH_MISS            )
+//            or (entry->state == ROB_END_LOAD_MISS_SPECULATIVE  )
+//            or (entry->state == ROB_END_LOAD_MISS_UPDATE       )
+              or (entry->state == ROB_END_LOAD_MISS              )
+//            or (entry->state == ROB_END_MISS                   )
+//            or (entry->state == ROB_END_EXCEPTION_WAIT_HEAD    )
+//            or (entry->state == ROB_END_EXCEPTION_UPDATE       )
+//            or (entry->state == ROB_END_EXCEPTION              )
+              )
+          if (entry->address != reg_PC_CURRENT[entry->front_end_id][entry->context_id])
+            throw ERRORMORPHEO(FUNCTION,toString(_("Rob top address (%x) is different of reg_PC_CURRENT[%d][%d] (%x).\n"),
+                                                 entry->address,
+                                                 entry->front_end_id,
+                                                 entry->context_id,
+                                                 reg_PC_CURRENT[entry->front_end_id][entry->context_id]));
+        }
+    }
+#endif
 
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 108)
@@ -31,4 +31,5 @@
 			  uint32_t            nb_inst_branch_complete ,
 			  uint32_t         ** nb_branch_speculated    ,
+                          uint32_t            size_nb_inst_decod      ,
 			  uint32_t            size_general_data       ,
 			  uint32_t            size_store_queue_ptr    ,
@@ -93,4 +94,5 @@
         _size_depth               = max<uint32_t>(_array_size_depth,_nb_front_end,_nb_context);
         _size_nb_inst_commit      = log2(_size_queue)+1;
+        _size_nb_inst_decod       = size_nb_inst_decod;
         
         _have_port_front_end_id   = _size_front_end_id   > 0;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 108)
@@ -27,8 +27,8 @@
 
     if (not is_multiple(_size_queue, _nb_bank))
-      test.error(toString(_("nb_bank must be a multiple of size_queue.\n")));
+      test.error(toString(_("nb_bank (%d) must be a multiple of size_queue (%d).\n"),_nb_bank,_size_queue));
     
     if (not is_multiple(_nb_bank, _nb_inst_issue))
-      test.error(toString(_("nb_inst_issue must be a multiple of nb_bank.\n")));
+      test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));
 
     if (_nb_rename_unit_select > _nb_rename_unit)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h	(revision 108)
@@ -89,5 +89,5 @@
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  private   : uint32_t                        internal_BANK_PRIORITY;
+  private   : uint32_t                        reg_BANK_PRIORITY;
 
   private   : Tcontrol_t                    * internal_POP_ACK      ; //[nb_pop]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp	(revision 108)
@@ -28,21 +28,30 @@
     for (uint32_t i=0; i<_param->_nb_pop; i++)
       {
-	uint32_t offset = i*_param->_nb_bank_by_pop;
+        log_printf(TRACE,Free_List_unit,FUNCTION,"  * POP [%d]",i);
+
+ 	uint32_t offset = i*_param->_nb_bank_by_pop;
 
 	// GPR
 	bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]);
 
+        log_printf(TRACE,Free_List_unit,FUNCTION,"    * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i]));
+
 	if (not gpr_ack)
 	  for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++)
 	    {
-	      uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop);
+	      uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop
+                                      );
+
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",bank);
 	      
 	      if (not _gpr_list[bank].empty())
 		{
 		  // find
+                  log_printf(TRACE,Free_List_unit,FUNCTION,"    * find    : %d",_gpr_list[bank].front());
+
 		  gpr_ack = true;
 		  internal_POP_GPR_BANK [i] = bank;
 		  PORT_WRITE(out_POP_GPR_NUM_REG [i],
-			     //(bank << _param->_shift) |
+			     //(bank << _param->_shift) | // only in VHDL
 			     _gpr_list[bank].front());
 		  
@@ -54,16 +63,23 @@
 	bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]);
 
+        log_printf(TRACE,Free_List_unit,FUNCTION,"    * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i]));
+
 	if (not spr_ack)
 	  for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++)
 	    {
-	      uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop);
+	      uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop
+                                      );
+
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",bank);
 	      
 	      if (not _spr_list[bank].empty())
 		{
 		  // find
+                  log_printf(TRACE,Free_List_unit,FUNCTION,"    * find    : %d",_spr_list[bank].front());
+
 		  spr_ack = true;
 		  internal_POP_SPR_BANK [i] = bank;
 		  PORT_WRITE(out_POP_SPR_NUM_REG [i],
-			     //(bank << _param->_shift) |
+			     //(bank << _param->_shift) | // only in VHDL
 			     _spr_list[bank].front());
 		  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp	(revision 108)
@@ -26,4 +26,5 @@
     log_function(Free_List_unit,FUNCTION,_name.c_str());
 
+    // bank conflit
     bool bank_use [_param->_nb_bank];
     for (uint32_t i=0; i<_param->_nb_bank; i++)
@@ -32,13 +33,22 @@
     for (uint32_t i=0; i<_param->_nb_push; i++)
       {
+        log_printf(TRACE,Free_List_unit,FUNCTION,"  * PUSH [%d]",i);
+
 	bool gpr_ack = not PORT_READ(in_PUSH_GPR_VAL[i]);
+        
+        log_printf(TRACE,Free_List_unit,FUNCTION,"    * GPR_VAL : %d",PORT_READ(in_PUSH_GPR_VAL[i]));
 
 	if (not gpr_ack)
 	  {
-	    // num_bank : MSB
-	    uint32_t bank = PORT_READ(in_PUSH_GPR_NUM_REG[i]) >> _param->_bank_gpr_size_slot;
+//  	    // num_bank : MSB
+// 	    uint32_t bank = PORT_READ(in_PUSH_GPR_NUM_REG[i]) >> _param->_bank_gpr_size_slot;
+ 	    // num_bank : LSB
+	    uint32_t bank = PORT_READ(in_PUSH_GPR_NUM_REG[i]) & _param->_mask_gpr;
 	    
 	    if (not bank_use [bank])
 	      {
+                log_printf(TRACE,Free_List_unit,FUNCTION,"    * find ");
+                log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",bank);
+
 		// find
 		gpr_ack = true;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp	(revision 108)
@@ -36,6 +36,8 @@
 	if (not spr_ack)
 	  {
-	    // num_bank : MSB
-	    uint32_t bank = PORT_READ(in_PUSH_SPR_NUM_REG[i]) >> _param->_bank_spr_size_slot;
+// 	    // num_bank : MSB
+// 	    uint32_t bank = PORT_READ(in_PUSH_SPR_NUM_REG[i]) >> _param->_bank_spr_size_slot;
+	    // num_bank : LSB
+	    uint32_t bank = PORT_READ(in_PUSH_SPR_NUM_REG[i]) & _param->_mask_spr;
 	    
 	    if (not bank_use [bank])
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 108)
@@ -28,5 +28,5 @@
     if (PORT_READ(in_NRESET) == 0)
       {
-	internal_BANK_PRIORITY = 0;
+	reg_BANK_PRIORITY = 0;
 	for (uint32_t i=0; i<_param->_nb_bank; i++)
 	  {
@@ -59,7 +59,8 @@
             {
               log_printf(TRACE,Free_List_unit,FUNCTION,"  * PUSH_GPR[%d]",i);
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",internal_PUSH_GPR_BANK[i]);
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * num_reg : %d",PORT_READ(in_PUSH_GPR_NUM_REG [i]));
 
-              _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(//_param->_mask_gpr &
-                                                              PORT_READ(in_PUSH_GPR_NUM_REG [i]));
+              _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(PORT_READ(in_PUSH_GPR_NUM_REG [i]));
             }
 	// ==================================================
@@ -70,11 +71,12 @@
             {
               log_printf(TRACE,Free_List_unit,FUNCTION,"  * PUSH_SPR[%d]",i);
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",internal_PUSH_SPR_BANK[i]);
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * num_reg : %d",PORT_READ(in_PUSH_SPR_NUM_REG [i]));
 
-              _spr_list [internal_PUSH_SPR_BANK[i]].push_back(//_param->_mask_spr &
-                                                              PORT_READ(in_PUSH_SPR_NUM_REG [i]));
+              _spr_list [internal_PUSH_SPR_BANK[i]].push_back(PORT_READ(in_PUSH_SPR_NUM_REG [i]));
             }
 
-	if (_param->_priority == PRIORITY_ROUND_ROBIN)
-	  internal_BANK_PRIORITY = (internal_BANK_PRIORITY+1)%_param->_nb_bank_by_pop;
+ 	if (_param->_priority == PRIORITY_ROUND_ROBIN)
+          reg_BANK_PRIORITY = (reg_BANK_PRIORITY+1)%_param->_nb_bank_by_pop;
 
 #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true)
@@ -83,10 +85,11 @@
       
           log_printf(TRACE,Free_List_unit,FUNCTION,"  * Dump Free List");
-          
           for (uint32_t i=0; i<_param->_nb_bank; ++i)
             {
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * GPR [%d] - NB_ELT : %d",i,_gpr_list[i].size());
+
               uint32_t j=0;
-              for (std::list<Tgeneral_address_t>::iterator it=_gpr_list->begin();
-                   it!=_gpr_list->end();
+              for (std::list<Tgeneral_address_t>::iterator it=_gpr_list[i].begin();
+                   it!=_gpr_list[i].end();
                    )
                 {
@@ -95,5 +98,5 @@
                   for (uint32_t x=0; x<limit; x++)
                     {
-                      if (it==_gpr_list->end())
+                      if (it==_gpr_list[i].end())
                         break;
                       else
@@ -108,7 +111,9 @@
           for (uint32_t i=0; i<_param->_nb_bank; ++i)
             {
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * SPR [%d] - NB_ELT : %d",i,_spr_list[i].size());
+
               uint32_t j=0;
-              for (std::list<Tspecial_address_t>::iterator it=_spr_list->begin();
-                   it!=_spr_list->end();
+              for (std::list<Tspecial_address_t>::iterator it=_spr_list[i].begin();
+                   it!=_spr_list[i].end();
                    )
                 {
@@ -117,5 +122,5 @@
                   for (uint32_t x=0; x<limit; x++)
                     {
-                      if (it==_spr_list->end())
+                      if (it==_spr_list[i].end())
                         break;
                       else
@@ -132,7 +137,8 @@
 #ifdef DEBUG_TEST
         if (1)
+          for (uint32_t i=0; i<_param->_nb_bank; ++i)
           {
-            for (std::list<Tgeneral_address_t>::iterator it1=_gpr_list->begin();
-                 it1!=_gpr_list->end();
+            for (std::list<Tgeneral_address_t>::iterator it1=_gpr_list[i].begin();
+                 it1!=_gpr_list[i].end();
                  ++it1
                  )
@@ -141,5 +147,5 @@
 
                 it2 ++;
-                while (it2 != _gpr_list->end())
+                while (it2 != _gpr_list[i].end())
                   {
                     if (*it1 == *it2)
@@ -149,6 +155,6 @@
               }
 
-            for (std::list<Tspecial_address_t>::iterator it1=_spr_list->begin();
-                 it1!=_spr_list->end();
+            for (std::list<Tspecial_address_t>::iterator it1=_spr_list[i].begin();
+                 it1!=_spr_list[i].end();
                  ++it1
                  )
@@ -157,5 +163,5 @@
 
                 it2 ++;
-                while (it2 != _spr_list->end())
+                while (it2 != _spr_list[i].end())
                   {
                     if (*it1 == *it2)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp	(revision 108)
@@ -52,5 +52,5 @@
     _bank_gpr_size_slot    = size_general_register-log2(nb_bank);
 
-    _mask_gpr              = gen_mask<Tgeneral_address_t> (_bank_gpr_size_slot);
+    _mask_gpr              = gen_mask<Tgeneral_address_t> (log2(nb_bank));
 
     uint32_t spr_nb_slot   = nb_special_register - nb_thread*_nb_special_register_logic;
@@ -59,5 +59,5 @@
     _bank_spr_size_slot    = size_special_register-log2(nb_bank);
 
-    _mask_spr              = gen_mask<Tspecial_address_t> (_bank_spr_size_slot);
+    _mask_spr              = gen_mask<Tspecial_address_t> (log2(nb_bank));
 
     if (is_toplevel)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 108)
@@ -59,4 +59,7 @@
   ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE    ," in_RENAME_IN_NO_EXECUTE    ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ," in_RENAME_IN_IS_DELAY_SLOT ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS       ," in_RENAME_IN_ADDRESS       ",Taddress_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
   ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT  ," in_RENAME_IN_ADDRESS_NEXT  ",Taddress_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT  ," in_RENAME_IN_HAS_IMMEDIAT  ",Tcontrol_t        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -84,4 +87,7 @@
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_NO_EXECUTE   ,"out_RENAME_OUT_NO_EXECUTE   ",Tcontrol_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT,"out_RENAME_OUT_IS_DELAY_SLOT",Tcontrol_t        ,_param->_nb_inst_rename);
+#ifdef DEBUG
+  ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS      ,"out_RENAME_OUT_ADDRESS      ",Taddress_t        ,_param->_nb_inst_rename);
+#endif
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_ADDRESS_NEXT ,"out_RENAME_OUT_ADDRESS_NEXT ",Taddress_t        ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT ,"out_RENAME_OUT_HAS_IMMEDIAT ",Tcontrol_t        ,_param->_nb_inst_rename);
@@ -99,4 +105,6 @@
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_EXCEPTION_USE,"out_RENAME_OUT_EXCEPTION_USE",Texception_t      ,_param->_nb_inst_rename);
   ALLOC1_SC_SIGNAL(out_RENAME_OUT_EXCEPTION    ,"out_RENAME_OUT_EXCEPTION    ",Texception_t      ,_param->_nb_inst_rename);
+
+  ALLOC2_SC_SIGNAL( in_RETIRE_EVENT_STATE      ," in_RETIRE_EVENT_STATE      ",Tevent_state_t    ,_param->_nb_front_end,_param->_nb_context[it1]);
   
   /********************************************************
@@ -121,4 +129,7 @@
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_NO_EXECUTE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS       ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_ADDRESS_NEXT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_select, in_RENAME_IN_HAS_IMMEDIAT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -149,4 +160,7 @@
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_NO_EXECUTE   ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_IS_DELAY_SLOT,_param->_nb_inst_rename);
+#ifdef DEBUG
+  INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS      ,_param->_nb_inst_rename);
+#endif
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_ADDRESS_NEXT ,_param->_nb_inst_rename);
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_HAS_IMMEDIAT ,_param->_nb_inst_rename);
@@ -165,4 +179,6 @@
   INSTANCE1_SC_SIGNAL(_Rename_select,out_RENAME_OUT_EXCEPTION    ,_param->_nb_inst_rename);
 
+  INSTANCE2_SC_SIGNAL(_Rename_select, in_RETIRE_EVENT_STATE      ,_param->_nb_front_end, _param->_nb_context[it1]);
+
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
     
@@ -194,4 +210,8 @@
   SC_START(5);
   in_NRESET->write(1);  
+  
+  for (uint32_t i=0; i<_param->_nb_front_end; i++)
+    for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+      in_RETIRE_EVENT_STATE [i][j]->write(EVENT_STATE_NO_EVENT);
 
   LABEL("Loop of Test");
@@ -329,4 +349,7 @@
   delete []  in_RENAME_IN_NO_EXECUTE    ;
   delete []  in_RENAME_IN_IS_DELAY_SLOT ;
+#ifdef DEBUG
+  delete []  in_RENAME_IN_ADDRESS       ;
+#endif
   delete []  in_RENAME_IN_ADDRESS_NEXT  ;
   delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
@@ -354,4 +377,7 @@
   delete [] out_RENAME_OUT_NO_EXECUTE   ;
   delete [] out_RENAME_OUT_IS_DELAY_SLOT;
+#ifdef DEBUG
+  delete [] out_RENAME_OUT_ADDRESS      ;
+#endif
   delete [] out_RENAME_OUT_ADDRESS_NEXT ;
   delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
@@ -369,4 +395,6 @@
   delete [] out_RENAME_OUT_EXCEPTION_USE;
   delete [] out_RENAME_OUT_EXCEPTION    ;
+
+  DELETE2_SC_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_front_end, _param->_nb_context[it1]);
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h	(revision 108)
@@ -76,4 +76,7 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE    ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod]
+#ifdef DEBUG
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS       ;//[nb_front_end][nb_inst_decod]
+#endif
   public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS_NEXT  ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT  ;//[nb_front_end][nb_inst_decod]
@@ -102,4 +105,7 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_NO_EXECUTE   ;//[nb_inst_rename]
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename]
+#ifdef DEBUG
+  public    : SC_OUT(Taddress_t        )   ** out_RENAME_OUT_ADDRESS      ;//[nb_inst_rename]
+#endif
   public    : SC_OUT(Taddress_t        )   ** out_RENAME_OUT_ADDRESS_NEXT ;//[nb_inst_rename]
   public    : SC_OUT(Tcontrol_t        )   ** out_RENAME_OUT_HAS_IMMEDIAT ;//[nb_inst_rename]
@@ -117,4 +123,7 @@
   public    : SC_OUT(Texception_t      )   ** out_RENAME_OUT_EXCEPTION_USE;//[nb_inst_rename]
   public    : SC_OUT(Texception_t      )   ** out_RENAME_OUT_EXCEPTION    ;//[nb_inst_rename]
+
+    // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tevent_state_t    )  ***  in_RETIRE_EVENT_STATE      ;//[nb_front_end][nb_context]
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp	(revision 108)
@@ -97,4 +97,7 @@
 			<< (*(in_RENAME_IN_NO_EXECUTE    [i][j]))
 			<< (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]))
+#ifdef DEBUG
+			<< (*(in_RENAME_IN_ADDRESS       [i][j]))
+#endif
 			<< (*(in_RENAME_IN_ADDRESS_NEXT  [i][j]))
 			<< (*(in_RENAME_IN_HAS_IMMEDIAT  [i][j]))
@@ -119,4 +122,9 @@
 	      sensitive << (*(in_RENAME_IN_DEPTH         [i][j]));
 	    }
+
+// 	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+// 	  for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+//             sensitive << (*(in_RETIRE_EVENT_STATE [i][j]));
+
 	for (uint32_t i=0; i<_param->_nb_inst_rename; i++)
 	  sensitive << (*(in_RENAME_OUT_ACK          [i]));
@@ -163,4 +171,8 @@
 		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_IS_DELAY_SLOT [i][j]));
+#ifdef DEBUG
+		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_VAL           [i][j]));
+		  (*(out_RENAME_OUT_ADDRESS       [x])) (*(in_RENAME_IN_ADDRESS       [i][j]));
+#endif
 		  (*(out_RENAME_OUT_ADDRESS_NEXT  [x])) (*(in_RENAME_IN_VAL           [i][j]));
 		  (*(out_RENAME_OUT_ADDRESS_NEXT  [x])) (*(in_RENAME_IN_ADDRESS_NEXT  [i][j]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 108)
@@ -69,4 +69,7 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -99,4 +102,7 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   );
+#ifdef DEBUG
+      ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   );
+#endif
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   );
@@ -114,4 +120,11 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             );
+    }
+
+    // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE         ,"state"                ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 108)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -40,4 +41,7 @@
 	delete []  in_RENAME_IN_NO_EXECUTE    ;
 	delete []  in_RENAME_IN_IS_DELAY_SLOT ;
+#ifdef DEBUG
+	delete []  in_RENAME_IN_ADDRESS       ;
+#endif
 	delete []  in_RENAME_IN_ADDRESS_NEXT  ;
 	delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
@@ -66,4 +70,7 @@
 	delete [] out_RENAME_OUT_TYPE         ;
 	delete [] out_RENAME_OUT_OPERATION    ;
+#ifdef DEBUG
+	delete [] out_RENAME_OUT_ADDRESS      ;
+#endif
 	delete [] out_RENAME_OUT_ADDRESS_NEXT ;
 	delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
@@ -80,4 +87,6 @@
 	delete [] out_RENAME_OUT_NUM_REG_RE   ;
 	delete [] out_RENAME_OUT_EXCEPTION_USE;
+
+        DELETE2_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state);
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 108)
@@ -65,26 +65,54 @@
                 log_printf(TRACE,Rename_select,FUNCTION,"      * rename_out_ack       : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
 
+                Tcontext_t     front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0;
+                Tcontext_t     context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_IN_CONTEXT_ID   [x][y]):0;
+                
+                Tcontrol_t     no_execute   = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]));
+
+		Tcontrol_t read_ra  = (PORT_READ(in_RENAME_IN_READ_RA  [x][y]));
+		Tcontrol_t read_rb  = (PORT_READ(in_RENAME_IN_READ_RB  [x][y]));
+		Tcontrol_t read_rc  = (PORT_READ(in_RENAME_IN_READ_RC  [x][y]));
+		Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]));
+		Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]));
+
+                // Attention, j'ai enlevé event_state de la liste de sensibilité
+//                 Tevent_state_t event_state  = PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]);
+
+//                 Tcontrol_t     no_execute   = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or
+//                                                // ROB Flush
+//                                                ((event_state == EVENT_STATE_EVENT  ) or
+//                                                 (event_state == EVENT_STATE_WAITEND)));
+
+// 		Tcontrol_t read_ra  = (PORT_READ(in_RENAME_IN_READ_RA  [x][y]) and not no_execute);
+// 		Tcontrol_t read_rb  = (PORT_READ(in_RENAME_IN_READ_RB  [x][y]) and not no_execute);
+// 		Tcontrol_t read_rc  = (PORT_READ(in_RENAME_IN_READ_RC  [x][y]) and not no_execute);
+// 		Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and not no_execute);
+// 		Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and not no_execute);
+                
 		if (_param->_have_port_front_end_id)
-		PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i],PORT_READ(in_RENAME_IN_FRONT_END_ID  [x][y]));
+		PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i],front_end_id);
 		if (_param->_have_port_context_id)
-		PORT_WRITE(out_RENAME_OUT_CONTEXT_ID   [i],PORT_READ(in_RENAME_IN_CONTEXT_ID    [x][y]));
+                PORT_WRITE(out_RENAME_OUT_CONTEXT_ID   [i],context_id);
 		if (_param->_have_port_depth)
 		PORT_WRITE(out_RENAME_OUT_DEPTH        [i],PORT_READ(in_RENAME_IN_DEPTH         [x][y]));
 		PORT_WRITE(out_RENAME_OUT_TYPE         [i],PORT_READ(in_RENAME_IN_TYPE          [x][y]));
 		PORT_WRITE(out_RENAME_OUT_OPERATION    [i],PORT_READ(in_RENAME_IN_OPERATION     [x][y]));
-		PORT_WRITE(out_RENAME_OUT_NO_EXECUTE   [i],PORT_READ(in_RENAME_IN_NO_EXECUTE    [x][y]));
+		PORT_WRITE(out_RENAME_OUT_NO_EXECUTE   [i],no_execute);
 		PORT_WRITE(out_RENAME_OUT_IS_DELAY_SLOT[i],PORT_READ(in_RENAME_IN_IS_DELAY_SLOT [x][y]));
+#ifdef DEBUG
+		PORT_WRITE(out_RENAME_OUT_ADDRESS      [i],PORT_READ(in_RENAME_IN_ADDRESS       [x][y]));
+#endif
 		PORT_WRITE(out_RENAME_OUT_ADDRESS_NEXT [i],PORT_READ(in_RENAME_IN_ADDRESS_NEXT  [x][y]));
 		PORT_WRITE(out_RENAME_OUT_HAS_IMMEDIAT [i],PORT_READ(in_RENAME_IN_HAS_IMMEDIAT  [x][y]));
 		PORT_WRITE(out_RENAME_OUT_IMMEDIAT     [i],PORT_READ(in_RENAME_IN_IMMEDIAT      [x][y]));
-		PORT_WRITE(out_RENAME_OUT_READ_RA      [i],PORT_READ(in_RENAME_IN_READ_RA       [x][y]));
+		PORT_WRITE(out_RENAME_OUT_READ_RA      [i],read_ra);
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RA   [i],PORT_READ(in_RENAME_IN_NUM_REG_RA    [x][y]));
-		PORT_WRITE(out_RENAME_OUT_READ_RB      [i],PORT_READ(in_RENAME_IN_READ_RB       [x][y]));
+		PORT_WRITE(out_RENAME_OUT_READ_RB      [i],read_rb);
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RB   [i],PORT_READ(in_RENAME_IN_NUM_REG_RB    [x][y]));
-		PORT_WRITE(out_RENAME_OUT_READ_RC      [i],PORT_READ(in_RENAME_IN_READ_RC       [x][y]));
+		PORT_WRITE(out_RENAME_OUT_READ_RC      [i],read_rc);
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RC   [i],PORT_READ(in_RENAME_IN_NUM_REG_RC    [x][y]));
-		PORT_WRITE(out_RENAME_OUT_WRITE_RD     [i],PORT_READ(in_RENAME_IN_WRITE_RD      [x][y]));
+		PORT_WRITE(out_RENAME_OUT_WRITE_RD     [i],write_rd);
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RD   [i],PORT_READ(in_RENAME_IN_NUM_REG_RD    [x][y]));
-		PORT_WRITE(out_RENAME_OUT_WRITE_RE     [i],PORT_READ(in_RENAME_IN_WRITE_RE      [x][y]));
+		PORT_WRITE(out_RENAME_OUT_WRITE_RE     [i],write_re);
 		PORT_WRITE(out_RENAME_OUT_NUM_REG_RE   [i],PORT_READ(in_RENAME_IN_NUM_REG_RE    [x][y]));
 		PORT_WRITE(out_RENAME_OUT_EXCEPTION_USE[i],PORT_READ(in_RENAME_IN_EXCEPTION_USE [x][y]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp	(revision 108)
@@ -57,4 +57,7 @@
   ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ," in_RENAME_IN_NO_EXECUTE        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ," in_RENAME_IN_IS_DELAY_SLOT     ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ," in_RENAME_IN_ADDRESS           ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#endif
   ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ," in_RENAME_IN_ADDRESS_NEXT      ",Tgeneral_data_t   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ," in_RENAME_IN_HAS_IMMEDIAT      ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -81,4 +84,7 @@
   ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,"out_INSERT_NO_EXECUTE           ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,"out_INSERT_IS_DELAY_SLOT        ",Tcontrol_t        ,_param->_nb_inst_insert);
+#ifdef DEBUG
+  ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS              ,"out_INSERT_ADDRESS              ",Tgeneral_data_t   ,_param->_nb_inst_insert);
+#endif
   ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT         ,"out_INSERT_ADDRESS_NEXT         ",Tgeneral_data_t   ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,"out_INSERT_HAS_IMMEDIAT         ",Tcontrol_t        ,_param->_nb_inst_insert);
@@ -155,4 +161,7 @@
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -183,4 +192,7 @@
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
+#ifdef DEBUG
+  INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+#endif
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
@@ -297,4 +309,7 @@
   DELETE2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
   DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -322,4 +337,7 @@
   DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert);
+#ifdef DEBUG
+  DELETE1_SC_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert);
+#endif
   DELETE1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h	(revision 108)
@@ -78,4 +78,7 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_NO_EXECUTE        ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_IS_DELAY_SLOT     ;//[nb_front_end][nb_inst_decod]
+#ifdef DEBUG
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS           ;//[nb_front_end][nb_inst_decod]
+#endif
   public    : SC_IN (Taddress_t        )  ***  in_RENAME_IN_ADDRESS_NEXT      ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IN_HAS_IMMEDIAT      ;//[nb_front_end][nb_inst_decod]
@@ -104,4 +107,7 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_NO_EXECUTE           ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_IS_DELAY_SLOT        ;//[nb_inst_insert]
+#ifdef DEBUG
+  public    : SC_OUT(Taddress_t        )   ** out_INSERT_ADDRESS              ;//[nb_inst_insert]
+#endif
   public    : SC_OUT(Taddress_t        )   ** out_INSERT_ADDRESS_NEXT         ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_HAS_IMMEDIAT         ;//[nb_inst_insert]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 108)
@@ -69,4 +69,7 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE    ,"no_execute"   ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+      _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS       ,"address"      ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+#endif
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS_NEXT  ,"address_next" ,Taddress_t        ,_param->_size_instruction_address   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAS_IMMEDIAT  ,"has_immediat" ,Tcontrol_t        ,1                                   , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -99,4 +102,7 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE           ,"no_execute"           ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_OUT(out_INSERT_IS_DELAY_SLOT        ,"is_delay_slot"        ,Tcontrol_t        ,1                                   );
+#ifdef DEBUG
+      ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS              ,"address"              ,Taddress_t        ,_param->_size_instruction_address   );
+#endif
       ALLOC1_SIGNAL_OUT(out_INSERT_ADDRESS_NEXT         ,"address_next"         ,Taddress_t        ,_param->_size_instruction_address   );
       ALLOC1_SIGNAL_OUT(out_INSERT_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                                   );
@@ -301,4 +307,8 @@
 	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT",
 		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT");
+#ifdef DEBUG
+	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      ,
+		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS"      );
+#endif
 	    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
 		                dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
@@ -349,4 +359,8 @@
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH"       ,
 		              dest,"out_INSERT_"    +toString(i)+"_DEPTH"       );
+#ifdef DEBUG
+	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS"     ,
+		              dest,"out_INSERT_"    +toString(i)+"_ADDRESS"     );
+#endif
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS_NEXT",
 		              dest,"out_INSERT_"    +toString(i)+"_ADDRESS_NEXT");
@@ -412,4 +426,17 @@
 			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_EXCEPTION"    );
 	}
+
+      for (uint32_t i=0; i<_param->_nb_front_end; i++)
+        for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+          {
+            dest = _name;
+            
+#ifdef POSITION
+            _component->interface_map (src ,"retire_event_"+toString(i)+"_"+toString(j),
+                                       dest,"retire_event_"+toString(i)+"_"+toString(j));
+#endif     
+	    PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE",
+                                dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE");
+          }
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp	(revision 108)
@@ -37,4 +37,7 @@
         DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE        ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
         DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+#ifdef DEBUG
+        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address   );
+#endif
         DELETE2_SIGNAL( in_RENAME_IN_ADDRESS_NEXT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address   );
         DELETE2_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
@@ -62,4 +65,7 @@
         DELETE1_SIGNAL(out_INSERT_NO_EXECUTE           ,_param->_nb_inst_insert,1                                   );
         DELETE1_SIGNAL(out_INSERT_IS_DELAY_SLOT        ,_param->_nb_inst_insert,1                                   );
+#ifdef DEBUG
+        DELETE1_SIGNAL(out_INSERT_ADDRESS              ,_param->_nb_inst_insert,_param->_size_instruction_address   );
+#endif
         DELETE1_SIGNAL(out_INSERT_ADDRESS_NEXT         ,_param->_nb_inst_insert,_param->_size_instruction_address   );
         DELETE1_SIGNAL(out_INSERT_HAS_IMMEDIAT         ,_param->_nb_inst_insert,1                                   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 108)
@@ -13,4 +13,5 @@
 1	1	+1	# nb_inst_branch_complete                             
 1	1	+1	# nb_branch_speculated              [0][0]            [nb_front_end][nb_context]
+1	1	+1	# size_nb_inst_decod  
 1	1	+1	# nb_rename_unit_select                    
 1	1	+1	# nb_execute_loop_select                   
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 108)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h"
 
-#define NB_PARAMS 22
+#define NB_PARAMS 23
 
 void usage (int argc, char * argv[])
@@ -27,4 +27,5 @@
   err (_(" * nb_inst_branch_complete                                                 (uint32_t         )\n"));
   err (_(" * nb_branch_speculated              [nb_front_end][nb_context]            (uint32_t         )\n"));
+  err (_(" * size_nb_inst_decod                                                      (uint32_t         )\n"));
   err (_(" * nb_rename_unit_select                                                   (uint32_t         )\n"));
   err (_(" * nb_execute_loop_select                                                  (uint32_t         )\n"));
@@ -130,4 +131,5 @@
         _nb_branch_speculated [i][j] = fromString<uint32_t>(argv[x++]);
     }
+  uint32_t              _size_nb_inst_decod                = fromString<uint32_t         >(argv[x++]);
   uint32_t              _nb_rename_unit_select             = fromString<uint32_t         >(argv[x++]);
   uint32_t              _nb_execute_loop_select            = fromString<uint32_t         >(argv[x++]);
@@ -275,4 +277,5 @@
          _nb_inst_branch_complete          ,
          _nb_branch_speculated             ,
+         _size_nb_inst_decod               ,
          _nb_rename_unit_select            ,
          _nb_execute_loop_select           ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 108)
@@ -57,4 +57,7 @@
   ALLOC2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ," in_RENAME_NO_EXECUTE                ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ," in_RENAME_IS_DELAY_SLOT             ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS                   ," in_RENAME_ADDRESS                   ",Taddress_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#endif
   ALLOC2_SC_SIGNAL( in_RENAME_ADDRESS_NEXT              ," in_RENAME_ADDRESS_NEXT              ",Taddress_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ," in_RENAME_HAS_IMMEDIAT              ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -165,4 +168,5 @@
   ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_ALL               ,"out_NB_INST_COMMIT_ALL               ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
   ALLOC2_SC_SIGNAL(out_NB_INST_COMMIT_MEM               ,"out_NB_INST_COMMIT_MEM               ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
+  ALLOC2_SC_SIGNAL( in_NB_INST_DECOD_ALL                ," in_NB_INST_DECOD_ALL                ",Tcounter_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
 
   ALLOC2_SC_SIGNAL( in_DEPTH_MIN                        ," in_DEPTH_MIN                        ",Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -194,4 +198,7 @@
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#endif
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -315,4 +322,5 @@
   INSTANCE2_SC_SIGNAL(_OOO_Engine,out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1]);
   INSTANCE2_SC_SIGNAL(_OOO_Engine,out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  INSTANCE2_SC_SIGNAL(_OOO_Engine, in_NB_INST_DECOD_ALL                ,_param->_nb_front_end,_param->_nb_context[it1]);
   
   if (_param->_have_port_depth)
@@ -378,4 +386,7 @@
   DELETE2_SC_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+  DELETE2_SC_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#endif
   DELETE2_SC_SIGNAL( in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -484,4 +495,5 @@
   DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL(out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1]);
+  DELETE2_SC_SIGNAL( in_NB_INST_DECOD_ALL                ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL( in_DEPTH_MIN                        ,_param->_nb_front_end,_param->_nb_context[it1]);
   DELETE2_SC_SIGNAL( in_DEPTH_MAX                        ,_param->_nb_front_end,_param->_nb_context[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h	(revision 108)
@@ -77,4 +77,7 @@
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_NO_EXECUTE                ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_IS_DELAY_SLOT             ;//[nb_front_end][nb_inst_decod]
+#ifdef DEBUG
+  public    : SC_IN (Taddress_t        )  ***  in_RENAME_ADDRESS                   ;//[nb_front_end][nb_inst_decod]
+#endif
   public    : SC_IN (Taddress_t        )  ***  in_RENAME_ADDRESS_NEXT              ;//[nb_front_end][nb_inst_decod]
   public    : SC_IN (Tcontrol_t        )  ***  in_RENAME_HAS_IMMEDIAT              ;//[nb_front_end][nb_inst_decod]
@@ -194,4 +197,5 @@
   public    : SC_OUT(Tcounter_t        )  *** out_NB_INST_COMMIT_ALL               ;//[nb_front_end][nb_context]
   public    : SC_OUT(Tcounter_t        )  *** out_NB_INST_COMMIT_MEM               ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcounter_t        )  ***  in_NB_INST_DECOD_ALL                ;//[nb_front_end][nb_context]
                                                                                    
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 108)
@@ -134,4 +134,5 @@
                         uint32_t              nb_inst_branch_complete          ,
                         uint32_t           ** nb_branch_speculated             ,//[nb_front_end][nb_context]
+                        uint32_t              size_nb_inst_decod               ,
                         uint32_t              nb_rename_unit_select            ,
                         uint32_t              nb_execute_loop_select           ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 108)
@@ -66,4 +66,7 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE                ,"NO_EXECUTE"                ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT             ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#ifdef DEBUG
+      _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS                   ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+#endif
       _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS_NEXT              ,"ADDRESS_NEXT"              ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT              ,"HAS_IMMEDIAT"              ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -158,5 +161,5 @@
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
     {
-      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
+      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_branch_complete);
 
       ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL              , VAL);
@@ -219,4 +222,5 @@
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL               ,"COMMIT_ALL"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM               ,"COMMIT_MEM"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL                ,"DECOD_ALL"                  ,Tcounter_t       ,_param->_size_nb_inst_decod          ,_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
@@ -413,4 +417,8 @@
                     PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
                                         dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
+#ifdef DEBUG
+                    PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS"      ,
+                                        dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_ADDRESS"      );
+#endif
                     PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS_NEXT" ,
                                         dest, "in_RENAME_"   +toString(j)+"_"+toString(k)+"_ADDRESS_NEXT" );
@@ -477,4 +485,8 @@
             COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_IS_DELAY_SLOT" ,
                                      dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
+#ifdef DEBUG
+            COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_ADDRESS"       ,
+                                     dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS"       );
+#endif
             COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)                +"_ADDRESS_NEXT"  ,
                                      dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT"  );
@@ -755,4 +767,5 @@
 
             //    in_INSERT_DEPTH          - component_rename_unit
+            //    in_INSERT_ADDRESS        - component_rename_unit
             //    in_INSERT_ADDRESS_NEXT   - component_rename_unit
             //    in_INSERT_EXCEPTION_USE  - component_rename_unit
@@ -991,4 +1004,6 @@
             PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM",
                                 dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM");
+            PORT_MAP(_component,src , "in_NB_INST_"+toString(i)+"_"+toString(j)+"_DECOD_ALL" ,
+                                dest, "in_NB_INST_"+toString(i)+"_"+toString(j)+"_DECOD_ALL" );
           }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 108)
@@ -36,4 +36,7 @@
         DELETE2_SIGNAL( in_RENAME_NO_EXECUTE                ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
         DELETE2_SIGNAL( in_RENAME_IS_DELAY_SLOT             ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
+#ifdef DEBUG
+        DELETE2_SIGNAL( in_RENAME_ADDRESS                   ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_instruction_address    );
+#endif
         DELETE2_SIGNAL( in_RENAME_ADDRESS_NEXT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_instruction_address    );
         DELETE2_SIGNAL( in_RENAME_HAS_IMMEDIAT              ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1                                    );
@@ -142,4 +145,5 @@
         DELETE2_SIGNAL(out_NB_INST_COMMIT_ALL               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_nb_inst_commit         );
         DELETE2_SIGNAL(out_NB_INST_COMMIT_MEM               ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_nb_inst_commit         );
+        DELETE2_SIGNAL( in_NB_INST_DECOD_ALL                ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_nb_inst_decod          );
         DELETE2_SIGNAL( in_DEPTH_MIN                        ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth                  );
         DELETE2_SIGNAL( in_DEPTH_MAX                        ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth                  );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 106)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 108)
@@ -31,4 +31,5 @@
                           uint32_t              nb_inst_branch_complete          ,
                           uint32_t           ** nb_branch_speculated             ,//[nb_front_end][nb_context]
+                          uint32_t              size_nb_inst_decod               ,
                           uint32_t              nb_rename_unit_select            ,
                           uint32_t              nb_execute_loop_select           ,
@@ -242,4 +243,5 @@
        _nb_inst_branch_complete ,
        _nb_branch_speculated    ,
+        size_nb_inst_decod      ,
         size_general_data       ,
         size_store_queue_ptr    ,
@@ -336,4 +338,5 @@
         _size_rob_ptr                      = size_packet_id;
         _size_nb_inst_commit               = log2(size_re_order_buffer)+1;
+        _size_nb_inst_decod                = size_nb_inst_decod;
 
         _have_port_front_end_id            = _size_front_end_id   > 0;
