Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameter_affectation.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameter_affectation.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameter_affectation.h (revision 109) @@ -25,5 +25,5 @@ // Constant public : const std::string _name ; - public : const std::string _value; + public : std::string _value; public : bool _use ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration.cpp (revision 109) @@ -42,5 +42,6 @@ debug_init (fromString(_simulator->getParam("debug_level")), fromString (_simulator->getParam("debug_cycle_start")), - fromString (_simulator->getParam("debug_cycle_stop"))); + fromString (_simulator->getParam("debug_cycle_stop")), + fromString (_simulator->getParam("debug_cycle_idle"))); log_init(fromString(_simulator->getParam("debug_have_log_file")), Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 109) @@ -220,22 +220,24 @@ for (uint32_t k=0; k_timing [i][j][k]._latence = fromString (getParam("latence", - "functionnal_unit",toString(i).c_str(), - "type" ,toString(j).c_str(), - "operation" ,toString(k).c_str(), - "")); - _param->_timing [i][j][k]._delay = fromString (getParam("delay", - "functionnal_unit",toString(i).c_str(), - "type" ,toString(j).c_str(), - "operation" ,toString(k).c_str(), - "")); - } - else - { - _param->_timing [i][j][k]._latence = 0; - _param->_timing [i][j][k]._delay = 0; - } + { + if (is_type_valid(j) and (j != TYPE_MEMORY))// A functional unit can't execute memory instruction + { + _param->_timing [i][j][k]._latence = fromString (getParam("latence", + "functionnal_unit",toString(i).c_str(), + "type" ,toString(j).c_str(), + "operation" ,toString(k).c_str(), + "")); + _param->_timing [i][j][k]._delay = fromString (getParam("delay", + "functionnal_unit",toString(i).c_str(), + "type" ,toString(j).c_str(), + "operation" ,toString(k).c_str(), + "")); + } + else + { + _param->_timing [i][j][k]._latence = 0; + _param->_timing [i][j][k]._delay = 0; + } + } } } @@ -247,5 +249,5 @@ //log_printf(INFO,Configuration,FUNCTION,_("ICACHE_PORT")); - _param->_nb_icache_port = fromString(getParam("nb_icache_port" , "")); + _param->_nb_icache_port = fromString(getParam("nb_icache_port" , "")); _param->_icache_port_priority = fromString(getParam("icache_port_priority" , "")); _param->_icache_port_load_balancing = fromString(getParam("icache_port_load_balancing", "")); @@ -512,5 +514,5 @@ getLink_2("link_execute_unit_with_functionnal_unit",toString(i).c_str(), ""); _param->_link_execute_unit_with_functionnal_unit [i] = pair_dual(fromString(dest[0]), - fromString(dest[1])); + fromString(dest[1])); } @@ -519,5 +521,5 @@ getLink_2("link_execute_unit_with_load_store_unit",toString(i).c_str(), ""); _param->_link_execute_unit_with_load_store_unit [i] = pair_dual(fromString(dest[0]), - fromString(dest[1])); + fromString(dest[1])); for (uint32_t j=0; j<_param->_nb_cache_port[i]; ++j) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp (revision 109) @@ -26,5 +26,5 @@ XMLLightVector vect = xml->getNodes(); - + for (uint32_t i=0; igetName(); +// log_printf(TRACE,Configuration,FUNCTION," * child_name : %s",child_name.c_str()); + //-------------------------------------------- // Child : Parameter @@ -44,4 +46,6 @@ attribute_t value_name = getAttribute(child,attributes,"name" ); attribute_t value = getAttribute(child,attributes,"value"); + +// log_printf(TRACE,Configuration,FUNCTION," * parameter \"%s\" = %s",value_name.c_str(), value.c_str()); testAttributesEmpty(child,attributes); @@ -70,4 +74,6 @@ attributes_t attributes = child->getAttributes(); attribute_t value_name = getAttribute(child,attributes,"name"); + +// log_printf(TRACE,Configuration,FUNCTION," * link \"%s\"",value_name.c_str()); // Test, must have src or dest (or twice) @@ -80,4 +86,5 @@ attribute_t value_src = (have_src )?getAttribute(child,attributes,"src" ):id; attribute_t value_dest = (have_dest)?getAttribute(child,attributes,"dest"):id; + testAttributesEmpty(child,attributes); @@ -111,4 +118,6 @@ if (child_name == "timing") { +// log_printf(TRACE,Configuration,FUNCTION," * timing"); + // Notation : // @@ -183,46 +192,27 @@ } //-------------------------------------------- - // Child : Other (node) + // Child : Other (component) //-------------------------------------------- else { +// log_printf(TRACE,Configuration,FUNCTION," * component"); + testSingleton (child,false); attributes_t attributes = child->getAttributes(); - attribute_t value_id = getAttribute(child,attributes,"id"); + attribute_t value_ids = getAttribute(child,attributes,"id"); attribute_t value_type = child->getName(); - - testAttributesEmpty(child,attributes); - - // Create a new component + + testAttributesEmpty(child,attributes); + + // Test if counter is an parameters + std::string name_counter = "nb_"+value_type; + { - Instance_component * param = new Instance_component(value_type, // type - value_id); - -// log_printf(TRACE,Configuration,FUNCTION,"%s.%s",value_type.c_str(),value_id.c_str()); -// log_printf(TRACE,Configuration,FUNCTION," * %d",((*list_components)[value_type]).size()); - - // Test if this id is previously used - if (((*list_components)[value_type]).find(value_id) != ((*list_components)[value_type]).end()) - throw ERRORMORPHEO(FUNCTION,toString(_("A Component \"%s\" with id \"%s\" is previously declared.\n"),value_type.c_str(),value_id.c_str())); - - ((*list_components)[value_type])[value_id] = param; - } - - // Test if counter is an parameters - { - std::string name_counter = "nb_"+value_type; -// std::cout << name_counter << std::endl; - if (list_parameters->find(name_counter) == list_parameters->end()) { - // Scearch all occurante of this type - uint32_t nb_counter = xml->getNodes(value_type).size(); -// std::cout << " * " << nb_counter << std::endl; - // Insert in array Parameter_affectation * param = new Parameter_affectation(name_counter, // type - toString(nb_counter)); - + "0"); // insert parameter (*list_parameters)[name_counter] = param; @@ -230,11 +220,45 @@ } - // Recursive function - fromXMLLight (child, - ((id=="")?value_id:(id+"."+value_id)), // construction of identificator - ((*list_components)[value_type])[value_id]->_list_parameters, -// ((*list_components)[value_type])[value_id]->_list_links, - list_links, - ((*list_components)[value_type])[value_id]->_list_components); + size_t index_begin = 0; + while (index_begin != std::string::npos) + { + size_t index_end = value_ids.find_first_of(",",index_begin+1); + + size_t index_min = (index_begin==0)?index_begin:(index_begin+1); + size_t index_max = index_end-index_min; + attribute_t value_id = value_ids.substr(index_min, index_max); + +// log_printf(TRACE,Configuration,FUNCTION," * component \"%s\" - %s",value_type.c_str(), value_id.c_str()); + + index_begin = index_end; + + // Create a new component + { + Instance_component * param = new Instance_component(value_type, // type + value_id); + +// log_printf(TRACE,Configuration,FUNCTION,"%s.%s",value_type.c_str(),value_id.c_str()); +// log_printf(TRACE,Configuration,FUNCTION," * %d",((*list_components)[value_type]).size()); + + // Test if this id is previously used + if (((*list_components)[value_type]).find(value_id) != ((*list_components)[value_type]).end()) + throw ERRORMORPHEO(FUNCTION,toString(_("A Component \"%s\" with id \"%s\" is previously declared.\n"),value_type.c_str(),value_id.c_str())); + + ((*list_components)[value_type])[value_id] = param; + } + + // Increase occurence counter + { + (*list_parameters)[name_counter]->_value = toString(fromString((*list_parameters)[name_counter]->_value)+1); + } + + // Recursive function + fromXMLLight (child, + ((id=="")?value_id:(id+"."+value_id)), // construction of identificator + ((*list_components)[value_type])[value_id]->_list_parameters, +// ((*list_components)[value_type])[value_id]->_list_links, + list_links, + ((*list_components)[value_type])[value_id]->_list_components); + } } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Parameter_affectation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Parameter_affectation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Parameter_affectation.cpp (revision 109) @@ -17,10 +17,10 @@ Parameter_affectation::Parameter_affectation (std::string name , std::string value ): - _name (name ), - _value (value ) + _name (name ) { log_begin(Configuration,FUNCTION); - _use = false; + _value = value; + _use = false; log_end(Configuration,FUNCTION); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp (revision 109) @@ -29,6 +29,19 @@ for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) { - PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k])); - PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [i][j] ,PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k])); + log_printf(TRACE,Core_Glue,FUNCTION," * INSERT_OOO_ENGINE [%d][%d] <-> INSERT_EXECUTE_LOOP [%d][%d][%d]",num_ooo_engine,k,i,j,k); + + Tcontrol_t ooo_engine_val = PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k]); + Tcontrol_t execute_loop_ack = PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]); + + Tcontrol_t execute_loop_val = ooo_engine_val ; + Tcontrol_t ooo_engine_ack = execute_loop_ack; + + log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_val (r) : %d",ooo_engine_val ); + log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_ack (w) : %d",ooo_engine_ack ); + log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_val (w) : %d",execute_loop_val); + log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_ack (r) : %d",execute_loop_ack); + + PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],ooo_engine_ack ); + PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],execute_loop_val); PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_USE [num_ooo_engine][k])); PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_NUM_REG [num_ooo_engine][k])); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp (revision 109) @@ -56,4 +56,23 @@ _table_execute_type = table_execute_type ; _table_execute_thread = table_execute_thread; + + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," * table_routing [nb_read_unit][nb_execute_unit][nb_execute_unit_port]"); + for (uint32_t i=0; i<_nb_read_unit; ++i) + for (uint32_t j=0; j<_nb_execute_unit; ++j) + for (uint32_t k=0; k<_nb_execute_unit_port[j]; ++k) + if (_table_routing [i][j][k]) + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," [%d][%d][%d] -> true",i,j,k); + + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," * table_execute_type [nb_execute_unit][nb_type]"); + for (uint32_t i=0; i<_nb_execute_unit; ++i) + for (uint32_t j=0; j<_nb_type; ++j) + if (_table_execute_type [i][j]) + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," [%d][%d] -> true",i,j); + + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," * table_execute_thread [nb_execute_unit][nb_thread]"); + for (uint32_t i=0; i<_nb_execute_unit; ++i) + for (uint32_t j=0; j<_nb_thread; ++j) + if (_table_execute_thread [i][j]) + log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," [%d][%d] -> true",i,j); _max_nb_read_unit_port = max(_nb_read_unit_port, _nb_read_unit); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp (revision 109) @@ -42,41 +42,4 @@ // TYPE_MEMORY | | | X | - bool type_valid [_nb_type]; - bool type_uniq [_nb_type]; // one thread can have multiple destination for this type ? - bool type_optionnal [_nb_type]; // this type is optionnal ? - bool type_exclusive [_nb_type]; // a unit that implement this type must be implement an another type ? - - for (Ttype_t i=0; i<_nb_type; i++) - { - type_valid [i] = false; - type_uniq [i] = false; - type_optionnal [i] = false; - type_exclusive [i] = false; - } - - type_valid [TYPE_ALU ] = true; - type_valid [TYPE_SHIFT ] = true; - type_valid [TYPE_MOVE ] = true; - type_valid [TYPE_TEST ] = true; - type_valid [TYPE_MUL ] = true; - type_valid [TYPE_DIV ] = true; - type_valid [TYPE_EXTEND ] = true; - type_valid [TYPE_FIND ] = true; - type_valid [TYPE_SPECIAL] = true; - type_valid [TYPE_CUSTOM ] = true; - type_valid [TYPE_BRANCH ] = true; - type_valid [TYPE_MEMORY ] = true; - - type_uniq [TYPE_SPECIAL] = true; - type_uniq [TYPE_CUSTOM ] = true; - type_uniq [TYPE_MEMORY ] = true; - - type_optionnal [TYPE_DIV ] = true; - type_optionnal [TYPE_EXTEND ] = true; - type_optionnal [TYPE_FIND ] = true; - type_optionnal [TYPE_CUSTOM ] = true; - - type_exclusive [TYPE_MEMORY ] = true; - bool type_present [_nb_thread][_nb_type]; for (uint32_t i=0; i<_nb_thread; i++) @@ -94,5 +57,5 @@ // Test uniq type - if (type_present [j][k] and type_uniq[k]) + if (type_present [j][k] and is_type_uniq(k)) test.error(toString(_("The execute_unit '%d' can execute operation of type '%s' at the thread '%d'. But an another execute_unit can be execute the same type for the same thread. And the type must be single !.\n"),i,toString(k).c_str(),j)); @@ -101,5 +64,5 @@ for (Ttype_t j=0; j<_nb_type; j++) - if (not type_valid [j]) + if (not is_type_valid(j)) for (uint32_t i=0; i<_nb_thread; i++) if (type_present [i][j]) @@ -107,5 +70,5 @@ for (Ttype_t j=0; j<_nb_type; j++) - if (type_valid [j] and not type_optionnal[j]) + if (is_type_valid(j) and not is_type_optionnal(j)) for (uint32_t i=0; i<_nb_thread; i++) if (not type_present [i][j]) @@ -115,5 +78,5 @@ for (uint32_t i=0; i<_nb_execute_unit; i++) for (Ttype_t j=0; j<_nb_type; j++) - if (type_exclusive [j] and _table_execute_type[i][j]) + if (is_type_exclusive(j) and _table_execute_type[i][j]) for (Ttype_t k=0; k<_nb_type; k++) if ((j != k) and (_table_execute_type[i][k] == true)) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 109) @@ -156,9 +156,15 @@ if (timing[x][j][k]._latence > 0) { - log_printf(TRACE,Execute_loop,FUNCTION,"Execute unit '%d' (functional unit '%d') can execute type '%s'.",i,x,toString(j).c_str()); + log_printf(TRACE,Execute_loop,FUNCTION," * Execute unit '%d' (functional unit '%d') can execute type '%s'.",i,x,toString(j).c_str()); _read_unit_to_execution_unit_table_execute_type [i][j] = true; break; // find an operation } } + + for (uint32_t i=0; i<_nb_load_store_unit; ++i) + log_printf(TRACE,Execute_loop,FUNCTION," * Load_store_unit [%d] - nb_inst : %d",i,_nb_inst_memory [i]); + for (uint32_t i=0; i<_nb_functionnal_unit; ++i) + log_printf(TRACE,Execute_loop,FUNCTION," * Functionnal_unit [%d] - nb_inst : %d",i,_nb_inst_functionnal_unit [i]); + for (uint32_t i=0; i<_nb_execute_unit; i++) @@ -170,4 +176,6 @@ else _nb_execute_unit_port [i] = _nb_inst_functionnal_unit [x]; + + log_printf(TRACE,Execute_loop,FUNCTION," * Execute unit [%d] (%d) - nb_inst : %d",i,x,_nb_execute_unit_port [i]); } @@ -245,4 +253,6 @@ for (uint32_t k=0; k<_nb_write_unit; k++) { + log_printf(TRACE,Execute_loop,FUNCTION," * Execution_unit_to_write_unit_table_routing [%d][%d][%d]",x,y,k); + // Test if this execute_unit can send operation at this write_unit // Test if have not a previous link ! (a same read_unit can send operation à two execute_unit and each execute_unit send at the same write_unit) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 109) @@ -24,12 +24,10 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_context ; - public : uint32_t _nb_inst_decod ; - public : uint32_t _size_queue ; -//public : uint32_t _size_general_data ; - public : uint32_t * _nb_branch_speculated ; //[nb_context] - - public : uint32_t _nb_bank ; - public : uint32_t _size_bank ; + public : uint32_t _nb_context ; + public : uint32_t _nb_inst_decod ; + public : uint32_t _size_queue ; +//public : uint32_t _size_general_data ; + public : uint32_t * _nb_branch_speculated ; //[nb_context] + public : uint32_t _nb_instruction_in_queue; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp (revision 109) @@ -29,5 +29,5 @@ //-------------------------------------------------------------------- { - Tcontrol_t ack = reg_QUEUE->size() < _param->_size_bank; + Tcontrol_t ack = reg_QUEUE->size() < _param->_size_queue; for (uint32_t i=0; i<_param->_nb_inst_decod; i++) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp (revision 109) @@ -145,11 +145,10 @@ it++) { - log_printf(TRACE,Decod_queue,FUNCTION," * [%d] ",x); - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) { if ((*it)->_val [i]) - log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" - ,i + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" + ,x + ,i ,(*it)->_val [i] ,(*it)->_context_id [i] @@ -177,6 +176,7 @@ ); else - log_printf(TRACE,Decod_queue,FUNCTION," * [%d] %d" - ,i + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %d" + ,x + ,i ,(*it)->_val [i] ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 109) @@ -29,12 +29,10 @@ log_begin(Decod_queue,FUNCTION); - _nb_context = nb_context ; - _nb_inst_decod = nb_inst_decod ; - _size_queue = size_queue ; -// _size_general_data = size_general_data ; - _nb_branch_speculated = nb_branch_speculated; - - _nb_bank = _nb_inst_decod ; - _size_bank = _size_queue / _nb_bank; + _nb_context = nb_context ; + _nb_inst_decod = nb_inst_decod ; + _size_queue = size_queue/nb_inst_decod; +// _size_general_data = size_general_data ; + _nb_branch_speculated = nb_branch_speculated; + _nb_instruction_in_queue = size_queue; test(); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp (revision 109) @@ -27,6 +27,6 @@ Parameters_test test ("Decod_queue"); - if (not is_multiple(_size_queue, _nb_inst_decod)) - test.error(_("size_queue must be a multiple of nb_inst_decod.\n")); + if (not is_multiple (_nb_instruction_in_queue,_nb_inst_decod)) + test.error("Size of decod queue must be a multiple of nb_instruction.\n"); log_end(Decod_queue,FUNCTION); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg (revision 109) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg (revision 109) @@ -0,0 +1,5 @@ +Ifetch_queue +1 1 *2 # _size_queue +1 1 *2 # _nb_instruction +1 1 *2 # _size_branch_update_prediction +32 32 *2 # _size_general_data Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg (revision 109) @@ -1,4 +1,4 @@ Ifetch_queue -1 8 *2 # _size_queue +8 16 *2 # _size_queue 1 8 *2 # _nb_instruction 1 1 *2 # _size_branch_update_prediction Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 109) @@ -28,4 +28,5 @@ //public : uint32_t _size_branch_update_prediction ; //public : uint32_t _size_general_data ; + public : uint32_t _nb_instruction_in_queue ; //public : uint32_t _size_queue_ptr ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 109) @@ -27,5 +27,6 @@ log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); - _size_queue = size_queue ; + _nb_instruction_in_queue = size_queue ; + _size_queue = size_queue/nb_instruction ; _nb_instruction = nb_instruction ; // _size_branch_update_prediction = size_branch_update_prediction; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 109) @@ -27,4 +27,7 @@ Parameters_test test ("Ifetch_queue"); + if (not is_multiple (_nb_instruction_in_queue,_nb_instruction)) + test.error("Size of ifetch queue must be a multiple of nb_instruction.\n"); + if (_size_queue == 1) test.warning("To best perfomance, size_queue must be > 1.\n"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 109) @@ -18,4 +18,10 @@ namespace prediction_unit { namespace update_prediction_table { + + typedef enum + { + EVENT_SOURCE_UFPT, + EVENT_SOURCE_UPT + } event_source_t; typedef enum @@ -115,4 +121,16 @@ }; // end namespace core }; // end namespace behavioural + + template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_source_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_SOURCE_UFPT : return "ufpt"; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_SOURCE_UPT : return "upt" ; break; + default : return ""; break; + } + }; + + template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_state_t& x) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 109) @@ -183,4 +183,5 @@ private : event_state_t * reg_EVENT_STATE ; //[nb_context] + private : event_source_t * reg_EVENT_SOURCE ; //[nb_context] private : Tdepth_t * reg_EVENT_DEPTH ; //[nb_context] private : Taddress_t * reg_EVENT_ADDRESS_SRC ; //[nb_context] // Address branch Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 109) @@ -209,9 +209,10 @@ ALLOC1(reg_EVENT_UPT_PTR ,uint32_t ,_param->_nb_context); - ALLOC1(reg_EVENT_STATE ,event_state_t,_param->_nb_context); - ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); - ALLOC1(reg_EVENT_ADDRESS_SRC ,Taddress_t ,_param->_nb_context); - ALLOC1(reg_EVENT_ADDRESS_DEST_VAL ,Tcontrol_t ,_param->_nb_context); - ALLOC1(reg_EVENT_ADDRESS_DEST ,Taddress_t ,_param->_nb_context); + ALLOC1(reg_EVENT_STATE ,event_state_t ,_param->_nb_context); + ALLOC1(reg_EVENT_SOURCE ,event_source_t,_param->_nb_context); + ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); + ALLOC1(reg_EVENT_ADDRESS_SRC ,Taddress_t ,_param->_nb_context); + ALLOC1(reg_EVENT_ADDRESS_DEST_VAL ,Tcontrol_t ,_param->_nb_context); + ALLOC1(reg_EVENT_ADDRESS_DEST ,Taddress_t ,_param->_nb_context); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 109) @@ -163,4 +163,5 @@ DELETE1(reg_EVENT_STATE ,_param->_nb_context); + DELETE1(reg_EVENT_SOURCE ,_param->_nb_context); DELETE1(reg_EVENT_DEPTH ,_param->_nb_context); DELETE1(reg_EVENT_ADDRESS_SRC ,_param->_nb_context); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 109) @@ -234,4 +234,5 @@ reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; } + reg_EVENT_SOURCE [context] = EVENT_SOURCE_UFPT; // Flush UPFT @@ -506,7 +507,7 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); if (miss) @@ -517,70 +518,98 @@ // Flush UPT - uint32_t top = reg_UPT_TOP [context]; - uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; - - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); - - for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; - j!=top; - j=(j+1)%_param->_size_upt_queue[context]) - reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; + uint32_t top = reg_UPT_TOP [context]; + uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; + + Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; + event_state_t event_state = reg_EVENT_STATE [context]; + bool previous_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or + (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or + (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or + (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) or + ((event_state == EVENT_STATE_UPDATE_CONTEXT ) and + (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT))); +// bool update_ras = (new_update != depth); + + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_event : %d",previous_event); + + if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) + { + for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; + j!=top; + j=(j+1)%_param->_size_upt_queue[context]) + reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; + - -// reg_UPT_BOTTOM [context]; - reg_UPT_TOP [context] = depth; - reg_UPT_TOP_EVENT [context] = top; - - if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) - reg_UPT_EMPTY [context] = true; - +// reg_UPT_BOTTOM [context]; + reg_UPT_TOP [context] = depth; +// reg_UPT_TOP_EVENT [context] = top; + + if (not previous_event) + { + reg_UPT_TOP_EVENT [context] = top; + reg_UPT_UPDATE [context] = new_update; + } + else + { + // Have event. Top index this slot + + switch (reg_UPDATE_PREDICTION_TABLE [context][top]._state) + { + case UPDATE_PREDICTION_STATE_END_KO : + { + // Have already update predictor + reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; + break; + } + case UPDATE_PREDICTION_STATE_KO : + { + // Doesn't have update predictor + reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; + break; + } + default : + { #ifdef DEBUG_TEST - if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) - throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); -#endif - - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); - reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; - - Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; - event_state_t event_state = reg_EVENT_STATE [context]; - bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or - (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or - (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or - (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); -// bool update_ras = (new_update != depth); - -// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_update_ras : %d",previous_update_ras); - - if (reg_UFPT_NB_NEED_UPDATE [context] > 0) - { - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); - reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; + throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); +#endif + } + } + } + + if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) + reg_UPT_EMPTY [context] = true; + + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); + reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; + + if (reg_UFPT_NB_NEED_UPDATE [context] > 0) + { + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); + reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; + } + else + { +// if (not previous_update_ras) + { + // have ras prediction ? + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); + + reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; + + } + } + reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; + + // else no update + + reg_EVENT_DEPTH [context] = depth; + reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State + reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; + reg_EVENT_ADDRESS_DEST [context] = good_addr; } - else - { -// if (not previous_update_ras) - { - // have ras prediction ? - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); - - reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; - - } - } - - if (not previous_update_ras) - { - reg_UPT_UPDATE [context] = new_update; - } - // else no update - - reg_EVENT_DEPTH [context] = depth; - reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State - reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; - reg_EVENT_ADDRESS_DEST [context] = good_addr; - } + } else { @@ -901,4 +930,5 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_SOURCE : %s" ,toString(reg_EVENT_SOURCE[i]).c_str()); log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]<<2); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 109) @@ -222,4 +222,6 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : double ** _nb_cycle_idle; + private : std::list * _rob ;//[nb_bank] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 109) @@ -279,4 +279,5 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + ALLOC2(_nb_cycle_idle ,double ,_param->_nb_front_end,_param->_nb_context [it1]); ALLOC1(_rob ,std::list,_param->_nb_bank); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 109) @@ -187,4 +187,5 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + DELETE2(_nb_cycle_idle ,_param->_nb_front_end,_param->_nb_context [it1]); DELETE1(_rob ,_param->_nb_bank); DELETE1(reg_BANK_PTR ,_param->_nb_bank); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 109) @@ -58,6 +58,12 @@ _stat->create_expr_average_by_cycle("average_inst_retire" , "+ "+sum_nb_inst_retire_ok+" "+sum_nb_inst_retire_ko, "", _("Average instruction retire by cycle")); - _stat->create_expr ("IPC", "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle"); - _stat->create_expr ("CPI", "/ 1 IPC" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction"); + _stat->create_expr ("IPC_ok" , "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)"); + _stat->create_expr ("CPI_ok" , "/ 1 IPC_ok" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok)"); + + _stat->create_expr ("IPC_ko" , "average_inst_retire_ko", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)"); + _stat->create_expr ("CPI_ko" , "/ 1 IPC_ko" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ko)"); + + _stat->create_expr ("IPC_all", "average_inst_retire" , TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)"); + _stat->create_expr ("CPI_all", "/ 1 IPC_all" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok and Ko)"); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 109) @@ -41,4 +41,6 @@ for (uint32_t j=0; j<_param->_nb_context [i]; j++) { + _nb_cycle_idle [i][j] = 0; + reg_NB_INST_COMMIT_ALL [i][j] = 0; reg_NB_INST_COMMIT_MEM [i][j] = 0; @@ -59,4 +61,9 @@ else { + // Increase number idle cycle + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context [i]; j++) + _nb_cycle_idle [i][j] ++; + // Compute next priority _priority_insert->transition(); @@ -402,4 +409,7 @@ _rob [i].pop_front(); delete entry; + + // Transaction on retire interface : reset watch dog timer. + _nb_cycle_idle [front_end_id][context_id] = 0; } @@ -759,4 +769,10 @@ #endif + // Stop Condition + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context [i]; j++) + if (_nb_cycle_idle [i][j] >= debug_cycle_idle) + throw ERRORMORPHEO(FUNCTION,toString(_("Context [%d][%d] is idle since %.0f cycles.\n"),i,j,_nb_cycle_idle [i][j])); + log_end(Commit_unit,FUNCTION); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp (revision 109) @@ -45,5 +45,5 @@ if (internal_BANK_IN_ACK [i]) { - entry_t* entry = NULL; + entry_t * entry = NULL; if (internal_BANK_IN_IS_REEXECUTE [i]) @@ -53,4 +53,5 @@ if (PORT_READ(in_REEXECUTE_VAL [y])) { + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with REEXECUTE [%d]",i,y); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) @@ -62,20 +63,20 @@ (_param->_have_port_front_end_id )?PORT_READ(in_REEXECUTE_FRONT_END_ID [y]):0, (_param->_have_port_rob_ptr )?PORT_READ(in_REEXECUTE_PACKET_ID [y]):0, - PORT_READ(in_REEXECUTE_OPERATION [y]), - PORT_READ(in_REEXECUTE_TYPE [y]), - PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]), + PORT_READ(in_REEXECUTE_OPERATION [y]), + PORT_READ(in_REEXECUTE_TYPE [y]), + PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]), (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE [y]):0, - PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [y]), - PORT_READ(in_REEXECUTE_IMMEDIAT [y]), - PORT_READ(in_REEXECUTE_READ_RA [y]), - PORT_READ(in_REEXECUTE_NUM_REG_RA [y]), - PORT_READ(in_REEXECUTE_READ_RB [y]), - PORT_READ(in_REEXECUTE_NUM_REG_RB [y]), - PORT_READ(in_REEXECUTE_READ_RC [y]), - PORT_READ(in_REEXECUTE_NUM_REG_RC [y]), - PORT_READ(in_REEXECUTE_WRITE_RD [y]), - PORT_READ(in_REEXECUTE_NUM_REG_RD [y]), - PORT_READ(in_REEXECUTE_WRITE_RE [y]), - PORT_READ(in_REEXECUTE_NUM_REG_RE [y]) + PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [y]), + PORT_READ(in_REEXECUTE_IMMEDIAT [y]), + PORT_READ(in_REEXECUTE_READ_RA [y]), + PORT_READ(in_REEXECUTE_NUM_REG_RA [y]), + PORT_READ(in_REEXECUTE_READ_RB [y]), + PORT_READ(in_REEXECUTE_NUM_REG_RB [y]), + PORT_READ(in_REEXECUTE_READ_RC [y]), + PORT_READ(in_REEXECUTE_NUM_REG_RC [y]), + PORT_READ(in_REEXECUTE_WRITE_RD [y]), + PORT_READ(in_REEXECUTE_NUM_REG_RD [y]), + PORT_READ(in_REEXECUTE_WRITE_RE [y]), + PORT_READ(in_REEXECUTE_NUM_REG_RE [y]) ); } @@ -88,4 +89,6 @@ if (PORT_READ(in_ISSUE_IN_VAL[x][y])) { + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y); + #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) @@ -97,20 +100,20 @@ (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [x][y]):0, (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [x][y]):0, - PORT_READ(in_ISSUE_IN_OPERATION [x][y]), - PORT_READ(in_ISSUE_IN_TYPE [x][y]), - PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), + PORT_READ(in_ISSUE_IN_OPERATION [x][y]), + PORT_READ(in_ISSUE_IN_TYPE [x][y]), + PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [x][y]):0, - PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), - PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), - PORT_READ(in_ISSUE_IN_READ_RA [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), - PORT_READ(in_ISSUE_IN_READ_RB [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), - PORT_READ(in_ISSUE_IN_READ_RC [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), - PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), - PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) + PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), + PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), + PORT_READ(in_ISSUE_IN_READ_RA [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), + PORT_READ(in_ISSUE_IN_READ_RB [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), + PORT_READ(in_ISSUE_IN_READ_RC [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), + PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), + PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) ); } @@ -140,4 +143,7 @@ if (PORT_READ(in_ISSUE_OUT_ACK [x])) { + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - Transaction with ISSUE_OUT [%d]",i,x); + + entry_t * entry = _issue_queue [i].front(); _issue_queue [i].pop_front(); @@ -148,5 +154,5 @@ } - log_printf(TRACE,Issue_queue,FUNCTION," * Info Issue_queue"); + log_printf(TRACE,Issue_queue,FUNCTION," * Dump Issue_queue"); for (uint32_t i=0; i<_param->_nb_bank; i++) { @@ -155,5 +161,43 @@ *(_stat_bank_nb_inst [i]) += _issue_queue[i].size(); #endif - log_printf(TRACE,Issue_queue,FUNCTION," * [%d] size : %d",i,(int)_issue_queue[i].size()); + log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d] size : %d",i,(int)_issue_queue[i].size()); + + uint32_t j = 0; + for (std::list::iterator it=_issue_queue[i].begin();it!=_issue_queue[i].end(); ++it) + { + log_printf(TRACE,Issue_queue,FUNCTION," [%.4d] %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d", + j, + + (*it)->_context_id , + (*it)->_front_end_id , + (*it)->_packet_id , + + (*it)->_type , + (*it)->_operation , + + (*it)->_store_queue_ptr_write, + (*it)->_load_queue_ptr_write , + + (*it)->_has_immediat , + (*it)->_immediat , + + (*it)->_read_ra , + (*it)->_num_reg_ra , + + (*it)->_read_rb , + (*it)->_num_reg_rb , + + (*it)->_read_rc , + (*it)->_num_reg_rc , + + (*it)->_write_rd , + (*it)->_num_reg_rd , + + (*it)->_write_re , + (*it)->_num_reg_re ); + + ++j; + } + } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp (revision 109) @@ -57,4 +57,16 @@ _table_issue_type = table_issue_type ; + log_printf(TRACE,Issue_queue,FUNCTION," * table_routing [nb_rename_unit][nb_inst_issue]"); + for (uint32_t i=0; i<_nb_rename_unit; ++i) + for (uint32_t j=0; j<_nb_inst_issue; ++j) + if (_table_routing [i][j]) + log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); + + log_printf(TRACE,Issue_queue,FUNCTION," * table_issue_type [nb_inst_issue][nb_type]"); + for (uint32_t i=0; i<_nb_inst_issue; ++i) + for (uint32_t j=0; j<_nb_type; ++j) + if (_table_issue_type [i][j]) + log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); + _max_nb_inst_rename = max(_nb_inst_rename,_nb_rename_unit); _nb_bank_select_out = _nb_bank/nb_inst_issue; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 109) @@ -38,22 +38,4 @@ test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n")); - bool type_valid [_nb_type]; - - for (uint32_t i=0; i<_nb_type; i++) - type_valid [i] = false; - - type_valid [TYPE_ALU ] = true; - type_valid [TYPE_SHIFT ] = true; - type_valid [TYPE_MOVE ] = true; - type_valid [TYPE_TEST ] = true; - type_valid [TYPE_MUL ] = true; - type_valid [TYPE_DIV ] = true; - type_valid [TYPE_EXTEND ] = true; - type_valid [TYPE_FIND ] = true; - type_valid [TYPE_SPECIAL] = true; - type_valid [TYPE_CUSTOM ] = true; - type_valid [TYPE_BRANCH ] = true; - type_valid [TYPE_MEMORY ] = true; - for (uint32_t i=0; i<_nb_rename_unit; i++) { @@ -61,5 +43,5 @@ for (uint32_t j=0; j<_nb_type; j++) - type_present [j] = not type_valid [j]; + type_present [j] = not is_type_valid(j); bool find = false; @@ -77,5 +59,5 @@ else for (uint32_t j=0; j<_nb_type; j++) - if (not type_present [j]) + if (not type_present [j] and not is_type_optionnal(j)) test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str())); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp (revision 109) @@ -27,6 +27,5 @@ for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) { - // Transaction must be in-order -// Tcontrol_t previous_transaction = true; + // Transaction must be in-order : make in Rename_unit for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) @@ -38,10 +37,7 @@ Tcontrol_t issue_queue_ack = PORT_READ(in_INSERT_ISSUE_QUEUE_ACK [i][j]); - - // if not execute -> don't route to issue_queue Tcontrol_t val = ( -// previous_transaction and rename_unit_val and commit_unit_ack and @@ -49,5 +45,4 @@ issue_queue_ack)); Tcontrol_t rename_unit_ack = ( -// previous_transaction and ack and commit_unit_ack and @@ -55,5 +50,4 @@ issue_queue_ack)); Tcontrol_t commit_unit_val = ( -// previous_transaction and ack and rename_unit_val and @@ -61,5 +55,4 @@ issue_queue_ack)); Tcontrol_t issue_queue_val = ( -// previous_transaction and ack and rename_unit_val and @@ -73,7 +66,6 @@ log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d] -> %d",i,j,x); -// log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * previous_transaction : %d",previous_transaction ); - log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (w) : %d",val ); - log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (r) : %d",ack ); + log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val ); + log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack ); log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_val (r) : %d",rename_unit_val ); log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_ack (w) : %d",rename_unit_ack ); @@ -84,6 +76,4 @@ log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_issue_queue_ack (r) : %d",issue_queue_ack ); - -// previous_transaction = VAL and ACK; x ++; } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp (revision 109) @@ -53,10 +53,10 @@ _size_rename_id = log2(_nb_rename_unit) ; _sum_inst_insert = 0; -// _sum_inst_retire = 0; +// _sum_inst_retire = 0; for (uint32_t i=0; i<_nb_rename_unit; ++i) { _sum_inst_insert += _nb_inst_insert[i]; -// _sum_inst_retire += _nb_inst_retire[i]; +// _sum_inst_retire += _nb_inst_retire[i]; } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps (revision 109) @@ -14,14 +14,20 @@ endif +ifndef Priority +include $(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps +endif + #-----[ Directory ]---------------------------------------- -Free_List_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit +Free_List_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit #-----[ Library ]------------------------------------------ -Free_List_unit_LIBRARY = -lFree_List_unit \ +Free_List_unit_LIBRARY = -lFree_List_unit \ + $(Priority_LIBRARY) \ $(Behavioural_LIBRARY) -Free_List_unit_DIR_LIBRARY = -L$(Free_List_unit_DIR)/lib \ +Free_List_unit_DIR_LIBRARY = -L$(Free_List_unit_DIR)/lib \ + $(Priority_DIR_LIBRARY) \ $(Behavioural_DIR_LIBRARY) @@ -31,4 +37,5 @@ @\ $(MAKE) Behavioural_library; \ + $(MAKE) Priority_library; \ $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile; @@ -36,3 +43,4 @@ @\ $(MAKE) Behavioural_library_clean; \ + $(MAKE) Priority_library_clean; \ $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile clean; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp (revision 109) @@ -7,5 +7,5 @@ */ -#define NB_ITERATION 1 +#define NB_ITERATION 16 #define CYCLE_MAX (128*NB_ITERATION) @@ -190,6 +190,6 @@ TEST(bool, gpr_free[reg],true); - Tgeneral_address_t bank = reg >> _param->_bank_gpr_size_slot; - TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); +// Tgeneral_address_t bank = reg >> _param->_bank_gpr_size_slot; +// TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); gpr_free[reg] = false; @@ -202,6 +202,6 @@ TEST(bool,spr_free[reg],true); - Tspecial_address_t bank = reg >> _param->_bank_spr_size_slot; - TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); +// Tspecial_address_t bank = reg >> _param->_bank_spr_size_slot; +// TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); spr_free[reg] = false; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h (revision 109) @@ -28,4 +28,6 @@ #endif #include "Behavioural/include/Usage.h" + +#include "Behavioural/Generic/Priority/include/Priority.h" namespace morpheo { @@ -83,4 +85,6 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : generic::priority::Priority * _priority_gpr; + private : generic::priority::Priority * _priority_spr; // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -89,6 +93,4 @@ // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : uint32_t reg_BANK_PRIORITY; - private : Tcontrol_t * internal_POP_ACK ; //[nb_pop] private : uint32_t * internal_POP_GPR_BANK ; //[nb_pop] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h (revision 109) @@ -37,5 +37,5 @@ //public : uint32_t _size_special_register; - public : uint32_t _nb_bank_by_pop ; +// public : uint32_t _nb_bank_by_pop ; public : uint32_t _bank_gpr_nb_slot ; public : uint32_t _bank_gpr_size_slot ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp (revision 109) @@ -101,4 +101,13 @@ } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + _priority_gpr = new generic::priority::Priority (_name+"_priority_gpr", + _param->_priority, + _param->_nb_bank, + _param->_nb_bank); + + _priority_spr = new generic::priority::Priority (_name+"_priority_spr", + _param->_priority, + _param->_nb_bank, + _param->_nb_bank); #ifdef POSITION Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp (revision 109) @@ -58,7 +58,9 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - - delete _component; - + delete _priority_gpr; + delete _priority_spr; + + delete _component; + log_printf(FUNC,Free_List_unit,FUNCTION,"End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp (revision 109) @@ -26,70 +26,155 @@ log_function(Free_List_unit,FUNCTION,_name.c_str()); + std::list * select_gpr = _priority_gpr->select(); + std::list::iterator it_gpr=select_gpr->begin(); + + std::list * select_spr = _priority_spr->select(); + std::list::iterator it_spr=select_spr->begin(); + for (uint32_t i=0; i<_param->_nb_pop; i++) { log_printf(TRACE,Free_List_unit,FUNCTION," * POP [%d]",i); - - uint32_t offset = i*_param->_nb_bank_by_pop; - + // GPR bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]); - + log_printf(TRACE,Free_List_unit,FUNCTION," * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i])); - + if (not gpr_ack) - for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) - { - uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop - ); - - log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); - - if (not _gpr_list[bank].empty()) - { - // find - log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[bank].front()); - - gpr_ack = true; - internal_POP_GPR_BANK [i] = bank; - PORT_WRITE(out_POP_GPR_NUM_REG [i], - //(bank << _param->_shift) | // only in VHDL - _gpr_list[bank].front()); - - break; - } - } + { + // scan all bank + for (; + it_gpr!=select_gpr->end(); + ++it_gpr) + { + uint32_t num_bank = it_gpr->grp; + + log_printf(TRACE,Free_List_unit,FUNCTION," * num_bank: %d",num_bank); + + if (not _gpr_list[num_bank].empty()) + { + // find + log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[num_bank].front()); + + gpr_ack = true; + internal_POP_GPR_BANK [i] = num_bank; + PORT_WRITE(out_POP_GPR_NUM_REG [i], + //(num_bank << _param->_shift) | // only in VHDL + _gpr_list[num_bank].front()); + + ++it_gpr; + break; + } + } + } // SPR bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]); + + log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i])); + + if (not spr_ack) + { + // scan all bank + for (; + it_spr!=select_spr->end(); + ++it_spr) + { + uint32_t num_bank = it_spr->grp; + + log_printf(TRACE,Free_List_unit,FUNCTION," * num_bank: %d",num_bank); + + if (not _spr_list[num_bank].empty()) + { + // find + log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[num_bank].front()); + + spr_ack = true; + internal_POP_SPR_BANK [i] = num_bank; + PORT_WRITE(out_POP_SPR_NUM_REG [i], + //(num_bank << _param->_shift) | // only in VHDL + _spr_list[num_bank].front()); + + ++it_spr; + break; + } + } + } - log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i])); - - if (not spr_ack) - for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) - { - uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop - ); - - log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); - - if (not _spr_list[bank].empty()) - { - // find - log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[bank].front()); - - spr_ack = true; - internal_POP_SPR_BANK [i] = bank; - PORT_WRITE(out_POP_SPR_NUM_REG [i], - //(bank << _param->_shift) | // only in VHDL - _spr_list[bank].front()); - - break; - } - } internal_POP_ACK [i] = gpr_ack and spr_ack; - PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); } + +// for (uint32_t i=0; i<_param->_nb_pop; i++) +// { +// log_printf(TRACE,Free_List_unit,FUNCTION," * POP [%d]",i); + +// uint32_t offset = (i*_param->_nb_bank_by_pop) + reg_BANK_PRIORITY; + +// // GPR +// bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]); + +// log_printf(TRACE,Free_List_unit,FUNCTION," * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i])); + +// if (not gpr_ack) +// { +// for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) +// { +// uint32_t bank = (offset+((j+reg_BANK_BY_POP_PRIORITY)%_param->_nb_bank_by_pop))%_param->_nb_bank; + +// log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); + +// if (not _gpr_list[bank].empty()) +// { +// // find +// log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[bank].front()); + +// gpr_ack = true; +// internal_POP_GPR_BANK [i] = bank; +// PORT_WRITE(out_POP_GPR_NUM_REG [i], +// //(bank << _param->_shift) | // only in VHDL +// _gpr_list[bank].front()); + +// break; +// } +// } +// } + +// // SPR +// bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]); + +// log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i])); + +// if (not spr_ack) +// { +// uint32_t offset = (i*_param->_nb_bank_by_pop) + reg_BANK_PRIORITY; + +// for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) +// { +// uint32_t bank = (offset+((j+reg_BANK_BY_POP_PRIORITY)%_param->_nb_bank_by_pop))%_param->_nb_bank; + +// log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); + +// if (not _spr_list[bank].empty()) +// { +// // find +// log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[bank].front()); + +// spr_ack = true; +// internal_POP_SPR_BANK [i] = bank; +// PORT_WRITE(out_POP_SPR_NUM_REG [i], +// //(bank << _param->_shift) | // only in VHDL +// _spr_list[bank].front()); + +// break; +// } +// } +// } + +// internal_POP_ACK [i] = gpr_ack and spr_ack; + +// PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); +// } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 109) @@ -28,5 +28,7 @@ if (PORT_READ(in_NRESET) == 0) { - reg_BANK_PRIORITY = 0; + _priority_gpr->reset(); + _priority_spr->reset(); + for (uint32_t i=0; i<_param->_nb_bank; i++) { @@ -37,4 +39,7 @@ else { + _priority_gpr->transition(); + _priority_spr->transition(); + // ================================================== // =====[ POP ]====================================== @@ -76,7 +81,4 @@ _spr_list [internal_PUSH_SPR_BANK[i]].push_back(PORT_READ(in_PUSH_SPR_NUM_REG [i])); } - - if (_param->_priority == PRIORITY_ROUND_ROBIN) - reg_BANK_PRIORITY = (reg_BANK_PRIORITY+1)%_param->_nb_bank_by_pop; #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp (revision 109) @@ -45,5 +45,5 @@ uint32_t size_special_register = log2(nb_special_register); - _nb_bank_by_pop = _nb_bank / _nb_pop; +// _nb_bank_by_pop = _nb_bank / _nb_pop; uint32_t gpr_nb_slot = nb_general_register - nb_thread*_nb_general_register_logic; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 109) @@ -1527,5 +1527,4 @@ dest,"insert_"+toString(i)); #endif - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" , dest,"out_INSERT_"+toString(i)+"_VAL" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 109) @@ -734,4 +734,15 @@ } +// log_printf(TRACE,Core,FUNCTION,_(" * front_end_instruction_implemeted")); +// for (uint32_t i=0; i<_nb_front_end; ++i) +// for (uint32_t j=0; j<_nb_context[i]; ++j) +// for (uint32_t k=0; k 0) - { - _ooo_engine_table_issue_type [i][j][m] = true; - break; - } - - for (uint32_t m=0; m<_nb_thread; ++m) - { - list_thread_with_inst_issue [j].push_back(m); - - uint32_t num_front_end = _link_context_with_thread [m].first; - uint32_t num_rename_bloc = _link_rename_bloc_with_front_end[num_front_end]; - uint32_t num_rename_unit = _link_rename_unit_with_rename_bloc [num_rename_bloc].second; - - _list_functionnal_unit_with_rename_unit [i][num_rename_unit].push_back(l); - } - } - + { + // the issue slot [j] is connected with the read bloc [k] and it's connected with the functionnal_unit [l] + if (_link_read_bloc_and_functionnal_unit [k][l]) + { + // Scan timing table, test if have an instruction + for (uint32_t m=0; m<_nb_type; ++m) + for (uint32_t n=0; n<_nb_operation; ++n) + if (_timing[l][m][n]._latence > 0) + { + log_printf(TRACE,Core,FUNCTION,_(" [%d][%d] -> true"),j,m); + + _ooo_engine_table_issue_type [i][j][m] = true; + break; + } + + for (uint32_t m=0; m<_nb_thread; ++m) + { + list_thread_with_inst_issue [j].push_back(m); + + uint32_t num_front_end = _link_context_with_thread [m].first; + uint32_t num_rename_bloc = _link_rename_bloc_with_front_end[num_front_end]; + uint32_t num_rename_unit = _link_rename_unit_with_rename_bloc [num_rename_bloc].second; + + _list_functionnal_unit_with_rename_unit [i][num_rename_unit].push_back(l); + } + } + } + // Test load store unit connected with this read bloc for (uint32_t l=0; l<_nb_load_store_unit; ++l) { - _ooo_engine_table_issue_type [i][j][TYPE_MEMORY] = true; -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBS)._type][instruction_information(INSTRUCTION_L_LBS)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBZ)._type][instruction_information(INSTRUCTION_L_LBZ)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LD )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LD )._type][instruction_information(INSTRUCTION_L_LD )._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LHS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LHS)._type][instruction_information(INSTRUCTION_L_LHS)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LHZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LHZ)._type][instruction_information(INSTRUCTION_L_LHZ)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LWS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LWS)._type][instruction_information(INSTRUCTION_L_LWS)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LWZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LWZ)._type][instruction_information(INSTRUCTION_L_LWZ)._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SB )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SB )._type][instruction_information(INSTRUCTION_L_SB )._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SD )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SD )._type][instruction_information(INSTRUCTION_L_SD )._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SH )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SH )._type][instruction_information(INSTRUCTION_L_SH )._operation]._latence > 0); -// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SW )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SW )._type][instruction_information(INSTRUCTION_L_SW )._operation]._latence > 0); - + // Test load store unit connected with this read bloc if (_link_read_bloc_and_load_store_unit [k][l]) - // the issue slot [j] is connected with the read bloc [k] and it's connected with the load_store_unit [l] - for (uint32_t m=0; m<_nb_thread; ++m) - { - list_thread_with_inst_issue [j].push_back(m); - - - uint32_t num_front_end = _link_context_with_thread [m].first; - uint32_t num_rename_bloc = _link_rename_bloc_with_front_end[num_front_end]; - uint32_t num_rename_unit = _link_rename_unit_with_rename_bloc [num_rename_bloc].second; - - _list_load_store_unit_with_rename_unit [i][num_rename_unit].push_back(l); - } + { + _ooo_engine_table_issue_type [i][j][TYPE_MEMORY] = true; +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBS)._type][instruction_information(INSTRUCTION_L_LBS)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBZ)._type][instruction_information(INSTRUCTION_L_LBZ)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LD )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LD )._type][instruction_information(INSTRUCTION_L_LD )._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LHS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LHS)._type][instruction_information(INSTRUCTION_L_LHS)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LHZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LHZ)._type][instruction_information(INSTRUCTION_L_LHZ)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LWS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LWS)._type][instruction_information(INSTRUCTION_L_LWS)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LWZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LWZ)._type][instruction_information(INSTRUCTION_L_LWZ)._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SB )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SB )._type][instruction_information(INSTRUCTION_L_SB )._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SD )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SD )._type][instruction_information(INSTRUCTION_L_SD )._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SH )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SH )._type][instruction_information(INSTRUCTION_L_SH )._operation]._latence > 0); +// _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_SW )._type] |= (_timing[l][instruction_information(INSTRUCTION_L_SW )._type][instruction_information(INSTRUCTION_L_SW )._operation]._latence > 0); + + // the issue slot [j] is connected with the read bloc [k] and it's connected with the load_store_unit [l] + for (uint32_t m=0; m<_nb_thread; ++m) + { + list_thread_with_inst_issue [j].push_back(m); + + uint32_t num_front_end = _link_context_with_thread [m].first; + uint32_t num_rename_bloc = _link_rename_bloc_with_front_end[num_front_end]; + uint32_t num_rename_unit = _link_rename_unit_with_rename_bloc [num_rename_bloc].second; + + log_printf(TRACE,Core,FUNCTION,_(" * list_load_store_unit_with_rename_unit [%d][%d][%d] = %d"),i,num_rename_unit,_list_load_store_unit_with_rename_unit [i][num_rename_unit].size(),l); + + _list_load_store_unit_with_rename_unit [i][num_rename_unit].push_back(l); + } + } } } @@ -1104,9 +1126,21 @@ } + log_printf(TRACE,Core,FUNCTION,_(" * network_table_dispatch [nb_ooo_engine][nb_inst_issue][nb_execute_loop][nb_read_unit]")); + for (uint32_t i=0; i<_nb_ooo_engine; ++i) + for (uint32_t j=0; j<_nb_inst_issue[i]; ++j) + for (uint32_t k=0; k<_nb_execute_loop; ++k) + for (uint32_t l=0; l<_nb_read_unit[k]; ++l) + if (_network_table_dispatch [i][j][k][l] == true) + log_printf(TRACE,Core,FUNCTION,_(" Issue Slot [%d][%d] is connected with Read_unit [%d][%d]"),i,j,k,l); + ALLOC2(_ooo_engine_nb_load_store_unit ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); + log_printf(TRACE,Core,FUNCTION,_(" * ooo_engine_nb_load_store_unit [nb_ooo_engine][nb_rename_unit]")); for (uint32_t i=0; i<_nb_ooo_engine; ++i) for (uint32_t j=0; j<_nb_rename_unit[i]; ++j) - _ooo_engine_nb_load_store_unit [i][j] = _list_load_store_unit_with_rename_unit [i][j].size(); + { + _ooo_engine_nb_load_store_unit [i][j] = _list_load_store_unit_with_rename_unit [i][j].size(); + log_printf(TRACE,Core,FUNCTION,_(" [%d][%d] = %d"),i,j,_ooo_engine_nb_load_store_unit [i][j]); + } ALLOC3(_ooo_engine_size_store_queue ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1],_ooo_engine_nb_load_store_unit[it1][it2]); @@ -1390,14 +1424,15 @@ // update translation _execute_loop_translate_num_execute_unit [i][j] = num_fu; - num_fu ++; // timing information - _execute_loop_nb_inst_functionnal_unit [i][j] = _nb_inst_functionnal_unit [num_functionnal_unit]; + _execute_loop_nb_inst_functionnal_unit [i][num_fu] = _nb_inst_functionnal_unit [num_functionnal_unit]; + log_printf(TRACE,Core,FUNCTION," * _execute_loop_nb_inst_functionnal_unit [%d][%d] = _nb_inst_functionnal_unit [%d] = %d",i,num_fu,num_functionnal_unit,_nb_inst_functionnal_unit [num_functionnal_unit]); + for (uint32_t k=0; k<_nb_type; ++k) for (uint32_t l=0; l<_nb_operation; ++l) { - //log_printf(TRACE,Core,FUNCTION,_("execute_loop_timing [%d][%d][%d][%d] = timing [%d][%d][%d]"),i,j,k,l,num_functionnal_unit,k,l); - _execute_loop_timing [i][j][k][l] = _timing [num_functionnal_unit][k][l]; +// log_printf(TRACE,Core,FUNCTION,_("execute_loop_timing [%d][%d][%d][%d] = timing [%d][%d][%d]"),i,num_fu,k,l,num_functionnal_unit,k,l); + _execute_loop_timing [i][num_fu][k][l] = _timing [num_functionnal_unit][k][l]; } @@ -1405,4 +1440,6 @@ // for (uint32_t k=0; k<_nb_operation; ++k) // _execute_loop_timing [i][j][TYPE_MEMORY][k]._delay = _execute_loop_timing [i][j][TYPE_MEMORY][k]._latence = 0; + + num_fu ++; } } @@ -1533,5 +1570,5 @@ link = _link_read_bloc_and_functionnal_unit [num_read_bloc][num_functionnal_unit]; - log_printf(TRACE,Core,FUNCTION,_(" [%d][%d][%d][all] -> %d"),i,l,j,link); + log_printf(TRACE,Core,FUNCTION,_(" [%d][%d][%d][all (%d)] -> %d"),i,l,j,_execute_loop_nb_execute_unit_port [i][j],link); for (uint32_t k=0; k<_execute_loop_nb_execute_unit_port [i][j]; ++k) @@ -1562,5 +1599,5 @@ link = _link_write_bloc_and_functionnal_unit [num_write_bloc][num_functionnal_unit]; - log_printf(TRACE,Core,FUNCTION,_(" [%d][%d][all][%d] -> %d"),i,j,l,link); + log_printf(TRACE,Core,FUNCTION,_(" [%d][%d][all (%d)][%d] -> %d"),i,j,_execute_loop_nb_execute_unit_port [i][j],l,link); for (uint32_t k=0; k<_execute_loop_nb_execute_unit_port [i][j]; ++k) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp (revision 109) @@ -144,15 +144,16 @@ // initialisation uint32_t nb_link_execute_unit [_nb_execute_loop][max(_nb_execute_unit,_nb_execute_loop)]; - uint32_t nb_functionnal_unit [_nb_execute_loop]; - uint32_t nb_load_store_unit [_nb_execute_loop]; - - for (uint32_t i=0; i<_nb_execute_loop; ++i) - { - nb_functionnal_unit [i] = 0; - nb_load_store_unit [i] = 0; - - for (uint32_t j=0; j<_nb_execute_unit[i];++j) - nb_link_execute_unit [i][j] = 0; - } +// uint32_t nb_functionnal_unit [_nb_functionnal_unit]; +// uint32_t nb_load_store_unit [_nb_load_store_unit]; + +// for (uint32_t i=0; i<_nb_functionnal_unit; ++i) +// nb_functionnal_unit [i] = 0; + +// for (uint32_t i=0; i<_nb_load_store_unit; ++i) +// nb_load_store_unit [i] = 0; + + for (uint32_t i=0; i<_nb_execute_loop; ++i) + for (uint32_t j=0; j<_nb_execute_unit[i];++j) + nb_link_execute_unit [i][j] = 0; // set link @@ -162,6 +163,8 @@ uint32_t num_execute_unit = _link_execute_unit_with_functionnal_unit [i].second; + log_printf(TRACE,Core,FUNCTION," * _link_execute_unit_with_functionnal_unit [%d] = %d.%d",i,num_execute_loop,num_execute_unit); + nb_link_execute_unit [num_execute_loop][num_execute_unit] ++; - nb_functionnal_unit [i] ++; +// nb_functionnal_unit [i] ++; } for (uint32_t i=0; i<_nb_load_store_unit; ++i) @@ -171,5 +174,5 @@ nb_link_execute_unit [num_execute_loop][num_execute_unit] ++; - nb_load_store_unit [i] ++; +// nb_load_store_unit [i] ++; } @@ -184,19 +187,19 @@ } - for (uint32_t i=0; i<_nb_functionnal_unit; ++i) - { - if (nb_functionnal_unit[i] == 0) - test.error(toString(_("Functionnal_Unit [%d] is not instanced.\n"),i)); - if (nb_functionnal_unit[i] > 1) - test.error(toString(_("Functionnal_Unit [%d] is linked with 2 or more time.\n"),i)); - } - - for (uint32_t i=0; i<_nb_load_store_unit; ++i) - { - if (nb_load_store_unit[i] == 0) - test.error(toString(_("Load_Store_Unit [%d] is not instanced.\n"),i)); - if (nb_load_store_unit[i] > 1) - test.error(toString(_("Load_Store_Unit [%d] is linked with 2 or more time.\n"),i)); - } +// for (uint32_t i=0; i<_nb_functionnal_unit; ++i) +// { +// if (nb_functionnal_unit[i] == 0) +// test.error(toString(_("Functionnal_Unit [%d] is not instanced.\n"),i)); +// if (nb_functionnal_unit[i] > 1) +// test.error(toString(_("Functionnal_Unit [%d] is linked with 2 or more time.\n"),i)); +// } + +// for (uint32_t i=0; i<_nb_load_store_unit; ++i) +// { +// if (nb_load_store_unit[i] == 0) +// test.error(toString(_("Load_Store_Unit [%d] is not instanced.\n"),i)); +// if (nb_load_store_unit[i] > 1) +// test.error(toString(_("Load_Store_Unit [%d] is linked with 2 or more time.\n"),i)); +// } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Queue_allocation.cpp (revision 109) @@ -67,5 +67,5 @@ // ~~~~~[ Interface "slot" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { - ALLOC1_INTERFACE("slot", OUT, EAST, _("Internal slot."),_param->_nb_port_slot); + ALLOC1_INTERFACE("slot", OUT, NORTH, _("Internal slot."),_param->_nb_port_slot); ALLOC1_VALACK_OUT(out_SLOT_VAL ,VAL); @@ -76,5 +76,5 @@ if (_param->_have_port_ptr) { - ALLOC0_INTERFACE("ptr", OUT, EAST, _("Internal pointer.")); + ALLOC0_INTERFACE("ptr", OUT, SOUTH, _("Internal pointer.")); if (_param->_have_port_ptr_write) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 109) @@ -2,5 +2,5 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ @@ -27,5 +27,5 @@ _interfaces = entity->set_interfaces(); - // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { Interface * interface = _interfaces->set_interface("" @@ -40,5 +40,5 @@ in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); } - // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_READ_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read]; @@ -65,5 +65,5 @@ } - // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_write]; @@ -90,5 +90,5 @@ } - // ~~~~~[ Interface : "read_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface : "read_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_READ_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read_write]; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 109) @@ -50,5 +50,5 @@ TYPE_CUSTOM = 0x9, // 00000 - unit uniq , type optionnal TYPE_BRANCH = 0xa, // 00000 - unit multiple - TYPE_MEMORY = 0xb // 00000 - unit uniq + TYPE_MEMORY = 0xb // 00000 - unit uniq , type exclusive } type_t; @@ -57,17 +57,46 @@ # define MAX_TYPE (1< cycle_start) or (cycle_stop == -1); - debug_cycle_start = cycle_start; - debug_cycle_stop = cycle_stop; -#else +# ifdef SYSTEMC + debug_cycle_test = (cycle_stop > cycle_start) or (cycle_stop == -1); + debug_cycle_start= cycle_start; + debug_cycle_stop = cycle_stop; +# else debug_cycle_test = false; +# endif #endif + debug_cycle_idle = cycle_idle; debug_initialized = true; } -#endif } Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/example_1.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/example_1.cfg (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/example_1.cfg (revision 109) @@ -84,25 +84,5 @@ - - - - - - - - - - - - - - - - - - - - - + Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/instance_configuration_file-fr.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/instance_configuration_file-fr.tex (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/doc/document-morpheo-input_files/tex/instance_configuration_file-fr.tex (revision 109) @@ -30,5 +30,5 @@ \item[balise component :] {\it (Nombre quelconque d'occurrences)} {\it component} est le nom générique de la balise. En réalité il regroupe tous les blocs internes du processeur. Le nom de la balise prend alors le nom du composant. \begin{description} - \item[attribut id : ] {\it (Obligatoire)} Identifiant du paramètre. + \item[attribut id : ] {\it (Obligatoire)} Identifiant du paramètre. Si plusieurs instance du composant ont les même paramètres, alors ils peuvent être factorisé en placant dans le champs id tous les identifiants séparés par une virgule. \item[balise component :] {\it (Nombre quelconque d'occurrences)} Entités internes au bloc courant. \item[balise parameter :] {\it (Nombre quelconque d'occurrences)} Un paramètre du composant courant. Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 109) @@ -4,8 +4,8 @@ - + - + @@ -24,5 +24,5 @@ - + @@ -36,5 +36,5 @@ - + @@ -42,29 +42,5 @@ - - - - - - - - - - - - - - - - - - - - - - - - - + @@ -83,8 +59,21 @@ - + - + + + + + + + + + + + + + + @@ -94,11 +83,11 @@ - - + + - + @@ -109,29 +98,9 @@ - - - - - - - - - - - - - - - - - - - - - + @@ -153,22 +122,15 @@ - + + - - + + - - + + - - - - - - - - @@ -190,4 +152,6 @@ + + @@ -198,15 +162,48 @@ + + + + + - - + + + + + + + + + + + + + + + + + + - - + + + + + + + + + + + + + + @@ -217,5 +214,15 @@ + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 109) @@ -15,5 +15,5 @@ - + @@ -105,5 +105,5 @@ - + @@ -136,6 +136,6 @@ - - + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 108) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 109) @@ -24,6 +24,7 @@ - - + + + Index: /trunk/Makefile.tools_path =================================================================== --- /trunk/Makefile.tools_path (revision 108) +++ /trunk/Makefile.tools_path (revision 109) @@ -24,11 +24,10 @@ # LABS #-----[ path ]--------------------------------------------- -ENV = export PATH=$$PATH:/bin:/usr/bin +ENV = export PATH=$${PATH}:/bin:/usr/bin SYSTEMC_systemc = /users/outil/systemc/systemc-2.1.v1 SYSTEMC_systemcass = /users/outil/systemc/systemcass/systemcass/latest/i686-Linux.SLA4x SYSTEMC_systemcass_deps = $(SYSTEMC_systemcass) -XILINX = /dsk/l1/misc/Xilinx91i -MODELTECH = /users/outil/m1archi/modeltech -#MODELTECH_LICENCE = /users/soft/mentor/mgls_v8-1_0-3-1.ss5/etc/cust/mgc/license.anacad.20070720 +XILINX = /users/chaos/Xilinx92i +MODELTECH = /users/outil/m1archi/M2/modeltech MODELTECH_LICENCE = /users/soft/mentor/mgls_v8-5_0-5-0.ss5/etc/cust/mgc/license.anacad.2008 OR1K = /users/cao/kane/Softwares/or32-elf Index: /trunk/Platforms/Test/Makefile =================================================================== --- /trunk/Platforms/Test/Makefile (revision 108) +++ /trunk/Platforms/Test/Makefile (revision 109) @@ -203,7 +203,7 @@ @\ $(ECHO) "Delete generated files in directory $(PWD)";\ + $(MAKE) --directory=$(DIR_SOFT) --makefile=Makefile clean_all; \ $(MAKE) --directory=$(ENVIRONMENT_DIR) --makefile=Makefile clean_all; \ - $(MAKE) --directory=$(MORPHEO_DIR) --makefile=Makefile clean_all; \ - $(MAKE) --directory=$(DIR_SOFT) --makefile=Makefile clean_all; + $(MAKE) --directory=$(MORPHEO_DIR) --makefile=Makefile clean_all; Index: /trunk/Softwares/Test/Test_023/src/sys/crt0.s =================================================================== --- /trunk/Softwares/Test/Test_023/src/sys/crt0.s (revision 108) +++ /trunk/Softwares/Test/Test_023/src/sys/crt0.s (revision 109) @@ -37,5 +37,5 @@ _start: l.and r1, r0, r0 /* counter 1 */ - l.ori r2, r0, 10 /* limit */ + l.ori r2, r0, 0x10 /* limit */ l.j _go0 l.nop