- Timestamp:
- Feb 16, 2009, 9:28:31 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end
- Files:
-
- 1 added
- 14 edited
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Decod_unit/Decod_queue/include/Parameters.h (modified) (1 diff)
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Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp (modified) (1 diff)
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Decod_unit/Decod_queue/src/Decod_queue_transition.cpp (modified) (2 diffs)
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Decod_unit/Decod_queue/src/Parameters.cpp (modified) (1 diff)
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Decod_unit/Decod_queue/src/Parameters_msg_error.cpp (modified) (1 diff)
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Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg (added)
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Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg (modified) (1 diff)
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Ifetch_unit/Ifetch_queue/include/Parameters.h (modified) (1 diff)
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Ifetch_unit/Ifetch_queue/src/Parameters.cpp (modified) (1 diff)
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Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (modified) (1 diff)
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Prediction_unit/Update_Prediction_Table/include/Types.h (modified) (2 diffs)
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Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (modified) (1 diff)
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Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (modified) (1 diff)
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Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (modified) (1 diff)
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Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (modified) (4 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h
r88 r109 24 24 { 25 25 //-----[ fields ]------------------------------------------------------------ 26 public : uint32_t _nb_context ; 27 public : uint32_t _nb_inst_decod ; 28 public : uint32_t _size_queue ; 29 //public : uint32_t _size_general_data ; 30 public : uint32_t * _nb_branch_speculated ; //[nb_context] 31 32 public : uint32_t _nb_bank ; 33 public : uint32_t _size_bank ; 26 public : uint32_t _nb_context ; 27 public : uint32_t _nb_inst_decod ; 28 public : uint32_t _size_queue ; 29 //public : uint32_t _size_general_data ; 30 public : uint32_t * _nb_branch_speculated ; //[nb_context] 31 public : uint32_t _nb_instruction_in_queue; 34 32 35 33 //-----[ methods ]----------------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp
r108 r109 29 29 //-------------------------------------------------------------------- 30 30 { 31 Tcontrol_t ack = reg_QUEUE->size() < _param->_size_ bank;31 Tcontrol_t ack = reg_QUEUE->size() < _param->_size_queue; 32 32 33 33 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp
r108 r109 145 145 it++) 146 146 { 147 log_printf(TRACE,Decod_queue,FUNCTION," * [%d] ",x);148 149 147 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 150 148 { 151 149 if ((*it)->_val [i]) 152 log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" 153 ,i 150 log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" 151 ,x 152 ,i 154 153 ,(*it)->_val [i] 155 154 ,(*it)->_context_id [i] … … 177 176 ); 178 177 else 179 log_printf(TRACE,Decod_queue,FUNCTION," * [%d] %d" 180 ,i 178 log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %d" 179 ,x 180 ,i 181 181 ,(*it)->_val [i] 182 182 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp
r95 r109 29 29 log_begin(Decod_queue,FUNCTION); 30 30 31 _nb_context = nb_context ; 32 _nb_inst_decod = nb_inst_decod ; 33 _size_queue = size_queue ; 34 // _size_general_data = size_general_data ; 35 _nb_branch_speculated = nb_branch_speculated; 36 37 _nb_bank = _nb_inst_decod ; 38 _size_bank = _size_queue / _nb_bank; 31 _nb_context = nb_context ; 32 _nb_inst_decod = nb_inst_decod ; 33 _size_queue = size_queue/nb_inst_decod; 34 // _size_general_data = size_general_data ; 35 _nb_branch_speculated = nb_branch_speculated; 36 _nb_instruction_in_queue = size_queue; 39 37 40 38 test(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp
r82 r109 27 27 Parameters_test test ("Decod_queue"); 28 28 29 if (not is_multiple (_size_queue,_nb_inst_decod))30 test.error( _("size_queue must be a multiple of nb_inst_decod.\n"));29 if (not is_multiple (_nb_instruction_in_queue,_nb_inst_decod)) 30 test.error("Size of decod queue must be a multiple of nb_instruction.\n"); 31 31 32 32 log_end(Decod_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg
r81 r109 1 1 Ifetch_queue 2 1 8*2 # _size_queue2 8 16 *2 # _size_queue 3 3 1 8 *2 # _nb_instruction 4 4 1 1 *2 # _size_branch_update_prediction -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h
r88 r109 28 28 //public : uint32_t _size_branch_update_prediction ; 29 29 //public : uint32_t _size_general_data ; 30 public : uint32_t _nb_instruction_in_queue ; 30 31 31 32 //public : uint32_t _size_queue_ptr ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp
r88 r109 27 27 log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); 28 28 29 _size_queue = size_queue ; 29 _nb_instruction_in_queue = size_queue ; 30 _size_queue = size_queue/nb_instruction ; 30 31 _nb_instruction = nb_instruction ; 31 32 // _size_branch_update_prediction = size_branch_update_prediction; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp
r88 r109 27 27 Parameters_test test ("Ifetch_queue"); 28 28 29 if (not is_multiple (_nb_instruction_in_queue,_nb_instruction)) 30 test.error("Size of ifetch queue must be a multiple of nb_instruction.\n"); 31 29 32 if (_size_queue == 1) 30 33 test.warning("To best perfomance, size_queue must be > 1.\n"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h
r106 r109 18 18 namespace prediction_unit { 19 19 namespace update_prediction_table { 20 21 typedef enum 22 { 23 EVENT_SOURCE_UFPT, 24 EVENT_SOURCE_UPT 25 } event_source_t; 20 26 21 27 typedef enum … … 115 121 }; // end namespace core 116 122 }; // end namespace behavioural 123 124 template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_source_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_source_t& x) 125 { 126 switch (x) 127 { 128 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_SOURCE_UFPT : return "ufpt"; break; 129 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_SOURCE_UPT : return "upt" ; break; 130 default : return ""; break; 131 } 132 }; 133 134 117 135 118 136 template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::event_state_t& x) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
r106 r109 183 183 184 184 private : event_state_t * reg_EVENT_STATE ; //[nb_context] 185 private : event_source_t * reg_EVENT_SOURCE ; //[nb_context] 185 186 private : Tdepth_t * reg_EVENT_DEPTH ; //[nb_context] 186 187 private : Taddress_t * reg_EVENT_ADDRESS_SRC ; //[nb_context] // Address branch -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
r106 r109 209 209 ALLOC1(reg_EVENT_UPT_PTR ,uint32_t ,_param->_nb_context); 210 210 211 ALLOC1(reg_EVENT_STATE ,event_state_t,_param->_nb_context); 212 ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); 213 ALLOC1(reg_EVENT_ADDRESS_SRC ,Taddress_t ,_param->_nb_context); 214 ALLOC1(reg_EVENT_ADDRESS_DEST_VAL ,Tcontrol_t ,_param->_nb_context); 215 ALLOC1(reg_EVENT_ADDRESS_DEST ,Taddress_t ,_param->_nb_context); 211 ALLOC1(reg_EVENT_STATE ,event_state_t ,_param->_nb_context); 212 ALLOC1(reg_EVENT_SOURCE ,event_source_t,_param->_nb_context); 213 ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); 214 ALLOC1(reg_EVENT_ADDRESS_SRC ,Taddress_t ,_param->_nb_context); 215 ALLOC1(reg_EVENT_ADDRESS_DEST_VAL ,Tcontrol_t ,_param->_nb_context); 216 ALLOC1(reg_EVENT_ADDRESS_DEST ,Taddress_t ,_param->_nb_context); 216 217 } 217 218 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
r106 r109 163 163 164 164 DELETE1(reg_EVENT_STATE ,_param->_nb_context); 165 DELETE1(reg_EVENT_SOURCE ,_param->_nb_context); 165 166 DELETE1(reg_EVENT_DEPTH ,_param->_nb_context); 166 167 DELETE1(reg_EVENT_ADDRESS_SRC ,_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r108 r109 234 234 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; 235 235 } 236 reg_EVENT_SOURCE [context] = EVENT_SOURCE_UFPT; 236 237 237 238 // Flush UPFT … … 506 507 507 508 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); 508 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context);509 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth);510 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss);509 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 510 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 511 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); 511 512 512 513 if (miss) … … 517 518 518 519 // Flush UPT 519 uint32_t top = reg_UPT_TOP [context]; 520 uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 521 522 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 523 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); 524 525 for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; 526 j!=top; 527 j=(j+1)%_param->_size_upt_queue[context]) 528 reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; 520 uint32_t top = reg_UPT_TOP [context]; 521 uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 522 523 Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; 524 event_state_t event_state = reg_EVENT_STATE [context]; 525 bool previous_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or 526 (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or 527 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or 528 (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) or 529 ((event_state == EVENT_STATE_UPDATE_CONTEXT ) and 530 (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT))); 531 // bool update_ras = (new_update != depth); 532 533 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 534 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); 535 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); 536 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_event : %d",previous_event); 537 538 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) 539 { 540 for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; 541 j!=top; 542 j=(j+1)%_param->_size_upt_queue[context]) 543 reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; 544 529 545 530 531 // reg_UPT_BOTTOM [context]; 532 reg_UPT_TOP [context] = depth; 533 reg_UPT_TOP_EVENT [context] = top; 534 535 if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) 536 reg_UPT_EMPTY [context] = true; 537 546 // reg_UPT_BOTTOM [context]; 547 reg_UPT_TOP [context] = depth; 548 // reg_UPT_TOP_EVENT [context] = top; 549 550 if (not previous_event) 551 { 552 reg_UPT_TOP_EVENT [context] = top; 553 reg_UPT_UPDATE [context] = new_update; 554 } 555 else 556 { 557 // Have event. Top index this slot 558 559 switch (reg_UPDATE_PREDICTION_TABLE [context][top]._state) 560 { 561 case UPDATE_PREDICTION_STATE_END_KO : 562 { 563 // Have already update predictor 564 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; 565 break; 566 } 567 case UPDATE_PREDICTION_STATE_KO : 568 { 569 // Doesn't have update predictor 570 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; 571 break; 572 } 573 default : 574 { 538 575 #ifdef DEBUG_TEST 539 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) 540 throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); 541 #endif 542 543 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); 544 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; 545 546 Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; 547 event_state_t event_state = reg_EVENT_STATE [context]; 548 bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or 549 (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or 550 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or 551 (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); 552 // bool update_ras = (new_update != depth); 553 554 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); 555 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_update_ras : %d",previous_update_ras); 556 557 if (reg_UFPT_NB_NEED_UPDATE [context] > 0) 558 { 559 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); 560 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; 576 throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); 577 #endif 578 } 579 } 580 } 581 582 if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) 583 reg_UPT_EMPTY [context] = true; 584 585 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); 586 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; 587 588 if (reg_UFPT_NB_NEED_UPDATE [context] > 0) 589 { 590 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); 591 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; 592 } 593 else 594 { 595 // if (not previous_update_ras) 596 { 597 // have ras prediction ? 598 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); 599 600 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; 601 602 } 603 } 604 reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; 605 606 // else no update 607 608 reg_EVENT_DEPTH [context] = depth; 609 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 610 reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; 611 reg_EVENT_ADDRESS_DEST [context] = good_addr; 561 612 } 562 else 563 { 564 // if (not previous_update_ras) 565 { 566 // have ras prediction ? 567 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); 568 569 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; 570 571 } 572 } 573 574 if (not previous_update_ras) 575 { 576 reg_UPT_UPDATE [context] = new_update; 577 } 578 // else no update 579 580 reg_EVENT_DEPTH [context] = depth; 581 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 582 reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; 583 reg_EVENT_ADDRESS_DEST [context] = good_addr; 584 } 613 } 585 614 else 586 615 { … … 901 930 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); 902 931 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); 932 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_SOURCE : %s" ,toString(reg_EVENT_SOURCE[i]).c_str()); 903 933 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); 904 934 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]<<2);
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