Ignore:
Timestamp:
Feb 27, 2009, 7:37:40 PM (18 years ago)
Author:
rosiere
Message:

1) Decod_queue : multi implementation (one_fifo, multi_fifo)
2) Issue_queue : multi implementation (in_order, out_of_order)
3) Direction : Add Meta predictor
4) Context_State : re add Branch_complete, More priority to Load miss (is not speculative)
5) Return_Address_Stack : update reg_PREDICT pointer on decod miss prediction
6) UPT : Fix bug in multi event
7) Prediction_glue : in read_stack case, insert in UPT pc_next
8) Rename select : when rob have an event (need flush), read_r{a,b,c} and write_r{d,e} is set at 0

File:
1 edited

Legend:

Unmodified
Added
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  • trunk/Softwares/Test/Test_025/src/sys/crt0.s

    r101 r111  
    3737_start:
    3838        l.and   r1, r0, r0 /* counter 1 */
    39         l.ori   r2, r0, 10 /* limit */
     39        l.ori   r2, r0, 100 /* limit */
    4040
    4141        l.and   r11, r0, r0
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