Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 111) @@ -35,4 +35,6 @@ public : uint32_t _nb_decod_bloc ; public : uint32_t * _size_decod_queue ;//[nb_decod_bloc] + public : morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + * _decod_queue_scheme ;//[nb_decod_bloc] public : uint32_t * _nb_inst_decod ;//[nb_decod_bloc] public : uint32_t * _nb_context_select ;//[nb_decod_bloc] @@ -72,5 +74,5 @@ public : uint32_t * _nb_port_check ;//[nb_load_store_unit] public : core::multi_execute_loop::execute_loop::Tspeculative_load_t - * _speculative_load ;//[nb_load_store_unit] + * _speculative_load ;//[nb_load_store_unit] public : uint32_t * _nb_bypass_memory ;//[nb_load_store_unit] public : uint32_t * _nb_cache_port ;//[nb_load_store_unit] @@ -81,5 +83,5 @@ public : uint32_t * _nb_inst_functionnal_unit ;//[nb_functionnal_unit] public : core::multi_execute_loop::execute_loop::execute_timing_t - *** _timing ;//[nb_functionnal_unit][nb_type][nb_operation] + *** _timing ;//[nb_functionnal_unit][nb_type][nb_operation] // Icache_port @@ -127,4 +129,6 @@ public : Tload_balancing_t * _commit_load_balancing ;//[nb_ooo_engine] public : uint32_t * _size_issue_queue ;//[nb_ooo_engine] + public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + * _issue_queue_scheme ;//[nb_ooo_engine] public : uint32_t * _nb_issue_queue_bank ;//[nb_ooo_engine] public : Tpriority_t * _issue_priority ;//[nb_ooo_engine] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 111) @@ -104,4 +104,5 @@ DELETE1(_param->_issue_priority ,_param->_nb_ooo_engine); DELETE1(_param->_nb_issue_queue_bank ,_param->_nb_ooo_engine); + DELETE1(_param->_issue_queue_scheme ,_param->_nb_ooo_engine); DELETE1(_param->_size_issue_queue ,_param->_nb_ooo_engine); DELETE1(_param->_commit_load_balancing ,_param->_nb_ooo_engine); @@ -163,4 +164,5 @@ DELETE1(_param->_nb_context_select ,_param->_nb_decod_bloc); DELETE1(_param->_nb_inst_decod ,_param->_nb_decod_bloc); + DELETE1(_param->_decod_queue_scheme ,_param->_nb_decod_bloc); DELETE1(_param->_size_decod_queue ,_param->_nb_decod_bloc); DELETE1(_param->_ufpt_size_queue ,_param->_nb_thread); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 111) @@ -80,4 +80,6 @@ ALLOC1(_param->_size_decod_queue ,uint32_t ,_param->_nb_decod_bloc); + ALLOC1(_param->_decod_queue_scheme ,morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + ,_param->_nb_decod_bloc); ALLOC1(_param->_nb_inst_decod ,uint32_t ,_param->_nb_decod_bloc); ALLOC1(_param->_nb_context_select ,uint32_t ,_param->_nb_decod_bloc); @@ -90,4 +92,6 @@ _param->_size_decod_queue [i] = fromString (getParam("size_decod_queue" , "decod_bloc",toString(i).c_str(),"")); + _param->_decod_queue_scheme [i] = fromString + (getParam("decod_queue_scheme" , "decod_bloc",toString(i).c_str(),"")); _param->_nb_inst_decod [i] = fromString (getParam("nb_inst_decod" , "decod_bloc",toString(i).c_str(),"")); _param->_nb_context_select [i] = fromString (getParam("nb_context_select" , "decod_bloc",toString(i).c_str(),"")); @@ -338,4 +342,6 @@ ALLOC1(_param->_commit_load_balancing ,Tload_balancing_t,_param->_nb_ooo_engine); ALLOC1(_param->_size_issue_queue ,uint32_t ,_param->_nb_ooo_engine); + ALLOC1(_param->_issue_queue_scheme ,morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + ,_param->_nb_ooo_engine); ALLOC1(_param->_nb_issue_queue_bank ,uint32_t ,_param->_nb_ooo_engine); ALLOC1(_param->_issue_priority ,Tpriority_t ,_param->_nb_ooo_engine); @@ -361,4 +367,6 @@ _param->_commit_load_balancing [i] = fromString(getParam("commit_load_balancing" ,"ooo_engine",toString(i).c_str(), "")); _param->_size_issue_queue [i] = fromString(getParam("size_issue_queue" ,"ooo_engine",toString(i).c_str(), "")); + _param->_issue_queue_scheme [i] = fromString + (getParam("issue_queue_scheme" ,"ooo_engine",toString(i).c_str(), "")); _param->_nb_issue_queue_bank [i] = fromString(getParam("nb_issue_queue_bank" ,"ooo_engine",toString(i).c_str(), "")); _param->_issue_priority [i] = fromString(getParam("issue_priority" ,"ooo_engine",toString(i).c_str(), "")); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 111) @@ -204,5 +204,6 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : generic::priority::Priority ** _priority; //[nb_execute_loop] + private : generic::priority::Priority ** _priority_ooo_engine; //[nb_execute_loop] + private : generic::priority::Priority ** _priority_read_unit ; //[nb_execute_loop] // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp (revision 111) @@ -234,14 +234,25 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - _priority = new generic::priority::Priority * [_param->_nb_execute_loop]; + _priority_ooo_engine = new generic::priority::Priority * [_param->_nb_execute_loop]; + _priority_read_unit = new generic::priority::Priority * [_param->_nb_execute_loop]; for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - _priority [i] = new generic::priority::Priority (_name+"_priority_"+toString(i), - _param->_dispatch_priority , - _param->_dispatch_load_balancing, - _param->_execute_loop_nb_ooo_engine [i], - _param->_execute_loop_nb_inst_issue [i], - _param->_execute_loop_nb_ooo_engine [i] - ); + { + _priority_ooo_engine [i] = new generic::priority::Priority (_name+"_priority_ooo_engine_"+toString(i), + _param->_dispatch_priority , + _param->_dispatch_load_balancing, + _param->_execute_loop_nb_ooo_engine [i], + _param->_execute_loop_nb_inst_issue [i], + _param->_execute_loop_nb_ooo_engine [i] + ); + + _priority_read_unit [i] = new generic::priority::Priority (_name+"_priority_read_unit_"+toString(i), + // PRIORITY_STATIC, + PRIORITY_ROUND_ROBIN, + _param->_nb_read_unit [i], + _param->_nb_read_unit [i] + ); + } + Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp (revision 111) @@ -159,6 +159,10 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - delete _priority [i]; - delete [] _priority; + { + delete _priority_ooo_engine [i]; + delete _priority_read_unit [i]; + } + delete [] _priority_ooo_engine; + delete [] _priority_read_unit ; delete _component; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 111) @@ -42,12 +42,12 @@ log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop [%d]",i); - std::list * select = _priority[i] ->select(); - for (std::list::iterator it=select ->begin(); - it!=select->end(); - ++it) + std::list * select_ooo_engine = _priority_ooo_engine[i]->select(); + for (std::list::iterator it_ooo_engine=select_ooo_engine->begin(); + it_ooo_engine!=select_ooo_engine->end(); + ++it_ooo_engine) { - const uint32_t ooo_engine_id = it->grp; + const uint32_t ooo_engine_id = it_ooo_engine->grp; const uint32_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][ooo_engine_id]; - const uint32_t num_inst_issue = it->elt; + const uint32_t num_inst_issue = it_ooo_engine->elt; log_printf(TRACE,Core_Glue,FUNCTION," * num_ooo_engine [%d] (id : %d)",num_ooo_engine, ooo_engine_id); @@ -56,48 +56,57 @@ // have request ? - if (PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue])) + Tcontrol_t ooo_engine_val = PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]); + +// if (ooo_engine_val) { // // If ooo_engine can issue instruction on multiple execute_loop // if (not ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue]) - for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j) + + std::list * select_read_unit = _priority_read_unit[i]->select(); + for (std::list::iterator it_read_unit=select_read_unit->begin(); + it_read_unit!=select_read_unit->end(); + ++it_read_unit) + { + uint32_t num_read_unit = it_read_unit->grp; + // Test if have an link and read unit is enable - { - log_printf(TRACE,Core_Glue,FUNCTION," * read_unit : %d",j); - log_printf(TRACE,Core_Glue,FUNCTION," * READ_UNIT_ENABLE : %d",READ_UNIT_ENABLE [i][j]); - log_printf(TRACE,Core_Glue,FUNCTION," * table_dispatch : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][j]); + log_printf(TRACE,Core_Glue,FUNCTION," * read_unit : %d",num_read_unit); + log_printf(TRACE,Core_Glue,FUNCTION," * READ_UNIT_ENABLE : %d",READ_UNIT_ENABLE [i][num_read_unit]); + log_printf(TRACE,Core_Glue,FUNCTION," * table_dispatch : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]); - if (READ_UNIT_ENABLE [i][j] and - _param->_table_dispatch [num_ooo_engine][num_inst_issue][i][j]) + Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit]; + if (read_unit_enable and + _param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]) { // Transaction - ISSUE_EXECUTE_LOOP_VAL [i][j] = 1; - ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue] = 1; - READ_UNIT_ENABLE [i][j] = false; // now, this read_unit is busy + ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val; + ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1 + READ_UNIT_ENABLE [i][num_read_unit] = false; // now, this read_unit is busy if (_param->_have_port_context_id) - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID [num_ooo_engine][num_inst_issue])); if (_param->_have_port_front_end_id) - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID [num_ooo_engine][num_inst_issue])); if (_param->_have_port_ooo_engine_id) - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID [i][j],ooo_engine_id); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID [i][num_read_unit],ooo_engine_id); if (_param->_have_port_rob_ptr) - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); if (_param->_have_port_load_queue_ptr) - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE [num_ooo_engine][num_inst_issue])); - PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE [i][j],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE [num_ooo_engine][num_inst_issue])); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE [num_ooo_engine][num_inst_issue])); } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp (revision 111) @@ -24,5 +24,8 @@ { for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - _priority [i]->reset(); + { + _priority_ooo_engine [i]->reset(); + _priority_read_unit [i]->reset(); + } } else @@ -30,5 +33,8 @@ // next priority for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - _priority [i]->transition(); + { + _priority_ooo_engine [i]->transition(); + _priority_read_unit [i]->transition(); + } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 111) @@ -217,14 +217,14 @@ template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Tspeculative_load_t fromString(const std::string& x) { - if ( (x.compare("0") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::NO_SPECULATIVE_LOAD ))) == 0) or (x.compare("no_speculative_load") == 0)) return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::NO_SPECULATIVE_LOAD; - if ( (x.compare("1") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS))) == 0) or (x.compare("speculative_load_access") == 0)) return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS; - if ( (x.compare("2") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT))) == 0) or (x.compare("speculative_load_commit") == 0)) return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT; -// if ( (x.compare("3") == 0) or +// if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS)))) or // (x.compare("speculative_load_bypass") == 0)) // return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp (revision 111) @@ -73,6 +73,6 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + // Function pointer - switch (_param->_speculative_load) { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 111) @@ -25,5 +25,5 @@ log_function(Read_queue,FUNCTION,_name.c_str()); - bool not_full = not (_queue->size() == _param->_size_queue); + bool not_full = _queue->size() < _param->_size_queue; bool not_empty = not _queue->empty(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 111) @@ -142,5 +142,5 @@ #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Read_queue == true) log_printf(TRACE,Read_queue,FUNCTION," * Dump Read_queue"); - log_printf(TRACE,Read_queue,FUNCTION," * size : %d",(int)_queue->size()); + log_printf(TRACE,Read_queue,FUNCTION," * size : %d / %d",(int)_queue->size(),_param->_size_queue); if (_queue->size()>0) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp (revision 111) @@ -39,18 +39,4 @@ test(); - _size_internal_queue = - (log2( nb_context ) + - log2( nb_front_end ) + - log2( nb_ooo_engine) + - log2( nb_packet ) + -// size_operation + -// size_type + - size_special_data + - _size_exception + - 1 + - size_general_data + - size_general_data - ); - if (is_toplevel) { @@ -71,4 +57,18 @@ copy(); } + + _size_internal_queue = + (_size_context_id + + _size_front_end_id + + _size_ooo_engine_id + + _size_rob_ptr + +// _size_operation + +// _size_type + + _size_special_data + + _size_exception + + 1 + + _size_general_data + + _size_general_data + ); log_printf(FUNC,Execute_queue,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.deps (revision 111) @@ -16,5 +16,5 @@ #-----[ Directory ]---------------------------------------- -Context_State_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Context_State +Context_State_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Context_State #-----[ Library ]------------------------------------------ @@ -23,5 +23,5 @@ $(Behavioural_LIBRARY) -Context_State_DIR_LIBRARY = -L$(Context_State_DIR)/lib \ +Context_State_DIR_LIBRARY = -L$(Context_State_DIR)/lib \ $(Behavioural_DIR_LIBRARY) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp (revision 111) @@ -83,7 +83,7 @@ ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); +//ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); +//ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); +//ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); @@ -168,7 +168,7 @@ INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); +//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); +//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); +//INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL ,_param->_nb_context ); @@ -1340,7 +1340,7 @@ DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); +//DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); +//DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); +//DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context ); DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ,_param->_nb_context ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h (revision 111) @@ -68,5 +68,5 @@ //public : SC_IN (Tcontext_t ) ** in_BRANCH_EVENT_CONTEXT_ID ;//[nb_context] public : SC_IN (Tdepth_t ) ** in_BRANCH_EVENT_DEPTH ;//[nb_context] -//public : SC_IN (Tcontrol_t ) ** in_BRANCH_EVENT_MISS_PREDICTION ;//[nb_context]// always + public : SC_IN (Tcontrol_t ) ** in_BRANCH_EVENT_MISS_PREDICTION ;//[nb_context]// always public : SC_IN (Taddress_t ) ** in_BRANCH_EVENT_ADDRESS_SRC ;//[nb_context] public : SC_IN (Tcontrol_t ) ** in_BRANCH_EVENT_ADDRESS_DEST_VAL ;//[nb_context]// take or not @@ -102,7 +102,7 @@ public : SC_IN (Tdepth_t ) ** in_BRANCH_COMPLETE_DEPTH ;//[nb_inst_branch_complete] public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_MISS_PREDICTION ;//[nb_inst_branch_complete] - public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_TAKE ;//[nb_inst_branch_complete] - public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS_SRC ;//[nb_inst_branch_complete] - public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS_DEST ;//[nb_inst_branch_complete] +//public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_TAKE ;//[nb_inst_branch_complete] +//public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS_SRC ;//[nb_inst_branch_complete] +//public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS_DEST ;//[nb_inst_branch_complete] // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h (revision 111) @@ -25,26 +25,28 @@ typedef enum { - CONTEXT_STATE_OK , // none event - CONTEXT_STATE_KO_EXCEP , // wait end of event (exception) - CONTEXT_STATE_KO_EXCEP_ADDR , // update address manager - CONTEXT_STATE_KO_EXCEP_SPR , // update spr (epc, esr, sr[DSX]) - CONTEXT_STATE_KO_MISS_BRANCH_ADDR , // update address manager - CONTEXT_STATE_KO_MISS_BRANCH_WAITEND, // wait end of event (miss branch) - CONTEXT_STATE_KO_MISS_LOAD_ADDR , // update address manager - CONTEXT_STATE_KO_MISS_LOAD_WAITEND , // wait end of event (miss load)) - CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR , // update address manager - CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND, // wait end of event (miss branch) -// CONTEXT_STATE_KO_MSYNC , // wait completion of all memory operation -// CONTEXT_STATE_KO_MSYNC_ISSUE , // issue msync operation - CONTEXT_STATE_KO_MSYNC_EXEC , // wait completion of msync operation -// CONTEXT_STATE_KO_PSYNC , // wait completion of all operation and after flush pipeline - CONTEXT_STATE_KO_PSYNC_FLUSH , // wait completion of all - CONTEXT_STATE_KO_PSYNC_ADDR , // wait completion of all -// CONTEXT_STATE_KO_CSYNC , // wait completion of all operation and after flush pipeline and flush ALL units (MMU, cache ...) - CONTEXT_STATE_KO_CSYNC_FLUSH , - CONTEXT_STATE_KO_CSYNC_ADDR , -// CONTEXT_STATE_KO_SPR , // wait completion of all operation -// CONTEXT_STATE_KO_SPR_ISSUE , // issue spr's access - CONTEXT_STATE_KO_SPR_EXEC // wait completion of all operation (spr access) + CONTEXT_STATE_OK , // none event + CONTEXT_STATE_KO_EXCEP , // wait end of event (exception) + CONTEXT_STATE_KO_EXCEP_ADDR , // update address manager + CONTEXT_STATE_KO_EXCEP_SPR , // update spr (epc, esr, sr[DSX]) + CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE , // branch is complete, wait update by update_prediction_table + CONTEXT_STATE_KO_MISS_BRANCH_ADDR , // update address manager + CONTEXT_STATE_KO_MISS_BRANCH_WAITEND , // wait end of event (miss branch) + CONTEXT_STATE_KO_MISS_LOAD_ADDR , // update address manager + CONTEXT_STATE_KO_MISS_LOAD_WAITEND , // wait end of event (miss load)) + CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE, // branch is complete, wait update by update_prediction_table + CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR , // update address manager + CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND , // wait end of event (miss branch) +// CONTEXT_STATE_KO_MSYNC , // wait completion of all memory operation +// CONTEXT_STATE_KO_MSYNC_ISSUE , // issue msync operation + CONTEXT_STATE_KO_MSYNC_EXEC , // wait completion of msync operation +// CONTEXT_STATE_KO_PSYNC , // wait completion of all operation and after flush pipeline + CONTEXT_STATE_KO_PSYNC_FLUSH , // wait completion of all + CONTEXT_STATE_KO_PSYNC_ADDR , // wait completion of all +// CONTEXT_STATE_KO_CSYNC , // wait completion of all operation and after flush pipeline and flush ALL units (MMU, cache ...) + CONTEXT_STATE_KO_CSYNC_FLUSH , + CONTEXT_STATE_KO_CSYNC_ADDR , +// CONTEXT_STATE_KO_SPR , // wait completion of all operation +// CONTEXT_STATE_KO_SPR_ISSUE , // issue spr's access + CONTEXT_STATE_KO_SPR_EXEC // wait completion of all operation (spr access) } context_state_t; @@ -60,26 +62,28 @@ switch (x) { - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_OK : return "context_state_ok" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP : return "context_state_ko_excep" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_ADDR : return "context_state_ko_excep_addr" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_SPR : return "context_state_ko_excep_spr" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_ADDR : return "context_state_ko_miss_branch_addr" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_WAITEND : return "context_state_ko_miss_branch_waitend"; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR : return "context_state_ko_miss_branch_and_load_addr" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND : return "context_state_ko_miss_branch_and_load_waitend"; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_ADDR : return "context_state_ko_miss_load_addr" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_WAITEND : return "context_state_ko_miss_load_waitend" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC : return "context_state_ko_msync" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_ISSUE : return "context_state_ko_msync_issue" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_EXEC : return "context_state_ko_msync_exec" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC : return "context_state_ko_psync" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_FLUSH : return "context_state_ko_psync_flush" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_ADDR : return "context_state_ko_psync_addr" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC : return "context_state_ko_csync" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_FLUSH : return "context_state_ko_csync_flush" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_ADDR : return "context_state_ko_csync_addr" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR : return "context_state_ko_spr" ; break; -// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_ISSUE : return "context_state_ko_spr_issue" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_EXEC : return "context_state_ko_spr_exec" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_OK : return "context_state_ok" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP : return "context_state_ko_excep" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_ADDR : return "context_state_ko_excep_addr" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_SPR : return "context_state_ko_excep_spr" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE : return "context_state_ko_miss_branch_wait_update" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_ADDR : return "context_state_ko_miss_branch_addr" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_WAITEND : return "context_state_ko_miss_branch_waitend" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE : return "context_state_ko_miss_load_and_branch_wait_update"; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR : return "context_state_ko_miss_load_and_branch_addr" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND : return "context_state_ko_miss_load_and_branch_waitend" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_ADDR : return "context_state_ko_miss_load_addr" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_LOAD_WAITEND : return "context_state_ko_miss_load_waitend" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC : return "context_state_ko_msync" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_ISSUE : return "context_state_ko_msync_issue" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MSYNC_EXEC : return "context_state_ko_msync_exec" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC : return "context_state_ko_psync" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_FLUSH : return "context_state_ko_psync_flush" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_PSYNC_ADDR : return "context_state_ko_psync_addr" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC : return "context_state_ko_csync" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_FLUSH : return "context_state_ko_csync_flush" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_CSYNC_ADDR : return "context_state_ko_csync_addr" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR : return "context_state_ko_spr" ; break; +// case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_ISSUE : return "context_state_ko_spr_issue" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_SPR_EXEC : return "context_state_ko_spr_exec" ; break; default : return "" ; break; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp (revision 111) @@ -110,7 +110,7 @@ ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION ,"miss_prediction",Tcontrol_t ,1); - ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_instruction_address); - ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address); +// ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t ,1); +// ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_instruction_address); +// ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp (revision 111) @@ -63,7 +63,7 @@ DELETE1_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete,_param->_size_depth); DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION ,_param->_nb_inst_branch_complete,1); - DELETE1_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete,1); - DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); - DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); +// DELETE1_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete,1); +// DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); +// DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); DELETE1_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context,_param->_size_nb_inst_decod); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp (revision 111) @@ -33,5 +33,5 @@ Tcontrol_t val = ((state == CONTEXT_STATE_KO_EXCEP_ADDR ) or (state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR) or + (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR) or (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or (state == CONTEXT_STATE_KO_PSYNC_ADDR ) or @@ -54,5 +54,5 @@ { case CONTEXT_STATE_KO_EXCEP_ADDR : (type = EVENT_TYPE_EXCEPTION ); break; - case CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR: + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR: case CONTEXT_STATE_KO_MISS_BRANCH_ADDR: (type = EVENT_TYPE_BRANCH_MISS_SPECULATION); break; case CONTEXT_STATE_KO_MISS_LOAD_ADDR : (type = EVENT_TYPE_LOAD_MISS_SPECULATION ); break; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp (revision 111) @@ -16,4 +16,16 @@ namespace context_state { + +#define get_priority(x) \ + (((state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or \ + (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR ) or \ + (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ) or \ + (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND ) or \ + (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE))?3: \ + (((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or \ + (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or \ + (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE ))?2: \ + ((state == EVENT_TYPE_EXCEPTION)?1: \ + 0))) #undef FUNCTION @@ -65,4 +77,9 @@ break; } + case CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE : + { + // nothing : wait end of update upt + break; + } case CONTEXT_STATE_KO_MISS_BRANCH_WAITEND : { @@ -82,5 +99,30 @@ break; } - case CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND : + case CONTEXT_STATE_KO_EXCEP_SPR : + { + // nothing, wait the update of internal register (epcr, eear, sr, esr) + break; + } + case CONTEXT_STATE_KO_MISS_BRANCH_ADDR : + { + // nothing, wait the update of internal register (pc) + break; + } + case CONTEXT_STATE_KO_MISS_LOAD_ADDR : + { + // nothing, wait the update of internal register (pc) + break; + } + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE : + { + // nothing : wait end of update upt + break; + } + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR : + { + // nothing, wait the update of internal register (pc) + break; + } + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND : { // Wait end of all instruction @@ -88,25 +130,5 @@ // state = CONTEXT_STATE_OK; // @@@ TODO : make MISS fast (miss decod) - state = CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR; - break; - } - case CONTEXT_STATE_KO_EXCEP_SPR : - { - // nothing, wait the update of internal register (epcr, eear, sr, esr) - break; - } - case CONTEXT_STATE_KO_MISS_BRANCH_ADDR : - { - // nothing, wait the update of internal register (pc) - break; - } - case CONTEXT_STATE_KO_MISS_LOAD_ADDR : - { - // nothing, wait the update of internal register (pc) - break; - } - case CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR : - { - // nothing, wait the update of internal register (pc) + state = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR; break; } @@ -203,4 +225,49 @@ // ------------------------------------------------------------------- + // -----[ EVENT ]----------------------------------------------------- + // ------------------------------------------------------------------- + for (uint32_t i=0; i<_param->_nb_context; i++) + if (internal_EVENT_VAL [i] and PORT_READ(in_EVENT_ACK [i])) + { + log_printf(TRACE,Context_State,FUNCTION," * EVENT [%d]",i); + // Write pc + context_state_t state = reg_STATE [i]; + + switch (state) + { + case CONTEXT_STATE_KO_EXCEP_ADDR : + { + reg_STATE [i] = CONTEXT_STATE_KO_EXCEP_SPR; + break; + } + case CONTEXT_STATE_KO_MISS_BRANCH_ADDR: + +// { +// reg_STATE [i] = CONTEXT_STATE_KO_MISS_WAITEND; //@@@ TODO : make MISS fast (miss decod) +// break; +// } + case CONTEXT_STATE_KO_MISS_LOAD_ADDR : + case CONTEXT_STATE_KO_PSYNC_ADDR : + case CONTEXT_STATE_KO_CSYNC_ADDR : + { + reg_STATE [i] = CONTEXT_STATE_OK; + break; + } + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR: + { + reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_ADDR; + break; + } + default : + { +#ifdef DEBUG_TEST + throw ERRORMORPHEO(FUNCTION,toString(_("SPR[%d], Invalid state : %s.\n"),i,toString(state).c_str())); +#endif + break; + } + } + } + + // ------------------------------------------------------------------- // -----[ BRANCH_EVENT ]---------------------------------------------- // ------------------------------------------------------------------- @@ -222,11 +289,6 @@ // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); - // priority : miss > excep > spr/sync - uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND))?2:((state == EVENT_TYPE_EXCEPTION)?1:0); + // priority : miss_load > miss_branch > excep > spr/sync + uint8_t priority0 = get_priority(state); uint8_t priority1 = 2; // miss @@ -235,6 +297,14 @@ // if context_state_ko : test the depth, and the priority of event bool is_valid = ((state == CONTEXT_STATE_OK) or + (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE) or + (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE) or (depth1< depth0) or ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth + +#ifdef DEBUG_TEST + if ((state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE) and + (depth0 != depth1)) + throw ERRORMORPHEO(FUNCTION,toString(_("BRANCH_EVENT[%d] : Invalid state : %s.\n"),i,toString(state).c_str())); +#endif log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); @@ -250,14 +320,73 @@ if (is_valid) { - Tcontrol_t dest_val = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]); // reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; - reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; //@@@ TODO : make MISS fast (miss decod) - reg_EVENT_ADDRESS [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC [i])+1; // address delay slot - reg_EVENT_ADDRESS_EPCR [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]); // address_next - reg_EVENT_ADDRESS_EPCR_VAL [i] = dest_val; - //reg_EVENT_ADDRESS_EEAR [i] = 0; - reg_EVENT_ADDRESS_EEAR_VAL [i] = 0; - reg_EVENT_IS_DELAY_SLOT [i] = 1; - reg_EVENT_IS_DS_TAKE [i] = dest_val; + + if (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE) + { + reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND; + } + else + { + reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; //@@@ TODO : make MISS fast (miss decod) + + Tcontrol_t dest_val = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]); + reg_EVENT_ADDRESS [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC [i])+1; // address delay slot + reg_EVENT_ADDRESS_EPCR [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]); // address_next + reg_EVENT_ADDRESS_EPCR_VAL [i] = dest_val; + //reg_EVENT_ADDRESS_EEAR [i] = 0; + reg_EVENT_ADDRESS_EEAR_VAL [i] = 0; + reg_EVENT_IS_DELAY_SLOT [i] = 1; + reg_EVENT_IS_DS_TAKE [i] = dest_val; + reg_EVENT_DEPTH [i] = depth; + } + } + } + + // ------------------------------------------------------------------- + // -----[ BRANCH_COMPLETE ]---------------------------------------------- + // ------------------------------------------------------------------- + for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i) + if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]) and internal_BRANCH_COMPLETE_ACK [i] + and PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i])) + { + log_printf(TRACE,Context_State,FUNCTION," * BRANCH_COMPLETE [%d]",i); + + context_state_t state = reg_STATE [i]; + + Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; + Tdepth_t depth_cur = reg_EVENT_DEPTH [i]; + Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [i]):0; + Tdepth_t depth_max = _param->_nb_inst_branch_speculated [i]; + + Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); + Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); +// Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); +// Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); + + // priority : miss_load > miss_branch > excep > spr/sync + uint8_t priority0 = get_priority(state); + uint8_t priority1 = 2; // miss + + // is_valid = can modify local information + // if context_state_ok : yes + // if context_state_ko : test the depth, and the priority of event + bool is_valid = ((state == CONTEXT_STATE_OK) or + (depth1< depth0) or + ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth + + log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); + log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); + log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); + log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); + log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); + log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); + log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); + log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); + log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); + + if (is_valid) + { +// reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; + reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE; reg_EVENT_DEPTH [i] = depth; } @@ -287,11 +416,6 @@ Tevent_type_t type = PORT_READ(in_DECOD_EVENT_TYPE [i]); - // miss > excep > spr/sync - uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); + // miss_load > miss_branch > excep > spr/sync + uint8_t priority0 = get_priority(state); uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?1:0; @@ -410,41 +534,45 @@ Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_COMMIT_EVENT_CONTEXT_ID ):0; Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_COMMIT_EVENT_DEPTH ):0; - Tdepth_t depth_cur = reg_EVENT_DEPTH [context]; - Tdepth_t depth_min = (_param->_have_port_depth )?PORT_READ(in_DEPTH_MIN [context]):0; - Tdepth_t depth_max = _param->_nb_inst_branch_speculated [context]; +// Tdepth_t depth_cur = reg_EVENT_DEPTH [context]; +// Tdepth_t depth_min = (_param->_have_port_depth )?PORT_READ(in_DEPTH_MIN [context]):0; +// Tdepth_t depth_max = _param->_nb_inst_branch_speculated [context]; - Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); - Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); -// Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); -// Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); +// Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); +// Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); +// // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); +// // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); context_state_t state = reg_STATE [context]; Tevent_type_t type = PORT_READ(in_COMMIT_EVENT_TYPE ); - // miss > excep > spr/sync - uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); - uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?1:2; // else load_miss_speculation (EVENT_TYPE_MISS_SPECULATION) - - // is_valid = can modify local information - // if context_state_ok : yes - // if context_state_ko : test the depth, and the priority of envent - - bool is_valid = ((state == CONTEXT_STATE_OK) or - (depth1< depth0) or - ((depth1==depth0) and (priority1>=priority0))); +// // miss > excep > spr/sync +// uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or +// (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or +// (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR ) or +// (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or +// (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE ) or +// (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ) or +// (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); +// uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?1:2; // else load_miss_speculation (EVENT_TYPE_MISS_SPECULATION) + +// // is_valid = can modify local information +// // if context_state_ok : yes +// // if context_state_ko : test the depth, and the priority of envent + +// bool is_valid = ((state == CONTEXT_STATE_OK) or +// (depth1< depth0) or +// ((depth1==depth0) and (priority1>=priority0))); + + // if commit send an event, also they have not yet event previous this instruction + bool is_valid = true; log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); - log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); - log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); - log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); - log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); - log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); - log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); - log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); +// log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); +// log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); +// log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); +// log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); +// log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); +// log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); +// log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); @@ -460,11 +588,25 @@ { // Test if previous branch occure - if ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR ) or - (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND)) - state_next = CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_WAITEND; - else - state_next = CONTEXT_STATE_KO_MISS_LOAD_WAITEND; + switch (state) + { + case CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE : + { + state_next = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE; + break; + } + case CONTEXT_STATE_KO_MISS_BRANCH_ADDR : + case CONTEXT_STATE_KO_MISS_BRANCH_WAITEND : + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR : + case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND : + { + state_next = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND; + break; + } + default : + { + state_next = CONTEXT_STATE_KO_MISS_LOAD_WAITEND; + break; + } + } break; } @@ -494,49 +636,4 @@ // ------------------------------------------------------------------- - // -----[ EVENT ]----------------------------------------------------- - // ------------------------------------------------------------------- - for (uint32_t i=0; i<_param->_nb_context; i++) - if (internal_EVENT_VAL [i] and PORT_READ(in_EVENT_ACK [i])) - { - log_printf(TRACE,Context_State,FUNCTION," * EVENT [%d]",i); - // Write pc - context_state_t state = reg_STATE [i]; - - switch (state) - { - case CONTEXT_STATE_KO_EXCEP_ADDR : - { - reg_STATE [i] = CONTEXT_STATE_KO_EXCEP_SPR; - break; - } - case CONTEXT_STATE_KO_MISS_BRANCH_ADDR: - -// { -// reg_STATE [i] = CONTEXT_STATE_KO_MISS_WAITEND; //@@@ TODO : make MISS fast (miss decod) -// break; -// } - case CONTEXT_STATE_KO_MISS_LOAD_ADDR : - case CONTEXT_STATE_KO_PSYNC_ADDR : - case CONTEXT_STATE_KO_CSYNC_ADDR : - { - reg_STATE [i] = CONTEXT_STATE_OK; - break; - } - case CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR: - { - reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_ADDR; - break; - } - default : - { -#ifdef DEBUG_TEST - throw ERRORMORPHEO(FUNCTION,toString(_("SPR[%d], Invalid state : %s.\n"),i,toString(state).c_str())); -#endif - break; - } - } - } - - // ------------------------------------------------------------------- // -----[ SPR_EVENT ]------------------------------------------------- // ------------------------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_min.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_min.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_min.cfg (revision 111) @@ -3,4 +3,5 @@ 1 1 *4 # nb_inst_decod 1 1 *4 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 1 1 +1 # nb_branch_speculated [0] [nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_mono_context.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_mono_context.cfg (revision 111) @@ -3,4 +3,5 @@ 1 8 *2 # nb_inst_decod 8 16 *2 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 1 2 +1 # nb_branch_speculated [0] [nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_multi_context.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/config_multi_context.cfg (revision 111) @@ -3,4 +3,5 @@ 4 4 *4 # nb_inst_decod 16 16 *4 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 2 2 +1 # nb_branch_speculated [0] [nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/main.cpp (revision 111) @@ -8,5 +8,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/include/test.h" -#define NB_PARAMS 4 +#define NB_PARAMS 5 void usage (int argc, char * argv[]) @@ -14,9 +14,10 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * nb_context (uint32_t)\n")); - err (_(" * nb_inst_decod (uint32_t)\n")); - err (_(" * size_queue (uint32_t)\n")); - err (_(" * size_general_data (uint32_t)\n")); - err (_(" * nb_branch_speculated [nb_context] (uint32_t)\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_inst_decod (uint32_t )\n")); + err (_(" * size_queue (uint32_t )\n")); + err (_(" * queue_scheme (Tdecod_queue_scheme_t)\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * nb_branch_speculated [nb_context] (uint32_t )\n")); exit (1); @@ -38,4 +39,5 @@ uint32_t _nb_inst_decod = fromString(argv[x++]); uint32_t _size_queue = fromString(argv[x++]); + Tdecod_queue_scheme_t _queue_scheme = fromString(argv[x++]); uint32_t _size_general_data = fromString(argv[x++]); @@ -54,4 +56,5 @@ _nb_inst_decod , _size_queue , + _queue_scheme , _size_general_data, _nb_branch_speculated, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/test.cpp (revision 111) @@ -7,5 +7,5 @@ */ -#define NB_ITERATION 128 +#define NB_ITERATION 512 #define CYCLE_MAX (128*NB_ITERATION) @@ -20,5 +20,5 @@ #ifdef STATISTICS - morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); + morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX); #endif @@ -234,5 +234,6 @@ address_tmp [i] = address_src [i]; - uint32_t x = rand()%_param->_nb_inst_decod; + uint32_t x = rand()%_param->_nb_inst_decod; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) { @@ -242,4 +243,7 @@ in_DECOD_IN_CONTEXT_ID [i]->write(context); in_DECOD_IN_DEPTH [i]->write(depth [context]); +#ifdef DEBUG + in_DECOD_IN_ADDRESS [i]->write(address_tmp [context]); +#endif in_DECOD_IN_ADDRESS_NEXT [i]->write(address_tmp [context]); @@ -250,4 +254,5 @@ { uint32_t x = rand()%_param->_nb_inst_decod; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) { @@ -270,4 +275,6 @@ nb_inst [context] ++; address_src [context] ++; + + LABEL(" * nb_inst : %d",nb_inst [context]); } } @@ -284,7 +291,11 @@ TEST(Tdepth_t ,out_DECOD_OUT_DEPTH [i]->read(),depth [context]); TEST(Taddress_t,out_DECOD_OUT_ADDRESS_NEXT [i]->read(),address_dest [context]); - +#ifdef DEBUG + TEST(Taddress_t,out_DECOD_OUT_ADDRESS [i]->read(),address_dest [context]); +#endif nb_inst [context] --; address_dest [context] ++; + + LABEL(" * nb_inst : %d",nb_inst [context]); } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 111) @@ -136,13 +136,27 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : std::list* reg_QUEUE ; - private : uint32_t * reg_NB_INST ;//[nb_context] - private : uint32_t reg_LAST_SLOT ; + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // implementation : common + private : std::list * reg_QUEUE ; + private : uint32_t * reg_NB_INST ;//[nb_context] + // implementation : one_fifo only + private : uint32_t reg_LAST_SLOT ; + // implementation : multi_fifo only + private : uint32_t reg_NUM_BANK_HEAD ; + private : uint32_t reg_NUM_BANK_TAIL ; // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // implementation : common private : Tcontrol_t * internal_DECOD_IN_ACK ;//[nb_inst_decod] private : Tcontrol_t * internal_DECOD_OUT_VAL ;//[nb_inst_decod] private : Tcontrol_t * internal_DECOD_OUT_ACK ;//[nb_inst_decod] + // implementation : one_fifo only + // implementation : multi_fifo only + + // function pointer + public : void (morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::*function_transition ) (void); + public : void (morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::*function_genMoore ) (void); + public : void (morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::*function_genMealy_decod_out) (void); #endif @@ -177,7 +191,15 @@ #ifdef SYSTEMC - public : void transition (void); - public : void genMoore (void); - public : void genMealy_decod_out (void); + public : void transition (void); + public : void genMoore (void); + public : void genMealy_decod_out (void); + + public : void function_one_fifo_transition (void); + public : void function_one_fifo_genMoore (void); + public : void function_one_fifo_genMealy_decod_out (void); + + public : void function_multi_fifo_transition (void); + public : void function_multi_fifo_genMoore (void); + public : void function_multi_fifo_genMealy_decod_out (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 111) @@ -11,4 +11,5 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h" namespace morpheo { @@ -24,18 +25,22 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_context ; - public : uint32_t _nb_inst_decod ; - public : uint32_t _size_queue ; -//public : uint32_t _size_general_data ; - public : uint32_t * _nb_branch_speculated ; //[nb_context] - public : uint32_t _nb_instruction_in_queue; + public : uint32_t _nb_context ; + public : uint32_t _nb_inst_decod ; + public : uint32_t _size_queue ; + public : Tdecod_queue_scheme_t _queue_scheme ; +//public : uint32_t _size_general_data ; + public : uint32_t * _nb_branch_speculated ; //[nb_context] + public : uint32_t _nb_instruction_in_queue; + + public : uint32_t _nb_bank; //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t nb_context , - uint32_t nb_inst_decod , - uint32_t size_queue , - uint32_t size_general_data , - uint32_t * nb_branch_speculated, - bool is_toplevel=false ); + public : Parameters (uint32_t nb_context , + uint32_t nb_inst_decod , + uint32_t size_queue , + Tdecod_queue_scheme_t queue_scheme , + uint32_t size_general_data , + uint32_t * nb_branch_speculated, + bool is_toplevel=false ); // public : Parameters (Parameters & param) ; public : ~Parameters () ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 111) @@ -18,4 +18,10 @@ namespace decod_unit { namespace decod_queue { + + typedef enum + { + DECOD_QUEUE_SCHEME_ONE_FIFO // One fifo with a instruction bundle per slot ( internal fragmentation) + ,DECOD_QUEUE_SCHEME_MULTI_FIFO // One fifo per instruction. Rename in order (no internal fragmentation) + } Tdecod_queue_scheme_t; class decod_queue_entry_t @@ -117,6 +123,29 @@ }; // end namespace multi_front_end }; // end namespace core +}; // end namespace behavioural -}; // end namespace behavioural + template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_ONE_FIFO : return "one_fifo" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_MULTI_FIFO : return "multi_fifo"; break; + default : return ""; break; + } + }; + + template<> inline morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t fromString(const std::string& x) + { + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_ONE_FIFO ))) == 0) or + (x.compare("one_fifo") == 0)) + return morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_ONE_FIFO; + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_MULTI_FIFO))) == 0) or + (x.compare("multi_fifo") == 0)) + return morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::DECOD_QUEUE_SCHEME_MULTI_FIFO; + + throw (ErrorMorpheo (" : Unknow string : \""+x+"\"")); + }; + + }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue.cpp (revision 111) @@ -76,4 +76,29 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + // Function pointer + switch (_param->_queue_scheme) + { + case DECOD_QUEUE_SCHEME_ONE_FIFO : + { + function_transition = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_one_fifo_transition ; + function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_one_fifo_genMoore ; + function_genMealy_decod_out = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_one_fifo_genMealy_decod_out; + + break; + } + case DECOD_QUEUE_SCHEME_MULTI_FIFO : + { + function_transition = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_multi_fifo_transition ; + function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_multi_fifo_genMoore ; + function_genMealy_decod_out = &morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue::function_multi_fifo_genMealy_decod_out; + + break; + } + default : + { + break; + } + } + log_printf(INFO,Decod_queue,FUNCTION,_("Method - transition")); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 111) @@ -138,5 +138,9 @@ { // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - reg_QUEUE = new std::list; + switch (_param->_queue_scheme) + { + case DECOD_QUEUE_SCHEME_ONE_FIFO : reg_QUEUE = new std::list; break; + case DECOD_QUEUE_SCHEME_MULTI_FIFO : ALLOC1(reg_QUEUE,std::list,_param->_nb_bank); break; + } reg_NB_INST = new uint32_t [_param->_nb_context]; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 111) @@ -90,5 +90,9 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - delete reg_QUEUE; + switch (_param->_queue_scheme) + { + case DECOD_QUEUE_SCHEME_ONE_FIFO : delete reg_QUEUE; break; + case DECOD_QUEUE_SCHEME_MULTI_FIFO : DELETE1(reg_QUEUE,_param->_nb_bank); break; + } delete [] reg_NB_INST; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp (revision 111) @@ -0,0 +1,120 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_multi_fifo_genMealy_decod_out" + void Decod_queue::function_multi_fifo_genMealy_decod_out (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + Tcontrol_t val [_param->_nb_inst_decod]; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + val [i] = 0; + internal_DECOD_OUT_VAL [i] = 0; + internal_DECOD_OUT_ACK [i] = 0; + } + + uint32_t num_bank = reg_NUM_BANK_HEAD%_param->_nb_bank; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * num_bank : %d"),num_bank); + + if (not reg_QUEUE[num_bank].empty()) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); + + Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id [0]; + Tdepth_t depth = reg_QUEUE[num_bank].front()->_depth [0]; + Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context]):0; + Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX [context]):0; + Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL[context]); + + // is a valid instruction ? + // If DEPTH_CURRENT : + // equal at DEPTH_MIN -> not speculative + // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss + // include ]DEPTH_MIN:DEPTH_MAX] -> speculative + + // All case + // ....... min ...X... max ....... OK + // ....... min ....... max ...X... KO + // ...X... min ....... max ....... KO + // ....... max ....... min ...X... OK + // ...X... max ....... min ....... OK + // ....... max ...X... min ....... KO + + Tcontrol_t is_valid = ((depth == depth_min) or + depth_full or + ((depth_min <= depth_max)? + ((depth >= depth_min) and (depth <=depth_max)): + ((depth >= depth_min) or (depth <=depth_max)))); + //Tcontrol_t is_valid = ((depth == depth_min) or + // ((depth_min < depth_max)? + // (depth<=depth_max): + // ((depth > depth_min) or (depth <= depth_max)))); + //Tcontrol_t is_valid = depth <= depth_max; + + log_printf(TRACE,Decod_queue,FUNCTION," * is_valid : %d",is_valid); + log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); + log_printf(TRACE,Decod_queue,FUNCTION," * depth : %d",depth); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_min : %d",depth_min); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_max : %d",depth_max); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_full : %d",depth_full); +#ifdef DEBUG + log_printf(TRACE,Decod_queue,FUNCTION," * address : 0x%x (0x%x)",reg_QUEUE[num_bank].front()->_address [0],reg_QUEUE[num_bank].front()->_address [0]<<2); +#endif + log_printf(TRACE,Decod_queue,FUNCTION," * address_next : 0x%x (0x%x)",reg_QUEUE[num_bank].front()->_address_next[0],reg_QUEUE[num_bank].front()->_address_next[0]<<2); + + internal_DECOD_OUT_VAL [i] = 1; // in all case, val is set (entry is not empty, and instruction is valid) + if (is_valid) + { + val [i] = 1; + internal_DECOD_OUT_ACK [i] = PORT_READ(in_DECOD_OUT_ACK [i]); + } + else + { + // Consume the instruction (to erase) + internal_DECOD_OUT_ACK [i] = 1; + } + } + num_bank = (num_bank+1)%_param->_nb_bank; + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + log_printf(TRACE,Decod_queue,FUNCTION," * DECOD_OUT_VAL : %d",val [i]); + + PORT_WRITE(out_DECOD_OUT_VAL [i],val [i]); + } + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 111) @@ -0,0 +1,100 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_multi_fifo_genMoore" + void Decod_queue::function_multi_fifo_genMoore (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + //-------------------------------------------------------------------- + //-----[ DECOD_IN ]--------------------------------------------------- + //-------------------------------------------------------------------- + { + uint32_t num_bank = reg_NUM_BANK_TAIL; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + internal_DECOD_IN_ACK [i] = (reg_QUEUE[num_bank].size() < _param->_size_queue); + PORT_WRITE(out_DECOD_IN_ACK [i],internal_DECOD_IN_ACK [i]); + + num_bank = (num_bank+1)%_param->_nb_bank; + } + } + + //-------------------------------------------------------------------- + //-----[ DECOD_OUT ]-------------------------------------------------- + //-------------------------------------------------------------------- + { + uint32_t num_bank = reg_NUM_BANK_HEAD%_param->_nb_bank; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if (not reg_QUEUE[num_bank].empty()) + { + if (_param->_have_port_context_id) + PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE[num_bank].front()->_context_id [0]); + if (_param->_have_port_depth) + PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE[num_bank].front()->_depth [0]); + PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE[num_bank].front()->_type [0]); + PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE[num_bank].front()->_operation [0]); + PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE[num_bank].front()->_no_execute [0]); + PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE[num_bank].front()->_is_delay_slot [0]); +#ifdef DEBUG + PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE[num_bank].front()->_address [0]); +#endif + PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE[num_bank].front()->_address_next [0]); + PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE[num_bank].front()->_has_immediat [0]); + PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE[num_bank].front()->_immediat [0]); + PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE[num_bank].front()->_read_ra [0]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE[num_bank].front()->_num_reg_ra [0]); + PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE[num_bank].front()->_read_rb [0]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE[num_bank].front()->_num_reg_rb [0]); + PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE[num_bank].front()->_read_rc [0]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE[num_bank].front()->_num_reg_rc [0]); + PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE[num_bank].front()->_write_rd [0]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE[num_bank].front()->_num_reg_rd [0]); + PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE[num_bank].front()->_write_re [0]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE[num_bank].front()->_num_reg_re [0]); + PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE[num_bank].front()->_exception_use [0]); + PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE[num_bank].front()->_exception [0]); + } + num_bank = (num_bank+1)%_param->_nb_bank; + } + } + + //-------------------------------------------------------------------- + //-----[ NB_INST ]---------------------------------------------------- + //-------------------------------------------------------------------- + for (uint32_t i=0; i<_param->_nb_context; i++) + PORT_WRITE(out_NB_INST_ALL [i], reg_NB_INST [i]); + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 111) @@ -0,0 +1,205 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_multi_fifo_transition" + void Decod_queue::function_multi_fifo_transition (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + for (uint32_t i=0; i<_param->_nb_bank; ++i) + reg_QUEUE[i].clear(); + + for (uint32_t i=0; i<_param->_nb_context; i++) + reg_NB_INST [i]=0; + + reg_NUM_BANK_HEAD = 0; + reg_NUM_BANK_TAIL = 0; + } + else + { + //-------------------------------------------------------------------- + //-----[ DECOD_IN ]--------------------------------------------------- + //-------------------------------------------------------------------- + + { +#ifdef STATISTICS + bool find = false; +#endif + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); + + // Create entry + decod_queue_entry_t * entry = new decod_queue_entry_t (1); + reg_QUEUE[reg_NUM_BANK_TAIL].push_back(entry); + +#ifdef STATISTICS + find = true; + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_sum_inst_enable) ++; +#endif + + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; + + log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); + +// entry->_val [0] = 1; + entry->_context_id [0] = context; + entry->_depth [0] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; + entry->_type [0] = PORT_READ(in_DECOD_IN_TYPE [i]); + entry->_operation [0] = PORT_READ(in_DECOD_IN_OPERATION [i]); + entry->_no_execute [0] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); + entry->_is_delay_slot [0] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); +#ifdef DEBUG + entry->_address [0] = PORT_READ(in_DECOD_IN_ADDRESS [i]); +#endif + entry->_address_next [0] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]); + entry->_has_immediat [0] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]); + entry->_immediat [0] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]); + entry->_read_ra [0] = PORT_READ(in_DECOD_IN_READ_RA [i]); + entry->_num_reg_ra [0] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]); + entry->_read_rb [0] = PORT_READ(in_DECOD_IN_READ_RB [i]); + entry->_num_reg_rb [0] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]); + entry->_read_rc [0] = PORT_READ(in_DECOD_IN_READ_RC [i]); + entry->_num_reg_rc [0] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]); + entry->_write_rd [0] = PORT_READ(in_DECOD_IN_WRITE_RD [i]); + entry->_num_reg_rd [0] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]); + entry->_write_re [0] = PORT_READ(in_DECOD_IN_WRITE_RE [i]); + entry->_num_reg_re [0] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]); + entry->_exception_use [0] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]); + entry->_exception [0] = PORT_READ(in_DECOD_IN_EXCEPTION [i]); + + // Update pointer + reg_NUM_BANK_TAIL = (reg_NUM_BANK_TAIL+1)%_param->_nb_bank; + reg_NB_INST [context] ++; + + log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); + log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue")); + } + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + if (find) + (*_stat_sum_transaction_decod_in) ++; +#endif + } + + //-------------------------------------------------------------------- + //-----[ DECOD_OUT ]-------------------------------------------------- + //-------------------------------------------------------------------- + { + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i]) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); + + uint32_t num_bank = reg_NUM_BANK_HEAD; + + Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id [0]; + + log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); + + // Pop the slot + delete reg_QUEUE[num_bank].front(); + reg_QUEUE[num_bank].pop_front(); + + // Update pointer + reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; + reg_NB_INST [context] --; + } + } + + //-------------------------------------------------------------------- + //-----[ OTHERS ]----------------------------------------------------- + //-------------------------------------------------------------------- + +#if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE) + log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue"); + log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD); + log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL); + for (uint32_t i=0; i<_param->_nb_context; i++) + log_printf(TRACE,Decod_queue,FUNCTION," * reg_NB_INST [%d] : %d",i,reg_NB_INST [i]); + + for (uint32_t i=0; i<_param->_nb_bank; ++i) + { + uint32_t x=0; + uint32_t num_bank = (reg_NUM_BANK_HEAD+i)%_param->_nb_bank; + for (std::list::iterator it=reg_QUEUE[num_bank].begin(); + it!=reg_QUEUE[num_bank].end(); + it++) + { + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" + ,i + ,x + ,(*it)->_context_id [0] + ,(*it)->_depth [0] + ,(*it)->_type [0] + ,(*it)->_operation [0] + ,(*it)->_no_execute [0] + ,(*it)->_is_delay_slot [0] + ,(*it)->_address [0] + ,(*it)->_address [0]<<2 + ,(*it)->_has_immediat [0] + ,(*it)->_immediat [0] + ,(*it)->_read_ra [0] + ,(*it)->_num_reg_ra [0] + ,(*it)->_read_rb [0] + ,(*it)->_num_reg_rb [0] + ,(*it)->_read_rc [0] + ,(*it)->_num_reg_rc [0] + ,(*it)->_write_rd [0] + ,(*it)->_num_reg_rd [0] + ,(*it)->_write_re [0] + ,(*it)->_num_reg_re [0] + ,(*it)->_exception_use [0] + ,(*it)->_exception [0] + ); + x++; + } + } +#endif + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + { + for (uint32_t i=0; i<_param->_nb_bank; ++i) + *(_stat_use_queue) += reg_QUEUE[i].size(); + for (uint32_t i=0; i<_param->_nb_context; i++) + *(_stat_nb_inst [i]) += reg_NB_INST [i]; + } +#endif + } + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp (revision 111) @@ -0,0 +1,121 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_one_fifo_genMealy_decod_out" + void Decod_queue::function_one_fifo_genMealy_decod_out (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + Tcontrol_t val [_param->_nb_inst_decod]; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + val [i] = 0; + internal_DECOD_OUT_VAL [i] = 0; + internal_DECOD_OUT_ACK [i] = 0; + } + + if (not reg_QUEUE->empty()) + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + uint32_t index = reg_LAST_SLOT + i; + + // Stop + if (index >= _param->_nb_inst_decod) + break; + + if (reg_QUEUE->front()->_val [index]) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); + + Tcontext_t context = reg_QUEUE->front()->_context_id [index]; + Tdepth_t depth = reg_QUEUE->front()->_depth [index]; + Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context]):0; + Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX [context]):0; + Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL[context]); + + // is a valid instruction ? + // If DEPTH_CURRENT : + // equal at DEPTH_MIN -> not speculative + // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss + // include ]DEPTH_MIN:DEPTH_MAX] -> speculative + + // All case + // ....... min ...X... max ....... OK + // ....... min ....... max ...X... KO + // ...X... min ....... max ....... KO + // ....... max ....... min ...X... OK + // ...X... max ....... min ....... OK + // ....... max ...X... min ....... KO + + Tcontrol_t is_valid = ((depth == depth_min) or + depth_full or + ((depth_min <= depth_max)? + ((depth >= depth_min) and (depth <=depth_max)): + ((depth >= depth_min) or (depth <=depth_max)))); + //Tcontrol_t is_valid = ((depth == depth_min) or + // ((depth_min < depth_max)? + // (depth<=depth_max): + // ((depth > depth_min) or (depth <= depth_max)))); + //Tcontrol_t is_valid = depth <= depth_max; + + log_printf(TRACE,Decod_queue,FUNCTION," * is_valid : %d",is_valid); + log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); + log_printf(TRACE,Decod_queue,FUNCTION," * depth : %d",depth); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_min : %d",depth_min); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_max : %d",depth_max); + log_printf(TRACE,Decod_queue,FUNCTION," * depth_full : %d",depth_full); +#ifdef DEBUG + log_printf(TRACE,Decod_queue,FUNCTION," * address : 0x%x (0x%x)",reg_QUEUE->front()->_address [index],reg_QUEUE->front()->_address [index]<<2); +#endif + log_printf(TRACE,Decod_queue,FUNCTION," * address_next : 0x%x (0x%x)",reg_QUEUE->front()->_address_next[index],reg_QUEUE->front()->_address_next[index]<<2); + internal_DECOD_OUT_VAL [index] = 1; // in all case, val is set (entry is not empty, and instruction is valid) + if (is_valid) + { + val [i] = 1; + internal_DECOD_OUT_ACK [index] = PORT_READ(in_DECOD_OUT_ACK [i]); + } + else + { + // Consume the instruction (to erase) + internal_DECOD_OUT_ACK [index] = 1; + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + log_printf(TRACE,Decod_queue,FUNCTION," * DECOD_OUT_VAL : %d",val [i]); + + PORT_WRITE(out_DECOD_OUT_VAL [i],val [i]); + } + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 111) @@ -0,0 +1,97 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_one_fifo_genMoore" + void Decod_queue::function_one_fifo_genMoore (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + //-------------------------------------------------------------------- + //-----[ DECOD_IN ]--------------------------------------------------- + //-------------------------------------------------------------------- + { + Tcontrol_t ack = reg_QUEUE->size() < _param->_size_queue; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + internal_DECOD_IN_ACK [i] = ack; + PORT_WRITE(out_DECOD_IN_ACK [i],ack); + } + } + + //-------------------------------------------------------------------- + //-----[ DECOD_OUT ]-------------------------------------------------- + //-------------------------------------------------------------------- + if (not reg_QUEUE->empty()) + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + uint32_t index = reg_LAST_SLOT + i; + + // Stop + if (index >= _param->_nb_inst_decod) + break; + + if (_param->_have_port_context_id) + PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE->front()->_context_id [index]); + if (_param->_have_port_depth) + PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE->front()->_depth [index]); + PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE->front()->_type [index]); + PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE->front()->_operation [index]); + PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE->front()->_no_execute [index]); + PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE->front()->_is_delay_slot [index]); +#ifdef DEBUG + PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE->front()->_address [index]); +#endif + PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE->front()->_address_next [index]); + PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE->front()->_has_immediat [index]); + PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE->front()->_immediat [index]); + PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE->front()->_read_ra [index]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE->front()->_num_reg_ra [index]); + PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE->front()->_read_rb [index]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE->front()->_num_reg_rb [index]); + PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE->front()->_read_rc [index]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE->front()->_num_reg_rc [index]); + PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE->front()->_write_rd [index]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE->front()->_num_reg_rd [index]); + PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE->front()->_write_re [index]); + PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE->front()->_num_reg_re [index]); + PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE->front()->_exception_use [index]); + PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE->front()->_exception [index]); + } + + //-------------------------------------------------------------------- + //-----[ NB_INST ]---------------------------------------------------- + //-------------------------------------------------------------------- + for (uint32_t i=0; i<_param->_nb_context; i++) + PORT_WRITE(out_NB_INST_ALL [i], reg_NB_INST [i]); + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 111) @@ -0,0 +1,219 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace decod_unit { +namespace decod_queue { + + +#undef FUNCTION +#define FUNCTION "Decod_queue::function_one_fifo_transition" + void Decod_queue::function_one_fifo_transition (void) + { + log_begin(Decod_queue,FUNCTION); + log_function(Decod_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + reg_QUEUE->clear(); + + for (uint32_t i=0; i<_param->_nb_context; i++) + reg_NB_INST [i]=0; + + reg_LAST_SLOT = 0; + } + else + { + //-------------------------------------------------------------------- + //-----[ DECOD_IN ]--------------------------------------------------- + //-------------------------------------------------------------------- + decod_queue_entry_t * entry = NULL; + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); + + if (entry == NULL) + { + // Once creation and insert in queue + entry = new decod_queue_entry_t (_param->_nb_inst_decod); + reg_QUEUE->push_back(entry); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_sum_transaction_decod_in) ++; +#endif + } + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_sum_inst_enable) ++; +#endif + + Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; + + log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); + + entry->_val [i] = 1; + entry->_context_id [i] = context; + entry->_depth [i] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; + entry->_type [i] = PORT_READ(in_DECOD_IN_TYPE [i]); + entry->_operation [i] = PORT_READ(in_DECOD_IN_OPERATION [i]); + entry->_no_execute [i] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); + entry->_is_delay_slot [i] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); +#ifdef DEBUG + entry->_address [i] = PORT_READ(in_DECOD_IN_ADDRESS [i]); +#endif + entry->_address_next [i] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]); + entry->_has_immediat [i] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]); + entry->_immediat [i] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]); + entry->_read_ra [i] = PORT_READ(in_DECOD_IN_READ_RA [i]); + entry->_num_reg_ra [i] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]); + entry->_read_rb [i] = PORT_READ(in_DECOD_IN_READ_RB [i]); + entry->_num_reg_rb [i] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]); + entry->_read_rc [i] = PORT_READ(in_DECOD_IN_READ_RC [i]); + entry->_num_reg_rc [i] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]); + entry->_write_rd [i] = PORT_READ(in_DECOD_IN_WRITE_RD [i]); + entry->_num_reg_rd [i] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]); + entry->_write_re [i] = PORT_READ(in_DECOD_IN_WRITE_RE [i]); + entry->_num_reg_re [i] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]); + entry->_exception_use [i] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]); + entry->_exception [i] = PORT_READ(in_DECOD_IN_EXCEPTION [i]); + + reg_NB_INST [context] ++; + + log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); + log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue")); + } + } + + //-------------------------------------------------------------------- + //-----[ DECOD_OUT ]-------------------------------------------------- + //-------------------------------------------------------------------- + if (not reg_QUEUE->empty()) + { + bool find = false; + + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + // Test transaction : if ok then invalid slot + // In order by rename logic + if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i]) + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); + +#ifdef DEBUG_TEST + if (reg_LAST_SLOT != i) + throw ERRORMORPHEO(FUNCTION,toString(_("reg_LAST_SLOT (%d) is different at decod_out port (%d)."),reg_LAST_SLOT,i)); +#endif + reg_LAST_SLOT ++; + + reg_QUEUE->front()->_val [i] = 0; + + Tcontext_t context = reg_QUEUE->front()->_context_id [i]; + log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); + + reg_NB_INST [context] --; + log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); + } + // Test if slot is (again) valid, if yes, then have less one instruction in the entry + find |= reg_QUEUE->front()->_val [i]; + } + + // test if can free the entry : test if have consume all entry + if (not find) // no valid instruction in current slot + { + log_printf(TRACE,Decod_queue,FUNCTION,_(" * POP queue")); + + // can pop the slot + delete reg_QUEUE->front(); + reg_QUEUE->pop_front(); + + reg_LAST_SLOT = 0; + } + } + } + +#if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE) + log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue"); + log_printf(TRACE,Decod_queue,FUNCTION," * reg_LAST_SLOT : %d",reg_LAST_SLOT); + uint32_t x=0; + for (std::list::iterator it=reg_QUEUE->begin(); + it!=reg_QUEUE->end(); + it++) + { + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) + { + if ((*it)->_val [i]) + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" + ,x + ,i + ,(*it)->_val [i] + ,(*it)->_context_id [i] + ,(*it)->_depth [i] + ,(*it)->_type [i] + ,(*it)->_operation [i] + ,(*it)->_no_execute [i] + ,(*it)->_is_delay_slot [i] + ,(*it)->_address [i] + ,(*it)->_address [i]<<2 + ,(*it)->_has_immediat [i] + ,(*it)->_immediat [i] + ,(*it)->_read_ra [i] + ,(*it)->_num_reg_ra [i] + ,(*it)->_read_rb [i] + ,(*it)->_num_reg_rb [i] + ,(*it)->_read_rc [i] + ,(*it)->_num_reg_rc [i] + ,(*it)->_write_rd [i] + ,(*it)->_num_reg_rd [i] + ,(*it)->_write_re [i] + ,(*it)->_num_reg_re [i] + ,(*it)->_exception_use [i] + ,(*it)->_exception [i] + ); + else + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %d" + ,x + ,i + ,(*it)->_val [i] + ); + + } + x++; + } +#endif + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + { + *(_stat_use_queue) += reg_QUEUE->size(); + for (uint32_t i=0; i<_param->_nb_context; i++) + *(_stat_nb_inst [i]) += reg_NB_INST [i]; + } +#endif + + log_end(Decod_queue,FUNCTION); + }; + +}; // end namespace decod_queue +}; // end namespace decod_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMealy_decod_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMealy_decod_out.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMealy_decod_out.cpp (revision 111) @@ -25,86 +25,5 @@ log_function(Decod_queue,FUNCTION,_name.c_str()); - Tcontrol_t val [_param->_nb_inst_decod]; - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - val [i] = 0; - internal_DECOD_OUT_VAL [i] = 0; - internal_DECOD_OUT_ACK [i] = 0; - } - - if (not reg_QUEUE->empty()) - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - uint32_t index = reg_LAST_SLOT + i; - - // Stop - if (index >= _param->_nb_inst_decod) - break; - - if (reg_QUEUE->front()->_val [index]) - { - log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); - - Tcontext_t context = reg_QUEUE->front()->_context_id [index]; - Tdepth_t depth = reg_QUEUE->front()->_depth [index]; - Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context]):0; - Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX [context]):0; - Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL[context]); - - // is a valid instruction ? - // If DEPTH_CURRENT : - // equal at DEPTH_MIN -> not speculative - // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss - // include ]DEPTH_MIN:DEPTH_MAX] -> speculative - - // All case - // ....... min ...X... max ....... OK - // ....... min ....... max ...X... KO - // ...X... min ....... max ....... KO - // ....... max ....... min ...X... OK - // ...X... max ....... min ....... OK - // ....... max ...X... min ....... KO - - Tcontrol_t is_valid = ((depth == depth_min) or - depth_full or - ((depth_min <= depth_max)? - ((depth >= depth_min) and (depth <=depth_max)): - ((depth >= depth_min) or (depth <=depth_max)))); - //Tcontrol_t is_valid = ((depth == depth_min) or - // ((depth_min < depth_max)? - // (depth<=depth_max): - // ((depth > depth_min) or (depth <= depth_max)))); - //Tcontrol_t is_valid = depth <= depth_max; - - log_printf(TRACE,Decod_queue,FUNCTION," * is_valid : %d",is_valid); - log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); - log_printf(TRACE,Decod_queue,FUNCTION," * depth : %d",depth); - log_printf(TRACE,Decod_queue,FUNCTION," * depth_min : %d",depth_min); - log_printf(TRACE,Decod_queue,FUNCTION," * depth_max : %d",depth_max); - log_printf(TRACE,Decod_queue,FUNCTION," * depth_full : %d",depth_full); -#ifdef DEBUG - log_printf(TRACE,Decod_queue,FUNCTION," * address : 0x%x (0x%x)",reg_QUEUE->front()->_address [index],reg_QUEUE->front()->_address [index]<<2); -#endif - log_printf(TRACE,Decod_queue,FUNCTION," * address_next : 0x%x (0x%x)",reg_QUEUE->front()->_address_next[index],reg_QUEUE->front()->_address_next[index]<<2); - internal_DECOD_OUT_VAL [index] = 1; // in all case, val is set (entry is not empty, and instruction is valid) - if (is_valid) - { - val [i] = 1; - internal_DECOD_OUT_ACK [index] = PORT_READ(in_DECOD_OUT_ACK [i]); - } - else - { - // Consume the instruction (to erase) - internal_DECOD_OUT_ACK [index] = 1; - } - } - } - - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - log_printf(TRACE,Decod_queue,FUNCTION," * DECOD_OUT_VAL : %d",val [i]); - - PORT_WRITE(out_DECOD_OUT_VAL [i],val [i]); - } + (this->*function_genMealy_decod_out) (); log_end(Decod_queue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp (revision 111) @@ -25,62 +25,5 @@ log_function(Decod_queue,FUNCTION,_name.c_str()); - //-------------------------------------------------------------------- - //-----[ DECOD_IN ]--------------------------------------------------- - //-------------------------------------------------------------------- - { - Tcontrol_t ack = reg_QUEUE->size() < _param->_size_queue; - - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - internal_DECOD_IN_ACK [i] = ack; - PORT_WRITE(out_DECOD_IN_ACK [i],ack); - } - } - - //-------------------------------------------------------------------- - //-----[ DECOD_OUT ]-------------------------------------------------- - //-------------------------------------------------------------------- - if (not reg_QUEUE->empty()) - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - uint32_t index = reg_LAST_SLOT + i; - - // Stop - if (index >= _param->_nb_inst_decod) - break; - - if (_param->_have_port_context_id) - PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE->front()->_context_id [index]); - if (_param->_have_port_depth) - PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE->front()->_depth [index]); - PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE->front()->_type [index]); - PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE->front()->_operation [index]); - PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE->front()->_no_execute [index]); - PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE->front()->_is_delay_slot [index]); -#ifdef DEBUG - PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE->front()->_address [index]); -#endif - PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE->front()->_address_next [index]); - PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE->front()->_has_immediat [index]); - PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE->front()->_immediat [index]); - PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE->front()->_read_ra [index]); - PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE->front()->_num_reg_ra [index]); - PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE->front()->_read_rb [index]); - PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE->front()->_num_reg_rb [index]); - PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE->front()->_read_rc [index]); - PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE->front()->_num_reg_rc [index]); - PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE->front()->_write_rd [index]); - PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE->front()->_num_reg_rd [index]); - PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE->front()->_write_re [index]); - PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE->front()->_num_reg_re [index]); - PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE->front()->_exception_use [index]); - PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE->front()->_exception [index]); - } - - //-------------------------------------------------------------------- - //-----[ NB_INST ]---------------------------------------------------- - //-------------------------------------------------------------------- - for (uint32_t i=0; i<_param->_nb_context; i++) - PORT_WRITE(out_NB_INST_ALL [i], reg_NB_INST [i]); + (this->*function_genMoore) (); log_end(Decod_queue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp (revision 111) @@ -25,184 +25,5 @@ log_function(Decod_queue,FUNCTION,_name.c_str()); - if (PORT_READ(in_NRESET) == 0) - { - reg_QUEUE->clear(); - - for (uint32_t i=0; i<_param->_nb_context; i++) - reg_NB_INST [i]=0; - - reg_LAST_SLOT = 0; - } - else - { - //-------------------------------------------------------------------- - //-----[ DECOD_IN ]--------------------------------------------------- - //-------------------------------------------------------------------- - decod_queue_entry_t * entry = NULL; - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) - { - log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); - - if (entry == NULL) - { - // Once creation and insert in queue - entry = new decod_queue_entry_t (_param->_nb_inst_decod); - reg_QUEUE->push_back(entry); - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_sum_transaction_decod_in) ++; -#endif - } - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_sum_inst_enable) ++; -#endif - - Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; - - log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); - - entry->_val [i] = 1; - entry->_context_id [i] = context; - entry->_depth [i] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; - entry->_type [i] = PORT_READ(in_DECOD_IN_TYPE [i]); - entry->_operation [i] = PORT_READ(in_DECOD_IN_OPERATION [i]); - entry->_no_execute [i] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); - entry->_is_delay_slot [i] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); -#ifdef DEBUG - entry->_address [i] = PORT_READ(in_DECOD_IN_ADDRESS [i]); -#endif - entry->_address_next [i] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]); - entry->_has_immediat [i] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]); - entry->_immediat [i] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]); - entry->_read_ra [i] = PORT_READ(in_DECOD_IN_READ_RA [i]); - entry->_num_reg_ra [i] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]); - entry->_read_rb [i] = PORT_READ(in_DECOD_IN_READ_RB [i]); - entry->_num_reg_rb [i] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]); - entry->_read_rc [i] = PORT_READ(in_DECOD_IN_READ_RC [i]); - entry->_num_reg_rc [i] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]); - entry->_write_rd [i] = PORT_READ(in_DECOD_IN_WRITE_RD [i]); - entry->_num_reg_rd [i] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]); - entry->_write_re [i] = PORT_READ(in_DECOD_IN_WRITE_RE [i]); - entry->_num_reg_re [i] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]); - entry->_exception_use [i] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]); - entry->_exception [i] = PORT_READ(in_DECOD_IN_EXCEPTION [i]); - - reg_NB_INST [context] ++; - - log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); - log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue")); - } - } - - //-------------------------------------------------------------------- - //-----[ DECOD_OUT ]-------------------------------------------------- - //-------------------------------------------------------------------- - if (not reg_QUEUE->empty()) - { - bool find = false; - - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - // Test transaction : if ok then invalid slot - // In order by rename logic - if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i]) - { - log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); - -#ifdef DEBUG_TEST - if (reg_LAST_SLOT != i) - throw ERRORMORPHEO(FUNCTION,toString(_("reg_LAST_SLOT (%d) is different at decod_out port (%d)."),reg_LAST_SLOT,i)); -#endif - reg_LAST_SLOT ++; - - reg_QUEUE->front()->_val [i] = 0; - - Tcontext_t context = reg_QUEUE->front()->_context_id [i]; - log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); - - reg_NB_INST [context] --; - log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); - } - // Test if slot is (again) valid, if yes, then have less one instruction in the entry - find |= reg_QUEUE->front()->_val [i]; - } - - // test if can free the entry : test if have consume all entry - if (not find) // no valid instruction in current slot - { - log_printf(TRACE,Decod_queue,FUNCTION,_(" * POP queue")); - - // can pop the slot - delete reg_QUEUE->front(); - reg_QUEUE->pop_front(); - - reg_LAST_SLOT = 0; - } - } - } - -#if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE) - log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue"); - log_printf(TRACE,Decod_queue,FUNCTION," * reg_LAST_SLOT : %d",reg_LAST_SLOT); - uint32_t x=0; - for (std::list::iterator it=reg_QUEUE->begin(); - it!=reg_QUEUE->end(); - it++) - { - for (uint32_t i=0; i<_param->_nb_inst_decod; i++) - { - if ((*it)->_val [i]) - log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" - ,x - ,i - ,(*it)->_val [i] - ,(*it)->_context_id [i] - ,(*it)->_depth [i] - ,(*it)->_type [i] - ,(*it)->_operation [i] - ,(*it)->_no_execute [i] - ,(*it)->_is_delay_slot [i] - ,(*it)->_address [i] - ,(*it)->_address [i]<<2 - ,(*it)->_has_immediat [i] - ,(*it)->_immediat [i] - ,(*it)->_read_ra [i] - ,(*it)->_num_reg_ra [i] - ,(*it)->_read_rb [i] - ,(*it)->_num_reg_rb [i] - ,(*it)->_read_rc [i] - ,(*it)->_num_reg_rc [i] - ,(*it)->_write_rd [i] - ,(*it)->_num_reg_rd [i] - ,(*it)->_write_re [i] - ,(*it)->_num_reg_re [i] - ,(*it)->_exception_use [i] - ,(*it)->_exception [i] - ); - else - log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %d" - ,x - ,i - ,(*it)->_val [i] - ); - - } - x++; - } -#endif - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - { - *(_stat_use_queue) += reg_QUEUE->size(); - for (uint32_t i=0; i<_param->_nb_context; i++) - *(_stat_nb_inst [i]) += reg_NB_INST [i]; - } -#endif + (this->*function_transition) (); #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 111) @@ -20,10 +20,11 @@ #undef FUNCTION #define FUNCTION "Decod_queue::Parameters" - Parameters::Parameters (uint32_t nb_context , - uint32_t nb_inst_decod , - uint32_t size_queue , - uint32_t size_general_data , - uint32_t * nb_branch_speculated, - bool is_toplevel ) + Parameters::Parameters (uint32_t nb_context , + uint32_t nb_inst_decod , + uint32_t size_queue , + Tdecod_queue_scheme_t queue_scheme , + uint32_t size_general_data , + uint32_t * nb_branch_speculated, + bool is_toplevel) { log_begin(Decod_queue,FUNCTION); @@ -32,8 +33,11 @@ _nb_inst_decod = nb_inst_decod ; _size_queue = size_queue/nb_inst_decod; -// _size_general_data = size_general_data ; - _nb_branch_speculated = nb_branch_speculated; - _nb_instruction_in_queue = size_queue; - + _queue_scheme = queue_scheme ; +// _size_general_data = size_general_data ; + _nb_branch_speculated = nb_branch_speculated ; + _nb_instruction_in_queue = size_queue ; + + _nb_bank = nb_inst_decod ; + test(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_msg_error.cpp (revision 111) @@ -30,4 +30,18 @@ test.error("Size of decod queue must be a multiple of nb_instruction.\n"); + switch (_queue_scheme) + { + case DECOD_QUEUE_SCHEME_ONE_FIFO : + case DECOD_QUEUE_SCHEME_MULTI_FIFO : + { + break; + } + default : + { + test.error(toString(_("Decod queue scheme '%s' is not supported. Please wait a next revision.\n"),toString(_queue_scheme).c_str())); + break; + } + } + log_end(Decod_queue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_print.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters_print.cpp (revision 111) @@ -30,4 +30,5 @@ xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); + xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data)); xml.singleton_end(); for (uint32_t i=0;i<_nb_context; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_min.cfg (revision 111) @@ -4,4 +4,5 @@ 1 1 +1 # nb_inst_decod 1 1 +1 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 1 1 +1 # nb_branch_speculated [0][nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_mono_context.cfg (revision 111) @@ -4,4 +4,5 @@ 1 4 *4 # nb_inst_decod 4 16 *4 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 1 1 *4 # nb_branch_speculated [0][nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/config_multi_context.cfg (revision 111) @@ -7,4 +7,5 @@ 1 8 *4 # nb_inst_decod 16 16 *4 # size_queue +0 1 +1 # queue_scheme 32 32 +1 # size_general_data 1 1 *4 # nb_branch_speculated [0][nb_context] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/main.cpp (revision 111) @@ -9,5 +9,5 @@ #include "Behavioural/Custom/include/Custom_example.h" -#define NB_PARAMS 7 +#define NB_PARAMS 8 void usage (int argc, char * argv[]) @@ -15,13 +15,14 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * nb_context (uint32_t )\n")); - err (_(" * nb_inst_fetch [nb_context] (uint32_t )\n")); - err (_(" * nb_inst_decod (uint32_t )\n")); - err (_(" * size_queue (uint32_t )\n")); - err (_(" * size_general_data (uint32_t )\n")); - err (_(" * nb_branch_speculated [nb_context] (uint32_t )\n")); - err (_(" * nb_context_select (uint32_t )\n")); - err (_(" * select_priority (Tpriority_t )\n")); - err (_(" * select_load_balancing (Tload_balancing_t)\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_inst_fetch [nb_context] (uint32_t )\n")); + err (_(" * nb_inst_decod (uint32_t )\n")); + err (_(" * size_queue (uint32_t )\n")); + err (_(" * queue_scheme (Tdecod_queue_scheme_t)\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * nb_branch_speculated [nb_context] (uint32_t )\n")); + err (_(" * nb_context_select (uint32_t )\n")); + err (_(" * select_priority (Tpriority_t )\n")); + err (_(" * select_load_balancing (Tload_balancing_t )\n")); exit (1); @@ -51,4 +52,5 @@ uint32_t _nb_inst_decod = fromString(argv[x++]); uint32_t _size_queue = fromString(argv[x++]); + decod_queue::Tdecod_queue_scheme_t _queue_scheme = fromString(argv[x++]); uint32_t _size_general_data = fromString(argv[x++]); uint32_t * _nb_branch_speculated = new uint32_t [_nb_context]; @@ -77,4 +79,5 @@ _nb_inst_decod , _size_queue , + _queue_scheme , _size_general_data , _nb_branch_speculated , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Parameters.h (revision 111) @@ -30,4 +30,6 @@ public : uint32_t _nb_inst_decod ; public : uint32_t _size_queue ; + public : decod_queue::Tdecod_queue_scheme_t + _queue_scheme ; //public : uint32_t _size_general_data ; public : uint32_t * _nb_branch_speculated ; //[nb_context] @@ -50,4 +52,6 @@ uint32_t nb_inst_decod , uint32_t size_queue , + decod_queue::Tdecod_queue_scheme_t + queue_scheme , uint32_t size_general_data , uint32_t * nb_branch_speculated , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters.cpp (revision 111) @@ -23,4 +23,6 @@ uint32_t nb_inst_decod , uint32_t size_queue , + decod_queue::Tdecod_queue_scheme_t + queue_scheme , uint32_t size_general_data , uint32_t * nb_branch_speculated , @@ -40,4 +42,5 @@ _nb_inst_decod = nb_inst_decod ; _size_queue = size_queue ; + _queue_scheme = queue_scheme ; // _size_general_data = size_general_data ; _nb_branch_speculated = nb_branch_speculated ; @@ -71,4 +74,5 @@ _nb_inst_decod , _size_queue , + _queue_scheme , size_general_data , _nb_branch_speculated); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Parameters_print.cpp (revision 111) @@ -29,4 +29,5 @@ xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); + xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); xml.singleton_begin("nb_context_select "); xml.attribut("value",toString(_nb_context_select )); xml.singleton_end(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 111) @@ -53,4 +53,6 @@ if (PORT_READ(in_PREDICT_ACK) and internal_PREDICT_VAL) { + log_printf(TRACE,Address_management,FUNCTION," * PREDICT"); + bool branch_is_current = reg_PC_NEXT_IS_DS_TAKE; if (branch_is_current) @@ -90,4 +92,5 @@ if (internal_ADDRESS_VAL and PORT_READ(in_ADDRESS_ACK)) { + reg_PC_ACCESS_VAL = 0; #ifdef STATISTICS @@ -102,9 +105,14 @@ #endif } + + // ========================================= + // ===== Shift Register ==================== + // ========================================= // Shift register - - if (not reg_PC_ACCESS_VAL and reg_PC_CURRENT_VAL and reg_PC_NEXT_VAL and reg_PC_NEXT_NEXT_VAL) - { + if (reg_PC_NEXT_NEXT_VAL and reg_PC_NEXT_VAL and reg_PC_CURRENT_VAL and not reg_PC_ACCESS_VAL) + { + log_printf(TRACE,Address_management,FUNCTION," * New PC_ACCESS"); + reg_PC_ACCESS_VAL = 1; // new request reg_PC_CURRENT_VAL = 0; // invalid current @@ -120,40 +128,38 @@ } - if (not reg_PC_CURRENT_VAL) - { - bool val = reg_PC_NEXT_VAL; - reg_PC_CURRENT_VAL = val; // new PC_CURRENT if PC_NEXT is valid - reg_PC_NEXT_VAL = 0; // invalid next - - if (val) - { - reg_PC_CURRENT = reg_PC_NEXT ; - reg_PC_CURRENT_IS_DS_TAKE = reg_PC_NEXT_IS_DS_TAKE ; - reg_PC_CURRENT_INST_IFETCH_PTR = reg_PC_NEXT_INST_IFETCH_PTR ; - reg_PC_CURRENT_BRANCH_STATE = reg_PC_NEXT_BRANCH_STATE ; - reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID; - - for (uint32_t i=0; i<_param->_nb_instruction; i++) - reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = reg_PC_NEXT_INSTRUCTION_ENABLE [i]; - } - } - - if (not reg_PC_NEXT_VAL) - { - bool val = reg_PC_NEXT_NEXT_VAL; - reg_PC_NEXT_VAL = val; // new PC_NEXT if PC_NEXT_NEXT is valid - reg_PC_NEXT_NEXT_VAL = 0; // invalid next_next - - if (val) - { - reg_PC_NEXT = reg_PC_NEXT_NEXT ; - reg_PC_NEXT_IS_DS_TAKE = reg_PC_NEXT_NEXT_IS_DS_TAKE ; -// reg_PC_NEXT_INST_IFETCH_PTR = reg_PC_NEXT_NEXT_INST_IFETCH_PTR ; -// reg_PC_NEXT_BRANCH_STATE = reg_PC_NEXT_NEXT_BRANCH_STATE ; -// reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID; - -// for (uint32_t i=0; i<_param->_nb_instruction; i++) -// reg_PC_NEXT_INSTRUCTION_ENABLE [i] = reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE [i]; - } +// if (not reg_PC_CURRENT_VAL and reg_PC_NEXT_VAL) + if (reg_PC_NEXT_NEXT_VAL and reg_PC_NEXT_VAL and not reg_PC_CURRENT_VAL) + { + log_printf(TRACE,Address_management,FUNCTION," * New PC_CURRENT"); + + reg_PC_CURRENT_VAL = 1; // new PC_CURRENT if PC_NEXT is valid + reg_PC_NEXT_VAL = 0; // invalid next + + reg_PC_CURRENT = reg_PC_NEXT ; + reg_PC_CURRENT_IS_DS_TAKE = reg_PC_NEXT_IS_DS_TAKE ; + reg_PC_CURRENT_INST_IFETCH_PTR = reg_PC_NEXT_INST_IFETCH_PTR ; + reg_PC_CURRENT_BRANCH_STATE = reg_PC_NEXT_BRANCH_STATE ; + reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = reg_PC_NEXT_INSTRUCTION_ENABLE [i]; + } + +// if (not reg_PC_NEXT_VAL and reg_PC_NEXT_NEXT_VAL) + if (reg_PC_NEXT_NEXT_VAL and not reg_PC_NEXT_VAL) + { + log_printf(TRACE,Address_management,FUNCTION," * New PC_NEXT"); + + reg_PC_NEXT_VAL = 1; // new PC_NEXT if PC_NEXT_NEXT is valid + reg_PC_NEXT_NEXT_VAL = 0; // invalid next_next + + reg_PC_NEXT = reg_PC_NEXT_NEXT ; + reg_PC_NEXT_IS_DS_TAKE = reg_PC_NEXT_NEXT_IS_DS_TAKE ; +// reg_PC_NEXT_INST_IFETCH_PTR = reg_PC_NEXT_NEXT_INST_IFETCH_PTR ; +// reg_PC_NEXT_BRANCH_STATE = reg_PC_NEXT_NEXT_BRANCH_STATE ; +// reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID; + +// for (uint32_t i=0; i<_param->_nb_instruction; i++) +// reg_PC_NEXT_INSTRUCTION_ENABLE [i] = reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE [i]; } @@ -161,4 +167,7 @@ // ===== EVENT ============================= // ========================================= + + // Event is after shift register : because, it's to write in pc_next and in not pc_current + if (PORT_READ(in_EVENT_VAL) and internal_EVENT_ACK) { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_meta_predictor.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_meta_predictor.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_meta_predictor.cfg (revision 111) @@ -0,0 +1,10 @@ +Meta_Predictor_Glue +4 4 +1 # nb_inst_predict +4 4 +1 # nb_inst_update +3 3 +1 # nb_predictor +8 8 +1 # predictor_size_history [0] [nb_predictor] +17 17 +1 # predictor_size_history [1] [nb_predictor] +4 4 +1 # predictor_size_history [2] [nb_predictor] +1 1 +1 # predictor_update_on_prediction [0] [nb_predictor] +1 1 +1 # predictor_update_on_prediction [1] [nb_predictor] +0 0 +1 # predictor_update_on_prediction [2] [nb_predictor] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_two_level.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_two_level.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/config_two_level.cfg (revision 111) @@ -0,0 +1,6 @@ +Meta_Predictor_Glue +4 4 +1 # nb_inst_predict +4 4 +1 # nb_inst_update +1 1 +1 # nb_predictor +16 16 +1 # predictor_size_history [0] [nb_predictor] +1 1 +1 # predictor_update_on_prediction [0] [nb_predictor] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/configuration.cfg (revision 110) +++ (revision ) @@ -1,1 +1,0 @@ -Meta_Predictor_Glue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/main.cpp (revision 111) @@ -7,6 +7,7 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/include/test.h" +#include "Behavioural/include/Selftest.h" -#define NB_PARAMS 0 +#define NB_PARAMS 3 void usage (int argc, char * argv[]) @@ -14,5 +15,9 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * ()\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + err (_(" * nb_predictor (uint32_t)\n")); + err (_(" * predictor_size_history [nb_predictor] (uint32_t)\n")); + err (_(" * predictor_update_on_prediction [nb_predictor] (bool )\n")); exit (1); @@ -25,5 +30,5 @@ #endif { - if (argc != static_cast(2+NB_PARAMS)) + if (argc <= static_cast(2+NB_PARAMS)) usage (argc, argv); @@ -32,4 +37,20 @@ string name = argv[x++]; + uint32_t _nb_inst_predict ; + uint32_t _nb_inst_update ; + uint32_t _nb_predictor ; + uint32_t * _predictor_size_history ;//[nb_predictor] + bool * _predictor_update_on_prediction;//[nb_predictor] + + SELFTEST0(_nb_inst_predict ,uint32_t,argv,x); + SELFTEST0(_nb_inst_update ,uint32_t,argv,x); + SELFTEST0(_nb_predictor ,uint32_t,argv,x); + + if (argc != static_cast(2+NB_PARAMS+2*_nb_predictor)) + usage (argc, argv); + + SELFTEST1(_predictor_size_history ,uint32_t,argv,x,_nb_predictor); + SELFTEST1(_predictor_update_on_prediction,bool ,argv,x,_nb_predictor); + int _return = EXIT_SUCCESS; try @@ -37,4 +58,9 @@ morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue::Parameters ( + _nb_inst_predict , + _nb_inst_update , + _nb_predictor , + _predictor_size_history , + _predictor_update_on_prediction, true //is_toplevel ); @@ -63,4 +89,7 @@ } + DELETE1(_predictor_update_on_prediction,_param->_nb_predictor); + DELETE1(_predictor_size_history ,_param->_nb_predictor); + return (_return); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/SelfTest/src/test.cpp (revision 111) @@ -51,4 +51,24 @@ sc_signal * in_NRESET = new sc_signal ("NRESET"); + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HISTORY ,"out_PREDICT_HISTORY ",Thistory_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIRECTION ,"out_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL(out_PREDICT_PREDICTOR_VAL ,"out_PREDICT_PREDICTOR_VAL ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL( in_PREDICT_PREDICTOR_ACK ," in_PREDICT_PREDICTOR_ACK ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL( in_PREDICT_PREDICTOR_HISTORY ," in_PREDICT_PREDICTOR_HISTORY ",Thistory_t,_param->_nb_predictor,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL( in_PREDICT_PREDICTOR_DIRECTION ," in_PREDICT_PREDICTOR_DIRECTION ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_predict); + ALLOC2_SC_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION_VAL,"out_PREDICT_PREDICTOR_DIRECTION_VAL",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_predict); // if update_on_prediction + ALLOC2_SC_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION ,"out_PREDICT_PREDICTOR_DIRECTION ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_predict); // if update_on_prediction + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_HISTORY ," in_UPDATE_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_DIRECTION ," in_UPDATE_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); + ALLOC2_SC_SIGNAL(out_UPDATE_PREDICTOR_VAL ,"out_UPDATE_PREDICTOR_VAL ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_update); + ALLOC2_SC_SIGNAL( in_UPDATE_PREDICTOR_ACK ," in_UPDATE_PREDICTOR_ACK ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_update); + ALLOC2_SC_SIGNAL(out_UPDATE_PREDICTOR_HISTORY ,"out_UPDATE_PREDICTOR_HISTORY ",Thistory_t,_param->_nb_predictor,_param->_nb_inst_update); + ALLOC2_SC_SIGNAL(out_UPDATE_PREDICTOR_DIRECTION ,"out_UPDATE_PREDICTOR_DIRECTION ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_update); + ALLOC2_SC_SIGNAL(out_UPDATE_PREDICTOR_MISS ,"out_UPDATE_PREDICTOR_MISS ",Tcontrol_t,_param->_nb_predictor,_param->_nb_inst_update); + /******************************************************** * Instanciation @@ -60,4 +80,33 @@ (*(_Meta_Predictor_Glue->in_NRESET)) (*(in_NRESET)); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_HISTORY ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_predict); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue, in_PREDICT_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_predict); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue, in_PREDICT_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_predict); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue, in_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_predict); + + for (uint32_t i=0; i<_param->_nb_predictor; ++i) + if (_param->_predictor_update_on_prediction [i]) + { + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_PREDICTOR_DIRECTION_VAL[i],_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_PREDICT_PREDICTOR_DIRECTION [i],_param->_nb_inst_predict); + } + + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_UPDATE_ACK ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue, in_UPDATE_HISTORY ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue, in_UPDATE_DIRECTION ,_param->_nb_inst_update); + + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue,out_UPDATE_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_update); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue, in_UPDATE_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_update); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue,out_UPDATE_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_update); + INSTANCE2_SC_SIGNAL(_Meta_Predictor_Glue,out_UPDATE_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_update); + for (uint32_t i=0; i<_param->_nb_predictor; ++i) + if (_param->_predictor_update_on_prediction [i]) + INSTANCE1_SC_SIGNAL(_Meta_Predictor_Glue,out_UPDATE_PREDICTOR_MISS [i] ,_param->_nb_inst_update); msg(_("<%s> : Start Simulation ............\n"),name.c_str()); @@ -104,4 +153,27 @@ delete in_CLOCK; delete in_NRESET; + + DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + + DELETE2_SC_SIGNAL(out_PREDICT_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_predict); + DELETE2_SC_SIGNAL( in_PREDICT_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_predict); + DELETE2_SC_SIGNAL( in_PREDICT_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_predict); + DELETE2_SC_SIGNAL( in_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_predict); + DELETE2_SC_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION_VAL,_param->_nb_predictor,_param->_nb_inst_predict); + DELETE2_SC_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_predict); + + DELETE1_SC_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update); + + DELETE2_SC_SIGNAL(out_UPDATE_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_update); + DELETE2_SC_SIGNAL( in_UPDATE_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_update); + DELETE2_SC_SIGNAL(out_UPDATE_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_update); + DELETE2_SC_SIGNAL(out_UPDATE_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_update); + DELETE2_SC_SIGNAL(out_UPDATE_PREDICTOR_MISS ,_param->_nb_predictor,_param->_nb_inst_update); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h (revision 111) @@ -66,4 +66,29 @@ public : SC_IN (Tcontrol_t) * in_NRESET ; + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ;// [nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ;// [nb_inst_predict] + public : SC_OUT(Thistory_t) ** out_PREDICT_HISTORY ;// [nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_DIRECTION ;// [nb_inst_predict] + + public : SC_OUT(Tcontrol_t) *** out_PREDICT_PREDICTOR_VAL ;//[nb_predictor][nb_inst_predict] + public : SC_IN (Tcontrol_t) *** in_PREDICT_PREDICTOR_ACK ;//[nb_predictor][nb_inst_predict] + public : SC_IN (Thistory_t) *** in_PREDICT_PREDICTOR_HISTORY ;//[nb_predictor][nb_inst_predict] + public : SC_IN (Tcontrol_t) *** in_PREDICT_PREDICTOR_DIRECTION ;//[nb_predictor][nb_inst_predict] + public : SC_OUT(Tcontrol_t) *** out_PREDICT_PREDICTOR_DIRECTION_VAL;//[nb_predictor][nb_inst_predict] // if update_on_prediction + public : SC_OUT(Tcontrol_t) *** out_PREDICT_PREDICTOR_DIRECTION ;//[nb_predictor][nb_inst_predict] // if update_on_prediction + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ;// [nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ;// [nb_inst_update] + public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ;// [nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ;// [nb_inst_update] + + public : SC_OUT(Tcontrol_t) *** out_UPDATE_PREDICTOR_VAL ;//[nb_predictor][nb_inst_update] + public : SC_IN (Tcontrol_t) *** in_UPDATE_PREDICTOR_ACK ;//[nb_predictor][nb_inst_update] + public : SC_OUT(Thistory_t) *** out_UPDATE_PREDICTOR_HISTORY ;//[nb_predictor][nb_inst_update] + public : SC_OUT(Tcontrol_t) *** out_UPDATE_PREDICTOR_DIRECTION ;//[nb_predictor][nb_inst_update] + public : SC_OUT(Tcontrol_t) *** out_UPDATE_PREDICTOR_MISS ;//[nb_predictor][nb_inst_update] // if update_on_prediction + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -105,4 +130,10 @@ public : void transition (void); //public : void genMoore (void); + + public : void genMealy_predict_valack (void); + public : void genMealy_predict (void); + + public : void genMealy_update_valack (void); + public : void genMealy_update (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Parameters.h (revision 111) @@ -11,4 +11,5 @@ #include "Behavioural/include/Parameters.h" #include "Common/include/Debug.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Types.h" namespace morpheo { @@ -26,7 +27,23 @@ { //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_update ; + public : uint32_t _nb_predictor ; + public : uint32_t * _predictor_size_history ;//[nb_predictor] + public : bool * _predictor_update_on_prediction;//[nb_predictor] + + public : uint32_t _size_history ; + public : uint32_t * _predictor_history_shift ;//[nb_predictor] + public : uint32_t * _predictor_history_shift_msb ;//[nb_predictor] + public : Thistory_t * _predictor_history_mask ;//[nb_predictor] + //-----[ methods ]----------------------------------------------------------- - public : Parameters (bool is_toplevel=false); + public : Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t nb_predictor , + uint32_t * predictor_size_history ,//[nb_predictor] + bool * predictor_update_on_prediction,//[nb_predictor] + bool is_toplevel=false); //public : Parameters (Parameters & param) ; public : ~Parameters (void); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue.cpp (revision 111) @@ -82,13 +82,60 @@ # endif -// log_printf(INFO,Meta_Predictor_Glue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str()); + log_printf(INFO,Meta_Predictor_Glue,FUNCTION,_("<%s> : Method - genMealy_update_valack"),_name.c_str()); -// SC_METHOD (genMoore); -// dont_initialize (); -// sensitive << (*(in_CLOCK)).neg(); // need internal register - -// # ifdef SYSTEMCASS_SPECIFIC -// // List dependency information -// # endif + SC_METHOD (genMealy_update_valack); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't need internal register + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + { + sensitive << (*(in_UPDATE_VAL [i])); + + for (uint32_t j=0; j<_param->_nb_predictor; ++j) + sensitive << (*(in_UPDATE_PREDICTOR_ACK [j][i])); + } + + log_printf(INFO,Meta_Predictor_Glue,FUNCTION,_("<%s> : Method - genMealy_update"),_name.c_str()); + + SC_METHOD (genMealy_update); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't need internal register + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + sensitive << (*(in_UPDATE_HISTORY [i])) + << (*(in_UPDATE_DIRECTION [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Meta_Predictor_Glue,FUNCTION,_("<%s> : Method - genMealy_predict_valack"),_name.c_str()); + + SC_METHOD (genMealy_predict_valack); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't need internal register + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + { + sensitive << (*(in_PREDICT_VAL [i])); + + for (uint32_t j=0; j<_param->_nb_predictor; ++j) + sensitive << (*(in_PREDICT_PREDICTOR_ACK [j][i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + + log_printf(INFO,Meta_Predictor_Glue,FUNCTION,_("<%s> : Method - genMealy_predict"),_name.c_str()); + + SC_METHOD (genMealy_predict); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't need internal register + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + for (uint32_t j=0; j<_param->_nb_predictor; ++j) + sensitive << (*(in_PREDICT_PREDICTOR_HISTORY [j][i])) + << (*(in_PREDICT_PREDICTOR_DIRECTION [j][i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_allocation.cpp (revision 111) @@ -58,4 +58,45 @@ in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict",IN,NORTH,_("Predict next address"),_param->_nb_inst_predict); + + ALLOC1_SIGNAL_IN ( in_PREDICT_VAL ,"VAL" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_ACK ,"ACK" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_PREDICT_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIRECTION ,"DIRECTION" ,Tcontrol_t,1); + } + + { + ALLOC2_INTERFACE("predict_predictor",IN,NORTH,_("Predict next address"),_param->_nb_predictor,_param->_nb_inst_predict); + + ALLOC2_SIGNAL_OUT(out_PREDICT_PREDICTOR_VAL ,"VAL" ,Tcontrol_t,1); + ALLOC2_SIGNAL_IN ( in_PREDICT_PREDICTOR_ACK ,"ACK" ,Tcontrol_t,1); + ALLOC2_SIGNAL_IN ( in_PREDICT_PREDICTOR_HISTORY ,"HISTORY" ,Thistory_t,_param->_predictor_size_history[it1]); + ALLOC2_SIGNAL_IN ( in_PREDICT_PREDICTOR_DIRECTION ,"DIRECTION" ,Tcontrol_t,1); + ALLOC2_SIGNAL_OUT(out_PREDICT_PREDICTOR_DIRECTION_VAL,"DIRECTION_VAL",Tcontrol_t,(_param->_predictor_update_on_prediction [it1])?1:0); + ALLOC2_SIGNAL_OUT(out_PREDICT_PREDICTOR_DIRECTION ,"DIRECTION" ,Tcontrol_t,(_param->_predictor_update_on_prediction [it1])?1:0); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update",IN,NORTH,_("Update predictor"),_param->_nb_inst_update); + + ALLOC1_SIGNAL_IN ( in_UPDATE_VAL ,"VAL" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_UPDATE_ACK ,"ACK" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_UPDATE_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_UPDATE_DIRECTION ,"DIRECTION" ,Tcontrol_t,1); + } + { + ALLOC2_INTERFACE("update_predictor",IN,NORTH,_("Update predictor"),_param->_nb_predictor,_param->_nb_inst_update); + + ALLOC2_SIGNAL_OUT(out_UPDATE_PREDICTOR_VAL ,"VAL" ,Tcontrol_t,1); + ALLOC2_SIGNAL_IN ( in_UPDATE_PREDICTOR_ACK ,"ACK" ,Tcontrol_t,1); + ALLOC2_SIGNAL_OUT(out_UPDATE_PREDICTOR_HISTORY ,"HISTORY" ,Thistory_t,_param->_predictor_size_history[it1]); + ALLOC2_SIGNAL_OUT(out_UPDATE_PREDICTOR_DIRECTION ,"DIRECTION" ,Tcontrol_t,1); + ALLOC2_SIGNAL_OUT(out_UPDATE_PREDICTOR_MISS ,"MISS" ,Tcontrol_t,(_param->_predictor_update_on_prediction [it1])?1:0); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_deallocation.cpp (revision 111) @@ -30,7 +30,31 @@ delete in_CLOCK ; delete in_NRESET; + + DELETE1_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict,1); + DELETE1_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict,_param->_size_history); + DELETE1_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict,1); + + DELETE2_SIGNAL(out_PREDICT_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_predict,1); + DELETE2_SIGNAL( in_PREDICT_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_predict,1); + DELETE2_SIGNAL( in_PREDICT_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_predict,_param->_predictor_size_history[it1]); + DELETE2_SIGNAL( in_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_predict,1); + DELETE2_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION_VAL,_param->_nb_predictor,_param->_nb_inst_predict,(_param->_predictor_update_on_prediction [it1])?1:0); + DELETE2_SIGNAL(out_PREDICT_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_predict,(_param->_predictor_update_on_prediction [it1])?1:0); + + DELETE1_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update,1); + DELETE1_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update,1); + DELETE1_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update,_param->_size_history); + DELETE1_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update,1); + + DELETE2_SIGNAL(out_UPDATE_PREDICTOR_VAL ,_param->_nb_predictor,_param->_nb_inst_update,1); + DELETE2_SIGNAL( in_UPDATE_PREDICTOR_ACK ,_param->_nb_predictor,_param->_nb_inst_update,1); + DELETE2_SIGNAL(out_UPDATE_PREDICTOR_HISTORY ,_param->_nb_predictor,_param->_nb_inst_update,_param->_predictor_size_history[it1]); + DELETE2_SIGNAL(out_UPDATE_PREDICTOR_DIRECTION ,_param->_nb_predictor,_param->_nb_inst_update,1); + DELETE2_SIGNAL(out_UPDATE_PREDICTOR_MISS ,_param->_nb_predictor,_param->_nb_inst_update,(_param->_predictor_update_on_prediction [it1])?1:0); } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - + delete _component; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict.cpp (revision 111) @@ -0,0 +1,105 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace meta_predictor { +namespace meta_predictor_glue { + + +#undef FUNCTION +#define FUNCTION "Meta_Predictor_Glue::genMealy_predict" + void Meta_Predictor_Glue::genMealy_predict (void) + { + log_begin(Meta_Predictor_Glue,FUNCTION); + log_function(Meta_Predictor_Glue,FUNCTION,_name.c_str()); + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + { + Thistory_t history ; + Tcontrol_t direction; + + switch (_param->_nb_predictor) + { + case 1 : + { + history = PORT_READ(in_PREDICT_PREDICTOR_HISTORY [0][i]); + direction = PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [0][i]); + + if (_param->_predictor_update_on_prediction [0]) + { + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION_VAL [0][i],true ); + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION [0][i],direction); + } + break; + } + case 3 : + { + Thistory_t history_0 = PORT_READ(in_PREDICT_PREDICTOR_HISTORY [0][i]); + Thistory_t history_1 = PORT_READ(in_PREDICT_PREDICTOR_HISTORY [1][i]); + Thistory_t history_2 = PORT_READ(in_PREDICT_PREDICTOR_HISTORY [2][i]); + Tcontrol_t direction_0 = PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [0][i]); + Tcontrol_t direction_1 = PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [1][i]); + Tcontrol_t direction_2 = PORT_READ(in_PREDICT_PREDICTOR_DIRECTION [2][i]); + + history = ((history_0 <<_param->_predictor_history_shift [0]) | + (history_1 <<_param->_predictor_history_shift [1]) | + (history_2 <<_param->_predictor_history_shift [2])); + + direction = (( direction_2 and direction_1) or + (not direction_2 and direction_0)); + + if (_param->_predictor_update_on_prediction [0]) + { + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION_VAL [0][i],direction_2 == 0); + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION [0][i],direction); + } + if (_param->_predictor_update_on_prediction [1]) + { + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION_VAL [1][i],direction_2 == 1); + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION [1][i],direction); + } + if (_param->_predictor_update_on_prediction [2]) + { + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION_VAL [2][i],true); + PORT_WRITE(out_PREDICT_PREDICTOR_DIRECTION [2][i],direction_2); + } + + break; + } + default : + { + break; + } + } + + PORT_WRITE(out_PREDICT_HISTORY [i],history ); + PORT_WRITE(out_PREDICT_DIRECTION [i],direction); + } + + log_end(Meta_Predictor_Glue,FUNCTION); + }; + +}; // end namespace meta_predictor_glue +}; // end namespace meta_predictor +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict_valack.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict_valack.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_predict_valack.cpp (revision 111) @@ -0,0 +1,57 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace meta_predictor { +namespace meta_predictor_glue { + + +#undef FUNCTION +#define FUNCTION "Meta_Predictor_Glue::genMealy_predict_valack" + void Meta_Predictor_Glue::genMealy_predict_valack (void) + { + log_begin(Meta_Predictor_Glue,FUNCTION); + log_function(Meta_Predictor_Glue,FUNCTION,_name.c_str()); + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + { + Tcontrol_t val = PORT_READ(in_PREDICT_VAL [i]); + Tcontrol_t ack = true; + + for (uint32_t j=0; j<_param->_nb_predictor; ++j) + { + PORT_WRITE(out_PREDICT_PREDICTOR_VAL [j][i],val); + + ack &= PORT_READ(in_PREDICT_PREDICTOR_ACK [j][i]); + } + + PORT_WRITE(out_PREDICT_ACK [i],ack); + } + + log_end(Meta_Predictor_Glue,FUNCTION); + }; + +}; // end namespace meta_predictor_glue +}; // end namespace meta_predictor +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update.cpp (revision 111) @@ -0,0 +1,122 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace meta_predictor { +namespace meta_predictor_glue { + + +#undef FUNCTION +#define FUNCTION "Meta_Predictor_Glue::genMealy_update" + void Meta_Predictor_Glue::genMealy_update (void) + { + log_begin(Meta_Predictor_Glue,FUNCTION); + log_function(Meta_Predictor_Glue,FUNCTION,_name.c_str()); + + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + { + Thistory_t history = PORT_READ(in_UPDATE_HISTORY [i]); + Tcontrol_t direction = PORT_READ(in_UPDATE_DIRECTION [i]); + + switch (_param->_nb_predictor) + { + case 1 : + { + Thistory_t history_0 = history; + Tcontrol_t direction_old_0 = (history_0>>_param->_predictor_history_shift_msb[0])&1; + PORT_WRITE(out_UPDATE_PREDICTOR_HISTORY [0][i],history_0); + PORT_WRITE(out_UPDATE_PREDICTOR_DIRECTION [0][i],direction); + if (_param->_predictor_update_on_prediction [0]) + PORT_WRITE(out_UPDATE_PREDICTOR_MISS [0][i],direction xor direction_old_0); + + break; + } + case 3 : + { + /* + dir_0 dir_1 dir_2 | good_dir || next_dir_2 + ------------------+-----------++----------- + 0 0 0 | 0 || no change + 1 0 0 | 0 || 1 select pred_0 but miss + 0 1 0 | 0 || 0 select pred_0 and hit + 1 1 0 | 0 || no change + 0 0 1 | 0 || no change + 1 0 1 | 0 || 1 select pred_1 and hit + 0 1 1 | 0 || 0 select pred_1 but miss + 1 1 1 | 0 || no change + 0 0 0 | 1 || no change + 1 0 0 | 1 || 0 select pred_0 and hit + 0 1 0 | 1 || 1 select pred_0 but miss + 1 1 0 | 1 || no change + 0 0 1 | 1 || no change + 1 0 1 | 1 || 0 select pred_1 but miss + 0 1 1 | 1 || 1 select pred_1 and hit + 1 1 1 | 1 || no change + + next_dir_2 = (good_dir and dir_1) or (not good_dir and dir_0) + */ + + Thistory_t history_0 = (history >>_param->_predictor_history_shift [0])&_param->_predictor_history_mask [0]; + Thistory_t history_1 = (history >>_param->_predictor_history_shift [1])&_param->_predictor_history_mask [1]; + Thistory_t history_2 = (history >>_param->_predictor_history_shift [2])&_param->_predictor_history_mask [2]; + Tcontrol_t direction_old_0 = (history_0>>_param->_predictor_history_shift_msb[0])&1; + Tcontrol_t direction_old_1 = (history_1>>_param->_predictor_history_shift_msb[1])&1; + Tcontrol_t direction_old_2 = (history_2>>_param->_predictor_history_shift_msb[2])&1; + Tcontrol_t direction_new_2 = direction_old_2; + + // Test if two predictor is different + if (direction_old_0 xor direction_old_1) + direction_new_2 = (( direction and direction_old_1) or + (not direction and direction_old_0)); + + PORT_WRITE(out_UPDATE_PREDICTOR_DIRECTION [0][i],direction); + PORT_WRITE(out_UPDATE_PREDICTOR_DIRECTION [1][i],direction); + PORT_WRITE(out_UPDATE_PREDICTOR_DIRECTION [2][i],direction_new_2); + + if (_param->_predictor_update_on_prediction [0]) + PORT_WRITE(out_UPDATE_PREDICTOR_MISS [0][i],direction xor direction_old_0); + if (_param->_predictor_update_on_prediction [1]) + PORT_WRITE(out_UPDATE_PREDICTOR_MISS [1][i],direction xor direction_old_1); + if (_param->_predictor_update_on_prediction [2]) + PORT_WRITE(out_UPDATE_PREDICTOR_MISS [2][i],direction_new_2 xor direction_old_2); + + PORT_WRITE(out_UPDATE_PREDICTOR_HISTORY [0][i],history_0); + PORT_WRITE(out_UPDATE_PREDICTOR_HISTORY [1][i],history_1); + PORT_WRITE(out_UPDATE_PREDICTOR_HISTORY [2][i],history_2); + + break; + } + default : + { + break; + } + } + } + + log_end(Meta_Predictor_Glue,FUNCTION); + }; + +}; // end namespace meta_predictor_glue +}; // end namespace meta_predictor +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update_valack.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update_valack.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_genMealy_update_valack.cpp (revision 111) @@ -0,0 +1,57 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace meta_predictor { +namespace meta_predictor_glue { + + +#undef FUNCTION +#define FUNCTION "Meta_Predictor_Glue::genMealy_update_valack" + void Meta_Predictor_Glue::genMealy_update_valack (void) + { + log_begin(Meta_Predictor_Glue,FUNCTION); + log_function(Meta_Predictor_Glue,FUNCTION,_name.c_str()); + + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + { + Tcontrol_t val = PORT_READ(in_UPDATE_VAL [i]); + Tcontrol_t ack = true; + + for (uint32_t j=0; j<_param->_nb_predictor; ++j) + { + PORT_WRITE(out_UPDATE_PREDICTOR_VAL [j][i],val); + + ack &= PORT_READ(in_UPDATE_PREDICTOR_ACK [j][i]); + } + + PORT_WRITE(out_UPDATE_ACK [i],ack); + } + + log_end(Meta_Predictor_Glue,FUNCTION); + }; + +}; // end namespace meta_predictor_glue +}; // end namespace meta_predictor +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Meta_Predictor_Glue_transition.cpp (revision 111) @@ -25,4 +25,5 @@ { log_begin(Meta_Predictor_Glue,FUNCTION); + log_function(Meta_Predictor_Glue,FUNCTION,_name.c_str()); #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/src/Parameters.cpp (revision 111) @@ -7,4 +7,6 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Parameters.h" +#include "Behavioural/include/Allocation.h" +#include "Common/include/BitManipulation.h" namespace morpheo { @@ -21,9 +23,38 @@ #undef FUNCTION #define FUNCTION "Meta_Predictor_Glue::Parameters" - Parameters::Parameters (bool is_toplevel) + Parameters::Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t nb_predictor , + uint32_t * predictor_size_history ,//[nb_predictor] + bool * predictor_update_on_prediction,//[nb_predictor] + bool is_toplevel ) { log_begin(Meta_Predictor_Glue,FUNCTION); + _nb_inst_predict = nb_inst_predict ; + _nb_inst_update = nb_inst_update ; + _nb_predictor = nb_predictor ; + _predictor_size_history = predictor_size_history ; + _predictor_update_on_prediction = predictor_update_on_prediction; + + _size_history = 0; + for (uint32_t i=0; i<_nb_predictor; ++i) + _size_history += _predictor_size_history [i]; + test(); + + ALLOC1(_predictor_history_shift ,uint32_t ,_nb_predictor); + ALLOC1(_predictor_history_shift_msb,uint32_t ,_nb_predictor); + ALLOC1(_predictor_history_mask ,Thistory_t,_nb_predictor); + + uint32_t shift = 0; + for (uint32_t i=0; i<_nb_predictor; ++i) + { + _predictor_history_shift [i] = shift; + _predictor_history_shift_msb [i] = _predictor_size_history [i]-1; + _predictor_history_mask [i] = gen_mask(_predictor_size_history [i]); + + shift += _predictor_size_history [i]; + } if (is_toplevel) @@ -57,4 +88,8 @@ { log_begin(Meta_Predictor_Glue,FUNCTION); + + DELETE1(_predictor_history_mask ,_nb_predictor); + DELETE1(_predictor_history_shift,_nb_predictor); + log_end(Meta_Predictor_Glue,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/config-alpha_21264.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/config-alpha_21264.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/config-alpha_21264.cfg (revision 111) @@ -0,0 +1,25 @@ +Meta_Predictor +1 1 +1 # nb_inst_predict +1 1 +1 # nb_inst_update +30 30 *2 # size_address +1 1 +1 # predictor_0_have_bht +10 10 +1 # predictor_0_bht_size_shifter +1024 1024 *2 # predictor_0_bht_nb_shifter +1 1 +1 # predictor_0_have_pht +3 3 +1 # predictor_0_pht_size_counter +1024 1024 *2 # predictor_0_pht_nb_counter +0 0 +1 # predictor_0_pht_size_address_share +1 1 +1 # predictor_1_have_bht +12 12 +1 # predictor_1_bht_size_shifter +2 2 *2 # predictor_1_bht_nb_shifter +1 1 +1 # predictor_1_have_pht +2 2 +1 # predictor_1_pht_size_counter +4096 4096 *2 # predictor_1_pht_nb_counter +0 0 +1 # predictor_1_pht_size_address_share +0 0 +1 # predictor_2_have_bht +4 4 +1 # predictor_2_bht_size_shifter +256 256 *2 # predictor_2_bht_nb_shifter +1 1 +1 # predictor_2_have_pht +2 2 +1 # predictor_2_pht_size_counter +4096 4096 *2 # predictor_2_pht_nb_counter +0 0 +1 # predictor_2_pht_size_address_share Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/configuration.cfg (revision 110) +++ (revision ) @@ -1,1 +1,0 @@ -Meta_Predictor Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/main.cpp (revision 111) @@ -7,6 +7,7 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/include/test.h" +#include "Behavioural/include/Selftest.h" -#define NB_PARAMS 0 +#define NB_PARAMS 3+7*3 void usage (int argc, char * argv[]) @@ -14,6 +15,14 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * ()\n")); - + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * have_bht [3] (bool )\n")); + err (_(" * bht_size_shifter [3] (uint32_t)\n")); + err (_(" * bht_nb_shifter [3] (uint32_t)\n")); + err (_(" * have_pht [3] (bool )\n")); + err (_(" * pht_size_counter [3] (uint32_t)\n")); + err (_(" * pht_nb_counter [3] (uint32_t)\n")); + err (_(" * pht_size_address_share [3] (uint32_t)\n")); exit (1); } @@ -31,4 +40,29 @@ string name = argv[x++]; + uint32_t _nb_inst_predict ; + uint32_t _nb_inst_update ; + uint32_t _size_address ; + bool _have_bht [3]; + uint32_t _bht_size_shifter [3]; + uint32_t _bht_nb_shifter [3]; + bool _have_pht [3]; + uint32_t _pht_size_counter [3]; + uint32_t _pht_nb_counter [3]; + uint32_t _pht_size_address_share [3]; + + SELFTEST0(_nb_inst_predict ,uint32_t,argv,x); + SELFTEST0(_nb_inst_update ,uint32_t,argv,x); + SELFTEST0(_size_address ,uint32_t,argv,x); + + for (uint32_t i=0; i<3; ++i) + { + SELFTEST0(_have_bht [i],bool ,argv,x); + SELFTEST0(_bht_size_shifter [i],uint32_t,argv,x); + SELFTEST0(_bht_nb_shifter [i],uint32_t,argv,x); + SELFTEST0(_have_pht [i],bool ,argv,x); + SELFTEST0(_pht_size_counter [i],uint32_t,argv,x); + SELFTEST0(_pht_nb_counter [i],uint32_t,argv,x); + SELFTEST0(_pht_size_address_share [i],uint32_t,argv,x); + } int _return = EXIT_SUCCESS; @@ -37,4 +71,14 @@ morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Parameters ( + _nb_inst_predict , + _nb_inst_update , + _size_address , + _have_bht , + _bht_size_shifter , + _bht_nb_shifter , + _have_pht , + _pht_size_counter , + _pht_nb_counter , + _pht_size_address_share, true // is_toplevel ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/SelfTest/src/test.cpp (revision 111) @@ -50,4 +50,15 @@ sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); sc_signal * in_NRESET = new sc_signal ("NRESET"); + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIRECTION ,"out_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HISTORY ,"out_PREDICT_HISTORY ",Thistory_t,_param->_nb_inst_predict); + + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_HISTORY ," in_UPDATE_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_DIRECTION ," in_UPDATE_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); /******************************************************** @@ -60,4 +71,15 @@ (*(_Meta_Predictor->in_NRESET)) (*(in_NRESET)); + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor,out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Meta_Predictor,out_PREDICT_HISTORY ,_param->_nb_inst_predict); + + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor,out_UPDATE_ACK ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_UPDATE_ADDRESS ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_UPDATE_HISTORY ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Meta_Predictor, in_UPDATE_DIRECTION ,_param->_nb_inst_update); msg(_("<%s> : Start Simulation ............\n"),name.c_str()); @@ -104,4 +126,16 @@ delete in_CLOCK; delete in_NRESET; + + DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict); + + DELETE1_SC_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_ADDRESS ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_and_pht.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_and_pht.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_and_pht.cfg (revision 111) @@ -0,0 +1,12 @@ +Two_Level_Branch_Predictor +4 4 *2 # nb_inst_predict +4 4 *2 # nb_inst_update +30 30 *2 # size_address +1 1 +1 # have_bht +4 4 *4 # bht_size_shifter +16 16 *4 # bht_nb_shifter +1 1 +1 # have_pht +4 4 *2 # pht_size_counter +32 32 *4 # pht_nb_counter +0 2 +1 # pht_size_address_share +1 1 +1 # update_on_prediction Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_only.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_only.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_bht_only.cfg (revision 111) @@ -0,0 +1,12 @@ +Two_Level_Branch_Predictor +4 4 *2 # nb_inst_predict +4 4 *2 # nb_inst_update +30 30 *2 # size_address +1 1 +1 # have_bht +1 16 *4 # bht_size_shifter +1 16 *4 # bht_nb_shifter +0 0 +1 # have_pht +0 0 +1 # pht_size_counter +0 0 *2 # pht_nb_counter +0 0 +1 # pht_size_address_share +1 1 +1 # update_on_prediction Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_pht_only.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_pht_only.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/config_pht_only.cfg (revision 111) @@ -0,0 +1,12 @@ +Two_Level_Branch_Predictor +4 4 *2 # nb_inst_predict +4 4 *2 # nb_inst_update +30 30 *2 # size_address +0 0 +1 # have_bht +0 0 *4 # bht_size_shifter +0 0 *4 # bht_nb_shifter +1 1 +1 # have_pht +1 4 *2 # pht_size_counter +1 16 *4 # pht_nb_counter +0 0 +1 # pht_size_address_share +1 1 +1 # update_on_prediction Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/configuration.cfg (revision 110) +++ (revision ) @@ -1,1 +1,0 @@ -Two_Level_Branch_Predictor Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h (revision 111) @@ -11,5 +11,5 @@ #endif -#define NB_ITERATION 1 +#define NB_ITERATION 16 #define CYCLE_MAX (1024*NB_ITERATION) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/main.cpp (revision 111) @@ -7,6 +7,7 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h" +#include "Behavioural/include/Selftest.h" -#define NB_PARAMS 0 +#define NB_PARAMS 11 void usage (int argc, char * argv[]) @@ -14,5 +15,15 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * ()\n")); + err (_(" * nb_inst_predict (uint32_t)\n")); + err (_(" * nb_inst_update (uint32_t)\n")); + err (_(" * size_address (uint32_t)\n")); + err (_(" * have_bht (bool )\n")); + err (_(" * bht_size_shifter (uint32_t)\n")); + err (_(" * bht_nb_shifter (uint32_t)\n")); + err (_(" * have_pht (bool )\n")); + err (_(" * pht_size_counter (uint32_t)\n")); + err (_(" * pht_nb_counter (uint32_t)\n")); + err (_(" * pht_size_address_share (uint32_t)\n")); + err (_(" * update_on_prediction (bool )\n")); exit (1); @@ -32,4 +43,28 @@ string name = argv[x++]; + uint32_t nb_inst_predict ; + uint32_t nb_inst_update ; + uint32_t size_address ; + bool have_bht ; + uint32_t bht_size_shifter ; + uint32_t bht_nb_shifter ; + bool have_pht ; + uint32_t pht_size_counter ; + uint32_t pht_nb_counter ; + uint32_t pht_size_address_share; + bool update_on_prediction ; + + SELFTEST0(nb_inst_predict ,uint32_t,argv,x); + SELFTEST0(nb_inst_update ,uint32_t,argv,x); + SELFTEST0(size_address ,uint32_t,argv,x); + SELFTEST0(have_bht ,bool ,argv,x); + SELFTEST0(bht_size_shifter ,uint32_t,argv,x); + SELFTEST0(bht_nb_shifter ,uint32_t,argv,x); + SELFTEST0(have_pht ,bool ,argv,x); + SELFTEST0(pht_size_counter ,uint32_t,argv,x); + SELFTEST0(pht_nb_counter ,uint32_t,argv,x); + SELFTEST0(pht_size_address_share,uint32_t,argv,x); + SELFTEST0(update_on_prediction ,bool ,argv,x); + int _return = EXIT_SUCCESS; try @@ -37,4 +72,15 @@ morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Parameters ( + nb_inst_predict , + nb_inst_update , + size_address , + have_bht , + bht_size_shifter , + bht_nb_shifter , + have_pht , + pht_size_counter , + pht_nb_counter , + pht_size_address_share, + update_on_prediction , true //is_toplevel ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp (revision 111) @@ -50,4 +50,19 @@ sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); sc_signal * in_NRESET = new sc_signal ("NRESET"); + + ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_ADDRESS ," in_PREDICT_ADDRESS ",Taddress_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_DIRECTION ,"out_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL(out_PREDICT_HISTORY ,"out_PREDICT_HISTORY ",Thistory_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_DIRECTION_VAL," in_PREDICT_DIRECTION_VAL",Tcontrol_t,_param->_nb_inst_predict); + ALLOC1_SC_SIGNAL( in_PREDICT_DIRECTION ," in_PREDICT_DIRECTION ",Tcontrol_t,_param->_nb_inst_predict); + + ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS ," in_UPDATE_ADDRESS ",Taddress_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_HISTORY ," in_UPDATE_HISTORY ",Thistory_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_DIRECTION ," in_UPDATE_DIRECTION ",Tcontrol_t,_param->_nb_inst_update); + ALLOC1_SC_SIGNAL( in_UPDATE_MISS ," in_UPDATE_MISS ",Tcontrol_t,_param->_nb_inst_update); /******************************************************** @@ -60,4 +75,22 @@ (*(_Two_Level_Branch_Predictor->in_NRESET)) (*(in_NRESET)); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_PREDICT_VAL ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor,out_PREDICT_ACK ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor,out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor,out_PREDICT_HISTORY ,_param->_nb_inst_predict); + if (_param->_update_on_prediction) + { + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_PREDICT_DIRECTION_VAL,_param->_nb_inst_predict); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_PREDICT_DIRECTION ,_param->_nb_inst_predict); + } + + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_UPDATE_VAL ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor,out_UPDATE_ACK ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_UPDATE_ADDRESS ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_UPDATE_HISTORY ,_param->_nb_inst_update); + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_UPDATE_DIRECTION ,_param->_nb_inst_update); + if (_param->_update_on_prediction) + INSTANCE1_SC_SIGNAL(_Two_Level_Branch_Predictor, in_UPDATE_MISS ,_param->_nb_inst_update); msg(_("<%s> : Start Simulation ............\n"),name.c_str()); @@ -76,6 +109,14 @@ srand(seed); + const int32_t percent_transaction_predict = 75; + const int32_t percent_transaction_update = 75; + SC_START(0); LABEL("Initialisation"); + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + in_PREDICT_VAL [i]->write(0); + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + in_UPDATE_VAL [i]->write(0); LABEL("Reset"); @@ -85,9 +126,92 @@ LABEL("Loop of Test"); - + + Thistory_t bht; + Thistory_t pht [_param->_pht_size_bank]; + for (uint32_t iteration=0; iteration_have_bht)?(rand()%_param->_bht_nb_shifter):0; + uint32_t pht_num_bank = (_param->_have_pht)?(rand()%_param->_pht_nb_bank ):0; + + LABEL(" * bht_num_reg : %d",bht_num_reg ); + LABEL(" * pht_num_bank : %d",pht_num_bank); + + { + LABEL("Init BHT and PHT"); + + bht = 0; + for (uint32_t i=0; i<_param->_pht_size_bank; ++i) + pht [i] = 0; + + uint32_t port = rand()%_param->_nb_inst_update; + + if (_param->_have_bht) + { + bool find = false; + while (not find) + { + bool val = ((rand()%2)write(val); + in_UPDATE_DIRECTION [port]->write(0); + + if (_param->_update_on_prediction) + in_UPDATE_MISS [port]->write(1); // miss + in_UPDATE_HISTORY [port]->write(0); + in_UPDATE_ADDRESS [port]->write(bht_num_reg); + + SC_START(0); + + if (val and out_UPDATE_ACK [port]->read()) + { + LABEL("UPDATE[%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + } + in_UPDATE_VAL [port]->write(0); + } + + if (_param->_have_pht) + { + for (uint32_t i=0; i<_param->_pht_size_bank; ++i) + { + bool find = false; + + while (not find) + { + bool val = ((rand()%2)write(val); + in_UPDATE_DIRECTION [port]->write(0); + + if (_param->_update_on_prediction) + in_UPDATE_MISS [port]->write(1); // miss + in_UPDATE_HISTORY [port]->write(i<<_param->_bht_history_rshift); + in_UPDATE_ADDRESS [port]->write(pht_num_bank<<_param->_pht_address_bank_rshift); + + SC_START(0); + + if (val and out_UPDATE_ACK [port]->read()) + { + LABEL("UPDATE[%d] - Transaction accepted",port); + find = true; + } + + SC_START(1); + } + in_UPDATE_VAL [port]->write(0); + } + } + } + +// if (1) +// { +// LABEL("Saturation all PHT"); + +// } + SC_START(1); } @@ -104,4 +228,19 @@ delete in_CLOCK; delete in_NRESET; + + DELETE1_SC_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_ADDRESS ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_DIRECTION_VAL,_param->_nb_inst_predict); + DELETE1_SC_SIGNAL( in_PREDICT_DIRECTION ,_param->_nb_inst_predict); + + DELETE1_SC_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_ADDRESS ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update); + DELETE1_SC_SIGNAL( in_UPDATE_MISS ,_param->_nb_inst_update); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h (revision 111) @@ -9,4 +9,5 @@ */ +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Types.h" #include "Behavioural/include/Parameters.h" #include "Common/include/Debug.h" @@ -26,7 +27,49 @@ { //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_update ; + public : uint32_t _size_address ; + public : bool _have_bht ; + public : uint32_t _bht_size_shifter ; + public : uint32_t _bht_nb_shifter ; + public : bool _have_pht ; + public : uint32_t _pht_size_counter ; + public : uint32_t _pht_nb_counter ; + public : uint32_t _pht_size_address_share ; + public : bool _update_on_prediction ; + + public : Thistory_t _pht_counter_max ; + + public : uint32_t _size_history ; + + public : Thistory_t _bht_history_mask ; + public : Thistory_t _bht_history_rshift ; + public : Thistory_t _pht_history_mask ; + public : Thistory_t _pht_history_rshift ; + + public : uint32_t _bht_size_address ; + public : uint32_t _pht_size_address ; + + public : Taddress_t _bht_address_mask ; + public : uint32_t _pht_nb_bank ; + public : uint32_t _pht_size_bank ; + public : Taddress_t _pht_address_share_mask ; + public : Taddress_t _pht_address_share_lshift; + public : Taddress_t _pht_address_bank_mask ; + public : Taddress_t _pht_address_bank_rshift ; //-----[ methods ]----------------------------------------------------------- - public : Parameters (bool is_toplevel=false); + public : Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht , + uint32_t bht_size_shifter , + uint32_t bht_nb_shifter , + bool have_pht , + uint32_t pht_size_counter , + uint32_t pht_nb_counter , + uint32_t pht_size_address_share, + bool update_on_prediction , + bool is_toplevel=false); //public : Parameters (Parameters & param) ; public : ~Parameters (void); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h (revision 111) @@ -66,9 +66,34 @@ public : SC_IN (Tcontrol_t) * in_NRESET ; + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ;//[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ;//[nb_inst_predict] + public : SC_IN (Taddress_t) ** in_PREDICT_ADDRESS ;//[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_DIRECTION ;//[nb_inst_predict] // = MSB[history] + public : SC_OUT(Thistory_t) ** out_PREDICT_HISTORY ;//[nb_inst_predict] + public : SC_IN (Tcontrol_t) ** in_PREDICT_DIRECTION_VAL;//[nb_inst_predict] // if update_on_prediction + public : SC_IN (Tcontrol_t) ** in_PREDICT_DIRECTION ;//[nb_inst_predict] // if update_on_prediction + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ;//[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ;//[nb_inst_update] + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ;//[nb_inst_update] + public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ;//[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ;//[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_MISS ;//[nb_inst_update] // if update_on_prediction + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Thistory_t * reg_BHT ;//[bht_nb_shifter] + private : Thistory_t ** reg_PHT ;//[pht_nb_counter][pht_nb_bank] // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : Tcontrol_t * internal_PREDICT_ACK ;//[nb_inst_predict] + private : Thistory_t * internal_PREDICT_BHT_NUM_REG ;//[nb_inst_predict] // if update_on_prediction + private : Thistory_t * internal_PREDICT_PHT_NUM_BANK ;//[nb_inst_predict] // if update_on_prediction + private : Thistory_t * internal_PREDICT_PHT_NUM_REG ;//[nb_inst_predict] // if update_on_prediction + + private : Tcontrol_t * internal_UPDATE_ACK ;//[nb_inst_update] #endif @@ -104,5 +129,5 @@ #ifdef SYSTEMC public : void transition (void); -//public : void genMoore (void); + public : void genMealy_predict (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp (revision 111) @@ -7,4 +7,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h" +#include "Common/include/BitManipulation.h" namespace morpheo { @@ -21,14 +22,78 @@ #undef FUNCTION #define FUNCTION "Two_Level_Branch_Predictor::Parameters" - Parameters::Parameters (bool is_toplevel) + Parameters::Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht , + uint32_t bht_size_shifter , + uint32_t bht_nb_shifter , + bool have_pht , + uint32_t pht_size_counter , + uint32_t pht_nb_counter , + uint32_t pht_size_address_share, + bool update_on_prediction , + bool is_toplevel) { log_begin(Two_Level_Branch_Predictor,FUNCTION); - test(); + _nb_inst_predict = nb_inst_predict ; + _nb_inst_update = nb_inst_update ; + _size_address = size_address ; + _have_bht = have_bht ; + _bht_size_shifter = (have_bht)?(bht_size_shifter):0; + _bht_nb_shifter = (have_bht)?(bht_nb_shifter ):0; + _have_pht = have_pht ; + _pht_size_counter = (have_pht)?(pht_size_counter ):0; + _pht_nb_counter = (have_pht)?(pht_nb_counter ):0; + _pht_size_address_share = (have_bht and have_pht)?(pht_size_address_share):0; + _update_on_prediction = update_on_prediction ; + + _bht_size_address = (_have_bht)?log2(_bht_nb_shifter):0; + _pht_size_address = (_have_pht)?log2(_pht_nb_counter):0; + + test(); + + _size_history = _bht_size_shifter + _pht_size_counter; + + _bht_history_mask = gen_mask(_bht_size_shifter); + _bht_history_rshift = 0; + _pht_history_mask = gen_mask(_pht_size_counter); + _pht_history_rshift = _bht_size_shifter; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _size_history : %d",_size_history ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_mask : 0x%x",_bht_history_mask ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_rshift : %d",_bht_history_rshift); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_mask : 0x%x",_pht_history_mask ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_rshift : %d",_pht_history_rshift); + + if (_have_bht) + { + _bht_address_mask = gen_mask(_bht_size_address); + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_address_mask : 0x%x",_bht_address_mask ); + } + + if (_have_pht) + { + _pht_counter_max = (1<<_pht_size_counter)-1; + + _pht_nb_bank = (_pht_nb_counter - (1<<_bht_size_shifter))+1; + _pht_size_bank = _pht_nb_counter / _pht_nb_bank; + + _pht_address_share_mask = gen_mask(_pht_size_address_share); + _pht_address_share_lshift= _bht_size_shifter-_pht_size_address_share; + _pht_address_bank_mask = gen_mask(log2(_pht_nb_bank)); + _pht_address_bank_rshift = _pht_size_address_share; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_nb_bank : %d" ,_pht_nb_bank ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_size_bank : %d" ,_pht_size_bank ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_share_mask : 0x%x",_pht_address_share_mask ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_share_lshift : %d" ,_pht_address_share_lshift); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_bank_mask : 0x%x",_pht_address_bank_mask ); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_bank_rshift : %d" ,_pht_address_bank_rshift ); + } if (is_toplevel) - { - copy(); - } + copy(); log_end(Two_Level_Branch_Predictor,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters_msg_error.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters_msg_error.cpp (revision 111) @@ -29,4 +29,19 @@ Parameters_test test ("Two_Level_Branch_Predictor"); + if ((_have_bht or _have_pht) == false) + test.error(_("They have no Branch History Table and no Pattern History Table. You need a less of a BHT or a PHT\n")); + + if ( _have_bht and (_size_address < _bht_size_address)) + test.error(_("The address's size must to large to the number of shifter in the Branch History Table.\n")); + + if (_have_pht and (_size_address < _pht_size_address)) + test.error(_("The address's size must to large to the number of counter in the Pattern History Table.\n")); + + if (_have_pht and _have_bht and (_bht_size_address > _pht_nb_counter)) + test.error (_("The size of shifter don't must too large that the number of counter in the Pattern History Table.\n")); + + if (_have_pht and _have_bht and (_pht_size_address_share > _bht_size_shifter)) + test.error (_("The size of address share don't must too large that the size of shifter in the Branch History Table.\n")); + log_end(Two_Level_Branch_Predictor,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp (revision 111) @@ -72,4 +72,17 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + // Constants : + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + { + internal_PREDICT_ACK [i] = 1; + PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]); + } + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + { + internal_UPDATE_ACK [i] = 1; + PORT_WRITE(out_UPDATE_ACK [i], internal_UPDATE_ACK [i]); + } + + log_printf(INFO,Two_Level_Branch_Predictor,FUNCTION,_("<%s> : Method - transition"),_name.c_str()); @@ -82,13 +95,18 @@ # endif -// log_printf(INFO,Two_Level_Branch_Predictor,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str()); + log_printf(INFO,Two_Level_Branch_Predictor,FUNCTION,_("<%s> : Method - genMealy_predict"),_name.c_str()); -// SC_METHOD (genMoore); -// dont_initialize (); -// sensitive << (*(in_CLOCK)).neg(); // need internal register - -// # ifdef SYSTEMCASS_SPECIFIC -// // List dependency information -// # endif + SC_METHOD (genMealy_predict); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // need internal register + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + sensitive +// << (*(in_PREDICT_VAL [i])) + << (*(in_PREDICT_ADDRESS [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp (revision 111) @@ -19,6 +19,4 @@ namespace meta_predictor { namespace two_level_branch_predictor { - - #undef FUNCTION @@ -58,6 +56,69 @@ in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict",IN,WEST,_("Predict direction interface"),_param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIRECTION ,"DIRECTION" ,Tcontrol_t,1 ); + ALLOC1_SIGNAL_OUT(out_PREDICT_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + if (_param->_update_on_prediction) + { + ALLOC1_SIGNAL_IN ( in_PREDICT_DIRECTION_VAL,"DIRECTION_VAL",Tcontrol_t,1 ); + ALLOC1_SIGNAL_IN ( in_PREDICT_DIRECTION ,"DIRECTION" ,Tcontrol_t,1 ); + } + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update",IN,WEST,_("Update direction interface"),_param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_UPDATE_DIRECTION ,"DIRECTION" ,Tcontrol_t,1 ); + if (_param->_update_on_prediction) + ALLOC1_SIGNAL_IN ( in_UPDATE_MISS ,"MISS" ,Tcontrol_t,1 ); + } + + if (usage_is_set(_usage,USE_SYSTEMC)) + { + if (_param->_have_bht) + { + ALLOC1(reg_BHT ,Thistory_t,_param->_bht_nb_shifter); + + for (uint32_t i=0; i<_param->_bht_nb_shifter; ++i) + reg_BHT [i] = 0; + } + + if (_param->_have_pht) + { + ALLOC2(reg_PHT ,Thistory_t,_param->_pht_nb_bank,_param->_pht_size_bank); + + for (uint32_t i=0; i<_param->_pht_nb_bank; ++i) + for (uint32_t j=0; j<_param->_pht_size_bank; ++j) + reg_PHT [i][j] = 0; + } + + + ALLOC1(internal_PREDICT_ACK ,Tcontrol_t,_param->_nb_inst_predict); + if (_param->_update_on_prediction) + { + if (_param->_have_bht) + ALLOC1(internal_PREDICT_BHT_NUM_REG ,Thistory_t,_param->_nb_inst_predict); + if (_param->_have_pht) + { + ALLOC1(internal_PREDICT_PHT_NUM_BANK ,Thistory_t,_param->_nb_inst_predict); + ALLOC1(internal_PREDICT_PHT_NUM_REG ,Thistory_t,_param->_nb_inst_predict); + } + } + ALLOC1(internal_UPDATE_ACK ,Tcontrol_t,_param->_nb_inst_update ); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - #ifdef POSITION if (usage_is_set(_usage,USE_POSITION)) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp (revision 111) @@ -30,4 +30,41 @@ delete in_CLOCK ; delete in_NRESET; + + DELETE1_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL( in_PREDICT_ADDRESS ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict,_param->_size_history); + if (_param->_update_on_prediction) + { + DELETE1_SIGNAL( in_PREDICT_DIRECTION_VAL,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL( in_PREDICT_DIRECTION ,_param->_nb_inst_predict,1 ); + } + + DELETE1_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update,1 ); + DELETE1_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update,1 ); + DELETE1_SIGNAL( in_UPDATE_ADDRESS ,_param->_nb_inst_update,_param->_size_address); + DELETE1_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update,_param->_size_history); + DELETE1_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update,1 ); + if (_param->_update_on_prediction) + DELETE1_SIGNAL( in_UPDATE_MISS ,_param->_nb_inst_update,1 ); + + if (_param->_have_bht) + DELETE1(reg_BHT ,_param->_bht_nb_shifter); + if (_param->_have_pht) + DELETE2(reg_PHT ,_param->_pht_nb_bank,_param->_pht_size_bank); + + DELETE1(internal_PREDICT_ACK ,_param->_nb_inst_predict); + if (_param->_update_on_prediction) + { + if (_param->_have_bht) + DELETE1(internal_PREDICT_BHT_NUM_REG ,_param->_nb_inst_predict); + if (_param->_have_pht) + { + DELETE1(internal_PREDICT_PHT_NUM_BANK ,_param->_nb_inst_predict); + DELETE1(internal_PREDICT_PHT_NUM_REG ,_param->_nb_inst_predict); + } + } + DELETE1(internal_UPDATE_ACK ,_param->_nb_inst_update ); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp (revision 111) @@ -0,0 +1,102 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace prediction_unit { +namespace direction { +namespace meta_predictor { +namespace two_level_branch_predictor { + + +#undef FUNCTION +#define FUNCTION "Two_Level_Branch_Predictor::genMealy_predict" + void Two_Level_Branch_Predictor::genMealy_predict (void) + { + log_begin(Two_Level_Branch_Predictor,FUNCTION); + log_function(Two_Level_Branch_Predictor,FUNCTION,_name.c_str()); + + // =================================================================== + // =====[ PREDICT ]=================================================== + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) +// if (PORT_READ(in_PREDICT_VAL[i])) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * PREDICT [%d]",i); + + Taddress_t address = PORT_READ(in_PREDICT_ADDRESS [i]); + Thistory_t history = 0; + Tcontrol_t direction; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * address : 0x%.8x",address); + + Thistory_t pht_bht_history = 0; + if (_param->_have_bht) + { + Thistory_t bht_num_reg = address & _param->_bht_address_mask; + Thistory_t bht_history = reg_BHT [bht_num_reg]; + pht_bht_history = bht_history; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%x",bht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %d",bht_num_reg); + + history = (bht_history << _param->_bht_history_rshift)&_param->_bht_history_mask ; + direction = (bht_history >> (_param->_bht_size_shifter-1))&1; + + if (_param->_update_on_prediction) + internal_PREDICT_BHT_NUM_REG [i] = bht_num_reg; + } + + if (_param->_have_pht) + { + Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask; + Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift)); + Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg]; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%x",pht_bht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history : 0x%x",pht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %d",pht_num_reg); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %d",pht_num_bank); + + history |= (pht_history << _param->_pht_history_rshift)&_param->_pht_history_mask; + direction = (pht_history >> (_param->_pht_size_counter-1))&1; + + if (_param->_update_on_prediction) + { + internal_PREDICT_PHT_NUM_REG [i] = pht_num_reg; + internal_PREDICT_PHT_NUM_BANK[i] = pht_num_bank; + } + } + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * direction : %d",direction); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * history : 0x%x",history); + + PORT_WRITE(out_PREDICT_DIRECTION [i],direction); + PORT_WRITE(out_PREDICT_HISTORY [i],history ); + } + + log_end(Two_Level_Branch_Predictor,FUNCTION); + }; + +}; // end namespace two_level_branch_predictor +}; // end namespace meta_predictor +}; // end namespace direction +}; // end namespace prediction_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp (revision 111) @@ -25,4 +25,180 @@ { log_begin(Two_Level_Branch_Predictor,FUNCTION); + log_function(Two_Level_Branch_Predictor,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + } + else + { + // =================================================================== + // =====[ PREDICT ]=================================================== + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK[i]) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * PREDICT [%d]",i); + + // Predict if + // * update_on_prediction and direction is valid + if (_param->_update_on_prediction) + if (PORT_READ(in_PREDICT_DIRECTION_VAL [i])) + { + Tcontrol_t direction = PORT_READ(in_PREDICT_DIRECTION [i]); + + if (_param->_have_bht) + { + Thistory_t bht_num_reg = internal_PREDICT_BHT_NUM_REG [i]; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %d",bht_num_reg); + + Thistory_t bht_history = reg_BHT[bht_num_reg]; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %x",bht_history); + + + bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): %x",bht_history); + reg_BHT [bht_num_reg] = bht_history; + } + + if (_param->_have_pht) + { + Thistory_t pht_num_reg = internal_PREDICT_PHT_NUM_REG [i]; + Thistory_t pht_num_bank= internal_PREDICT_PHT_NUM_BANK [i]; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %d",pht_num_reg); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %d",pht_num_bank); + + Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg]; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): %x",pht_history); + + // PHT : saturation counter + pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history)); + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): %x",pht_history); + + reg_PHT [pht_num_bank][pht_num_reg] = pht_history; + } + } + } + + // =================================================================== + // =====[ UPDATE ]==================================================== + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + if (PORT_READ(in_UPDATE_VAL[i]) and internal_UPDATE_ACK[i]) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * UPDATE [%d]",i); + + // Update if + // * update_on_prediction and miss + // * not update_on_prediction + if (not _param->_update_on_prediction or (_param->_update_on_prediction and PORT_READ(in_UPDATE_MISS [i]))) + { + Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); + Thistory_t history = PORT_READ(in_UPDATE_HISTORY [i]); + Tcontrol_t direction = PORT_READ(in_UPDATE_DIRECTION [i])&1; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * address : %.8x",address); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * direction : %d",direction); + + Thistory_t pht_bht_history = 0; + + if (_param->_have_bht) + { + Thistory_t bht_history = (history>>_param->_bht_history_rshift)&_param->_bht_history_mask; + Thistory_t bht_num_reg = address & _param->_bht_address_mask; + + pht_bht_history = bht_history; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %x",bht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %x",bht_num_reg); + + // BHT : shift register + + bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ; + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): %x",bht_history); + reg_BHT [bht_num_reg] = bht_history; + } + + if (_param->_have_pht) + { + Thistory_t pht_history = (history>>_param->_pht_history_rshift)&_param->_pht_history_mask; + Thistory_t pht_num_reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift); + Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask; + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %x",pht_bht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): %x",pht_history); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %x",pht_num_reg); + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %x",pht_num_bank); + + // PHT : saturation counter + pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history)); + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): %x",pht_history); + + reg_PHT [pht_num_bank][pht_num_reg] = pht_history; + } + } + } + } + +#if defined(DEBUG) and DEBUG_Two_Level_Branch_Predictor and (DEBUG >= DEBUG_TRACE) + if (0) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * Dump Two_Level_Branch_Predictor"); + + if (_param->_have_bht) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * Dump BHT"); + + uint32_t limit = 4; + + for (uint32_t i=0; i<_param->_bht_nb_shifter; i+=limit) + { + std::string str = ""; + + for (uint32_t j=0; j= _param->_bht_nb_shifter) + break; + else + str+=toString("[%.4d] %.4x ",index,reg_BHT[index]); + } + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," %s",str.c_str()); + } + } + + if (_param->_have_pht) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * Dump PHT"); + + uint32_t limit = 4; + + for (uint32_t num_bank=0; num_bank <_param->_pht_nb_bank; ++num_bank) + { + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," [%.4d]",num_bank); + + for (uint32_t i=0; i<_param->_pht_size_bank; i+=limit) + { + std::string str = ""; + + for (uint32_t j=0; j= _param->_pht_nb_counter) + break; + else + str+=toString("[%.4d] %.4x ",index,reg_PHT[num_bank][index]); + } + + log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," %s",str.c_str()); + } + } + } + } +#endif #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Meta_Predictor.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Meta_Predictor.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Meta_Predictor.h (revision 111) @@ -12,4 +12,7 @@ #include "systemc.h" #endif + +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Meta_Predictor_Glue.h" #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h" @@ -65,5 +68,21 @@ public : SC_IN (Tcontrol_t) * in_NRESET ; + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_PREDICT_VAL ;//[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_ACK ;//[nb_inst_predict] + public : SC_IN (Taddress_t) ** in_PREDICT_ADDRESS ;//[nb_inst_predict] + public : SC_OUT(Tcontrol_t) ** out_PREDICT_DIRECTION ;//[nb_inst_predict] // = MSB[history] + public : SC_OUT(Thistory_t) ** out_PREDICT_HISTORY ;//[nb_inst_predict] + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ;//[nb_inst_update] + public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ;//[nb_inst_update] + public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ;//[nb_inst_update] + public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ;//[nb_inst_update] + public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ;//[nb_inst_update] + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Two_Level_Branch_Predictor ** _component_two_level_branch_predictor;//[nb_predictor] + private : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue ::Meta_Predictor_Glue * _component_glue; // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h (revision 111) @@ -9,6 +9,10 @@ */ +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/include/Parameters.h" + #include "Behavioural/include/Parameters.h" #include "Common/include/Debug.h" + namespace morpheo { @@ -25,7 +29,37 @@ { //-----[ fields ]------------------------------------------------------------ + public : uint32_t _nb_inst_predict ; + public : uint32_t _nb_inst_update ; + public : uint32_t _size_address ; + public : bool _have_bht [3]; + public : uint32_t _bht_size_shifter [3]; + public : uint32_t _bht_nb_shifter [3]; + public : bool _have_pht [3]; + public : uint32_t _pht_size_counter [3]; + public : uint32_t _pht_nb_counter [3]; + public : uint32_t _pht_size_address_share [3]; + + public : bool _have_meta_predictor ; + public : uint32_t _nb_predictor ; + + public : bool * _predictor_update_on_prediction;//[nb_predictor] + public : uint32_t * _predictor_size_history ;//[nb_predictor] + public : uint32_t _size_history ; + + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Parameters ** _param_two_level_branch_predictor;//[nb_predictor] + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue ::Parameters * _param_glue; //-----[ methods ]----------------------------------------------------------- - public : Parameters (bool is_toplevel=false); + public : Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht [3], + uint32_t bht_size_shifter [3], + uint32_t bht_nb_shifter [3], + bool have_pht [3], + uint32_t pht_size_counter [3], + uint32_t pht_nb_counter [3], + uint32_t pht_size_address_share [3], + bool is_toplevel=false); //public : Parameters (Parameters & param) ; public : ~Parameters (void); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_allocation.cpp (revision 111) @@ -18,6 +18,4 @@ namespace meta_predictor { - - #undef FUNCTION #define FUNCTION "Meta_Predictor::allocation" @@ -57,9 +55,252 @@ in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("predict",IN,WEST,_("Predict direction interface"),_param->_nb_inst_predict); + + ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); + ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_PREDICT_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_OUT(out_PREDICT_DIRECTION ,"DIRECTION" ,Tcontrol_t,1 ); + ALLOC1_SIGNAL_OUT(out_PREDICT_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE("update",IN,WEST,_("Update direction interface"),_param->_nb_inst_update); + + ALLOC1_VALACK_IN ( in_UPDATE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_UPDATE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_address); + ALLOC1_SIGNAL_IN ( in_UPDATE_HISTORY ,"HISTORY" ,Thistory_t,_param->_size_history); + ALLOC1_SIGNAL_IN ( in_UPDATE_DIRECTION ,"DIRECTION" ,Tcontrol_t,1 ); + } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + std::string name; + + + { + _component_two_level_branch_predictor = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Two_Level_Branch_Predictor * [_param->_nb_predictor]; + + for (uint32_t i=0; i<_param->_nb_predictor; ++i) + { + name = _name+"_two_level_branch_predictor_"+toString(i); + log_printf(INFO,Meta_Predictor,FUNCTION,_("Create : %s"),name.c_str()); + + _component_two_level_branch_predictor [i] = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Two_Level_Branch_Predictor + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_two_level_branch_predictor[i] + ,_usage); + + _component->set_component (_component_two_level_branch_predictor[i]->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + } + + { + name = _name+"_glue"; + log_printf(INFO,Meta_Predictor,FUNCTION,_("Create : %s"),name.c_str()); + + _component_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue::Meta_Predictor_Glue + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_glue + ,_usage); + + _component->set_component (_component_glue->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ std::string src,dest; + + // =================================================================== + // =====[ Two_Level_Branch_Predictor ]================================ + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_predictor; ++i) + { + src = _name+"_two_level_branch_predictor_"+toString(i); + log_printf(INFO,Prediction_unit,FUNCTION,_("Instance : %s"),src.c_str()); + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t j=0; j<_param->_nb_inst_predict; ++j) + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(j), + dest,"predict_"+toString(j)); +#endif + + PORT_MAP(_component,src , "in_PREDICT_"+toString(j)+"_ADDRESS" , + dest, "in_PREDICT_"+toString(j)+"_ADDRESS" ); + + dest = _name+"_glue"; + +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(j), + dest,"predict_predictor_"+toString(i)+"_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src , "in_PREDICT_" +toString(j)+"_VAL" , + dest,"out_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_VAL" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_" +toString(j)+"_ACK" , + dest, "in_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_ACK" ); +// COMPONENT_MAP(_component,src , "in_PREDICT_" +toString(j)+"_ADDRESS" , +// dest,"out_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_ADDRESS" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_" +toString(j)+"_DIRECTION" , + dest, "in_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_DIRECTION" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_" +toString(j)+"_HISTORY" , + dest, "in_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_HISTORY" ); + if (_param->_predictor_update_on_prediction [i]) + { + COMPONENT_MAP(_component,src , "in_PREDICT_" +toString(j)+"_DIRECTION_VAL", + dest,"out_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_DIRECTION_VAL"); + COMPONENT_MAP(_component,src , "in_PREDICT_" +toString(j)+"_DIRECTION" , + dest,"out_PREDICT_PREDICTOR_"+toString(i)+"_"+toString(j)+"_DIRECTION" ); + } + } + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t j=0; j<_param->_nb_inst_update; ++j) + { + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(j), + dest,"update_"+toString(j)); +#endif + + PORT_MAP(_component,src , "in_UPDATE_"+toString(j)+"_ADDRESS" , + dest, "in_UPDATE_"+toString(j)+"_ADDRESS" ); + + dest = _name+"_glue"; + +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(j), + dest,"update_predictor_"+toString(i)+"_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src , "in_UPDATE_" +toString(j)+"_VAL" , + dest,"out_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_VAL" ); + COMPONENT_MAP(_component,src ,"out_UPDATE_" +toString(j)+"_ACK" , + dest, "in_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_ACK" ); +// COMPONENT_MAP(_component,src , "in_UPDATE_" +toString(j)+"_ADDRESS" , +// dest,"out_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_ADDRESS" ); + COMPONENT_MAP(_component,src , "in_UPDATE_" +toString(j)+"_DIRECTION" , + dest,"out_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_DIRECTION" ); + COMPONENT_MAP(_component,src , "in_UPDATE_" +toString(j)+"_HISTORY" , + dest,"out_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_HISTORY" ); + if (_param->_predictor_update_on_prediction [i]) + COMPONENT_MAP(_component,src , "in_UPDATE_" +toString(j)+"_MISS" , + dest,"out_UPDATE_PREDICTOR_"+toString(i)+"_"+toString(j)+"_MISS" ); + } +// // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ;//[nb_inst_update] +// public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ;//[nb_inst_update] +// public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS ;//[nb_inst_update] +// public : SC_IN (Thistory_t) ** in_UPDATE_HISTORY ;//[nb_inst_update] +// public : SC_IN (Tcontrol_t) ** in_UPDATE_DIRECTION ;//[nb_inst_update] +// public : SC_IN (Tcontrol_t) ** in_UPDATE_MISS ;//[nb_inst_update] // if update_on_prediction + + } + + // =================================================================== + // =====[ Glue ]====================================================== + // =================================================================== + + { + src = _name+"_glue"; + log_printf(INFO,Prediction_unit,FUNCTION,_("Instance : %s"),src.c_str()); + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_predict; ++i) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"predict_"+toString(i), + dest,"predict_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_VAL" , + dest, "in_PREDICT_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ACK" , + dest,"out_PREDICT_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_HISTORY" , + dest,"out_PREDICT_"+toString(i)+"_HISTORY" ); + PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_DIRECTION", + dest,"out_PREDICT_"+toString(i)+"_DIRECTION"); + } + + // out_PREDICT_PREDICTOR_VAL -> two_level_branch_predictor. in_PREDICT_PREDICTOR_VAL + // in_PREDICT_PREDICTOR_ACK -> two_level_branch_predictor.out_PREDICT_PREDICTOR_ACK + // in_PREDICT_PREDICTOR_HISTORY -> two_level_branch_predictor.out_PREDICT_PREDICTOR_HISTORY + // in_PREDICT_PREDICTOR_DIRECTION -> two_level_branch_predictor.out_PREDICT_PREDICTOR_DIRECTION + // out_PREDICT_PREDICTOR_DIRECTION_VAL -> two_level_branch_predictor. in_PREDICT_PREDICTOR_DIRECTION_VAL + // out_PREDICT_PREDICTOR_DIRECTION -> two_level_branch_predictor. in_PREDICT_PREDICTOR_DIRECTION + + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_inst_update; ++i) + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"update_"+toString(i), + dest,"update_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_VAL" , + dest, "in_UPDATE_"+toString(i)+"_VAL" ); + PORT_MAP(_component,src ,"out_UPDATE_"+toString(i)+"_ACK" , + dest,"out_UPDATE_"+toString(i)+"_ACK" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_HISTORY" , + dest, "in_UPDATE_"+toString(i)+"_HISTORY" ); + PORT_MAP(_component,src , "in_UPDATE_"+toString(i)+"_DIRECTION", + dest, "in_UPDATE_"+toString(i)+"_DIRECTION"); + } + + // out_UPDATE_PREDICTOR_VAL -> two_level_branch_predictor. in_UPDATE_PREDICTOR_VAL + // in_UPDATE_PREDICTOR_ACK -> two_level_branch_predictor.out_UPDATE_PREDICTOR_ACK + // out_UPDATE_PREDICTOR_HISTORY -> two_level_branch_predictor. in_UPDATE_PREDICTOR_HISTORY + // out_UPDATE_PREDICTOR_DIRECTION -> two_level_branch_predictor. in_UPDATE_PREDICTOR_DIRECTION + // out_UPDATE_PREDICTOR_MISS -> two_level_branch_predictor. in_UPDATE_PREDICTOR_MISS + + } // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Meta_Predictor_deallocation.cpp (revision 111) @@ -29,8 +29,24 @@ delete in_CLOCK ; delete in_NRESET; + + DELETE1_SIGNAL( in_PREDICT_VAL ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL(out_PREDICT_ACK ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL( in_PREDICT_ADDRESS ,_param->_nb_inst_predict,_param->_size_address); + DELETE1_SIGNAL(out_PREDICT_DIRECTION ,_param->_nb_inst_predict,1 ); + DELETE1_SIGNAL(out_PREDICT_HISTORY ,_param->_nb_inst_predict,_param->_size_history); + + DELETE1_SIGNAL( in_UPDATE_VAL ,_param->_nb_inst_update,1 ); + DELETE1_SIGNAL(out_UPDATE_ACK ,_param->_nb_inst_update,1 ); + DELETE1_SIGNAL( in_UPDATE_ADDRESS ,_param->_nb_inst_update,_param->_size_address); + DELETE1_SIGNAL( in_UPDATE_HISTORY ,_param->_nb_inst_update,_param->_size_history); + DELETE1_SIGNAL( in_UPDATE_DIRECTION ,_param->_nb_inst_update,1 ); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + DELETE0(_component_glue); + DELETE1(_component_two_level_branch_predictor,_param->_nb_predictor); + delete _component; + log_end(Meta_Predictor,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/src/Parameters.cpp (revision 111) @@ -7,4 +7,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h" +#include "Behavioural/include/Allocation.h" namespace morpheo { @@ -20,10 +21,78 @@ #undef FUNCTION #define FUNCTION "Meta_Predictor::Parameters" - Parameters::Parameters (bool is_toplevel) + Parameters::Parameters (uint32_t nb_inst_predict , + uint32_t nb_inst_update , + uint32_t size_address , + bool have_bht [3], + uint32_t bht_size_shifter [3], + uint32_t bht_nb_shifter [3], + bool have_pht [3], + uint32_t pht_size_counter [3], + uint32_t pht_nb_counter [3], + uint32_t pht_size_address_share [3], + bool is_toplevel) { log_begin(Meta_Predictor,FUNCTION); + _nb_inst_predict = nb_inst_predict ; + _nb_inst_update = nb_inst_update ; + _size_address = size_address ; + for (uint32_t i=0; i<3; ++i) + { + _have_bht [i] = have_bht [i]; + _bht_size_shifter [i] = (_have_bht [i])?bht_size_shifter [i]:0; + _bht_nb_shifter [i] = (_have_bht [i])?bht_nb_shifter [i]:0; + _have_pht [i] = have_pht [i]; + _pht_size_counter [i] = (_have_pht [i])?pht_size_counter [i]:0; + _pht_nb_counter [i] = (_have_pht [i])?pht_nb_counter [i]:0; + _pht_size_address_share [i] = (_have_bht[i] and _have_pht [i])?pht_size_address_share [i]:0; + } + test(); + _have_meta_predictor = (_have_bht [2] or _have_pht [2]); + _nb_predictor = (_have_meta_predictor)?3:1; + + ALLOC1(_predictor_update_on_prediction,bool , _nb_predictor); + ALLOC1(_predictor_size_history ,uint32_t, _nb_predictor); + + // All predictor can update on prediction .... + for (uint32_t i=0; i<_nb_predictor; ++i) + _predictor_update_on_prediction [i] = true; + + // ... But the selector prediction can't + if (_have_meta_predictor) + _predictor_update_on_prediction [_nb_predictor-1] = false; + + _param_two_level_branch_predictor = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Parameters * [_nb_predictor]; + for (uint32_t i=0; i<_nb_predictor; ++i) + { + _param_two_level_branch_predictor [i] = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::two_level_branch_predictor::Parameters + (_nb_inst_predict , + _nb_inst_update , + _size_address , + _have_bht [i], + _bht_size_shifter [i], + _bht_nb_shifter [i], + _have_pht [i], + _pht_size_counter [i], + _pht_nb_counter [i], + _pht_size_address_share [i], + _predictor_update_on_prediction [i] + ); + + _predictor_size_history [i] = _param_two_level_branch_predictor [i]->_size_history; + } + + _param_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::meta_predictor_glue::Parameters + ( + _nb_inst_predict , + _nb_inst_update , + _nb_predictor , + _predictor_size_history , + _predictor_update_on_prediction + ); + _size_history = _param_glue->_size_history; + if (is_toplevel) { @@ -48,4 +117,10 @@ { log_begin(Meta_Predictor,FUNCTION); + + DELETE1(_param_two_level_branch_predictor, _nb_predictor); + + DELETE1(_predictor_size_history , _nb_predictor); + DELETE1(_predictor_update_on_prediction , _nb_predictor); + log_end(Meta_Predictor,FUNCTION); }; @@ -56,4 +131,9 @@ { log_begin(Meta_Predictor,FUNCTION); + + COPY(_param_glue); + for (uint32_t i=0; i<_nb_predictor; ++i) + COPY(_param_two_level_branch_predictor [i]); + log_end(Meta_Predictor,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config-alpha_21264.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config-alpha_21264.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config-alpha_21264.cfg (revision 111) @@ -0,0 +1,26 @@ +Direction +4 8 +1 # _predictor_scheme +1 1 +1 # nb_inst_predict +1 1 +1 # nb_inst_update +30 30 *2 # size_address +1 1 +1 # predictor_0_have_bht +10 10 +1 # predictor_0_bht_size_shifter +1024 1024 *2 # predictor_0_bht_nb_shifter +1 1 +1 # predictor_0_have_pht +3 3 +1 # predictor_0_pht_size_counter +1024 1024 *2 # predictor_0_pht_nb_counter +0 0 +1 # predictor_0_pht_size_address_share +1 1 +1 # predictor_1_have_bht +12 12 +1 # predictor_1_bht_size_shifter +2 2 *2 # predictor_1_bht_nb_shifter +1 1 +1 # predictor_1_have_pht +2 2 +1 # predictor_1_pht_size_counter +4096 4096 *2 # predictor_1_pht_nb_counter +0 0 +1 # predictor_1_pht_size_address_share +0 0 +1 # predictor_2_have_bht +4 4 +1 # predictor_2_bht_size_shifter +256 256 *2 # predictor_2_bht_nb_shifter +1 1 +1 # predictor_2_have_pht +2 2 +1 # predictor_2_pht_size_counter +4096 4096 *2 # predictor_2_pht_nb_counter +0 0 +1 # predictor_2_pht_size_address_share Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config_without_meta_predictor.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config_without_meta_predictor.cfg (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/config_without_meta_predictor.cfg (revision 111) @@ -0,0 +1,26 @@ +Direction +0 3 +1 # _predictor_scheme +1 4 *4 # _nb_inst_predict +1 4 *4 # _nb_inst_update +32 32 *2 # _size_address +1 1 +1 # _predictor_0_have_bht +1 1 +1 # _predictor_0_bht_size_shifter +1 1 +1 # _predictor_0_bht_nb_shifter +1 1 +1 # _predictor_0_have_pht +1 1 +1 # _predictor_0_pht_size_counter +1 1 +1 # _predictor_0_pht_nb_counter +1 1 +1 # _predictor_0_pht_size_address_share +1 1 +1 # _predictor_1_have_bht +1 1 +1 # _predictor_1_bht_size_shifter +1 1 +1 # _predictor_1_bht_nb_shifter +1 1 +1 # _predictor_1_have_pht +1 1 +1 # _predictor_1_pht_size_counter +1 1 +1 # _predictor_1_pht_nb_counter +1 1 +1 # _predictor_1_pht_size_address_share +1 1 +1 # _predictor_2_have_bht +1 1 +1 # _predictor_2_bht_size_shifter +1 1 +1 # _predictor_2_bht_nb_shifter +1 1 +1 # _predictor_2_have_pht +1 1 +1 # _predictor_2_pht_size_counter +1 1 +1 # _predictor_2_pht_nb_counter +1 1 +1 # _predictor_2_pht_size_address_share Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/SelfTest/configuration.cfg (revision 110) +++ (revision ) @@ -1,26 +1,0 @@ -Direction -0 3 +1 # _predictor_scheme -1 4 *4 # _nb_inst_predict -1 4 *4 # _nb_inst_update -32 32 *2 # _size_address -1 1 +1 # _predictor_0_have_bht -1 1 +1 # _predictor_0_bht_size_shifter -1 1 +1 # _predictor_0_bht_nb_shifter -1 1 +1 # _predictor_0_have_pht -1 1 +1 # _predictor_0_pht_size_counter -1 1 +1 # _predictor_0_pht_nb_counter -1 1 +1 # _predictor_0_pht_size_address_share -1 1 +1 # _predictor_1_have_bht -1 1 +1 # _predictor_1_bht_size_shifter -1 1 +1 # _predictor_1_bht_nb_shifter -1 1 +1 # _predictor_1_have_pht -1 1 +1 # _predictor_1_pht_size_counter -1 1 +1 # _predictor_1_pht_nb_counter -1 1 +1 # _predictor_1_pht_size_address_share -1 1 +1 # _predictor_2_have_bht -1 1 +1 # _predictor_2_bht_size_shifter -1 1 +1 # _predictor_2_bht_nb_shifter -1 1 +1 # _predictor_2_have_pht -1 1 +1 # _predictor_2_pht_size_counter -1 1 +1 # _predictor_2_pht_nb_counter -1 1 +1 # _predictor_2_pht_size_address_share Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Direction.h (revision 111) @@ -13,4 +13,6 @@ #endif +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Meta_Predictor.h" #include #include "Common/include/ToString.h" @@ -27,6 +29,4 @@ #endif #include "Behavioural/include/Usage.h" - -#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Direction_Glue.h" namespace morpheo { @@ -79,4 +79,5 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Meta_Predictor * _component_meta_predictor; public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Direction_Glue * _component_glue; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/include/Parameters.h (revision 111) @@ -14,4 +14,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/include/Parameters.h" namespace morpheo { @@ -45,4 +46,5 @@ public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters * _param_glue; + public : morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Parameters * _param_meta_predictor; //-----[ methods ]----------------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_allocation.cpp (revision 111) @@ -84,4 +84,24 @@ std::string name; + if (_param->_have_component_meta_predictor) + { + name = _name+"_meta_predictor"; + log_printf(INFO,Prediction_unit,FUNCTION,_("Create : %s"),name.c_str()); + + _component_meta_predictor = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Meta_Predictor + (name.c_str() +#ifdef STATISTICS + ,param_statistics +#endif + ,_param->_param_meta_predictor + ,_usage); + + _component->set_component (_component_meta_predictor->_component +#ifdef POSITION + , 50, 50, 10, 10 +#endif + ); + } + { name = _name+"_glue"; @@ -105,5 +125,68 @@ // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ std::string src,dest; + + // =================================================================== + // =====[ Meta_Predictor ]============================================ + // =================================================================== + if (_param->_have_component_meta_predictor) + { + src = _name+"_meta_predictor"; + log_printf(INFO,Prediction_unit,FUNCTION,_("Instance : %s"),src.c_str()); + + { + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"", + dest,""); +#endif + + PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK"); + PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET"); + } + + for (uint32_t i=0; i<_param->_nb_inst_predict; i++) + { + dest = _name+"_glue"; +#ifdef POSITION + _component->interface_map (src ,"predict_" +toString(i), + dest,"predict_predictor_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+ "_VAL" , + dest,"out_PREDICT_"+toString(i)+"_PREDICTOR_VAL" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+ "_ACK" , + dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_ACK" ); + COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(i)+ "_ADDRESS" , + dest,"out_PREDICT_"+toString(i)+"_PREDICTOR_ADDRESS_SRC"); + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+ "_DIRECTION" , + dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_DIRECTION" ); + COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(i)+ "_HISTORY" , + dest, "in_PREDICT_"+toString(i)+"_PREDICTOR_HISTORY" ); + } + + for (uint32_t i=0; i<_param->_nb_inst_update; i++) + { + dest = _name+"_glue"; +#ifdef POSITION + _component->interface_map (src ,"update_" +toString(i), + dest,"update_predictor_"+toString(i)); +#endif + + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+ "_VAL" , + dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_VAL" ); + COMPONENT_MAP(_component,src ,"out_UPDATE_"+toString(i)+ "_ACK" , + dest, "in_UPDATE_"+toString(i)+"_PREDICTOR_ACK" ); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+ "_ADDRESS" , + dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_ADDRESS" ); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+ "_DIRECTION" , + dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_DIRECTION" ); + COMPONENT_MAP(_component,src , "in_UPDATE_"+toString(i)+ "_HISTORY" , + dest,"out_UPDATE_"+toString(i)+"_PREDICTOR_HISTORY" ); + } + } + // =================================================================== + // =====[ Glue ]====================================================== + // =================================================================== { src = _name+"_glue"; @@ -179,5 +262,6 @@ } // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -// _component->test_map(); + if (DEBUG_Direction == true) + _component->test_map(); #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Direction_deallocation.cpp (revision 111) @@ -45,4 +45,6 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ delete _component_glue; + if (_param->_have_component_meta_predictor) + delete _component_meta_predictor; delete _component; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters.cpp (revision 111) @@ -134,13 +134,31 @@ } - _size_history = 0; + test(); + + if (_have_component_meta_predictor) + _param_meta_predictor = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::meta_predictor::Parameters + ( + _nb_inst_predict , + _nb_inst_update , + size_address , + _have_bht , + _bht_size_shifter , + _bht_nb_shifter , + _have_pht , + _pht_size_counter , + _pht_nb_counter , + _pht_size_address_share + ); - for (uint32_t i=0; i<3; i++) - _size_history += (((_have_bht [i])?_bht_size_shifter [i]:0) + - ((_have_pht [i])?_pht_size_counter [i]:0)); - - _have_port_history = (_size_history > 0); - - test(); + _size_history = (_have_component_meta_predictor)?_param_meta_predictor->_size_history:0; + + log_printf(TRACE,Direction,FUNCTION," * size_history : %d",_size_history); + +// _size_history = 0; +// for (uint32_t i=0; i<3; i++) +// _size_history += (((_have_bht [i])?_bht_size_shifter [i]:0) + +// ((_have_pht [i])?_pht_size_counter [i]:0)); + + _have_port_history = (_size_history > 0); _param_glue = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::direction::direction_glue::Parameters @@ -177,4 +195,7 @@ delete _param_glue; + if (_have_component_meta_predictor) + delete _param_meta_predictor; + log_printf(FUNC,Direction,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/src/Parameters_msg_error.cpp (revision 111) @@ -39,7 +39,4 @@ case PREDICTOR_STATIC : case PREDICTOR_LAST_TAKE : - { - break; - } case PREDICTOR_COUNTER : case PREDICTOR_LOCAL : @@ -47,4 +44,8 @@ case PREDICTOR_META : case PREDICTOR_CUSTOM : + { + break; + } + default : { test.error("Unimplemented predictor_scheme : \""+toString(_predictor_scheme)+"\". (Coming Soon)"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (revision 111) @@ -254,9 +254,11 @@ { log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * BRANCH_CONDITION_READ_STACK"); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * ras_hit : %d",PORT_READ(in_PREDICT_RAS_HIT [i])); use_upt = true; use_ras = true; push = false; direction = true; - pc_next = PORT_READ(in_PREDICT_RAS_HIT [i])?PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i]):address_dest; + address_dest = PORT_READ(in_PREDICT_RAS_HIT [i])?PORT_READ(in_PREDICT_RAS_ADDRESS_POP [i]):address_dest; + pc_next = address_dest; branch_state = BRANCH_STATE_SPEC_TAKE; is_accurate &= (PORT_READ(in_PREDICT_RAS_HIT [i]) or btb_is_accurate); // if miss - prediction is not accurate @@ -273,5 +275,5 @@ log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * direction : %d",direction); log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * branch_state : %d",branch_state); - log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * pc_next : %.8x",pc_next); + log_printf(TRACE,Prediction_unit_Glue,FUNCTION," * pc_next : 0x%.8x (0x%.8x)",pc_next,pc_next<<2); if (use_dir) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp (revision 111) @@ -76,5 +76,8 @@ if (push) { + Taddress_t address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * push (call procedure)"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); // push : increase the top (circular) @@ -82,5 +85,5 @@ // Write new value in Queue - reg_stack [context][top_new]._address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]); + reg_stack [context][top_new]._address = address; // Test if full @@ -150,5 +153,8 @@ if (push) { + Taddress_t address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * push (call procedure)"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); // push : increase the top (circular) @@ -156,5 +162,5 @@ // Write new value in Queue - reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); + reg_stack [context][top_new]._address = address; // Test if full @@ -201,21 +207,15 @@ // if decod miss : ifetch can have predict call and return branchement. Also, the head of decod can be false -// Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); - -// if (miss) -// { + Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * miss : %d",miss); + + if (miss) + { + // reg_PREDICT_BOTTOM [context] = reg_BOTTOM [context]; -// reg_PREDICT_TOP [context] = reg_TOP [context]; -// reg_PREDICT_NB_ELT [context] = reg_NB_ELT [context]; - -// // Scan full assoc !!! -// for (uint32_t j=0; j<_param->_size_queue [context]; j++) -// // Test if this slot is tagged with "predict" : if true, tagged as miss -// if (reg_stack [context][j]._predict) -// { -// reg_stack [context][j]._predict = false; -// reg_stack [context][j]._miss = true; -// } -// } + reg_PREDICT_TOP [context] = reg_TOP [context]; + reg_PREDICT_NB_ELT [context] = reg_NB_ELT [context]; + } } @@ -252,5 +252,10 @@ { // reinsert push value - reg_stack [context_id][0]._address = PORT_READ(in_UPDATE_ADDRESS [i]); + Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * flush and push"); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); + + reg_stack [context_id][value]._address = address; } } @@ -292,5 +297,4 @@ #endif - Tptr_t top_old = (prediction_ifetch)?reg_PREDICT_TOP [context_id]:reg_TOP [context_id]; Tptr_t top_new = top_old; @@ -320,4 +324,6 @@ if (push) { + log_printf(TRACE,Return_Address_Stack,FUNCTION," * previous is push, now pop"); + // previous is push, now must be pop @@ -331,6 +337,10 @@ else { + log_printf(TRACE,Return_Address_Stack,FUNCTION," * previous is pop, now push"); + // previous is pop, now must be push Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); + + log_printf(TRACE,Return_Address_Stack,FUNCTION," * address : 0x%.8x",address); // push : increase the top (circular) @@ -345,5 +355,5 @@ top_new = index; - reg_stack [context_id][index]._address = address; + reg_stack [context_id][top_new]._address = address; } @@ -352,21 +362,33 @@ if (prediction_ifetch) { - log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_new); -// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_new); - log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_new); - + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",reg_TOP [context_id]); +// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",reg_BOTTOM [context_id]); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",reg_NB_ELT [context_id]); + + reg_PREDICT_TOP [context_id] = reg_TOP [context_id]; +// reg_PREDICT_BOTTOM [context_id] = reg_BOTTOM [context_id]; + reg_PREDICT_NB_ELT [context_id] = reg_NB_ELT [context_id]; + +// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_new ); +// // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_new); +// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_new); + +// reg_PREDICT_TOP [context_id] = top_new ; +// // reg_PREDICT_BOTTOM [context_id] = bottom_new; +// reg_PREDICT_NB_ELT [context_id] = nb_elt_new; + + } + else + { + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",top_new); +// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",bottom_new); + log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",nb_elt_new); + + reg_TOP [context_id] = top_new ; +// reg_BOTTOM [context_id] = bottom_new; + reg_NB_ELT [context_id] = nb_elt_new; reg_PREDICT_TOP [context_id] = top_new ; // reg_PREDICT_BOTTOM [context_id] = bottom_new; reg_PREDICT_NB_ELT [context_id] = nb_elt_new; - } - else - { - log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",top_new); -// log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",bottom_new); - log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",nb_elt_new); - - reg_TOP [context_id] = top_new ; -// reg_BOTTOM [context_id] = bottom_new; - reg_NB_ELT [context_id] = nb_elt_new; } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/main.cpp (revision 111) @@ -107,4 +107,9 @@ _ufpt_size_queue [i] = fromString(argv[x++]); + uint32_t _nb_thread = _nb_context; + uint32_t * _translate_num_context_to_num_thread = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _translate_num_context_to_num_thread [i] = i; + int _return = EXIT_SUCCESS; try @@ -135,4 +140,6 @@ _upt_size_queue , _ufpt_size_queue , + _nb_thread , + _translate_num_context_to_num_thread, true // is_toplevel ); @@ -158,4 +165,5 @@ delete [] _upt_size_queue ; delete [] _ufpt_size_queue ; + delete [] _translate_num_context_to_num_thread; return (_return); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp (revision 111) @@ -82,7 +82,7 @@ ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ," in_BRANCH_COMPLETE_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_inst_branch_complete); ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION ,"out_BRANCH_COMPLETE_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,"out_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); @@ -151,7 +151,7 @@ INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_MISS_PREDICTION ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_VAL ,_param->_nb_context); @@ -361,7 +361,7 @@ DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete); DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); - DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); +// DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); +// DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); +// DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); DELETE1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,_param->_nb_context); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/main.cpp (revision 111) @@ -62,4 +62,9 @@ _size_ras_index [i] = fromString(argv[x++]); + uint32_t _nb_thread = _nb_context; + uint32_t * _translate_num_context_to_num_thread = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; i++) + _translate_num_context_to_num_thread [i] = i; + int _return = EXIT_SUCCESS; try @@ -76,4 +81,6 @@ _size_history , _size_ras_index , + _nb_thread , + _translate_num_context_to_num_thread, true //is_toplevel ); @@ -98,4 +105,5 @@ delete [] _size_ufpt_queue; delete [] _size_upt_queue; + delete [] _translate_num_context_to_num_thread; return (_return); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp (revision 111) @@ -108,7 +108,7 @@ ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ," in_BRANCH_COMPLETE_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_inst_branch_complete); ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,"out_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); - ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); +// ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_VAL ,"out_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); @@ -202,7 +202,7 @@ INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); - INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); +// INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_VAL ,_param->_nb_context); @@ -519,7 +519,7 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); it_upt ++; @@ -832,7 +832,7 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); it_upt ++; @@ -1200,7 +1200,7 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take_good ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_good); it_upt ++; @@ -1745,7 +1745,7 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_event->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_event->take_good ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_event->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_event->address_good); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_event->take_good ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_event->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_event->address_good); upt_top_event [it_event->context] = upt_top [it_event->context]; @@ -1809,8 +1809,8 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take ); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take ); it_upt->take_good = it_upt->take; - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_dest); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_dest); it_upt++; @@ -2464,8 +2464,8 @@ TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); - TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take ); +// TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take ); it_upt->take_good = it_upt->take; - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); - TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_dest); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); +// TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_dest); it_upt++; @@ -2850,7 +2850,7 @@ delete [] in_BRANCH_COMPLETE_NO_SEQUENCE ; delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; - delete [] out_BRANCH_COMPLETE_TAKE ; - delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; - delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; +// delete [] out_BRANCH_COMPLETE_TAKE ; +// delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; +// delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h (revision 111) @@ -35,4 +35,6 @@ public : uint32_t * _size_ras_index ; // [nb_context] public : const bool _not_accurate_block_predict; + public : uint32_t _nb_thread ; + public : uint32_t * _translate_num_context_to_num_thread;//[nb_context] //public : uint32_t _size_context_id ; @@ -46,4 +48,6 @@ public : bool _have_port_history ; + public : bool * _have_thread ;//[nb_thread] + //-----[ methods ]----------------------------------------------------------- public : Parameters (uint32_t nb_context , @@ -57,4 +61,6 @@ uint32_t size_history , uint32_t * size_ras_index , + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] bool is_toplevel=false); //public : Parameters (Parameters & param) ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h (revision 111) @@ -87,4 +87,6 @@ public : Tptr_t _index_ras ; public : Tcontrol_t _ifetch_prediction; // not in ufpt + + public : bool _retire_ok ; }; @@ -146,5 +148,5 @@ case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT: return "event_flush_ufpt_and_upt"; break; case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_UPDATE_CONTEXT : return "update_context" ; break; - case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_WAIT_END_EVENT : return "wait_and_event" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::EVENT_STATE_WAIT_END_EVENT : return "wait_end_event" ; break; default : return ""; break; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h (revision 111) @@ -27,4 +27,5 @@ #endif #include "Behavioural/include/Usage.h" +#include namespace morpheo { @@ -109,7 +110,7 @@ public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_NO_SEQUENCE ; //[nb_inst_branch_complete] public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete] - public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] - public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] - public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] +// public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] +// public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] +// public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -209,4 +210,8 @@ private : Tcontrol_t * internal_EVENT_ACK ; //[nb_context] +#if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) + private : std::ofstream * branchement_log_file; +#endif + #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp (revision 111) @@ -7,4 +7,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" +#include "Behavioural/include/Allocation.h" #include "Common/include/Max.h" @@ -30,4 +31,6 @@ uint32_t size_history , uint32_t * size_ras_index , + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] bool is_toplevel): _not_accurate_block_predict (false) @@ -45,4 +48,6 @@ _size_history = size_history ; _size_ras_index = size_ras_index ; + _nb_thread = nb_thread ; + _translate_num_context_to_num_thread = translate_num_context_to_num_thread; _max_size_ras_index = max(_size_ras_index,nb_context); @@ -51,4 +56,10 @@ test(); + + ALLOC1(_have_thread,bool,_nb_thread); + for (uint32_t i=0; i<_nb_thread; i++) + _have_thread[i] = false; + for (uint32_t i=0; i<_nb_context; i++) + _have_thread[_translate_num_context_to_num_thread [i]] = true; if (is_toplevel) @@ -81,4 +92,5 @@ { log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); + DELETE1(_have_thread ,_nb_thread); // delete [] _size_depth ; // delete [] _have_port_depth; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp (revision 111) @@ -166,31 +166,31 @@ # ifdef SYSTEMCASS_SPECIFIC - // List dependency information - for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) - { - if (_param->_have_port_context_id) - (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); - if (_param->_have_port_depth) - (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); - (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_NO_SEQUENCE[i])); - (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); - - if (_param->_have_port_context_id) - (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); - if (_param->_have_port_depth) - (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); - (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_NO_SEQUENCE[i])); - - if (_param->_have_port_context_id) - (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); - if (_param->_have_port_depth) - (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); - - if (_param->_have_port_context_id) - (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); - if (_param->_have_port_depth) - (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); - (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); - } +// // List dependency information +// for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) +// { +// if (_param->_have_port_context_id) +// (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); +// if (_param->_have_port_depth) +// (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); +// (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_NO_SEQUENCE[i])); +// (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); + +// // if (_param->_have_port_context_id) +// // (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); +// // if (_param->_have_port_depth) +// // (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); +// // (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_NO_SEQUENCE[i])); + +// // if (_param->_have_port_context_id) +// // (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); +// // if (_param->_have_port_depth) +// // (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); + +// // if (_param->_have_port_context_id) +// // (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); +// // if (_param->_have_port_depth) +// // (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); +// // (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); +// } # endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp (revision 111) @@ -106,7 +106,7 @@ ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t,1); ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_instruction_address); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_instruction_address); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_instruction_address); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_instruction_address); } @@ -225,4 +225,15 @@ #endif +#if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) + branchement_log_file = new std::ofstream [_param->_nb_thread]; + for (uint32_t i=0; i<_param->_nb_thread; ++i) + if (_param->_have_thread [i]) + { + std::string filename = "Branchement_prediction-thread_" + toString(i) + ".log"; + + branchement_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); + } +#endif + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp (revision 111) @@ -76,7 +76,7 @@ delete [] in_BRANCH_COMPLETE_NO_SEQUENCE ; delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; - delete [] out_BRANCH_COMPLETE_TAKE ; - delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; - delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; +// delete [] out_BRANCH_COMPLETE_TAKE ; +// delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; +// delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -175,4 +175,12 @@ delete _component; +#if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) + for (uint32_t i=0; i<_param->_nb_thread; ++i) + if (_param->_have_thread [i]) + { + branchement_log_file [i].close(); + } +#endif + log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp (revision 111) @@ -125,7 +125,7 @@ PORT_WRITE(out_BRANCH_COMPLETE_MISS_PREDICTION [i], internal_BRANCH_COMPLETE_MISS_PREDICTION [i]); - PORT_WRITE(out_BRANCH_COMPLETE_TAKE [i], internal_BRANCH_COMPLETE_TAKE [i]); - PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_SRC [i], reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src); - PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_DEST [i], internal_BRANCH_COMPLETE_ADDRESS_DEST [i]); +// PORT_WRITE(out_BRANCH_COMPLETE_TAKE [i], internal_BRANCH_COMPLETE_TAKE [i]); +// PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_SRC [i], reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src); +// PORT_WRITE(out_BRANCH_COMPLETE_ADDRESS_DEST [i], internal_BRANCH_COMPLETE_ADDRESS_DEST [i]); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp (revision 111) @@ -139,5 +139,6 @@ dir_val = 0; // don't update btb (is update by the event branch (if conditionnal branch)) // dir_history = ; - ras_val = update_ras(condition); // repop/ repush data -> don't corrupt ras + // repop/ repush data -> don't corrupt ras + ras_val = update_ras(condition); ras_flush = 0; ras_push = push_ras(condition); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp (revision 111) @@ -102,4 +102,17 @@ if (end) { +#if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) + if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._retire_ok) + { + uint32_t num_thread = _param->_translate_num_context_to_num_thread [i]; + branchement_log_file [num_thread] + << std::hex + << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " + << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " + << std::dec + << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " " + << std::endl; + } +#endif log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); @@ -180,5 +193,9 @@ // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; if (need_update(condition)) - reg_UFPT_NB_NEED_UPDATE [context] ++; + { + reg_UFPT_NB_NEED_UPDATE [context] ++; + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); + + } } @@ -293,4 +310,6 @@ { reg_UFPT_NB_NEED_UPDATE [context] --; + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); + } } @@ -305,5 +324,6 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; - + reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; + // Write new accurate #ifdef DEBUG_TEST @@ -377,5 +397,8 @@ // Free a register that need update ? if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition)) - reg_UFPT_NB_NEED_UPDATE [context] --; + { + reg_UFPT_NB_NEED_UPDATE [context] --; + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); + } } else @@ -402,7 +425,10 @@ #ifdef STATISTICS Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; +#endif bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); -#endif bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); + + if (ok or ko) + reg_UPDATE_PREDICTION_TABLE [context][depth]._retire_ok = true; // Have an update, test the state to transiste to the good state @@ -513,27 +539,38 @@ if (miss) { + // Flush UPT + uint32_t top = reg_UPT_TOP [context]; + uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; + + Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; + event_state_t event_state = reg_EVENT_STATE [context]; + upt_state_t event_top = reg_UPDATE_PREDICTION_TABLE [context][top]._state; + bool previous_ufpt_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or + (event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or + (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or + (event_state == EVENT_STATE_EVENT_FLUSH_UFPT )); + + bool previous_upt_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or + (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or + (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or + (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) or + (event_top == UPDATE_PREDICTION_STATE_END_KO ) or + (event_top == UPDATE_PREDICTION_STATE_KO ) +// (event_state == EVENT_STATE_WAIT_END_EVENT ) or +// ((event_state == EVENT_STATE_UPDATE_CONTEXT ) and +// (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT)) + ); +// bool update_ras = (new_update != depth); + + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); +// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_upt_event : %d",previous_upt_event); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_ufpt_event : %d",previous_ufpt_event); + // Have a miss !!! // Flush UPFT - flush_UFPT [context] = true; + flush_UFPT [context] = not previous_ufpt_event; - // Flush UPT - uint32_t top = reg_UPT_TOP [context]; - uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; - - Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; - event_state_t event_state = reg_EVENT_STATE [context]; - bool previous_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or - (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or - (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or - (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) or - ((event_state == EVENT_STATE_UPDATE_CONTEXT ) and - (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT))); -// bool update_ras = (new_update != depth); - - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); -// log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); - log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_event : %d",previous_event); - if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) { @@ -541,5 +578,8 @@ j!=top; j=(j+1)%_param->_size_upt_queue[context]) - reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; + { + reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; + reg_UPDATE_PREDICTION_TABLE [context][j]._retire_ok = false; + } @@ -548,5 +588,5 @@ // reg_UPT_TOP_EVENT [context] = top; - if (not previous_event) + if (not previous_upt_event) { reg_UPT_TOP_EVENT [context] = top; @@ -556,6 +596,7 @@ { // Have event. Top index this slot - - switch (reg_UPDATE_PREDICTION_TABLE [context][top]._state) + reg_UPDATE_PREDICTION_TABLE [context][top]._retire_ok = false; + + switch (event_top) { case UPDATE_PREDICTION_STATE_END_KO : @@ -573,4 +614,7 @@ default : { +// reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; +// break; + #ifdef DEBUG_TEST throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); @@ -585,6 +629,9 @@ log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; - - if (reg_UFPT_NB_NEED_UPDATE [context] > 0) + + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE [%d] : %d",context,reg_UFPT_NB_NEED_UPDATE [context]); + + if ( (reg_UFPT_NB_NEED_UPDATE [context] > 0) or + (reg_UFPT_NB_UPDATE [context] > 0)) { log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); @@ -736,5 +783,4 @@ uint32_t bottom = reg_UPT_BOTTOM [i]; uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1; - bool full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]); // bool empty = reg_UPT_EMPTY [i]; @@ -749,5 +795,6 @@ (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); - bool find = false; // have slot to update ??? + bool find = false; // have slot to update ??? + Tdepth_t depth_new = depth; // flush all slot after the event @@ -760,5 +807,9 @@ find = true; reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; - } + reg_UPDATE_PREDICTION_TABLE [i][j]._retire_ok = false; + } + else + if (not find) // while state == end or empty + depth_new ++; if ((reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END) and @@ -767,18 +818,24 @@ find = true; reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; + reg_UPDATE_PREDICTION_TABLE [i][depth]._retire_ok = false; + } + else + // while state == end or empty + depth = (depth_new+1)%_param->_size_upt_queue[i]; log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth_new : %d",depth_new); // Test if have update slot if (find) { - // flush all slot after the event - for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; - j!=top; - j=(j+1)%_param->_size_upt_queue[i]) - reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; - - reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; +// // flush all slot after the event +// for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; +// j!=top; +// j=(j+1)%_param->_size_upt_queue[i]) +// reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; + +// reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; // reg_UPT_BOTTOM [i]; @@ -791,5 +848,6 @@ } - bool update_ras = find and ((top != depth) or full); + bool full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]); + bool update_ras = find and ((top != depth) or full); log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); @@ -807,5 +865,8 @@ reg_EVENT_UPT_PTR [i] = depth; - if (reg_UFPT_NB_NEED_UPDATE [i] > 0) + log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); +// if (reg_UFPT_NB_NEED_UPDATE [i] > 0) + if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or + (reg_UFPT_NB_UPDATE [i] > 0)) { if (update_ras) @@ -871,5 +932,4 @@ if (reg_UFPT_NB_NEED_UPDATE [i] == 0) { - // No entry need prediction, flush all entry -> Reset for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) @@ -881,17 +941,22 @@ else { + uint32_t bottom = reg_UFPT_BOTTOM [i]; for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) - // EMPTY : no event - // END : already update - // EVENT : previous event - if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state == UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) - { - reg_UFPT_NB_UPDATE [i] ++; - reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; - } - - // TOP is next write slot : last slot is TOP-1 - uint32_t top = reg_UFPT_TOP [i]; - reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; + { + uint32_t index = (bottom+j)%_param->_size_ufpt_queue[i]; + // EMPTY : no event + // END : already update + // EVENT : previous event + if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state == UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) + { + reg_UFPT_UPDATE [i] = index; + reg_UFPT_NB_UPDATE [i] ++; + reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; + } + } + +// // TOP is next write slot : last slot is TOP-1 +// uint32_t top = reg_UFPT_TOP [i]; +// reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; // reg_UFPT_BOTTOM [i]; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Parameters.h (revision 111) @@ -52,4 +52,8 @@ public : uint32_t * _upt_size_queue ;//[nb_context] public : uint32_t * _ufpt_size_queue ;//[nb_context] + public : uint32_t _nb_thread ; + public : uint32_t * _translate_num_context_to_num_thread;//[nb_context] + + //public : uint32_t _size_context_id ; @@ -98,4 +102,6 @@ uint32_t * upt_size_queue ,//[nb_context] uint32_t * ufpt_size_queue ,//[nb_context] + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] bool is_toplevel=false ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h (revision 111) @@ -101,7 +101,7 @@ public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_NO_SEQUENCE ; //[nb_inst_branch_complete] public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_MISS_PREDICTION ; //[nb_inst_branch_complete] - public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] - public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] - public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] +// public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] +// public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] +// public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters.cpp (revision 111) @@ -43,4 +43,6 @@ uint32_t * upt_size_queue ,//[nb_context] uint32_t * ufpt_size_queue ,//[nb_context] + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] bool is_toplevel ) @@ -75,4 +77,6 @@ _upt_size_queue = upt_size_queue ; _ufpt_size_queue = ufpt_size_queue ; + _nb_thread = nb_thread ; + _translate_num_context_to_num_thread = translate_num_context_to_num_thread; _array_size_depth = new uint32_t [_nb_context]; @@ -142,5 +146,8 @@ _nb_inst_branch_update , _size_history , - _size_ras_index ); + _size_ras_index , + _nb_thread , + _translate_num_context_to_num_thread + ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp (revision 111) @@ -105,7 +105,7 @@ ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t,1); ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_address); - ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_address); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_address); +// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_address); } @@ -395,5 +395,5 @@ if (_param->_have_port_history) COMPONENT_MAP(_component,src ,"out_PREDICT_" +toString(i)+"_HISTORY" , - dest, "in_PREDICT_" +toString(i)+"_HISTORY" ); + dest, "in_PREDICT_" +toString(i)+"_DIR_HISTORY" ); //out_PREDICT_DIR_LAST_TAKE - component_map branch_target_buffer } @@ -684,10 +684,10 @@ PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION", dest,"out_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION"); - PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" , - dest,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" ); - PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" , - dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" ); - PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST" , - dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST" ); +// PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" , +// dest,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" ); +// PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" , +// dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" ); +// PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST" , +// dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST" ); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp (revision 111) @@ -59,7 +59,7 @@ DELETE1_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE ,_param->_nb_inst_branch_complete,1); DELETE1_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete,1); - DELETE1_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete,1); - DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); - DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); +// DELETE1_SIGNAL(out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete,1); +// DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); +// DELETE1_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete,_param->_size_instruction_address); DELETE1_SIGNAL(out_BRANCH_EVENT_VAL ,_param->_nb_context,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_1-decod_unit_1-a.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_1-decod_unit_1-a.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_1-decod_unit_1-a.cfg (revision 111) @@ -7,4 +7,5 @@ 0 0 +1 # link_context_to_decod_unit [0] [nb_context] 4 4 +1 # size_decod_queue [0] [nb_decod_unit] +0 1 +1 # decod_queue_scheme [0] [nb_decod_unit] 4 4 +1 # nb_inst_decod [0] [nb_decod_unit] 1 1 +1 # nb_context_select [0] [nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_1-a.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_1-a.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_1-a.cfg (revision 111) @@ -3,7 +3,7 @@ 1 1 +1 # nb_decod_unit 32 32 +1 # size_general_data -4 4 +1 # size_ifetch_queue [0] [nb_context] -2 2 +1 # size_ifetch_queue [1] [nb_context] -1 1 +1 # size_ifetch_queue [2] [nb_context] +16 16 +1 # size_ifetch_queue [0] [nb_context] +4 4 +1 # size_ifetch_queue [1] [nb_context] +16 16 +1 # size_ifetch_queue [2] [nb_context] 8 8 +1 # size_ifetch_queue [3] [nb_context] 4 4 +1 # nb_inst_fetch [0] [nb_context] @@ -16,4 +16,5 @@ 0 0 +1 # link_context_to_decod_unit [3] [nb_context] 4 4 +1 # size_decod_queue [0] [nb_decod_unit] +0 1 +1 # decod_queue_scheme [0] [nb_decod_unit] 4 4 +1 # nb_inst_decod [0] [nb_decod_unit] 1 1 +1 # nb_context_select [0] [nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-a.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-a.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-a.cfg (revision 111) @@ -3,7 +3,7 @@ 2 2 +1 # nb_decod_unit 32 32 +1 # size_general_data -4 4 +1 # size_ifetch_queue [0] [nb_context] -2 2 +1 # size_ifetch_queue [1] [nb_context] -1 1 +1 # size_ifetch_queue [2] [nb_context] +8 8 +1 # size_ifetch_queue [0] [nb_context] +4 4 +1 # size_ifetch_queue [1] [nb_context] +16 16 +1 # size_ifetch_queue [2] [nb_context] 8 8 +1 # size_ifetch_queue [3] [nb_context] 4 4 +1 # nb_inst_fetch [0] [nb_context] @@ -17,4 +17,6 @@ 4 4 +1 # size_decod_queue [0] [nb_decod_unit] 12 12 +1 # size_decod_queue [1] [nb_decod_unit] +1 1 +1 # decod_queue_scheme [0] [nb_decod_unit] +0 0 +1 # decod_queue_scheme [1] [nb_decod_unit] 2 2 +1 # nb_inst_decod [0] [nb_decod_unit] 6 6 +1 # nb_inst_decod [1] [nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-b.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-b.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-context_4-decod_unit_2-b.cfg (revision 111) @@ -4,6 +4,6 @@ 32 32 +1 # size_general_data 4 4 +1 # size_ifetch_queue [0] [nb_context] -2 2 +1 # size_ifetch_queue [1] [nb_context] -1 1 +1 # size_ifetch_queue [2] [nb_context] +8 8 +1 # size_ifetch_queue [1] [nb_context] +32 32 +1 # size_ifetch_queue [2] [nb_context] 8 8 +1 # size_ifetch_queue [3] [nb_context] 4 4 +1 # nb_inst_fetch [0] [nb_context] @@ -17,4 +17,6 @@ 4 4 +1 # size_decod_queue [0] [nb_decod_unit] 12 12 +1 # size_decod_queue [1] [nb_decod_unit] +0 0 +1 # decod_queue_scheme [0] [nb_decod_unit] +1 1 +1 # decod_queue_scheme [1] [nb_decod_unit] 2 2 +1 # nb_inst_decod [0] [nb_decod_unit] 6 6 +1 # nb_inst_decod [1] [nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-min.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-min.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/config-min.cfg (revision 111) @@ -7,4 +7,5 @@ 0 0 +1 # link_context_to_decod_unit [0] [nb_context] 1 1 +1 # size_decod_queue [0] [nb_decod_unit] +0 1 +1 # decod_queue_scheme [0] [nb_decod_unit] 1 1 +1 # nb_inst_decod [0] [nb_decod_unit] 1 1 +1 # nb_context_select [0] [nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/SelfTest/src/main.cpp (revision 111) @@ -15,35 +15,36 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * nb_context (uint32_t )\n")); - err (_(" * nb_decod_unit (uint32_t )\n")); - err (_(" * size_general_data (uint32_t )\n")); - err (_(" * size_ifetch_queue [nb_context] (uint32_t )\n")); - err (_(" * nb_inst_fetch [nb_context] (uint32_t )\n")); - err (_(" * link_context_to_decod_unit [nb_context] (uint32_t )\n")); - err (_(" * size_decod_queue [nb_decod_unit] (uint32_t )\n")); - err (_(" * nb_inst_decod [nb_decod_unit] (uint32_t )\n")); - err (_(" * nb_context_select [nb_decod_unit] (uint32_t )\n")); - err (_(" * context_select_priority [nb_decod_unit] (Tpriority_t )\n")); - err (_(" * context_select_load_balancing [nb_decod_unit] (Tload_balancing_t)\n")); - err (_(" * nb_inst_branch_predict (uint32_t )\n")); - err (_(" * nb_inst_branch_decod (uint32_t )\n")); - err (_(" * nb_inst_branch_update (uint32_t )\n")); - err (_(" * nb_inst_branch_complete (uint32_t )\n")); - err (_(" * btb_size_queue (uint32_t )\n")); - err (_(" * btb_associativity (uint32_t )\n")); - err (_(" * btb_size_counter (uint32_t )\n")); - err (_(" * btb_victim_scheme (Tvictim_t )\n")); - err (_(" * dir_predictor_scheme (Tpredictor_t )\n")); - err (_(" * dir_have_bht [3] (bool )\n")); - err (_(" * dir_bht_size_shifter [3] (uint32_t )\n")); - err (_(" * dir_bht_nb_shifter [3] (uint32_t )\n")); - err (_(" * dir_have_pht [3] (bool )\n")); - err (_(" * dir_pht_size_counter [3] (uint32_t )\n")); - err (_(" * dir_pht_nb_counter [3] (uint32_t )\n")); - err (_(" * dir_pht_size_address_share [3] (uint32_t )\n")); - err (_(" * ras_size_queue [nb_context] (uint32_t )\n")); - err (_(" * upt_size_queue [nb_context] (uint32_t )\n")); - err (_(" * ufpt_size_queue [nb_context] (uint32_t )\n")); - err (_(" * size_inst_commit (uint32_t )\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_decod_unit (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * size_ifetch_queue [nb_context] (uint32_t )\n")); + err (_(" * nb_inst_fetch [nb_context] (uint32_t )\n")); + err (_(" * link_context_to_decod_unit [nb_context] (uint32_t )\n")); + err (_(" * size_decod_queue [nb_decod_unit] (uint32_t )\n")); + err (_(" * decod_queue_scheme [nb_decod_unit] (Tdecod_queue_scheme_t)\n")); + err (_(" * nb_inst_decod [nb_decod_unit] (uint32_t )\n")); + err (_(" * nb_context_select [nb_decod_unit] (uint32_t )\n")); + err (_(" * context_select_priority [nb_decod_unit] (Tpriority_t )\n")); + err (_(" * context_select_load_balancing [nb_decod_unit] (Tload_balancing_t )\n")); + err (_(" * nb_inst_branch_predict (uint32_t )\n")); + err (_(" * nb_inst_branch_decod (uint32_t )\n")); + err (_(" * nb_inst_branch_update (uint32_t )\n")); + err (_(" * nb_inst_branch_complete (uint32_t )\n")); + err (_(" * btb_size_queue (uint32_t )\n")); + err (_(" * btb_associativity (uint32_t )\n")); + err (_(" * btb_size_counter (uint32_t )\n")); + err (_(" * btb_victim_scheme (Tvictim_t )\n")); + err (_(" * dir_predictor_scheme (Tpredictor_t )\n")); + err (_(" * dir_have_bht [3] (bool )\n")); + err (_(" * dir_bht_size_shifter [3] (uint32_t )\n")); + err (_(" * dir_bht_nb_shifter [3] (uint32_t )\n")); + err (_(" * dir_have_pht [3] (bool )\n")); + err (_(" * dir_pht_size_counter [3] (uint32_t )\n")); + err (_(" * dir_pht_nb_counter [3] (uint32_t )\n")); + err (_(" * dir_pht_size_address_share [3] (uint32_t )\n")); + err (_(" * ras_size_queue [nb_context] (uint32_t )\n")); + err (_(" * upt_size_queue [nb_context] (uint32_t )\n")); + err (_(" * ufpt_size_queue [nb_context] (uint32_t )\n")); + err (_(" * size_inst_commit (uint32_t )\n")); exit (1); @@ -70,8 +71,8 @@ uint32_t _nb_decod_unit = fromString(argv[x++]); - if (argc != static_cast(2+NB_PARAMS+6*_nb_context+5*_nb_decod_unit)) + if (argc != static_cast(2+NB_PARAMS+6*_nb_context+6*_nb_decod_unit)) { msg("argc : %d\n",argc); - msg("all : %d\n",(2+NB_PARAMS+5*_nb_context+5*_nb_decod_unit)); + msg("all : %d\n",(2+NB_PARAMS+6*_nb_context+5*_nb_decod_unit)); msg("_nb_context : %d\n",_nb_context); msg("_nb_decod_unit : %d\n",_nb_decod_unit); @@ -103,4 +104,8 @@ for (uint32_t i=0; i<_nb_decod_unit; ++i) _size_decod_queue [i] = fromString(argv[x++]); + + decod_unit::decod_queue::Tdecod_queue_scheme_t * _decod_queue_scheme = new decod_unit::decod_queue::Tdecod_queue_scheme_t [_nb_decod_unit]; + for (uint32_t i=0; i<_nb_decod_unit; ++i) + _decod_queue_scheme [i] = fromString(argv[x++]); uint32_t * _nb_inst_decod = new uint32_t [_nb_decod_unit]; @@ -166,4 +171,9 @@ uint32_t _size_inst_commit = fromString(argv[x++]); + uint32_t _nb_thread = _nb_context; + uint32_t * _translate_num_context_to_num_thread = new uint32_t [_nb_context]; + for (uint32_t i=0; i<_nb_context; ++i) + _translate_num_context_to_num_thread [i] = i; + int _return = EXIT_SUCCESS; try @@ -180,4 +190,5 @@ _link_context_to_decod_unit , _size_decod_queue , + _decod_queue_scheme , _nb_inst_decod , _nb_context_select , @@ -204,4 +215,6 @@ _ufpt_size_queue , _size_inst_commit , + _nb_thread , + _translate_num_context_to_num_thread , true // is_toplevel ); @@ -230,4 +243,5 @@ } + delete [] _translate_num_context_to_num_thread ; delete [] _dir_have_bht ; delete [] _dir_bht_size_shifter ; @@ -244,4 +258,5 @@ delete [] _nb_context_select ; delete [] _nb_inst_decod ; + delete [] _decod_queue_scheme ; delete [] _size_decod_queue ; delete [] _link_context_to_decod_unit ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h (revision 111) @@ -35,4 +35,8 @@ //public : uint32_t _size_general_data ; public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (void); + + public : uint32_t _nb_thread ; + public : uint32_t * _translate_num_context_to_num_thread ;//[nb_context] + // ifetch_unit public : uint32_t * _size_ifetch_queue ;//[nb_context] @@ -42,4 +46,6 @@ // decod_unit public : uint32_t * _size_decod_queue ;//[nb_decod_unit] + public : decod_unit::decod_queue::Tdecod_queue_scheme_t + * _decod_queue_scheme ;//[nb_decod_unit] public : uint32_t * _nb_inst_decod ;//[nb_decod_unit] public : uint32_t * _nb_context_select ;//[nb_decod_unit] @@ -110,9 +116,11 @@ uint32_t * link_context_to_decod_unit , // decod_unit - uint32_t * size_decod_queue , - uint32_t * nb_inst_decod , - uint32_t * nb_context_select , - Tpriority_t * context_select_priority , - Tload_balancing_t * context_select_load_balancing , + uint32_t * size_decod_queue ,//[nb_decod_unit] + decod_unit::decod_queue::Tdecod_queue_scheme_t + * decod_queue_scheme ,//[nb_decod_unit] + uint32_t * nb_inst_decod ,//[nb_decod_unit] + uint32_t * nb_context_select ,//[nb_decod_unit] + Tpriority_t * context_select_priority ,//[nb_decod_unit] + Tload_balancing_t * context_select_load_balancing ,//[nb_decod_unit] // prediction_unit uint32_t nb_inst_branch_predict , @@ -137,4 +145,7 @@ // context_state uint32_t size_nb_inst_commit , + + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] bool is_toplevel=false); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 111) @@ -547,16 +547,16 @@ dest, "in_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE"); - dest = _name+"_context_state"; -#ifdef POSITION - _component->interface_map (src ,"branch_complete_"+toString(i), - dest,"branch_complete_"+toString(i)); -#endif - - COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" , - dest, "in_BRANCH_COMPLETE_"+toString(i)+"_TAKE" ); - COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" , - dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" ); - COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST", - dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST"); +// dest = _name+"_context_state"; +// #ifdef POSITION +// _component->interface_map (src ,"branch_complete_"+toString(i), +// dest,"branch_complete_"+toString(i)); +// #endif + +// COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_TAKE" , +// dest, "in_BRANCH_COMPLETE_"+toString(i)+"_TAKE" ); +// COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" , +// dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_SRC" ); +// COMPONENT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST", +// dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS_DEST"); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp (revision 111) @@ -28,9 +28,11 @@ uint32_t * link_context_to_decod_unit , // decod_unit - uint32_t * size_decod_queue , - uint32_t * nb_inst_decod , - uint32_t * nb_context_select , - Tpriority_t * context_select_priority , - Tload_balancing_t * context_select_load_balancing , + uint32_t * size_decod_queue ,//[nb_decod_unit] + decod_unit::decod_queue::Tdecod_queue_scheme_t + * decod_queue_scheme ,//[nb_decod_unit] + uint32_t * nb_inst_decod ,//[nb_decod_unit] + uint32_t * nb_context_select ,//[nb_decod_unit] + Tpriority_t * context_select_priority ,//[nb_decod_unit] + Tload_balancing_t * context_select_load_balancing ,//[nb_decod_unit] // prediction_unit uint32_t nb_inst_branch_predict , @@ -55,4 +57,8 @@ // context_state uint32_t size_nb_inst_commit , + + uint32_t nb_thread , + uint32_t * translate_num_context_to_num_thread ,//[nb_context] + bool is_toplevel): morpheo::behavioural::Parameters() @@ -64,4 +70,6 @@ // _size_general_data = size_general_data ; _get_custom_information = get_custom_information ; + _nb_thread = nb_thread ; + _translate_num_context_to_num_thread = translate_num_context_to_num_thread ; _size_ifetch_queue = size_ifetch_queue ; _nb_inst_fetch = nb_inst_fetch ; @@ -69,4 +77,5 @@ _link_context_to_decod_unit = link_context_to_decod_unit ; _size_decod_queue = size_decod_queue ; + _decod_queue_scheme = decod_queue_scheme ; _nb_inst_decod = nb_inst_decod ; _nb_context_select = nb_context_select ; @@ -122,28 +131,31 @@ _param_prediction_unit = new behavioural::core::multi_front_end::front_end::prediction_unit::Parameters - (_nb_context , - _nb_decod_unit , - size_instruction_address , - _nb_inst_fetch , - _nb_inst_decod , - _nb_inst_branch_predict , - _nb_inst_branch_decod , - _nb_inst_branch_update , - _nb_inst_branch_complete , - _btb_size_queue , - _btb_associativity , - _btb_size_counter , - _btb_victim_scheme , - _dir_predictor_scheme , - _dir_have_bht , - _dir_bht_size_shifter , - _dir_bht_nb_shifter , - _dir_have_pht , - _dir_pht_size_counter , - _dir_pht_nb_counter , - _dir_pht_size_address_share , - _ras_size_queue , - _upt_size_queue , - _ufpt_size_queue ); + (_nb_context , + _nb_decod_unit , + size_instruction_address , + _nb_inst_fetch , + _nb_inst_decod , + _nb_inst_branch_predict , + _nb_inst_branch_decod , + _nb_inst_branch_update , + _nb_inst_branch_complete , + _btb_size_queue , + _btb_associativity , + _btb_size_counter , + _btb_victim_scheme , + _dir_predictor_scheme , + _dir_have_bht , + _dir_bht_size_shifter , + _dir_bht_nb_shifter , + _dir_have_pht , + _dir_pht_size_counter , + _dir_pht_nb_counter , + _dir_pht_size_address_share , + _ras_size_queue , + _upt_size_queue , + _ufpt_size_queue , + _nb_thread , + _translate_num_context_to_num_thread + ); _translate_context_id_from_decod_unit= new std::vector [_nb_decod_unit]; @@ -209,4 +221,5 @@ _nb_inst_decod [i], _size_decod_queue [i], + _decod_queue_scheme [i], size_general_data , _decod_unit_nb_branch_speculated [i], Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 111) @@ -31,4 +31,5 @@ #include +#include namespace morpheo { @@ -275,4 +276,8 @@ #endif +#if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) + private : std::ofstream * instruction_log_file; +#endif + // -----[ Methods ]--------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 111) @@ -96,67 +96,9 @@ #endif public : Taddress_t address_next ; +#ifdef DEBUG + public : double cycle_rob_in ; + public : double cycle_commit ; +#endif -// public : entry_t (uint32_t ptr , -// Tcontext_t front_end_id , -// Tcontext_t context_id , -// Tcontext_t rename_unit_id , -// Tdepth_t depth , -// Ttype_t type , -// Toperation_t operation , -// Tcontrol_t is_delay_slot , -// Tgeneral_data_t address , -// Texception_t exception , -// Texception_t exception_use , -// Tlsq_ptr_t store_queue_ptr_write , -// Tlsq_ptr_t load_queue_ptr_write , -// Tcontrol_t read_ra , -// Tgeneral_address_t num_reg_ra_log , -// Tgeneral_address_t num_reg_ra_phy , -// Tcontrol_t read_rb , -// Tgeneral_address_t num_reg_rb_log , -// Tgeneral_address_t num_reg_rb_phy , -// Tcontrol_t read_rc , -// Tspecial_address_t num_reg_rc_log , -// Tspecial_address_t num_reg_rc_phy , -// Tcontrol_t write_rd , -// Tgeneral_address_t num_reg_rd_log , -// Tgeneral_address_t num_reg_rd_phy_old , -// Tgeneral_address_t num_reg_rd_phy_new , -// Tcontrol_t write_re , -// Tspecial_address_t num_reg_re_log , -// Tspecial_address_t num_reg_re_phy_old , -// Tspecial_address_t num_reg_re_phy_new ) -// { -// this->ptr = ptr ; -// this->front_end_id = front_end_id ; -// this->context_id = context_id ; -// this->rename_unit_id = rename_unit_id ; -// this->depth = depth ; -// this->type = type ; -// this->operation = operation ; -// this->is_delay_slot = is_delay_slot ; -// this->address = address ; -// this->exception = exception ; -// this->exception_use = exception_use ; -// this->store_queue_ptr_write = store_queue_ptr_write ; -// this->load_queue_ptr_write = load_queue_ptr_write ; -// this->read_ra = read_ra ; -// this->num_reg_ra_log = num_reg_ra_log ; -// this->num_reg_ra_phy = num_reg_ra_phy ; -// this->read_rb = read_rb ; -// this->num_reg_rb_log = num_reg_rb_log ; -// this->num_reg_rb_phy = num_reg_rb_phy ; -// this->read_rc = read_rc ; -// this->num_reg_rc_log = num_reg_rc_log ; -// this->num_reg_rc_phy = num_reg_rc_phy ; -// this->write_rd = write_rd ; -// this->num_reg_rd_log = num_reg_rd_log ; -// this->num_reg_rd_phy_old = num_reg_rd_phy_old ; -// this->num_reg_rd_phy_new = num_reg_rd_phy_new ; -// this->write_re = write_re ; -// this->num_reg_re_log = num_reg_re_log ; -// this->num_reg_re_phy_old = num_reg_re_phy_old ; -// this->num_reg_re_phy_new = num_reg_re_phy_new ; -// } }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 111) @@ -310,4 +310,15 @@ #endif +#if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) + instruction_log_file = new std::ofstream [_param->_nb_thread]; + for (uint32_t i=0; i<_param->_nb_thread; ++i) + if (_param->_have_thread [i]) + { + std::string filename = "Instruction_flow-thread_" + toString(i) + ".log"; + + instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); + } +#endif + log_end(Commit_unit,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 111) @@ -207,4 +207,12 @@ delete _component; +#if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) + for (uint32_t i=0; i<_param->_nb_thread; ++i) + if (_param->_have_thread [i]) + { + instruction_log_file [i].close(); + } +#endif + log_end(Commit_unit,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 111) @@ -59,5 +59,5 @@ std::string sum_nb_inst_retire_ok = "0"; std::string sum_nb_inst_retire_ko = "0"; - + std::string sum_average; for (uint32_t i=0; i<_param->_nb_thread; i++) if (_param->_have_thread [i]) @@ -68,8 +68,12 @@ sum_nb_inst_retire_ok = "+ nb_inst_retire_ok_"+toString(i) + " " +sum_nb_inst_retire_ok; sum_nb_inst_retire_ko = "+ nb_inst_retire_ko_"+toString(i) + " " +sum_nb_inst_retire_ko; + sum_average = "+ average_inst_retire_ok_"+toString(i)+" average_inst_retire_ko_"+toString(i); + + _stat->create_expr_average_by_cycle("average_inst_retire_ok_"+toString(i),"nb_inst_retire_ok_"+toString(i), "", toString(_("Average instruction retire ok by cycle (thread %d)"),i)); + _stat->create_expr_average_by_cycle("average_inst_retire_ko_"+toString(i),"nb_inst_retire_ko_"+toString(i), "", toString(_("Average instruction retire ko (event, miss) by cycle (thread %d)"),i)); - _stat->create_expr_average_by_cycle("average_inst_retire_ok_"+toString(i), sum_nb_inst_retire_ok, "", toString(_("Average instruction retire ok by cycle (IPC) (thread %d)"),i)); - _stat->create_expr_average_by_cycle("average_inst_retire_ko_"+toString(i), sum_nb_inst_retire_ko, "", toString(_("Average instruction retire ko (event, miss) by cycle (thread %d)"),i)); - + _stat->create_expr_percent ("percent_inst_retire_ok_"+toString(i),"average_inst_retire_ok_"+toString(i), sum_average, toString(_("Percent instruction retire ok by cycle (thread %d)"),i)); + _stat->create_expr_percent ("percent_inst_retire_ko_"+toString(i),"average_inst_retire_ko_"+toString(i), sum_average, toString(_("Percent instruction retire ko by cycle (thread %d)"),i)); + _stat->create_expr ("IPC_ok_"+toString(i) , "average_inst_retire_ok_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ok) (thread %d)",i)); _stat->create_expr ("CPI_ok_"+toString(i) , "/ 1 IPC_ok_"+toString(i) , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ok) (thread %d)",i)); @@ -82,4 +86,12 @@ } + _stat->create_expr_average_by_cycle("average_inst_retire_ok", sum_nb_inst_retire_ok, "", _("Average instruction retire ok by cycle (all thread)")); + _stat->create_expr_average_by_cycle("average_inst_retire_ko", sum_nb_inst_retire_ko, "", _("Average instruction retire ko (event, miss) by cycle (all thread)")); + + sum_average = "+ average_inst_retire_ok average_inst_retire_ko"; + + _stat->create_expr_percent ("percent_inst_retire_ok","average_inst_retire_ok", sum_average, _("Percent instruction retire ok by cycle (all thread)")); + _stat->create_expr_percent ("percent_inst_retire_ko","average_inst_retire_ko", sum_average, _("Percent instruction retire ko by cycle (all thread)")); + _stat->create_expr ("IPC_ok" , "/ "+sum_nb_inst_retire_ok+" cycle", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)"); _stat->create_expr ("CPI_ok" , "/ 1 IPC_ok" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok)"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 111) @@ -172,4 +172,8 @@ #endif entry->address_next = PORT_READ(in_INSERT_ADDRESS_NEXT [x][y]); +#ifdef DEBUG + entry->cycle_rob_in = sc_simulation_time(); + entry->cycle_commit = sc_simulation_time(); +#endif // Test if exception : @@ -340,4 +344,8 @@ (entry->read_rb)) entry->address_next = PORT_READ(in_COMMIT_ADDRESS [x]); + +#ifdef DEBUG + entry->cycle_commit = sc_simulation_time(); +#endif } } @@ -406,4 +414,16 @@ } +#if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) + // log file + instruction_log_file [num_thread] + << "[" << sc_simulation_time() << "] " + << "{" << ((retire_ok)?" OK ":"!KO!") << "} " + << std::hex + << "0x" << entry->address << " (0x" << (entry->address<<2) << ") " + << std::dec + << "[" << entry->cycle_rob_in << ", " << entry->cycle_commit << "] " + << std::endl; +#endif + // Update nb_inst reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg (revision 111) @@ -4,4 +4,5 @@ 1 1 *2 # nb_rename_unit 1 1 *2 # size_queue +0 1 +1 # queue_scheme 1 1 *2 # nb_bank 0 0 *2 # size_packet Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg (revision 111) @@ -4,4 +4,5 @@ 1 1 *2 # nb_rename_unit 16 32 *2 # size_queue +0 1 +1 # queue_scheme 4 16 *2 # nb_bank 0 0 *2 # size_packet Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg (revision 111) @@ -4,4 +4,5 @@ 4 4 *2 # nb_rename_unit 64 64 *2 # size_queue +0 1 +1 # queue_scheme 4 16 *2 # nb_bank 0 0 *2 # size_packet Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp (revision 111) @@ -8,5 +8,5 @@ #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h" -#define NB_PARAMS 17 +#define NB_PARAMS 18 void usage (int argc, char * argv[]) @@ -14,24 +14,25 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * nb_context (uint32_t )\n")); - err (_(" * nb_front_end (uint32_t )\n")); - err (_(" * nb_rename_unit (uint32_t )\n")); - err (_(" * size_queue (uint32_t )\n")); - err (_(" * nb_bank (uint32_t )\n")); - err (_(" * size_packet (uint32_t )\n")); - err (_(" * size_general_data (uint32_t )\n")); - err (_(" * size_special_data (uint32_t )\n")); - err (_(" * size_general_register (uint32_t )\n")); - err (_(" * size_special_register (uint32_t )\n")); - err (_(" * size_store_queue_ptr (uint32_t )\n")); - err (_(" * size_load_queue_ptr (uint32_t )\n")); - err (_(" * nb_inst_issue (uint32_t )\n")); - err (_(" * nb_inst_rename [nb_rename_unit] (uint32_t )\n")); - err (_(" * nb_inst_reexecute (uint32_t )\n")); - err (_(" * nb_rename_unit_select (uint32_t )\n")); - err (_(" * priority (Tpriority_t )\n")); - err (_(" * load_balancing (Tload_balancing_t)\n")); - err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); - err (_(" * table_routing [nb_inst_issue][nb_type] (bool )\n")); + err (_(" * nb_context (uint32_t )\n")); + err (_(" * nb_front_end (uint32_t )\n")); + err (_(" * nb_rename_unit (uint32_t )\n")); + err (_(" * size_queue (uint32_t )\n")); + err (_(" * queue_scheme (Tissue_queue_scheme_t)\n")); + err (_(" * nb_bank (uint32_t )\n")); + err (_(" * size_packet (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * size_special_data (uint32_t )\n")); + err (_(" * size_general_register (uint32_t )\n")); + err (_(" * size_special_register (uint32_t )\n")); + err (_(" * size_store_queue_ptr (uint32_t )\n")); + err (_(" * size_load_queue_ptr (uint32_t )\n")); + err (_(" * nb_inst_issue (uint32_t )\n")); + err (_(" * nb_inst_rename [nb_rename_unit] (uint32_t )\n")); + err (_(" * nb_inst_reexecute (uint32_t )\n")); + err (_(" * nb_rename_unit_select (uint32_t )\n")); + err (_(" * priority (Tpriority_t )\n")); + err (_(" * load_balancing (Tload_balancing_t )\n")); + err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); + err (_(" * table_routing [nb_inst_issue][nb_type] (bool )\n")); err (_(" * TYPE_ALU \n")); err (_(" * TYPE_SHIFT \n")); @@ -71,4 +72,5 @@ uint32_t _size_queue = fromString(argv[x++]); + Tissue_queue_scheme_t _queue_scheme = fromString(argv[x++]); uint32_t _nb_bank = fromString(argv[x++]); uint32_t _size_packet = fromString(argv[x++]); @@ -126,4 +128,5 @@ _nb_rename_unit , _size_queue , + _queue_scheme , _nb_bank , _size_packet , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h (revision 111) @@ -139,16 +139,22 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ private : generic::priority::Priority * _priority_in ; + + // in_order implementation only + // out_of_order implementation only + private : generic::priority::Priority * _priority_reg; private : generic::priority::Priority * _priority_out; - private : generic::priority::Priority * _priority_reg; // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // common implementation private : std::list * _issue_queue; private : std::list _reexecute_queue; + + // in_order implementation only + private : uint32_t reg_NUM_BANK_HEAD; + private : uint32_t reg_NUM_BANK_TAIL; + // out_of_order implementation only // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : Tcontrol_t * internal_BANK_IN_ACK ;//[nb_bank] - private : uint32_t * internal_BANK_IN_NUM_RENAME_UNIT ;//[nb_bank] - private : uint32_t * internal_BANK_IN_NUM_INST ;//[nb_bank] - + // common implementation private : Tcontrol_t * internal_ISSUE_OUT_VAL ;//[nb_inst_issue] private : Tcontrol_t * internal_ISSUE_OUT_FROM_REEXECUTE ;//[nb_inst_issue] @@ -157,4 +163,17 @@ private : Tcontrol_t * internal_REEXECUTE_ACK ;//[nb_inst_reexecute] + + // in_order implementation only + private : Tcontrol_t * internal_BANK_IN_ACK ;//[nb_bank] + private : uint32_t * internal_BANK_IN_NUM_RENAME_UNIT ;//[nb_bank] + private : uint32_t * internal_BANK_IN_NUM_INST ;//[nb_bank] + // out_of_order implementation only + public : Tcontrol_t ** internal_ISSUE_IN_ACK ;//[nb_rename_unit][nb_inst_rename] + + // function pointer + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::*function_transition) (void); + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::*function_genMoore ) (void); + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::*function_genMealy_issue_in ) (void); + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::*function_genMealy_issue_out) (void); #endif @@ -189,6 +208,15 @@ #ifdef SYSTEMC - public : void transition (void); - public : void genMoore (void); + public : void transition (void); + public : void genMoore (void); + public : void genMealy_issue_in (void); + public : void genMealy_issue_out (void); + + public : void function_in_order_transition (void); + public : void function_in_order_genMealy_issue_out(void); + public : void function_in_order_genMoore (void); + + public : void function_out_of_order_transition (void); + public : void function_out_of_order_genMoore (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h (revision 111) @@ -25,60 +25,62 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_context ; - public : uint32_t _nb_front_end ; - public : uint32_t _nb_rename_unit ; - public : uint32_t _size_queue ; - public : uint32_t _nb_bank ; -//public : uint32_t _size_packet ; -//public : uint32_t _size_general_data ; -//public : uint32_t _size_special_data ; -//public : uint32_t _size_general_register ; -//public : uint32_t _size_special_register ; -//public : uint32_t _size_store_queue_ptr ; -//public : uint32_t _size_load_queue_ptr ; - public : uint32_t _nb_inst_issue ; - public : uint32_t * _nb_inst_rename ;//[nb_rename_unit] - public : uint32_t _nb_inst_reexecute ; - public : uint32_t _nb_rename_unit_select ; - public : Tpriority_t _priority ; - public : Tload_balancing_t _load_balancing ; - public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] - public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] - public : uint32_t _size_reexecute_queue ; - -//public : uint32_t _nb_bank_select_out ; - public : uint32_t _max_nb_inst_rename ; - -//public : uint32_t _size_context_id ; -//public : uint32_t _size_front_end_id ; - public : uint32_t _size_bank ; - -//public : bool _have_port_context_id ; -//public : bool _have_port_front_end_id ; -//public : bool _have_port_packet_id ; -//public : bool _have_port_load_queue_ptr; + public : uint32_t _nb_context ; + public : uint32_t _nb_front_end ; + public : uint32_t _nb_rename_unit ; + public : uint32_t _size_queue ; + public : Tissue_queue_scheme_t _queue_scheme ; + public : uint32_t _nb_bank ; +//public : uint32_t _size_packet ; +//public : uint32_t _size_general_data ; +//public : uint32_t _size_special_data ; +//public : uint32_t _size_general_register ; +//public : uint32_t _size_special_register ; +//public : uint32_t _size_store_queue_ptr ; +//public : uint32_t _size_load_queue_ptr ; + public : uint32_t _nb_inst_issue ; + public : uint32_t * _nb_inst_rename ;//[nb_rename_unit] + public : uint32_t _nb_inst_reexecute ; + public : uint32_t _nb_rename_unit_select ; + public : Tpriority_t _priority ; + public : Tload_balancing_t _load_balancing ; + public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] + public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] + public : uint32_t _size_reexecute_queue ; + +//public : uint32_t _nb_bank_select_out ; + public : uint32_t _max_nb_inst_rename ; + +//public : uint32_t _size_context_id ; +//public : uint32_t _size_front_end_id ; + public : uint32_t _size_bank ; + +//public : bool _have_port_context_id ; +//public : bool _have_port_front_end_id ; +//public : bool _have_port_packet_id ; +//public : bool _have_port_load_queue_ptr; //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t nb_context , - uint32_t nb_front_end , - uint32_t nb_rename_unit , - uint32_t size_queue , - uint32_t nb_bank , - uint32_t size_packet , - uint32_t size_general_data , - uint32_t size_special_data , - uint32_t size_general_register , - uint32_t size_special_register , - uint32_t size_store_queue_ptr , - uint32_t size_load_queue_ptr , - uint32_t nb_inst_issue , - uint32_t * nb_inst_rename , - uint32_t nb_inst_reexecute , - uint32_t nb_rename_unit_select , - Tpriority_t priority , - Tload_balancing_t load_balancing , - bool ** table_routing , - bool ** table_issue_type , - bool is_toplevel=false); + public : Parameters (uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_rename_unit , + uint32_t size_queue , + Tissue_queue_scheme_t queue_scheme , + uint32_t nb_bank , + uint32_t size_packet , + uint32_t size_general_data , + uint32_t size_special_data , + uint32_t size_general_register , + uint32_t size_special_register , + uint32_t size_store_queue_ptr , + uint32_t size_load_queue_ptr , + uint32_t nb_inst_issue , + uint32_t * nb_inst_rename , + uint32_t nb_inst_reexecute , + uint32_t nb_rename_unit_select , + Tpriority_t priority , + Tload_balancing_t load_balancing , + bool ** table_routing , + bool ** table_issue_type , + bool is_toplevel=false); // public : Parameters (Parameters & param) ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h (revision 111) @@ -17,4 +17,11 @@ namespace ooo_engine { namespace issue_queue { + + typedef enum + { + ISSUE_QUEUE_SCHEME_IN_ORDER // Each instruction is issue in of order +// ,ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER // Each bundle is issue in order. In bundle, an instruction is issue out of order + ,ISSUE_QUEUE_SCHEME_OUT_OF_ORDER // Each instruction is issue out of order + } Tissue_queue_scheme_t; class entry_t @@ -87,4 +94,32 @@ }; // end namespace core }; // end namespace behavioural + + template<> inline std::string toString(const morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_ORDER : return "in_order" ; break; +// case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER : return "in_bundle_order"; break; + case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_OUT_OF_ORDER : return "out_of_order" ; break; + default : return ""; break; + } + }; + + template<> inline morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t fromString(const std::string& x) + { + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_ORDER))) == 0) or + (x.compare("in_order") == 0)) + return morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_ORDER; +// if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER))) == 0) or +// (x.compare("in_bundle_order") == 0)) +// return morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER; + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_OUT_OF_ORDER))) == 0) or + (x.compare("out_of_order") == 0)) + return morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_OUT_OF_ORDER; + + throw (ErrorMorpheo (" : Unknow string : \""+x+"\"")); + }; + }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp (revision 111) @@ -75,23 +75,88 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - transition"),_name.c_str()); + // Function pointer + switch (_param->_queue_scheme) + { + case ISSUE_QUEUE_SCHEME_IN_ORDER : + { + function_transition = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::function_in_order_transition ; + function_genMoore = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::function_in_order_genMoore ; + function_genMealy_issue_in = NULL; + function_genMealy_issue_out = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::function_in_order_genMealy_issue_out; + + break; + } + case ISSUE_QUEUE_SCHEME_OUT_OF_ORDER : + { + function_transition = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::function_out_of_order_transition ; + function_genMoore = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue::function_out_of_order_genMoore ; + function_genMealy_issue_in = NULL; + function_genMealy_issue_out = NULL; + + break; + } + default : + { + break; + } + } - SC_METHOD (transition); - dont_initialize (); - sensitive << (*(in_CLOCK)).pos(); - + if (function_transition != NULL) + { + log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - transition"),_name.c_str()); + + SC_METHOD (transition); + dont_initialize (); + sensitive << (*(in_CLOCK)).pos(); + # ifdef SYSTEMCASS_SPECIFIC - // List dependency information + // List dependency information # endif + } - log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str()); + if (function_genMoore != NULL) + { + log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str()); + + SC_METHOD (genMoore); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // need internal register + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + } - SC_METHOD (genMoore); - dont_initialize (); - sensitive << (*(in_CLOCK)).neg(); // need internal register - + if (function_genMealy_issue_in != NULL) + { + log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMealy_issue_in"),_name.c_str()); + + SC_METHOD (genMealy_issue_in); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // need internal register + # ifdef SYSTEMCASS_SPECIFIC - // List dependency information + // List dependency information # endif + } + + if (function_genMealy_issue_out != NULL) + { + log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMealy_issue_out"),_name.c_str()); + + SC_METHOD (genMealy_issue_out); + dont_initialize (); + sensitive << (*(in_CLOCK)).neg(); // need internal register + + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER) + { + for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) + sensitive << (*(in_ISSUE_OUT_ACK [i])); + } + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp (revision 111) @@ -154,8 +154,18 @@ ALLOC1(internal_REEXECUTE_ACK ,Tcontrol_t,_param->_nb_inst_reexecute); + + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER) + { + ALLOC1(internal_BANK_IN_ACK ,Tcontrol_t,_param->_nb_bank); + ALLOC1(internal_BANK_IN_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank); + ALLOC1(internal_BANK_IN_NUM_INST ,uint32_t ,_param->_nb_bank); + } + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER) + { + ALLOC2(internal_ISSUE_IN_ACK ,Tcontrol_t,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); + } } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - _priority_in = new generic::priority::Priority (_name+"_priority_in" , _param->_priority , @@ -165,4 +175,6 @@ _param->_nb_rename_unit_select); + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER) + { _priority_out = new generic::priority::Priority (_name+"_priority_out" , _param->_priority , @@ -174,4 +186,5 @@ _param->_nb_bank, _param->_nb_bank); + } #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp (revision 111) @@ -98,8 +98,4 @@ // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - DELETE1(internal_BANK_IN_ACK ,_param->_nb_bank); - DELETE1(internal_BANK_IN_NUM_RENAME_UNIT ,_param->_nb_bank); - DELETE1(internal_BANK_IN_NUM_INST ,_param->_nb_bank); - DELETE1(internal_ISSUE_OUT_VAL ,_param->_nb_inst_issue); DELETE1(internal_ISSUE_OUT_FROM_REEXECUTE,_param->_nb_inst_issue); @@ -108,4 +104,15 @@ DELETE1(internal_REEXECUTE_ACK ,_param->_nb_inst_reexecute); + + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER) + { + DELETE1(internal_BANK_IN_ACK ,_param->_nb_bank); + DELETE1(internal_BANK_IN_NUM_RENAME_UNIT ,_param->_nb_bank); + DELETE1(internal_BANK_IN_NUM_INST ,_param->_nb_bank); + } + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER) + { + DELETE2(internal_ISSUE_IN_ACK ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); + } } @@ -113,6 +120,9 @@ delete _priority_in ; - delete _priority_out; - delete _priority_reg; + if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER) + { + delete _priority_out; + delete _priority_reg; + } delete _component; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp (revision 111) @@ -0,0 +1,172 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::function_in_order_genMealy_issue_out" + void Issue_queue::function_in_order_genMealy_issue_out (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + // =================================================================== + // =====[ ISSUE_OUT ]================================================= + // =================================================================== + { + Tcontrol_t val [_param->_nb_inst_issue]; + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + val [i] = 0; + + // From Reexecute_queue + +// uint32_t num_reexecute_entry = 0; + for (std::list::iterator it=_reexecute_queue.begin(); + it!=_reexecute_queue.end(); + ++it) + { + entry_t* entry = (*it); + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + // test if no previous transaction and can accept this type + if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) + { + // find a issue port + val [i] = 1; + + if (_param->_have_port_context_id) + PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); + if (_param->_have_port_rob_ptr ) + PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); + PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); + PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) + PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); + PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); + PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); + PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); + PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); + PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); + + internal_ISSUE_OUT_FROM_REEXECUTE [i] = true; +// internal_ISSUE_OUT_NUM_BANK [i] = num_reexecute_entry; + internal_ISSUE_OUT_ENTRY [i] = entry; + + break; // stop scan + } +// num_reexecute_entry ++; + } + + // From Issue_queue + for (uint32_t i=0; i<_param->_nb_bank; ++i) + { + uint32_t num_bank=(reg_NUM_BANK_HEAD+i)%_param->_nb_bank; + + log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d]",num_bank); + + bool find = false; + + // Have instruction ? + if (not _issue_queue [num_bank].empty()) + { + log_printf(TRACE,Issue_queue,FUNCTION," * Not Empty !!!"); + + entry_t* entry = _issue_queue [num_bank].front(); + + for (uint32_t j=0; j<_param->_nb_inst_issue; j++) + { + log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",j); + log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",PORT_READ(in_ISSUE_OUT_ACK [j])); + log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[j]); + log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [j][entry->_type]); + + // test if no previous transaction and can accept this type + if ((val[j] == 0) and + _param->_table_issue_type [j][entry->_type] and + PORT_READ(in_ISSUE_OUT_ACK [j])) + { + log_printf(TRACE,Issue_queue,FUNCTION," * find : %d",j); + + // find a issue port + val [j] = 1; + + if (_param->_have_port_context_id) + PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [j], entry->_context_id ); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [j], entry->_front_end_id ); + if (_param->_have_port_rob_ptr ) + PORT_WRITE(out_ISSUE_OUT_PACKET_ID [j], entry->_packet_id ); + PORT_WRITE(out_ISSUE_OUT_OPERATION [j], entry->_operation ); + PORT_WRITE(out_ISSUE_OUT_TYPE [j], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [j], entry->_store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) + PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [j], entry->_load_queue_ptr_write ); + PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [j], entry->_has_immediat ); + PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [j], entry->_immediat ); + PORT_WRITE(out_ISSUE_OUT_READ_RA [j], entry->_read_ra ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [j], entry->_num_reg_ra ); + PORT_WRITE(out_ISSUE_OUT_READ_RB [j], entry->_read_rb ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [j], entry->_num_reg_rb ); + PORT_WRITE(out_ISSUE_OUT_READ_RC [j], entry->_read_rc ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [j], entry->_num_reg_rc ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RD [j], entry->_write_rd ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [j], entry->_num_reg_rd ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RE [j], entry->_write_re ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [j], entry->_num_reg_re ); + + internal_ISSUE_OUT_FROM_REEXECUTE [j] = false; + internal_ISSUE_OUT_NUM_BANK [j] = num_bank; + internal_ISSUE_OUT_ENTRY [j] = entry; + + find = true; + break; // find : stop scan + } + } + } + + if (not find) + break; // stop scan (in order) + } + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + { + internal_ISSUE_OUT_VAL [i] = val [i]; + PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); + } + } + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMoore.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMoore.cpp (revision 111) @@ -0,0 +1,80 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::function_in_order_genMoore" + void Issue_queue::function_in_order_genMoore (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + // =================================================================== + // =====[ REEXECUTE_UNIT ]============================================ + // =================================================================== + // Same implementation in in-order and out-of-order + + // =================================================================== + // =====[ ISSUE_IN ]================================================== + // =================================================================== + { + // init + for (uint32_t i=0; i<_param->_nb_rename_unit; i++) + for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) + internal_ISSUE_IN_ACK [i][j] = false; + + std::list * select_in = _priority_in ->select(); // same select for all issue + std::list::iterator it=select_in ->begin(); + + uint32_t num_bank = reg_NUM_BANK_TAIL; + uint32_t nb_insert = 0; + while ((it!=select_in ->end()) and + (_issue_queue[num_bank].size() != _param->_size_bank) and // test if can accept an data + (nb_insert < _param->_nb_bank) + ) + { + // Get num interface + uint32_t num_rename_unit = it->grp; + uint32_t num_inst_rename = it->elt; + + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d][%d]",num_rename_unit,num_inst_rename); + + // find + internal_ISSUE_IN_ACK [num_rename_unit][num_inst_rename] = true; + + // update pointer + ++it; + num_bank = (num_bank+1)%_param->_nb_bank; + nb_insert ++; + } + + for (uint32_t i=0; i<_param->_nb_rename_unit; i++) + for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) + PORT_WRITE(out_ISSUE_IN_ACK [i][j],internal_ISSUE_IN_ACK [i][j]); + } + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_transition.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_transition.cpp (revision 111) @@ -0,0 +1,124 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::function_in_order_transition" + void Issue_queue::function_in_order_transition (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { +// _priority_in ->reset(); +// _priority_out->reset(); +// _priority_reg->reset(); + + for (uint32_t i=0; i<_param->_nb_bank; i++) + _issue_queue [i].clear(); + + reg_NUM_BANK_HEAD = 0; + reg_NUM_BANK_TAIL = 0; + } + else + { +// _priority_in ->transition(); +// _priority_out->transition(); +// _priority_reg->transition(); + + // =================================================================== + // =====[ ISSUE_IN ]================================================== + // =================================================================== + { + for (uint32_t i=0; i<_param->_nb_rename_unit; i++) + for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) + if (PORT_READ(in_ISSUE_IN_VAL[i][j]) and internal_ISSUE_IN_ACK [i][j]) + { + uint32_t num_bank = reg_NUM_BANK_TAIL; + + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d][%d] - Transaction with bank [%d]",i,j,num_bank); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_nb_inst_issue_in [i]) ++; +#endif + entry_t * entry = new entry_t + ( + (_param->_have_port_context_id )?PORT_READ(in_ISSUE_IN_CONTEXT_ID [i][j]):0, + (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [i][j]):0, + (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [i][j]):0, + PORT_READ(in_ISSUE_IN_OPERATION [i][j]), + PORT_READ(in_ISSUE_IN_TYPE [i][j]), + PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [i][j]), + (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [i][j]):0, + PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [i][j]), + PORT_READ(in_ISSUE_IN_IMMEDIAT [i][j]), + PORT_READ(in_ISSUE_IN_READ_RA [i][j]), + PORT_READ(in_ISSUE_IN_NUM_REG_RA [i][j]), + PORT_READ(in_ISSUE_IN_READ_RB [i][j]), + PORT_READ(in_ISSUE_IN_NUM_REG_RB [i][j]), + PORT_READ(in_ISSUE_IN_READ_RC [i][j]), + PORT_READ(in_ISSUE_IN_NUM_REG_RC [i][j]), + PORT_READ(in_ISSUE_IN_WRITE_RD [i][j]), + PORT_READ(in_ISSUE_IN_NUM_REG_RD [i][j]), + PORT_READ(in_ISSUE_IN_WRITE_RE [i][j]), + PORT_READ(in_ISSUE_IN_NUM_REG_RE [i][j]) + ); + + _issue_queue [num_bank].push_back(entry); + + // Update pointer + reg_NUM_BANK_TAIL = (reg_NUM_BANK_TAIL+1)%_param->_nb_bank; + } + } + + // =================================================================== + // =====[ ISSUE_OUT ]================================================= + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) + if (internal_ISSUE_OUT_VAL [i] and PORT_READ(in_ISSUE_OUT_ACK [i])) + if (not internal_ISSUE_OUT_FROM_REEXECUTE [i]) + { + entry_t * entry = internal_ISSUE_OUT_ENTRY [i]; + + // front ... + uint32_t num_bank = internal_ISSUE_OUT_NUM_BANK [i]; + + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank); + + _issue_queue [num_bank].remove(entry); + + reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; + + delete entry; + } + + } + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp (revision 111) @@ -0,0 +1,225 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::function_out_of_order_genMoore" + void Issue_queue::function_out_of_order_genMoore (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + // =================================================================== + // =====[ REEXECUTE_UNIT ]============================================ + // =================================================================== + // Same implementation in in-order and out-of-order + + // =================================================================== + // =====[ ISSUE_IN ]================================================== + // =================================================================== + { + Tcontrol_t ack [_param->_nb_rename_unit][_param->_max_nb_inst_rename]; + + // Initialisation + for (uint32_t i=0; i<_param->_nb_bank; i++) + internal_BANK_IN_ACK [i] = false; + + for (uint32_t i=0; i<_param->_nb_rename_unit; i++) + for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) + ack [i][j] = false; + + std::list * select_reg = _priority_reg->select(); // same select for all issue + + // issue_in interface + std::list * select_in = _priority_in ->select(); // same select for all issue + for (std::list::iterator it=select_in ->begin(); + it!=select_in ->end(); + it++) + { + // Get num interface + uint32_t num_rename_unit = it->grp; + uint32_t num_inst_rename = it->elt; + + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d][%d]",num_rename_unit,num_inst_rename); + + // scan all bank + for (std::list::iterator it=select_reg->begin(); + it!=select_reg->end(); + it++) + { + uint32_t num_bank = it->grp; + + log_printf(TRACE,Issue_queue,FUNCTION," * BANK [%d]",num_bank); + + // test if bank is not busy (full or previous access) + if (not internal_BANK_IN_ACK [num_bank] and (_issue_queue[num_bank].size() < _param->_size_bank)) + { + log_printf(TRACE,Issue_queue,FUNCTION," * find"); + + // find + ack [num_rename_unit][num_inst_rename] = true; + internal_BANK_IN_ACK [num_bank] = true; + internal_BANK_IN_NUM_RENAME_UNIT [num_bank] = num_rename_unit; + internal_BANK_IN_NUM_INST [num_bank] = num_inst_rename; + + break; // Stop scan + } + else + log_printf(TRACE,Issue_queue,FUNCTION," * not find"); + } + } + + for (uint32_t i=0; i<_param->_nb_rename_unit; i++) + for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) + PORT_WRITE(out_ISSUE_IN_ACK [i][j],ack [i][j]); + } + + // =================================================================== + // =====[ ISSUE_OUT ]================================================= + // =================================================================== + { + Tcontrol_t val [_param->_nb_inst_issue]; + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + val [i] = 0; + + // From Reexecute_queue + +// uint32_t num_reexecute_entry = 0; + for (std::list::iterator it=_reexecute_queue.begin(); + it!=_reexecute_queue.end(); + ++it) + { + entry_t* entry = (*it); + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + // test if no previous transaction and can accept this type + if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) + { + // find a issue port + val [i] = 1; + + if (_param->_have_port_context_id) + PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); + if (_param->_have_port_rob_ptr ) + PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); + PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); + PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) + PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); + PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); + PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); + PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); + PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); + PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); + + internal_ISSUE_OUT_FROM_REEXECUTE [i] = true; +// internal_ISSUE_OUT_NUM_BANK [i] = num_reexecute_entry; + internal_ISSUE_OUT_ENTRY [i] = entry; + + break; // stop scan + } +// num_reexecute_entry ++; + } + + // From Issue_queue + + std::list * select = _priority_out->select(); // same select for all issue + + for (std::list::iterator it=select->begin(); + it!=select->end(); + it++) + { + uint32_t num_bank=it->grp; + +// log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION," * Bank [%d]",num_bank); + + // Have instruction ? + if (not _issue_queue [num_bank].empty()) + { +// log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION," * Not Empty !!!"); + + entry_t* entry = _issue_queue [num_bank].front(); + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + // test if no previous transaction and can accept this type + if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) + { + // find a issue port + val [i] = 1; + + if (_param->_have_port_context_id) + PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); + if (_param->_have_port_rob_ptr ) + PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); + PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); + PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); + if (_param->_have_port_load_queue_ptr) + PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); + PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); + PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); + PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); + PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); + PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); + PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); + PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); + + internal_ISSUE_OUT_FROM_REEXECUTE [i] = false; + internal_ISSUE_OUT_NUM_BANK [i] = num_bank; + internal_ISSUE_OUT_ENTRY [i] = entry; + + break; // stop scan + } + } + } + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + { + internal_ISSUE_OUT_VAL [i] = val [i]; + PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); + } + } + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_transition.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_transition.cpp (revision 111) @@ -0,0 +1,116 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::function_out_of_order_transition" + void Issue_queue::function_out_of_order_transition (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { +// _priority_in ->reset(); + _priority_out->reset(); + _priority_reg->reset(); + + for (uint32_t i=0; i<_param->_nb_bank; i++) + _issue_queue [i].clear(); + } + else + { +// _priority_in ->transition(); + _priority_out->transition(); + _priority_reg->transition(); + + // =================================================================== + // =====[ ISSUE_IN ]================================================== + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_bank; i++) + if (internal_BANK_IN_ACK [i]) + { + uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i]; + uint32_t y = internal_BANK_IN_NUM_INST [i]; + + if (PORT_READ(in_ISSUE_IN_VAL[x][y])) + { + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y); + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_nb_inst_issue_in [x]) ++; +#endif + entry_t * entry = new entry_t + ( + (_param->_have_port_context_id )?PORT_READ(in_ISSUE_IN_CONTEXT_ID [x][y]):0, + (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [x][y]):0, + (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [x][y]):0, + PORT_READ(in_ISSUE_IN_OPERATION [x][y]), + PORT_READ(in_ISSUE_IN_TYPE [x][y]), + PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), + (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [x][y]):0, + PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), + PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), + PORT_READ(in_ISSUE_IN_READ_RA [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), + PORT_READ(in_ISSUE_IN_READ_RB [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), + PORT_READ(in_ISSUE_IN_READ_RC [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), + PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), + PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), + PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) + ); + + _issue_queue [i].push_back(entry); + } + } + + // =================================================================== + // =====[ ISSUE_OUT ]================================================= + // =================================================================== + + for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) + if (internal_ISSUE_OUT_VAL [i] and PORT_READ(in_ISSUE_OUT_ACK [i])) + if (not internal_ISSUE_OUT_FROM_REEXECUTE [i]) + { + entry_t * entry = internal_ISSUE_OUT_ENTRY [i]; + + // front ... + uint32_t num_bank = internal_ISSUE_OUT_NUM_BANK [i]; + + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank); + + _issue_queue [num_bank].remove(entry); + delete entry; + } + } + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_in.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_in.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_in.cpp (revision 111) @@ -0,0 +1,38 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::genMealy_issue_in" + void Issue_queue::genMealy_issue_in (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + (this->*function_genMealy_issue_in) (); + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_out.cpp (revision 111) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMealy_issue_out.cpp (revision 111) @@ -0,0 +1,38 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace issue_queue { + + +#undef FUNCTION +#define FUNCTION "Issue_queue::genMealy_issue_out" + void Issue_queue::genMealy_issue_out (void) + { + log_begin(Issue_queue,FUNCTION); + log_function(Issue_queue,FUNCTION,_name.c_str()); + + (this->*function_genMealy_issue_out) (); + + log_end(Issue_queue,FUNCTION); + }; + +}; // end namespace issue_queue +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp (revision 111) @@ -39,187 +39,5 @@ } - // =================================================================== - // =====[ ISSUE_IN ]================================================== - // =================================================================== - { - Tcontrol_t ack [_param->_nb_rename_unit][_param->_max_nb_inst_rename]; - - // Initialisation - for (uint32_t i=0; i<_param->_nb_bank; i++) - internal_BANK_IN_ACK [i] = false; - - for (uint32_t i=0; i<_param->_nb_rename_unit; i++) - for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) - ack [i][j] = false; - - std::list * select_reg = _priority_reg->select(); // same select for all issue - - // issue_in interface - std::list * select_in = _priority_in ->select(); // same select for all issue - for (std::list::iterator it=select_in ->begin(); - it!=select_in ->end(); - it++) - { - // Get num interface - uint32_t num_rename_unit = it->grp; - uint32_t num_inst_rename = it->elt; - - log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d][%d]",num_rename_unit,num_inst_rename); - - // scan all bank - for (std::list::iterator it=select_reg->begin(); - it!=select_reg->end(); - it++) - { - uint32_t num_bank = it->grp; - - log_printf(TRACE,Issue_queue,FUNCTION," * BANK [%d]",num_bank); - - // test if bank is not busy (full or previous access) - if (not internal_BANK_IN_ACK [num_bank] and (_issue_queue[num_bank].size() < _param->_size_bank)) - { - log_printf(TRACE,Issue_queue,FUNCTION," * find"); - - // find - ack [num_rename_unit][num_inst_rename] = true; - internal_BANK_IN_ACK [num_bank] = true; - internal_BANK_IN_NUM_RENAME_UNIT [num_bank] = num_rename_unit; - internal_BANK_IN_NUM_INST [num_bank] = num_inst_rename; - - break; // Stop scan - } - else - log_printf(TRACE,Issue_queue,FUNCTION," * not find"); - } - } - - for (uint32_t i=0; i<_param->_nb_rename_unit; i++) - for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) - PORT_WRITE(out_ISSUE_IN_ACK [i][j],ack [i][j]); - } - - // =================================================================== - // =====[ ISSUE_OUT ]================================================= - // =================================================================== - { - Tcontrol_t val [_param->_nb_inst_issue]; - - for (uint32_t i=0; i<_param->_nb_inst_issue; i++) - val [i] = 0; - - // From Reexecute_queue - -// uint32_t num_reexecute_entry = 0; - for (std::list::iterator it=_reexecute_queue.begin(); - it!=_reexecute_queue.end(); - ++it) - { - entry_t* entry = (*it); - - for (uint32_t i=0; i<_param->_nb_inst_issue; i++) - // test if no previous transaction and can accept this type - if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) - { - // find a issue port - val [i] = 1; - - if (_param->_have_port_context_id) - PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); - if (_param->_have_port_front_end_id) - PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); - if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); - PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); - PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); - PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); - if (_param->_have_port_load_queue_ptr) - PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); - PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); - PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); - PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); - PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); - PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); - PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); - PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); - - internal_ISSUE_OUT_FROM_REEXECUTE [i] = true; -// internal_ISSUE_OUT_NUM_BANK [i] = num_reexecute_entry; - internal_ISSUE_OUT_ENTRY [i] = entry; - - break; // stop scan - } -// num_reexecute_entry ++; - } - - // From Issue_queue - - std::list * select = _priority_out->select(); // same select for all issue - - for (std::list::iterator it=select->begin(); - it!=select->end(); - it++) - { - uint32_t num_bank=it->grp; - -// log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION," * Bank [%d]",num_bank); - - // Have instruction ? - if (not _issue_queue [num_bank].empty()) - { -// log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION," * Not Empty !!!"); - - entry_t* entry = _issue_queue [num_bank].front(); - - for (uint32_t i=0; i<_param->_nb_inst_issue; i++) - // test if no previous transaction and can accept this type - if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) - { - // find a issue port - val [i] = 1; - - if (_param->_have_port_context_id) - PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); - if (_param->_have_port_front_end_id) - PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); - if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); - PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); - PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); - PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); - if (_param->_have_port_load_queue_ptr) - PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); - PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); - PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); - PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); - PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); - PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); - PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); - PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); - PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); - - internal_ISSUE_OUT_FROM_REEXECUTE [i] = false; - internal_ISSUE_OUT_NUM_BANK [i] = num_bank; - internal_ISSUE_OUT_ENTRY [i] = entry; - - break; // stop scan - } - } - } - - for (uint32_t i=0; i<_param->_nb_inst_issue; i++) - { - internal_ISSUE_OUT_VAL [i] = val [i]; - PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); - } - } + (this->*function_genMoore) (); log_end(Issue_queue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp (revision 111) @@ -27,9 +27,4 @@ { _priority_in ->reset(); - _priority_out->reset(); - _priority_reg->reset(); - - for (uint32_t i=0; i<_param->_nb_bank; i++) - _issue_queue [i].clear(); _reexecute_queue.clear(); } @@ -37,51 +32,4 @@ { _priority_in ->transition(); - _priority_out->transition(); - _priority_reg->transition(); - - // =================================================================== - // =====[ ISSUE_IN ]================================================== - // =================================================================== - - for (uint32_t i=0; i<_param->_nb_bank; i++) - if (internal_BANK_IN_ACK [i]) - { - uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i]; - uint32_t y = internal_BANK_IN_NUM_INST [i]; - - if (PORT_READ(in_ISSUE_IN_VAL[x][y])) - { - log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y); - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_nb_inst_issue_in [x]) ++; -#endif - entry_t * entry = new entry_t - ( - (_param->_have_port_context_id )?PORT_READ(in_ISSUE_IN_CONTEXT_ID [x][y]):0, - (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [x][y]):0, - (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [x][y]):0, - PORT_READ(in_ISSUE_IN_OPERATION [x][y]), - PORT_READ(in_ISSUE_IN_TYPE [x][y]), - PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), - (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [x][y]):0, - PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), - PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), - PORT_READ(in_ISSUE_IN_READ_RA [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), - PORT_READ(in_ISSUE_IN_READ_RB [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), - PORT_READ(in_ISSUE_IN_READ_RC [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), - PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), - PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), - PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) - ); - - _issue_queue [i].push_back(entry); - } - } // =================================================================== @@ -130,27 +78,30 @@ if (internal_ISSUE_OUT_VAL [i] and PORT_READ(in_ISSUE_OUT_ACK [i])) { - entry_t * entry = internal_ISSUE_OUT_ENTRY [i]; - +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_nb_inst_issue_out ) ++; +#endif if (internal_ISSUE_OUT_FROM_REEXECUTE [i]) { + entry_t * entry = internal_ISSUE_OUT_ENTRY [i]; + log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From Reexecute_queue",i); _reexecute_queue.remove(entry); + + delete entry; } - else - { - // front ... - uint32_t num_bank = internal_ISSUE_OUT_NUM_BANK [i]; - - log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank); - - _issue_queue [num_bank].remove(entry); - } - - delete entry; - } + // else ... in function specific + } } -#if defined(DEBUG) and defined(DEBUG_Issue_queue) and (DEBUG >= DEBUG_TRACE) + // specific implementation + (this->*function_transition) (); + + // =================================================================== + // =====[ PRINT ]==================================================== + // =================================================================== + +#if defined(DEBUG) and DEBUG_Issue_queue and (DEBUG >= DEBUG_TRACE) log_printf(TRACE,Issue_queue,FUNCTION," * Dump Issue_queue"); @@ -245,4 +196,6 @@ #endif + + #if defined(STATISTICS) or defined(VHDL_TESTBENCH) end_cycle (); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp (revision 111) @@ -19,25 +19,26 @@ #undef FUNCTION #define FUNCTION "Issue_queue::Parameters" - Parameters::Parameters (uint32_t nb_context , - uint32_t nb_front_end , - uint32_t nb_rename_unit , - uint32_t size_queue , - uint32_t nb_bank , - uint32_t size_packet , - uint32_t size_general_data , - uint32_t size_special_data , - uint32_t size_general_register , - uint32_t size_special_register , - uint32_t size_store_queue_ptr , - uint32_t size_load_queue_ptr , - uint32_t nb_inst_issue , - uint32_t * nb_inst_rename , - uint32_t nb_inst_reexecute , - uint32_t nb_rename_unit_select , - Tpriority_t priority , - Tload_balancing_t load_balancing , - bool ** table_routing , - bool ** table_issue_type , - bool is_toplevel ) + Parameters::Parameters (uint32_t nb_context , + uint32_t nb_front_end , + uint32_t nb_rename_unit , + uint32_t size_queue , + Tissue_queue_scheme_t queue_scheme , + uint32_t nb_bank , + uint32_t size_packet , + uint32_t size_general_data , + uint32_t size_special_data , + uint32_t size_general_register , + uint32_t size_special_register , + uint32_t size_store_queue_ptr , + uint32_t size_load_queue_ptr , + uint32_t nb_inst_issue , + uint32_t * nb_inst_rename , + uint32_t nb_inst_reexecute , + uint32_t nb_rename_unit_select , + Tpriority_t priority , + Tload_balancing_t load_balancing , + bool ** table_routing , + bool ** table_issue_type , + bool is_toplevel ) { log_begin(Issue_queue,FUNCTION); @@ -47,4 +48,5 @@ _nb_rename_unit = nb_rename_unit ; _size_queue = size_queue ; + _queue_scheme = queue_scheme ; _nb_bank = nb_bank ; _nb_inst_issue = nb_inst_issue ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 111) @@ -25,4 +25,23 @@ Parameters_test test ("Issue_queue"); + + switch (_queue_scheme) + { + case ISSUE_QUEUE_SCHEME_IN_ORDER : + case ISSUE_QUEUE_SCHEME_OUT_OF_ORDER : + { + // supported + break; + } + default : + { + test.error(toString(_("Issue queue scheme '%s' is not supported. Please wait a next revision.\n"),toString(_queue_scheme).c_str())); + break; + } + } + + if (// (_queue_scheme == ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER) or + (_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER )) + test.warning(toString(_("Can have deadlock with the queue scheme \"%s\".\n"),toString(_queue_scheme).c_str())); if (not is_multiple(_size_queue, _nb_bank)) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 111) @@ -123,7 +123,7 @@ } -// for (uint32_t i=0; i<_param->_nb_front_end; i++) -// for (uint32_t j=0; j<_param->_nb_context [i]; j++) -// sensitive << (*(in_RETIRE_EVENT_STATE [i][j])); + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context [i]; j++) + sensitive << (*(in_RETIRE_EVENT_STATE [i][j])); for (uint32_t i=0; i<_param->_nb_inst_rename; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 111) @@ -69,23 +69,19 @@ Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y])); - Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y])); - Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y])); - Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y])); - Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); - Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); +// Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y])); +// Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y])); +// Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y])); +// Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); +// Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); - // Attention, j'ai enlevé event_state de la liste de sensibilité -// Tevent_state_t event_state = PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]); + // Test if ROB is Flushed + Tevent_state_t event_state = PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]); + Tcontrol_t can_register_access = (event_state == EVENT_STATE_NO_EVENT); -// Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or -// // ROB Flush -// ((event_state == EVENT_STATE_EVENT ) or -// (event_state == EVENT_STATE_WAITEND))); - -// Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]) and not no_execute); -// Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]) and not no_execute); -// Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]) and not no_execute); -// Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and not no_execute); -// Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and not no_execute); + Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]) and can_register_access); + Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]) and can_register_access); + Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]) and can_register_access); + Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and can_register_access); + Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access); if (_param->_have_port_front_end_id) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg (revision 111) @@ -23,5 +23,6 @@ 1 1 +1 # commit_priority 1 1 +1 # commit_load_balancing -1 1 +1 # size_issue_queue +1 1 +1 # size_issue_queue +0 1 +1 # issue_queue_scheme 1 1 +1 # nb_issue_queue_bank 1 1 +1 # issue_priority Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp (revision 111) @@ -9,5 +9,5 @@ #include "Behavioural/include/Allocation.h" -#define NB_PARAMS 23 +#define NB_PARAMS 24 void usage (int argc, char * argv[]) @@ -15,33 +15,34 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * nb_front_end (uint32_t )\n")); - err (_(" * nb_context [nb_front_end] (uint32_t )\n")); - err (_(" * nb_rename_unit (uint32_t )\n")); - err (_(" * nb_execute_loop (uint32_t )\n")); - err (_(" * nb_inst_decod [nb_front_end] (uint32_t )\n")); - err (_(" * nb_inst_insert [nb_rename_unit] (uint32_t )\n")); - err (_(" * nb_inst_retire [nb_rename_unit] (uint32_t )\n")); - err (_(" * nb_inst_issue (uint32_t )\n")); - err (_(" * nb_inst_execute [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_inst_reexecute (uint32_t )\n")); - err (_(" * nb_inst_commit (uint32_t )\n")); - err (_(" * nb_inst_branch_complete (uint32_t )\n")); - err (_(" * nb_branch_speculated [nb_front_end][nb_context] (uint32_t )\n")); - err (_(" * size_nb_inst_decod (uint32_t )\n")); - err (_(" * nb_rename_unit_select (uint32_t )\n")); - err (_(" * nb_execute_loop_select (uint32_t )\n")); - err (_(" * size_general_data (uint32_t )\n")); - err (_(" * size_special_data (uint32_t )\n")); - err (_(" * link_rename_unit_with_front_end [nb_front_end] (uint32_t )\n")); - err (_(" * size_re_order_buffer (uint32_t )\n")); - err (_(" * nb_re_order_buffer_bank (uint32_t )\n")); - err (_(" * commit_priority (Tpriority_t )\n")); - err (_(" * commit_load_balancing (Tload_balancing_t)\n")); - err (_(" * size_issue_queue (uint32_t )\n")); - err (_(" * nb_issue_queue_bank (uint32_t )\n")); - err (_(" * issue_priority (Tpriority_t )\n")); - err (_(" * issue_load_balancing (Tload_balancing_t)\n")); - err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); - err (_(" * table_issue_type [nb_inst_issue][nb_type] (bool )\n")); + err (_(" * nb_front_end (uint32_t )\n")); + err (_(" * nb_context [nb_front_end] (uint32_t )\n")); + err (_(" * nb_rename_unit (uint32_t )\n")); + err (_(" * nb_execute_loop (uint32_t )\n")); + err (_(" * nb_inst_decod [nb_front_end] (uint32_t )\n")); + err (_(" * nb_inst_insert [nb_rename_unit] (uint32_t )\n")); + err (_(" * nb_inst_retire [nb_rename_unit] (uint32_t )\n")); + err (_(" * nb_inst_issue (uint32_t )\n")); + err (_(" * nb_inst_execute [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_inst_reexecute (uint32_t )\n")); + err (_(" * nb_inst_commit (uint32_t )\n")); + err (_(" * nb_inst_branch_complete (uint32_t )\n")); + err (_(" * nb_branch_speculated [nb_front_end][nb_context] (uint32_t )\n")); + err (_(" * size_nb_inst_decod (uint32_t )\n")); + err (_(" * nb_rename_unit_select (uint32_t )\n")); + err (_(" * nb_execute_loop_select (uint32_t )\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * size_special_data (uint32_t )\n")); + err (_(" * link_rename_unit_with_front_end [nb_front_end] (uint32_t )\n")); + err (_(" * size_re_order_buffer (uint32_t )\n")); + err (_(" * nb_re_order_buffer_bank (uint32_t )\n")); + err (_(" * commit_priority (Tpriority_t )\n")); + err (_(" * commit_load_balancing (Tload_balancing_t )\n")); + err (_(" * size_issue_queue (uint32_t )\n")); + err (_(" * issue_queue_scheme (Tissue_queue_scheme_t)\n")); + err (_(" * nb_issue_queue_bank (uint32_t )\n")); + err (_(" * issue_priority (Tpriority_t )\n")); + err (_(" * issue_load_balancing (Tload_balancing_t )\n")); + err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); + err (_(" * table_issue_type [nb_inst_issue][nb_type] (bool )\n")); err (_(" * TYPE_ALU \n")); err (_(" * TYPE_SHIFT \n")); @@ -146,4 +147,6 @@ Tload_balancing_t _commit_load_balancing = fromString(argv[x++]); uint32_t _size_issue_queue = fromString(argv[x++]); + issue_queue::Tissue_queue_scheme_t + _issue_queue_scheme = fromString(argv[x++]); uint32_t _nb_issue_queue_bank = fromString(argv[x++]); Tpriority_t _issue_priority = fromString(argv[x++]); @@ -308,4 +311,5 @@ _commit_load_balancing , _size_issue_queue , + _issue_queue_scheme , _nb_issue_queue_bank , _issue_priority , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h (revision 111) @@ -57,4 +57,6 @@ // Issue public : uint32_t _size_issue_queue ; + public : issue_queue::Tissue_queue_scheme_t + _issue_queue_scheme ; public : uint32_t _nb_issue_queue_bank ; public : Tpriority_t _issue_priority ; @@ -152,4 +154,6 @@ // Issue uint32_t size_issue_queue , + issue_queue::Tissue_queue_scheme_t + issue_queue_scheme , uint32_t nb_issue_queue_bank , Tpriority_t issue_priority , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp (revision 111) @@ -44,4 +44,6 @@ // Issue uint32_t size_issue_queue , + issue_queue::Tissue_queue_scheme_t + issue_queue_scheme , uint32_t nb_issue_queue_bank , Tpriority_t issue_priority , @@ -101,4 +103,5 @@ _commit_load_balancing = commit_load_balancing ; _size_issue_queue = size_issue_queue ; + _issue_queue_scheme = issue_queue_scheme ; _nb_issue_queue_bank = nb_issue_queue_bank ; _issue_priority = issue_priority ; @@ -271,4 +274,5 @@ _nb_rename_unit , _size_issue_queue , + _issue_queue_scheme , _nb_issue_queue_bank , size_packet_id , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg (revision 111) @@ -10,4 +10,5 @@ 1 1 +1 # nb_decod_bloc 1 1 +1 # size_decod_queue [0] [nb_decod_bloc] +0 1 +1 # decod_queue_scheme [0] [nb_decod_bloc] 1 1 +1 # nb_inst_decod [0] [nb_decod_bloc] 1 1 +1 # nb_context_select [0] [nb_decod_bloc] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg (revision 111) @@ -10,4 +10,5 @@ 1 1 +1 # nb_decod_bloc 4 4 +1 # size_decod_queue [0] [nb_decod_bloc] +0 1 +1 # decod_queue_scheme [0] [nb_decod_bloc] 1 1 +1 # nb_inst_decod [0] [nb_decod_bloc] 1 1 +1 # nb_context_select [0] [nb_decod_bloc] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp (revision 111) @@ -15,140 +15,142 @@ err (_(" %s name_instance list_params.\n"),argv[0]); err (_("list_params is :\n")); - err (_(" * size_general_data (uint32_t )\n")); - err (_(" * size_special_data (uint32_t )\n")); -//morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), - - err (_(" * nb_thread (uint32_t )\n")); - err (_(" * size_ifetch_queue [nb_thread] (uint32_t )\n")); - err (_(" * nb_inst_fetch [nb_thread] (uint32_t )\n")); -//err (_(" * implement_group [nb_thread][NB_GROUP] (bool )\n")); - err (_(" * ras_size_queue [nb_thread] (uint32_t )\n")); - err (_(" * upt_size_queue [nb_thread] (uint32_t )\n")); - err (_(" * ufpt_size_queue [nb_thread] (uint32_t )\n")); - - err (_(" * nb_decod_bloc (uint32_t )\n")); - err (_(" * size_decod_queue [nb_decod_bloc] (uint32_t )\n")); - err (_(" * nb_inst_decod [nb_decod_bloc] (uint32_t )\n")); - err (_(" * nb_context_select [nb_decod_bloc] (uint32_t )\n")); - err (_(" * context_select_priority [nb_decod_bloc] (Tpriority_t )\n")); - err (_(" * context_select_load_balancing [nb_decod_bloc] (Tload_balancing_t)\n")); - - err (_(" * nb_rename_bloc (uint32_t )\n")); - err (_(" * nb_inst_insert [nb_rename_bloc] (uint32_t )\n")); - err (_(" * nb_inst_retire [nb_rename_bloc] (uint32_t )\n")); - err (_(" * rename_select_priority [nb_rename_bloc] (Tpriority_t )\n")); - err (_(" * rename_select_load_balancing [nb_rename_bloc] (Tload_balancing_t)\n")); - err (_(" * rename_select_nb_front_end_select [nb_rename_bloc] (uint32_t )\n")); - err (_(" * nb_general_register [nb_rename_bloc] (uint32_t )\n")); - err (_(" * nb_special_register [nb_rename_bloc] (uint32_t )\n")); - err (_(" * nb_reg_free [nb_rename_bloc] (uint32_t )\n")); - err (_(" * nb_rename_unit_bank [nb_rename_bloc] (uint32_t )\n")); - err (_(" * size_read_counter [nb_rename_bloc] (uint32_t )\n")); - - err (_(" * nb_read_bloc (uint32_t )\n")); - err (_(" * size_read_queue [nb_read_bloc] (uint32_t )\n")); - err (_(" * size_reservation_station [nb_read_bloc] (uint32_t )\n")); - err (_(" * nb_inst_retire_reservation_station [nb_read_bloc] (uint32_t )\n")); - - err (_(" * nb_write_bloc (uint32_t )\n")); - err (_(" * size_write_queue [nb_write_bloc] (uint32_t )\n")); - err (_(" * size_execute_queue [nb_write_bloc] (uint32_t )\n")); - err (_(" * nb_bypass_write [nb_write_bloc] (uint32_t )\n")); - - err (_(" * nb_load_store_unit (uint32_t )\n")); - err (_(" * size_store_queue [nb_load_store_unit] (uint32_t )\n")); - err (_(" * size_load_queue [nb_load_store_unit] (uint32_t )\n")); - err (_(" * size_speculative_access_queue [nb_load_store_unit] (uint32_t )\n")); - err (_(" * nb_port_check [nb_load_store_unit] (uint32_t )\n")); - err (_(" * speculative_load [nb_load_store_unit] (Tspeculative_load)\n")); - err (_(" * nb_bypass_memory [nb_load_store_unit] (uint32_t )\n")); - err (_(" * nb_cache_port [nb_load_store_unit] (uint32_t )\n")); - err (_(" * nb_inst_memory [nb_load_store_unit] (uint32_t )\n")); - - err (_(" * nb_functionnal_unit (uint32_t )\n")); - err (_(" * nb_inst_functionnal_unit [nb_functionnal_unit] (uint32_t )\n")); -//err (_(" * timing [nb_functionnal_unit][nb_type][nb_operation] (execute_timing_t )\n")); - - err (_(" * nb_icache_port (uint32_t )\n")); - err (_(" * icache_port_priority (Tpriority_t )\n")); - err (_(" * icache_port_load_balancing (Tload_balancing_t)\n")); - - err (_(" * nb_dcache_port (uint32_t )\n")); - err (_(" * dcache_port_priority (Tpriority_t )\n")); - err (_(" * dcache_port_load_balancing (Tload_balancing_t)\n")); - - err (_(" * nb_front_end (uint32_t )\n")); - err (_(" * nb_context [nb_front_end] (uint32_t )\n")); - err (_(" * nb_decod_unit [nb_front_end] (uint32_t )\n")); - err (_(" * nb_inst_branch_predict [nb_front_end] (uint32_t )\n")); - err (_(" * nb_inst_branch_decod [nb_front_end] (uint32_t )\n")); - err (_(" * nb_inst_branch_update [nb_front_end] (uint32_t )\n")); - err (_(" * btb_size_queue [nb_front_end] (uint32_t )\n")); - err (_(" * btb_associativity [nb_front_end] (uint32_t )\n")); - err (_(" * btb_size_counter [nb_front_end] (uint32_t )\n")); - err (_(" * btb_victim_scheme [nb_front_end] (Tvictim_t )\n")); - err (_(" * dir_predictor_scheme [nb_front_end] (Tpredictor_t )\n")); - err (_(" * dir_have_bht [nb_front_end][3] (bool )\n")); - err (_(" * dir_bht_size_shifter [nb_front_end][3] (uint32_t )\n")); - err (_(" * dir_bht_nb_shifter [nb_front_end][3] (uint32_t )\n")); - err (_(" * dir_have_pht [nb_front_end][3] (bool )\n")); - err (_(" * dir_pht_size_counter [nb_front_end][3] (uint32_t )\n")); - err (_(" * dir_pht_nb_counter [nb_front_end][3] (uint32_t )\n")); - err (_(" * dir_pht_size_address_share [nb_front_end][3] (uint32_t )\n")); - - err (_(" * nb_ooo_engine (uint32_t )\n")); - err (_(" * nb_rename_unit [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_inst_issue [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_inst_reexecute [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_inst_commit [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_inst_branch_complete [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_rename_unit_select [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_execute_loop_select [nb_ooo_engine] (uint32_t )\n")); - err (_(" * size_re_order_buffer [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_re_order_buffer_bank [nb_ooo_engine] (uint32_t )\n")); - err (_(" * commit_priority [nb_ooo_engine] (Tpriority_t )\n")); - err (_(" * commit_load_balancing [nb_ooo_engine] (Tload_balancing_t)\n")); - err (_(" * size_issue_queue [nb_ooo_engine] (uint32_t )\n")); - err (_(" * nb_issue_queue_bank [nb_ooo_engine] (uint32_t )\n")); - err (_(" * issue_priority [nb_ooo_engine] (Tpriority_t )\n")); - err (_(" * issue_load_balancing [nb_ooo_engine] (Tload_balancing_t)\n")); - err (_(" * size_reexecute_queue [nb_ooo_engine] (uint32_t )\n")); - err (_(" * reexecute_priority [nb_ooo_engine] (Tpriority_t )\n")); - err (_(" * reexecute_load_balancing [nb_ooo_engine] (Tload_balancing_t)\n")); - - err (_(" * nb_execute_loop (uint32_t )\n")); - err (_(" * nb_read_unit [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_execute_unit [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_write_unit [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_gpr_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_gpr_port_read_by_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_gpr_port_write_by_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_spr_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_spr_port_read_by_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * nb_spr_port_write_by_bank [nb_execute_loop] (uint32_t )\n")); - err (_(" * execution_unit_to_write_unit_priority [nb_execute_loop] (Tpriority_t )\n")); - err (_(" * read_unit_to_execution_unit_priority [nb_execute_loop] (Tpriority_t )\n")); - - err (_(" * link_context_with_thread [nb_thread] (pair_dual )\n")); - err (_(" * link_decod_unit_with_decod_bloc [nb_decod_bloc] (pair_dual )\n")); - err (_(" * link_rename_unit_with_rename_bloc [nb_rename_bloc] (pair_dual )\n")); - err (_(" * link_read_unit_with_read_bloc [nb_read_bloc] (pair_dual )\n")); - err (_(" * link_write_unit_with_write_bloc [nb_write_bloc] (pair_dual )\n")); - err (_(" * link_execute_unit_with_functionnal_unit [nb_functionnal_unit] (pair_dual )\n")); - err (_(" * link_execute_unit_with_load_store_unit [nb_load_store_unit] (pair_dual )\n")); - err (_(" * link_decod_bloc_with_thread [nb_thread] (uint32_t )\n")); - err (_(" * link_rename_bloc_with_front_end [nb_front_end] (uint32_t )\n")); - err (_(" * table_dispatch [nb_ooo_engine][nb_inst_issue][nb_read_bloc] (bool )\n")); - err (_(" * link_read_bloc_and_load_store_unit [nb_read_bloc][nb_load_store_unit] (bool )\n")); - err (_(" * link_read_bloc_and_functionnal_unit [nb_read_bloc][nb_functionnal_unit] (bool )\n")); - err (_(" * link_write_bloc_and_load_store_unit [nb_write_bloc][nb_load_store_unit] (bool )\n")); - err (_(" * link_write_bloc_and_functionnal_unit [nb_write_bloc][nb_functionnal_unit] (bool )\n")); - err (_(" * link_load_store_unit_with_thread [nb_thread] (uint32_t )\n")); - err (_(" * link_thread_and_functionnal_unit [nb_thread][nb_functionnal_unit] (bool )\n")); - err (_(" * link_icache_port_with_thread [nb_thread] (uint32_t )\n")); - err (_(" * link_dcache_port_with_load_store_unit [nb_load_store_unit][nb_cache_port] (uint32_t )\n")); - - err (_(" * dispatch_priority (Tpriority_t )\n")); - err (_(" * dispatch_load_balancing (Tload_balancing_t)\n")); + err (_(" * size_general_data (uint32_t )\n")); + err (_(" * size_special_data (uint32_t )\n")); +//morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), + + err (_(" * nb_thread (uint32_t )\n")); + err (_(" * size_ifetch_queue [nb_thread] (uint32_t )\n")); + err (_(" * nb_inst_fetch [nb_thread] (uint32_t )\n")); +//err (_(" * implement_group [nb_thread][NB_GROUP] (bool )\n")); + err (_(" * ras_size_queue [nb_thread] (uint32_t )\n")); + err (_(" * upt_size_queue [nb_thread] (uint32_t )\n")); + err (_(" * ufpt_size_queue [nb_thread] (uint32_t )\n")); + + err (_(" * nb_decod_bloc (uint32_t )\n")); + err (_(" * size_decod_queue [nb_decod_bloc] (uint32_t )\n")); + err (_(" * decod_queue_scheme [nb_decod_bloc] (Tdecod_queue_scheme_t)\n")); + err (_(" * nb_inst_decod [nb_decod_bloc] (uint32_t )\n")); + err (_(" * nb_context_select [nb_decod_bloc] (uint32_t )\n")); + err (_(" * context_select_priority [nb_decod_bloc] (Tpriority_t )\n")); + err (_(" * context_select_load_balancing [nb_decod_bloc] (Tload_balancing_t )\n")); + + err (_(" * nb_rename_bloc (uint32_t )\n")); + err (_(" * nb_inst_insert [nb_rename_bloc] (uint32_t )\n")); + err (_(" * nb_inst_retire [nb_rename_bloc] (uint32_t )\n")); + err (_(" * rename_select_priority [nb_rename_bloc] (Tpriority_t )\n")); + err (_(" * rename_select_load_balancing [nb_rename_bloc] (Tload_balancing_t )\n")); + err (_(" * rename_select_nb_front_end_select [nb_rename_bloc] (uint32_t )\n")); + err (_(" * nb_general_register [nb_rename_bloc] (uint32_t )\n")); + err (_(" * nb_special_register [nb_rename_bloc] (uint32_t )\n")); + err (_(" * nb_reg_free [nb_rename_bloc] (uint32_t )\n")); + err (_(" * nb_rename_unit_bank [nb_rename_bloc] (uint32_t )\n")); + err (_(" * size_read_counter [nb_rename_bloc] (uint32_t )\n")); + + err (_(" * nb_read_bloc (uint32_t )\n")); + err (_(" * size_read_queue [nb_read_bloc] (uint32_t )\n")); + err (_(" * size_reservation_station [nb_read_bloc] (uint32_t )\n")); + err (_(" * nb_inst_retire_reservation_station [nb_read_bloc] (uint32_t )\n")); + + err (_(" * nb_write_bloc (uint32_t )\n")); + err (_(" * size_write_queue [nb_write_bloc] (uint32_t )\n")); + err (_(" * size_execute_queue [nb_write_bloc] (uint32_t )\n")); + err (_(" * nb_bypass_write [nb_write_bloc] (uint32_t )\n")); + + err (_(" * nb_load_store_unit (uint32_t )\n")); + err (_(" * size_store_queue [nb_load_store_unit] (uint32_t )\n")); + err (_(" * size_load_queue [nb_load_store_unit] (uint32_t )\n")); + err (_(" * size_speculative_access_queue [nb_load_store_unit] (uint32_t )\n")); + err (_(" * nb_port_check [nb_load_store_unit] (uint32_t )\n")); + err (_(" * speculative_load [nb_load_store_unit] (Tspeculative_load )\n")); + err (_(" * nb_bypass_memory [nb_load_store_unit] (uint32_t )\n")); + err (_(" * nb_cache_port [nb_load_store_unit] (uint32_t )\n")); + err (_(" * nb_inst_memory [nb_load_store_unit] (uint32_t )\n")); + + err (_(" * nb_functionnal_unit (uint32_t )\n")); + err (_(" * nb_inst_functionnal_unit [nb_functionnal_unit] (uint32_t )\n")); +//err (_(" * timing [nb_functionnal_unit][nb_type][nb_operation] (execute_timing_t )\n")); + + err (_(" * nb_icache_port (uint32_t )\n")); + err (_(" * icache_port_priority (Tpriority_t )\n")); + err (_(" * icache_port_load_balancing (Tload_balancing_t )\n")); + + err (_(" * nb_dcache_port (uint32_t )\n")); + err (_(" * dcache_port_priority (Tpriority_t )\n")); + err (_(" * dcache_port_load_balancing (Tload_balancing_t )\n")); + + err (_(" * nb_front_end (uint32_t )\n")); + err (_(" * nb_context [nb_front_end] (uint32_t )\n")); + err (_(" * nb_decod_unit [nb_front_end] (uint32_t )\n")); + err (_(" * nb_inst_branch_predict [nb_front_end] (uint32_t )\n")); + err (_(" * nb_inst_branch_decod [nb_front_end] (uint32_t )\n")); + err (_(" * nb_inst_branch_update [nb_front_end] (uint32_t )\n")); + err (_(" * btb_size_queue [nb_front_end] (uint32_t )\n")); + err (_(" * btb_associativity [nb_front_end] (uint32_t )\n")); + err (_(" * btb_size_counter [nb_front_end] (uint32_t )\n")); + err (_(" * btb_victim_scheme [nb_front_end] (Tvictim_t )\n")); + err (_(" * dir_predictor_scheme [nb_front_end] (Tpredictor_t )\n")); + err (_(" * dir_have_bht [nb_front_end][3] (bool )\n")); + err (_(" * dir_bht_size_shifter [nb_front_end][3] (uint32_t )\n")); + err (_(" * dir_bht_nb_shifter [nb_front_end][3] (uint32_t )\n")); + err (_(" * dir_have_pht [nb_front_end][3] (bool )\n")); + err (_(" * dir_pht_size_counter [nb_front_end][3] (uint32_t )\n")); + err (_(" * dir_pht_nb_counter [nb_front_end][3] (uint32_t )\n")); + err (_(" * dir_pht_size_address_share [nb_front_end][3] (uint32_t )\n")); + + err (_(" * nb_ooo_engine (uint32_t )\n")); + err (_(" * nb_rename_unit [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_issue [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_reexecute [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_commit [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_inst_branch_complete [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_rename_unit_select [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_execute_loop_select [nb_ooo_engine] (uint32_t )\n")); + err (_(" * size_re_order_buffer [nb_ooo_engine] (uint32_t )\n")); + err (_(" * nb_re_order_buffer_bank [nb_ooo_engine] (uint32_t )\n")); + err (_(" * commit_priority [nb_ooo_engine] (Tpriority_t )\n")); + err (_(" * commit_load_balancing [nb_ooo_engine] (Tload_balancing_t )\n")); + err (_(" * size_issue_queue [nb_ooo_engine] (uint32_t )\n")); + err (_(" * issue_queue_scheme [nb_ooo_engine] (Tissue_queue_scheme_t)\n")); + err (_(" * nb_issue_queue_bank [nb_ooo_engine] (uint32_t )\n")); + err (_(" * issue_priority [nb_ooo_engine] (Tpriority_t )\n")); + err (_(" * issue_load_balancing [nb_ooo_engine] (Tload_balancing_t )\n")); + err (_(" * size_reexecute_queue [nb_ooo_engine] (uint32_t )\n")); + err (_(" * reexecute_priority [nb_ooo_engine] (Tpriority_t )\n")); + err (_(" * reexecute_load_balancing [nb_ooo_engine] (Tload_balancing_t )\n")); + + err (_(" * nb_execute_loop (uint32_t )\n")); + err (_(" * nb_read_unit [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_execute_unit [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_write_unit [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_gpr_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_gpr_port_read_by_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_gpr_port_write_by_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_spr_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_spr_port_read_by_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * nb_spr_port_write_by_bank [nb_execute_loop] (uint32_t )\n")); + err (_(" * execution_unit_to_write_unit_priority [nb_execute_loop] (Tpriority_t )\n")); + err (_(" * read_unit_to_execution_unit_priority [nb_execute_loop] (Tpriority_t )\n")); + + err (_(" * link_context_with_thread [nb_thread] (pair_dual )\n")); + err (_(" * link_decod_unit_with_decod_bloc [nb_decod_bloc] (pair_dual )\n")); + err (_(" * link_rename_unit_with_rename_bloc [nb_rename_bloc] (pair_dual )\n")); + err (_(" * link_read_unit_with_read_bloc [nb_read_bloc] (pair_dual )\n")); + err (_(" * link_write_unit_with_write_bloc [nb_write_bloc] (pair_dual )\n")); + err (_(" * link_execute_unit_with_functionnal_unit [nb_functionnal_unit] (pair_dual )\n")); + err (_(" * link_execute_unit_with_load_store_unit [nb_load_store_unit] (pair_dual )\n")); + err (_(" * link_decod_bloc_with_thread [nb_thread] (uint32_t )\n")); + err (_(" * link_rename_bloc_with_front_end [nb_front_end] (uint32_t )\n")); + err (_(" * table_dispatch [nb_ooo_engine][nb_inst_issue][nb_read_bloc] (bool )\n")); + err (_(" * link_read_bloc_and_load_store_unit [nb_read_bloc][nb_load_store_unit] (bool )\n")); + err (_(" * link_read_bloc_and_functionnal_unit [nb_read_bloc][nb_functionnal_unit] (bool )\n")); + err (_(" * link_write_bloc_and_load_store_unit [nb_write_bloc][nb_load_store_unit] (bool )\n")); + err (_(" * link_write_bloc_and_functionnal_unit [nb_write_bloc][nb_functionnal_unit] (bool )\n")); + err (_(" * link_load_store_unit_with_thread [nb_thread] (uint32_t )\n")); + err (_(" * link_thread_and_functionnal_unit [nb_thread][nb_functionnal_unit] (bool )\n")); + err (_(" * link_icache_port_with_thread [nb_thread] (uint32_t )\n")); + err (_(" * link_dcache_port_with_load_store_unit [nb_load_store_unit][nb_cache_port] (uint32_t )\n")); + + err (_(" * dispatch_priority (Tpriority_t )\n")); + err (_(" * dispatch_load_balancing (Tload_balancing_t )\n")); err (_("\n")); err (_(" - pair_dual : first = x div 1000, second = x mod 1000\n")); @@ -189,4 +191,6 @@ uint32_t _nb_decod_bloc ;// uint32_t * _size_decod_queue ;//[nb_decod_bloc] + multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + * _decod_queue_scheme ;//[nb_decod_bloc] uint32_t * _nb_inst_decod ;//[nb_decod_bloc] uint32_t * _nb_context_select ;//[nb_decod_bloc] @@ -281,4 +285,6 @@ Tload_balancing_t * _commit_load_balancing ;//[nb_ooo_engine] uint32_t * _size_issue_queue ;//[nb_ooo_engine] + multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + * _issue_queue_scheme ;//[nb_ooo_engine] uint32_t * _nb_issue_queue_bank ;//[nb_ooo_engine] Tpriority_t * _issue_priority ;//[nb_ooo_engine] @@ -354,8 +360,9 @@ SELFTEST0(_nb_decod_bloc ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc)) usage (argc, argv); SELFTEST1(_size_decod_queue ,uint32_t ,argv,x,_nb_decod_bloc); + SELFTEST1(_decod_queue_scheme ,multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t,argv,x,_nb_decod_bloc); SELFTEST1(_nb_inst_decod ,uint32_t ,argv,x,_nb_decod_bloc); SELFTEST1(_nb_context_select ,uint32_t ,argv,x,_nb_decod_bloc); @@ -367,5 +374,5 @@ SELFTEST0(_nb_rename_bloc ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc)) usage (argc, argv); @@ -385,5 +392,5 @@ SELFTEST0(_nb_read_bloc ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc)) usage (argc, argv); @@ -396,5 +403,5 @@ SELFTEST0(_nb_write_bloc ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc)) usage (argc, argv); @@ -407,5 +414,5 @@ SELFTEST0(_nb_load_store_unit ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit)) usage (argc, argv); @@ -424,5 +431,5 @@ SELFTEST0(_nb_functionnal_unit ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit)) usage (argc, argv); @@ -467,5 +474,5 @@ SELFTEST0(_nb_front_end ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end)) usage (argc, argv); @@ -494,5 +501,5 @@ SELFTEST0(_nb_ooo_engine ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+18*_nb_ooo_engine)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine)) usage (argc, argv); @@ -509,4 +516,5 @@ SELFTEST1(_commit_load_balancing ,Tload_balancing_t ,argv,x,_nb_ooo_engine); SELFTEST1(_size_issue_queue ,uint32_t ,argv,x,_nb_ooo_engine); + SELFTEST1(_issue_queue_scheme ,multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t,argv,x,_nb_ooo_engine); SELFTEST1(_nb_issue_queue_bank ,uint32_t ,argv,x,_nb_ooo_engine); SELFTEST1(_issue_priority ,Tpriority_t ,argv,x,_nb_ooo_engine); @@ -521,5 +529,5 @@ SELFTEST0(_nb_execute_loop ,uint32_t ,argv,x); - if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+5*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+18*_nb_ooo_engine+11*_nb_execute_loop)) + if (argc < static_cast(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop)) usage (argc, argv); @@ -539,5 +547,5 @@ printf(" * Link\n"); - if (argc < static_cast(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+11*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+18*_nb_ooo_engine+11*_nb_execute_loop)) + if (argc < static_cast(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+11*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop)) usage (argc, argv); @@ -593,5 +601,5 @@ _sum_cache_port += _nb_cache_port[i]; - if (argc != static_cast(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+11*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+18*_nb_ooo_engine+11*_nb_execute_loop+ + if (argc != static_cast(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+11*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop+ 3*_nb_thread+_nb_front_end+_sum_inst_issue*_nb_read_bloc+_nb_load_store_unit*(_nb_read_bloc+_nb_write_bloc+_nb_thread)+_nb_functionnal_unit*(_nb_read_bloc+_nb_write_bloc)+_sum_cache_port)) usage (argc, argv); @@ -633,4 +641,5 @@ _nb_decod_bloc , _size_decod_queue , + _decod_queue_scheme , _nb_inst_decod , _nb_context_select , @@ -714,4 +723,5 @@ _commit_load_balancing , _size_issue_queue , + _issue_queue_scheme , _nb_issue_queue_bank , _issue_priority , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 111) @@ -51,4 +51,6 @@ public : uint32_t _nb_decod_bloc ;// public : uint32_t * _size_decod_queue ;//[nb_decod_bloc] + public : multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + * _decod_queue_scheme ;//[nb_decod_bloc] public : uint32_t * _nb_inst_decod ;//[nb_decod_bloc] public : uint32_t * _nb_context_select ;//[nb_decod_bloc] @@ -143,4 +145,6 @@ public : Tload_balancing_t * _commit_load_balancing ;//[nb_ooo_engine] public : uint32_t * _size_issue_queue ;//[nb_ooo_engine] + public : multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + * _issue_queue_scheme ;//[nb_ooo_engine] public : uint32_t * _nb_issue_queue_bank ;//[nb_ooo_engine] public : Tpriority_t * _issue_priority ;//[nb_ooo_engine] @@ -215,4 +219,7 @@ public : uint32_t * _front_end_nb_inst_branch_complete ;//[nb_front_end] public : uint32_t ** _front_end_size_decod_queue ;//[nb_front_end][nb_decod_unit] + public : multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + ** _front_end_decod_queue_scheme ;//[nb_front_end][nb_decod_unit] + public : uint32_t ** _front_end_nb_inst_decod ;//[nb_front_end][nb_decod_unit] public : uint32_t * _front_end_sum_inst_decod ;//[nb_front_end] @@ -223,4 +230,5 @@ public : uint32_t ** _front_end_upt_size_queue ;//[nb_front_end][nb_context] public : uint32_t ** _front_end_ufpt_size_queue ;//[nb_front_end][nb_context] +//public : uint32_t ** _front_end_translate_num_context_to_num_thread ;//[nb_front_end][nb_context] // translate for ooo_engine @@ -355,4 +363,6 @@ uint32_t nb_decod_bloc , uint32_t * size_decod_queue ,//[nb_decod_bloc] + multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + * decod_queue_scheme ,//[nb_decod_bloc] uint32_t * nb_inst_decod ,//[nb_decod_bloc] uint32_t * nb_context_select ,//[nb_decod_bloc] @@ -447,4 +457,6 @@ Tload_balancing_t * commit_load_balancing ,//[nb_ooo_engine] uint32_t * size_issue_queue ,//[nb_ooo_engine] + multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + * issue_queue_scheme ,//[nb_ooo_engine] uint32_t * nb_issue_queue_bank ,//[nb_ooo_engine] Tpriority_t * issue_priority ,//[nb_ooo_engine] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 111) @@ -89,4 +89,6 @@ uint32_t nb_decod_bloc , uint32_t * size_decod_queue ,//[nb_decod_bloc] + multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + * decod_queue_scheme ,//[nb_decod_bloc] uint32_t * nb_inst_decod ,//[nb_decod_bloc] uint32_t * nb_context_select ,//[nb_decod_bloc] @@ -181,4 +183,6 @@ Tload_balancing_t * commit_load_balancing ,//[nb_ooo_engine] uint32_t * size_issue_queue ,//[nb_ooo_engine] + multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t + * issue_queue_scheme ,//[nb_ooo_engine] uint32_t * nb_issue_queue_bank ,//[nb_ooo_engine] Tpriority_t * issue_priority ,//[nb_ooo_engine] @@ -242,4 +246,5 @@ _nb_decod_bloc = nb_decod_bloc ; _size_decod_queue = size_decod_queue ; + _decod_queue_scheme = decod_queue_scheme ; _nb_inst_decod = nb_inst_decod ; _nb_context_select = nb_context_select ; @@ -323,4 +328,5 @@ _commit_load_balancing = commit_load_balancing ; _size_issue_queue = size_issue_queue ; + _issue_queue_scheme = issue_queue_scheme ; _nb_issue_queue_bank = nb_issue_queue_bank ; _issue_priority = issue_priority ; @@ -786,4 +792,6 @@ ALLOC1(_front_end_nb_inst_branch_complete ,uint32_t ,_nb_front_end); ALLOC2(_front_end_size_decod_queue ,uint32_t ,_nb_front_end,_nb_decod_unit[it1]); + ALLOC2(_front_end_decod_queue_scheme ,multi_front_end::front_end::decod_unit::decod_queue::Tdecod_queue_scheme_t + ,_nb_front_end,_nb_decod_unit[it1]); ALLOC2(_front_end_nb_inst_decod ,uint32_t ,_nb_front_end,_nb_decod_unit[it1]); ALLOC1(_front_end_sum_inst_decod ,uint32_t ,_nb_front_end); @@ -804,4 +812,5 @@ _front_end_size_decod_queue [i][j] = _size_decod_queue [num_decod_bloc]; + _front_end_decod_queue_scheme [i][j] = _decod_queue_scheme [num_decod_bloc]; _front_end_nb_inst_decod [i][j] = _nb_inst_decod [num_decod_bloc]; _front_end_sum_inst_decod [i] += _nb_inst_decod [num_decod_bloc]; @@ -1835,4 +1844,5 @@ _front_end_link_decod_unit_with_context [i], _front_end_size_decod_queue [i], + _front_end_decod_queue_scheme [i], _front_end_nb_inst_decod [i], _front_end_nb_context_select [i], @@ -1858,5 +1868,7 @@ _front_end_upt_size_queue [i], _front_end_ufpt_size_queue [i], - _size_nb_inst_commit + _size_nb_inst_commit , + _nb_thread , + _link_thread_with_context [i] ); @@ -1890,4 +1902,5 @@ _commit_load_balancing [i], _size_issue_queue [i], + _issue_queue_scheme [i], _nb_issue_queue_bank [i], _issue_priority [i], @@ -2153,4 +2166,5 @@ DELETE1(_front_end_sum_inst_decod ,_nb_front_end); DELETE2(_front_end_nb_inst_decod ,_nb_front_end,_nb_decod_unit[it1]); + DELETE2(_front_end_decod_queue_scheme ,_nb_front_end,_nb_decod_unit[it1]); DELETE2(_front_end_size_decod_queue ,_nb_front_end,_nb_decod_unit[it1]); DELETE1(_front_end_nb_inst_branch_complete ,_nb_front_end); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 111) @@ -59,4 +59,6 @@ str+= toString(MSG_INFORMATION)+" * size_decod_queue : "+toString(_size_decod_queue [i])+"\n"; + str+= toString(MSG_INFORMATION)+" * decod_queue_scheme : "+toString + (_decod_queue_scheme [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_inst_decod : "+toString(_nb_inst_decod [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_context_select : "+toString(_nb_context_select [i])+"\n"; @@ -182,4 +184,6 @@ str+= toString(MSG_INFORMATION)+" * commit_load_balancing : "+toString(_commit_load_balancing [i])+"\n"; str+= toString(MSG_INFORMATION)+" * size_issue_queue : "+toString(_size_issue_queue [i])+"\n"; + str+= toString(MSG_INFORMATION)+" * issue_queue_scheme : "+toString + (_issue_queue_scheme [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_issue_queue_bank : "+toString(_nb_issue_queue_bank [i])+"\n"; str+= toString(MSG_INFORMATION)+" * issue_priority : "+toString(_issue_priority [i])+"\n"; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp (revision 111) @@ -87,4 +87,5 @@ #if defined(DEBUG_RegisterFile_Monolithic) and DEBUG_RegisterFile_Monolithic and (DEBUG >= DEBUG_TRACE) + if (0) { log_printf(TRACE,RegisterFile,FUNCTION," * Dump RegisterFile"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 111) @@ -38,4 +38,5 @@ #if defined(DEBUG_RegisterFile_Multi_Banked) and DEBUG_RegisterFile_Multi_Banked and (DEBUG >= DEBUG_TRACE) + if (0) { log_printf(TRACE,RegisterFile,FUNCTION," * Dump RegisterFile"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 111) @@ -14,5 +14,4 @@ // =====[ ALLOCATION / DELETE of ARRAY ]================================= // ====================================================================== - #define ALLOC1(var,type,s1) \ var = new type [s1] @@ -50,4 +49,7 @@ } \ } + +#define DELETE0(var) \ + delete var; #define DELETE1(var,s1) \ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 111) @@ -44,5 +44,5 @@ // ~~~~~ prediction_unit - typedef uint8_t Thistory_t; + typedef uint32_t Thistory_t; typedef Tptr_t Tprediction_ptr_t; typedef uint8_t Tbranch_state_t; @@ -165,8 +165,8 @@ template<> inline morpheo::behavioural::Tpriority_t fromString(const std::string& x) { - if ( (x.compare("0") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PRIORITY_STATIC))) == 0) or (x.compare("priority_static") == 0)) return morpheo::behavioural::PRIORITY_STATIC; - if ( (x.compare("1") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PRIORITY_ROUND_ROBIN))) == 0) or (x.compare("priority_round_robin") == 0)) return morpheo::behavioural::PRIORITY_ROUND_ROBIN; @@ -186,8 +186,8 @@ template<> inline morpheo::behavioural::Tload_balancing_t fromString(const std::string& x) { - if ( (x.compare("0") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::LOAD_BALANCING_BALANCE))) == 0) or (x.compare("load_balancing_balance") == 0)) return morpheo::behavioural::LOAD_BALANCING_BALANCE; - if ( (x.compare("1") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY))) == 0) or (x.compare("load_balancing_maximum_for_priority") == 0)) return morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY; @@ -211,20 +211,20 @@ template<> inline morpheo::behavioural::Tvictim_t fromString(const std::string& x) { - if ( (x.compare("0") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_RANDOM ))) == 0) or (x.compare("victim_random") == 0)) return morpheo::behavioural::VICTIM_RANDOM; - if ( (x.compare("1") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_ROUND_ROBIN))) == 0) or (x.compare("victim_round_robin") == 0)) return morpheo::behavioural::VICTIM_ROUND_ROBIN; - if ( (x.compare("2") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_NLU ))) == 0) or (x.compare("victim_nlu") == 0)) return morpheo::behavioural::VICTIM_NLU; - if ( (x.compare("3") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_PSEUDO_LRU ))) == 0) or (x.compare("victim_pseudo_lru") == 0)) return morpheo::behavioural::VICTIM_PSEUDO_LRU; - if ( (x.compare("4") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_LRU ))) == 0) or (x.compare("victim_lru") == 0)) return morpheo::behavioural::VICTIM_LRU; - if ( (x.compare("5") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::VICTIM_FIFO ))) == 0) or (x.compare("victim_fifo") == 0)) return morpheo::behavioural::VICTIM_FIFO; @@ -251,29 +251,29 @@ template<> inline morpheo::behavioural::Tpredictor_t fromString(const std::string& x) { - if ( (x.compare("0") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_NEVER_TAKE ))) == 0) or (x.compare("predictor_never_take") == 0)) return morpheo::behavioural::PREDICTOR_NEVER_TAKE; - if ( (x.compare("1") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_ALWAYS_TAKE))) == 0) or (x.compare("predictor_always_take") == 0)) return morpheo::behavioural::PREDICTOR_ALWAYS_TAKE; - if ( (x.compare("2") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_STATIC ))) == 0) or (x.compare("predictor_static") == 0)) return morpheo::behavioural::PREDICTOR_STATIC; - if ( (x.compare("3") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_LAST_TAKE ))) == 0) or (x.compare("predictor_last_take") == 0)) return morpheo::behavioural::PREDICTOR_LAST_TAKE; - if ( (x.compare("4") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_COUNTER ))) == 0) or (x.compare("predictor_counter") == 0)) return morpheo::behavioural::PREDICTOR_COUNTER; - if ( (x.compare("5") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_LOCAL ))) == 0) or (x.compare("predictor_local") == 0)) return morpheo::behavioural::PREDICTOR_LOCAL; - if ( (x.compare("6") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_GLOBAL ))) == 0) or (x.compare("predictor_global") == 0)) return morpheo::behavioural::PREDICTOR_GLOBAL; - if ( (x.compare("7") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_META ))) == 0) or (x.compare("predictor_meta") == 0)) return morpheo::behavioural::PREDICTOR_META; - if ( (x.compare("8") == 0) or + if ( (x.compare(toString(static_cast(morpheo::behavioural::PREDICTOR_CUSTOM ))) == 0) or (x.compare("predictor_custom") == 0)) return morpheo::behavioural::PREDICTOR_CUSTOM; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 111) @@ -10,8 +10,8 @@ #define MORPHEO_MAJOR_VERSION "0" #define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "110" +#define MORPHEO_REVISION "111" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "19" +#define MORPHEO_DATE_DAY "27" #define MORPHEO_DATE_MONTH "02" #define MORPHEO_DATE_YEAR "2009" Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg (revision 111) @@ -17,4 +17,5 @@ + @@ -87,14 +88,30 @@ - - - + + + - + + + + + + + + + + - - - + + + + + + + + + + @@ -114,4 +131,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 111) @@ -24,4 +24,5 @@ + @@ -75,11 +76,11 @@ - - - - - - - + + + + + + + @@ -97,4 +98,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 111) @@ -15,5 +15,5 @@ - + @@ -24,9 +24,9 @@ - - + + + - - + Index: trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp (revision 110) +++ trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp (revision 111) @@ -56,4 +56,5 @@ param->_nb_decod_bloc , param->_size_decod_queue , + param->_decod_queue_scheme , param->_nb_inst_decod , param->_nb_context_select , @@ -137,4 +138,5 @@ param->_commit_load_balancing , param->_size_issue_queue , + param->_issue_queue_scheme , param->_nb_issue_queue_bank , param->_issue_priority , Index: trunk/Makefile.tools =================================================================== --- trunk/Makefile.tools (revision 110) +++ trunk/Makefile.tools (revision 111) @@ -121,5 +121,5 @@ NEWLIB_INCDIR = -I$(NEWLIB)/include NEWLIB_LIBDIR = -L$(NEWLIB)/lib -NEWLIB_LIBNAME = -lc -lm +NEWLIB_LIBNAME = -lor32 -lc -lm -lor32 #-----[ qt ]----------------------------------------------- Index: trunk/Makefile.tools_path =================================================================== --- trunk/Makefile.tools_path (revision 110) +++ trunk/Makefile.tools_path (revision 111) @@ -32,5 +32,5 @@ MODELTECH_LICENCE = /users/soft/mentor/mgls_v8-5_0-5-0.ss5/etc/cust/mgc/license.anacad.2008 OR1K = /users/cao/kane/Softwares/or32-elf -NEWLIB = +NEWLIB = /users/cao/kane/Softwares/newlib/or32-elf QT = /dsk/l1/misc/kane/qt-x11-opensource-4.2.3 Index: trunk/Platforms/Test/data_test/Test_000_065.cfg =================================================================== --- trunk/Platforms/Test/data_test/Test_000_065.cfg (revision 111) +++ trunk/Platforms/Test/data_test/Test_000_065.cfg (revision 111) @@ -0,0 +1,8 @@ +../../IPs/systemC/processor/Morpheo/Files/Morpheo.sim +../../IPs/systemC/processor/Morpheo/Files/Morpheo.gen +../../IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg +../../Softwares/Test/Test_065/bin/soft.x +0 +0 +4096 +2 Index: trunk/Softwares/Common/src/sys/crt0.s =================================================================== --- trunk/Softwares/Common/src/sys/crt0.s (revision 110) +++ trunk/Softwares/Common/src/sys/crt0.s (revision 111) @@ -31,71 +31,4 @@ l.jal _quit l.ori r3,r3,0xdead - - /* - l.nop -0 - l.nop -1 - l.nop -2 - l.nop -3 - l.nop -4 - l.nop -5 - l.nop -6 - l.nop -7 - l.nop -8 - l.nop -9 - l.nop -10 - l.nop -11 - l.nop -12 - l.nop -13 - l.nop -14 - l.nop -15 - l.nop -16 - l.nop -17 - l.nop -18 - l.nop -19 - l.nop -20 - l.nop -21 - l.nop -22 - l.nop -23 - l.nop -24 - l.nop -25 - l.nop -26 - l.nop -27 - l.nop -28 - l.nop -29 - l.nop -30 - l.nop -31 - l.nop -32 - l.nop -33 - l.nop -34 - l.nop -35 - l.nop -36 - l.nop -37 - l.nop -38 - l.nop -39 - l.nop -40 - l.nop -41 - l.nop -42 - l.nop -43 - l.nop -44 - l.nop -45 - l.nop -46 - l.nop -47 - l.nop -48 - l.nop -49 - l.nop -50 - l.nop -51 - l.nop -52 - l.nop -53 - l.nop -54 - l.nop -55 - l.nop -56 - l.nop -57 - l.nop -58 - l.nop -59 - l.nop -60 - l.nop -61 - l.nop -62 - l.nop -63 - */ /* ---[ 0x100: RESET exception ]----------------------------------------- */ Index: trunk/Softwares/Makefile.Software =================================================================== --- trunk/Softwares/Makefile.Software (revision 110) +++ trunk/Softwares/Makefile.Software (revision 111) @@ -31,5 +31,5 @@ #-----[ To the compilation ]------------------------------------------------------ -OPTIMIZE = -O3 -std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float +OPTIMIZE = -O2 -std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float #Option : # -fomit-frame-pointer : n'utilise pas le pointeur de frame @@ -54,5 +54,5 @@ # Tools's option -OR32_CC_OPT = $(INCDIR) $(OPTIMIZE) -Wlong-long +OR32_CC_OPT = -Wall $(INCDIR) $(OPTIMIZE) -Wlong-long # -DHAVE_LIBC OR32_AS_OPT = Index: trunk/Softwares/Test/Test_025/src/sys/crt0.s =================================================================== --- trunk/Softwares/Test/Test_025/src/sys/crt0.s (revision 110) +++ trunk/Softwares/Test/Test_025/src/sys/crt0.s (revision 111) @@ -37,5 +37,5 @@ _start: l.and r1, r0, r0 /* counter 1 */ - l.ori r2, r0, 10 /* limit */ + l.ori r2, r0, 100 /* limit */ l.and r11, r0, r0 Index: trunk/Softwares/Test/Test_065/Makefile =================================================================== --- trunk/Softwares/Test/Test_065/Makefile (revision 111) +++ trunk/Softwares/Test/Test_065/Makefile (revision 111) @@ -0,0 +1,31 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + + +# common definition +DIR_SOFT = ../.. + +DIR_SRC = ./src +DIR_C = $(DIR_SRC)/c +DIR_ASM = $(DIR_SRC)/asm +DIR_SYS = $(DIR_SRC)/sys +DIR_INC = $(DIR_SRC)/include +DIR_LDSCRIPT = $(NEWLIB)/lib/ + +INCDIR = $(NEWLIB_INCDIR) -I$(DIR_INC) +LIBDIR = $(NEWLIB_LIBDIR) +LIBNAME = $(NEWLIB_LIBNAME) + +#-----[ Files ]------------------------------------------------------------------- +OBJECTS = $(NEWLIB)/lib/*.o \ + $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s)) \ + $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s)) \ + $(patsubst $(DIR_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_C)/*.c)) + +include $(DIR_SOFT)/Makefile.Software + Index: trunk/Softwares/Test/Test_065/src/c/main.c =================================================================== --- trunk/Softwares/Test/Test_065/src/c/main.c (revision 111) +++ trunk/Softwares/Test/Test_065/src/c/main.c (revision 111) @@ -0,0 +1,16 @@ +// $Id$ + +//=====[ main ]================================================================= +/* + * All thread execute this routine + * Initialize the thread and attribute a Workload at each thread + */ + +#include + +int main() +{ + exit (0); + + while (1); +} Index: trunk/Softwares/Test/Test_066/Makefile =================================================================== --- trunk/Softwares/Test/Test_066/Makefile (revision 111) +++ trunk/Softwares/Test/Test_066/Makefile (revision 111) @@ -0,0 +1,31 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + + +# common definition +DIR_SOFT = ../.. + +DIR_SRC = ./src +DIR_C = $(DIR_SRC)/c +DIR_ASM = $(DIR_SRC)/asm +DIR_SYS = $(DIR_SRC)/sys +DIR_INC = $(DIR_SRC)/include +DIR_LDSCRIPT = $(NEWLIB)/lib/ + +INCDIR = $(NEWLIB_INCDIR) -I$(DIR_INC) +LIBDIR = $(NEWLIB_LIBDIR) +LIBNAME = $(NEWLIB_LIBNAME) + +#-----[ Files ]------------------------------------------------------------------- +OBJECTS = $(NEWLIB)/lib/*.o \ + $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s)) \ + $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s)) \ + $(patsubst $(DIR_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_C)/*.c)) + +include $(DIR_SOFT)/Makefile.Software + Index: trunk/Softwares/Test/Test_066/src/c/main.c =================================================================== --- trunk/Softwares/Test/Test_066/src/c/main.c (revision 111) +++ trunk/Softwares/Test/Test_066/src/c/main.c (revision 111) @@ -0,0 +1,26 @@ +// $Id$ + +//=====[ main ]================================================================= +/* + * All thread execute this routine + * Initialize the thread and attribute a Workload at each thread + */ + +#include +#include +#include +#include + +int main() +{ +//fprintf(stdout,"Message de Bienvenue !!!\n"); + + printf("Hello World !!!\n"); + + for (int i=0; i<10; ++i) + printf("i : %d",i); + + exit (0); + + while (1); +} Index: trunk/environment.sh =================================================================== --- trunk/environment.sh (revision 110) +++ trunk/environment.sh (revision 111) @@ -28,5 +28,6 @@ export MORPHEO_SCRIPT=${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Script export MORPHEO_HOME=${HOME}/.Morpheo -export MORPHEO_TMP=/tmp/Morpheo +#export MORPHEO_TMP=/tmp/Morpheo +export MORPHEO_TMP=/dsk/l1/misc/Morpheo MORPHEO_XTTY=${MORPHEO_TOPLEVEL}/IPs/systemC/Environment/TTY/xtty