Ignore:
Timestamp:
Mar 18, 2009, 11:36:26 PM (15 years ago)
Author:
rosiere
Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp

    r101 r112  
    1616namespace ifetch_unit {
    1717namespace address_management {
    18 
    19 
    2018
    2119#undef  FUNCTION
    … …  
    5856    // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5957    {
    60       ALLOC_INTERFACE("address", OUT, SOUTH, "Access at request icache.");
     58      ALLOC0_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."));
    6159
    62       ALLOC_VALACK_OUT (out_ADDRESS_VAL                        ,VAL);
    63       ALLOC_VALACK_IN  ( in_ADDRESS_ACK                        ,ACK);
    64       ALLOC_SIGNAL_OUT (out_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t,_param->_size_instruction_address     );
    65       ALLOC_SIGNAL_OUT (out_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr         );
    66       ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state            );
    67       ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     60      ALLOC0_VALACK_OUT (out_ADDRESS_VAL                        ,VAL);
     61      ALLOC0_VALACK_IN  ( in_ADDRESS_ACK                        ,ACK);
     62      ALLOC0_SIGNAL_OUT (out_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t,_param->_size_instruction_address     );
     63      ALLOC0_SIGNAL_OUT (out_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr         );
     64      ALLOC0_SIGNAL_OUT (out_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state            );
     65      ALLOC0_SIGNAL_OUT (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     66
     67      ALLOC0_INTERFACE_END();
    6868    }
    6969
    7070    {
    71       ALLOC1_INTERFACE("address", OUT, SOUTH, "Access at request icache.",_param->_nb_instruction);
     71      ALLOC1_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."),_param->_nb_instruction);
    7272
    7373      ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
     74
     75      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    7476    }
    7577
    7678    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    7779    {
    78       ALLOC_INTERFACE("predict", IN, NORTH, "Request the prediction unit.");
     80      ALLOC0_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."));
    7981
    80       ALLOC_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
    81       ALLOC_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
    82       ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
    83       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
    84       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
    85       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
    86       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
    87 //    ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_IS_CURRENT          ,"branch_is_current"          ,Tcontrol_t        ,1);
    88       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
    89       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
    90       ALLOC_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     82      ALLOC0_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
     83      ALLOC0_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
     84      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
     85      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
     86      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
     87      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
     88      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
     89//    ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_IS_CURRENT          ,"branch_is_current"          ,Tcontrol_t        ,1);
     90      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
     91      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     92      ALLOC0_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     93
     94      ALLOC0_INTERFACE_END();
    9195    }
    9296    {
    93       ALLOC1_INTERFACE("predict", IN, NORTH, "Request the prediction unit.",_param->_nb_instruction);
     97      ALLOC1_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."),_param->_nb_instruction);
    9498
    9599      ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE          ,"instruction_enable"         ,Tcontrol_t        ,1);
     100
     101      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    96102    }
    97103
    98104    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    99105    {
    100       ALLOC_INTERFACE("event", IN, SOUTH, "Event (miss, exception ...)");
     106      ALLOC0_INTERFACE_BEGIN("event", IN, SOUTH, _("Event (miss, exception ...)"));
    101107
    102       ALLOC_VALACK_IN ( in_EVENT_VAL          ,VAL);
    103       ALLOC_VALACK_OUT(out_EVENT_ACK          ,ACK);
    104       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS         ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
    105       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT    ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
    106       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"address_next_val",Tcontrol_t,1);
    107       ALLOC_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"is_ds_take"      ,Tcontrol_t,1);
     108      ALLOC0_VALACK_IN ( in_EVENT_VAL          ,VAL);
     109      ALLOC0_VALACK_OUT(out_EVENT_ACK          ,ACK);
     110      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS         ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
     111      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT    ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
     112      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"address_next_val",Tcontrol_t,1);
     113      ALLOC0_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"is_ds_take"      ,Tcontrol_t,1);
     114
     115      ALLOC0_INTERFACE_END();
    108116    }
    109117

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp

    r101 r112  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h"
     9#include "Behavioural/include/Allocation.h"
    910
    1011namespace morpheo                    {
    … …  
    2728        delete    in_CLOCK ;
    2829        delete    in_NRESET;
    29 
    30         delete    out_ADDRESS_VAL                        ;
    31         delete     in_ADDRESS_ACK                        ;
    32         delete    out_ADDRESS_INSTRUCTION_ADDRESS        ;
    33         delete [] out_ADDRESS_INSTRUCTION_ENABLE         ;
    34         if (_param->_have_port_inst_ifetch_ptr)
    35         delete    out_ADDRESS_INST_IFETCH_PTR            ;
    36         delete    out_ADDRESS_BRANCH_STATE               ;
    37         if (_param->_have_port_depth)
    38         delete    out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID;
    39         delete    out_PREDICT_VAL                        ;
    40         delete     in_PREDICT_ACK                        ;
    41         delete    out_PREDICT_PC_PREVIOUS                ;
    42         delete    out_PREDICT_PC_CURRENT                 ;
    43         delete    out_PREDICT_PC_CURRENT_IS_DS_TAKE      ;
    44         delete     in_PREDICT_PC_NEXT                    ;
    45         delete     in_PREDICT_PC_NEXT_IS_DS_TAKE         ;
    46         delete []  in_PREDICT_INSTRUCTION_ENABLE         ;
    47         if (_param->_have_port_inst_ifetch_ptr)
    48         delete     in_PREDICT_INST_IFETCH_PTR            ;
    49 //      delete     in_PREDICT_BRANCH_IS_CURRENT          ;
    50         delete     in_PREDICT_BRANCH_STATE               ;
    51         if (_param->_have_port_depth)
    52         delete     in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;
    53         delete     in_EVENT_VAL                          ;
    54         delete    out_EVENT_ACK                          ;
    55         delete     in_EVENT_ADDRESS                      ;
    56         delete     in_EVENT_ADDRESS_NEXT                 ;
    57         delete     in_EVENT_ADDRESS_NEXT_VAL             ;
    58         delete     in_EVENT_IS_DS_TAKE                   ;
    59      
    60         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    61         if (usage_is_set(_usage,USE_SYSTEMC))
    62           {
    63             delete reg_PC_ACCESS_INSTRUCTION_ENABLE ;
    64             delete reg_PC_CURRENT_INSTRUCTION_ENABLE;
    65             delete reg_PC_NEXT_INSTRUCTION_ENABLE   ;
    66           }
     30       
     31        DELETE0_SIGNAL(out_ADDRESS_VAL                        ,1);
     32        DELETE0_SIGNAL( in_ADDRESS_ACK                        ,1);
     33        DELETE0_SIGNAL(out_ADDRESS_INSTRUCTION_ADDRESS        ,_param->_size_instruction_address     );
     34        DELETE0_SIGNAL(out_ADDRESS_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr         );
     35        DELETE0_SIGNAL(out_ADDRESS_BRANCH_STATE               ,_param->_size_branch_state            );
     36        DELETE0_SIGNAL(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     37        DELETE1_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE          ,1,_param->_nb_instruction);
     38       
     39        DELETE0_SIGNAL(out_PREDICT_VAL                        ,1);
     40        DELETE0_SIGNAL( in_PREDICT_ACK                        ,1);
     41        DELETE0_SIGNAL(out_PREDICT_PC_PREVIOUS                ,_param->_size_instruction_address);
     42        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT                 ,_param->_size_instruction_address);
     43        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,1);
     44        DELETE0_SIGNAL( in_PREDICT_PC_NEXT                    ,_param->_size_instruction_address);
     45        DELETE0_SIGNAL( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,1);
     46//      DELETE0_SIGNAL( in_PREDICT_BRANCH_IS_CURRENT          ,1);
     47        DELETE0_SIGNAL( in_PREDICT_BRANCH_STATE               ,_param->_size_branch_state);
     48        DELETE0_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     49        DELETE0_SIGNAL( in_PREDICT_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr);
     50        DELETE1_SIGNAL(in_PREDICT_INSTRUCTION_ENABLE           ,1,_param->_nb_instruction);
     51       
     52        DELETE0_SIGNAL( in_EVENT_VAL             ,1);
     53        DELETE0_SIGNAL(out_EVENT_ACK             ,1);
     54        DELETE0_SIGNAL( in_EVENT_ADDRESS         ,_param->_size_instruction_address);
     55        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT    ,_param->_size_instruction_address);
     56        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL,1);
     57        DELETE0_SIGNAL( in_EVENT_IS_DS_TAKE      ,1);
     58       
     59        DELETE1(reg_PC_ACCESS_INSTRUCTION_ENABLE ,_param->_nb_instruction);
     60        DELETE1(reg_PC_CURRENT_INSTRUCTION_ENABLE,_param->_nb_instruction);
     61        DELETE1(reg_PC_NEXT_INSTRUCTION_ENABLE   ,_param->_nb_instruction);
    6762      }
    68 
    6963
    7064    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
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