Changeset 112 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src

Timestamp:

Mar 18, 2009, 11:36:26 PM (15 years ago)

Author:

rosiere

Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src

Files:

• Ifetch_unit_Glue_allocation.cpp (modified) (2 diffs)
• Ifetch_unit_Glue_deallocation.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_allocation.cpp

@@ -48 +48 @@
                                                          ,IN
                                                          ,SOUTH,
-                                                         "Generalist interface"
+                                                         _("Generalist interface")
 #endif
                                                          );
@@ -58 +58 @@
     // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("icache_req",OUT, WEST, "Instruction Cache request.");
+      ALLOC0_INTERFACE_BEGIN("icache_req",OUT, WEST, "Instruction Cache request.");
 
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_VAL            ,"val"            ,Tcontrol_t,1);
-      ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_VAL    ,"address_val"    ,Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_VAL      ,"queue_val"      ,Tcontrol_t,1);
-      ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ACK            ,"ack"            ,Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS_ACK    ,"address_ack"    ,Tcontrol_t,1);
-      ALLOC_SIGNAL_IN ( in_ICACHE_REQ_QUEUE_ACK      ,"queue_ack"      ,Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE           ,"type"           ,Ticache_type_t,_param->_size_icache_type);
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS        ,"address"        ,Taddress_t,_param->_size_instruction_address);
-      ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_ADDRESS,"address_address",Taddress_t,_param->_size_instruction_address);
-      ALLOC_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_ADDRESS  ,"queue_address"  ,Taddress_t,_param->_size_instruction_address);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_VAL            ,"val"            ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_VAL    ,"address_val"    ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_VAL      ,"queue_val"      ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ACK            ,"ack"            ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS_ACK    ,"address_ack"    ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_QUEUE_ACK      ,"queue_ack"      ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_TYPE           ,"type"           ,Ticache_type_t,_param->_size_icache_type);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS        ,"address"        ,Taddress_t,_param->_size_instruction_address);
+      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_ADDRESS,"address_address",Taddress_t,_param->_size_instruction_address);
+      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_ADDRESS  ,"queue_address"  ,Taddress_t,_param->_size_instruction_address);
+
+      ALLOC0_INTERFACE_END();
     }
 
     // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("event",IN, EAST, "Event interface.");
+      ALLOC0_INTERFACE_BEGIN("event",IN, EAST, _("Event interface."));
 
-      ALLOC_SIGNAL_IN ( in_EVENT_VAL        ,"val"        ,Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_EVENT_ADDRESS_VAL,"address_val",Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_EVENT_QUEUE_VAL  ,"queue_val"  ,Tcontrol_t,1);
-      ALLOC_SIGNAL_OUT(out_EVENT_ACK        ,"ack"        ,Tcontrol_t,1);
-      ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_ACK,"address_ack",Tcontrol_t,1);
-      ALLOC_SIGNAL_IN ( in_EVENT_QUEUE_ACK  ,"queue_ack"  ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_EVENT_VAL        ,"val"        ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_EVENT_ADDRESS_VAL,"address_val",Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_EVENT_QUEUE_VAL  ,"queue_val"  ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_OUT(out_EVENT_ACK        ,"ack"        ,Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_ACK,"address_ack",Tcontrol_t,1);
+      ALLOC0_SIGNAL_IN ( in_EVENT_QUEUE_ACK  ,"queue_ack"  ,Tcontrol_t,1);
+
+      ALLOC0_INTERFACE_END();
     }
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_deallocation.cpp

@@ -7 +7 @@
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -28 +29 @@
         delete     in_NRESET;
 
-        delete    out_ICACHE_REQ_VAL         ;
-        delete     in_ICACHE_REQ_ADDRESS_VAL ;
-        delete    out_ICACHE_REQ_QUEUE_VAL   ;
-        delete     in_ICACHE_REQ_ACK         ;
-        delete    out_ICACHE_REQ_ADDRESS_ACK ;
-        delete     in_ICACHE_REQ_QUEUE_ACK   ;
-        delete    out_ICACHE_REQ_TYPE        ;
-        delete    out_ICACHE_REQ_ADDRESS         ;
-        delete     in_ICACHE_REQ_ADDRESS_ADDRESS ;
-        delete    out_ICACHE_REQ_QUEUE_ADDRESS   ;
-        
-        delete     in_EVENT_VAL              ;
-        delete    out_EVENT_ADDRESS_VAL      ;
-        delete    out_EVENT_QUEUE_VAL        ;
-        delete    out_EVENT_ACK              ;
-        delete     in_EVENT_ADDRESS_ACK      ;
-        delete     in_EVENT_QUEUE_ACK        ;
+        DELETE0_SIGNAL(out_ICACHE_REQ_VAL            ,1);
+        DELETE0_SIGNAL( in_ICACHE_REQ_ADDRESS_VAL    ,1);
+        DELETE0_SIGNAL(out_ICACHE_REQ_QUEUE_VAL      ,1);
+        DELETE0_SIGNAL( in_ICACHE_REQ_ACK            ,1);
+        DELETE0_SIGNAL(out_ICACHE_REQ_ADDRESS_ACK    ,1);
+        DELETE0_SIGNAL( in_ICACHE_REQ_QUEUE_ACK      ,1);
+        DELETE0_SIGNAL(out_ICACHE_REQ_TYPE           ,_param->_size_icache_type);
+        DELETE0_SIGNAL(out_ICACHE_REQ_ADDRESS        ,_param->_size_instruction_address);
+        DELETE0_SIGNAL( in_ICACHE_REQ_ADDRESS_ADDRESS,_param->_size_instruction_address);
+        DELETE0_SIGNAL(out_ICACHE_REQ_QUEUE_ADDRESS  ,_param->_size_instruction_address);
+        
+        DELETE0_SIGNAL( in_EVENT_VAL        ,1);
+        DELETE0_SIGNAL(out_EVENT_ADDRESS_VAL,1);
+        DELETE0_SIGNAL(out_EVENT_QUEUE_VAL  ,1);
+        DELETE0_SIGNAL(out_EVENT_ACK        ,1);
+        DELETE0_SIGNAL( in_EVENT_ADDRESS_ACK,1);
+        DELETE0_SIGNAL( in_EVENT_QUEUE_ACK  ,1);
       }
-
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~