Changeset 112 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src

Timestamp:

Mar 18, 2009, 11:36:26 PM (15 years ago)

Author:

rosiere

Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src

Files:

• Return_Address_Stack_allocation.cpp (modified) (6 diffs)
• Return_Address_Stack_deallocation.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp

@@ -46 +46 @@
                                                          ,IN
                                                          ,SOUTH,
-                                                         "Generalist interface"
+                                                         _("Generalist interface")
 #endif
                                                          );
@@ -56 +56 @@
     // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("predict", IN, SOUTH, "predict's interface", _param->_nb_inst_predict);
+      ALLOC1_INTERFACE_BEGIN("predict", IN, SOUTH, _("predict's interface"), _param->_nb_inst_predict);
 
       ALLOC1_VALACK_IN ( in_PREDICT_VAL         ,VAL);
@@ -66 +66 @@
       ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_POP ,"address_pop" ,Taddress_t,_param->_size_instruction_address);
       ALLOC1_SIGNAL_OUT(out_PREDICT_INDEX       ,"index"       ,Tptr_t    ,_param->_size_index);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_predict);
     }
 
     // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("decod", IN, SOUTH, "decod's interface", _param->_nb_inst_decod);
+      ALLOC1_INTERFACE_BEGIN("decod", IN, SOUTH, _("decod's interface"), _param->_nb_inst_decod);
 
       ALLOC1_VALACK_IN ( in_DECOD_VAL            ,VAL);
@@ -81 +83 @@
       ALLOC1_SIGNAL_OUT(out_DECOD_INDEX          ,"index"          ,Tptr_t    ,_param->_size_index);
       ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_decod);
     }
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("update", IN, SOUTH, "update's interface", _param->_nb_inst_update);
+      ALLOC1_INTERFACE_BEGIN("update", IN, SOUTH, _("update's interface"), _param->_nb_inst_update);
 
       ALLOC1_VALACK_IN ( in_UPDATE_VAL              ,VAL);
@@ -96 +100 @@
       ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION  ,"miss_prediction"  ,Tcontrol_t,1);
       ALLOC1_SIGNAL_IN ( in_UPDATE_PREDICTION_IFETCH,"prediction_ifetch",Tcontrol_t,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_update);
     }
 
@@ -101 +107 @@
       {
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        ALLOC2(reg_stack            ,ras_entry_t,_param->_nb_context,_param->_size_queue [it1]);
 
-    reg_stack = new ras_entry_t * [_param->_nb_context];
-    for (uint32_t i=0; i<_param->_nb_context; i++)
-      reg_stack [i] = new ras_entry_t [_param->_size_queue [i]];
+        ALLOC1(reg_TOP              ,Tptr_t     ,_param->_nb_context);
+//      ALLOC1(reg_BOTTOM           ,Tptr_t     ,_param->_nb_context);
+        ALLOC1(reg_NB_ELT           ,Tptr_t     ,_param->_nb_context);
 
-    reg_TOP              = new Tptr_t     [_param->_nb_context];
-//  reg_BOTTOM           = new Tptr_t     [_param->_nb_context];
-    reg_NB_ELT           = new Tptr_t     [_param->_nb_context];
+        ALLOC1(reg_PREDICT_TOP      ,Tptr_t     ,_param->_nb_context);
+//      ALLOC1(reg_PREDICT_BOTTOM   ,Tptr_t     ,_param->_nb_context);
+        ALLOC1(reg_PREDICT_NB_ELT   ,Tptr_t     ,_param->_nb_context);
 
-    reg_PREDICT_TOP      = new Tptr_t     [_param->_nb_context];
-//  reg_PREDICT_BOTTOM   = new Tptr_t     [_param->_nb_context];
-    reg_PREDICT_NB_ELT   = new Tptr_t     [_param->_nb_context];
-
-    internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict];
-    internal_PREDICT_HIT = new Tcontrol_t [_param->_nb_inst_predict];
-    internal_DECOD_ACK   = new Tcontrol_t [_param->_nb_inst_decod  ];
-    internal_DECOD_HIT   = new Tcontrol_t [_param->_nb_inst_decod  ];
-    internal_UPDATE_ACK  = new Tcontrol_t [_param->_nb_inst_update ];
+        ALLOC1(internal_PREDICT_ACK ,Tcontrol_t ,_param->_nb_inst_predict);
+        ALLOC1(internal_PREDICT_HIT ,Tcontrol_t ,_param->_nb_inst_predict);
+        ALLOC1(internal_DECOD_ACK   ,Tcontrol_t ,_param->_nb_inst_decod  );
+        ALLOC1(internal_DECOD_HIT   ,Tcontrol_t ,_param->_nb_inst_decod  );
+        ALLOC1(internal_UPDATE_ACK  ,Tcontrol_t ,_param->_nb_inst_update );
       }
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp

@@ -59 +59 @@
         
         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-        
-        for (uint32_t i=0; i<_param->_nb_context; i++)
-          delete [] reg_stack [i];
-        delete [] reg_stack;
-        delete [] reg_TOP;
-//      delete [] reg_BOTTOM;
-        delete [] reg_NB_ELT;
-        delete [] reg_PREDICT_TOP;
-//      delete [] reg_PREDICT_BOTTOM;
-        delete [] reg_PREDICT_NB_ELT;
-        
-        delete [] internal_PREDICT_ACK;
-        delete [] internal_PREDICT_HIT;
-        delete [] internal_DECOD_ACK;
-        delete [] internal_DECOD_HIT;
-        delete [] internal_UPDATE_ACK;
+        DELETE2(reg_stack            ,_param->_nb_context,_param->_size_queue [it1]);
+
+        DELETE1(reg_TOP              ,_param->_nb_context);
+//      DELETE1(reg_BOTTOM           ,_param->_nb_context);
+        DELETE1(reg_NB_ELT           ,_param->_nb_context);
+
+        DELETE1(reg_PREDICT_TOP      ,_param->_nb_context);
+//      DELETE1(reg_PREDICT_BOTTOM   ,_param->_nb_context);
+        DELETE1(reg_PREDICT_NB_ELT   ,_param->_nb_context);
+
+        DELETE1(internal_PREDICT_ACK ,_param->_nb_inst_predict);
+        DELETE1(internal_PREDICT_HIT ,_param->_nb_inst_predict);
+        DELETE1(internal_DECOD_ACK   ,_param->_nb_inst_decod  );
+        DELETE1(internal_DECOD_HIT   ,_param->_nb_inst_decod  );
+        DELETE1(internal_UPDATE_ACK  ,_param->_nb_inst_update );
       }