Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 112)
@@ -49,4 +49,5 @@
               reg_EVENT_STATE           [i][j] = EVENT_STATE_NO_EVENT;
               reg_EVENT_FLUSH           [i][j] = false;
+              reg_EVENT_STOP            [i][j] = false;
 
 //            reg_PC_PREVIOUS           [i][j] = (0x100-4)>>2;
@@ -90,4 +91,5 @@
                       reg_EVENT_STATE [i][j] = EVENT_STATE_END;
                       reg_EVENT_FLUSH [i][j] = false;
+                      //reg_EVENT_STOP  [i][j] = false;
                     }
                   break;
@@ -324,5 +326,5 @@
                       case ROB_BRANCH_WAIT_END : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:ROB_BRANCH_COMPLETE; break;}
                         // Store KO
-                      case ROB_MISS_WAIT_END   : {state = ROB_END_KO_SPECULATIVE; break;}
+                      case ROB_EVENT_WAIT_END  : {state = ROB_END_KO_SPECULATIVE; break;}
                         // Store OK, Load and other instruction
                       case ROB_OTHER_WAIT_END  : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:((have_miss_speculation)?ROB_END_LOAD_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE); break;}
@@ -333,4 +335,8 @@
                         }
                       }
+
+                    if ((have_exception or have_miss_speculation) and
+                        (reg_EVENT_FLUSH [entry->front_end_id][entry->context_id] == 0))
+                      reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true;
 
 		    // update Re Order Buffer
@@ -364,4 +370,5 @@
                 
                 log_printf(TRACE,Commit_unit,FUNCTION,"  * RETIRE            [%d][%d]",x,y);
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank     : %d",num_bank     );
                 
 #ifdef DEBUG_TEST
@@ -381,4 +388,5 @@
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id : %d",front_end_id );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id   : %d",context_id   );
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((num_bank << _param->_shift_num_bank) | entry->ptr));
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * num_thread   : %d",num_thread   );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * type         : %s",toString(type).c_str());
@@ -406,11 +414,12 @@
 //                     throw ERRORMORPHEO(FUNCTION,toString(_("Retire : Instruction's address_next (%.8x) is different of commit_unit's address_next (%.8x)"),entry->address_next,reg_PC_NEXT [front_end_id][context_id]));
                   }
-                
+
                 if ((state == ROB_END_BRANCH_MISS) or
                     (state == ROB_END_LOAD_MISS))
-                  {
-                    reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
-                    reg_EVENT_FLUSH [front_end_id][context_id] = true;
-                  }
+                    {
+                      reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
+                      reg_EVENT_FLUSH [front_end_id][context_id] = true;
+                      reg_EVENT_STOP  [front_end_id][context_id] = false;
+                    }
                 
 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true)
@@ -475,5 +484,5 @@
 	      {
 	      case ROB_STORE_HEAD_OK : {state = ROB_OTHER_WAIT_END; break; }
-	      case ROB_STORE_HEAD_KO : {state = ROB_MISS_WAIT_END ; break; }
+	      case ROB_STORE_HEAD_KO : {state = ROB_EVENT_WAIT_END; break; }
 	      default : {throw ERRORMORPHEO(FUNCTION,_("Reexecute : invalid state value.\n"));}
 	      }
@@ -500,6 +509,12 @@
 		throw ERRORMORPHEO(FUNCTION,_("Branch_complete : Invalid state value.\n"));
 #endif
-
-              entry->state = (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))?ROB_END_BRANCH_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE;
+              Tcontrol_t miss = PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]);
+              
+              entry->state = (miss)?ROB_END_BRANCH_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE;
+              
+              if (miss and (reg_EVENT_FLUSH [entry->front_end_id][entry->context_id] == 0))
+                reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true;
+
+
 //               entry->state = ROB_END_OK_SPECULATIVE;
 	    }
@@ -612,25 +627,25 @@
 		  switch (state)
 		    {
-		    case ROB_BRANCH_WAIT_END             : {state = ROB_MISS_WAIT_END; break;}
-		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS     ; break;}
+		    case ROB_BRANCH_WAIT_END             : {state = ROB_EVENT_WAIT_END; break;}
+		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS      ; break;}
                     case ROB_END_BRANCH_MISS             :
-                    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS     ; break;}
+                    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS      ; break;}
                     case ROB_END_LOAD_MISS_UPDATE        :
                     case ROB_END_LOAD_MISS               :
-                    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS     ; break;}
-		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO; break;}
+                    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS      ; break;}
+		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO ; break;}
 		  //case ROB_STORE_WAIT_HEAD_KO          : {state = ; break;}
-		    case ROB_OTHER_WAIT_END              : {state = ROB_MISS_WAIT_END; break;}
+		    case ROB_OTHER_WAIT_END              : {state = ROB_EVENT_WAIT_END; break;}
 		    case ROB_END_OK                      :
-		    case ROB_END_OK_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_OK_SPECULATIVE          : {state = ROB_END_MISS      ; break;}
 		    case ROB_END_KO                      :
-		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_MISS      ; break;}
 		    case ROB_END_EXCEPTION_UPDATE        :
 		    case ROB_END_EXCEPTION               :
-		    case ROB_END_EXCEPTION_WAIT_HEAD     : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_EXCEPTION_WAIT_HEAD     : {state = ROB_END_MISS      ; break;}
 		                                         
 		      // don't change                    
 		    case ROB_STORE_HEAD_KO               : {break;}
-		    case ROB_MISS_WAIT_END               : {break;}
+		    case ROB_EVENT_WAIT_END              : {break;}
 		    case ROB_END_MISS                    : {break;}
 		                                         
@@ -671,5 +686,5 @@
 		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK;        break;}
 		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION_UPDATE; break;}
-		    default : {break;} // else, no change
+                    default : {break;} // else, no change
 		    }
 		}
@@ -701,4 +716,5 @@
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STATE  : %s",toString(reg_EVENT_STATE [i][j]).c_str());
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_FLUSH  : %d",reg_EVENT_FLUSH [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STOP   : %d",reg_EVENT_STOP  [i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_ALL  : %d",reg_NB_INST_COMMIT_ALL[i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_MEM  : %d",reg_NB_INST_COMMIT_MEM[i][j]);
@@ -784,5 +800,5 @@
 //            or (entry->state == ROB_STORE_HEAD_KO              )
 //            or (entry->state == ROB_OTHER_WAIT_END             )
-//            or (entry->state == ROB_MISS_WAIT_END              )
+//            or (entry->state == ROB_EVENT_WAIT_END             )
 //            or (entry->state == ROB_END_OK_SPECULATIVE         )
               or (entry->state == ROB_END_OK                     )
