Ignore:
Timestamp:
Mar 18, 2009, 11:36:26 PM (15 years ago)
Author:
rosiere
Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp

    r111 r112  
    5959    // ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    6060    {
    61       ALLOC2_INTERFACE("issue_in", IN, WEST, _("Rename_out / Insert Rob interface"),_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
     61      ALLOC2_INTERFACE_BEGIN("issue_in", IN, WEST, _("Rename_out / Insert Rob interface"),_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
    6262   
    6363      _ALLOC2_VALACK_IN ( in_ISSUE_IN_VAL                  ,VAL,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
     
    8282      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
    8383      _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
     84
     85      ALLOC2_INTERFACE_END(_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
    8486    }
    8587
    8688    // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    8789    {
    88       ALLOC1_INTERFACE("reexecute", IN, NORTH, _("Instruction reexecute (store head/ spr access)"),_param->_nb_inst_reexecute);
     90      ALLOC1_INTERFACE_BEGIN("reexecute", IN, NORTH, _("Instruction reexecute (store head/ spr access)"),_param->_nb_inst_reexecute);
    8991     
    9092      ALLOC1_VALACK_IN ( in_REEXECUTE_VAL                  ,VAL);
     
    109111      ALLOC1_SIGNAL_IN ( in_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
    110112      ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
     113
     114      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
    111115    }
    112116
    113117    // ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    114118    {
    115       ALLOC1_INTERFACE("issue_out",OUT, EAST, _("Go to issue network"),_param->_nb_inst_issue);
     119      ALLOC1_INTERFACE_BEGIN("issue_out",OUT, EAST, _("Go to issue network"),_param->_nb_inst_issue);
    116120     
    117121      ALLOC1_VALACK_OUT(out_ISSUE_OUT_VAL                  ,VAL);
     
    136140      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
    137141      ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
     142
     143      ALLOC1_INTERFACE_END(_param->_nb_inst_issue);
    138144    }
    139145
     
    141147      {
    142148    // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    143     _issue_queue     = new std::list<entry_t*> [_param->_nb_bank];
     149    ALLOC1(_issue_queue                     ,std::list<entry_t*>,_param->_nb_bank);
    144150
    145151    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp

    r111 r112  
    9595
    9696        // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    97         delete [] _issue_queue;
     97        DELETE1(_issue_queue                     ,_param->_nb_bank);
    9898       
    9999        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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