Changeset 112 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src

Timestamp:

Mar 18, 2009, 11:36:26 PM (15 years ago)

Author:

rosiere

Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src

Files:

• Parameters.cpp (modified) (3 diffs)
• Parameters_print.cpp (modified) (1 diff)
• Rename_unit_allocation.cpp (modified) (4 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp

@@ -38 +38 @@
                           uint32_t             nb_reg_free                      ,
                           uint32_t             nb_bank                          ,
-                          uint32_t             size_read_counter                ,
+//                        uint32_t             size_read_counter                ,
                           bool                 is_toplevel)
   {
@@ -61 +61 @@
     _nb_reg_free                       = nb_reg_free                      ;
     _nb_bank                           = nb_bank                          ;
-    _size_read_counter                 = size_read_counter                ;
+//     _size_read_counter                 = size_read_counter                ;
     
     uint32_t size_special_register     = log2(_nb_special_register);
@@ -91 +91 @@
        _nb_inst_retire        ,
        _nb_reg_free           ,
-       _nb_bank               ,
-       _size_read_counter     
+       _nb_bank               // ,
+//        _size_read_counter     
        );
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp

@@ -39 +39 @@
     xml.singleton_begin("nb_reg_free                      "); xml.attribut("value",toString(_nb_reg_free                      )); xml.singleton_end();
     xml.singleton_begin("nb_bank                          "); xml.attribut("value",toString(_nb_bank                          )); xml.singleton_end();
-    xml.singleton_begin("size_read_counter                "); xml.attribut("value",toString(_size_read_counter                )); xml.singleton_end();
+//     xml.singleton_begin("size_read_counter                "); xml.attribut("value",toString(_size_read_counter                )); xml.singleton_end();
 
     for (uint32_t i=0;i<_nb_front_end; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp

@@ -58 +58 @@
     // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      ALLOC2_INTERFACE_BEGIN("rename_in", IN, EAST, _("output of decod's stage"), _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       
       _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -87 +87 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_inst_decod[it1]);
     }
 
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT,WEST , _("Instruction with physical register"), _param->_nb_inst_insert);
       
       ALLOC1_VALACK_OUT(out_INSERT_VAL                  ,VAL);
@@ -129 +131 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire",IN ,NORTH, _("Retire instruction, update renaming structure."), _param->_nb_inst_retire);
 
       ALLOC1_VALACK_IN ( in_RETIRE_VAL                  ,VAL);
@@ -159 +163 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL           ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK           ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE         ,"state"                ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_read", IN,NORTH, _("Special register"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_read", IN,NORTH, _("Special register"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN (in_SPR_READ_SR                 ,"sr",Tspr_t            ,_param->_size_spr, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }