Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp	(revision 112)
@@ -153,16 +153,16 @@
   ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_NO_SEQUENCE    ,"out_BRANCH_COMPLETE_NO_SEQUENCE    ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t        ,_param->_nb_inst_branch_complete);
-  ALLOC_SC_SIGNAL (out_UPDATE_VAL                      ,"out_UPDATE_VAL                      ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL ( in_UPDATE_ACK                      ," in_UPDATE_ACK                      ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_CONTEXT_ID               ,"out_UPDATE_CONTEXT_ID               ",Tcontext_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_FRONT_END_ID             ,"out_UPDATE_FRONT_END_ID             ",Tcontext_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_DEPTH                    ,"out_UPDATE_DEPTH                    ",Tdepth_t          );
-  ALLOC_SC_SIGNAL (out_UPDATE_TYPE                     ,"out_UPDATE_TYPE                     ",Tevent_type_t     );
-  ALLOC_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,"out_UPDATE_IS_DELAY_SLOT            ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS                  ,"out_UPDATE_ADDRESS                  ",Taddress_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         ,"out_UPDATE_ADDRESS_EPCR_VAL         ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,"out_UPDATE_ADDRESS_EPCR             ",Taddress_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,"out_UPDATE_ADDRESS_EEAR_VAL         ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR             ,"out_UPDATE_ADDRESS_EEAR             ",Tgeneral_data_t   );
+  ALLOC0_SC_SIGNAL(out_UPDATE_VAL                      ,"out_UPDATE_VAL                      ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL( in_UPDATE_ACK                      ," in_UPDATE_ACK                      ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_CONTEXT_ID               ,"out_UPDATE_CONTEXT_ID               ",Tcontext_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_FRONT_END_ID             ,"out_UPDATE_FRONT_END_ID             ",Tcontext_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_DEPTH                    ,"out_UPDATE_DEPTH                    ",Tdepth_t          );
+  ALLOC0_SC_SIGNAL(out_UPDATE_TYPE                     ,"out_UPDATE_TYPE                     ",Tevent_type_t     );
+  ALLOC0_SC_SIGNAL(out_UPDATE_IS_DELAY_SLOT            ,"out_UPDATE_IS_DELAY_SLOT            ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_ADDRESS                  ,"out_UPDATE_ADDRESS                  ",Taddress_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_ADDRESS_EPCR_VAL         ,"out_UPDATE_ADDRESS_EPCR_VAL         ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_ADDRESS_EPCR             ,"out_UPDATE_ADDRESS_EPCR             ",Taddress_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_ADDRESS_EEAR_VAL         ,"out_UPDATE_ADDRESS_EEAR_VAL         ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_UPDATE_ADDRESS_EEAR             ,"out_UPDATE_ADDRESS_EEAR             ",Tgeneral_data_t   );
 
   ALLOC2_SC_SIGNAL( in_EVENT_VAL             ," in_EVENT_VAL             ",Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -304,19 +304,19 @@
   INSTANCE1_SC_SIGNAL(_Commit_unit,out_BRANCH_COMPLETE_NO_SEQUENCE    ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Commit_unit, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_VAL                      );
-  INSTANCE_SC_SIGNAL (_Commit_unit, in_UPDATE_ACK                      );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_VAL                      );
+  INSTANCE0_SC_SIGNAL(_Commit_unit, in_UPDATE_ACK                      );
   if (_param->_have_port_context_id)
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_CONTEXT_ID               );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_CONTEXT_ID               );
   if (_param->_have_port_front_end_id)
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_FRONT_END_ID             );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_FRONT_END_ID             );
   if (_param->_have_port_depth)
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_DEPTH                    );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_TYPE                     );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_IS_DELAY_SLOT            );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS                  );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EPCR_VAL         );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EPCR             );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EEAR_VAL         );
-  INSTANCE_SC_SIGNAL (_Commit_unit,out_UPDATE_ADDRESS_EEAR             );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_DEPTH                    );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_TYPE                     );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_IS_DELAY_SLOT            );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_ADDRESS                  );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_ADDRESS_EPCR_VAL         );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_ADDRESS_EPCR             );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_ADDRESS_EEAR_VAL         );
+  INSTANCE0_SC_SIGNAL(_Commit_unit,out_UPDATE_ADDRESS_EEAR             );
 
   INSTANCE2_SC_SIGNAL(_Commit_unit, in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -708,16 +708,16 @@
   DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_NO_SEQUENCE    ,_param->_nb_inst_branch_complete);
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete);
-  DELETE_SC_SIGNAL (out_UPDATE_VAL                      );
-  DELETE_SC_SIGNAL ( in_UPDATE_ACK                      );
-  DELETE_SC_SIGNAL (out_UPDATE_CONTEXT_ID               );
-  DELETE_SC_SIGNAL (out_UPDATE_FRONT_END_ID             );
-  DELETE_SC_SIGNAL (out_UPDATE_DEPTH                    );
-  DELETE_SC_SIGNAL (out_UPDATE_TYPE                     );
-  DELETE_SC_SIGNAL (out_UPDATE_IS_DELAY_SLOT            );
-  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS                  );
-  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         );
-  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EPCR             );
-  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         );
-  DELETE_SC_SIGNAL (out_UPDATE_ADDRESS_EEAR             );
+  DELETE0_SC_SIGNAL(out_UPDATE_VAL                      );
+  DELETE0_SC_SIGNAL( in_UPDATE_ACK                      );
+  DELETE0_SC_SIGNAL(out_UPDATE_CONTEXT_ID               );
+  DELETE0_SC_SIGNAL(out_UPDATE_FRONT_END_ID             );
+  DELETE0_SC_SIGNAL(out_UPDATE_DEPTH                    );
+  DELETE0_SC_SIGNAL(out_UPDATE_TYPE                     );
+  DELETE0_SC_SIGNAL(out_UPDATE_IS_DELAY_SLOT            );
+  DELETE0_SC_SIGNAL(out_UPDATE_ADDRESS                  );
+  DELETE0_SC_SIGNAL(out_UPDATE_ADDRESS_EPCR_VAL         );
+  DELETE0_SC_SIGNAL(out_UPDATE_ADDRESS_EPCR             );
+  DELETE0_SC_SIGNAL(out_UPDATE_ADDRESS_EEAR_VAL         );
+  DELETE0_SC_SIGNAL(out_UPDATE_ADDRESS_EEAR             );
 
   DELETE2_SC_SIGNAL( in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h	(revision 112)
@@ -238,4 +238,5 @@
   private   : Tevent_state_t               ** reg_EVENT_STATE                      ;//[nb_front_end][nb_context]
   private   : bool                         ** reg_EVENT_FLUSH                      ;//[nb_front_end][nb_context]
+  private   : bool                         ** reg_EVENT_STOP                       ;//[nb_front_end][nb_context]
 
 //private   : Taddress_t                   ** reg_PC_PREVIOUS                      ;//[nb_front_end][nb_context]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h	(revision 112)
@@ -35,5 +35,7 @@
       ROB_STORE_HEAD_KO              , // 
       ROB_OTHER_WAIT_END             , // 
-      ROB_MISS_WAIT_END              , // 
+
+      ROB_EVENT_WAIT_END             , // 
+
       ROB_END_OK_SPECULATIVE         , // 
       ROB_END_OK                     , // 
@@ -49,4 +51,5 @@
       ROB_END_EXCEPTION_UPDATE       , // 
       ROB_END_EXCEPTION                // 
+
     } rob_state_t;
 
@@ -121,5 +124,5 @@
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_HEAD_KO              : return "ROB_STORE_HEAD_KO"               ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_OTHER_WAIT_END             : return "ROB_OTHER_WAIT_END"              ; break;
-      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_MISS_WAIT_END              : return "ROB_MISS_WAIT_END"               ; break;
+      case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_EVENT_WAIT_END             : return "ROB_EVENT_WAIT_END"              ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_OK_SPECULATIVE         : return "ROB_END_OK_SPECULATIVE"          ; break;
       case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_END_OK                     : return "ROB_END_OK"                      ; break;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp	(revision 112)
@@ -118,13 +118,13 @@
 # ifdef SYSTEMCASS_SPECIFIC
 	// List dependency information
-	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
-	  for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
-	    for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
-	      for (uint32_t y=0; y<_param->_nb_inst_insert[x]; y++)
-		{
-		  (*(out_INSERT_ACK       [i][j])) (*(in_INSERT_VAL [x][y]));
-		  if (_param->_have_port_rob_ptr)
-		  (*(out_INSERT_PACKET_ID [i][j])) (*(in_INSERT_VAL [x][y]));
-		}
+// 	for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+// 	  for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
+// 	    for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
+// 	      for (uint32_t y=0; y<_param->_nb_inst_insert[x]; y++)
+// 		{
+// 		  (*(out_INSERT_ACK       [i][j])) (*(in_INSERT_VAL [x][y]));
+// 		  if (_param->_have_port_rob_ptr)
+// 		  (*(out_INSERT_PACKET_ID [i][j])) (*(in_INSERT_VAL [x][y]));
+// 		}
 # endif    
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("insert", IN, SOUTH, _("Interface with rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+      ALLOC2_INTERFACE_BEGIN("insert", IN, SOUTH, _("Interface with rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
 
       _ALLOC2_VALACK_IN ( in_INSERT_VAL                     ,VAL,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -96,9 +96,11 @@
       _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD      ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW      ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
     }
 
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
       
       _ALLOC2_VALACK_OUT(out_RETIRE_VAL                     ,VAL,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
@@ -125,18 +127,22 @@
       _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_OLD      ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
       _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_NEW      ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_front_end,_param->_nb_context[it1]);
     
       _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_VAL               ,VAL,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_ACK               ,ACK,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STATE             ,"state"                ,Tevent_state_t    ,_param->_size_event_state           ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("commit",IN,EAST,_("End of execute."),_param->_nb_inst_commit);
+      ALLOC1_INTERFACE_BEGIN("commit",IN,EAST,_("End of execute."),_param->_nb_inst_commit);
 
       ALLOC1_VALACK_IN ( in_COMMIT_VAL               ,VAL);
@@ -152,9 +158,11 @@
 //    ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD        ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register+_param->_size_rename_unit_id);
       ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD        ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_commit);
     }
 
     // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("reexecute",OUT,EAST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("reexecute",OUT,EAST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_reexecute);
 
       ALLOC1_VALACK_OUT(out_REEXECUTE_VAL                  ,VAL);
@@ -166,9 +174,11 @@
       ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type);
       ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_branch_complete);
+      ALLOC1_INTERFACE_BEGIN("branch_complete",OUT,WEST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_branch_complete);
 
       ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_VAL            ,VAL);
@@ -181,27 +191,31 @@
       ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_NO_SEQUENCE    ,"no_sequence"    ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_branch_complete);
     }
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("update", OUT, WEST,_("Interface with to Context State."));
-
-      ALLOC_VALACK_OUT(out_UPDATE_VAL                      ,VAL);
-      ALLOC_VALACK_IN ( in_UPDATE_ACK                      ,ACK);
-      ALLOC_SIGNAL_OUT(out_UPDATE_CONTEXT_ID               ,"context_id"      ,Tcontext_t         ,_param->_size_context_id);
-      ALLOC_SIGNAL_OUT(out_UPDATE_FRONT_END_ID             ,"front_end_id"    ,Tcontext_t         ,_param->_size_front_end_id);
-      ALLOC_SIGNAL_OUT(out_UPDATE_DEPTH                    ,"depth"           ,Tdepth_t           ,_param->_size_depth    );
-      ALLOC_SIGNAL_OUT(out_UPDATE_TYPE                     ,"type"            ,Tevent_type_t      ,_param->_size_event_type);
-      ALLOC_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT            ,"is_delay_slot"   ,Tcontrol_t         ,1);
-      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS                  ,"address"         ,Taddress_t         ,_param->_size_instruction_address);
-      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR_VAL         ,"address_epcr_val",Tcontrol_t         ,1);
-      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR             ,"address_epcr"    ,Taddress_t         ,_param->_size_instruction_address);
-      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL         ,"address_eear_val",Tcontrol_t         ,1);
-      ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR             ,"address_eear"    ,Tgeneral_data_t    ,_param->_size_general_data);
+      ALLOC0_INTERFACE_BEGIN("update", OUT, WEST,_("Interface with to Context State."));
+
+      ALLOC0_VALACK_OUT(out_UPDATE_VAL                      ,VAL);
+      ALLOC0_VALACK_IN ( in_UPDATE_ACK                      ,ACK);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_CONTEXT_ID               ,"context_id"      ,Tcontext_t         ,_param->_size_context_id);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_FRONT_END_ID             ,"front_end_id"    ,Tcontext_t         ,_param->_size_front_end_id);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_DEPTH                    ,"depth"           ,Tdepth_t           ,_param->_size_depth    );
+      ALLOC0_SIGNAL_OUT(out_UPDATE_TYPE                     ,"type"            ,Tevent_type_t      ,_param->_size_event_type);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT            ,"is_delay_slot"   ,Tcontrol_t         ,1);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS                  ,"address"         ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR_VAL         ,"address_epcr_val",Tcontrol_t         ,1);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR             ,"address_epcr"    ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL         ,"address_eear_val",Tcontrol_t         ,1);
+      ALLOC0_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR             ,"address_eear"    ,Tgeneral_data_t    ,_param->_size_general_data);
+
+      ALLOC0_INTERFACE_END();
     }
 
     // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("event",IN,WEST,_("Interface with Context State (event)."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("event",IN,WEST,_("Interface with Context State (event)."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_EVENT_VAL             , VAL                                                           ,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -211,22 +225,28 @@
       _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"ADDRESS_NEXT_VAL",Tcontrol_t,1                                ,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"IS_DS_TAKE"      ,Tcontrol_t,1                                ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }  
 
     // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Interface with Context State (synchronization)."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("nb_inst",OUT,WEST,_("Interface with Context State (synchronization)."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL             ,"commit_all",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM             ,"commit_mem",Tcounter_t         ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL              ,"decod_all" ,Tcounter_t         ,_param->_size_nb_inst_decod ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN                     ,"min"      ,Tdepth_t           ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX                     ,"max"      ,Tdepth_t           ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_DEPTH_FULL                    ,"full"     ,Tcontrol_t         ,1                  ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
@@ -234,12 +254,14 @@
     // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_read",IN ,EAST,_("Interface with special register file (read)."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_read",IN ,EAST,_("Interface with special register file (read)."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_SPR_READ_SR_OVE                ,"sr_ove"    ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_write",OUT,EAST,_("Interface with special register file (write)."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_write",OUT,EAST,_("Interface with special register file (write)."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_OUT(out_SPR_WRITE_VAL                    ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -251,4 +273,6 @@
       _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV_VAL              ,"sr_ov_val"   ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV                  ,"sr_ov"       ,Tcontrol_t         ,1                         ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
@@ -289,4 +313,5 @@
     ALLOC2(reg_EVENT_STATE          ,Tevent_state_t,_param->_nb_front_end,_param->_nb_context [it1]);
     ALLOC2(reg_EVENT_FLUSH          ,bool          ,_param->_nb_front_end,_param->_nb_context [it1]);
+    ALLOC2(reg_EVENT_STOP           ,bool          ,_param->_nb_front_end,_param->_nb_context [it1]);
 
 //  ALLOC2(reg_PC_PREVIOUS          ,Taddress_t    ,_param->_nb_front_end,_param->_nb_context [it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 112)
@@ -124,16 +124,16 @@
         DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete,1);
 
-        DELETE_SIGNAL (out_UPDATE_VAL                      ,1                         );
-        DELETE_SIGNAL ( in_UPDATE_ACK                      ,1                         );
-        DELETE_SIGNAL (out_UPDATE_CONTEXT_ID               ,_param->_size_context_id  );
-        DELETE_SIGNAL (out_UPDATE_FRONT_END_ID             ,_param->_size_front_end_id);
-        DELETE_SIGNAL (out_UPDATE_DEPTH                    ,_param->_size_depth       );
-        DELETE_SIGNAL (out_UPDATE_TYPE                     ,_param->_size_event_type  );
-        DELETE_SIGNAL (out_UPDATE_IS_DELAY_SLOT            ,1                         );
-        DELETE_SIGNAL (out_UPDATE_ADDRESS                  ,_param->_size_instruction_address     );
-        DELETE_SIGNAL (out_UPDATE_ADDRESS_EPCR_VAL         ,1                         );
-        DELETE_SIGNAL (out_UPDATE_ADDRESS_EPCR             ,_param->_size_instruction_address     );
-        DELETE_SIGNAL (out_UPDATE_ADDRESS_EEAR_VAL         ,1                         );
-        DELETE_SIGNAL (out_UPDATE_ADDRESS_EEAR             ,_param->_size_instruction_address     );
+        DELETE0_SIGNAL(out_UPDATE_VAL                      ,1                         );
+        DELETE0_SIGNAL( in_UPDATE_ACK                      ,1                         );
+        DELETE0_SIGNAL(out_UPDATE_CONTEXT_ID               ,_param->_size_context_id  );
+        DELETE0_SIGNAL(out_UPDATE_FRONT_END_ID             ,_param->_size_front_end_id);
+        DELETE0_SIGNAL(out_UPDATE_DEPTH                    ,_param->_size_depth       );
+        DELETE0_SIGNAL(out_UPDATE_TYPE                     ,_param->_size_event_type  );
+        DELETE0_SIGNAL(out_UPDATE_IS_DELAY_SLOT            ,1                         );
+        DELETE0_SIGNAL(out_UPDATE_ADDRESS                  ,_param->_size_instruction_address     );
+        DELETE0_SIGNAL(out_UPDATE_ADDRESS_EPCR_VAL         ,1                         );
+        DELETE0_SIGNAL(out_UPDATE_ADDRESS_EPCR             ,_param->_size_instruction_address     );
+        DELETE0_SIGNAL(out_UPDATE_ADDRESS_EEAR_VAL         ,1                         );
+        DELETE0_SIGNAL(out_UPDATE_ADDRESS_EEAR             ,_param->_size_instruction_address     );
 
         DELETE2_SIGNAL( in_EVENT_VAL                       ,_param->_nb_front_end, _param->_nb_context[it1],1                    );
@@ -194,4 +194,5 @@
         DELETE2(reg_EVENT_STATE          ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE2(reg_EVENT_FLUSH          ,_param->_nb_front_end,_param->_nb_context [it1]);
+        DELETE2(reg_EVENT_STOP           ,_param->_nb_front_end,_param->_nb_context [it1]);
 //      DELETE2(reg_PC_PREVIOUS          ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE2(reg_PC_CURRENT           ,_param->_nb_front_end,_param->_nb_context [it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 112)
@@ -30,6 +30,11 @@
 #endif
     bool       can_rename_select [_param->_nb_rename_unit];
-    
-    // Initialisation
+    bool       event_stop;
+   
+//     Initialisation
+    event_stop = false; // one signal for all context.
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+        event_stop |= reg_EVENT_STOP [i][j];
     for (uint32_t i=0; i<_param->_nb_bank; i++)
       {
@@ -52,64 +57,67 @@
 //     log_printf(TRACE,Commit_unit,FUNCTION,"  * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
 
-    std::list<generic::priority::select_t> * select_insert = _priority_insert ->select(); // same select for all insert
-    std::list<generic::priority::select_t>::iterator it=select_insert ->begin();
-
-    // Scan all bank ...
-    for (uint32_t i=0; i<_param->_nb_bank; i++)
+    if (not event_stop)
       {
-	// compute the bank number (num_bank_tail is the older write slot)
-	uint32_t num_bank = (reg_NUM_BANK_TAIL+i)%_param->_nb_bank;
-
-// 	log_printf(TRACE,Commit_unit,FUNCTION,"  * BANK : %d", num_bank);
-// 	log_printf(TRACE,Commit_unit,FUNCTION,"    * val  : %d", internal_BANK_INSERT_VAL [num_bank]);
-// 	log_printf(TRACE,Commit_unit,FUNCTION,"    * full : %d", bank_full [num_bank]);
-
-        // Scan all insert interface to find a valid transaction
-	while (it!=select_insert ->end())
-	  {
-	    uint32_t num_rename_unit = it->grp;
-	    uint32_t num_inst_insert = it->elt;
-
-	    it++;
-
- 	    log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d]", num_rename_unit,num_inst_insert);
-//  	    log_printf(TRACE,Commit_unit,FUNCTION,"    * INSERT_VAL        : %d", PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert]));
- 	    log_printf(TRACE,Commit_unit,FUNCTION,"    * can_rename_select : %d", can_rename_select [num_rename_unit]);
-
-	    // Test if have instruction
-            //   -> rename_unit_glue test the in-order insert !!!!!
-	    if (can_rename_select [num_rename_unit] // and 
-// 		PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert])
-                )
-	      {
-                log_printf(TRACE,Commit_unit,FUNCTION,"      * have instruction");
-                log_printf(TRACE,Commit_unit,FUNCTION,"      * bank_full : %d",bank_full [num_bank]);
-
-		// test if bank is not busy (full or previous access)
-		if (not bank_full [num_bank])
-		  {
-		    // find !!!
-		    insert_ack       [num_rename_unit][num_inst_insert] = true;
-
-		    Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
-
+        std::list<generic::priority::select_t> * select_insert = _priority_insert ->select(); // same select for all insert
+        std::list<generic::priority::select_t>::iterator it=select_insert ->begin();
+        
+        // Scan all bank ...
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+          {
+            // compute the bank number (num_bank_tail is the older write slot)
+            uint32_t num_bank = (reg_NUM_BANK_TAIL+i)%_param->_nb_bank;
+      
+//          log_printf(TRACE,Commit_unit,FUNCTION,"  * BANK : %d", num_bank);
+//     	    log_printf(TRACE,Commit_unit,FUNCTION,"    * val  : %d", internal_BANK_INSERT_VAL [num_bank]);
+//     	    log_printf(TRACE,Commit_unit,FUNCTION,"    * full : %d", bank_full [num_bank]);
+      
+            // Scan all insert interface to find a valid transaction
+            while (it!=select_insert ->end())
+              {
+                uint32_t num_rename_unit = it->grp;
+                uint32_t num_inst_insert = it->elt;
+      
+                it++;
+      
+                log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d]", num_rename_unit,num_inst_insert);
+//      	    log_printf(TRACE,Commit_unit,FUNCTION,"    * INSERT_VAL        : %d", PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert]));
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * can_rename_select : %d", can_rename_select [num_rename_unit]);
+      
+                // Test if have instruction
+                //   -> rename_unit_glue test the in-order insert !!!!!
+                if (can_rename_select [num_rename_unit] // and 
+//     		PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert])
+                    )
+                  {
+                    log_printf(TRACE,Commit_unit,FUNCTION,"      * have instruction");
+                    log_printf(TRACE,Commit_unit,FUNCTION,"      * bank_full : %d",bank_full [num_bank]);
+                    
+                    // test if bank is not busy (full or previous access)
+                    if (not bank_full [num_bank])
+                      {
+                        // find !!!
+                        insert_ack       [num_rename_unit][num_inst_insert] = true;
+                        
+                        Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
+                        
 #ifdef SYSTEMC_VHDL_COMPATIBILITY
-		    insert_packet_id [num_rename_unit][num_inst_insert] = packet_id;
+                        insert_packet_id [num_rename_unit][num_inst_insert] = packet_id;
 #else
-		    if (_param->_have_port_rob_ptr  )
-		    PORT_WRITE(out_INSERT_PACKET_ID [num_rename_unit][num_inst_insert],packet_id);
+                        if (_param->_have_port_rob_ptr  )
+                        PORT_WRITE(out_INSERT_PACKET_ID [num_rename_unit][num_inst_insert],packet_id);
 #endif
-		    internal_BANK_INSERT_VAL             [num_bank] = true;
-		    internal_BANK_INSERT_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
-		    internal_BANK_INSERT_NUM_INST        [num_bank] = num_inst_insert;
-		    
-		    break;
-		  }
-	      }
+                        internal_BANK_INSERT_VAL             [num_bank] = true;
+                        internal_BANK_INSERT_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
+                        internal_BANK_INSERT_NUM_INST        [num_bank] = num_inst_insert;
+                        
+                        break;
+                      }
+                  }
 		
-	    // is a valid instruction, but it's not send at a bank
-	    //  ... invalid this rename_unit (because, insert in_order)
-	    can_rename_select [num_rename_unit] = false;
-	  }
+                // is a valid instruction, but it's not send at a bank
+                //  ... invalid this rename_unit (because, insert in_order)
+                can_rename_select [num_rename_unit] = false;
+              }
+          }
       }
     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp	(revision 112)
@@ -76,102 +76,101 @@
 		PORT_READ(in_RETIRE_ACK [x][y])) // not busy
 	      {
-		rob_state_t state = entry->state;
-		
-		if ((state == ROB_END_OK         ) or 
-		    (state == ROB_END_KO         ) or 
-		    (state == ROB_END_BRANCH_MISS) or 
-		    (state == ROB_END_LOAD_MISS  ) or 
-		    (state == ROB_END_MISS       )//  or 
-// 		    (state == ROB_END_EXCEPTION)
-		    )
-		  {
-		    Tcontext_t         front_end_id   = entry->front_end_id;
-		    Tcontext_t         context_id     = entry->context_id;  
-		    Tcontrol_t         write_re       = entry->write_re;
-		    Tspecial_address_t num_reg_re_log = entry->num_reg_re_log;
-
-		    // if state is ok, when write flags in the SR regsiters
-		    bool spr_write_ack = true;
-
-                    // Write in SR the good flag
-		    if ((state == ROB_END_OK  ) and write_re)
-                      // ROB_END_BRANCH_MISS is a valid branch instruction but don't modify RE
-		      {
-			spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]);
-
-			// retire_ack is set !!!
-			spr_write_val       [front_end_id][context_id] = 1;
-
-			Tspecial_data_t flags = entry->flags;
-
-			switch (num_reg_re_log)
-			  {
-			  case SPR_LOGIC_SR_F     : 
-			    {
-			      spr_write_sr_f_val  [front_end_id][context_id] = 1;
-			      spr_write_sr_f      [front_end_id][context_id] = (flags & FLAG_F )!=0;
-
-			      break;
-			    }
-			  case SPR_LOGIC_SR_CY_OV :
-			    {
-			      spr_write_sr_cy_val [front_end_id][context_id] = 1;
-			      spr_write_sr_ov_val [front_end_id][context_id] = 1;	
-			      spr_write_sr_cy     [front_end_id][context_id] = (flags & FLAG_CY)!=0;
-			      spr_write_sr_ov     [front_end_id][context_id] = (flags & FLAG_OV)!=0;
-			
-			      break;
-			    }
-			  default : 
-			    {
+		rob_state_t state        = entry->state;
+                  if ((state == ROB_END_OK         ) or 
+                      (state == ROB_END_KO         ) or 
+                      (state == ROB_END_BRANCH_MISS) or 
+                      (state == ROB_END_LOAD_MISS  ) or 
+                      (state == ROB_END_MISS       )//  or 
+// 		      (state == ROB_END_EXCEPTION)
+                      )
+                    {
+                      Tcontrol_t         write_re       = entry->write_re;
+                      Tspecial_address_t num_reg_re_log = entry->num_reg_re_log;
+                      Tcontext_t         front_end_id   = entry->front_end_id;
+                      Tcontext_t         context_id     = entry->context_id;  
+                      
+                      // if state is ok, when write flags in the SR regsiters
+                      bool spr_write_ack = true;
+                      
+                      // Write in SR the good flag
+                      if ((state == ROB_END_OK  ) and write_re)
+                        // ROB_END_BRANCH_MISS is a valid branch instruction but don't modify RE
+                        {
+                          spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]);
+                          
+                          // retire_ack is set !!!
+                          spr_write_val       [front_end_id][context_id] = 1;
+                          
+                          Tspecial_data_t flags = entry->flags;
+                          
+                          switch (num_reg_re_log)
+                            {
+                            case SPR_LOGIC_SR_F     : 
+                              {
+                                spr_write_sr_f_val  [front_end_id][context_id] = 1;
+                                spr_write_sr_f      [front_end_id][context_id] = (flags & FLAG_F )!=0;
+                                
+                                break;
+                              }
+                            case SPR_LOGIC_SR_CY_OV :
+                              {
+                                spr_write_sr_cy_val [front_end_id][context_id] = 1;
+                                spr_write_sr_ov_val [front_end_id][context_id] = 1;	
+                                spr_write_sr_cy     [front_end_id][context_id] = (flags & FLAG_CY)!=0;
+                                spr_write_sr_ov     [front_end_id][context_id] = (flags & FLAG_OV)!=0;
+                                
+                                break;
+                              }
+                            default : 
+                              {
 #ifdef DEBUG_TEST
-			      throw ERRORMORPHEO(FUNCTION,_("Invalid num_reg_re_log.\n"));
+                                throw ERRORMORPHEO(FUNCTION,_("Invalid num_reg_re_log.\n"));
 #endif
-			    }
-			  }
-		      }
-
-		    // find an instruction can be retire, and in order
-
-		    if (spr_write_ack)
-		      {
-			retire_val [x][y] = 1;
-			num_inst_retire [x] ++;
-			internal_BANK_RETIRE_VAL [num_bank] = true;
-		      }
-
-		    internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x;
-		    internal_BANK_RETIRE_NUM_INST        [num_bank] = y;
-
-		    if (_param->_have_port_front_end_id)
-		    PORT_WRITE(out_RETIRE_FRONT_END_ID          [x][y], front_end_id                );
-		    if (_param->_have_port_context_id)
-		    PORT_WRITE(out_RETIRE_CONTEXT_ID            [x][y], context_id                  );
-// 		    PORT_WRITE(out_RETIRE_RENAME_UNIT_ID        [x][y], entry->rename_unit_id       );
-		    PORT_WRITE(out_RETIRE_USE_STORE_QUEUE       [x][y], entry->use_store_queue      );
-		    PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE        [x][y], entry->use_load_queue       );
-		    PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [x][y], entry->store_queue_ptr_write);
-		    if (_param->_have_port_load_queue_ptr)
-		    PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [x][y], entry->load_queue_ptr_write );
-		    PORT_WRITE(out_RETIRE_READ_RA               [x][y], entry->read_ra              );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RA_PHY        [x][y], entry->num_reg_ra_phy       );
-		    PORT_WRITE(out_RETIRE_READ_RB               [x][y], entry->read_rb              );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RB_PHY        [x][y], entry->num_reg_rb_phy       );
-		    PORT_WRITE(out_RETIRE_READ_RC               [x][y], entry->read_rc              );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RC_PHY        [x][y], entry->num_reg_rc_phy       );
-		    PORT_WRITE(out_RETIRE_WRITE_RD              [x][y], entry->write_rd             );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RD_LOG        [x][y], entry->num_reg_rd_log       );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_OLD    [x][y], entry->num_reg_rd_phy_old   );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_NEW    [x][y], entry->num_reg_rd_phy_new   );
-		    PORT_WRITE(out_RETIRE_WRITE_RE              [x][y], write_re                    );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RE_LOG        [x][y], num_reg_re_log              );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD    [x][y], entry->num_reg_re_phy_old   );
-		    PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW    [x][y], entry->num_reg_re_phy_new   );
-
-                    // Event -> rob must be manage this event
-                    if ((state == ROB_END_BRANCH_MISS) or
-                        (state == ROB_END_LOAD_MISS))
-                      can_retire [x] = false;
-		  }
+                              }
+                            }
+                        }
+                      
+                      // find an instruction can be retire, and in order
+                      
+                      if (spr_write_ack)
+                        {
+                          retire_val [x][y] = 1;
+                          num_inst_retire [x] ++;
+                          internal_BANK_RETIRE_VAL [num_bank] = true;
+                        }
+                      
+                      internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x;
+                      internal_BANK_RETIRE_NUM_INST        [num_bank] = y;
+                      
+                      if (_param->_have_port_front_end_id)
+                      PORT_WRITE(out_RETIRE_FRONT_END_ID          [x][y], front_end_id                );
+                      if (_param->_have_port_context_id)
+                      PORT_WRITE(out_RETIRE_CONTEXT_ID            [x][y], context_id                  );
+// 		      PORT_WRITE(out_RETIRE_RENAME_UNIT_ID        [x][y], entry->rename_unit_id       );
+                      PORT_WRITE(out_RETIRE_USE_STORE_QUEUE       [x][y], entry->use_store_queue      );
+                      PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE        [x][y], entry->use_load_queue       );
+                      PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [x][y], entry->store_queue_ptr_write);
+                      if (_param->_have_port_load_queue_ptr)
+		      PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE  [x][y], entry->load_queue_ptr_write );
+                      PORT_WRITE(out_RETIRE_READ_RA               [x][y], entry->read_ra              );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RA_PHY        [x][y], entry->num_reg_ra_phy       );
+                      PORT_WRITE(out_RETIRE_READ_RB               [x][y], entry->read_rb              );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RB_PHY        [x][y], entry->num_reg_rb_phy       );
+                      PORT_WRITE(out_RETIRE_READ_RC               [x][y], entry->read_rc              );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RC_PHY        [x][y], entry->num_reg_rc_phy       );
+                      PORT_WRITE(out_RETIRE_WRITE_RD              [x][y], entry->write_rd             );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RD_LOG        [x][y], entry->num_reg_rd_log       );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_OLD    [x][y], entry->num_reg_rd_phy_old   );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_NEW    [x][y], entry->num_reg_rd_phy_new   );
+                      PORT_WRITE(out_RETIRE_WRITE_RE              [x][y], write_re                    );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RE_LOG        [x][y], num_reg_re_log              );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD    [x][y], entry->num_reg_re_phy_old   );
+                      PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW    [x][y], entry->num_reg_re_phy_new   );
+
+                      // Event -> rob must be manage this event
+                      if ((state == ROB_END_BRANCH_MISS) or
+                          (state == ROB_END_LOAD_MISS))
+                        can_retire [x] = false;
+                    }
 	      }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 112)
@@ -49,4 +49,5 @@
               reg_EVENT_STATE           [i][j] = EVENT_STATE_NO_EVENT;
               reg_EVENT_FLUSH           [i][j] = false;
+              reg_EVENT_STOP            [i][j] = false;
 
 //            reg_PC_PREVIOUS           [i][j] = (0x100-4)>>2;
@@ -90,4 +91,5 @@
                       reg_EVENT_STATE [i][j] = EVENT_STATE_END;
                       reg_EVENT_FLUSH [i][j] = false;
+                      //reg_EVENT_STOP  [i][j] = false;
                     }
                   break;
@@ -324,5 +326,5 @@
                       case ROB_BRANCH_WAIT_END : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:ROB_BRANCH_COMPLETE; break;}
                         // Store KO
-                      case ROB_MISS_WAIT_END   : {state = ROB_END_KO_SPECULATIVE; break;}
+                      case ROB_EVENT_WAIT_END  : {state = ROB_END_KO_SPECULATIVE; break;}
                         // Store OK, Load and other instruction
                       case ROB_OTHER_WAIT_END  : {state = (have_exception)?ROB_END_EXCEPTION_WAIT_HEAD:((have_miss_speculation)?ROB_END_LOAD_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE); break;}
@@ -333,4 +335,8 @@
                         }
                       }
+
+                    if ((have_exception or have_miss_speculation) and
+                        (reg_EVENT_FLUSH [entry->front_end_id][entry->context_id] == 0))
+                      reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true;
 
 		    // update Re Order Buffer
@@ -364,4 +370,5 @@
                 
                 log_printf(TRACE,Commit_unit,FUNCTION,"  * RETIRE            [%d][%d]",x,y);
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * num_bank     : %d",num_bank     );
                 
 #ifdef DEBUG_TEST
@@ -381,4 +388,5 @@
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id : %d",front_end_id );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id   : %d",context_id   );
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((num_bank << _param->_shift_num_bank) | entry->ptr));
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * num_thread   : %d",num_thread   );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * type         : %s",toString(type).c_str());
@@ -406,11 +414,12 @@
 //                     throw ERRORMORPHEO(FUNCTION,toString(_("Retire : Instruction's address_next (%.8x) is different of commit_unit's address_next (%.8x)"),entry->address_next,reg_PC_NEXT [front_end_id][context_id]));
                   }
-                
+
                 if ((state == ROB_END_BRANCH_MISS) or
                     (state == ROB_END_LOAD_MISS))
-                  {
-                    reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
-                    reg_EVENT_FLUSH [front_end_id][context_id] = true;
-                  }
+                    {
+                      reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
+                      reg_EVENT_FLUSH [front_end_id][context_id] = true;
+                      reg_EVENT_STOP  [front_end_id][context_id] = false;
+                    }
                 
 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true)
@@ -475,5 +484,5 @@
 	      {
 	      case ROB_STORE_HEAD_OK : {state = ROB_OTHER_WAIT_END; break; }
-	      case ROB_STORE_HEAD_KO : {state = ROB_MISS_WAIT_END ; break; }
+	      case ROB_STORE_HEAD_KO : {state = ROB_EVENT_WAIT_END; break; }
 	      default : {throw ERRORMORPHEO(FUNCTION,_("Reexecute : invalid state value.\n"));}
 	      }
@@ -500,6 +509,12 @@
 		throw ERRORMORPHEO(FUNCTION,_("Branch_complete : Invalid state value.\n"));
 #endif
-
-              entry->state = (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))?ROB_END_BRANCH_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE;
+              Tcontrol_t miss = PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]);
+              
+              entry->state = (miss)?ROB_END_BRANCH_MISS_SPECULATIVE:ROB_END_OK_SPECULATIVE;
+              
+              if (miss and (reg_EVENT_FLUSH [entry->front_end_id][entry->context_id] == 0))
+                reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true;
+
+
 //               entry->state = ROB_END_OK_SPECULATIVE;
 	    }
@@ -612,25 +627,25 @@
 		  switch (state)
 		    {
-		    case ROB_BRANCH_WAIT_END             : {state = ROB_MISS_WAIT_END; break;}
-		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS     ; break;}
+		    case ROB_BRANCH_WAIT_END             : {state = ROB_EVENT_WAIT_END; break;}
+		    case ROB_BRANCH_COMPLETE             : {state = ROB_END_MISS      ; break;}
                     case ROB_END_BRANCH_MISS             :
-                    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS     ; break;}
+                    case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS      ; break;}
                     case ROB_END_LOAD_MISS_UPDATE        :
                     case ROB_END_LOAD_MISS               :
-                    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS     ; break;}
-		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO; break;}
+                    case ROB_END_LOAD_MISS_SPECULATIVE   : {state = ROB_END_MISS      ; break;}
+		    case ROB_STORE_WAIT_HEAD_OK          : {state = ROB_STORE_HEAD_KO ; break;}
 		  //case ROB_STORE_WAIT_HEAD_KO          : {state = ; break;}
-		    case ROB_OTHER_WAIT_END              : {state = ROB_MISS_WAIT_END; break;}
+		    case ROB_OTHER_WAIT_END              : {state = ROB_EVENT_WAIT_END; break;}
 		    case ROB_END_OK                      :
-		    case ROB_END_OK_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_OK_SPECULATIVE          : {state = ROB_END_MISS      ; break;}
 		    case ROB_END_KO                      :
-		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_KO_SPECULATIVE          : {state = ROB_END_MISS      ; break;}
 		    case ROB_END_EXCEPTION_UPDATE        :
 		    case ROB_END_EXCEPTION               :
-		    case ROB_END_EXCEPTION_WAIT_HEAD     : {state = ROB_END_MISS     ; break;}
+		    case ROB_END_EXCEPTION_WAIT_HEAD     : {state = ROB_END_MISS      ; break;}
 		                                         
 		      // don't change                    
 		    case ROB_STORE_HEAD_KO               : {break;}
-		    case ROB_MISS_WAIT_END               : {break;}
+		    case ROB_EVENT_WAIT_END              : {break;}
 		    case ROB_END_MISS                    : {break;}
 		                                         
@@ -671,5 +686,5 @@
 		    case ROB_STORE_WAIT_HEAD_OK      : {state = ROB_STORE_HEAD_OK;        break;}
 		    case ROB_END_EXCEPTION_WAIT_HEAD : {state = ROB_END_EXCEPTION_UPDATE; break;}
-		    default : {break;} // else, no change
+                    default : {break;} // else, no change
 		    }
 		}
@@ -701,4 +716,5 @@
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STATE  : %s",toString(reg_EVENT_STATE [i][j]).c_str());
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_FLUSH  : %d",reg_EVENT_FLUSH [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STOP   : %d",reg_EVENT_STOP  [i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_ALL  : %d",reg_NB_INST_COMMIT_ALL[i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_MEM  : %d",reg_NB_INST_COMMIT_MEM[i][j]);
@@ -784,5 +800,5 @@
 //            or (entry->state == ROB_STORE_HEAD_KO              )
 //            or (entry->state == ROB_OTHER_WAIT_END             )
-//            or (entry->state == ROB_MISS_WAIT_END              )
+//            or (entry->state == ROB_EVENT_WAIT_END             )
 //            or (entry->state == ROB_END_OK_SPECULATIVE         )
               or (entry->state == ROB_END_OK                     )
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp	(revision 112)
@@ -59,5 +59,5 @@
     // ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("issue_in", IN, WEST, _("Rename_out / Insert Rob interface"),_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+      ALLOC2_INTERFACE_BEGIN("issue_in", IN, WEST, _("Rename_out / Insert Rob interface"),_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
     
       _ALLOC2_VALACK_IN ( in_ISSUE_IN_VAL                  ,VAL,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
@@ -82,9 +82,11 @@
       _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
       _ALLOC2_SIGNAL_IN ( in_ISSUE_IN_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_rename_unit, _param->_nb_inst_rename[it1]);
     }
 
     // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("reexecute", IN, NORTH, _("Instruction reexecute (store head/ spr access)"),_param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("reexecute", IN, NORTH, _("Instruction reexecute (store head/ spr access)"),_param->_nb_inst_reexecute);
       
       ALLOC1_VALACK_IN ( in_REEXECUTE_VAL                  ,VAL);
@@ -109,9 +111,11 @@
       ALLOC1_SIGNAL_IN ( in_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
       ALLOC1_SIGNAL_IN ( in_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
     // ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("issue_out",OUT, EAST, _("Go to issue network"),_param->_nb_inst_issue);
+      ALLOC1_INTERFACE_BEGIN("issue_out",OUT, EAST, _("Go to issue network"),_param->_nb_inst_issue);
       
       ALLOC1_VALACK_OUT(out_ISSUE_OUT_VAL                  ,VAL);
@@ -136,4 +140,6 @@
       ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
       ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_issue);
     }
 
@@ -141,5 +147,5 @@
       {
     // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    _issue_queue     = new std::list<entry_t*> [_param->_nb_bank];
+    ALLOC1(_issue_queue                     ,std::list<entry_t*>,_param->_nb_bank);
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp	(revision 112)
@@ -95,5 +95,5 @@
 
         // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-        delete [] _issue_queue;
+        DELETE1(_issue_queue                     ,_param->_nb_bank);
         
         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp	(revision 112)
@@ -58,13 +58,15 @@
     // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename",IN, SOUTH,_("rename's interface"),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      ALLOC2_INTERFACE_BEGIN("rename",IN, SOUTH,_("rename's interface"),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       
       _ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID                          ,"FRONT_END_ID"                          ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_OUT(out_RENAME_RENAME_UNIT_FRONT_END_ID              ,"RENAME_UNIT_FRONT_END_ID"              ,Tcontext_t         ,_param->_size_front_end_id    ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_inst_decod[it1]);
     }
     
     // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert);
 
       ALLOC1_SIGNAL_OUT (out_INSERT_VAL                                   ,"VAL"                                   ,Tcontrol_t         ,1                             );
@@ -74,8 +76,10 @@
       ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE                                ,"RE_USE"                                ,Tcontrol_t         ,1                             );
       ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG                            ,"RE_NUM_REG"                            ,Tspecial_address_t ,_param->_size_special_register);
-    }
-
-    {
-      ALLOC2_INTERFACE("insert",IN, EAST,_("insert's interface"),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      ALLOC1_INTERFACE_END(_param->_sum_inst_insert);
+    }
+
+    {
+      ALLOC2_INTERFACE_BEGIN("insert",IN, EAST,_("insert's interface"),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_VAL                       ,"RENAME_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
@@ -146,9 +150,11 @@
       _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_WRITE_RE                  ,"ISSUE_QUEUE_WRITE_RE"                  ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
       _ALLOC2_SIGNAL_OUT(out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ,"ISSUE_QUEUE_NUM_REG_RE"                ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
     }
 
 //     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 //     {
-//       ALLOC1_INTERFACE("retire",OUT, WEST,_("retire's interface"),_param->_sum_inst_retire);
+//       ALLOC1_INTERFACE_BEGIN("retire",OUT, WEST,_("retire's interface"),_param->_sum_inst_retire);
       
 //       ALLOC1_SIGNAL_OUT (out_RETIRE_VAL                                   ,"VAL"                                   ,Tcontrol_t         ,1                             );
@@ -162,8 +168,10 @@
 //       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE                            ,"RE_NEW_USE"                            ,Tcontrol_t         ,1                             );
 //       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG                        ,"RE_NEW_NUM_REG"                        ,Tspecial_address_t ,_param->_size_special_register);
+
+//       ALLOC1_INTERFACE_END(_param->_sum_inst_retire);
 //     }
 
 //     {
-//       ALLOC2_INTERFACE("retire",IN, EAST,_("retire's interface"),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+//       ALLOC2_INTERFACE_BEGIN("retire",IN, EAST,_("retire's interface"),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
 
 //       _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_VAL                       ,"RENAME_UNIT_VAL"                       ,Tcontrol_t         ,1                             ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
@@ -188,9 +196,11 @@
 //       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ,"COMMIT_UNIT_NUM_REG_RE_PHY_NEW"        ,Tspecial_address_t ,_param->_size_special_register,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
 //       _ALLOC2_SIGNAL_IN ( in_RETIRE_COMMIT_UNIT_EVENT_STATE               ,"COMMIT_UNIT_EVENT_STATE"               ,Tevent_state_t     ,_param->_size_event_state     ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
+
+//       ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
 //     }
 
     // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr",IN, NORTH,_("spr's interface"),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr",IN, NORTH,_("spr's interface"),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE                                   ,"SR_IEE"                                ,Tcontrol_t         ,1                             ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -199,4 +209,6 @@
       _ALLOC2_SIGNAL_OUT(out_SPR_COMMIT_UNIT_SR_OVE                       ,"COMMIT_UNIT_SR_OVE"                    ,Tcontrol_t         ,1                             ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_SPR_SPECIAL_REGISTER_UNIT_SR                 ,"SPECIAL_REGISTER_UNIT_SR"              ,Tspr_t             ,_param->_size_spr             ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("execute_loop", IN, EAST, _("Instruction executed from execute_loop"),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      ALLOC2_INTERFACE_BEGIN("execute_loop", IN, EAST, _("Instruction executed from execute_loop"),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
 
       _ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL                     ,VAL,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
@@ -72,9 +72,11 @@
       _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS                 ,"address"     ,Taddress_t         ,_param->_size_instruction_address,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
       _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA                    ,"data"        ,Tgeneral_data_t    ,_param->_size_general_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
     }
 
     // ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("commit",OUT,WEST, _("Instruction executed to Re Order Buffer"),_param->_nb_inst_commit);
+      ALLOC1_INTERFACE_BEGIN("commit",OUT,WEST, _("Instruction executed to Re Order Buffer"),_param->_nb_inst_commit);
 
       ALLOC1_VALACK_OUT(out_COMMIT_VAL                           ,VAL);
@@ -91,9 +93,11 @@
       ALLOC1_SIGNAL_OUT(out_COMMIT_ADDRESS                       ,"address"     ,Taddress_t         ,_param->_size_instruction_address);
       ALLOC1_SIGNAL_IN ( in_COMMIT_NUM_REG_RD                    ,"num_reg_rd"  ,Tgeneral_address_t ,_param->_size_general_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_commit);
     }
 
     // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("spr",OUT,EAST, _("Access to Special Register"), _param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("spr",OUT,EAST, _("Access to Special Register"), _param->_nb_inst_reexecute);
 
       ALLOC1_VALACK_OUT(out_SPR_VAL                              ,VAL);
@@ -107,9 +111,11 @@
       ALLOC1_SIGNAL_IN ( in_SPR_RDATA                            ,"rdata"       ,Tspr_t             ,_param->_size_spr);
       ALLOC1_SIGNAL_IN ( in_SPR_INVALID                          ,"invalid"     ,Tcontrol_t         ,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
     // ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("reexecute_rob", IN,EAST, _("Instruction reexecuted by the Re Order Buffer (Store head)"), _param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("reexecute_rob", IN,EAST, _("Instruction reexecuted by the Re Order Buffer (Store head)"), _param->_nb_inst_reexecute);
 
       ALLOC1_VALACK_IN ( in_REEXECUTE_ROB_VAL                    ,VAL);
@@ -121,31 +127,35 @@
       ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_TYPE                   ,"type"                 ,Ttype_t            ,_param->_size_type);
       ALLOC1_SIGNAL_IN ( in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE  ,"store_queue_ptr_write",Tlsq_ptr_t         ,_param->_size_store_queue_ptr);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
     // ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("reexecute",OUT,SOUTH, _("Instruction reexecute, send at the issue_queue"), _param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("reexecute",OUT,SOUTH, _("Instruction reexecute, send at the issue_queue"), _param->_nb_inst_reexecute);
 
       ALLOC1_VALACK_OUT(out_REEXECUTE_VAL                  ,VAL);
       ALLOC1_VALACK_IN ( in_REEXECUTE_ACK                  ,ACK);
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id         );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id       );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr            );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation          );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type               );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr    );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr     );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data       );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register   );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register   );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register   );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register   );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                                );
-      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register   );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID           ,"context_id"           ,Tcontext_t        ,_param->_size_context_id      );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID         ,"front_end_id"         ,Tcontext_t        ,_param->_size_front_end_id    );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID            ,"packet_id"            ,Tpacket_t         ,_param->_size_rob_ptr         );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION            ,"operation"            ,Toperation_t      ,_param->_size_operation       );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE                 ,"type"                 ,Ttype_t           ,_param->_size_type            );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t        ,_param->_size_store_queue_ptr );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_HAS_IMMEDIAT         ,"has_immediat"         ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_IMMEDIAT             ,"immediat"             ,Tgeneral_data_t   ,_param->_size_general_data    );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RA              ,"read_ra"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RA           ,"num_reg_ra"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RB              ,"read_rb"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RB           ,"num_reg_rb"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_READ_RC              ,"read_rc"              ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RC           ,"num_reg_rc"           ,Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RD             ,"write_rd"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RD           ,"num_reg_rd"           ,Tgeneral_address_t,_param->_size_general_register);
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_WRITE_RE             ,"write_re"             ,Tcontrol_t        ,1                             );
+      ALLOC1_SIGNAL_OUT(out_REEXECUTE_NUM_REG_RE           ,"num_reg_re"           ,Tspecial_address_t,_param->_size_special_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
@@ -153,17 +163,17 @@
       {
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    _reexecute_queue = new std::list<entry_t *> [_param->_nb_bank];
+    ALLOC1(_reexecute_queue         ,std::list<entry_t *>,_param->_nb_bank);
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-    internal_QUEUE_PUSH             = new Tcontrol_t [_param->_nb_bank];
-    internal_QUEUE_NUM_EXECUTE_LOOP = new uint32_t   [_param->_nb_bank];
-    internal_QUEUE_NUM_INST_EXECUTE = new uint32_t   [_param->_nb_bank];
-    internal_QUEUE_NUM_INST_COMMIT  = new uint32_t   [_param->_nb_bank];
-    internal_QUEUE_INFO             = new info_t     [_param->_nb_bank];
-    internal_SPR_VAL                = new Tcontrol_t [_param->_nb_inst_reexecute];
-    internal_REEXECUTE_ROB_ACK      = new Tcontrol_t [_param->_nb_inst_reexecute];
-    internal_REEXECUTE_VAL          = new Tcontrol_t [_param->_nb_inst_reexecute];
+    ALLOC1(internal_QUEUE_PUSH             ,Tcontrol_t,_param->_nb_bank);
+    ALLOC1(internal_QUEUE_NUM_EXECUTE_LOOP ,uint32_t  ,_param->_nb_bank);
+    ALLOC1(internal_QUEUE_NUM_INST_EXECUTE ,uint32_t  ,_param->_nb_bank);
+    ALLOC1(internal_QUEUE_NUM_INST_COMMIT  ,uint32_t  ,_param->_nb_bank);
+    ALLOC1(internal_QUEUE_INFO             ,info_t    ,_param->_nb_bank);
+    ALLOC1(internal_SPR_VAL                ,Tcontrol_t,_param->_nb_inst_reexecute);
+    ALLOC1(internal_REEXECUTE_ROB_ACK      ,Tcontrol_t,_param->_nb_inst_reexecute);
+    ALLOC1(internal_REEXECUTE_VAL          ,Tcontrol_t,_param->_nb_inst_reexecute);
 #ifdef STATISTICS
-    internal_COMMIT_VAL             = new Tcontrol_t [_param->_nb_inst_commit];
+    ALLOC1(internal_COMMIT_VAL             ,Tcontrol_t,_param->_nb_inst_commit);
 #endif
       }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 112)
@@ -105,20 +105,20 @@
               delete entry;
             }
-        delete [] _reexecute_queue;
+        DELETE1(_reexecute_queue                ,_param->_nb_bank);
         
         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-        delete [] internal_QUEUE_PUSH            ;
-        delete [] internal_QUEUE_NUM_EXECUTE_LOOP;
-        delete [] internal_QUEUE_NUM_INST_EXECUTE;
-        delete [] internal_QUEUE_NUM_INST_COMMIT ;
-        delete [] internal_QUEUE_INFO            ;
-        delete [] internal_SPR_VAL               ;
-        delete [] internal_REEXECUTE_ROB_ACK     ;
-        delete [] internal_REEXECUTE_VAL         ;
+        DELETE1(internal_QUEUE_PUSH             ,_param->_nb_bank);
+        DELETE1(internal_QUEUE_NUM_EXECUTE_LOOP ,_param->_nb_bank);
+        DELETE1(internal_QUEUE_NUM_INST_EXECUTE ,_param->_nb_bank);
+        DELETE1(internal_QUEUE_NUM_INST_COMMIT  ,_param->_nb_bank);
+        DELETE1(internal_QUEUE_INFO             ,_param->_nb_bank);
+        DELETE1(internal_SPR_VAL                ,_param->_nb_inst_reexecute);
+        DELETE1(internal_REEXECUTE_ROB_ACK      ,_param->_nb_inst_reexecute);
+        DELETE1(internal_REEXECUTE_VAL          ,_param->_nb_inst_reexecute);
 #ifdef STATISTICS
-        delete [] internal_COMMIT_VAL            ;
+        DELETE1(internal_COMMIT_VAL             ,_param->_nb_inst_commit);
 #endif
       }
-
+        
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert", IN, EAST, "insert to the re order buffer an instruction", _param->_nb_inst_insert); 
+      ALLOC1_INTERFACE_BEGIN("insert", IN, EAST, _("insert to the re order buffer an instruction"), _param->_nb_inst_insert); 
 
       ALLOC1_VALACK_IN ( in_INSERT_VAL                  ,VAL);
@@ -68,9 +68,11 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t  ,_param->_size_store_queue_ptr);
       ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t  ,_param->_size_load_queue_ptr );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert); 
     }
     
     // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire", IN, EAST, "retire from the re order buffer an instruction", _param->_nb_inst_retire); 
+      ALLOC1_INTERFACE_BEGIN("retire", IN, EAST, _("retire from the re order buffer an instruction"), _param->_nb_inst_retire); 
 
       ALLOC1_VALACK_IN ( in_RETIRE_VAL                  ,VAL);
@@ -84,29 +86,25 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t  ,_param->_size_store_queue_ptr);
       ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t  ,_param->_size_load_queue_ptr );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire); 
     }
 
     if (usage_is_set(_usage,USE_SYSTEMC))
       {
-    reg_STORE_QUEUE_PTR_WRITE     = new Tlsq_ptr_t      [_param->_nb_load_store_queue];
-    reg_STORE_QUEUE_USE           = new bool *          [_param->_nb_load_store_queue];
-    reg_STORE_QUEUE_NB_USE        = new Tlsq_ptr_t      [_param->_nb_load_store_queue];
-    reg_LOAD_QUEUE_PTR_WRITE      = new Tlsq_ptr_t      [_param->_nb_load_store_queue];
-    reg_LOAD_QUEUE_USE            = new bool *          [_param->_nb_load_store_queue];
-    
-    for (uint32_t i=0; i<_param->_nb_load_store_queue; i++)
-      {
-	reg_STORE_QUEUE_USE [i] = new bool [_param->_size_store_queue [i]];
-	reg_LOAD_QUEUE_USE  [i] = new bool [_param->_size_load_queue  [i]];
-      }
+    ALLOC1(reg_STORE_QUEUE_PTR_WRITE     ,Tlsq_ptr_t     ,_param->_nb_load_store_queue);
+    ALLOC2(reg_STORE_QUEUE_USE           ,bool           ,_param->_nb_load_store_queue,_param->_size_store_queue [it1]);
+    ALLOC1(reg_STORE_QUEUE_NB_USE        ,Tlsq_ptr_t     ,_param->_nb_load_store_queue);
+    ALLOC1(reg_LOAD_QUEUE_PTR_WRITE      ,Tlsq_ptr_t     ,_param->_nb_load_store_queue);
+    ALLOC2(reg_LOAD_QUEUE_USE            ,bool           ,_param->_nb_load_store_queue,_param->_size_load_queue  [it1]);
 
-    internal_INSERT_ACK           = new Tcontrol_t      [_param->_nb_inst_insert];
-    internal_INSERT_OPERATION_USE = new operation_use_t [_param->_nb_inst_insert];
-    internal_INSERT_LSQ           = new uint32_t        [_param->_nb_inst_insert];
-    internal_INSERT_PTR           = new Tlsq_ptr_t      [_param->_nb_inst_insert];
+    ALLOC1(internal_INSERT_ACK           ,Tcontrol_t     ,_param->_nb_inst_insert);
+    ALLOC1(internal_INSERT_OPERATION_USE ,operation_use_t,_param->_nb_inst_insert);
+    ALLOC1(internal_INSERT_LSQ           ,uint32_t       ,_param->_nb_inst_insert);
+    ALLOC1(internal_INSERT_PTR           ,Tlsq_ptr_t     ,_param->_nb_inst_insert);
 
-    internal_RETIRE_ACK           = new Tcontrol_t      [_param->_nb_inst_retire];
-    internal_RETIRE_OPERATION_USE = new operation_use_t [_param->_nb_inst_retire];
-    internal_RETIRE_LSQ           = new uint32_t        [_param->_nb_inst_retire];
-    internal_RETIRE_PTR           = new Tlsq_ptr_t      [_param->_nb_inst_retire];
+    ALLOC1(internal_RETIRE_ACK           ,Tcontrol_t     ,_param->_nb_inst_retire);
+    ALLOC1(internal_RETIRE_OPERATION_USE ,operation_use_t,_param->_nb_inst_retire);
+    ALLOC1(internal_RETIRE_LSQ           ,uint32_t       ,_param->_nb_inst_retire);
+    ALLOC1(internal_RETIRE_PTR           ,Tlsq_ptr_t     ,_param->_nb_inst_retire);
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_deallocation.cpp	(revision 112)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Load_Store_pointer_unit.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -28,45 +29,39 @@
 	delete    in_NRESET;
 
-	// ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-	delete []  in_INSERT_VAL                  ;
-	delete [] out_INSERT_ACK                  ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_INSERT_FRONT_END_ID         ;
-	if (_param->_have_port_context_id)
-	delete []  in_INSERT_CONTEXT_ID           ;
-	delete []  in_INSERT_TYPE                 ;
-	delete []  in_INSERT_OPERATION            ;
-	delete [] out_INSERT_STORE_QUEUE_PTR_WRITE;
-	if (_param->_have_port_load_queue_ptr)
-	delete [] out_INSERT_LOAD_QUEUE_PTR_WRITE ;
-	
-	// ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-	delete []  in_RETIRE_VAL                  ;
-	delete [] out_RETIRE_ACK                  ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_RETIRE_FRONT_END_ID         ;
-	if (_param->_have_port_context_id)
-	delete []  in_RETIRE_CONTEXT_ID           ;
-// 	delete []  in_RETIRE_TYPE                 ;
-// 	delete []  in_RETIRE_OPERATION            ;
- 	delete []  in_RETIRE_USE_STORE_QUEUE      ;
- 	delete []  in_RETIRE_USE_LOAD_QUEUE       ;
-	delete []  in_RETIRE_STORE_QUEUE_PTR_WRITE;
-	if (_param->_have_port_load_queue_ptr)
-	delete []  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;
+        DELETE1_SIGNAL( in_INSERT_VAL                  ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_ACK                  ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_FRONT_END_ID         ,_param->_nb_inst_insert,_param->_size_front_end_id   );
+        DELETE1_SIGNAL( in_INSERT_CONTEXT_ID           ,_param->_nb_inst_insert,_param->_size_context_id     );
+        DELETE1_SIGNAL( in_INSERT_TYPE                 ,_param->_nb_inst_insert,_param->_size_type           );
+        DELETE1_SIGNAL( in_INSERT_OPERATION            ,_param->_nb_inst_insert,_param->_size_operation      );
+        DELETE1_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert,_param->_size_store_queue_ptr);
+        DELETE1_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert,_param->_size_load_queue_ptr );
 
-        delete [] reg_STORE_QUEUE_PTR_WRITE    ;
-        delete [] reg_STORE_QUEUE_USE          ;
-        delete [] reg_STORE_QUEUE_NB_USE       ;
-        delete [] reg_LOAD_QUEUE_PTR_WRITE     ;
-        delete [] reg_LOAD_QUEUE_USE           ;
-        delete [] internal_INSERT_ACK          ;
-        delete [] internal_INSERT_OPERATION_USE;
-        delete [] internal_INSERT_LSQ          ;
-        delete [] internal_INSERT_PTR          ;
-        delete [] internal_RETIRE_ACK          ;
-        delete [] internal_RETIRE_OPERATION_USE;
-        delete [] internal_RETIRE_LSQ          ;
-        delete [] internal_RETIRE_PTR          ;
+        DELETE1_SIGNAL( in_RETIRE_VAL                  ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_ACK                  ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID         ,_param->_nb_inst_retire,_param->_size_front_end_id   );
+        DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID           ,_param->_nb_inst_retire,_param->_size_context_id     );
+//      DELETE1_SIGNAL( in_RETIRE_TYPE                 ,_param->_nb_inst_retire,_param->_size_type           );
+//      DELETE1_SIGNAL( in_RETIRE_OPERATION            ,_param->_nb_inst_retire,_param->_size_operation      );
+        DELETE1_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr);
+        DELETE1_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire,_param->_size_load_queue_ptr );
+
+        DELETE1(reg_STORE_QUEUE_PTR_WRITE     ,_param->_nb_load_store_queue);
+        DELETE2(reg_STORE_QUEUE_USE           ,_param->_nb_load_store_queue,_param->_size_store_queue [it1]);
+        DELETE1(reg_STORE_QUEUE_NB_USE        ,_param->_nb_load_store_queue);
+        DELETE1(reg_LOAD_QUEUE_PTR_WRITE      ,_param->_nb_load_store_queue);
+        DELETE2(reg_LOAD_QUEUE_USE            ,_param->_nb_load_store_queue,_param->_size_load_queue  [it1]);
+        
+        DELETE1(internal_INSERT_ACK           ,_param->_nb_inst_insert);
+        DELETE1(internal_INSERT_OPERATION_USE ,_param->_nb_inst_insert);
+        DELETE1(internal_INSERT_LSQ           ,_param->_nb_inst_insert);
+        DELETE1(internal_INSERT_PTR           ,_param->_nb_inst_insert);
+        
+        DELETE1(internal_RETIRE_ACK           ,_param->_nb_inst_retire);
+        DELETE1(internal_RETIRE_OPERATION_USE ,_param->_nb_inst_retire);
+        DELETE1(internal_RETIRE_LSQ           ,_param->_nb_inst_retire);
+        DELETE1(internal_RETIRE_PTR           ,_param->_nb_inst_retire);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp	(revision 112)
@@ -49,5 +49,5 @@
 							 ,IN
 							 ,SOUTH,
-							 "Generalist interface"
+							 _("Generalist interface")
 #endif
 							 );
@@ -58,8 +58,8 @@
     // ~~~~~[ Interface "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("rename_in", IN, EAST, "Registers before near dependency checking", _param->_nb_inst_insert);
+       ALLOC1_INTERFACE_BEGIN("rename_in", IN, EAST, _("Registers before near dependency checking"), _param->_nb_inst_insert);
        
-//        ALLOC1_VALACK_IN ( in_RENAME_IN_VAL               ,VAL);
-//        ALLOC1_VALACK_OUT(out_RENAME_IN_ACK               ,ACK);
+//     ALLOC1_VALACK_IN ( in_RENAME_IN_VAL               ,VAL);
+//     ALLOC1_VALACK_OUT(out_RENAME_IN_ACK               ,ACK);
        ALLOC1_SIGNAL_IN ( in_RENAME_IN_FRONT_END_ID      ,"front_end_id"      ,Tcontext_t        ,_param->_size_front_end_id          );
        ALLOC1_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID        ,"context_id"        ,Tcontext_t        ,_param->_size_context_id            );
@@ -81,12 +81,14 @@
        ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register      );
        ALLOC1_SIGNAL_IN ( in_RENAME_IN_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register      );
+
+       ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
      }
 
     // ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("rename_out", OUT, WEST, "Registers after near dependency checking", _param->_nb_inst_insert);
+       ALLOC1_INTERFACE_BEGIN("rename_out", OUT, WEST, _("Registers after near dependency checking"), _param->_nb_inst_insert);
        
-//        ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL               ,VAL);
-//        ALLOC1_VALACK_IN ( in_RENAME_OUT_ACK               ,ACK);
+//     ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL               ,VAL);
+//     ALLOC1_VALACK_IN ( in_RENAME_OUT_ACK               ,ACK);
        ALLOC1_SIGNAL_OUT(out_RENAME_OUT_FRONT_END_ID      ,"front_end_id"      ,Tcontext_t        ,_param->_size_front_end_id          );
        ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID        ,"context_id"        ,Tcontext_t        ,_param->_size_context_id            );
@@ -108,4 +110,6 @@
        ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register      );
        ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register      );
+
+       ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
      }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp	(revision 112)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -29,51 +30,47 @@
 	delete     in_NRESET;
 
-// 	delete []  in_RENAME_IN_VAL                ;
-// 	delete [] out_RENAME_IN_ACK                ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_RENAME_IN_FRONT_END_ID       ;
-	if (_param->_have_port_context_id)
-	delete []  in_RENAME_IN_CONTEXT_ID         ;
-	delete []  in_RENAME_IN_READ_RA            ;
-	delete []  in_RENAME_IN_NUM_REG_RA_LOG     ;
-	delete []  in_RENAME_IN_NUM_REG_RA_PHY     ;
-	delete []  in_RENAME_IN_READ_RB            ;
-	delete []  in_RENAME_IN_NUM_REG_RB_LOG     ;
-	delete []  in_RENAME_IN_NUM_REG_RB_PHY     ;
-	delete []  in_RENAME_IN_READ_RC            ;
-	delete []  in_RENAME_IN_NUM_REG_RC_LOG     ;
-	delete []  in_RENAME_IN_NUM_REG_RC_PHY     ;
-	delete []  in_RENAME_IN_WRITE_RD           ;
-	delete []  in_RENAME_IN_NUM_REG_RD_LOG     ;
-	delete []  in_RENAME_IN_NUM_REG_RD_PHY_OLD ;
-	delete []  in_RENAME_IN_NUM_REG_RD_PHY_NEW ;
-	delete []  in_RENAME_IN_WRITE_RE           ;
-	delete []  in_RENAME_IN_NUM_REG_RE_LOG     ;
-	delete []  in_RENAME_IN_NUM_REG_RE_PHY_OLD ;
-	delete []  in_RENAME_IN_NUM_REG_RE_PHY_NEW ;
+//      DELETE1_SIGNAL( in_RENAME_IN_VAL                ,_param->_nb_inst_insert,1);
+//      DELETE1_SIGNAL(out_RENAME_IN_ACK                ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_RENAME_IN_FRONT_END_ID       ,_param->_nb_inst_insert,_param->_size_front_end_id          );
+        DELETE1_SIGNAL( in_RENAME_IN_CONTEXT_ID         ,_param->_nb_inst_insert,_param->_size_context_id            );
+        DELETE1_SIGNAL( in_RENAME_IN_READ_RA            ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RA_LOG     ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RA_PHY     ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_READ_RB            ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RB_LOG     ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RB_PHY     ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_READ_RC            ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RC_LOG     ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RC_PHY     ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_WRITE_RD           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RD_LOG     ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_WRITE_RE           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RE_LOG     ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RENAME_IN_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register      );
 
-// 	delete [] out_RENAME_OUT_VAL               ;
-// 	delete []  in_RENAME_OUT_ACK               ;
-	if (_param->_have_port_front_end_id)
-	delete [] out_RENAME_OUT_FRONT_END_ID      ;
-	if (_param->_have_port_context_id)
-	delete [] out_RENAME_OUT_CONTEXT_ID        ;
-	delete [] out_RENAME_OUT_READ_RA           ;
-	delete [] out_RENAME_OUT_NUM_REG_RA_LOG    ;
-	delete [] out_RENAME_OUT_NUM_REG_RA_PHY    ;
-	delete [] out_RENAME_OUT_READ_RB           ;
-	delete [] out_RENAME_OUT_NUM_REG_RB_LOG    ;
-	delete [] out_RENAME_OUT_NUM_REG_RB_PHY    ;
-	delete [] out_RENAME_OUT_READ_RC           ;
-	delete [] out_RENAME_OUT_NUM_REG_RC_LOG    ;
-	delete [] out_RENAME_OUT_NUM_REG_RC_PHY    ;
-	delete [] out_RENAME_OUT_WRITE_RD          ;
-	delete [] out_RENAME_OUT_NUM_REG_RD_LOG    ;
-	delete [] out_RENAME_OUT_NUM_REG_RD_PHY_OLD;
-	delete [] out_RENAME_OUT_NUM_REG_RD_PHY_NEW;
-	delete [] out_RENAME_OUT_WRITE_RE          ;
-	delete [] out_RENAME_OUT_NUM_REG_RE_LOG    ;
-	delete [] out_RENAME_OUT_NUM_REG_RE_PHY_OLD;
-	delete [] out_RENAME_OUT_NUM_REG_RE_PHY_NEW;
+//      DELETE1_SIGNAL(out_RENAME_OUT_VAL               ,_param->_nb_inst_insert,1);
+//      DELETE1_SIGNAL( in_RENAME_OUT_ACK               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_RENAME_OUT_FRONT_END_ID      ,_param->_nb_inst_insert,_param->_size_front_end_id          );
+        DELETE1_SIGNAL(out_RENAME_OUT_CONTEXT_ID        ,_param->_nb_inst_insert,_param->_size_context_id            );
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RA           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RA_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RB           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RB_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RC           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RC_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_WRITE_RD          ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RD_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_WRITE_RE          ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RE_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register      );
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp	(revision 112)
@@ -49,5 +49,5 @@
 							 ,IN
 							 ,SOUTH,
-							 "Generalist interface"
+							 _("Generalist interface")
 #endif
 							 );
@@ -58,5 +58,5 @@
     // ~~~~~[ interface : "pop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("pop", IN, NORTH, "New destination register", _param->_nb_pop);
+       ALLOC1_INTERFACE_BEGIN("pop", IN, NORTH, _("New destination register"), _param->_nb_pop);
 
        ALLOC1_VALACK_IN ( in_POP_VAL        ,VAL);
@@ -66,38 +66,45 @@
        ALLOC1_SIGNAL_IN ( in_POP_SPR_VAL    ,"spr_val"    ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_OUT(out_POP_SPR_NUM_REG,"spr_num_reg",Tspecial_address_t,_param->_size_special_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_pop);
      }
 
     // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("push_gpr", IN, NORTH, "General register free", _param->_nb_push);
+       ALLOC1_INTERFACE_BEGIN("push_gpr", IN, NORTH, _("General register free"), _param->_nb_push);
 
        ALLOC1_VALACK_IN ( in_PUSH_GPR_VAL    ,VAL);
        ALLOC1_VALACK_OUT(out_PUSH_GPR_ACK    ,ACK);
        ALLOC1_SIGNAL_IN ( in_PUSH_GPR_NUM_REG,"num_reg",Tgeneral_address_t,_param->_size_general_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_push);
      }
 
     // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("push_spr", IN, NORTH, "General register free", _param->_nb_push);
+       ALLOC1_INTERFACE_BEGIN("push_spr", IN, NORTH, _("General register free"), _param->_nb_push);
 
        ALLOC1_VALACK_IN ( in_PUSH_SPR_VAL    ,VAL);
        ALLOC1_VALACK_OUT(out_PUSH_SPR_ACK    ,ACK);
        ALLOC1_SIGNAL_IN ( in_PUSH_SPR_NUM_REG,"num_reg",Tspecial_address_t,_param->_size_special_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_push);
      }
 
      if (usage_is_set(_usage,USE_SYSTEMC))
        {
-     _gpr_list = new std::list<uint32_t> [_param->_nb_bank];
-     _spr_list = new std::list<uint32_t> [_param->_nb_bank];
+     ALLOC1(_gpr_list,std::list<uint32_t>,_param->_nb_bank);
+     ALLOC1(_spr_list,std::list<uint32_t>,_param->_nb_bank);
 
-     internal_POP_ACK       = new Tcontrol_t [_param->_nb_pop];
-     internal_POP_GPR_BANK  = new uint32_t   [_param->_nb_pop];
-     internal_POP_SPR_BANK  = new uint32_t   [_param->_nb_pop];
+     ALLOC1(internal_POP_ACK      ,Tcontrol_t,_param->_nb_pop);
+     ALLOC1(internal_POP_GPR_BANK ,uint32_t  ,_param->_nb_pop);
+     ALLOC1(internal_POP_SPR_BANK ,uint32_t  ,_param->_nb_pop);
 
-     internal_PUSH_GPR_ACK  = new Tcontrol_t [_param->_nb_push];
-     internal_PUSH_SPR_ACK  = new Tcontrol_t [_param->_nb_push];
-     internal_PUSH_GPR_BANK = new uint32_t   [_param->_nb_push];
-     internal_PUSH_SPR_BANK = new uint32_t   [_param->_nb_push];
+     ALLOC1(internal_PUSH_GPR_ACK ,Tcontrol_t,_param->_nb_push);
+     ALLOC1(internal_PUSH_SPR_ACK ,Tcontrol_t,_param->_nb_push);
+     ALLOC1(internal_PUSH_GPR_BANK,uint32_t  ,_param->_nb_push);
+     ALLOC1(internal_PUSH_SPR_BANK,uint32_t  ,_param->_nb_push);
        }
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     _priority_gpr = new generic::priority::Priority (_name+"_priority_gpr",
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp	(revision 112)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -29,30 +30,30 @@
 	delete    in_NRESET;
 
-	delete []  in_POP_VAL        ;
-	delete [] out_POP_ACK        ;
-	delete []  in_POP_GPR_VAL    ;
-	delete [] out_POP_GPR_NUM_REG;
-	delete []  in_POP_SPR_VAL    ;
-	delete [] out_POP_SPR_NUM_REG;
+        DELETE1_SIGNAL( in_POP_VAL         ,_param->_nb_pop,1);
+        DELETE1_SIGNAL(out_POP_ACK         ,_param->_nb_pop,1);
+        DELETE1_SIGNAL( in_POP_GPR_VAL     ,_param->_nb_pop,1                             );
+        DELETE1_SIGNAL(out_POP_GPR_NUM_REG ,_param->_nb_pop,_param->_size_general_register);
+        DELETE1_SIGNAL( in_POP_SPR_VAL     ,_param->_nb_pop,1                             );
+        DELETE1_SIGNAL(out_POP_SPR_NUM_REG ,_param->_nb_pop,_param->_size_special_register);
 
-	delete []  in_PUSH_GPR_VAL    ;
-	delete [] out_PUSH_GPR_ACK    ;
-	delete []  in_PUSH_GPR_NUM_REG;
+        DELETE1_SIGNAL( in_PUSH_GPR_VAL    ,_param->_nb_push,1);
+        DELETE1_SIGNAL(out_PUSH_GPR_ACK    ,_param->_nb_push,1);
+        DELETE1_SIGNAL( in_PUSH_GPR_NUM_REG,_param->_nb_push,_param->_size_general_register);
 
-	delete []  in_PUSH_SPR_VAL    ;
-	delete [] out_PUSH_SPR_ACK    ;
-	delete []  in_PUSH_SPR_NUM_REG;
+        DELETE1_SIGNAL( in_PUSH_SPR_VAL    ,_param->_nb_push,1);
+        DELETE1_SIGNAL(out_PUSH_SPR_ACK    ,_param->_nb_push,1);
+        DELETE1_SIGNAL( in_PUSH_SPR_NUM_REG,_param->_nb_push,_param->_size_special_register);
 
-        delete [] _gpr_list;
-        delete [] _spr_list;
-        
-        delete [] internal_POP_ACK     ;
-        delete [] internal_POP_GPR_BANK;
-        delete [] internal_POP_SPR_BANK;
-        
-        delete [] internal_PUSH_GPR_ACK ;
-        delete [] internal_PUSH_SPR_ACK ;
-        delete [] internal_PUSH_GPR_BANK;
-        delete [] internal_PUSH_SPR_BANK;
+        DELETE1(_gpr_list             ,_param->_nb_bank);
+        DELETE1(_spr_list             ,_param->_nb_bank);
+
+        DELETE1(internal_POP_ACK      ,_param->_nb_pop);
+        DELETE1(internal_POP_GPR_BANK ,_param->_nb_pop);
+        DELETE1(internal_POP_SPR_BANK ,_param->_nb_pop);
+
+        DELETE1(internal_PUSH_GPR_ACK ,_param->_nb_push);
+        DELETE1(internal_PUSH_SPR_ACK ,_param->_nb_push);
+        DELETE1(internal_PUSH_GPR_BANK,_param->_nb_push);
+        DELETE1(internal_PUSH_SPR_BANK,_param->_nb_push);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp	(revision 112)
@@ -51,5 +51,6 @@
 
 #ifdef STATISTICS
-              (*_stat_nb_inst_pop) ++;
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_inst_pop) ++;
 #endif
 
@@ -57,5 +58,6 @@
                 {
 #ifdef STATISTICS
-                  (*_stat_nb_inst_pop_gpr) ++;
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_pop_gpr) ++;
 #endif
                   _gpr_list [internal_POP_GPR_BANK[i]].pop_front();
@@ -65,5 +67,6 @@
                 {
 #ifdef STATISTICS
-                  (*_stat_nb_inst_pop_spr) ++;
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_pop_spr) ++;
 #endif
                   _spr_list [internal_POP_SPR_BANK[i]].pop_front();
@@ -82,5 +85,6 @@
 
 #ifdef STATISTICS
-              (*_stat_nb_inst_push_gpr) ++;
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_inst_push_gpr) ++;
 #endif
 
@@ -98,5 +102,6 @@
 
 #ifdef STATISTICS
-              (*_stat_nb_inst_push_spr) ++;
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_inst_push_spr) ++;
 #endif
 
@@ -105,6 +110,8 @@
 
 #ifdef STATISTICS
-          for (uint32_t i=0; i<_param->_nb_bank; ++i)
-            {
+        if (usage_is_set(_usage,USE_STATISTICS))
+          for (uint32_t i=0; i<_param->_nb_bank; ++i)
+            {
+              
               (*(_stat_bank_gpr_nb_elt [i])) += _gpr_list[i].size();
               (*(_stat_bank_spr_nb_elt [i])) += _spr_list[i].size();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp	(revision 112)
@@ -89,4 +89,5 @@
   ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,"out_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,"out_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE           ,"out_RETIRE_RESTORE           ",Tcontrol_t        ,_param->_nb_inst_retire);
 
   ALLOC2_SC_SIGNAL( in_RETIRE_EVENT_VAL         ," in_RETIRE_EVENT_VAL         ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -147,4 +148,5 @@
   INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE           ,_param->_nb_inst_retire);
 
   INSTANCE2_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_EVENT_VAL         ,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -540,4 +542,5 @@
   delete [] out_RETIRE_RESTORE_RD_PHY_OLD;
   delete [] out_RETIRE_RESTORE_RE_PHY_OLD;
+  delete [] out_RETIRE_RESTORE           ;
 
   DELETE2_SC_SIGNAL( in_RETIRE_EVENT_VAL            ,_param->_nb_front_end, _param->_nb_context[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 112)
@@ -104,4 +104,5 @@
   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire]
+  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_RESTORE           ;//[nb_inst_retire]
 
     // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -126,4 +127,7 @@
   private   : bool                        *** internal_rat_gpr_update_table;         //[nb_front_end][nb_context][nb_general_register_logic]
   private   : bool                        *** internal_rat_spr_update_table;         //[nb_front_end][nb_context][nb_special_register_logic]
+  public    : Tcontrol_t                    * internal_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
+  public    : Tcontrol_t                    * internal_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire]
+
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 112)
@@ -59,5 +59,5 @@
     // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("rename",IN,EAST,"Input to rename source logical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("rename",IN,EAST,_("Input to rename source logical register"), _param->_nb_inst_insert);
 
       ALLOC1_VALACK_IN ( in_RENAME_VAL               , VAL);
@@ -75,9 +75,11 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register);
       ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
     
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",IN,NORTH,"Input to rename destination logical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",IN,NORTH,_("Input to rename destination logical register"), _param->_nb_inst_insert);
       
       ALLOC1_VALACK_IN ( in_INSERT_VAL           ,VAL);
@@ -91,9 +93,11 @@
       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY,"num_reg_rd_phy",Tgeneral_address_t,_param->_size_general_register);
       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY,"num_reg_re_phy",Tspecial_address_t,_param->_size_special_register);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
     
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire",IN,NORTH,"Input to update on event", _param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire",IN,NORTH,_("Input to update on event"), _param->_nb_inst_retire);
 
       ALLOC1_VALACK_IN ( in_RETIRE_VAL               ,VAL);
@@ -109,13 +113,18 @@
       ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RD_PHY_OLD,"restore_rd_phy_old",Tcontrol_t        ,1);
       ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RE_PHY_OLD,"restore_re_phy_old",Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE           ,"restore"           ,Tcontrol_t        ,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL        ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK        ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE      ,"state"             ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
@@ -127,30 +136,13 @@
     ALLOC2(internal_RETIRE_EVENT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
 
-    rat_gpr                       = new Tgeneral_address_t ** [_param->_nb_front_end];
-    rat_spr                       = new Tspecial_address_t ** [_param->_nb_front_end];
-    rat_gpr_update_table          = new bool               ** [_param->_nb_front_end];
-    rat_spr_update_table          = new bool               ** [_param->_nb_front_end];
-    internal_rat_gpr_update_table = new bool               ** [_param->_nb_front_end];
-    internal_rat_spr_update_table = new bool               ** [_param->_nb_front_end];
+    ALLOC3(rat_gpr                      ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+    ALLOC3(rat_spr                      ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+    ALLOC3(rat_gpr_update_table         ,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+    ALLOC3(rat_spr_update_table         ,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+    ALLOC3(internal_rat_gpr_update_table,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+    ALLOC3(internal_rat_spr_update_table,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
 
-    for (uint32_t i=0; i<_param->_nb_front_end; i++)
-      {
-	rat_gpr                       [i] = new Tgeneral_address_t * [_param->_nb_context[i]];
-	rat_spr                       [i] = new Tspecial_address_t * [_param->_nb_context[i]];
-	rat_gpr_update_table          [i] = new bool               * [_param->_nb_context[i]];
-	rat_spr_update_table          [i] = new bool               * [_param->_nb_context[i]];
-	internal_rat_gpr_update_table [i] = new bool               * [_param->_nb_context[i]];
-	internal_rat_spr_update_table [i] = new bool               * [_param->_nb_context[i]];
-
-	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
-	  {
-	    rat_gpr                       [i][j] = new Tgeneral_address_t [_param->_nb_general_register_logic];
-	    rat_spr                       [i][j] = new Tspecial_address_t [_param->_nb_special_register_logic];
-	    rat_gpr_update_table          [i][j] = new bool               [_param->_nb_general_register_logic];
-	    rat_spr_update_table          [i][j] = new bool               [_param->_nb_special_register_logic];
-	    internal_rat_gpr_update_table [i][j] = new bool               [_param->_nb_general_register_logic];
-	    internal_rat_spr_update_table [i][j] = new bool               [_param->_nb_special_register_logic];
-	  }
-      }
+    ALLOC1(internal_RETIRE_RESTORE_RD_PHY_OLD,Tcontrol_t,_param->_nb_inst_retire);
+    ALLOC1(internal_RETIRE_RESTORE_RE_PHY_OLD,Tcontrol_t,_param->_nb_inst_retire);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 112)
@@ -30,48 +30,47 @@
 	delete     in_NRESET;
 
-  	delete []  in_RENAME_VAL             ;
-  	delete [] out_RENAME_ACK             ;
-	if (_param->_have_port_front_end_id)
-  	delete []  in_RENAME_FRONT_END_ID    ;
-	if (_param->_have_port_context_id)
-  	delete []  in_RENAME_CONTEXT_ID      ;
-  	delete []  in_RENAME_NUM_REG_RA_LOG  ;
-  	delete []  in_RENAME_NUM_REG_RB_LOG  ;
-	delete []  in_RENAME_NUM_REG_RC_LOG  ;
-  	delete []  in_RENAME_NUM_REG_RD_LOG  ;
-	delete []  in_RENAME_NUM_REG_RE_LOG  ;
-  	delete [] out_RENAME_NUM_REG_RA_PHY  ;
-  	delete [] out_RENAME_NUM_REG_RB_PHY  ;
-  	delete [] out_RENAME_NUM_REG_RC_PHY  ;
-  	delete [] out_RENAME_NUM_REG_RD_PHY_OLD;
-  	delete [] out_RENAME_NUM_REG_RE_PHY_OLD;
+        DELETE1_SIGNAL( in_RENAME_VAL               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_RENAME_ACK               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_RENAME_FRONT_END_ID      ,_param->_nb_inst_insert,_param->_size_front_end_id);
+        DELETE1_SIGNAL( in_RENAME_CONTEXT_ID        ,_param->_nb_inst_insert,_param->_size_context_id  );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RA_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RB_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RC_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RD_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RE_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_RENAME_NUM_REG_RA_PHY    ,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL(out_RENAME_NUM_REG_RB_PHY    ,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL(out_RENAME_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register);
+        DELETE1_SIGNAL(out_RENAME_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL(out_RENAME_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register);
 
-  	delete []  in_INSERT_VAL             ;
-  	delete [] out_INSERT_ACK             ;
-// 	if (_param->_have_port_front_end_id)
-//	delete []  in_INSERT_FRONT_END_ID    ;
-// 	if (_param->_have_port_context_id)
-//	delete []  in_INSERT_CONTEXT_ID      ;
-  	delete []  in_INSERT_WRITE_RD        ;
-  	delete []  in_INSERT_WRITE_RE        ;
-  	delete []  in_INSERT_NUM_REG_RD_LOG  ;
-	delete []  in_INSERT_NUM_REG_RE_LOG  ;
-  	delete []  in_INSERT_NUM_REG_RD_PHY  ;
-  	delete []  in_INSERT_NUM_REG_RE_PHY  ;
+        DELETE1_SIGNAL( in_INSERT_VAL           ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_ACK           ,_param->_nb_inst_insert,1);
+//      DELETE1_SIGNAL( in_INSERT_FRONT_END_ID  ,_param->_nb_inst_insert,_param->_size_front_end_id);
+//      DELETE1_SIGNAL( in_INSERT_CONTEXT_ID    ,_param->_nb_inst_insert,_param->_size_context_id  );
+        DELETE1_SIGNAL( in_INSERT_WRITE_RD      ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_WRITE_RE      ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY,_param->_nb_inst_insert,_param->_size_special_register);
 
-  	delete []  in_RETIRE_VAL               ;
-  	delete [] out_RETIRE_ACK               ;
-	if (_param->_have_port_front_end_id)
-  	delete []  in_RETIRE_FRONT_END_ID      ;
-  	if (_param->_have_port_context_id)
-	delete []  in_RETIRE_CONTEXT_ID        ;
-  	delete []  in_RETIRE_WRITE_RD          ;
-  	delete []  in_RETIRE_WRITE_RE          ;
-  	delete []  in_RETIRE_NUM_REG_RD_LOG    ;
-	delete []  in_RETIRE_NUM_REG_RE_LOG    ;
-  	delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
-  	delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
-  	delete [] out_RETIRE_RESTORE_RD_PHY_OLD;
-  	delete [] out_RETIRE_RESTORE_RE_PHY_OLD;
+        DELETE1_SIGNAL( in_RETIRE_VAL               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_ACK               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID      ,_param->_nb_inst_retire,_param->_size_front_end_id);
+        DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID        ,_param->_nb_inst_retire,_param->_size_context_id  );
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RE          ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG    ,_param->_nb_inst_retire,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG    ,_param->_nb_inst_retire,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire,_param->_size_general_register);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire,_param->_size_special_register);
+        DELETE1_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_RESTORE           ,_param->_nb_inst_retire,1);
+
+        DELETE2_SIGNAL( in_RETIRE_EVENT_VAL            ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL(out_RETIRE_EVENT_ACK            ,_param->_nb_front_end, _param->_nb_context[it1],1);
+        DELETE2_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state);
 
         DELETE1(internal_RENAME_ACK                    ,_param->_nb_inst_insert);
@@ -80,14 +79,13 @@
         DELETE2(internal_RETIRE_EVENT_ACK              ,_param->_nb_front_end,_param->_nb_context[it1]);
 
-        DELETE2_SIGNAL( in_RETIRE_EVENT_VAL            ,_param->_nb_front_end, _param->_nb_context[it1],1);
-        DELETE2_SIGNAL(out_RETIRE_EVENT_ACK            ,_param->_nb_front_end, _param->_nb_context[it1],1);
-        DELETE2_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state);
+        DELETE3(rat_gpr                      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+        DELETE3(rat_spr                      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+        DELETE3(rat_gpr_update_table         ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+        DELETE3(rat_spr_update_table         ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+        DELETE3(internal_rat_gpr_update_table,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+        DELETE3(internal_rat_spr_update_table,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
         
-        delete [] rat_gpr             ;
-        delete [] rat_spr             ;
-        delete [] rat_gpr_update_table;
-        delete [] rat_spr_update_table;
-        delete [] internal_rat_gpr_update_table;
-        delete [] internal_rat_spr_update_table;
+        DELETE1(internal_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
+        DELETE1(internal_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp	(revision 112)
@@ -31,9 +31,16 @@
         {
           // An event occure
-          bool no_event = not (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) and (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT));
+          // bool event = (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) != EVENT_STATE_NO_EVENT);
+          bool reset_update_table = (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and // always ack
+                                     (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT));
+
+          // not event -> update_table == 1 -> always update
+          // event     -> update_table and not reset
           for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k)
-            internal_rat_gpr_update_table [i][j][k] = rat_gpr_update_table [i][j][k] and no_event;
+            internal_rat_gpr_update_table [i][j][k] = // not event or 
+                                                      (rat_gpr_update_table [i][j][k] and not reset_update_table);
           for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k)
-            internal_rat_spr_update_table [i][j][k] = rat_spr_update_table [i][j][k] and no_event;
+            internal_rat_spr_update_table [i][j][k] = // not event or 
+                                                      (rat_spr_update_table [i][j][k] and not reset_update_table);
         }
 
@@ -50,7 +57,8 @@
         Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0;
         Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RETIRE_CONTEXT_ID   [i]):0;
+        Tcontrol_t restore      = (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) != EVENT_STATE_NO_EVENT);
 
         // Test if event -> need restore ?
-        if (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) != EVENT_STATE_NO_EVENT)
+        if (restore)
           {
             log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * Have event");
@@ -82,7 +90,11 @@
             log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * restore_re_phy_old   : %d",retire_restore_re_phy_old);
           }
+
+        internal_RETIRE_RESTORE_RD_PHY_OLD[i] = retire_restore_rd_phy_old;
+        internal_RETIRE_RESTORE_RE_PHY_OLD[i] = retire_restore_re_phy_old;
               
-        PORT_WRITE(out_RETIRE_RESTORE_RD_PHY_OLD[i], retire_restore_rd_phy_old);
-        PORT_WRITE(out_RETIRE_RESTORE_RE_PHY_OLD[i], retire_restore_re_phy_old);
+        PORT_WRITE(out_RETIRE_RESTORE_RD_PHY_OLD[i], internal_RETIRE_RESTORE_RD_PHY_OLD[i]);
+        PORT_WRITE(out_RETIRE_RESTORE_RE_PHY_OLD[i], internal_RETIRE_RESTORE_RE_PHY_OLD[i]);
+        PORT_WRITE(out_RETIRE_RESTORE           [i], restore);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp	(revision 112)
@@ -125,16 +125,23 @@
               log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * event_state  : %d",event_state);
 
-	      if (event_state != EVENT_STATE_NO_EVENT)
-		{
+// 	      if (event_state != EVENT_STATE_NO_EVENT)
+// 		{
  		  // Test if write and have not a previous update
 		  if (PORT_READ(in_RETIRE_WRITE_RD [i]) == 1)
 		    {
 		      Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]);
-		      
+                      
 		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * retire RD");
 		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * rd_log       : %d",rd_log);
 		      
-// 		      if (RETIRE_RESTORE_RD_PHY_OLD [i])
-		      if (rat_gpr_update_table [front_end_id][context_id][rd_log] == 0)
+// #ifdef DEBUG_TEST
+//                       if (not (internal_RETIRE_RESTORE_RD_PHY_OLD [i] and ( (rat_gpr_update_table [front_end_id][context_id][rd_log] == 0)) and (event_state != EVENT_STATE_NO_EVENT)))
+//                         throw ERRORMORPHEO(FUNCTION,toString(_("restore_rd_phy_old [%d] = %d, but rat_gpr_update_table[%d][%d][%d] = %d\n"),
+//                                                              i,internal_RETIRE_RESTORE_RD_PHY_OLD [i],
+//                                                              front_end_id,context_id,rd_log,rat_gpr_update_table [front_end_id][context_id][rd_log]));
+// #endif
+
+ 		      if (internal_RETIRE_RESTORE_RD_PHY_OLD [i])
+// 		      if (rat_gpr_update_table [front_end_id][context_id][rd_log] == 0)
 			{                      
 			  rat_gpr              [front_end_id][context_id][rd_log] = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]);
@@ -150,6 +157,13 @@
 		      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * re_log       : %d",re_log);
 
-// 		      if (RETIRE_RESTORE_RE_PHY_OLD [i])
-		      if (rat_spr_update_table [front_end_id][context_id][re_log] == 0)
+// #ifdef DEBUG_TEST
+//                       if (not (internal_RETIRE_RESTORE_RE_PHY_OLD [i] and ((rat_spr_update_table [front_end_id][context_id][re_log] == 0) and (event_state != EVENT_STATE_NO_EVENT))))
+//                         throw ERRORMORPHEO(FUNCTION,toString(_("restore_re_phy_old [%d] = %d, but rat_spr_update_table[%d][%d][%d] = %d\n"),
+//                                                              i,internal_RETIRE_RESTORE_RE_PHY_OLD [i],
+//                                                              front_end_id,context_id,re_log,rat_spr_update_table [front_end_id][context_id][re_log]));
+// #endif
+
+ 		      if (internal_RETIRE_RESTORE_RE_PHY_OLD [i])
+// 		      if (rat_spr_update_table [front_end_id][context_id][re_log] == 0)
 			{                      
 			  rat_spr              [front_end_id][context_id][re_log] = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]);
@@ -157,5 +171,5 @@
 			}
 		    }
-		}
+// 		}
 	    }
       }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 112)
@@ -49,5 +49,5 @@
 							 ,IN
 							 ,SOUTH,
-							 "Generalist interface"
+							 _("Generalist interface")
 #endif
 							 );
@@ -59,5 +59,5 @@
     // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT, EAST, "insert's interface", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT, EAST, _("insert's interface"), _param->_nb_inst_insert);
       
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_VAL        ,"rename_val"        ,Tcontrol_t,1);
@@ -122,9 +122,11 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD                    ,"NUM_REG_RE_PHY_OLD"                    ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW                    ,"NUM_REG_RE_PHY_NEW"                    ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire", IN, WEST, "retire's interface", _param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire", IN, WEST, _("retire's interface"), _param->_nb_inst_retire);
       
       ALLOC1_SIGNAL_IN ( in_RETIRE_VAL          ,"val"          ,Tcontrol_t,1);
@@ -134,8 +136,11 @@
       ALLOC1_SIGNAL_OUT(out_RETIRE_STAT_LIST_VAL,"stat_list_val",Tcontrol_t,1);
       ALLOC1_SIGNAL_IN ( in_RETIRE_STAT_LIST_ACK,"stat_list_ack",Tcontrol_t,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
 
 #ifdef STATISTICS
-    ALLOC1(internal_INSERT_RENAME_ACK, Tcontrol_t,_param->_nb_inst_insert);
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      ALLOC1(internal_INSERT_RENAME_ACK, Tcontrol_t,_param->_nb_inst_insert);
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-min.cfg	(revision 112)
@@ -8,3 +8,2 @@
 1	1	*4	#nb_reg_free        
 1	1	*2	#nb_bank            
-1	1	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1.cfg	(revision 112)
@@ -8,3 +8,2 @@
 1	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-1	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_1a.cfg	(revision 112)
@@ -8,3 +8,2 @@
 1	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-1	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4a.cfg	(revision 112)
@@ -11,3 +11,2 @@
 4	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4b.cfg	(revision 112)
@@ -8,3 +8,2 @@
 4	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4c.cfg	(revision 112)
@@ -9,3 +9,2 @@
 4	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/config-thread_4d.cfg	(revision 112)
@@ -9,3 +9,2 @@
 4	4	*4	#nb_reg_free        
 8	8	*2	#nb_bank            
-2	2	*2	#size_read_counter  
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/src/main.cpp	(revision 112)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/SelfTest/include/test.h"
 
-#define NB_PARAMS 8
+#define NB_PARAMS 7
 
 void usage (int argc, char * argv[])
@@ -22,5 +22,5 @@
   err (_(" * nb_reg_free                        (uint32_t)\n"));
   err (_(" * nb_bank                            (uint32_t)\n"));
-  err (_(" * size_read_counter                  (uint32_t)\n"));
+//   err (_(" * size_read_counter                  (uint32_t)\n"));
 
   exit (1);
@@ -51,5 +51,5 @@
   uint32_t   _nb_reg_free         = atoi(argv[x++]);
   uint32_t   _nb_bank             = atoi(argv[x++]);
-  uint32_t   _size_read_counter   = atoi(argv[x++]);
+//   uint32_t   _size_read_counter   = atoi(argv[x++]);
 
   int _return = EXIT_SUCCESS;
@@ -65,5 +65,5 @@
 	 _nb_reg_free           ,
 	 _nb_bank               ,
-	 _size_read_counter     ,
+// 	 _size_read_counter     ,
          true //is_toplevel
          );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_mono_thread.cfg	(revision 112)
@@ -8,3 +8,2 @@
 1	4	*2	#_nb_reg_free           
 4	4	*2	#_nb_bank               
-2	2	+1	#_size_counter
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/config_multi_thread.cfg	(revision 112)
@@ -9,3 +9,2 @@
 4	4	*2	#_nb_reg_free           
 4	8	*2	#_nb_bank               
-2	4	*2	#_size_counter
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/main.cpp	(revision 112)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h"
 
-#define NB_PARAMS 8
+#define NB_PARAMS 7
 
 void usage (int argc, char * argv[])
@@ -22,5 +22,4 @@
   err (_(" * nb_reg_free                        (uint32_t)\n"));
   err (_(" * nb_bank                            (uint32_t)\n"));
-  err (_(" * size_counter                       (uint32_t)\n"));
 
   exit (1);
@@ -55,5 +54,4 @@
   uint32_t   _nb_reg_free           = atoi(argv[x++]);
   uint32_t   _nb_bank               = atoi(argv[x++]);
-  uint32_t   _size_counter          = atoi(argv[x++]);
 
   try 
@@ -68,5 +66,4 @@
 	 _nb_reg_free           ,
 	 _nb_bank               ,
-	 _size_counter          ,
          true //is_toplevel
          );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 112)
@@ -75,4 +75,5 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_VAL               ," in_RETIRE_VAL               ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL(out_RETIRE_ACK               ,"out_RETIRE_ACK               ",Tcontrol_t        ,_param->_nb_inst_retire);
+  ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE           ," in_RETIRE_RESTORE           ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA           ," in_RETIRE_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ," in_RETIRE_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
@@ -121,4 +122,5 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_VAL               ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK               ,_param->_nb_inst_retire);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE           ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA           ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire);
@@ -234,6 +236,7 @@
 		  TEST(bool, true,((gpr_status[reg]._is_free  == 0) and
 				   (gpr_status[reg]._is_link  == 0) and
-				   (gpr_status[reg]._is_valid == 1) and
-				   (gpr_status[reg]._counter  == 0)));
+				   (gpr_status[reg]._is_valid == 1)//  and
+// 				   (gpr_status[reg]._counter  == 0)
+                                   ));
 
 		  gpr_status[reg]._is_free = 1;
@@ -254,6 +257,7 @@
 		  TEST(bool, true,((spr_status[reg]._is_free  == 0) and
 				   (spr_status[reg]._is_link  == 0) and
-				   (spr_status[reg]._is_valid == 1) and
-				   (spr_status[reg]._counter  == 0)));
+				   (spr_status[reg]._is_valid == 1)//  and
+// 				   (spr_status[reg]._counter  == 0)
+                                   ));
 
 		  spr_status[reg]._is_free = 1;
@@ -301,7 +305,7 @@
 	      Tspecial_address_t re       = (it_spr != free_list_spr.end())?*it_spr:0;
 
-	      Tcontrol_t         read_ra  = (gpr_status_insert[ra]._is_link) and (gpr_status_insert[ra]._counter < _param->_max_reader);
-	      Tcontrol_t         read_rb  = (gpr_status_insert[rb]._is_link) and (gpr_status_insert[rb]._counter < _param->_max_reader);
-	      Tcontrol_t         read_rc  = (spr_status_insert[rc]._is_link) and (spr_status_insert[rc]._counter < _param->_max_reader);
+	      Tcontrol_t         read_ra  = (gpr_status_insert[ra]._is_link); // and (gpr_status_insert[ra]._counter < _param->_max_reader);
+	      Tcontrol_t         read_rb  = (gpr_status_insert[rb]._is_link); // and (gpr_status_insert[rb]._counter < _param->_max_reader);
+	      Tcontrol_t         read_rc  = (spr_status_insert[rc]._is_link); // and (spr_status_insert[rc]._counter < _param->_max_reader);
 	      Tcontrol_t         write_rd = (it_gpr != free_list_gpr.end());
 	      Tcontrol_t         write_re = (it_spr != free_list_spr.end());
@@ -341,7 +345,7 @@
 	      Tspecial_address_t re_new   = (rand()%(_param->_nb_special_register  ))  ;
 
-	      Tcontrol_t         read_ra  = (gpr_status_retire[ra]._is_link) and (gpr_status_retire[ra]._counter > 0);
-	      Tcontrol_t         read_rb  = (gpr_status_retire[rb]._is_link) and (gpr_status_retire[rb]._counter > 0);
-	      Tcontrol_t         read_rc  = (spr_status_retire[rc]._is_link) and (spr_status_retire[rc]._counter > 0);
+	      Tcontrol_t         read_ra  = (gpr_status_retire[ra]._is_link); // and (gpr_status_retire[ra]._counter > 0);
+	      Tcontrol_t         read_rb  = (gpr_status_retire[rb]._is_link); // and (gpr_status_retire[rb]._counter > 0);
+	      Tcontrol_t         read_rc  = (spr_status_retire[rc]._is_link); // and (spr_status_retire[rc]._counter > 0);
 	      Tcontrol_t         write_rd = (    (gpr_status_retire[rd_old]._is_link ) and 
 					         (gpr_status_retire[rd_old]._is_valid) and
@@ -355,5 +359,6 @@
 	      in_RETIRE_VAL                [i]->write((rand()%100) < percent_transaction_retire);
 	      in_RETIRE_READ_RA            [i]->write(read_ra );
-	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
+	      in_RETIRE_RESTORE            [i]->write(0);
+ 	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
 	      in_RETIRE_READ_RB            [i]->write(read_rb );
 	      in_RETIRE_NUM_REG_RB_PHY     [i]->write(rb);
@@ -502,4 +507,5 @@
 	    if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read())
 	      {
+		Tcontrol_t         restore        = in_RETIRE_RESTORE            [i]->read();
 		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
 		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
@@ -518,4 +524,5 @@
 
 		LABEL("RETIRE [%d] - Accepted",i);
+		LABEL(" * restore          : %d",restore);
 		LABEL(" * read_ra          : %d",read_ra );
 		LABEL(" * reg_ra           : %d",ra      );
@@ -575,9 +582,18 @@
 		if (write_rd)
 		  {
-                    if (restore_rd_old)
+                    if (restore)
                       {
-                        gpr_status[rd_old]._is_link  = 1;
-                        gpr_status[rd_new]._is_link  = 0;
-                        gpr_status[rd_new]._is_valid = 1;
+                        if (restore_rd_old)
+                          {
+                            gpr_status[rd_old]._is_link  = 1;
+                            gpr_status[rd_new]._is_link  = 0;
+                            gpr_status[rd_new]._is_valid = 1;
+                          }
+                        else
+                          {
+                            gpr_status[rd_old]._is_link  = 0;
+                            gpr_status[rd_new]._is_link  = 0;
+                            gpr_status[rd_new]._is_valid = 1;
+                          }
                       }
                     else
@@ -586,4 +602,5 @@
                         gpr_status[rd_new]._is_valid = 1;
                       }
+
 		  }
 		if (write_re)
@@ -619,6 +636,7 @@
 		  TEST(bool, true,((gpr_status[reg]._is_free  == 0) and
 				   (gpr_status[reg]._is_link  == 0) and
-				   (gpr_status[reg]._is_valid == 1) and
-				   (gpr_status[reg]._counter  == 0)));
+				   (gpr_status[reg]._is_valid == 1)//  and
+// 				   (gpr_status[reg]._counter  == 0)
+                                   ));
 
 		  gpr_status[reg]._is_free = 1;
@@ -639,6 +657,7 @@
 		  TEST(bool, true,((spr_status[reg]._is_free  == 0) and
 				   (spr_status[reg]._is_link  == 0) and
-				   (spr_status[reg]._is_valid == 1) and
-				   (spr_status[reg]._counter  == 0)));
+				   (spr_status[reg]._is_valid == 1)//  and
+// 				   (spr_status[reg]._counter  == 0)
+                                   ));
 
 		  spr_status[reg]._is_free = 1;
@@ -678,4 +697,5 @@
   delete []  in_RETIRE_VAL               ;
   delete [] out_RETIRE_ACK               ;
+  delete []  in_RETIRE_RESTORE           ;
   delete []  in_RETIRE_READ_RA           ;
   delete []  in_RETIRE_NUM_REG_RA_PHY    ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Parameters.h	(revision 112)
@@ -34,10 +34,10 @@
   public : uint32_t   _nb_reg_free           ;
   public : uint32_t   _nb_bank               ;
-  public : uint32_t   _size_counter          ;
+//public : uint32_t   _size_counter          ;
 
 //public : uint32_t   _size_general_register ;
 //public : uint32_t   _size_special_register ;
 		      
-  public : uint32_t   _max_reader            ;
+//public : uint32_t   _max_reader            ;
   public : uint32_t   _nb_gpr_use_init       ;
   public : uint32_t   _nb_spr_use_init       ;
@@ -63,5 +63,5 @@
 			uint32_t   nb_reg_free           ,
 			uint32_t   nb_bank               ,
-			uint32_t   size_counter          ,
+// 			uint32_t   size_counter          ,
                         bool       is_toplevel=false
                         );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 112)
@@ -79,4 +79,5 @@
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_VAL               ;//[nb_inst_retire]
   public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_ACK               ;//[nb_inst_retire]
+  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_RESTORE           ;//[nb_inst_retire]
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_READ_RA           ;//[nb_inst_retire]
   public    : SC_IN (Tgeneral_address_t)   **  in_RETIRE_NUM_REG_RA_PHY    ;//[nb_inst_retire]
@@ -110,8 +111,8 @@
   private   : stat_list_entry_t            ** spr_stat_list; //[nb_bank][nb_general_register_by_bank]
 
+  private   : uint32_t                        reg_GPR_PTR_FREE;
+  private   : uint32_t                        reg_SPR_PTR_FREE;
+
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  private   : uint32_t                        internal_GPR_PTR_FREE;
-  private   : uint32_t                        internal_SPR_PTR_FREE;
-
   private   : Tcontrol_t                    * internal_INSERT_ACK       ;//[nb_inst_insert]
   private   : Tcontrol_t                    * internal_RETIRE_ACK       ;//[nb_inst_retire]
@@ -154,5 +155,5 @@
   public  : void        transition                (void);
   public  : void        genMoore                  (void);
-  public  : void        genMealy                  (void);
+//public  : void        genMealy                  (void);
 #endif					       
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 112)
@@ -25,6 +25,6 @@
   public : bool     _is_free ; // set = is present in free list
   public : bool     _is_link ; // set = is present in rat
-  public : bool     _is_valid; // set = an instruction have write in this register
-  public : uint32_t _counter ; // number of register that must read this register
+//public : bool     _is_valid; // set = an instruction have write in this register
+//public : uint32_t _counter ; // number of register that must read this register
 
   public :  stat_list_entry_t (void) {};
@@ -35,42 +35,46 @@
       _is_free  = 0;
       _is_link  = is_link;
-      _is_valid = 1;
-      _counter  = 0;
+//    _is_valid = 1;
+//    _counter  = 0;
     }
 
-  public : void insert_read (void)
-    {
-      _counter ++;
-    }
+//   public : void insert_read (void)
+//     {
+//    _counter ++;
+//     }
+
   public : void insert_write (void)
     {
       _is_free  = 0;
       _is_link  = 1;
-      _is_valid = 0;
+//    _is_valid = 0;
     }
 
-  public : void retire_read (void)
+//   public : void retire_read (void)
+//     {
+//    _counter --;
+//     }
+
+  public : void retire_write_old (bool restore, bool restore_old)
     {
-      _counter --;
+      // restore restore_old is_link
+      // 0       x           0       - normal case : unallocate
+      // 1       0           0       - event and previous update
+      // 1       1           1       - event and first update
+      
+      _is_link = restore and restore_old;
     }
 
-  public : void retire_write_old (bool restore_old)
+  public : void retire_write_new (bool restore, bool restore_old)
     {
-      if (not restore_old)
-        {
-          _is_link  = 0;
-        }
-      // else nothing
-    }
+      // restore restore_old is_link
+      // 0       x           1       - normal case : allocate
+      // 1       x           0       - event, need restore oldest register
 
-  public : void retire_write_new (bool restore_old)
-    {
-      if (restore_old)
-        {
-          _is_link  = 0;
-        }
+      if (restore)
+        _is_link = 0;
 
       // in all case
-      _is_valid = 1;
+//    _is_valid = 1;
     }
 
@@ -80,15 +84,16 @@
     }
 
-  public : bool can_insert_read (uint32_t max_reader)
-    {
-      return ((_counter+1) < max_reader);
-    }
+//   public : bool can_insert_read (uint32_t max_reader)
+//     {
+//    return ((_counter+1) < max_reader);
+//     }
 
   public : bool can_free (void)
     {
       return ((_is_free  == 0) and
-	      (_is_link  == 0) and
-// 	      (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset
-	      (_counter  == 0));
+	      (_is_link  == 0) // and
+//  	      (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset
+// 	      (_counter  == 0)
+              );
     }
 
@@ -97,7 +102,8 @@
     {
       output << x._is_free  << " "
-             << x._is_link  << " "
-             << x._is_valid << " "
-             << x._counter;
+             << x._is_link  // << " "
+//           << x._is_valid  << " "
+//              << x._counter
+        ;
       
       return output;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters.cpp	(revision 112)
@@ -29,5 +29,5 @@
 			  uint32_t   nb_reg_free           ,
 			  uint32_t   nb_bank               ,
-			  uint32_t   size_counter          ,
+// 			  uint32_t   size_counter          ,
                           bool       is_toplevel)
   {
@@ -42,7 +42,7 @@
     _nb_reg_free            = nb_reg_free        ;
     _nb_bank                = nb_bank            ;
-    _size_counter           = size_counter       ;
+//  _size_counter           = size_counter       ;
 
-    _max_reader             = 1<<size_counter;
+//  _max_reader             = 1<<size_counter;
 
     uint32_t nb_thread = 0;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_print.cpp	(revision 112)
@@ -35,5 +35,5 @@
     xml.singleton_begin("nb_reg_free        "); xml.attribut("value",toString(_nb_reg_free        )); xml.singleton_end();
     xml.singleton_begin("nb_bank            "); xml.attribut("value",toString(_nb_bank            )); xml.singleton_end();
-    xml.singleton_begin("size_counter       "); xml.attribut("value",toString(_size_counter       )); xml.singleton_end();
+//     xml.singleton_begin("size_counter       "); xml.attribut("value",toString(_size_counter       )); xml.singleton_end();
 
     for (uint32_t i=0;i<_nb_front_end; i++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp	(revision 112)
@@ -75,4 +75,9 @@
       {
 	// Constant
+	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	  {
+	    internal_INSERT_ACK[i] = 1;
+	    PORT_WRITE(out_INSERT_ACK[i], internal_INSERT_ACK[i]);
+	  }
 	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 	  {
@@ -101,30 +106,30 @@
 # endif    
 
-	log_printf(INFO,Stat_List_unit,FUNCTION,"Method - genMealy");
+// 	log_printf(INFO,Stat_List_unit,FUNCTION,"Method - genMealy");
 
-	SC_METHOD (genMealy);
-	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg(); // need internal register
-	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-	  sensitive << (*(in_INSERT_READ_RA        [i]))
-		    << (*(in_INSERT_NUM_REG_RA_PHY [i]))
-		    << (*(in_INSERT_READ_RB        [i]))
-		    << (*(in_INSERT_NUM_REG_RB_PHY [i]))
-		    << (*(in_INSERT_READ_RC        [i]))
-		    << (*(in_INSERT_NUM_REG_RC_PHY [i]));
+// 	SC_METHOD (genMealy);
+// 	dont_initialize ();
+// 	sensitive << (*(in_CLOCK)).neg(); // need internal register
+// 	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+// 	  sensitive << (*(in_INSERT_READ_RA        [i]))
+// 		    << (*(in_INSERT_NUM_REG_RA_PHY [i]))
+// 		    << (*(in_INSERT_READ_RB        [i]))
+// 		    << (*(in_INSERT_NUM_REG_RB_PHY [i]))
+// 		    << (*(in_INSERT_READ_RC        [i]))
+// 		    << (*(in_INSERT_NUM_REG_RC_PHY [i]));
 
-# ifdef SYSTEMCASS_SPECIFIC
-	// List dependency information
+// # ifdef SYSTEMCASS_SPECIFIC
+// 	// List dependency information
 
-	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-	  {
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RA        [i]));
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RA_PHY [i]));
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RB        [i]));
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RB_PHY [i]));
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RC        [i]));
-	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RC_PHY [i]));
-	  }
-# endif    
+// 	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+// 	  {
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RA        [i]));
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RA_PHY [i]));
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RB        [i]));
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RB_PHY [i]));
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_READ_RC        [i]));
+// 	    (*(out_INSERT_ACK [i])) (*(in_INSERT_NUM_REG_RC_PHY [i]));
+// 	  }
+// # endif    
 	
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 112)
@@ -49,5 +49,5 @@
 							 ,IN
 							 ,SOUTH,
-							 "Generalist interface"
+							 _("Generalist interface")
 #endif
 							 );
@@ -58,5 +58,5 @@
      // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("insert",IN,SOUTH,"Insert a renaming result",_param->_nb_inst_insert);
+       ALLOC1_INTERFACE_BEGIN("insert",IN,SOUTH,_("Insert a renaming result"),_param->_nb_inst_insert);
 
        ALLOC1_VALACK_IN ( in_INSERT_VAL               ,VAL);
@@ -72,12 +72,15 @@
        ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE          ,"write_re"          ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
      }
 
      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("retire",IN,NORTH,"Retire a renaming result",_param->_nb_inst_retire);
+       ALLOC1_INTERFACE_BEGIN("retire",IN,NORTH,_("Retire a renaming result"),_param->_nb_inst_retire);
 
        ALLOC1_VALACK_IN ( in_RETIRE_VAL               ,VAL);
        ALLOC1_VALACK_OUT(out_RETIRE_ACK               ,ACK);
+       ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE           ,"restore"           ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA           ,"read_ra"           ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY    ,"num_reg_ra_phy"    ,Tgeneral_address_t,_param->_size_general_register);
@@ -94,22 +97,28 @@
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
      }
 
      // ~~~~~[ interface : "push_gpr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("push_gpr",OUT,SOUTH,"Free a general register",_param->_nb_reg_free);
+       ALLOC1_INTERFACE_BEGIN("push_gpr",OUT,SOUTH,_("Free a general register"),_param->_nb_reg_free);
 
        ALLOC1_VALACK_OUT(out_PUSH_GPR_VAL    ,VAL);
        ALLOC1_VALACK_IN ( in_PUSH_GPR_ACK    ,ACK);
        ALLOC1_SIGNAL_OUT(out_PUSH_GPR_NUM_REG,"num_reg",Tgeneral_address_t,_param->_size_general_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_reg_free);
      }
 
      // ~~~~~[ interface : "push_spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("push_spr",OUT,SOUTH,"Free a special register",_param->_nb_reg_free);
+       ALLOC1_INTERFACE_BEGIN("push_spr",OUT,SOUTH,_("Free a special register"),_param->_nb_reg_free);
 
        ALLOC1_VALACK_OUT(out_PUSH_SPR_VAL    ,VAL);
        ALLOC1_VALACK_IN ( in_PUSH_SPR_ACK    ,ACK);
        ALLOC1_SIGNAL_OUT(out_PUSH_SPR_NUM_REG,"num_reg",Tspecial_address_t,_param->_size_special_register);
+
+       ALLOC1_INTERFACE_END(_param->_nb_reg_free);
      }
 
@@ -117,19 +126,12 @@
     if (usage_is_set(_usage,USE_SYSTEMC))
       {
-     gpr_stat_list = new stat_list_entry_t * [_param->_nb_bank];
-     spr_stat_list = new stat_list_entry_t * [_param->_nb_bank];
-
-     for (uint32_t i=0; i<_param->_nb_bank; i++)
-       {
-	 gpr_stat_list [i] = new stat_list_entry_t [_param->_nb_general_register_by_bank];
-	 spr_stat_list [i] = new stat_list_entry_t [_param->_nb_special_register_by_bank];
-       }       
-
-     internal_INSERT_ACK        = new Tcontrol_t [_param->_nb_inst_insert];
-     internal_RETIRE_ACK        = new Tcontrol_t [_param->_nb_inst_retire];
-     internal_PUSH_GPR_VAL      = new Tcontrol_t [_param->_nb_reg_free];
-     internal_PUSH_GPR_NUM_BANK = new uint32_t   [_param->_nb_reg_free];
-     internal_PUSH_SPR_VAL      = new Tcontrol_t [_param->_nb_reg_free];
-     internal_PUSH_SPR_NUM_BANK = new uint32_t   [_param->_nb_reg_free];
+     ALLOC2(gpr_stat_list,stat_list_entry_t,_param->_nb_bank,_param->_nb_general_register_by_bank);
+     ALLOC2(spr_stat_list,stat_list_entry_t,_param->_nb_bank,_param->_nb_special_register_by_bank);
+     ALLOC1(internal_INSERT_ACK       ,Tcontrol_t,_param->_nb_inst_insert);
+     ALLOC1(internal_RETIRE_ACK       ,Tcontrol_t,_param->_nb_inst_retire);
+     ALLOC1(internal_PUSH_GPR_VAL     ,Tcontrol_t,_param->_nb_reg_free);
+     ALLOC1(internal_PUSH_GPR_NUM_BANK,uint32_t  ,_param->_nb_reg_free);
+     ALLOC1(internal_PUSH_SPR_VAL     ,Tcontrol_t,_param->_nb_reg_free);
+     ALLOC1(internal_PUSH_SPR_NUM_BANK,uint32_t  ,_param->_nb_reg_free);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 112)
@@ -7,4 +7,5 @@
 
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -29,55 +30,52 @@
 	delete     in_NRESET;
 
-	delete []  in_INSERT_VAL               ;
-	delete [] out_INSERT_ACK               ;
-	delete []  in_INSERT_READ_RA           ;
-	delete []  in_INSERT_NUM_REG_RA_PHY    ;
-	delete []  in_INSERT_READ_RB           ;
-	delete []  in_INSERT_NUM_REG_RB_PHY    ;
-	delete []  in_INSERT_READ_RC           ;
-	delete []  in_INSERT_NUM_REG_RC_PHY    ;
-	delete []  in_INSERT_WRITE_RD          ;
-	delete []  in_INSERT_NUM_REG_RD_PHY_NEW;
-	delete []  in_INSERT_WRITE_RE          ;
-	delete []  in_INSERT_NUM_REG_RE_PHY_NEW;
+        DELETE1_SIGNAL( in_INSERT_VAL               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_ACK               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_READ_RA           ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL( in_INSERT_READ_RB           ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL( in_INSERT_READ_RC           ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register);
+        DELETE1_SIGNAL( in_INSERT_WRITE_RD          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register);
+        DELETE1_SIGNAL( in_INSERT_WRITE_RE          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register);
 
-	delete []  in_RETIRE_VAL               ;
-	delete [] out_RETIRE_ACK               ;
-	delete []  in_RETIRE_READ_RA           ;
-	delete []  in_RETIRE_NUM_REG_RA_PHY    ;
-	delete []  in_RETIRE_READ_RB           ;
-	delete []  in_RETIRE_NUM_REG_RB_PHY    ;
-	delete []  in_RETIRE_READ_RC           ;
-	delete []  in_RETIRE_NUM_REG_RC_PHY    ;
-	delete []  in_RETIRE_WRITE_RD          ;
-	delete []  in_RETIRE_RESTORE_RD_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RD_PHY_NEW;
-	delete []  in_RETIRE_WRITE_RE          ;
-	delete []  in_RETIRE_RESTORE_RE_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RE_PHY_NEW;
+        DELETE1_SIGNAL( in_RETIRE_VAL               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_ACK               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_RESTORE           ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_READ_RA           ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire,_param->_size_general_register);
+        DELETE1_SIGNAL( in_RETIRE_READ_RB           ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire,_param->_size_general_register);
+        DELETE1_SIGNAL( in_RETIRE_READ_RC           ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire,_param->_size_special_register);
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire,_param->_size_general_register);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register);
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RE          ,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire,1                             );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire,_param->_size_special_register);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register);
 
-	delete [] out_PUSH_GPR_VAL             ;
-	delete []  in_PUSH_GPR_ACK             ;
+        DELETE1_SIGNAL(out_PUSH_GPR_VAL    ,_param->_nb_reg_free,1);
+        DELETE1_SIGNAL( in_PUSH_GPR_ACK    ,_param->_nb_reg_free,1);
+        DELETE1_SIGNAL(out_PUSH_GPR_NUM_REG,_param->_nb_reg_free,_param->_size_general_register);
 
-	delete [] out_PUSH_GPR_NUM_REG         ;
-	delete [] out_PUSH_SPR_VAL             ;
-	delete []  in_PUSH_SPR_ACK             ;
-	delete [] out_PUSH_SPR_NUM_REG         ;
-    
-        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-    
-        delete [] gpr_stat_list;
-        delete [] spr_stat_list;
-        
-        delete [] internal_INSERT_ACK       ;
-        delete [] internal_RETIRE_ACK       ;
-        delete [] internal_PUSH_GPR_VAL     ;
-        delete [] internal_PUSH_GPR_NUM_BANK;
-        delete [] internal_PUSH_SPR_VAL     ;
-        delete [] internal_PUSH_SPR_NUM_BANK;
+        DELETE1_SIGNAL(out_PUSH_SPR_VAL    ,_param->_nb_reg_free,1);
+        DELETE1_SIGNAL( in_PUSH_SPR_ACK    ,_param->_nb_reg_free,1);
+        DELETE1_SIGNAL(out_PUSH_SPR_NUM_REG,_param->_nb_reg_free,_param->_size_special_register);
+
+        DELETE2(gpr_stat_list             ,_param->_nb_bank,_param->_nb_general_register_by_bank);
+        DELETE2(spr_stat_list             ,_param->_nb_bank,_param->_nb_special_register_by_bank);
+        DELETE1(internal_INSERT_ACK       ,_param->_nb_inst_insert);
+        DELETE1(internal_RETIRE_ACK       ,_param->_nb_inst_retire);
+        DELETE1(internal_PUSH_GPR_VAL     ,_param->_nb_reg_free);
+        DELETE1(internal_PUSH_GPR_NUM_BANK,_param->_nb_reg_free);
+        DELETE1(internal_PUSH_SPR_VAL     ,_param->_nb_reg_free);
+        DELETE1(internal_PUSH_SPR_NUM_BANK,_param->_nb_reg_free);
       }
-
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMealy.cpp	(revision 112)
@@ -19,45 +19,45 @@
 
 
-#undef  FUNCTION
-#define FUNCTION "Stat_List_unit::genMealy"
-  void Stat_List_unit::genMealy (void)
-  {
-    log_begin(Stat_List_unit,FUNCTION);
-    log_function(Stat_List_unit,FUNCTION,_name.c_str());
+// #undef  FUNCTION
+// #define FUNCTION "Stat_List_unit::genMealy"
+//   void Stat_List_unit::genMealy (void)
+//   {
+//     log_begin(Stat_List_unit,FUNCTION);
+//     log_function(Stat_List_unit,FUNCTION,_name.c_str());
 
-    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-      {
-	bool ack = true;
+//     for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+//       {
+// 	bool ack = true;
 
-	if (PORT_READ(in_INSERT_READ_RA [i]))
-	  {
-	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]);
-	    uint32_t bank = num_reg >> _param->_shift_gpr;
-	    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-	    ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
-	  }
+// 	if (PORT_READ(in_INSERT_READ_RA [i]))
+// 	  {
+// 	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]);
+// 	    uint32_t bank = num_reg >> _param->_shift_gpr;
+// 	    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 	    ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
+// 	  }
 
-	if (PORT_READ(in_INSERT_READ_RB [i]))
-	  {
-	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]);
-	    uint32_t bank = num_reg >> _param->_shift_gpr;
-	    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-	    ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
-	  }
+// 	if (PORT_READ(in_INSERT_READ_RB [i]))
+// 	  {
+// 	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]);
+// 	    uint32_t bank = num_reg >> _param->_shift_gpr;
+// 	    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 	    ack &= gpr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
+// 	  }
 
-	if (PORT_READ(in_INSERT_READ_RC [i]))
-	  {
-	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]);
-	    uint32_t bank = num_reg >> _param->_shift_spr;
-	    uint32_t reg  = num_reg  & _param->_mask_spr ;
-	    ack &= spr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
-	  }
+// 	if (PORT_READ(in_INSERT_READ_RC [i]))
+// 	  {
+// 	    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]);
+// 	    uint32_t bank = num_reg >> _param->_shift_spr;
+// 	    uint32_t reg  = num_reg  & _param->_mask_spr ;
+// 	    ack &= spr_stat_list [bank][reg].can_insert_read(_param->_max_reader);
+// 	  }
 
-	internal_INSERT_ACK [i] = ack;
-	PORT_WRITE(out_INSERT_ACK [i], ack);
-      }
+// 	internal_INSERT_ACK [i] = ack;
+// 	PORT_WRITE(out_INSERT_ACK [i], ack);
+//       }
     
-    log_end(Stat_List_unit,FUNCTION);
-  };
+//     log_end(Stat_List_unit,FUNCTION);
+//   };
 
 }; // end namespace stat_list_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp	(revision 112)
@@ -26,6 +26,6 @@
     log_function(Stat_List_unit,FUNCTION,_name.c_str());
 
-    uint32_t gpr_ptr = internal_GPR_PTR_FREE;
-    uint32_t spr_ptr = internal_SPR_PTR_FREE;
+    uint32_t gpr_ptr = reg_GPR_PTR_FREE;
+    uint32_t spr_ptr = reg_SPR_PTR_FREE;
 
     for (uint32_t i=0; i<_param->_nb_reg_free; i++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 112)
@@ -38,6 +38,6 @@
 	      spr_stat_list [i][j].reset((spr++)<_param->_nb_spr_use_init);
 	  }
-	internal_GPR_PTR_FREE = 0;
-	internal_SPR_PTR_FREE = 0;
+	reg_GPR_PTR_FREE = 0;
+	reg_SPR_PTR_FREE = 0;
       }
     else
@@ -51,36 +51,36 @@
               log_printf(TRACE,Stat_List_unit,FUNCTION,"  * INSERT [%d]",i);
               
-	      if (PORT_READ(in_INSERT_READ_RA [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RA  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].insert_read();
-		}
-
-	      if (PORT_READ(in_INSERT_READ_RB [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RB  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].insert_read();
-		}
-
-	      if (PORT_READ(in_INSERT_READ_RC [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RC  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_spr;
-		  uint32_t reg  = num_reg  & _param->_mask_spr ;
-		  spr_stat_list [bank][reg].insert_read();
-		}
+// 	      if (PORT_READ(in_INSERT_READ_RA [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RA_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RA  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_gpr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 		  gpr_stat_list [bank][reg].insert_read();
+// 		}
+
+// 	      if (PORT_READ(in_INSERT_READ_RB [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RB_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RB  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_gpr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 		  gpr_stat_list [bank][reg].insert_read();
+// 		}
+
+// 	      if (PORT_READ(in_INSERT_READ_RC [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RC_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RC  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_spr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_spr ;
+// 		  spr_stat_list [bank][reg].insert_read();
+// 		}
 
 	      if (PORT_READ(in_INSERT_WRITE_RD [i]))
@@ -88,5 +88,5 @@
 		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]);
 
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg     : %d",num_reg);
+                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg new : %d",num_reg);
 
 		  uint32_t bank = num_reg >> _param->_shift_gpr;
@@ -97,7 +97,7 @@
 	      if (PORT_READ(in_INSERT_WRITE_RE [i]))
 		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg     : %d",num_reg);
+		  Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
+
+                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg new : %d",num_reg);
 
 		  uint32_t bank = num_reg >> _param->_shift_spr;
@@ -115,36 +115,40 @@
               log_printf(TRACE,Stat_List_unit,FUNCTION,"  * RETIRE [%d]",i);
 
-	      if (PORT_READ(in_RETIRE_READ_RA [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RA_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RA  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].retire_read();
-		}
-
-	      if (PORT_READ(in_RETIRE_READ_RB [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RB_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RD  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].retire_read();
-		}
-
-	      if (PORT_READ(in_RETIRE_READ_RC [i]))
-		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RC_PHY [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RC  - num_reg     : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_spr;
-		  uint32_t reg  = num_reg  & _param->_mask_spr ;
-		  spr_stat_list [bank][reg].retire_read();
-		}
+              Tcontrol_t restore = PORT_READ(in_RETIRE_RESTORE [i]);
+
+              log_printf(TRACE,Stat_List_unit,FUNCTION,"    * restore : %d",restore);
+
+// 	      if (PORT_READ(in_RETIRE_READ_RA [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RA_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RA  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_gpr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 		  gpr_stat_list [bank][reg].retire_read();
+// 		}
+
+// 	      if (PORT_READ(in_RETIRE_READ_RB [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RB_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RB  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_gpr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
+// 		  gpr_stat_list [bank][reg].retire_read();
+// 		}
+
+// 	      if (PORT_READ(in_RETIRE_READ_RC [i]))
+// 		{
+// 		  Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RC_PHY [i]);
+
+//                   log_printf(TRACE,Stat_List_unit,FUNCTION,"    * READ_RC  - num_reg     : %d",num_reg);
+
+// 		  uint32_t bank = num_reg >> _param->_shift_spr;
+// 		  uint32_t reg  = num_reg  & _param->_mask_spr ;
+// 		  spr_stat_list [bank][reg].retire_read();
+// 		}
 
 	      if (PORT_READ(in_RETIRE_WRITE_RD [i]))
@@ -157,18 +161,18 @@
 		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_OLD [i]);
 
-                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg_old : %d",num_reg);
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"                 num_reg_old : %d",num_reg);
                   
 		    uint32_t bank = num_reg >> _param->_shift_gpr;
 		    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		    gpr_stat_list [bank][reg].retire_write_old(restore_old);
+		    gpr_stat_list [bank][reg].retire_write_old(restore, restore_old);
 		  }
 		  {
 		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]);
 
-                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg_new : %d",num_reg);
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"                 num_reg_new : %d",num_reg);
 
 		    uint32_t bank = num_reg >> _param->_shift_gpr;
 		    uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		    gpr_stat_list [bank][reg].retire_write_new(restore_old);
+		    gpr_stat_list [bank][reg].retire_write_new(restore, restore_old);
 		  }
 		}
@@ -181,20 +185,20 @@
 
 		  {
-		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]);
-
-                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg_new : %d",num_reg);
+		    Tspecial_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_OLD [i]);
+
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"                 num_reg_old : %d",num_reg);
 
 		    uint32_t bank = num_reg >> _param->_shift_spr;
 		    uint32_t reg  = num_reg  & _param->_mask_spr ;
-		    spr_stat_list [bank][reg].retire_write_old(restore_old);
+		    spr_stat_list [bank][reg].retire_write_old(restore, restore_old);
 		  }
 		  {
-		    Tgeneral_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]);
-
-                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg_new : %d",num_reg);
+		    Tspecial_address_t num_reg = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]);
+
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"                 num_reg_new : %d",num_reg);
 
 		    uint32_t bank = num_reg >> _param->_shift_spr;
 		    uint32_t reg  = num_reg  & _param->_mask_spr ;
-		    spr_stat_list [bank][reg].retire_write_new(restore_old);
+		    spr_stat_list [bank][reg].retire_write_new(restore, restore_old);
 		  }
 		}
@@ -207,5 +211,5 @@
 	    // =====================================================
 	    if (internal_PUSH_GPR_VAL [i] and PORT_READ(in_PUSH_GPR_ACK [i]))
-	      gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][internal_GPR_PTR_FREE].free();
+	      gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][reg_GPR_PTR_FREE].free();
 	    
 	    // =====================================================
@@ -213,36 +217,81 @@
 	    // =====================================================
 	    if (internal_PUSH_SPR_VAL [i] and PORT_READ(in_PUSH_SPR_ACK [i]))
-	      spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][internal_SPR_PTR_FREE].free();
+	      spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][reg_SPR_PTR_FREE].free();
 	  }
 
 	// Update pointer
-	internal_GPR_PTR_FREE = ((internal_GPR_PTR_FREE==0)?_param->_nb_general_register_by_bank:internal_GPR_PTR_FREE)-1;
-	internal_SPR_PTR_FREE = ((internal_SPR_PTR_FREE==0)?_param->_nb_special_register_by_bank:internal_SPR_PTR_FREE)-1;
+	reg_GPR_PTR_FREE = ((reg_GPR_PTR_FREE==0)?_param->_nb_general_register_by_bank:reg_GPR_PTR_FREE)-1;
+	reg_SPR_PTR_FREE = ((reg_SPR_PTR_FREE==0)?_param->_nb_special_register_by_bank:reg_SPR_PTR_FREE)-1;
       }
 
 
 #if (DEBUG >= DEBUG_TRACE)
-    log_printf(TRACE,Stat_List_unit,FUNCTION,"  * Dump Stat List");
-    for (uint32_t i=0; i<_param->_nb_bank; i++)
-      for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
-        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, valid %.1d, counter %.4d",
-                   i,
-                   j,
-                   (i<<_param->_shift_gpr)|j,
-                   gpr_stat_list[i][j]._is_free,
-                   gpr_stat_list[i][j]._is_link,
-                   gpr_stat_list[i][j]._is_valid,
-                   gpr_stat_list[i][j]._counter);
-    for (uint32_t i=0; i<_param->_nb_bank; i++)
-      for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
-        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, valid %.1d, counter %.4d",
-                   i,
-                   j,
-                   (i<<_param->_shift_spr)|j,
-                   spr_stat_list[i][j]._is_free,
-                   spr_stat_list[i][j]._is_link,
-                   spr_stat_list[i][j]._is_valid,
-                   spr_stat_list[i][j]._counter);
+    {
+      log_printf(TRACE,Stat_List_unit,FUNCTION,"  * Dump Stat List");
+      log_printf(TRACE,Stat_List_unit,FUNCTION,"    * reg_GPR_PTR_FREE : %d",reg_GPR_PTR_FREE);
+      log_printf(TRACE,Stat_List_unit,FUNCTION,"    * reg_SPR_PTR_FREE : %d",reg_SPR_PTR_FREE);
+      
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+        for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
+          log_printf(TRACE,Stat_List_unit,FUNCTION,"    * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d",
+                     i,
+                     j,
+                     (i<<_param->_shift_gpr)|j,
+                     gpr_stat_list[i][j]._is_free,
+                     gpr_stat_list[i][j]._is_link// ,
+//                      gpr_stat_list[i][j]._is_valid,
+//                      gpr_stat_list[i][j]._counter
+                     );
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+        for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
+          log_printf(TRACE,Stat_List_unit,FUNCTION,"    * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d",
+                     i,
+                     j,
+                     (i<<_param->_shift_spr)|j,
+                     spr_stat_list[i][j]._is_free,
+                     spr_stat_list[i][j]._is_link// ,
+//                      spr_stat_list[i][j]._is_valid,
+//                      spr_stat_list[i][j]._counter
+                     );
+    }
 #endif
+
+#ifdef DEBUG_TEST
+# if 0
+    {
+      uint32_t size_rob   = 64;
+      uint32_t nb_context = 1;
+      
+      {
+        uint32_t nb_is_link = 0;
+        uint32_t nb_reg = 32;
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+          for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
+            if (gpr_stat_list[i][j]._is_link)
+              nb_is_link ++;
+        
+        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * nb_GPR_IS_LINK   : %d",nb_is_link);
+        
+        if (nb_is_link > size_rob+nb_context*nb_reg)
+          throw ERRORMORPHEO(FUNCTION,toString(_("They are %d linked gpr register, but max is size_rob+nb_context*%d = %d+%d*%d = %d"),nb_is_link,nb_reg,size_rob,nb_context,nb_reg,size_rob+nb_context*nb_reg));
+      }
+      
+      {
+        uint32_t nb_is_link = 0;
+        uint32_t nb_reg = 2;
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+          for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
+            if (spr_stat_list[i][j]._is_link)
+              nb_is_link ++;
+        
+        log_printf(TRACE,Stat_List_unit,FUNCTION,"    * nb_SPR_IS_LINK   : %d",nb_is_link);
+        
+        if (nb_is_link > size_rob+nb_context*nb_reg)
+          throw ERRORMORPHEO(FUNCTION,toString(_("They are %d linked spr register, but max is size_rob+nb_context*%d = %d+%d*%d = %d"),nb_is_link,nb_reg,size_rob,nb_context,nb_reg,size_rob+nb_context*nb_reg));
+      }
+    }
+# endif
+#endif
+                
 
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h	(revision 112)
@@ -38,5 +38,5 @@
   public : uint32_t   _nb_reg_free           ;
   public : uint32_t   _nb_bank               ;
-  public : uint32_t   _size_read_counter     ;
+//public : uint32_t   _size_read_counter     ;
 
 //public : uint32_t   _size_front_end_id     ;
@@ -62,5 +62,5 @@
 			uint32_t   nb_reg_free           ,
 			uint32_t   nb_bank               ,
-			uint32_t   size_read_counter     ,
+// 			uint32_t   size_read_counter     ,
                         bool       is_toplevel=false);
 //   public : Parameters  (Parameters & param) ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp	(revision 112)
@@ -28,5 +28,5 @@
 			  uint32_t   nb_reg_free           ,
 			  uint32_t   nb_bank               ,
-			  uint32_t   size_read_counter     ,
+// 			  uint32_t   size_read_counter     ,
                           bool       is_toplevel)
   {
@@ -41,5 +41,5 @@
     _nb_reg_free         = nb_reg_free        ;
     _nb_bank             = nb_bank            ;
-    _size_read_counter   = size_read_counter  ;
+//     _size_read_counter   = size_read_counter  ;
 
     uint32_t size_general_register = log2(nb_general_register);
@@ -83,6 +83,7 @@
        _nb_inst_retire     ,
        _nb_reg_free        ,
-       _nb_bank            ,
-       _size_read_counter  );
+       _nb_bank            // ,
+//     _size_read_counter  
+       );
 
     _param_register_translation_unit_glue    = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue::Parameters
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp	(revision 112)
@@ -34,5 +34,5 @@
     xml.singleton_begin("nb_reg_free        "); xml.attribut("value",toString(_nb_reg_free        )); xml.singleton_end();
     xml.singleton_begin("nb_bank            "); xml.attribut("value",toString(_nb_bank            )); xml.singleton_end();
-    xml.singleton_begin("size_read_counter  "); xml.attribut("value",toString(_size_read_counter  )); xml.singleton_end();
+//  xml.singleton_begin("size_read_counter  "); xml.attribut("value",toString(_size_read_counter  )); xml.singleton_end();
     for (uint32_t i=0;i<_nb_front_end; i++)
       {
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("rename", IN, EAST, "Instruction with logical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("rename", IN, EAST, _("Instruction with logical register"), _param->_nb_inst_insert);
 
       ALLOC1_VALACK_IN ( in_RENAME_VAL           ,VAL);
@@ -74,9 +74,11 @@
       ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RE      ,"write_re"      ,Tcontrol_t        ,1                                   );
       ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT,WEST , _("Instruction with physical register"), _param->_nb_inst_insert);
       
       ALLOC1_VALACK_OUT(out_INSERT_VAL               ,VAL);
@@ -101,9 +103,12 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire",IN ,NORTH, _("Retire instruction, update renaming structure."), _param->_nb_inst_retire);
+
       ALLOC1_VALACK_IN ( in_RETIRE_VAL               ,VAL);
       ALLOC1_VALACK_OUT(out_RETIRE_ACK               ,ACK);
@@ -124,13 +129,17 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL           ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK           ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE      ,"state"             ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
@@ -362,4 +371,6 @@
 	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD",
 		                   dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD");
+	  COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE"           ,
+		                   dest, "in_RETIRE_"+toString(i)+"_RESTORE"           );
 	}
 
@@ -671,4 +682,5 @@
 	  // in_RETIRE_RESTORE_RD_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RD_PHY_OLD
 	  // in_RETIRE_RESTORE_RE_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RE_PHY_OLD
+	  // in_RETIRE_RESTORE            - register_address_translation_unit.out_RETIRE_RESTORE           
 
 	  dest = _name+"_register_translation_unit_glue";
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp	(revision 112)
@@ -29,65 +29,59 @@
 	delete    in_NRESET;
 
-	delete []  in_RENAME_VAL               ;
-	delete [] out_RENAME_ACK               ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_RENAME_FRONT_END_ID      ;
-	if (_param->_have_port_context_id)
-	delete []  in_RENAME_CONTEXT_ID        ;
-	delete []  in_RENAME_READ_RA           ;
-	delete []  in_RENAME_NUM_REG_RA_LOG    ;
-	delete []  in_RENAME_READ_RB           ;
-	delete []  in_RENAME_NUM_REG_RB_LOG    ;
-	delete []  in_RENAME_READ_RC           ;
-	delete []  in_RENAME_NUM_REG_RC_LOG    ;
-	delete []  in_RENAME_WRITE_RD          ;
-	delete []  in_RENAME_NUM_REG_RD_LOG    ;
-	delete []  in_RENAME_WRITE_RE          ;
-	delete []  in_RENAME_NUM_REG_RE_LOG    ;
+        DELETE1_SIGNAL( in_RENAME_VAL           ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_RENAME_ACK           ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_RENAME_FRONT_END_ID  ,_param->_nb_inst_insert,_param->_size_front_end_id          );
+        DELETE1_SIGNAL( in_RENAME_CONTEXT_ID    ,_param->_nb_inst_insert,_param->_size_context_id            );
+        DELETE1_SIGNAL( in_RENAME_READ_RA       ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RA_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_READ_RB       ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RB_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_READ_RC       ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RC_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RENAME_WRITE_RD      ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RENAME_WRITE_RE      ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL( in_RENAME_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic);
 
-	delete [] out_INSERT_VAL               ;
-	delete []  in_INSERT_ACK               ;
-	if (_param->_have_port_front_end_id)
-	delete [] out_INSERT_FRONT_END_ID      ;
-	if (_param->_have_port_context_id)
-	delete [] out_INSERT_CONTEXT_ID        ;
-	delete [] out_INSERT_READ_RA           ;
-	delete [] out_INSERT_NUM_REG_RA_LOG    ;
-	delete [] out_INSERT_NUM_REG_RA_PHY    ;
-	delete [] out_INSERT_READ_RB           ;
-	delete [] out_INSERT_NUM_REG_RB_LOG    ;
-	delete [] out_INSERT_NUM_REG_RB_PHY    ;
-	delete [] out_INSERT_READ_RC           ;
-	delete [] out_INSERT_NUM_REG_RC_LOG    ;
-	delete [] out_INSERT_NUM_REG_RC_PHY    ;
-	delete [] out_INSERT_WRITE_RD          ;
-	delete [] out_INSERT_NUM_REG_RD_LOG    ;
-	delete [] out_INSERT_NUM_REG_RD_PHY_OLD;
-	delete [] out_INSERT_NUM_REG_RD_PHY_NEW;
-	delete [] out_INSERT_WRITE_RE          ;
-	delete [] out_INSERT_NUM_REG_RE_LOG    ;
-	delete [] out_INSERT_NUM_REG_RE_PHY_OLD;
-	delete [] out_INSERT_NUM_REG_RE_PHY_NEW;
+        DELETE1_SIGNAL(out_INSERT_VAL               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL( in_INSERT_ACK               ,_param->_nb_inst_insert,1);
+        DELETE1_SIGNAL(out_INSERT_FRONT_END_ID      ,_param->_nb_inst_insert,_param->_size_front_end_id          );
+        DELETE1_SIGNAL(out_INSERT_CONTEXT_ID        ,_param->_nb_inst_insert,_param->_size_context_id            );
+        DELETE1_SIGNAL(out_INSERT_READ_RA           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_READ_RB           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_READ_RC           ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_INSERT_WRITE_RD          ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG    ,_param->_nb_inst_insert,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register      );
+        DELETE1_SIGNAL(out_INSERT_WRITE_RE          ,_param->_nb_inst_insert,1                                   );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG    ,_param->_nb_inst_insert,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register      );
+        DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register      );
 
-	delete []  in_RETIRE_VAL               ;
-	delete [] out_RETIRE_ACK               ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_RETIRE_FRONT_END_ID      ;
-	if (_param->_have_port_context_id)
-	delete []  in_RETIRE_CONTEXT_ID        ;
-	delete []  in_RETIRE_READ_RA           ;
-	delete []  in_RETIRE_NUM_REG_RA_PHY    ;
-	delete []  in_RETIRE_READ_RB           ;
-	delete []  in_RETIRE_NUM_REG_RB_PHY    ;
-	delete []  in_RETIRE_READ_RC           ;
-	delete []  in_RETIRE_NUM_REG_RC_PHY    ;
-	delete []  in_RETIRE_WRITE_RD          ;
-	delete []  in_RETIRE_NUM_REG_RD_LOG    ;
-	delete []  in_RETIRE_NUM_REG_RD_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RD_PHY_NEW;
-	delete []  in_RETIRE_WRITE_RE          ;
-	delete []  in_RETIRE_NUM_REG_RE_LOG    ;
-	delete []  in_RETIRE_NUM_REG_RE_PHY_OLD;
-	delete []  in_RETIRE_NUM_REG_RE_PHY_NEW;
+        DELETE1_SIGNAL( in_RETIRE_VAL               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL(out_RETIRE_ACK               ,_param->_nb_inst_retire,1);
+        DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID      ,_param->_nb_inst_retire,_param->_size_front_end_id          );
+        DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID        ,_param->_nb_inst_retire,_param->_size_context_id            );
+        DELETE1_SIGNAL( in_RETIRE_READ_RA           ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_READ_RB           ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_READ_RC           ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG    ,_param->_nb_inst_retire,_param->_size_general_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register      );
+        DELETE1_SIGNAL( in_RETIRE_WRITE_RE          ,_param->_nb_inst_retire,1                                   );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG    ,_param->_nb_inst_retire,_param->_size_special_register_logic);
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire,_param->_size_special_register      );
+        DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register      );
 
         DELETE2_SIGNAL( in_RETIRE_EVENT_VAL            ,_param->_nb_front_end, _param->_nb_context[it1],1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      ALLOC2_INTERFACE_BEGIN("rename_in", IN, EAST, _("output of decod's stage"), _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       
       _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -87,9 +87,11 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_inst_decod[it1]);
     }
 
     // ~~~~~[ Interface : "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("rename_out", IN, EAST, "output of decod's stage", _param->_nb_inst_rename);
+      ALLOC1_INTERFACE_BEGIN("rename_out", IN, EAST, _("output of decod's stage"), _param->_nb_inst_rename);
       
       ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL           ,VAL);
@@ -120,11 +122,15 @@
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         );
       ALLOC1_SIGNAL_OUT(out_RENAME_OUT_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_rename);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE         ,"state"                ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp	(revision 112)
@@ -29,65 +29,63 @@
 	delete    in_NRESET;
 
-	delete []  in_RENAME_IN_VAL           ;
-	delete [] out_RENAME_IN_ACK           ;
-	if (_param->_have_port_front_end_id)
-	delete []  in_RENAME_IN_FRONT_END_ID  ;
-	if (_param->_have_port_context_id)
-	delete []  in_RENAME_IN_CONTEXT_ID    ;
-	if (_param->_have_port_depth)
-	delete []  in_RENAME_IN_DEPTH         ;
-	delete []  in_RENAME_IN_TYPE          ;
-	delete []  in_RENAME_IN_OPERATION     ;
-	delete []  in_RENAME_IN_NO_EXECUTE    ;
-	delete []  in_RENAME_IN_IS_DELAY_SLOT ;
+        DELETE2_SIGNAL( in_RENAME_IN_VAL           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1);
+        DELETE2_SIGNAL(out_RENAME_IN_ACK           ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1);
+        DELETE2_SIGNAL( in_RENAME_IN_FRONT_END_ID  ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_front_end_id          );
+        DELETE2_SIGNAL( in_RENAME_IN_CONTEXT_ID    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id            );
+        DELETE2_SIGNAL( in_RENAME_IN_DEPTH         ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth                 );
+        DELETE2_SIGNAL( in_RENAME_IN_TYPE          ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type                  );
+        DELETE2_SIGNAL( in_RENAME_IN_OPERATION     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation             );
+        DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
 #ifdef DEBUG
-	delete []  in_RENAME_IN_ADDRESS       ;
+        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS       ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address   );
 #endif
-	delete []  in_RENAME_IN_ADDRESS_NEXT  ;
-	delete []  in_RENAME_IN_HAS_IMMEDIAT  ;
-	delete []  in_RENAME_IN_IMMEDIAT      ;
-	delete []  in_RENAME_IN_READ_RA       ;
-	delete []  in_RENAME_IN_NUM_REG_RA    ;
-	delete []  in_RENAME_IN_READ_RB       ;
-	delete []  in_RENAME_IN_NUM_REG_RB    ;
-	delete []  in_RENAME_IN_READ_RC       ;
-	delete []  in_RENAME_IN_NUM_REG_RC    ;
-	delete []  in_RENAME_IN_WRITE_RD      ;
-	delete []  in_RENAME_IN_NUM_REG_RD    ;
-	delete []  in_RENAME_IN_WRITE_RE      ;
-	delete []  in_RENAME_IN_NUM_REG_RE    ;
-	delete []  in_RENAME_IN_EXCEPTION_USE ;
-	delete []  in_RENAME_IN_EXCEPTION     ;
+        DELETE2_SIGNAL( in_RENAME_IN_ADDRESS_NEXT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address   );
+        DELETE2_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT  ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_IMMEDIAT      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data          );
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RA       ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RA    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RB       ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RB    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_READ_RC       ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RC    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_WRITE_RD      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RD    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_WRITE_RE      ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1                                   );
+        DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RE    ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic);
+        DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception_use         );
+        DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION     ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception             );
+      
+        DELETE1_SIGNAL(out_RENAME_OUT_VAL           ,_param->_nb_inst_rename,1);
+        DELETE1_SIGNAL( in_RENAME_OUT_ACK           ,_param->_nb_inst_rename,1);
+        DELETE1_SIGNAL(out_RENAME_OUT_FRONT_END_ID  ,_param->_nb_inst_rename,_param->_size_front_end_id          );
+        DELETE1_SIGNAL(out_RENAME_OUT_CONTEXT_ID    ,_param->_nb_inst_rename,_param->_size_context_id            );
+        DELETE1_SIGNAL(out_RENAME_OUT_DEPTH         ,_param->_nb_inst_rename,_param->_size_depth                 );
+        DELETE1_SIGNAL(out_RENAME_OUT_TYPE          ,_param->_nb_inst_rename,_param->_size_type                  );
+        DELETE1_SIGNAL(out_RENAME_OUT_OPERATION     ,_param->_nb_inst_rename,_param->_size_operation             );
+        DELETE1_SIGNAL(out_RENAME_OUT_NO_EXECUTE    ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT ,_param->_nb_inst_rename,1                                   );
+#ifdef DEBUG
+        DELETE1_SIGNAL(out_RENAME_OUT_ADDRESS       ,_param->_nb_inst_rename,_param->_size_instruction_address   );
+#endif
+        DELETE1_SIGNAL(out_RENAME_OUT_ADDRESS_NEXT  ,_param->_nb_inst_rename,_param->_size_instruction_address   );
+        DELETE1_SIGNAL(out_RENAME_OUT_HAS_IMMEDIAT  ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_IMMEDIAT      ,_param->_nb_inst_rename,_param->_size_general_data          );
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RA       ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RA    ,_param->_nb_inst_rename,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RB       ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RB    ,_param->_nb_inst_rename,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_READ_RC       ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RC    ,_param->_nb_inst_rename,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_WRITE_RD      ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RD    ,_param->_nb_inst_rename,_param->_size_general_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_WRITE_RE      ,_param->_nb_inst_rename,1                                   );
+        DELETE1_SIGNAL(out_RENAME_OUT_NUM_REG_RE    ,_param->_nb_inst_rename,_param->_size_special_register_logic);
+        DELETE1_SIGNAL(out_RENAME_OUT_EXCEPTION_USE ,_param->_nb_inst_rename,_param->_size_exception_use         );
+        DELETE1_SIGNAL(out_RENAME_OUT_EXCEPTION     ,_param->_nb_inst_rename,_param->_size_exception             );
 
-	delete [] out_RENAME_OUT_VAL          ;
-	delete []  in_RENAME_OUT_ACK          ;
-	if (_param->_have_port_front_end_id)
-	delete [] out_RENAME_OUT_FRONT_END_ID ;
-	if (_param->_have_port_context_id)
-	delete [] out_RENAME_OUT_CONTEXT_ID   ;
-	if (_param->_have_port_depth)
-	delete [] out_RENAME_OUT_DEPTH        ;
-	delete [] out_RENAME_OUT_TYPE         ;
-	delete [] out_RENAME_OUT_OPERATION    ;
-#ifdef DEBUG
-	delete [] out_RENAME_OUT_ADDRESS      ;
-#endif
-	delete [] out_RENAME_OUT_ADDRESS_NEXT ;
-	delete [] out_RENAME_OUT_HAS_IMMEDIAT ;
-	delete [] out_RENAME_OUT_IMMEDIAT     ;
-	delete [] out_RENAME_OUT_READ_RA      ;
-	delete [] out_RENAME_OUT_NUM_REG_RA   ;
-	delete [] out_RENAME_OUT_READ_RB      ;
-	delete [] out_RENAME_OUT_NUM_REG_RB   ;
-	delete [] out_RENAME_OUT_READ_RC      ;
-	delete [] out_RENAME_OUT_NUM_REG_RC   ;
-	delete [] out_RENAME_OUT_WRITE_RD     ;
-	delete [] out_RENAME_OUT_NUM_REG_RD   ;
-	delete [] out_RENAME_OUT_WRITE_RE     ;
-	delete [] out_RENAME_OUT_NUM_REG_RE   ;
-	delete [] out_RENAME_OUT_EXCEPTION_USE;
+        DELETE2_SIGNAL( in_RETIRE_EVENT_STATE       ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state);
+      }
 
-        DELETE2_SIGNAL( in_RETIRE_EVENT_STATE          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state);
-      }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     delete _priority;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 112)
@@ -52,5 +52,5 @@
 
             log_printf(TRACE,Rename_select,FUNCTION,"    * front_end[%d].inst_decod[%d]",x,y);
-            log_printf(TRACE,Rename_select,FUNCTION,"      * rename_in_val        : %d",PORT_READ(in_RENAME_IN_VAL[x][y]));
+            log_printf(TRACE,Rename_select,FUNCTION,"      * in_RENAME_OUT_VAL    : %d",PORT_READ(in_RENAME_IN_VAL[x][y]));
             log_printf(TRACE,Rename_select,FUNCTION,"      * previous_transaction : %d",previous_transaction[x]);
 
@@ -63,5 +63,5 @@
 		ack [x][y] = PORT_READ(in_RENAME_OUT_ACK [i]);
 
-                log_printf(TRACE,Rename_select,FUNCTION,"      * rename_out_ack       : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
+                log_printf(TRACE,Rename_select,FUNCTION,"      * in_RENAME_OUT_ACK    : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
 
                 Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 112)
@@ -59,5 +59,5 @@
     // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT,NORTH,_("Insert interface"),_param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT,NORTH,_("Insert interface"),_param->_nb_inst_insert);
 
 //    ALLOC1_SIGNAL_OUT(out_INSERT_VAL                                    ,"VAL"                                    ,Tcontrol_t        ,1);
@@ -68,5 +68,5 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION                              ,"OPERATION"                              ,Toperation_t      ,_param->_size_operation);
       ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT                               ,"IMMEDIAT"                               ,Tgeneral_data_t   ,_param->_size_general_data);
-//       ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION_USE                          ,"EXCEPTION_USE"                          ,Texception_t      ,_param->_size_exception_use);
+//    ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION_USE                          ,"EXCEPTION_USE"                          ,Texception_t      ,_param->_size_exception_use);
       ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION                              ,"EXCEPTION"                              ,Texception_t      ,_param->_size_exception);
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW                     ,"NUM_REG_RE_PHY_NEW"                     ,Tspecial_address_t,_param->_size_special_register);
@@ -78,5 +78,5 @@
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_OPERATION                ,"RENAME_SELECT_OPERATION"                ,Toperation_t      ,_param->_size_operation);
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_IMMEDIAT                 ,"RENAME_SELECT_IMMEDIAT"                 ,Tgeneral_data_t   ,_param->_size_general_data);
-//       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,"RENAME_SELECT_EXCEPTION_USE"            ,Texception_t      ,_param->_size_exception_use);
+//    ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,"RENAME_SELECT_EXCEPTION_USE"            ,Texception_t      ,_param->_size_exception_use);
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION                ,"RENAME_SELECT_EXCEPTION"                ,Texception_t      ,_param->_size_exception);
       ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_VAL               ,"REGISTER_TRANSLATION_VAL"               ,Tcontrol_t        ,1);
@@ -91,9 +91,11 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE          ,"LOAD_STORE_QUEUE_POINTER_TYPE"          ,Ttype_t           ,_param->_size_type);
       ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION     ,"LOAD_STORE_QUEUE_POINTER_OPERATION"     ,Toperation_t      ,_param->_size_operation);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire",OUT,NORTH,_("Retire interface"),_param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire",OUT,NORTH,_("Retire interface"),_param->_nb_inst_retire);
 
       ALLOC1_SIGNAL_IN ( in_RETIRE_VAL                                   ,"VAL"                                  ,Tcontrol_t        ,1);
@@ -105,10 +107,15 @@
       ALLOC1_SIGNAL_OUT(out_RETIRE_REGISTER_TRANSLATION_VAL              ,"REGISTER_TRANSLATION_VAL"             ,Tcontrol_t        ,1);
       ALLOC1_SIGNAL_IN ( in_RETIRE_REGISTER_TRANSLATION_ACK              ,"REGISTER_TRANSLATION_ACK"             ,Tcontrol_t        ,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
+
     // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_read",IN ,NORTH,_("SPR read"),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_read",IN ,NORTH,_("SPR read"),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_SPR_READ_SR                                  ,"SR"                                   ,Tspr_t            ,_param->_size_spr,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg	(revision 112)
@@ -19,3 +19,2 @@
 1	1	+1	# nb_reg_free                      
 1	1	+1	# nb_bank                          
-1	1	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg	(revision 112)
@@ -19,3 +19,2 @@
 2	2	+1	# nb_reg_free                      
 4	8	*2	# nb_bank                          
-4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg	(revision 112)
@@ -22,3 +22,2 @@
 2	2	+1	# nb_reg_free                      
 8	8	*2	# nb_bank                          
-4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg	(revision 112)
@@ -25,3 +25,2 @@
 2	2	+1	# nb_reg_free                      
 8	8	*2	# nb_bank                          
-4	4	+1	# size_read_counter                
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp	(revision 112)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/include/test.h"
 
-#define NB_PARAMS 14
+#define NB_PARAMS 13
 
 void usage (int argc, char * argv[])
@@ -33,5 +33,5 @@
   err (_(" * nb_reg_free                                                  (uint32_t         )\n"));
   err (_(" * nb_bank                                                      (uint32_t         )\n"));
-  err (_(" * size_read_counter                                            (uint32_t         )\n"));
+//   err (_(" * size_read_counter                                            (uint32_t         )\n"));
 
   exit (1);
@@ -103,5 +103,5 @@
   uint32_t             _nb_reg_free                       = fromString<uint32_t         >(argv[x++]);
   uint32_t             _nb_bank                           = fromString<uint32_t         >(argv[x++]);
-  uint32_t             _size_read_counter                 = fromString<uint32_t         >(argv[x++]);
+//   uint32_t             _size_read_counter                 = fromString<uint32_t         >(argv[x++]);
 
   int _return = EXIT_SUCCESS;
@@ -128,5 +128,5 @@
 	 _nb_reg_free                      ,
 	 _nb_bank                          ,
-	 _size_read_counter                ,
+// 	 _size_read_counter                ,
          true //is_toplevel
          );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h	(revision 112)
@@ -47,5 +47,5 @@
   public : uint32_t             _nb_reg_free                      ;
   public : uint32_t             _nb_bank                          ;
-  public : uint32_t             _size_read_counter                ;
+//   public : uint32_t             _size_read_counter                ;
 								  
 //public : uint32_t             _size_front_end_id                ;
@@ -87,5 +87,5 @@
 			uint32_t             nb_reg_free                      ,
 			uint32_t             nb_bank                          ,
-			uint32_t             size_read_counter                ,
+// 			uint32_t             size_read_counter                ,
                         bool                 is_toplevel=false
                         );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp	(revision 112)
@@ -38,5 +38,5 @@
 			  uint32_t             nb_reg_free                      ,
 			  uint32_t             nb_bank                          ,
-			  uint32_t             size_read_counter                ,
+// 			  uint32_t             size_read_counter                ,
                           bool                 is_toplevel)
   {
@@ -61,5 +61,5 @@
     _nb_reg_free                       = nb_reg_free                      ;
     _nb_bank                           = nb_bank                          ;
-    _size_read_counter                 = size_read_counter                ;
+//     _size_read_counter                 = size_read_counter                ;
     
     uint32_t size_special_register     = log2(_nb_special_register);
@@ -91,6 +91,6 @@
        _nb_inst_retire        ,
        _nb_reg_free           ,
-       _nb_bank               ,
-       _size_read_counter     
+       _nb_bank               // ,
+//        _size_read_counter     
        );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp	(revision 112)
@@ -39,5 +39,5 @@
     xml.singleton_begin("nb_reg_free                      "); xml.attribut("value",toString(_nb_reg_free                      )); xml.singleton_end();
     xml.singleton_begin("nb_bank                          "); xml.attribut("value",toString(_nb_bank                          )); xml.singleton_end();
-    xml.singleton_begin("size_read_counter                "); xml.attribut("value",toString(_size_read_counter                )); xml.singleton_end();
+//     xml.singleton_begin("size_read_counter                "); xml.attribut("value",toString(_size_read_counter                )); xml.singleton_end();
 
     for (uint32_t i=0;i<_nb_front_end; i++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename_in", IN, EAST, "output of decod's stage", _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+      ALLOC2_INTERFACE_BEGIN("rename_in", IN, EAST, _("output of decod's stage"), _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       
       _ALLOC2_VALACK_IN ( in_RENAME_IN_VAL           ,VAL, _param->_nb_front_end, _param->_nb_inst_decod[it1]);
@@ -87,9 +87,11 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION_USE ,"exception_use",Texception_t      ,_param->_size_exception_use         , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_IN_EXCEPTION     ,"exception"    ,Texception_t      ,_param->_size_exception             , _param->_nb_front_end, _param->_nb_inst_decod[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_inst_decod[it1]);
     }
 
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT,WEST , "Instruction with physical register", _param->_nb_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT,WEST , _("Instruction with physical register"), _param->_nb_inst_insert);
       
       ALLOC1_VALACK_OUT(out_INSERT_VAL                  ,VAL);
@@ -129,9 +131,11 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
     }
 
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("retire",IN ,NORTH, "Retire instruction, update renaming structure.", _param->_nb_inst_retire);
+      ALLOC1_INTERFACE_BEGIN("retire",IN ,NORTH, _("Retire instruction, update renaming structure."), _param->_nb_inst_retire);
 
       ALLOC1_VALACK_IN ( in_RETIRE_VAL                  ,VAL);
@@ -159,20 +163,26 @@
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD   ,"num_reg_re_phy_old"   ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW   ,"num_reg_re_phy_new"   ,Tspecial_address_t,_param->_size_special_register      );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
     }
 
     // ~~~~~[ Interface : "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL           ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK           ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE         ,"state"                ,Tevent_state_t    ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_read", IN,NORTH, _("Special register"), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_read", IN,NORTH, _("Special register"), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN (in_SPR_READ_SR                 ,"sr",Tspr_t            ,_param->_size_spr, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 112)
@@ -51,5 +51,4 @@
 1	1	+1	# nb_reg_free                       [0]               [nb_rename_unit]
 1	1	+1	# nb_rename_unit_bank               [0]               [nb_rename_unit]
-1	1	+1	# size_read_counter                 [0]               [nb_rename_unit]
 1	1	+1	# nb_load_store_queue               [0]               [nb_rename_unit]
 2	2	+1	# size_store_queue                  [0][0]            [nb_rename_unit][nb_load_store_queue]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 112)
@@ -67,5 +67,5 @@
   err (_(" * nb_reg_free                       [nb_rename_unit]                      (uint32_t         )\n"));
   err (_(" * nb_rename_unit_bank               [nb_rename_unit]                      (uint32_t         )\n"));
-  err (_(" * size_read_counter                 [nb_rename_unit]                      (uint32_t         )\n"));
+//   err (_(" * size_read_counter                 [nb_rename_unit]                      (uint32_t         )\n"));
   err (_(" * nb_load_store_queue               [nb_rename_unit]                      (uint32_t         )\n"));
   err (_(" * size_store_queue                  [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
@@ -110,5 +110,5 @@
     _nb_inst_decod [i] = fromString<uint32_t>(argv[x++]);
 
-  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+12*_nb_rename_unit+_nb_execute_loop))
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop))
     usage (argc, argv);
 
@@ -160,5 +160,5 @@
     }
 
-  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue))
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue))
     usage (argc, argv);
   
@@ -195,5 +195,5 @@
   uint32_t            * _nb_reg_free                       = new uint32_t          [_nb_rename_unit];
   uint32_t            * _nb_rename_unit_bank               = new uint32_t          [_nb_rename_unit];
-  uint32_t            * _size_read_counter                 = new uint32_t          [_nb_rename_unit];
+//   uint32_t            * _size_read_counter                 = new uint32_t          [_nb_rename_unit];
   uint32_t            * _nb_load_store_queue               = new uint32_t          [_nb_rename_unit];
 
@@ -212,6 +212,6 @@
   for (uint32_t i=0; i<_nb_rename_unit; i++)
     _nb_rename_unit_bank               [i] = fromString<uint32_t         >(argv[x++]);
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    _size_read_counter                 [i] = fromString<uint32_t         >(argv[x++]);
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     _size_read_counter                 [i] = fromString<uint32_t         >(argv[x++]);
   for (uint32_t i=0; i<_nb_rename_unit; i++)
     {
@@ -220,5 +220,5 @@
     }
 
-  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue))
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue))
     usage (argc, argv);
 
@@ -327,5 +327,5 @@
          _nb_reg_free                      ,
          _nb_rename_unit_bank              ,
-         _size_read_counter                ,
+//          _size_read_counter                ,
          _nb_load_store_queue              ,
          _size_store_queue                 ,
@@ -391,5 +391,5 @@
 
   delete [] _nb_load_store_queue               ;
-  delete [] _size_read_counter                 ;
+//   delete [] _size_read_counter                 ;
   delete [] _nb_rename_unit_bank               ;
   delete [] _nb_reg_free                       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 112)
@@ -143,16 +143,16 @@
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ," in_BRANCH_COMPLETE_MISS_PREDICTION  ",Tcontrol_t        ,_param->_nb_inst_branch_complete);
 
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_VAL                 ,"out_COMMIT_EVENT_VAL                 ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ACK                 ," in_COMMIT_EVENT_ACK                 ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_FRONT_END_ID        ,"out_COMMIT_EVENT_FRONT_END_ID        ",Tcontext_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_CONTEXT_ID          ,"out_COMMIT_EVENT_CONTEXT_ID          ",Tcontext_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_DEPTH               ,"out_COMMIT_EVENT_DEPTH               ",Tdepth_t          );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_TYPE                ,"out_COMMIT_EVENT_TYPE                ",Tevent_type_t     );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"out_COMMIT_EVENT_IS_DELAY_SLOT       ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,"out_COMMIT_EVENT_ADDRESS             ",Taddress_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,"out_COMMIT_EVENT_ADDRESS_EPCR        ",Taddress_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ",Tcontrol_t        );
-  ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR        ,"out_COMMIT_EVENT_ADDRESS_EEAR        ",Tgeneral_data_t   );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_VAL                 ,"out_COMMIT_EVENT_VAL                 ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ACK                 ," in_COMMIT_EVENT_ACK                 ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_FRONT_END_ID        ,"out_COMMIT_EVENT_FRONT_END_ID        ",Tcontext_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_CONTEXT_ID          ,"out_COMMIT_EVENT_CONTEXT_ID          ",Tcontext_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_DEPTH               ,"out_COMMIT_EVENT_DEPTH               ",Tdepth_t          );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_TYPE                ,"out_COMMIT_EVENT_TYPE                ",Tevent_type_t     );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_IS_DELAY_SLOT       ,"out_COMMIT_EVENT_IS_DELAY_SLOT       ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS             ,"out_COMMIT_EVENT_ADDRESS             ",Taddress_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR        ,"out_COMMIT_EVENT_ADDRESS_EPCR        ",Taddress_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ",Tcontrol_t        );
+  ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR        ,"out_COMMIT_EVENT_ADDRESS_EEAR        ",Tgeneral_data_t   );
 
   ALLOC2_SC_SIGNAL( in_EVENT_VAL                        ," in_EVENT_VAL                        ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -294,19 +294,19 @@
   INSTANCE1_SC_SIGNAL(_OOO_Engine, in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_branch_complete);
 
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_VAL                 );
-  INSTANCE_SC_SIGNAL (_OOO_Engine, in_COMMIT_EVENT_ACK                 );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_VAL                 );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine, in_COMMIT_EVENT_ACK                 );
   if (_param->_have_port_front_end_id)
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_FRONT_END_ID        );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_FRONT_END_ID        );
   if (_param->_have_port_context_id)
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_CONTEXT_ID          );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_CONTEXT_ID          );
   if (_param->_have_port_depth)
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_DEPTH               );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_TYPE                );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_IS_DELAY_SLOT       );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS             );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR        );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
-  INSTANCE_SC_SIGNAL (_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR        );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_DEPTH               );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_TYPE                );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_IS_DELAY_SLOT       );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_ADDRESS             );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EPCR        );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
+  INSTANCE0_SC_SIGNAL(_OOO_Engine,out_COMMIT_EVENT_ADDRESS_EEAR        );
 
   INSTANCE2_SC_SIGNAL(_OOO_Engine, in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -472,16 +472,16 @@
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_branch_complete);
   
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_VAL                 );
-  DELETE_SC_SIGNAL  ( in_COMMIT_EVENT_ACK                 );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_FRONT_END_ID        );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_CONTEXT_ID          );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_DEPTH               );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_TYPE                );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_IS_DELAY_SLOT       );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS             );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EPCR        );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
-  DELETE_SC_SIGNAL  (out_COMMIT_EVENT_ADDRESS_EEAR        );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_VAL                 );
+  DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ACK                 );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_FRONT_END_ID        );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_CONTEXT_ID          );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_DEPTH               );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_TYPE                );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_IS_DELAY_SLOT       );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS             );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR_VAL    );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR        );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR_VAL    );
+  DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR        );
   
   DELETE2_SC_SIGNAL( in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 112)
@@ -58,5 +58,5 @@
     // ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("spr_access",IN,WEST, _("Access from reexecute_unit"), _param->_nb_inst_reexecute);
+      ALLOC1_INTERFACE_BEGIN("spr_access",IN,WEST, _("Access from reexecute_unit"), _param->_nb_inst_reexecute);
 
       ALLOC1_VALACK_IN ( in_SPR_ACCESS_VAL           ,VAL);
@@ -70,16 +70,20 @@
       ALLOC1_SIGNAL_OUT(out_SPR_ACCESS_RDATA         ,"rdata"       ,Tspr_t             ,_param->_size_spr);
       ALLOC1_SIGNAL_OUT(out_SPR_ACCESS_INVALID       ,"invalid"     ,Tcontrol_t         ,1);
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_reexecute);
     }
 
     // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_read",OUT,WEST, _("Output for a spr bit field."), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_read",OUT,WEST, _("Output for a spr bit field."), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_OUT(out_SPR_READ_SR             ,"sr",Tspr_t,_param->_size_spr, _param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_commit",IN,WEST, _("Commit instruction to change SR's flags."), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_commit",IN,WEST, _("Commit instruction to change SR's flags."), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_SPR_COMMIT_VAL           ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -91,9 +95,11 @@
       _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_OV_VAL     ,"sr_ov_val"    ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_SPR_COMMIT_SR_OV         ,"sr_ov"        ,Tcontrol_t         ,1,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_event",IN,WEST, _("Event change a lot of exception."), _param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_event",IN,WEST, _("Event change a lot of exception."), _param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL            ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
@@ -104,4 +110,6 @@
       _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX        ,"SR_DSX"        ,Tcontrol_t        ,1                ,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR     ,"SR_TO_ESR"     ,Tcontrol_t        ,1                ,_param->_nb_front_end, _param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]);
     }
 
@@ -109,12 +117,7 @@
       {
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-    internal_SPR_ACCESS_ACK = new Tcontrol_t   [_param->_nb_inst_reexecute];
-    internal_SPR_COMMIT_ACK = new Tcontrol_t * [_param->_nb_front_end];
-    internal_SPR_EVENT_ACK  = new Tcontrol_t * [_param->_nb_front_end];
-    for (uint32_t i=0; i<_param->_nb_front_end; i++)
-      {
-        internal_SPR_COMMIT_ACK [i]  = new Tcontrol_t [_param->_nb_context [i]];
-        internal_SPR_EVENT_ACK  [i]  = new Tcontrol_t [_param->_nb_context [i]];
-      }
+    ALLOC1(internal_SPR_ACCESS_ACK ,Tcontrol_t,_param->_nb_inst_reexecute);
+    ALLOC2(internal_SPR_COMMIT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context [it1]);
+    ALLOC2(internal_SPR_EVENT_ACK  ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context [it1]);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 112)
@@ -59,12 +59,7 @@
 
         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-        delete [] internal_SPR_ACCESS_ACK;
-        for (uint32_t i=0; i<_param->_nb_front_end; i++)
-          {
-            delete [] internal_SPR_COMMIT_ACK [i];
-            delete [] internal_SPR_EVENT_ACK  [i];
-          }
-        delete [] internal_SPR_COMMIT_ACK;
-        delete [] internal_SPR_EVENT_ACK;
+        DELETE1(internal_SPR_ACCESS_ACK ,_param->_nb_inst_reexecute);
+        DELETE2(internal_SPR_COMMIT_ACK ,_param->_nb_front_end,_param->_nb_context [it1]);
+        DELETE2(internal_SPR_EVENT_ACK  ,_param->_nb_front_end,_param->_nb_context [it1]);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 112)
@@ -76,5 +76,5 @@
   public : uint32_t            * _nb_reg_free                      ;//[nb_rename_unit]
   public : uint32_t            * _nb_rename_unit_bank              ;//[nb_rename_unit]
-  public : uint32_t            * _size_read_counter                ;//[nb_rename_unit]
+//   public : uint32_t            * _size_read_counter                ;//[nb_rename_unit]
   public : uint32_t            * _nb_load_store_queue              ;//[nb_rename_unit]
   public : uint32_t           ** _size_store_queue                 ;//[nb_rename_unit][nb_load_store_queue]
@@ -173,5 +173,5 @@
                         uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                         uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-                        uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                         uint32_t            * size_read_counter                ,//[nb_rename_unit]
                         uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                         uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 112)
@@ -55,5 +55,5 @@
     // ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+      ALLOC2_INTERFACE_BEGIN("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
 
       _ALLOC2_VALACK_IN ( in_RENAME_VAL                       , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -84,9 +84,11 @@
       _ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION_USE             ,"EXCEPTION_USE"             ,Texception_t      ,_param->_size_exception_use          ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
       _ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION                 ,"EXCEPTION"                 ,Texception_t      ,_param->_size_exception              ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_inst_decod[it1]);
     }
 
     // ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
+      ALLOC1_INTERFACE_BEGIN("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
 
       ALLOC1_VALACK_OUT (out_ISSUE_VAL                        , VAL                                                                                 );
@@ -111,9 +113,11 @@
       ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RE                   ,"WRITE_RE"                  ,Tcontrol_t        ,1                                    );
       ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RE                 ,"NUM_REG_RE"                ,Tspecial_address_t,_param->_size_special_register       );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_issue);
     }
 
     // ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+      ALLOC2_INTERFACE_BEGIN("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
 
       _ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL                 , VAL                                                                                 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
@@ -129,9 +133,11 @@
       _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS             ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
       _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA                ,"DATA"                      ,Tgeneral_data_t   ,_param->_size_general_data           ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
     }
 
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC1_INTERFACE("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
+      ALLOC1_INTERFACE_BEGIN("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
 
       ALLOC1_VALACK_OUT (out_INSERT_VAL                       , VAL);
@@ -141,9 +147,11 @@
       ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE                    ,"RE_USE"                    ,Tcontrol_t        ,1                                    );
       ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG                ,"RE_NUM_REG"                ,Tspecial_address_t,_param->_size_special_register       );
+
+      ALLOC1_INTERFACE_END(_param->_sum_inst_insert);
     }
 
 //     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 //     {
-//       ALLOC1_INTERFACE("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
+//       ALLOC1_INTERFACE_BEGIN("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
 
 //       ALLOC1_VALACK_OUT (out_RETIRE_VAL                       , VAL);
@@ -157,9 +165,11 @@
 //       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE                ,"RE_NEW_USE"                ,Tcontrol_t        ,1                                    );
 //       ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG            ,"RE_NEW_NUM_REG"            ,Tspecial_address_t,_param->_size_special_register       );
+
+//       ALLOC1_INTERFACE_END(_param->_sum_inst_retire);
 //     }
 
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~         
     {
-      ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_branch_complete);
+      ALLOC1_INTERFACE_BEGIN("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_branch_complete);
 
       ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL              , VAL);
@@ -171,27 +181,31 @@
       ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_NO_SEQUENCE      ,"NO_SEQUENCE"               ,Tcontrol_t        ,1                                    );
       ALLOC1_SIGNAL_IN  ( in_BRANCH_COMPLETE_MISS_PREDICTION  ,"MISS_PREDICTION"           ,Tcontrol_t        ,1                                    );
+
+      ALLOC1_INTERFACE_END(_param->_nb_inst_branch_complete);
     }
                                                                              
     // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC_INTERFACE("commit_event",OUT,WEST,_("Commit an event (exception)."));
-
-      ALLOC_VALACK_OUT  (out_COMMIT_EVENT_VAL                 , VAL);
-      ALLOC_VALACK_IN   ( in_COMMIT_EVENT_ACK                 , ACK);
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_FRONT_END_ID        ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_CONTEXT_ID          ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_DEPTH               ,"DEPTH"                     ,Tdepth_t          ,_param->_size_depth                  );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_TYPE                ,"TYPE"                      ,Tevent_type_t     ,_param->_size_event_type             );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_IS_DELAY_SLOT       ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS             ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"ADDRESS_EPCR_VAL"          ,Tcontrol_t        ,1                                    );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EPCR        ,"ADDRESS_EPCR"              ,Taddress_t        ,_param->_size_instruction_address    );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"ADDRESS_EEAR_VAL"          ,Tcontrol_t        ,1                                    );
-      ALLOC_SIGNAL_OUT  (out_COMMIT_EVENT_ADDRESS_EEAR        ,"ADDRESS_EEAR"              ,Tgeneral_data_t   ,_param->_size_general_data           );
+      ALLOC0_INTERFACE_BEGIN("commit_event",OUT,WEST,_("Commit an event (exception)."));
+
+      ALLOC0_VALACK_OUT(out_COMMIT_EVENT_VAL                 , VAL);
+      ALLOC0_VALACK_IN ( in_COMMIT_EVENT_ACK                 , ACK);
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_FRONT_END_ID        ,"FRONT_END_ID"              ,Tcontext_t        ,_param->_size_front_end_id           );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_CONTEXT_ID          ,"CONTEXT_ID"                ,Tcontext_t        ,_param->_size_context_id             );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_DEPTH               ,"DEPTH"                     ,Tdepth_t          ,_param->_size_depth                  );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_TYPE                ,"TYPE"                      ,Tevent_type_t     ,_param->_size_event_type             );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_IS_DELAY_SLOT       ,"IS_DELAY_SLOT"             ,Tcontrol_t        ,1                                    );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_ADDRESS             ,"ADDRESS"                   ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,"ADDRESS_EPCR_VAL"          ,Tcontrol_t        ,1                                    );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_ADDRESS_EPCR        ,"ADDRESS_EPCR"              ,Taddress_t        ,_param->_size_instruction_address    );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,"ADDRESS_EEAR_VAL"          ,Tcontrol_t        ,1                                    );
+      ALLOC0_SIGNAL_OUT(out_COMMIT_EVENT_ADDRESS_EEAR        ,"ADDRESS_EEAR"              ,Tgeneral_data_t   ,_param->_size_general_data           );
+
+      ALLOC0_INTERFACE_END();
     }
 
     // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_EVENT_VAL                        , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -201,9 +215,11 @@
       _ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL           ,"ADDRESS_NEXT_VAL"          ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE                 ,"IS_DS_TAKE"                ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL                    , VAL                                                                                 ,_param->_nb_front_end,_param->_nb_context[it1]);
@@ -214,30 +230,38 @@
       _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX                 ,"SR_DSX"                    ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR              ,"SR_TO_ESR"                 ,Tcontrol_t        ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
                                                                                   
     // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL               ,"COMMIT_ALL"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM               ,"COMMIT_MEM"                 ,Tcounter_t       ,_param->_size_nb_inst_commit         ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL                ,"DECOD_ALL"                  ,Tcounter_t       ,_param->_size_nb_inst_decod          ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN                        ,"MIN"                        ,Tdepth_t         ,_param->_size_depth                  ,_param->_nb_front_end, _param->_nb_context[it1]);
       _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX                        ,"MAX"                        ,Tdepth_t         ,_param->_size_depth                  ,_param->_nb_front_end, _param->_nb_context[it1]); 
       _ALLOC2_SIGNAL_IN ( in_DEPTH_FULL                       ,"FULL"                       ,Tcontrol_t       ,1                                    ,_param->_nb_front_end, _param->_nb_context[it1]); 
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
     // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
+      ALLOC2_INTERFACE_BEGIN("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
 
       _ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE                       ,"SR_IEE"                     ,Tcontrol_t       ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
       _ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH                       ,"SR_EPH"                     ,Tcontrol_t       ,1                                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
     }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp	(revision 112)
@@ -117,16 +117,16 @@
         DELETE1_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_branch_complete,1                         );
         
-        DELETE_SIGNAL (out_COMMIT_EVENT_VAL                 , 1);
-        DELETE_SIGNAL ( in_COMMIT_EVENT_ACK                 , 1);
-        DELETE_SIGNAL (out_COMMIT_EVENT_FRONT_END_ID        ,_param->_size_front_end_id           );
-        DELETE_SIGNAL (out_COMMIT_EVENT_CONTEXT_ID          ,_param->_size_context_id             );
-        DELETE_SIGNAL (out_COMMIT_EVENT_DEPTH               ,_param->_size_depth                  );
-        DELETE_SIGNAL (out_COMMIT_EVENT_TYPE                ,_param->_size_event_type             );
-        DELETE_SIGNAL (out_COMMIT_EVENT_IS_DELAY_SLOT       ,1                                    );
-        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS             ,_param->_size_general_data           );
-        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,1                                    );
-        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EPCR        ,_param->_size_general_data           );
-        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,1                                    );
-        DELETE_SIGNAL (out_COMMIT_EVENT_ADDRESS_EEAR        ,_param->_size_general_data           );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_VAL                 , 1);
+        DELETE0_SIGNAL( in_COMMIT_EVENT_ACK                 , 1);
+        DELETE0_SIGNAL(out_COMMIT_EVENT_FRONT_END_ID        ,_param->_size_front_end_id           );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_CONTEXT_ID          ,_param->_size_context_id             );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_DEPTH               ,_param->_size_depth                  );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_TYPE                ,_param->_size_event_type             );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_IS_DELAY_SLOT       ,1                                    );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_ADDRESS             ,_param->_size_general_data           );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ,1                                    );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_ADDRESS_EPCR        ,_param->_size_general_data           );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ,1                                    );
+        DELETE0_SIGNAL(out_COMMIT_EVENT_ADDRESS_EEAR        ,_param->_size_general_data           );
         
         DELETE2_SIGNAL( in_EVENT_VAL                        ,_param->_nb_front_end,_param->_nb_context[it1],1                                    );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 112)
@@ -63,5 +63,5 @@
                           uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                           uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-                          uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                           uint32_t            * size_read_counter                ,//[nb_rename_unit]
                           uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                           uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
@@ -119,5 +119,5 @@
     _nb_reg_free                       = nb_reg_free                      ;
     _nb_rename_unit_bank               = nb_rename_unit_bank              ;
-    _size_read_counter                 = size_read_counter                ;
+//     _size_read_counter                 = size_read_counter                ;
     _nb_load_store_queue               = nb_load_store_queue              ;
     _size_store_queue                  = size_store_queue                 ;
@@ -238,6 +238,7 @@
        _nb_special_register                           [i],
        _nb_reg_free                                   [i],
-       _nb_rename_unit_bank                           [i],
-       _size_read_counter                             [i] 
+       _nb_rename_unit_bank                           [i]// ,
+//        _size_read_counter                             [i]
+       
        );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 111)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 112)
@@ -81,6 +81,6 @@
     for (uint32_t i=0; i<_nb_rename_unit; ++i)
     str+= toString(MSG_INFORMATION)+"   * nb_rename_unit_bank                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_rename_unit_bank              [i])+"\n";//[nb_rename_unit]
-    for (uint32_t i=0; i<_nb_rename_unit; ++i)
-    str+= toString(MSG_INFORMATION)+"   * size_read_counter                  ["+toString(i)+"] : "+toString<uint32_t         >(_size_read_counter                [i])+"\n";//[nb_rename_unit]
+//     for (uint32_t i=0; i<_nb_rename_unit; ++i)
+//     str+= toString(MSG_INFORMATION)+"   * size_read_counter                  ["+toString(i)+"] : "+toString<uint32_t         >(_size_read_counter                [i])+"\n";//[nb_rename_unit]
     for (uint32_t i=0; i<_nb_rename_unit; ++i)
     str+= toString(MSG_INFORMATION)+"   * nb_load_store_queue                ["+toString(i)+"] : "+toString<uint32_t         >(_nb_load_store_queue              [i])+"\n";//[nb_rename_unit]
