Changeset 115 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue
- Timestamp:
- Apr 20, 2009, 11:29:17 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue
- Files:
-
- 1 added
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/configuration.cfg
r88 r115 1 1 Write_queue 2 8 8 *2 # uint32_t size_queue 3 1 1 *2 # uint32_t nb_context 4 1 1 *2 # uint32_t nb_front_end 5 1 4 *2 # uint32_t nb_ooo_engine 6 32 32 *2 # uint32_t nb_packet 7 32 32 *2 # uint32_t size_general_data 8 64 64 *2 # uint32_t nb_general_register 9 2 2 *2 # uint32_t size_special_data 10 16 16 *2 # uint32_t nb_special_register 11 1 8 *4 # uint32_t nb_bypass_write 2 8 8 *2 # uint32_t size_queue 3 1 1 *2 # uint32_t nb_context 4 1 1 *2 # uint32_t nb_front_end 5 1 4 *2 # uint32_t nb_ooo_engine 6 32 32 *2 # uint32_t nb_packet 7 32 32 *2 # uint32_t size_general_data 8 64 64 *2 # uint32_t nb_general_register 9 2 2 *2 # uint32_t size_special_data 10 16 16 *2 # uint32_t nb_special_register 11 1 8 *4 # uint32_t nb_bypass_write 12 0 1 +1 # Twrite_queue_scheme_t queue_scheme -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/main.cpp
r113 r115 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/include/top.h" 9 9 10 <<<<<<< .mine 11 #define NB_PARAMS 11 12 13 void usage (int argc, char * argv[]) 14 { 15 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 16 err (_("list_params is :\n")); 17 err (_(" * size_queue (uint32_t )\n")); 18 err (_(" * nb_context (uint32_t )\n")); 19 err (_(" * nb_front_end (uint32_t )\n")); 20 err (_(" * nb_ooo_engine (uint32_t )\n")); 21 err (_(" * nb_packet (uint32_t )\n")); 22 err (_(" * size_general_data (uint32_t )\n")); 23 err (_(" * nb_general_register (uint32_t )\n")); 24 err (_(" * size_special_data (uint32_t )\n")); 25 err (_(" * nb_special_register (uint32_t )\n")); 26 err (_(" * nb_bypass_write (uint32_t )\n")); 27 err (_(" * queue_scheme (Twrite_queue_scheme_t)\n")); 28 29 exit (1); 30 } 31 32 #ifndef SYSTEMC 33 ======= 10 34 #ifndef MTI_SYSTEMC 11 35 # ifndef SYSTEMC 36 >>>>>>> .r113 12 37 int main (int argc, char * argv[]) 13 38 # else … … 17 42 int _return = EXIT_SUCCESS; 18 43 44 <<<<<<< .mine 45 uint32_t x = 1; 46 47 const string name = argv[x++]; 48 const uint32_t size_queue = fromString<uint32_t>(argv[x++]); 49 const uint32_t nb_context = fromString<uint32_t>(argv[x++]); 50 const uint32_t nb_front_end = fromString<uint32_t>(argv[x++]); 51 const uint32_t nb_ooo_engine = fromString<uint32_t>(argv[x++]); 52 const uint32_t nb_packet = fromString<uint32_t>(argv[x++]); 53 const uint32_t size_general_data = fromString<uint32_t>(argv[x++]); 54 const uint32_t nb_general_register = fromString<uint32_t>(argv[x++]); 55 const uint32_t size_special_data = fromString<uint32_t>(argv[x++]); 56 const uint32_t nb_special_register = fromString<uint32_t>(argv[x++]); 57 const uint32_t nb_bypass_write = fromString<uint32_t>(argv[x++]); 58 const Twrite_queue_scheme_t queue_scheme = fromString<Twrite_queue_scheme_t>(argv[x++]); 59 60 ======= 61 >>>>>>> .r113 19 62 try 20 63 { 64 <<<<<<< .mine 65 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters 66 (size_queue , 67 nb_context , 68 nb_front_end , 69 nb_ooo_engine , 70 nb_packet , 71 size_general_data , 72 nb_general_register, 73 size_special_data , 74 nb_special_register, 75 nb_bypass_write , 76 queue_scheme , 77 true // is_toplevel 78 ); 79 80 msg(_("%s"),param->print(1).c_str()); 81 82 test (name,param); 83 ======= 21 84 top * my_top = new top ("my_top",argc,argv); 22 85 … … 24 87 25 88 delete my_top; 89 >>>>>>> .r113 26 90 } 27 91 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
r103 r115 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h" 13 14 #include <math.h> 14 15 … … 26 27 { 27 28 //-----[ fields ]------------------------------------------------------------ 28 public : uint32_t _size_queue ; 29 public : uint32_t _nb_context ; 30 public : uint32_t _nb_front_end ; 31 public : uint32_t _nb_ooo_engine ; 32 public : uint32_t _nb_packet ; 33 //public : uint32_t _size_general_data ; 34 public : uint32_t _nb_general_register ; 35 //public : uint32_t _size_special_data ; 36 public : uint32_t _nb_special_register ; 37 public : uint32_t _nb_bypass_write ; 29 public : uint32_t _size_queue ; 30 public : uint32_t _nb_context ; 31 public : uint32_t _nb_front_end ; 32 public : uint32_t _nb_ooo_engine ; 33 public : uint32_t _nb_packet ; 34 //public : uint32_t _size_general_data ; 35 public : uint32_t _nb_general_register ; 36 //public : uint32_t _size_special_data ; 37 public : uint32_t _nb_special_register ; 38 public : uint32_t _nb_bypass_write ; 39 public : Twrite_queue_scheme_t _queue_scheme ; 38 40 39 public : uint32_t _nb_gpr_write ;40 public : uint32_t _nb_spr_write ;41 42 //public : uint32_t _size_context_id ;43 //public : uint32_t _size_front_end_id ;44 //public : uint32_t _size_ooo_engine_id ;45 //public : uint32_t _size_packet_id ;46 //public : uint32_t _size_general_register ;47 //public : uint32_t _size_special_register ;48 public : uint32_t _size_internal_queue ;49 50 //public : bool _have_port_context_id ;51 //public : bool _have_port_front_end_id ;52 //public : bool _have_port_ooo_engine_id ;53 //public : bool _have_port_packet_id ;41 public : uint32_t _nb_gpr_write ; 42 public : uint32_t _nb_spr_write ; 43 44 //public : uint32_t _size_context_id ; 45 //public : uint32_t _size_front_end_id ; 46 //public : uint32_t _size_ooo_engine_id ; 47 //public : uint32_t _size_packet_id ; 48 //public : uint32_t _size_general_register ; 49 //public : uint32_t _size_special_register ; 50 public : uint32_t _size_internal_queue ; 51 52 //public : bool _have_port_context_id ; 53 //public : bool _have_port_front_end_id ; 54 //public : bool _have_port_ooo_engine_id ; 55 //public : bool _have_port_packet_id ; 54 56 55 57 //-----[ methods ]----------------------------------------------------------- 56 public : Parameters (uint32_t size_queue , 57 uint32_t nb_context , 58 uint32_t nb_front_end , 59 uint32_t nb_ooo_engine , 60 uint32_t nb_packet , 61 uint32_t size_general_data , 62 uint32_t nb_general_register, 63 uint32_t size_special_data , 64 uint32_t nb_special_register, 65 uint32_t nb_bypass_write , 66 bool is_toplevel=false ); 58 public : Parameters (uint32_t size_queue , 59 uint32_t nb_context , 60 uint32_t nb_front_end , 61 uint32_t nb_ooo_engine , 62 uint32_t nb_packet , 63 uint32_t size_general_data , 64 uint32_t nb_general_register, 65 uint32_t size_special_data , 66 uint32_t nb_special_register, 67 uint32_t nb_bypass_write , 68 Twrite_queue_scheme_t queue_scheme , 69 bool is_toplevel=false ); 67 70 //public : Parameters (Parameters & param) ; 68 71 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
r97 r115 19 19 namespace write_unit { 20 20 namespace write_queue { 21 22 typedef enum 23 { 24 WRITE_QUEUE_SCHEME_MOORE // Write register and pop is not in same cycle 25 ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle 26 } Twrite_queue_scheme_t; 21 27 22 28 class write_queue_entry_t … … 78 84 }; // end namespace multi_execute_loop 79 85 }; // end namespace core 86 }; // end namespace behavioural 80 87 81 }; // end namespace behavioural 88 template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t& x) 89 { 90 switch (x) 91 { 92 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE : return "moore"; break; 93 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY : return "mealy"; break; 94 default : return ""; break; 95 } 96 }; 97 98 template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const std::string& x) 99 { 100 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE))) == 0) or 101 (x.compare("moore") == 0)) 102 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE; 103 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY))) == 0) or 104 (x.compare("mealy") == 0)) 105 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY; 106 107 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); 108 }; 109 82 110 }; // end namespace morpheo 83 111 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
r113 r115 139 139 Tcontrol_t internal_GPR_WRITE_VAL; 140 140 Tcontrol_t internal_SPR_WRITE_VAL; 141 142 // function pointer 143 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_transition) (void); 144 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMoore ) (void); 145 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMealy ) (void); 141 146 #endif 142 147 … … 167 172 public : void transition (void); 168 173 public : void genMoore (void); 174 public : void genMealy (void); 169 175 #endif 170 176 #ifdef STATISTICS -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r113 r115 20 20 #undef FUNCTION 21 21 #define FUNCTION "Write_queue::Parameters" 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 bool is_toplevel): 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 Twrite_queue_scheme_t queue_scheme , 33 bool is_toplevel ): 33 34 behavioural::Parameters ("Write_queue") 34 35 { … … 43 44 _nb_special_register = nb_special_register; 44 45 _nb_bypass_write = nb_bypass_write ; 46 _queue_scheme = queue_scheme ; 45 47 46 48 _nb_gpr_write = 1; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp
r81 r115 38 38 xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); 39 39 xml.singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write )); xml.singleton_end(); 40 xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); 40 41 xml.balise_close(); 41 42 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
r113 r115 84 84 SC_METHOD (genMoore); 85 85 dont_initialize (); 86 sensitive << (*(in_CLOCK)).neg(); 86 sensitive << (*(in_CLOCK)).neg(); // need internal register 87 87 88 88 # ifdef SYSTEMCASS_SPECIFIC 89 89 // List dependency information 90 90 # endif 91 91 92 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) 93 { 94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy"); 95 96 SC_METHOD (genMealy); 97 dont_initialize (); 98 sensitive << (*(in_CLOCK)).neg(); // need internal register 99 for (uint32_t i=0; i<_param->_nb_gpr_write; ++i) 100 sensitive << (*(in_GPR_WRITE_ACK [i])); 101 for (uint32_t i=0; i<_param->_nb_spr_write; ++i) 102 sensitive << (*(in_SPR_WRITE_ACK [i])); 103 104 # ifdef SYSTEMCASS_SPECIFIC 105 // List dependency information 106 # endif 107 } 108 92 109 #endif 93 110 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r103 r115 26 26 log_function(Write_queue,FUNCTION,_name.c_str()); 27 27 28 // -----[ Interface "Write_queue_in" ]--------------------------------29 {30 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue;31 32 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK);33 }34 35 // -----[ Interface "Write_queue_out" ]--------------------------------36 {37 // TODO : make a genMealy version38 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and39 (not _queue->front()->_write_rd) and40 (not _queue->front()->_write_re));41 42 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);43 44 if (internal_WRITE_QUEUE_OUT_VAL)45 {46 if (_param->_have_port_context_id)47 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id );48 if (_param->_have_port_front_end_id)49 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );50 if (_param->_have_port_ooo_engine_id)51 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);52 if (_param->_have_port_rob_ptr )53 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id );54 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation );55 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type );56 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re );57 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception );58 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence );59 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address );60 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd );61 }62 }63 64 // -----[ Interface "gpr_write" ]-------------------------------------65 // -----[ Interface "spr_write" ]-------------------------------------66 {67 bool val = not _queue->empty();68 69 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd;70 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re;71 72 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);73 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);74 75 if (val)76 {77 if (_param->_have_port_ooo_engine_id)78 {79 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);80 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);81 }82 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd);83 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd );84 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re);85 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re );86 }87 }88 28 // -----[ Interface "bypass_write" ]---------------------------------- 89 29 { … … 121 61 } 122 62 } 63 64 // -----[ Interface "Write_queue_in" ]-------------------------------- 65 { 66 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue; 67 68 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK); 69 } 70 71 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MOORE) 72 { 73 // -----[ Interface "gpr_write" ]------------------------------------- 74 // -----[ Interface "spr_write" ]------------------------------------- 75 { 76 bool val = not _queue->empty(); 77 78 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd; 79 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re; 80 81 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL); 82 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL); 83 84 if (val) 85 { 86 if (_param->_have_port_ooo_engine_id) 87 { 88 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 89 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 90 } 91 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd); 92 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd ); 93 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re); 94 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re ); 95 } 96 } 97 98 // -----[ Interface "Write_queue_out" ]-------------------------------- 99 { 100 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and 101 (not _queue->front()->_write_rd) and 102 (not _queue->front()->_write_re)); 103 104 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL); 105 106 if (internal_WRITE_QUEUE_OUT_VAL) 107 { 108 if (_param->_have_port_context_id) 109 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id ); 110 if (_param->_have_port_front_end_id) 111 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id ); 112 if (_param->_have_port_ooo_engine_id) 113 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id); 114 if (_param->_have_port_rob_ptr ) 115 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id ); 116 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 117 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); 118 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); 119 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); 120 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence ); 121 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address ); 122 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd ); 123 } 124 } 125 126 } // end WRITE_QUEUE_SCHEME_MOORE 123 127 log_end(Write_queue,FUNCTION); 124 128 };
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