Changeset 115 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src
- Timestamp:
- Apr 20, 2009, 11:29:17 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src
- Files:
-
- 1 added
- 4 edited
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Parameters.cpp (modified) (2 diffs)
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Parameters_print.cpp (modified) (1 diff)
-
Write_queue.cpp (modified) (1 diff)
-
Write_queue_genMealy.cpp (added)
-
Write_queue_genMoore.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r113 r115 20 20 #undef FUNCTION 21 21 #define FUNCTION "Write_queue::Parameters" 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 bool is_toplevel): 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 Twrite_queue_scheme_t queue_scheme , 33 bool is_toplevel ): 33 34 behavioural::Parameters ("Write_queue") 34 35 { … … 43 44 _nb_special_register = nb_special_register; 44 45 _nb_bypass_write = nb_bypass_write ; 46 _queue_scheme = queue_scheme ; 45 47 46 48 _nb_gpr_write = 1; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp
r81 r115 38 38 xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); 39 39 xml.singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write )); xml.singleton_end(); 40 xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); 40 41 xml.balise_close(); 41 42 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
r113 r115 84 84 SC_METHOD (genMoore); 85 85 dont_initialize (); 86 sensitive << (*(in_CLOCK)).neg(); 86 sensitive << (*(in_CLOCK)).neg(); // need internal register 87 87 88 88 # ifdef SYSTEMCASS_SPECIFIC 89 89 // List dependency information 90 90 # endif 91 91 92 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) 93 { 94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy"); 95 96 SC_METHOD (genMealy); 97 dont_initialize (); 98 sensitive << (*(in_CLOCK)).neg(); // need internal register 99 for (uint32_t i=0; i<_param->_nb_gpr_write; ++i) 100 sensitive << (*(in_GPR_WRITE_ACK [i])); 101 for (uint32_t i=0; i<_param->_nb_spr_write; ++i) 102 sensitive << (*(in_SPR_WRITE_ACK [i])); 103 104 # ifdef SYSTEMCASS_SPECIFIC 105 // List dependency information 106 # endif 107 } 108 92 109 #endif 93 110 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r103 r115 26 26 log_function(Write_queue,FUNCTION,_name.c_str()); 27 27 28 // -----[ Interface "Write_queue_in" ]--------------------------------29 {30 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue;31 32 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK);33 }34 35 // -----[ Interface "Write_queue_out" ]--------------------------------36 {37 // TODO : make a genMealy version38 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and39 (not _queue->front()->_write_rd) and40 (not _queue->front()->_write_re));41 42 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);43 44 if (internal_WRITE_QUEUE_OUT_VAL)45 {46 if (_param->_have_port_context_id)47 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id );48 if (_param->_have_port_front_end_id)49 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );50 if (_param->_have_port_ooo_engine_id)51 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);52 if (_param->_have_port_rob_ptr )53 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id );54 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation );55 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type );56 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re );57 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception );58 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence );59 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address );60 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd );61 }62 }63 64 // -----[ Interface "gpr_write" ]-------------------------------------65 // -----[ Interface "spr_write" ]-------------------------------------66 {67 bool val = not _queue->empty();68 69 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd;70 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re;71 72 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);73 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);74 75 if (val)76 {77 if (_param->_have_port_ooo_engine_id)78 {79 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);80 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);81 }82 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd);83 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd );84 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re);85 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re );86 }87 }88 28 // -----[ Interface "bypass_write" ]---------------------------------- 89 29 { … … 121 61 } 122 62 } 63 64 // -----[ Interface "Write_queue_in" ]-------------------------------- 65 { 66 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue; 67 68 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK); 69 } 70 71 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MOORE) 72 { 73 // -----[ Interface "gpr_write" ]------------------------------------- 74 // -----[ Interface "spr_write" ]------------------------------------- 75 { 76 bool val = not _queue->empty(); 77 78 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd; 79 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re; 80 81 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL); 82 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL); 83 84 if (val) 85 { 86 if (_param->_have_port_ooo_engine_id) 87 { 88 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 89 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 90 } 91 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd); 92 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd ); 93 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re); 94 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re ); 95 } 96 } 97 98 // -----[ Interface "Write_queue_out" ]-------------------------------- 99 { 100 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and 101 (not _queue->front()->_write_rd) and 102 (not _queue->front()->_write_re)); 103 104 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL); 105 106 if (internal_WRITE_QUEUE_OUT_VAL) 107 { 108 if (_param->_have_port_context_id) 109 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id ); 110 if (_param->_have_port_front_end_id) 111 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id ); 112 if (_param->_have_port_ooo_engine_id) 113 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id); 114 if (_param->_have_port_rob_ptr ) 115 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id ); 116 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 117 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); 118 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); 119 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); 120 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence ); 121 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address ); 122 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd ); 123 } 124 } 125 126 } // end WRITE_QUEUE_SCHEME_MOORE 123 127 log_end(Write_queue,FUNCTION); 124 128 };
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