Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h	(revision 115)
@@ -66,5 +66,7 @@
   public : uint32_t              * _size_execute_queue                            ;//[nb_write_bloc]
   public : uint32_t              * _nb_bypass_write                               ;//[nb_write_bloc]
- 
+  public : core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t 
+                                 * _write_queue_scheme                            ;//[nb_write_bloc]
+
     // Load_store_unit
   public : uint32_t                _nb_load_store_unit                            ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp	(revision 115)
@@ -153,4 +153,5 @@
     ALLOC1(_param->_size_execute_queue,uint32_t,_param->_nb_write_bloc);
     ALLOC1(_param->_nb_bypass_write   ,uint32_t,_param->_nb_write_bloc);
+    ALLOC1(_param->_write_queue_scheme,core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,_param->_nb_write_bloc);
 
     for (uint32_t i=0; i<_param->_nb_write_bloc; ++i)
@@ -161,4 +162,5 @@
         _param->_size_execute_queue [i] = fromString<uint32_t> (getParam("size_execute_queue","write_bloc",toString(i).c_str(),""));
         _param->_nb_bypass_write    [i] = fromString<uint32_t> (getParam("nb_bypass_write"   ,"write_bloc",toString(i).c_str(),""));
+	_param->_write_queue_scheme [i] = fromString<core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t> (getParam("write_queue_scheme","write_bloc",toString(i).c_str(),""));
       }   
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp	(revision 115)
@@ -27,4 +27,5 @@
     bool       READ_UNIT_ENABLE       [_param->_nb_execute_loop][_param->_max_nb_read_unit ];
 
+    // Init -> all at 0
     for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
       for (uint32_t j=0; j<_param->_nb_inst_issue[i]; ++j)
@@ -36,4 +37,5 @@
           // Read unit is enable is signal ack is set
           READ_UNIT_ENABLE       [i][j] = (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1);
+	  log_printf(TRACE,Core_Glue,FUNCTION,"  * Read_unit [%d][%d] : %d",i,j,READ_UNIT_ENABLE[i][j]);
         }
 
@@ -42,4 +44,5 @@
         log_printf(TRACE,Core_Glue,FUNCTION,"  * execute_loop [%d]",i);
 
+	// for each issue of each ooo_engine ...
         std::list<generic::priority::select_t> * select_ooo_engine = _priority_ooo_engine[i]->select();
         for (std::list<generic::priority::select_t>::iterator it_ooo_engine=select_ooo_engine->begin();
@@ -47,20 +50,23 @@
              ++it_ooo_engine)
           {
+	    // get id
             const uint32_t ooo_engine_id  = it_ooo_engine->grp;
             const uint32_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][ooo_engine_id];
             const uint32_t num_inst_issue = it_ooo_engine->elt;
 
-            log_printf(TRACE,Core_Glue,FUNCTION,"    * num_ooo_engine [%d] (id : %d)",num_ooo_engine, ooo_engine_id);
+            log_printf(TRACE,Core_Glue,FUNCTION,"    * num_ooo_engine [%d] (id -> %d)",num_ooo_engine, ooo_engine_id);
             log_printf(TRACE,Core_Glue,FUNCTION,"    * num_inst_issue          : %d",num_inst_issue);
-            log_printf(TRACE,Core_Glue,FUNCTION,"    * ISSUE_OOO_ENGINE_VAL    : %d",PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]));
 
-            // have request ?
             Tcontrol_t ooo_engine_val = PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]);
 
-//             if (ooo_engine_val)
+            log_printf(TRACE,Core_Glue,FUNCTION,"    * ISSUE_OOO_ENGINE_VAL    : %d",ooo_engine_val);
+
+            // test if have a request ?
+// 	    if (ooo_engine_val)
               {
 //              // If ooo_engine can issue instruction on multiple execute_loop
 //              if (not ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue])
 
+		// Scan all read_unit
                 std::list<generic::priority::select_t> * select_read_unit = _priority_read_unit[i]->select();
                 for (std::list<generic::priority::select_t>::iterator it_read_unit=select_read_unit->begin();
@@ -69,45 +75,51 @@
                   {
                     uint32_t num_read_unit = it_read_unit->grp;
+		    
+		    // Test if have an link and read unit is enable
+		    log_printf(TRACE,Core_Glue,FUNCTION,"      * read_unit             : %d",num_read_unit);
+		    log_printf(TRACE,Core_Glue,FUNCTION,"        * READ_UNIT_ENABLE    : %d",READ_UNIT_ENABLE [i][num_read_unit]);
+		    log_printf(TRACE,Core_Glue,FUNCTION,"        * table_dispatch      : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]);
+		    
+		    Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit];
 
-                  // Test if have an link and read unit is enable
-                  log_printf(TRACE,Core_Glue,FUNCTION,"    * read_unit               : %d",num_read_unit);
-                  log_printf(TRACE,Core_Glue,FUNCTION,"      * READ_UNIT_ENABLE      : %d",READ_UNIT_ENABLE [i][num_read_unit]);
-                  log_printf(TRACE,Core_Glue,FUNCTION,"      * table_dispatch        : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]);
+		    // Test if the read_unit is not busy and if an link is between the issue slot and read_unit
+		    if (read_unit_enable and 
+			_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit])
+		      {
+			log_printf(TRACE,Core_Glue,FUNCTION,"        * find !!!");
+			
+			// Transaction
+			READ_UNIT_ENABLE       [i][num_read_unit] = false; // now, this read_unit is busy
+			ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val; // = 1
+			ISSUE_OOO_ENGINE_ACK   [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1
+			
+			if (_param->_have_port_context_id)
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID            [num_ooo_engine][num_inst_issue]));
+			if (_param->_have_port_front_end_id)
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID          [num_ooo_engine][num_inst_issue]));
+			if (_param->_have_port_ooo_engine_id)
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID         [i][num_read_unit],ooo_engine_id);
+			if (_param->_have_port_rob_ptr)
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID             [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION             [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE                  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE                  [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue]));
+			if (_param->_have_port_load_queue_ptr)
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE  [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT          [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT              [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA               [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA            [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB               [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB            [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC               [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC            [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD              [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD            [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE              [num_ooo_engine][num_inst_issue]));
+			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE            [num_ooo_engine][num_inst_issue]));
 
-                  Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit];
-                  if (read_unit_enable and 
-                      _param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit])
-                    {
-                      // Transaction
-                      ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val;
-                      ISSUE_OOO_ENGINE_ACK   [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1
-                      READ_UNIT_ENABLE       [i][num_read_unit] = false; // now, this read_unit is busy
-
-                      if (_param->_have_port_context_id)
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID            [num_ooo_engine][num_inst_issue]));
-                      if (_param->_have_port_front_end_id)
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID          [num_ooo_engine][num_inst_issue]));
-                      if (_param->_have_port_ooo_engine_id)
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID         [i][num_read_unit],ooo_engine_id);
-                      if (_param->_have_port_rob_ptr)
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID             [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION             [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE                  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE                  [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue]));
-                      if (_param->_have_port_load_queue_ptr)
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE  [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT          [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT              [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA               [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA            [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB               [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB            [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC               [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC            [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD              [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD            [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE              [num_ooo_engine][num_inst_issue]));
-                      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE            [num_ooo_engine][num_inst_issue]));
-                    }            
+			break; // find : stop scan read_unit
+		      }
                   }
               }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp	(revision 115)
@@ -82,4 +82,6 @@
       
       test (name,param);
+
+      delete param;
     }
   catch (morpheo::ErrorMorpheo & error)
@@ -94,5 +96,7 @@
     }
 
-  delete timing;
+  for (uint32_t i=0; i< MAX_TYPE; i++)
+    delete timing [i];
+  delete [] timing;
   
   return (EXIT_SUCCESS);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp	(revision 115)
@@ -70,9 +70,14 @@
         // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
         
-        delete [] _execute_register;
-        delete    _execute_param;
-        delete    _execute_operation_in;
-        delete    _execute_operation_out;
-        delete [] _function_execute;
+	for (uint32_t i=0; i<_param->_nb_context; i++)
+	  for (uint32_t j=0; j<_param->_nb_front_end; j++)
+	    for (uint32_t k=0; k<_param->_nb_ooo_engine; k++)
+	      delete _execute_register [i][j][k];
+
+        DELETE3(_execute_register,_param->_nb_context,_param->_nb_front_end,_param->_nb_ooo_engine);
+        DELETE0(_execute_param);
+        DELETE0(_execute_operation_in);
+        DELETE0(_execute_operation_out);
+        DELETE2(_function_execute,_param->_nb_type,_param->_nb_operation);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg	(revision 115)
@@ -11,2 +11,3 @@
 16	16	*2 # uint32_t nb_special_register
 1	8	*2 # uint32_t nb_bypass_write  
+0	1	+1 #          write_queue_scheme
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg	(revision 115)
@@ -11,2 +11,3 @@
 16	16	*2 # uint32_t nb_special_register
 8	8	*2 # uint32_t nb_bypass_write  
+0	1	+1 #          write_queue_scheme
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp	(revision 115)
@@ -8,6 +8,32 @@
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/top.h"
 
+<<<<<<< .mine
+#define NB_PARAMS 12
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * size_write_queue    (uint32_t)\n"));
+  err (_(" * size_execute_queue  (uint32_t)\n"));
+  err (_(" * nb_context          (uint32_t)\n"));
+  err (_(" * nb_front_end        (uint32_t)\n"));
+  err (_(" * nb_ooo_engine       (uint32_t)\n"));
+  err (_(" * nb_packet           (uint32_t)\n"));
+  err (_(" * size_general_data   (uint32_t)\n"));
+  err (_(" * nb_general_register (uint32_t)\n"));
+  err (_(" * size_special_data   (uint32_t)\n"));
+  err (_(" * nb_special_register (uint32_t)\n"));
+  err (_(" * nb_bypass_write     (uint32_t)\n"));
+  err (_(" * write_queue_scheme  (Twrite_queue_scheme_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+=======
 #ifndef MTI_SYSTEMC
 # ifndef SYSTEMC
+>>>>>>> .r113
 int main    (int argc, char * argv[])
 # else
@@ -17,6 +43,45 @@
   int _return = EXIT_SUCCESS;
 
+<<<<<<< .mine
+  uint32_t       x = 1;
+
+  const string   name                =      argv[x++];
+  const uint32_t size_write_queue    = fromString<uint32_t>(argv[x++]);
+  const uint32_t size_execute_queue  = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_context          = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_front_end        = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_ooo_engine       = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_packet           = fromString<uint32_t>(argv[x++]);
+  const uint32_t size_general_data   = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_general_register = fromString<uint32_t>(argv[x++]);
+  const uint32_t size_special_data   = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_special_register = fromString<uint32_t>(argv[x++]);
+  const uint32_t nb_bypass_write     = fromString<uint32_t>(argv[x++]);
+  const write_queue::Twrite_queue_scheme_t write_queue_scheme = fromString<write_queue::Twrite_queue_scheme_t>(argv[x++]);
+=======
+>>>>>>> .r113
   try 
     {
+<<<<<<< .mine
+      morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters
+	(size_write_queue   ,
+	 size_execute_queue ,
+	 nb_context         ,
+	 nb_front_end       ,
+	 nb_ooo_engine      ,
+	 nb_packet          ,
+	 size_general_data  ,
+	 nb_general_register,
+	 size_special_data  ,
+	 nb_special_register,
+	 nb_bypass_write    ,
+	 write_queue_scheme ,
+         true // is_toplevel
+         );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+=======
       top * my_top = new top ("my_top",argc,argv);
 
@@ -24,4 +89,5 @@
 
       delete my_top;
+>>>>>>> .r113
     }
   catch (morpheo::ErrorMorpheo & error)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/configuration.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/configuration.cfg	(revision 115)
@@ -1,11 +1,12 @@
 Write_queue
-8	8	*2 # uint32_t size_queue         
-1	1	*2 # uint32_t nb_context         
-1	1	*2 # uint32_t nb_front_end       
-1	4	*2 # uint32_t nb_ooo_engine      
-32	32	*2 # uint32_t nb_packet          
-32	32	*2 # uint32_t size_general_data  
-64	64	*2 # uint32_t nb_general_register
-2	2	*2 # uint32_t size_special_data  
-16	16	*2 # uint32_t nb_special_register
-1	8	*4 # uint32_t nb_bypass_write  
+8	8	*2 # uint32_t              size_queue         
+1	1	*2 # uint32_t              nb_context         
+1	1	*2 # uint32_t              nb_front_end       
+1	4	*2 # uint32_t              nb_ooo_engine      
+32	32	*2 # uint32_t              nb_packet          
+32	32	*2 # uint32_t              size_general_data  
+64	64	*2 # uint32_t              nb_general_register
+2	2	*2 # uint32_t              size_special_data  
+16	16	*2 # uint32_t              nb_special_register
+1	8	*4 # uint32_t              nb_bypass_write  
+0	1	+1 # Twrite_queue_scheme_t queue_scheme
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/main.cpp	(revision 115)
@@ -8,6 +8,31 @@
 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/include/top.h"
 
+<<<<<<< .mine
+#define NB_PARAMS 11
+
+void usage (int argc, char * argv[])
+{
+  err (_("<Usage> %s name_instance list_params.\n"),argv[0]);
+  err (_("list_params is :\n"));
+  err (_(" * size_queue          (uint32_t             )\n"));
+  err (_(" * nb_context          (uint32_t             )\n"));
+  err (_(" * nb_front_end        (uint32_t             )\n"));
+  err (_(" * nb_ooo_engine       (uint32_t             )\n"));
+  err (_(" * nb_packet           (uint32_t             )\n"));
+  err (_(" * size_general_data   (uint32_t             )\n"));
+  err (_(" * nb_general_register (uint32_t             )\n"));
+  err (_(" * size_special_data   (uint32_t             )\n"));
+  err (_(" * nb_special_register (uint32_t             )\n"));
+  err (_(" * nb_bypass_write     (uint32_t             )\n"));
+  err (_(" * queue_scheme        (Twrite_queue_scheme_t)\n"));
+
+  exit (1);
+}
+
+#ifndef SYSTEMC
+=======
 #ifndef MTI_SYSTEMC
 # ifndef SYSTEMC
+>>>>>>> .r113
 int main    (int argc, char * argv[])
 # else
@@ -17,6 +42,44 @@
   int _return = EXIT_SUCCESS;
 
+<<<<<<< .mine
+  uint32_t       x = 1;
+
+  const string                name                =      argv[x++];
+  const uint32_t              size_queue          = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_context          = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_front_end        = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_ooo_engine       = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_packet           = fromString<uint32_t>(argv[x++]);
+  const uint32_t              size_general_data   = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_general_register = fromString<uint32_t>(argv[x++]);
+  const uint32_t              size_special_data   = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_special_register = fromString<uint32_t>(argv[x++]);
+  const uint32_t              nb_bypass_write     = fromString<uint32_t>(argv[x++]);
+  const Twrite_queue_scheme_t queue_scheme        = fromString<Twrite_queue_scheme_t>(argv[x++]);
+
+=======
+>>>>>>> .r113
   try 
     {
+<<<<<<< .mine
+      morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters
+	(size_queue         ,
+	 nb_context         ,
+	 nb_front_end       ,
+	 nb_ooo_engine      ,
+	 nb_packet          ,
+	 size_general_data  ,
+	 nb_general_register,
+	 size_special_data  ,
+	 nb_special_register,
+	 nb_bypass_write    ,
+	 queue_scheme       ,
+         true // is_toplevel
+         );
+      
+      msg(_("%s"),param->print(1).c_str());
+      
+      test (name,param);
+=======
       top * my_top = new top ("my_top",argc,argv);
 
@@ -24,4 +87,5 @@
 
       delete my_top;
+>>>>>>> .r113
     }
   catch (morpheo::ErrorMorpheo & error)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h	(revision 115)
@@ -11,4 +11,5 @@
 #include "Common/include/Debug.h"
 #include "Behavioural/include/Parameters.h"
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h"
 #include <math.h>
 
@@ -26,43 +27,45 @@
   {
     //-----[ fields ]------------------------------------------------------------
-  public : uint32_t            _size_queue                   ;
-  public : uint32_t            _nb_context                   ;
-  public : uint32_t            _nb_front_end                 ;
-  public : uint32_t            _nb_ooo_engine                ;
-  public : uint32_t            _nb_packet                    ;
-//public : uint32_t            _size_general_data            ;
-  public : uint32_t            _nb_general_register          ;
-//public : uint32_t            _size_special_data            ;
-  public : uint32_t            _nb_special_register          ;
-  public : uint32_t            _nb_bypass_write              ;
+  public : uint32_t              _size_queue                   ;
+  public : uint32_t              _nb_context                   ;
+  public : uint32_t              _nb_front_end                 ;
+  public : uint32_t              _nb_ooo_engine                ;
+  public : uint32_t              _nb_packet                    ;
+//public : uint32_t              _size_general_data            ;
+  public : uint32_t              _nb_general_register          ;
+//public : uint32_t              _size_special_data            ;
+  public : uint32_t              _nb_special_register          ;
+  public : uint32_t              _nb_bypass_write              ;
+  public : Twrite_queue_scheme_t _queue_scheme                 ;
 
-  public : uint32_t            _nb_gpr_write                 ;
-  public : uint32_t            _nb_spr_write                 ;
-
-//public : uint32_t            _size_context_id              ;
-//public : uint32_t            _size_front_end_id            ;
-//public : uint32_t            _size_ooo_engine_id           ;
-//public : uint32_t            _size_packet_id               ;
-//public : uint32_t            _size_general_register        ;
-//public : uint32_t            _size_special_register        ;
-  public : uint32_t            _size_internal_queue          ;
-
-//public : bool                _have_port_context_id         ;
-//public : bool                _have_port_front_end_id       ;
-//public : bool                _have_port_ooo_engine_id      ;
-//public : bool                _have_port_packet_id          ;
+  public : uint32_t              _nb_gpr_write                 ;
+  public : uint32_t              _nb_spr_write                 ;
+			       
+//public : uint32_t              _size_context_id              ;
+//public : uint32_t              _size_front_end_id            ;
+//public : uint32_t              _size_ooo_engine_id           ;
+//public : uint32_t              _size_packet_id               ;
+//public : uint32_t              _size_general_register        ;
+//public : uint32_t              _size_special_register        ;
+  public : uint32_t              _size_internal_queue          ;
+			       
+//public : bool                  _have_port_context_id         ;
+//public : bool                  _have_port_front_end_id       ;
+//public : bool                  _have_port_ooo_engine_id      ;
+//public : bool                  _have_port_packet_id          ;
 
     //-----[ methods ]-----------------------------------------------------------
-  public : Parameters  (uint32_t size_queue         ,
-			uint32_t nb_context         ,
-			uint32_t nb_front_end       ,
-			uint32_t nb_ooo_engine      ,
-			uint32_t nb_packet          ,
-			uint32_t size_general_data  ,
-			uint32_t nb_general_register,
-			uint32_t size_special_data  ,
-			uint32_t nb_special_register,
-			uint32_t nb_bypass_write    ,
-                        bool     is_toplevel=false  );
+  public : Parameters  (uint32_t              size_queue         ,
+			uint32_t              nb_context         ,
+			uint32_t              nb_front_end       ,
+			uint32_t              nb_ooo_engine      ,
+			uint32_t              nb_packet          ,
+			uint32_t              size_general_data  ,
+			uint32_t              nb_general_register,
+			uint32_t              size_special_data  ,
+			uint32_t              nb_special_register,
+			uint32_t              nb_bypass_write    ,
+			Twrite_queue_scheme_t queue_scheme       ,
+                        bool                  is_toplevel=false  );
 //public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h	(revision 115)
@@ -19,4 +19,10 @@
 namespace write_unit {
 namespace write_queue {
+
+  typedef enum 
+    {
+       WRITE_QUEUE_SCHEME_MOORE // Write register and pop is not in same cycle
+      ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle
+    } Twrite_queue_scheme_t;
 
   class write_queue_entry_t
@@ -78,6 +84,28 @@
 }; // end namespace multi_execute_loop
 }; // end namespace core
+}; // end namespace behavioural
 
-}; // end namespace behavioural
+  template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t& x)
+  {
+    switch (x)
+      {
+      case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE : return "moore"; break;
+      case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY : return "mealy"; break;
+      default : return ""; break;
+      }
+  };
+
+  template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const std::string& x)
+  {
+    if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE))) == 0) or
+         (x.compare("moore") == 0))
+      return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE;
+    if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY))) == 0) or
+         (x.compare("mealy") == 0))
+      return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY;
+    
+    throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\""));
+  };
+
 }; // end namespace morpheo              
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h	(revision 115)
@@ -139,4 +139,9 @@
     Tcontrol_t     internal_GPR_WRITE_VAL;
     Tcontrol_t     internal_SPR_WRITE_VAL;
+
+    // function pointer
+//   public    : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_transition) (void);
+//   public    : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMoore  ) (void);
+//   public    : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMealy  ) (void);
 #endif
 
@@ -167,4 +172,5 @@
   public  : void     transition                (void);
   public  : void     genMoore                  (void);
+  public  : void     genMealy                  (void);
 #endif					       
 #ifdef STATISTICS
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp	(revision 115)
@@ -20,15 +20,16 @@
 #undef  FUNCTION
 #define FUNCTION "Write_queue::Parameters"
-  Parameters::Parameters (uint32_t size_queue         ,
-			  uint32_t nb_context         ,
-			  uint32_t nb_front_end       ,
-			  uint32_t nb_ooo_engine      ,
-			  uint32_t nb_packet          ,
-			  uint32_t size_general_data  ,
-			  uint32_t nb_general_register,
-			  uint32_t size_special_data  ,
-			  uint32_t nb_special_register,
-			  uint32_t nb_bypass_write    ,
-                          bool     is_toplevel):
+  Parameters::Parameters (uint32_t              size_queue         ,
+			  uint32_t              nb_context         ,
+			  uint32_t              nb_front_end       ,
+			  uint32_t              nb_ooo_engine      ,
+			  uint32_t              nb_packet          ,
+			  uint32_t              size_general_data  ,
+			  uint32_t              nb_general_register,
+			  uint32_t              size_special_data  ,
+			  uint32_t              nb_special_register,
+			  uint32_t              nb_bypass_write    ,
+			  Twrite_queue_scheme_t queue_scheme       ,
+			  bool                  is_toplevel        ):
     behavioural::Parameters ("Write_queue")
   {
@@ -43,4 +44,5 @@
     _nb_special_register     = nb_special_register;
     _nb_bypass_write         = nb_bypass_write    ;
+    _queue_scheme            = queue_scheme       ;
 
     _nb_gpr_write            = 1;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp	(revision 115)
@@ -38,4 +38,5 @@
     xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end();
     xml.singleton_begin("nb_bypass_write    "); xml.attribut("value",toString(_nb_bypass_write    )); xml.singleton_end();
+    xml.singleton_begin("queue_scheme       "); xml.attribut("value",toString(_queue_scheme       )); xml.singleton_end();
     xml.balise_close();
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp	(revision 115)
@@ -84,10 +84,27 @@
 	SC_METHOD (genMoore);
 	dont_initialize ();
-	sensitive << (*(in_CLOCK)).neg();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
 	
 # ifdef SYSTEMCASS_SPECIFIC
 	// List dependency information
 # endif    
-	
+
+	if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY)
+	  {
+	log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy");
+
+	SC_METHOD (genMealy);
+	dont_initialize ();
+	sensitive << (*(in_CLOCK)).neg(); // need internal register
+	for (uint32_t i=0; i<_param->_nb_gpr_write; ++i)
+	  sensitive << (*(in_GPR_WRITE_ACK [i]));
+	for (uint32_t i=0; i<_param->_nb_spr_write; ++i)
+	  sensitive << (*(in_SPR_WRITE_ACK [i]));	
+
+# ifdef SYSTEMCASS_SPECIFIC
+	// List dependency information
+# endif    
+	  }
+
 #endif
       }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp	(revision 115)
@@ -0,0 +1,106 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_execute_loop {
+namespace execute_loop {
+namespace multi_write_unit {
+namespace write_unit {
+namespace write_queue {
+
+
+#undef  FUNCTION
+#define FUNCTION "Write_queue::genMealy"
+  void Write_queue::genMealy (void)
+  {
+    log_begin(Write_queue,FUNCTION);
+    log_function(Write_queue,FUNCTION,_name.c_str());
+    
+    // -----[ Interface "bypass_write" ]----------------------------------
+    // in genMoore
+    // -----[ Interface "Write_queue_in" ]--------------------------------
+    // in genMoore
+
+    bool       val      = not _queue->empty();
+    Tcontrol_t write_rd = val and _queue->front()->_write_rd;
+    Tcontrol_t write_re = val and _queue->front()->_write_re;
+
+    // -----[ Interface "gpr_write" ]-------------------------------------
+    // -----[ Interface "spr_write" ]-------------------------------------
+    {
+      internal_GPR_WRITE_VAL = val and write_rd;
+      internal_SPR_WRITE_VAL = val and write_re;
+      
+      PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);
+      PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);
+
+      write_rd = (write_rd)?(not PORT_READ(in_GPR_WRITE_ACK [0])):0;
+      write_re = (write_re)?(not PORT_READ(in_SPR_WRITE_ACK [0])):0;
+
+      if (val)
+	{
+	  if (_param->_have_port_ooo_engine_id)
+	  {
+	  PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
+	  PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
+	  }
+	  PORT_WRITE(out_GPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_rd);
+	  PORT_WRITE(out_GPR_WRITE_DATA          [0], _queue->front()->_data_rd   );
+	  PORT_WRITE(out_SPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_re);
+	  PORT_WRITE(out_SPR_WRITE_DATA          [0], _queue->front()->_data_re   );
+	}
+    }
+
+    // -----[ Interface "Write_queue_out" ]--------------------------------
+    {
+      Texception_t load_speculative = (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE);
+
+      internal_WRITE_QUEUE_OUT_VAL = ((val                 ) and
+				      (not load_speculative) and
+				      (not write_rd        ) and
+				      (not write_re        ));
+      
+      PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);
+
+      if (internal_WRITE_QUEUE_OUT_VAL)
+	{
+	  if (_param->_have_port_context_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID   , _queue->front()->_context_id   );
+	  if (_param->_have_port_front_end_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );
+	  if (_param->_have_port_ooo_engine_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);
+	  if (_param->_have_port_rob_ptr  )
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID    , _queue->front()->_packet_id    );
+//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION    , _queue->front()->_operation    );
+//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE         , _queue->front()->_type         );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS        , _queue->front()->_data_re      );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION    , _queue->front()->_exception    );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE  , _queue->front()->_no_sequence  );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS      , _queue->front()->_address      );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_DATA         , _queue->front()->_data_rd      );
+	}
+    }
+
+    log_end(Write_queue,FUNCTION);
+  };
+
+}; // end namespace write_queue
+}; // end namespace write_unit
+}; // end namespace multi_write_unit
+}; // end namespace execute_loop
+}; // end namespace multi_execute_loop
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp	(revision 115)
@@ -26,64 +26,4 @@
     log_function(Write_queue,FUNCTION,_name.c_str());
     
-    // -----[ Interface "Write_queue_in" ]--------------------------------
-    {
-      internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue;
-      
-      PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK);
-    }
-
-    // -----[ Interface "Write_queue_out" ]--------------------------------
-    {
-      // TODO : make a genMealy version
-      internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty()           ) and
-				      (not _queue->front()->_write_rd) and
-				      (not _queue->front()->_write_re));
-      
-      PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);
-
-      if (internal_WRITE_QUEUE_OUT_VAL)
-	{
-	  if (_param->_have_port_context_id)
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID   , _queue->front()->_context_id   );
-	  if (_param->_have_port_front_end_id)
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );
-	  if (_param->_have_port_ooo_engine_id)
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);
-	  if (_param->_have_port_rob_ptr  )
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID    , _queue->front()->_packet_id    );
-//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION    , _queue->front()->_operation    );
-//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE         , _queue->front()->_type         );
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS        , _queue->front()->_data_re      );
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION    , _queue->front()->_exception    );
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE  , _queue->front()->_no_sequence  );
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS      , _queue->front()->_address      );
-      	  PORT_WRITE(out_WRITE_QUEUE_OUT_DATA         , _queue->front()->_data_rd      );
-	}
-    }
-
-    // -----[ Interface "gpr_write" ]-------------------------------------
-    // -----[ Interface "spr_write" ]-------------------------------------
-    {
-      bool val = not _queue->empty();
-
-      internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd;
-      internal_SPR_WRITE_VAL = val and _queue->front()->_write_re;
-      
-      PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);
-      PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);
-
-      if (val)
-	{
-	  if (_param->_have_port_ooo_engine_id)
-	  {
-	  PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
-	  PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
-	  }
-	  PORT_WRITE(out_GPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_rd);
-	  PORT_WRITE(out_GPR_WRITE_DATA          [0], _queue->front()->_data_rd   );
-	  PORT_WRITE(out_SPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_re);
-	  PORT_WRITE(out_SPR_WRITE_DATA          [0], _queue->front()->_data_re   );
-	}
-    }
     // -----[ Interface "bypass_write" ]----------------------------------
     {
@@ -121,4 +61,68 @@
 	}
     }
+
+    // -----[ Interface "Write_queue_in" ]--------------------------------
+    {
+      internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue;
+      
+      PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK);
+    }
+
+    if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MOORE)
+      {
+    // -----[ Interface "gpr_write" ]-------------------------------------
+    // -----[ Interface "spr_write" ]-------------------------------------
+    {
+      bool val = not _queue->empty();
+
+      internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd;
+      internal_SPR_WRITE_VAL = val and _queue->front()->_write_re;
+      
+      PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);
+      PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);
+
+      if (val)
+	{
+	  if (_param->_have_port_ooo_engine_id)
+	  {
+	  PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
+	  PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
+	  }
+	  PORT_WRITE(out_GPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_rd);
+	  PORT_WRITE(out_GPR_WRITE_DATA          [0], _queue->front()->_data_rd   );
+	  PORT_WRITE(out_SPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_re);
+	  PORT_WRITE(out_SPR_WRITE_DATA          [0], _queue->front()->_data_re   );
+	}
+    }
+
+    // -----[ Interface "Write_queue_out" ]--------------------------------
+    {
+      internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty()           ) and
+				      (not _queue->front()->_write_rd) and
+				      (not _queue->front()->_write_re));
+      
+      PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);
+
+      if (internal_WRITE_QUEUE_OUT_VAL)
+	{
+	  if (_param->_have_port_context_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID   , _queue->front()->_context_id   );
+	  if (_param->_have_port_front_end_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );
+	  if (_param->_have_port_ooo_engine_id)
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);
+	  if (_param->_have_port_rob_ptr  )
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID    , _queue->front()->_packet_id    );
+//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION    , _queue->front()->_operation    );
+//    	  PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE         , _queue->front()->_type         );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS        , _queue->front()->_data_re      );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION    , _queue->front()->_exception    );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE  , _queue->front()->_no_sequence  );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS      , _queue->front()->_address      );
+      	  PORT_WRITE(out_WRITE_QUEUE_OUT_DATA         , _queue->front()->_data_rd      );
+	}
+    }
+
+      } // end WRITE_QUEUE_SCHEME_MOORE
     log_end(Write_queue,FUNCTION);
   };
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h	(revision 115)
@@ -28,31 +28,32 @@
   {
     //-----[ fields ]------------------------------------------------------------
-  public : uint32_t            _size_write_queue             ;
-  public : uint32_t            _size_execute_queue           ;
-  public : uint32_t            _nb_context                   ;
-  public : uint32_t            _nb_front_end                 ;
-  public : uint32_t            _nb_ooo_engine                ;
-  public : uint32_t            _nb_packet                    ;
-//public : uint32_t            _size_general_data            ;
-  public : uint32_t            _nb_general_register          ;
-//public : uint32_t            _size_special_data            ;
-  public : uint32_t            _nb_special_register          ;
-  public : uint32_t            _nb_bypass_write              ;
+  public : uint32_t              _size_write_queue             ;
+  public : uint32_t              _size_execute_queue           ;
+  public : uint32_t              _nb_context                   ;
+  public : uint32_t              _nb_front_end                 ;
+  public : uint32_t              _nb_ooo_engine                ;
+  public : uint32_t              _nb_packet                    ;
+//public : uint32_t              _size_general_data            ;
+  public : uint32_t              _nb_general_register          ;
+//public : uint32_t              _size_special_data            ;
+  public : uint32_t              _nb_special_register          ;
+  public : uint32_t              _nb_bypass_write              ;
+  public : write_queue::Twrite_queue_scheme_t _write_queue_scheme           ;
 
-  public : uint32_t            _nb_gpr_write                 ;
-  public : uint32_t            _nb_spr_write                 ;
-
-//public : uint32_t            _size_context_id              ;
-//public : uint32_t            _size_front_end_id            ;
-//public : uint32_t            _size_ooo_engine_id           ;
-//public : uint32_t            _size_packet_id               ;
-//public : uint32_t            _size_general_register        ;
-//public : uint32_t            _size_special_register        ;
-
-  public : bool                _have_component_execute_queue ;
-//public : bool                _have_port_context_id         ;
-//public : bool                _have_port_front_end_id       ;
-//public : bool                _have_port_ooo_engine_id      ;
-//public : bool                _have_port_packet_id          ;
+  public : uint32_t              _nb_gpr_write                 ;
+  public : uint32_t              _nb_spr_write                 ;
+			        
+//public : uint32_t              _size_context_id              ;
+//public : uint32_t              _size_front_end_id            ;
+//public : uint32_t              _size_ooo_engine_id           ;
+//public : uint32_t              _size_packet_id               ;
+//public : uint32_t              _size_general_register        ;
+//public : uint32_t              _size_special_register        ;
+			        
+  public : bool                  _have_component_execute_queue ;
+//public : bool                  _have_port_context_id         ;
+//public : bool                  _have_port_front_end_id       ;
+//public : bool                  _have_port_ooo_engine_id      ;
+//public : bool                  _have_port_packet_id          ;
 
   public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Parameters * _param_write_queue;
@@ -60,16 +61,17 @@
 
     //-----[ methods ]-----------------------------------------------------------
-  public : Parameters  (uint32_t size_write_queue   ,
-			uint32_t size_execute_queue ,
-			uint32_t nb_context         ,
-			uint32_t nb_front_end       ,
-			uint32_t nb_ooo_engine      ,
-			uint32_t nb_packet          ,
-			uint32_t size_general_data  ,
-			uint32_t nb_general_register,
-			uint32_t size_special_data  ,
-			uint32_t nb_special_register,
-			uint32_t nb_bypass_write    ,
-                        bool     is_toplevel=false);
+  public : Parameters  (uint32_t              size_write_queue   ,
+			uint32_t              size_execute_queue ,
+			uint32_t              nb_context         ,
+			uint32_t              nb_front_end       ,
+			uint32_t              nb_ooo_engine      ,
+			uint32_t              nb_packet          ,
+			uint32_t              size_general_data  ,
+			uint32_t              nb_general_register,
+			uint32_t              size_special_data  ,
+			uint32_t              nb_special_register,
+			uint32_t              nb_bypass_write    ,
+			write_queue::Twrite_queue_scheme_t write_queue_scheme ,
+                        bool                  is_toplevel=false);
 //public : Parameters  (Parameters & param) ;
   public : ~Parameters () ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp	(revision 115)
@@ -19,16 +19,17 @@
 #undef  FUNCTION
 #define FUNCTION "Write_unit::Parameters"
-  Parameters::Parameters (uint32_t size_write_queue   ,
-			  uint32_t size_execute_queue ,
-			  uint32_t nb_context         ,
-			  uint32_t nb_front_end       ,
-			  uint32_t nb_ooo_engine      ,
-			  uint32_t nb_packet          ,
-			  uint32_t size_general_data  ,
-			  uint32_t nb_general_register,
-			  uint32_t size_special_data  ,
-			  uint32_t nb_special_register,
-			  uint32_t nb_bypass_write    ,
-                          bool     is_toplevel        ):
+  Parameters::Parameters (uint32_t              size_write_queue   ,
+			  uint32_t              size_execute_queue ,
+			  uint32_t              nb_context         ,
+			  uint32_t              nb_front_end       ,
+			  uint32_t              nb_ooo_engine      ,
+			  uint32_t              nb_packet          ,
+			  uint32_t              size_general_data  ,
+			  uint32_t              nb_general_register,
+			  uint32_t              size_special_data  ,
+			  uint32_t              nb_special_register,
+			  uint32_t              nb_bypass_write    ,
+			  write_queue::Twrite_queue_scheme_t write_queue_scheme ,
+			  bool                  is_toplevel):
     behavioural::Parameters("Write_unit")
   {
@@ -44,5 +45,6 @@
     _nb_special_register          = nb_special_register;
     _nb_bypass_write              = nb_bypass_write    ;
-                                  
+    _write_queue_scheme           = write_queue_scheme ;
+
     _nb_gpr_write                 = 1;
     _nb_spr_write                 = 1;
@@ -50,24 +52,27 @@
     _have_component_execute_queue = _size_execute_queue > 0;
                                   
-    _param_write_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Parameters(_size_write_queue   ,
-																		    _nb_context         ,
-																		    _nb_front_end       ,
-																		    _nb_ooo_engine      ,
-																		    _nb_packet          ,
-																		     size_general_data  ,
-																		    _nb_general_register,
-																		     size_special_data  ,
-																		    _nb_special_register,
-																		    _nb_bypass_write    );
+    _param_write_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue  ::Parameters
+      (_size_write_queue   ,
+       _nb_context         ,
+       _nb_front_end       ,
+       _nb_ooo_engine      ,
+       _nb_packet          ,
+        size_general_data  ,
+       _nb_general_register,
+        size_special_data  ,
+       _nb_special_register,
+       _nb_bypass_write    ,
+       _write_queue_scheme );
     
     if (_have_component_execute_queue)
-      _param_execute_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters(_size_execute_queue   ,
-																			_nb_context         ,
-																			_nb_front_end       ,
-																			_nb_ooo_engine      ,
-																			_nb_packet          ,
-																			 size_general_data  ,
-																			 size_special_data  );
-
+      _param_execute_queue  = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters
+	(_size_execute_queue ,
+	 _nb_context         ,
+	 _nb_front_end       ,
+	 _nb_ooo_engine      ,
+	 _nb_packet          ,
+	  size_general_data  ,
+	  size_special_data  );
+    
     test();
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp	(revision 115)
@@ -111,5 +111,5 @@
      if (usage_is_set(_usage,USE_SYSTEMC))
        {
-         ALLOC3(_destination,std::list<destination_t>,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type);;
+         ALLOC3(_destination,std::list<destination_t>,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type);
        }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp	(revision 115)
@@ -69,5 +69,5 @@
          DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_NUM_REG_RD           , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_general_register );
 
-         DELETE3(_destination,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type);;
+         DELETE3(_destination,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type);
       }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_min.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_min.cfg	(revision 115)
@@ -25,4 +25,5 @@
 1	1	+1	# size_execute_queue                         [0]       [nb_write_unit]
 1	1	+1	# nb_bypass_write                            [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [0]       [nb_write_unit]
 1	1	+1	# nb_gpr_bank                                	       
 1	1	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2a.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2a.cfg	(revision 115)
@@ -25,4 +25,5 @@
 4	4	*4	# size_execute_queue                         [0]       [nb_write_unit]
 2	2	+1	# nb_bypass_write                            [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [0]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 1	1	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2b.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2b.cfg	(revision 115)
@@ -43,4 +43,8 @@
 1	1	+1	# nb_bypass_write                            [2]       [nb_write_unit]
 4	4	+1	# nb_bypass_write                            [3]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [1]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [2]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [3]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 2	2	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_3a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_3a.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_3a.cfg	(revision 115)
@@ -44,4 +44,8 @@
 1	1	+1	# nb_bypass_write                            [2]       [nb_write_unit]
 4	4	+1	# nb_bypass_write                            [3]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [1]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [2]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [3]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 2	2	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_6a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_6a.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_6a.cfg	(revision 115)
@@ -47,4 +47,8 @@
 1	1	+1	# nb_bypass_write                            [2]       [nb_write_unit]
 4	4	+1	# nb_bypass_write                            [3]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [1]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [2]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [3]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 2	2	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2a.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2a.cfg	(revision 115)
@@ -25,4 +25,5 @@
 4	4	*4	# size_execute_queue                         [0]       [nb_write_unit]
 2	2	+1	# nb_bypass_write                            [0]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [0]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 1	1	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2b.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2b.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2b.cfg	(revision 115)
@@ -25,4 +25,5 @@
 4	4	*4	# size_execute_queue                         [0]       [nb_write_unit]
 2	2	+1	# nb_bypass_write                            [0]       [nb_write_unit]
+0	1	+1	# write_queue_scheme                         [0]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 1	1	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2c.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2c.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2c.cfg	(revision 115)
@@ -25,4 +25,5 @@
 4	4	*4	# size_execute_queue                         [0]       [nb_write_unit]
 2	2	+1	# nb_bypass_write                            [0]       [nb_write_unit]
+0	0	+1	# write_queue_scheme                         [0]       [nb_write_unit]
 4	4	+1	# nb_gpr_bank                                	       
 1	1	+1	# nb_gpr_port_read_by_bank                   	       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp	(revision 115)
@@ -39,4 +39,5 @@
   err (_(" * size_execute_queue                        [nb_write_unit]                                        (uint32_t           )\n"));
   err (_(" * nb_bypass_write                           [nb_write_unit]                                        (uint32_t           )\n"));
+  err (_(" * write_queue_scheme                        [nb_write_unit]                                        (Twrite_queue_scheme_t)\n"));
   err (_(" * nb_gpr_bank                                                                                      (uint32_t           )\n"));
   err (_(" * nb_gpr_port_read_by_bank                                                                         (uint32_t           )\n"));
@@ -97,5 +98,5 @@
 		       1*nb_functionnal_unit+
 		       8*nb_load_store_unit+
-		       3*nb_write_unit+
+		       4*nb_write_unit+
 		       4*nb_ooo_engine+
 // 		       sum_execute_unit_port*nb_write_unit+
@@ -167,5 +168,5 @@
 	       1*nb_functionnal_unit+
 	       8*nb_load_store_unit+
-	       3*nb_write_unit+
+	       4*nb_write_unit+
 	       4*nb_ooo_engine+
 	       sum_execute_unit_port*nb_write_unit+
@@ -196,4 +197,8 @@
   for (uint32_t i=0; i<nb_write_unit; i++)
     nb_bypass_write    [i] = atoi(argv[x++]);
+
+  multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme    = new multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t [nb_write_unit];
+  for (uint32_t i=0; i<nb_write_unit; i++)
+    write_queue_scheme    [i] = fromString<multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(argv[x++]);
 
   uint32_t nb_gpr_bank                = atoi(argv[x++]);
@@ -339,4 +344,5 @@
 	 size_execute_queue                            ,
 	 nb_bypass_write                               ,
+	 write_queue_scheme                            ,
 	 
 	 nb_gpr_bank                                   ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h	(revision 115)
@@ -73,4 +73,6 @@
   public : uint32_t            * _size_execute_queue                            ; //[nb_write_unit]
   public : uint32_t            * _nb_bypass_write                               ; //[nb_write_unit]
+  public : multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_unit]
+
     //  * register_unit                                                               
   public : uint32_t              _nb_gpr_read                                   ;
@@ -172,5 +174,6 @@
                         uint32_t            * size_execute_queue                            ,//[nb_write_unit]
                         uint32_t            * nb_bypass_write                               ,//[nb_write_unit]
-                        
+			multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_unit]
+
                         uint32_t              nb_gpr_bank                                   ,
                         uint32_t              nb_gpr_port_read_by_bank                      ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 115)
@@ -50,4 +50,5 @@
 			  uint32_t            * size_execute_queue                        ,//[nb_write_unit]
 			  uint32_t            * nb_bypass_write                           ,//[nb_write_unit]
+			  multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_unit]
 			  
 			  uint32_t              nb_gpr_bank                               ,
@@ -108,4 +109,5 @@
     _size_execute_queue                         = size_execute_queue                   ;
     _nb_bypass_write                            = nb_bypass_write                      ;
+    _write_queue_scheme                         = write_queue_scheme                   ;
                                                 
     _nb_gpr_bank                                = nb_gpr_bank                          ;
@@ -456,6 +458,6 @@
 	  size_special_data          ,
 	 _max_nb_special_register    ,
-	 _nb_bypass_write         [i]);
-
+	 _nb_bypass_write         [i],
+	 _write_queue_scheme      [i]);
 
     log_printf(TRACE,Execute_loop,FUNCTION,"Parameters : read_unit_to_execution_unit");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp	(revision 115)
@@ -112,5 +112,6 @@
                   }
 
-              DELETE1(reg_QUEUE,_param->_nb_bank); break;
+              DELETE1(reg_QUEUE,_param->_nb_bank); 
+	      break;
             } 
           }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp	(revision 115)
@@ -63,9 +63,11 @@
             // ....... max ...X... min ....... KO
             
-            Tcontrol_t   is_valid      = ((depth == depth_min) or
-                                          depth_full or
-                                          ((depth_min <= depth_max)?
-                                           ((depth >= depth_min) and (depth <=depth_max)):
-                                           ((depth >= depth_min) or  (depth <=depth_max))));
+	    Tcontrol_t is_valid = true;
+
+//             Tcontrol_t   is_valid      = ((depth == depth_min) or
+//                                           depth_full or
+//                                           ((depth_min <= depth_max)?
+//                                            ((depth >= depth_min) and (depth <=depth_max)):
+//                                            ((depth >= depth_min) or  (depth <=depth_max))));
             //Tcontrol_t is_valid        = ((depth == depth_min) or 
             //                              ((depth_min < depth_max)?
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp	(revision 115)
@@ -66,9 +66,10 @@
               // ....... max ...X... min ....... KO
               
-              Tcontrol_t   is_valid      = ((depth == depth_min) or
-                                            depth_full or
-                                            ((depth_min <= depth_max)?
-                                             ((depth >= depth_min) and (depth <=depth_max)):
-                                             ((depth >= depth_min) or  (depth <=depth_max))));
+	      Tcontrol_t is_valid = true;
+//               Tcontrol_t   is_valid      = ((depth == depth_min) or
+//                                             depth_full or
+//                                             ((depth_min <= depth_max)?
+//                                              ((depth >= depth_min) and (depth <=depth_max)):
+//                                              ((depth >= depth_min) or  (depth <=depth_max))));
               //Tcontrol_t is_valid        = ((depth == depth_min) or 
               //                              ((depth_min < depth_max)?
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp	(revision 115)
@@ -63,10 +63,12 @@
     if (_param->_have_component_victim)
       {
-    delete [] _component_sort;
-    delete _component_victim;
+	for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
+	  delete _component_sort [i];
+	delete [] _component_sort;
+	delete _component_victim;
       }
     delete _component_branch_target_buffer_glue;
     delete _component_branch_target_buffer_register;
-
+    
     delete _component;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h	(revision 115)
@@ -44,7 +44,7 @@
                                                
   public : Thistory_t _bht_history_mask        ;
-  public : Thistory_t _bht_history_rshift      ;
+  public : Thistory_t _bht_history_shift       ;
   public : Thistory_t _pht_history_mask        ;
-  public : Thistory_t _pht_history_rshift      ;
+  public : Thistory_t _pht_history_shift       ;
                                                
   public : uint32_t   _bht_size_address        ;
@@ -55,7 +55,7 @@
   public : uint32_t   _pht_size_bank           ;
   public : Taddress_t _pht_address_share_mask  ;
-  public : Taddress_t _pht_address_share_lshift;
+  public : Taddress_t _pht_address_share_shift ;
   public : Taddress_t _pht_address_bank_mask   ;
-  public : Taddress_t _pht_address_bank_rshift ;
+  public : Taddress_t _pht_address_bank_shift  ;
 
   public : Thistory_t _bht_init_take           ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h	(revision 115)
@@ -88,5 +88,5 @@
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   private   : Thistory_t                    * reg_BHT                       ;//[bht_nb_shifter]
-  private   : Thistory_t                   ** reg_PHT                       ;//[pht_nb_counter][pht_nb_bank]
+  private   : Thistory_t                   ** reg_PHT                       ;//[pht_nb_bank][pht_size_bank]
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp	(revision 115)
@@ -57,18 +57,25 @@
     //  MSB : pht_history
     //  LSB : bht_history
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _have_bht                 : %d",_have_bht        );
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _bht_size_shifter         : %d",_bht_size_shifter);
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _bht_nb_shifter           : %d",_bht_nb_shifter  );
+
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _have_pht                 : %d",_have_pht        );
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_size_counter         : %d",_pht_size_counter);
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_nb_counter           : %d",_pht_nb_counter  );
                        
     _size_history            = _bht_size_shifter + _pht_size_counter;
     _bht_history_mask        = gen_mask<Thistory_t>(_bht_size_shifter);
-    _bht_history_rshift      = 0;
+    _bht_history_shift       = 0;
     _pht_history_mask        = gen_mask<Thistory_t>(_pht_size_counter);
-    _pht_history_rshift      = _bht_size_shifter;
+    _pht_history_shift       = _bht_size_shifter;
                              
     log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _size_history             : %d",_size_history  );
     log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _bht_history_mask         : 0x%x",_bht_history_mask  );
-    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _bht_history_rshift       : %d",_bht_history_rshift);
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _bht_history_shift        : %d",_bht_history_shift );
     log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_history_mask         : 0x%x",_pht_history_mask  );
-    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_history_rshift       : %d",_pht_history_rshift);
+    log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_history_shift        : %d",_pht_history_shift );
 
-    _bht_init_take           = (Thistory_t)(-1)&_bht_history_mask;
+    _bht_init_take           = static_cast<Thistory_t>(-1)&_bht_history_mask;
     _bht_init_ntake          = 0;
     _pht_init_take           = (1<<(_pht_size_counter-1)); // size = 4 : 1000/2
@@ -91,18 +98,26 @@
         _pht_counter_max         = (1<<_pht_size_counter)-1;
         
-        _pht_nb_bank             = (_pht_nb_counter - (1<<_bht_size_shifter))+1;
-        _pht_size_bank           = _pht_nb_counter / _pht_nb_bank;
+        _pht_size_bank           = (_have_bht)?(1<<_bht_size_shifter):1;
+        _pht_nb_bank             = _pht_nb_counter / _pht_size_bank;
+
+	// -------->|
+	//   +---+  |
+	//   |   |  |--->
+	// ---> --->|
+	//   |   |  |
+	//   +---+
+	//
 
         _pht_address_share_mask  = gen_mask<Taddress_t>(_pht_size_address_share);
-        _pht_address_share_lshift= _bht_size_shifter-_pht_size_address_share;
+        _pht_address_share_shift = _bht_size_shifter-_pht_size_address_share;
         _pht_address_bank_mask   = gen_mask<Taddress_t>(log2(_pht_nb_bank));
-        _pht_address_bank_rshift = _pht_size_address_share;
+        _pht_address_bank_shift  = _pht_size_address_share;
 
         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_nb_bank              : %d"  ,_pht_nb_bank   );
         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_size_bank            : %d"  ,_pht_size_bank );
         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_share_mask   : 0x%x",_pht_address_share_mask  );
-        log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_share_lshift : %d"  ,_pht_address_share_lshift);
+        log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_share_shift  : %d"  ,_pht_address_share_shift );
         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_bank_mask    : 0x%x",_pht_address_bank_mask   );
-        log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_bank_rshift  : %d"  ,_pht_address_bank_rshift );
+        log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * _pht_address_bank_shift   : %d"  ,_pht_address_bank_shift  );
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp	(revision 115)
@@ -52,5 +52,5 @@
               log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht_num_reg      : %d",bht_num_reg);
 
-              history   = (bht_history << _param->_bht_history_rshift)&_param->_bht_history_mask ;
+              history   = (bht_history << _param->_bht_history_shift )&_param->_bht_history_mask ;
               direction = (bht_history >> (_param->_bht_size_shifter-1))&1;
 
@@ -61,14 +61,16 @@
           if (_param->_have_pht)
             {
-              Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask;
-              Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift));
+              Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_shift )&_param->_pht_address_bank_mask;
+              Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift));
+
+              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht_history      : 0x%x",pht_bht_history);
+              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht_num_reg      : %d",pht_num_reg);
+              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht_num_bank     : %d",pht_num_bank);
+
               Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg];
               
-              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht_history      : 0x%x",pht_bht_history);
               log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht_history      : 0x%x",pht_history);
-              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht_num_reg      : %d",pht_num_reg);
-              log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht_num_bank     : %d",pht_num_bank);
               
-              history  |= (pht_history << _param->_pht_history_rshift)&_param->_pht_history_mask;
+              history  |= (pht_history << _param->_pht_history_shift )&_param->_pht_history_mask;
               direction = (pht_history >> (_param->_pht_size_counter-1))&1;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp	(revision 115)
@@ -117,5 +117,5 @@
                       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht");
 
-                      Thistory_t bht_history = (history>>_param->_bht_history_rshift)&_param->_bht_history_mask;
+                      Thistory_t bht_history = (history>>_param->_bht_history_shift )&_param->_bht_history_mask;
                       Thistory_t bht_num_reg = address & _param->_bht_address_mask;
                       
@@ -125,7 +125,11 @@
                       // BHT : shift register
                       if (not history_val)
-                        bht_history = (direction)?_param->_bht_init_take:_param->_bht_init_ntake;
+			{
+			  bht_history = (direction)?_param->_bht_init_take:_param->_bht_init_ntake;
+			}
                       else
-                        bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ;
+			{
+			  bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ;
+			}
                         
                       pht_bht_history = bht_history;
@@ -138,7 +142,7 @@
                       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * pht");
 
-                      Thistory_t pht_history = (history>>_param->_pht_history_rshift)&_param->_pht_history_mask;
-                      Thistory_t pht_num_reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift);
-                      Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask;
+                      Thistory_t pht_history = (history>>_param->_pht_history_shift )&_param->_pht_history_mask;
+                      Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_shift )&_param->_pht_address_bank_mask;
+                      Thistory_t pht_num_reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift);
                       
                       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"    * bht_history (old): %x",pht_bht_history);
@@ -149,7 +153,11 @@
                       // PHT : saturation counter
                       if (not history_val)
-                        pht_history = (direction)?_param->_pht_init_take:_param->_pht_init_ntake;
+			{
+			  pht_history = (direction)?_param->_pht_init_take:_param->_pht_init_ntake;
+			}
                       else
-                        pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history));
+			{
+			  pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history));
+			}
                       
                       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"    * pht_history (new): %x",pht_history);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 115)
@@ -53,10 +53,12 @@
   public    : Stat                           * _stat;
 
-  private   : counter_t                    *** _stat_nb_branch_hit            ; //[nb_context][MAX_BRANCH_CONDITION]
-  private   : counter_t                    *** _stat_nb_branch_miss           ; //[nb_context][MAX_BRANCH_CONDITION]
-  private   : counter_t                     ** _stat_nb_branch_unused         ; //[nb_context]
-  private   : counter_t                     ** _stat_ufpt_queue_nb_elt        ; //[nb_context]
-  private   : counter_t                     ** _stat_upt_queue_nb_elt         ; //[nb_context]
-
+  private   : counter_t                    *** _stat_nb_branch_hit              ; //[nb_context][MAX_BRANCH_CONDITION]
+  private   : counter_t                    *** _stat_nb_branch_miss             ; //[nb_context][MAX_BRANCH_CONDITION]
+  private   : counter_t                     ** _stat_nb_branch_unused           ; //[nb_context]
+  private   : counter_t                     ** _stat_ufpt_queue_nb_elt          ; //[nb_context]
+  private   : counter_t                     ** _stat_upt_queue_nb_elt           ; //[nb_context]
+
+  private   : counter_t                     ** _stat_nb_branch_ifetch_prediction; //[nb_context]
+  private   : counter_t                     ** _stat_nb_branch_accurate         ; //[nb_context]
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp	(revision 115)
@@ -31,7 +31,10 @@
 
     {
-      ALLOC2(_stat_nb_branch_hit        ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION);
-      ALLOC2(_stat_nb_branch_miss       ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION);
-      ALLOC1(_stat_nb_branch_unused     ,counter_t *,_param->_nb_context);
+      ALLOC2(_stat_nb_branch_hit              ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION);
+      ALLOC2(_stat_nb_branch_miss             ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION);
+      ALLOC1(_stat_nb_branch_unused           ,counter_t *,_param->_nb_context);
+
+      ALLOC1(_stat_nb_branch_ifetch_prediction,counter_t *,_param->_nb_context);
+      ALLOC1(_stat_nb_branch_accurate         ,counter_t *,_param->_nb_context);
       
       for (uint32_t i=0; i<_param->_nb_context; ++i)
@@ -74,5 +77,9 @@
                                      toString(_("Percent miss by branchement (context %d)"),i));
           
-          _stat_nb_branch_unused [i] = _stat->create_counter("nb_branch_unused_" +toString(i),"",toString(_("Branch unused (previous speculation) (context %d)"),i));
+          _stat_nb_branch_unused            [i] = _stat->create_counter("nb_branch_unused_" +toString(i),"",toString(_("Branch unused (previous speculation) (context %d)"),i));
+	  _stat_nb_branch_ifetch_prediction [i] = _stat->create_counter("nb_branch_ifetch_prediction_"+toString(i),"",toString(_("Branch used and ifetch prediction (context %d)"),i));
+	  _stat_nb_branch_accurate          [i] = _stat->create_counter("nb_branch_accurate_"         +toString(i),"",toString(_("Branch and is accurate (context %d)"),i));
+
+	  _stat->create_expr("nb_branch_used_"+toString(i),sum_branchement,TYPE_COUNTER,"",_("Branch used"));
         }
     }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 115)
@@ -468,4 +468,14 @@
                           reg_UPDATE_PREDICTION_TABLE [context][depth]._retire_ok       = true;
                           reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_prediction = ko;
+
+#ifdef STATISTICS
+                          if (usage_is_set(_usage,USE_STATISTICS))
+			    {
+			      if (reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction)
+				(*_stat_nb_branch_ifetch_prediction [context])++;
+			      if (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate)
+				(*_stat_nb_branch_accurate          [context])++;
+			    }
+#endif
                         }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp	(revision 115)
@@ -187,4 +187,12 @@
         
         // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+	for (uint32_t i=0; i<_param->_nb_bank; ++i)
+	  while(not _rob[i].empty())
+	    {
+	      entry_t * entry = _rob[i].front();
+	      delete entry;
+	      _rob[i].pop_front();
+	    }
+
         DELETE2(_nb_cycle_idle           ,_param->_nb_front_end,_param->_nb_context [it1]);
         DELETE1(_rob                     ,_param->_nb_bank);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 115)
@@ -28,7 +28,11 @@
       {
         // Clear all bank 
-        for (uint32_t i=0; i<_param->_nb_bank; i++)
+	for (uint32_t i=0; i<_param->_nb_bank; ++i)
 	  {
-	    _rob [i].clear();
+	    while(not _rob[i].empty())
+	      {
+		delete _rob[i].front();
+		_rob[i].pop_front();
+	      }
 	    reg_BANK_PTR [i] = 0;
 	  }
@@ -126,4 +130,5 @@
 
 		  Texception_t exception    = PORT_READ(in_INSERT_EXCEPTION    [x][y]);
+		  Tcontrol_t   no_execute   = PORT_READ(in_INSERT_NO_EXECUTE   [x][y]);
 
 		  log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id   : %d",front_end_id);
@@ -147,6 +152,6 @@
 		  entry->exception               = exception;
 		  entry->exception_use           = PORT_READ(in_INSERT_EXCEPTION_USE         [x][y]);
-		  entry->use_store_queue         = (type == TYPE_MEMORY) and (    is_store);
-		  entry->use_load_queue          = (type == TYPE_MEMORY) and (not is_store);
+		  entry->use_store_queue         = (type == TYPE_MEMORY) and (    is_store) and (not no_execute);
+		  entry->use_load_queue          = (type == TYPE_MEMORY) and (not is_store) and (not no_execute);
 		  entry->store_queue_ptr_write   = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE [x][y]);
 		  entry->load_queue_ptr_write    = (_param->_have_port_load_queue_ptr)?PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE [x][y]):0;
@@ -200,5 +205,4 @@
                       if (exception == EXCEPTION_NONE)
                         {
-                          Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]);
                           // no_execute : l.j, l.nop, l.rfe
                           
@@ -208,5 +212,5 @@
                             {
                             case TYPE_BRANCH : {entry->state=(no_execute==1)?ROB_BRANCH_COMPLETE:ROB_BRANCH_WAIT_END  ; break;}
-                            case TYPE_MEMORY : {entry->state=(is_store  ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END; break;}
+                            case TYPE_MEMORY : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:(entry->state=(is_store  ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END); break;}
                             default          : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:ROB_OTHER_WAIT_END; break;}
                             }
@@ -331,5 +335,5 @@
                       default :
                         {
-                          throw ERRORMORPHEO(FUNCTION,toString(_("Commit : invalid state value (%s).\n"),toString(state).c_str()));
+                          throw ERRORMORPHEO(FUNCTION,toString(_("Commit [%d] : Bank [%d][%d], invalid state value (%s).\n"),x,i,j,toString(state).c_str()));
                           break;
                         }
@@ -442,6 +446,6 @@
                 reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank;
                 
+                delete entry;
                 _rob [num_bank].pop_front();
-                delete entry;
                 
                 // Transaction on retire interface : reset watch dog timer.
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 115)
@@ -98,17 +98,20 @@
               entry_t* entry = _issue_queue [num_bank].front();
               
+	      // have valid instruction, search a valid issue slot.
               for (uint32_t j=0; j<_param->_nb_inst_issue; j++)
                 {
-                  log_printf(TRACE,Issue_queue,FUNCTION,"    * Issue [%d]",j);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"      * issue_ack            : %d",PORT_READ(in_ISSUE_OUT_ACK [j]));
-                  log_printf(TRACE,Issue_queue,FUNCTION,"      * previous transaction : %d",val[j]);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"      * can issue type       : %d",_param->_table_issue_type [j][entry->_type]);
+		  Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [j]);
+
+                  log_printf(TRACE,Issue_queue,FUNCTION,"      * Issue [%d]",j);
+                  log_printf(TRACE,Issue_queue,FUNCTION,"        * issue_ack            : %d",issue_ack);
+                  log_printf(TRACE,Issue_queue,FUNCTION,"        * previous transaction : %d",val[j]);
+                  log_printf(TRACE,Issue_queue,FUNCTION,"        * can issue type       : %d",_param->_table_issue_type [j][entry->_type]);
 
                   // test if no previous transaction and can accept this type
-                  if ((val[j] == 0) and 
+                  if (not val[j] and 
                       _param->_table_issue_type [j][entry->_type] and
-                      PORT_READ(in_ISSUE_OUT_ACK [j]))
+                      issue_ack)
                     {
-                      log_printf(TRACE,Issue_queue,FUNCTION,"    * find : %d",j);
+		      log_printf(TRACE,Issue_queue,FUNCTION,"        * find !!!");
                       
                       // find a issue port
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 115)
@@ -99,9 +99,8 @@
         // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
         for (uint32_t i=0; i<_param->_nb_bank; i++)
-          if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_EMPTY))
+	  while (not _reexecute_queue [i].empty())
             {
-              entry_t * entry = _reexecute_queue [i].front();
+              delete _reexecute_queue [i].front();
               _reexecute_queue [i].pop_front();
-              delete entry;
             }
         DELETE1(_reexecute_queue                ,_param->_nb_bank);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp	(revision 115)
@@ -227,5 +227,5 @@
 	    in_RENAME_IN_VAL          [i][j]->write((rand()%100)<percent_transaction_rename_in);
 	    in_RENAME_IN_FRONT_END_ID [i][j]->write(range<Tcontext_t        >(rand(),_param->_size_front_end_id          ));
-	    in_RENAME_IN_CONTEXT_ID   [i][j]->write(range<Tcontext_t        >(rand(),log2(_param->_nb_context[i])        ));
+	    in_RENAME_IN_CONTEXT_ID   [i][j]->write(rand()%_param->_nb_context[i]);
 	    in_RENAME_IN_DEPTH        [i][j]->write(range<Tdepth_t          >(rand(),_param->_size_depth                 ));
 	    in_RENAME_IN_TYPE         [i][j]->write(range<Ttype_t           >(rand(),_param->_size_type                  ));
@@ -293,25 +293,29 @@
 		      find = true;
 		      
+		      Tcontext_t context_id = (_param->_have_port_context_id)?in_RENAME_IN_CONTEXT_ID [x][y]->read():0;
+
 		      if (_param->_have_port_front_end_id)
 		      TEST(Tcontext_t        ,out_RENAME_OUT_FRONT_END_ID [i]->read(),in_RENAME_IN_FRONT_END_ID [x][y]->read());
 		      if (_param->_have_port_context_id)
-		      TEST(Tcontext_t        ,out_RENAME_OUT_CONTEXT_ID   [i]->read(),in_RENAME_IN_CONTEXT_ID   [x][y]->read());
+		      TEST(Tcontext_t        ,out_RENAME_OUT_CONTEXT_ID   [i]->read(),context_id);
 		      if (_param->_have_port_depth)
 		      TEST(Tdepth_t          ,out_RENAME_OUT_DEPTH        [i]->read(),in_RENAME_IN_DEPTH        [x][y]->read());
 		      TEST(Ttype_t           ,out_RENAME_OUT_TYPE         [i]->read(),in_RENAME_IN_TYPE         [x][y]->read());
 		      TEST(Toperation_t      ,out_RENAME_OUT_OPERATION    [i]->read(),in_RENAME_IN_OPERATION    [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_NO_EXECUTE   [i]->read(),in_RENAME_IN_NO_EXECUTE   [x][y]->read());
+		      Tcontrol_t have_event = in_RETIRE_EVENT_STATE[x][context_id]->read() != EVENT_STATE_NO_EVENT;
+		      Tcontrol_t no_execute = in_RENAME_IN_NO_EXECUTE   [x][y]->read() or have_event;
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_NO_EXECUTE   [i]->read(),no_execute);
 		      TEST(Tcontrol_t        ,out_RENAME_OUT_IS_DELAY_SLOT[i]->read(),in_RENAME_IN_IS_DELAY_SLOT[x][y]->read());
 		      TEST(Tcontrol_t        ,out_RENAME_OUT_HAS_IMMEDIAT [i]->read(),in_RENAME_IN_HAS_IMMEDIAT [x][y]->read());
 		      TEST(Tgeneral_data_t   ,out_RENAME_OUT_IMMEDIAT     [i]->read(),in_RENAME_IN_IMMEDIAT     [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RA      [i]->read(),in_RENAME_IN_READ_RA      [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RA      [i]->read(),in_RENAME_IN_READ_RA      [x][y]->read() and not have_event);
 		      TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA   [i]->read(),in_RENAME_IN_NUM_REG_RA   [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RB      [i]->read(),in_RENAME_IN_READ_RB      [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RB      [i]->read(),in_RENAME_IN_READ_RB      [x][y]->read() and not have_event);
 		      TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB   [i]->read(),in_RENAME_IN_NUM_REG_RB   [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RC      [i]->read(),in_RENAME_IN_READ_RC      [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_READ_RC      [i]->read(),in_RENAME_IN_READ_RC      [x][y]->read() and not have_event);
 		      TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC   [i]->read(),in_RENAME_IN_NUM_REG_RC   [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_WRITE_RD     [i]->read(),in_RENAME_IN_WRITE_RD     [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_WRITE_RD     [i]->read(),in_RENAME_IN_WRITE_RD     [x][y]->read() and not have_event);
 		      TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD   [i]->read(),in_RENAME_IN_NUM_REG_RD   [x][y]->read());
-		      TEST(Tcontrol_t        ,out_RENAME_OUT_WRITE_RE     [i]->read(),in_RENAME_IN_WRITE_RE     [x][y]->read());
+		      TEST(Tcontrol_t        ,out_RENAME_OUT_WRITE_RE     [i]->read(),in_RENAME_IN_WRITE_RE     [x][y]->read() and not have_event);
 		      TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE   [i]->read(),in_RENAME_IN_NUM_REG_RE   [x][y]->read());
 		      TEST(Texception_t      ,out_RENAME_OUT_EXCEPTION_USE[i]->read(),in_RENAME_IN_EXCEPTION_USE[x][y]->read());
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp	(revision 115)
@@ -64,25 +64,30 @@
 
                 log_printf(TRACE,Rename_select,FUNCTION,"      * in_RENAME_OUT_ACK    : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
-
                 Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0;
                 Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_IN_CONTEXT_ID   [x][y]):0;
+
+		log_printf(TRACE,Rename_select,FUNCTION,"      * front_end_id         : %d",front_end_id);
+		log_printf(TRACE,Rename_select,FUNCTION,"      * context_id           : %d",context_id);
                 
-                Tcontrol_t no_execute   = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]));
-// 		Tcontrol_t read_ra      = (PORT_READ(in_RENAME_IN_READ_RA    [x][y]));
-// 		Tcontrol_t read_rb      = (PORT_READ(in_RENAME_IN_READ_RB    [x][y]));
-// 		Tcontrol_t read_rc      = (PORT_READ(in_RENAME_IN_READ_RC    [x][y]));
-// 		Tcontrol_t write_rd     = (PORT_READ(in_RENAME_IN_WRITE_RD   [x][y]));
-// 		Tcontrol_t write_re     = (PORT_READ(in_RENAME_IN_WRITE_RE   [x][y]));
+                // Test if ROB is Flushed
+                Tevent_state_t event_state         = PORT_READ(in_RETIRE_EVENT_STATE [x][context_id]);
+		Tcontrol_t     have_event          = (event_state != EVENT_STATE_NO_EVENT);
+		Tcontrol_t     can_register_access = not have_event;
+		Tcontrol_t     no_execute          = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or have_event);
+		Tcontrol_t     read_ra             = (PORT_READ(in_RENAME_IN_READ_RA    [x][y]) and can_register_access);
+		Tcontrol_t     read_rb             = (PORT_READ(in_RENAME_IN_READ_RB    [x][y]) and can_register_access);
+		Tcontrol_t     read_rc             = (PORT_READ(in_RENAME_IN_READ_RC    [x][y]) and can_register_access);
+		Tcontrol_t     write_rd            = (PORT_READ(in_RENAME_IN_WRITE_RD   [x][y]) and can_register_access);
+		Tcontrol_t     write_re            = (PORT_READ(in_RENAME_IN_WRITE_RE   [x][y]) and can_register_access);
+// 		Tcontrol_t     read_ra             = (PORT_READ(in_RENAME_IN_READ_RA    [x][y]));
+// 		Tcontrol_t     read_rb             = (PORT_READ(in_RENAME_IN_READ_RB    [x][y]));
+// 		Tcontrol_t     read_rc             = (PORT_READ(in_RENAME_IN_READ_RC    [x][y]));
+// 		Tcontrol_t     write_rd            = (PORT_READ(in_RENAME_IN_WRITE_RD   [x][y]));
+// 		Tcontrol_t     write_re            = (PORT_READ(in_RENAME_IN_WRITE_RE   [x][y]));
 
-                // Test if ROB is Flushed
-                Tevent_state_t event_state         = PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]);
-                Tcontrol_t     can_register_access = (event_state == EVENT_STATE_NO_EVENT);
+                log_printf(TRACE,Rename_select,FUNCTION,"      * event_state          : %d",event_state);
+                log_printf(TRACE,Rename_select,FUNCTION,"      * no_execute (before)  : %d",PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]));
+                log_printf(TRACE,Rename_select,FUNCTION,"      * no_execute (after)   : %d",no_execute);
 
-		Tcontrol_t read_ra  = (PORT_READ(in_RENAME_IN_READ_RA  [x][y]) and can_register_access);
-		Tcontrol_t read_rb  = (PORT_READ(in_RENAME_IN_READ_RB  [x][y]) and can_register_access);
-		Tcontrol_t read_rc  = (PORT_READ(in_RENAME_IN_READ_RC  [x][y]) and can_register_access);
-		Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and can_register_access);
-		Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access);
-                
 		if (_param->_have_port_front_end_id)
 		PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i],front_end_id);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp	(revision 115)
@@ -58,4 +58,6 @@
   ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION                               ,"out_INSERT_EXCEPTION                              ",Texception_t      ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                      ,"out_INSERT_NUM_REG_RE_PHY_NEW                     ",Tspecial_address_t,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE                              ,"out_INSERT_NO_EXECUTE                             ",Tcontrol_t        ,_param->_nb_inst_insert);
+
   ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL                       ," in_INSERT_RENAME_SELECT_VAL                      ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK                       ,"out_INSERT_RENAME_SELECT_ACK                      ",Tcontrol_t        ,_param->_nb_inst_insert);
@@ -67,4 +69,6 @@
 //   ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE             ," in_INSERT_RENAME_SELECT_EXCEPTION_USE            ",Texception_t      ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                 ," in_INSERT_RENAME_SELECT_EXCEPTION                ",Texception_t      ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE                ," in_INSERT_RENAME_SELECT_NO_EXECUTE               ",Tcontrol_t        ,_param->_nb_inst_insert);
+
   ALLOC1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL                ,"out_INSERT_REGISTER_TRANSLATION_VAL               ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK                ," in_INSERT_REGISTER_TRANSLATION_ACK               ",Tcontrol_t        ,_param->_nb_inst_insert);
@@ -109,4 +113,6 @@
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_NO_EXECUTE                             ,_param->_nb_inst_insert);
+
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert);
@@ -120,4 +126,6 @@
 //   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_NO_EXECUTE               ,_param->_nb_inst_insert);
+
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert);
@@ -201,4 +209,6 @@
   DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE                             ,_param->_nb_inst_insert);
+
   DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert);
@@ -210,4 +220,6 @@
 //   DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE               ,_param->_nb_inst_insert);
+
   DELETE1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h	(revision 115)
@@ -75,4 +75,5 @@
   public    : SC_OUT(Texception_t      )   ** out_INSERT_EXCEPTION                              ;//[nb_inst_insert]
   public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_NUM_REG_RE_PHY_NEW                     ;//[nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_NO_EXECUTE                             ;//[nb_inst_insert]
 											        
   public    : SC_IN (Tcontrol_t        )   **  in_INSERT_RENAME_SELECT_VAL                      ;//[nb_inst_insert]
@@ -85,4 +86,5 @@
   public    : SC_IN (Texception_t      )   **  in_INSERT_RENAME_SELECT_EXCEPTION_USE            ;//[nb_inst_insert]
   public    : SC_IN (Texception_t      )   **  in_INSERT_RENAME_SELECT_EXCEPTION                ;//[nb_inst_insert]
+  public    : SC_IN (Tcontrol_t        )   **  in_INSERT_RENAME_SELECT_NO_EXECUTE               ;//[nb_inst_insert]
 											        
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_REGISTER_TRANSLATION_VAL               ;//[nb_inst_insert]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp	(revision 115)
@@ -106,4 +106,5 @@
 	  //<< (*(in_INSERT_ACK                          [i]))
 	    << (*(in_INSERT_RENAME_SELECT_VAL            [i]))
+	    << (*(in_INSERT_RENAME_SELECT_NO_EXECUTE     [i]))
 	    << (*(in_INSERT_REGISTER_TRANSLATION_ACK     [i]))
 	    << (*(in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK [i]))
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp	(revision 115)
@@ -71,4 +71,6 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION                              ,"EXCEPTION"                              ,Texception_t      ,_param->_size_exception);
       ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW                     ,"NUM_REG_RE_PHY_NEW"                     ,Tspecial_address_t,_param->_size_special_register);
+      ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE                             ,"NO_EXECUTE"                             ,Tcontrol_t        ,1);
+
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_VAL                      ,"RENAME_SELECT_VAL"                      ,Tcontrol_t        ,1);
       ALLOC1_SIGNAL_OUT(out_INSERT_RENAME_SELECT_ACK                      ,"RENAME_SELECT_ACK"                      ,Tcontrol_t        ,1);
@@ -80,4 +82,6 @@
 //    ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,"RENAME_SELECT_EXCEPTION_USE"            ,Texception_t      ,_param->_size_exception_use);
       ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION                ,"RENAME_SELECT_EXCEPTION"                ,Texception_t      ,_param->_size_exception);
+      ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_NO_EXECUTE               ,"RENAME_SELECT_NO_EXECUTE"               ,Tcontrol_t        ,1);
+
       ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_VAL               ,"REGISTER_TRANSLATION_VAL"               ,Tcontrol_t        ,1);
       ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_ACK               ,"REGISTER_TRANSLATION_ACK"               ,Tcontrol_t        ,1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp	(revision 115)
@@ -39,4 +39,6 @@
         DELETE1_SIGNAL(out_INSERT_EXCEPTION                              ,_param->_nb_inst_insert,_param->_size_exception);
         DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW                     ,_param->_nb_inst_insert,_param->_size_special_register);
+        DELETE1_SIGNAL(out_INSERT_NO_EXECUTE                             ,_param->_nb_inst_insert,1);
+
         DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_VAL                      ,_param->_nb_inst_insert,1);
         DELETE1_SIGNAL(out_INSERT_RENAME_SELECT_ACK                      ,_param->_nb_inst_insert,1);
@@ -48,4 +50,6 @@
 //      DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE            ,_param->_nb_inst_insert,_param->_size_exception_use);
         DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION                ,_param->_nb_inst_insert,_param->_size_exception);
+        DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE               ,_param->_nb_inst_insert,1);
+
         DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL               ,_param->_nb_inst_insert,1);
         DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK               ,_param->_nb_inst_insert,1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp	(revision 115)
@@ -31,4 +31,5 @@
       {
       //Tcontrol_t ACK                          = PORT_READ(in_INSERT_ACK                          [i]);
+	Tcontrol_t NO_EXECUTE                   = PORT_READ(in_INSERT_RENAME_SELECT_NO_EXECUTE     [i]);
 	Tcontrol_t RENAME_SELECT_VAL            = PORT_READ(in_INSERT_RENAME_SELECT_VAL            [i]);
 	Tcontrol_t REGISTER_TRANSLATION_ACK     = PORT_READ(in_INSERT_REGISTER_TRANSLATION_ACK     [i]);
@@ -54,7 +55,9 @@
 // 						   ACK                          and
 						   RENAME_SELECT_VAL            and
-						   REGISTER_TRANSLATION_ACK     );
+						   REGISTER_TRANSLATION_ACK     and
+						   not NO_EXECUTE               );
 
         log_printf(TRACE,Rename_unit_Glue,FUNCTION,"  * insert [%d]",i);
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * no_execute                   (r) : %d",NO_EXECUTE);
         log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * rename_select_val            (r) : %d",RENAME_SELECT_VAL           );
         log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * rename_select_ack            (w) : %d",RENAME_SELECT_ACK           );
@@ -64,4 +67,5 @@
         log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK);
 	
+ 	PORT_WRITE(out_INSERT_NO_EXECUTE                   [i], NO_EXECUTE                  );
 // 	PORT_WRITE(out_INSERT_VAL                          [i], VAL                         );
 	PORT_WRITE(out_INSERT_RENAME_SELECT_ACK            [i], RENAME_SELECT_ACK           );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp	(revision 115)
@@ -362,6 +362,4 @@
 #endif
 
-	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NO_EXECUTE"  ,
-		              dest,"out_INSERT_"    +toString(i)+"_NO_EXECUTE"  );
 	  PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_IS_DELAY_SLOT",
 		              dest,"out_INSERT_"    +toString(i)+"_IS_DELAY_SLOT");
@@ -435,4 +433,6 @@
 	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_EXCEPTION"    ,
 			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_EXCEPTION"    );
+	  COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+              "_NO_EXECUTE"   ,
+			           dest, "in_INSERT_"    +toString(i)+"_RENAME_SELECT_NO_EXECUTE"   );
 	}
 
@@ -782,5 +782,6 @@
 	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
 		              dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW");
-	  
+	  PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NO_EXECUTE"  ,
+		              dest,"out_INSERT_"+toString(i)+"_NO_EXECUTE"  );
 	  
 	  //    in_INSERT_RENAME_SELECT_VAL                       - rename_select
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 115)
@@ -76,4 +76,6 @@
       
       test (name,param);
+
+      delete param;
     }
   catch (morpheo::ErrorMorpheo & error)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp	(revision 115)
@@ -71,13 +71,11 @@
 	  {
 	    for (uint32_t k=0; k<NB_GROUP; k++)
-	      {
-                if (_spr [i][j][k] != NULL)
-		  {
-		    for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
-		      if (_spr [i][j][k][l] != NULL)
-			delete _spr [i][j][k][l];
-		    delete [] _spr [i][j][k];
-		  }
-	      }
+	      if (_spr [i][j][k] != NULL)
+		{
+		  for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
+		    if (_spr [i][j][k][l] != NULL)
+		      delete _spr [i][j][k][l];
+		  delete [] _spr [i][j][k];
+		}
 	    delete [] _spr [i][j];
 	  }	
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg	(revision 115)
@@ -33,4 +33,5 @@
 1	1	+1	# size_execute_queue                      [0]       [nb_write_bloc]                              
 0	0	+1	# nb_bypass_write                         [0]       [nb_write_bloc]                              
+0	0	+1	# write_queue_scheme                      [0]       [nb_write_bloc]                              
 1	1	+1	# nb_load_store_unit                                                                      
 2	2	+1	# size_store_queue                        [0]       [nb_load_store_unit]                         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg	(revision 115)
@@ -33,4 +33,5 @@
 4	4	+1	# size_execute_queue                      [0]       [nb_write_bloc]                              
 0	0	+1	# nb_bypass_write                         [0]       [nb_write_bloc]                              
+0	0	+1	# write_queue_scheme                      [0]       [nb_write_bloc]                              
 1	1	+1	# nb_load_store_unit                                                                      
 4	4	+1	# size_store_queue                        [0]       [nb_load_store_unit]                         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp	(revision 115)
@@ -56,4 +56,5 @@
   err (_(" * size_execute_queue                      [nb_write_bloc]                              (uint32_t             )\n"));
   err (_(" * nb_bypass_write                         [nb_write_bloc]                              (uint32_t             )\n"));
+  err (_(" * write_queue_scheme                      [nb_write_bloc]                              (Twrite_queue_scheme_t)\n"));
                                                                                                                         
   err (_(" * nb_load_store_unit                                                                   (uint32_t             )\n"));
@@ -222,4 +223,5 @@
   uint32_t              * _size_execute_queue                            ;//[nb_write_bloc]
   uint32_t              * _nb_bypass_write                               ;//[nb_write_bloc]
+  core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_bloc]
 
   // Load_store_unit
@@ -403,5 +405,5 @@
   SELFTEST0(_nb_write_bloc                                 ,uint32_t                ,argv,x);
 
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc))
     usage (argc, argv);
   
@@ -409,4 +411,5 @@
   SELFTEST1(_size_execute_queue                            ,uint32_t                ,argv,x,_nb_write_bloc);
   SELFTEST1(_nb_bypass_write                               ,uint32_t                ,argv,x,_nb_write_bloc);
+  SELFTEST1(_write_queue_scheme,core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,argv,x,_nb_write_bloc);
 
   // Load store unit
@@ -414,5 +417,5 @@
   SELFTEST0(_nb_load_store_unit                            ,uint32_t                ,argv,x);
 
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit))
     usage (argc, argv);
   
@@ -431,5 +434,5 @@
   SELFTEST0(_nb_functionnal_unit                           ,uint32_t                ,argv,x);
 
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit))
     usage (argc, argv);
   
@@ -474,5 +477,5 @@
   SELFTEST0(_nb_front_end                                  ,uint32_t                ,argv,x);
 
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end))
     usage (argc, argv);
   
@@ -501,5 +504,5 @@
   SELFTEST0(_nb_ooo_engine                                 ,uint32_t                ,argv,x);
   
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine))
     usage (argc, argv);
   
@@ -529,5 +532,5 @@
   SELFTEST0(_nb_execute_loop                               ,uint32_t                ,argv,x);
 
-  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))
+  if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))
     usage (argc, argv);
   
@@ -547,5 +550,5 @@
   printf(" * Link\n");
 
-  if (argc < static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))
+  if (argc < static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+5*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))
     usage (argc, argv);
   
@@ -601,5 +604,5 @@
     _sum_cache_port += _nb_cache_port[i];
   
-  if (argc != static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop+
+  if (argc != static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+5*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop+
                                3*_nb_thread+_nb_front_end+_sum_inst_issue*_nb_read_bloc+_nb_load_store_unit*(_nb_read_bloc+_nb_write_bloc+_nb_thread)+_nb_functionnal_unit*(_nb_read_bloc+_nb_write_bloc)+_sum_cache_port))
     usage (argc, argv);
@@ -668,4 +671,5 @@
          _size_execute_queue                            ,
          _nb_bypass_write                               ,
+	 _write_queue_scheme                            ,
 
          _nb_load_store_unit                            ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h	(revision 115)
@@ -82,4 +82,5 @@
   public : uint32_t              * _size_execute_queue                            ;//[nb_write_bloc]
   public : uint32_t              * _nb_bypass_write                               ;//[nb_write_bloc]
+  public : multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_bloc]
 
   // Load_store_unit
@@ -287,4 +288,6 @@
   public : uint32_t             ** _execute_loop_size_execute_queue                        ;//[nb_execute_loop][nb_write_unit]
   public : uint32_t             ** _execute_loop_nb_bypass_write                           ;//[nb_execute_loop][nb_write_unit]
+  public : multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t ** _execute_loop_write_queue_scheme; //[nb_execute_loop][nb_write_unit]
+
   public : uint32_t             ** _execute_loop_nb_general_register                       ;//[nb_execute_loop][execute_loop_nb_ooo_engine]
   public : uint32_t             ** _execute_loop_nb_special_register                       ;//[nb_execute_loop][execute_loop_nb_ooo_engine]
@@ -394,4 +397,5 @@
   uint32_t              * size_execute_queue                            ,//[nb_write_bloc]
   uint32_t              * nb_bypass_write                               ,//[nb_write_bloc]
+  multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_bloc]
 
   // Load_store_unit
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp	(revision 115)
@@ -120,4 +120,5 @@
   uint32_t              * size_execute_queue                            ,//[nb_write_bloc]
   uint32_t              * nb_bypass_write                               ,//[nb_write_bloc]
+  multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_bloc]
 
   // Load_store_unit
@@ -273,4 +274,5 @@
     _size_execute_queue                      = size_execute_queue                      ;
     _nb_bypass_write                         = nb_bypass_write                         ;
+    _write_queue_scheme                      = write_queue_scheme                      ;
 
     _nb_load_store_unit                      = nb_load_store_unit                      ;
@@ -1501,4 +1503,5 @@
     ALLOC2(_execute_loop_size_execute_queue                        ,uint32_t,_nb_execute_loop,_nb_write_unit[it1]);
     ALLOC2(_execute_loop_nb_bypass_write                           ,uint32_t,_nb_execute_loop,_nb_write_unit[it1]);
+    ALLOC2(_execute_loop_write_queue_scheme                        ,multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,_nb_execute_loop,_nb_write_unit[it1]);
     
     for (uint32_t i=0; i<_nb_execute_loop; ++i)
@@ -1510,4 +1513,5 @@
           _execute_loop_size_execute_queue [i][j] = _size_execute_queue [num_write_bloc];
           _execute_loop_nb_bypass_write    [i][j] = _nb_bypass_write    [num_write_bloc];
+          _execute_loop_write_queue_scheme [i][j] = _write_queue_scheme [num_write_bloc];
         }
     
@@ -1966,4 +1970,5 @@
          _execute_loop_size_execute_queue                         [i],
          _execute_loop_nb_bypass_write                            [i],
+         _execute_loop_write_queue_scheme                         [i],
 
          _nb_gpr_bank                                             [i],
@@ -2104,4 +2109,5 @@
     DELETE2(_execute_loop_nb_special_register                       ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
     DELETE2(_execute_loop_nb_general_register                       ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
+    DELETE2(_execute_loop_write_queue_scheme                        ,_nb_execute_loop,_nb_write_unit[it1]);
     DELETE2(_execute_loop_nb_bypass_write                           ,_nb_execute_loop,_nb_write_unit[it1]);
     DELETE2(_execute_loop_size_execute_queue                        ,_nb_execute_loop,_nb_write_unit[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/SelfTest/src/main.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/SelfTest/src/main.cpp	(revision 115)
@@ -24,4 +24,6 @@
 
       delete my_top;
+
+      delete param;
     }
   catch (morpheo::ErrorMorpheo & error)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest	(revision 115)
@@ -179,6 +179,11 @@
 				$(GREP) -q "Test KO" $@; 				\
 				declare -i test_ko=$$?;					\
+				declare memory_leak=" ";				\
+				$(GREP) -q "Leaked memory at" $@;			\
+				if $(TEST) $$? -eq 0;	      				\
+				then memory_leak="*";					\
+				fi;  							\
 				if $(TEST) $$test_ko -ne 0 -a $$test_ok -eq 0 -a $$test_timing -eq 0; \
-				then echo -e "                     $* ... OK\t$$timing";\
+				then echo -e "                     $* ... OK $$memory_leak\t$$timing";\
 				else echo    "                     $* ... KO";          \
 				fi;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h	(revision 115)
@@ -252,8 +252,10 @@
 #define ALLOC1_INTERFACE_BEGIN( name, direction, localisation, str, x1)       \
   INTERFACE_PRINT(name);                                                \
-  const uint32_t iterator_1 = x1;                                       \
-  morpheo::behavioural::Interface_fifo * interface [iterator_1];        \
-  {                                                                     \
-    std::string separator="_";                                          \
+  uint32_t iterator_1 = 0;						\
+  morpheo::behavioural::Interface_fifo ** interface;			\
+  {                                                                     \
+    std::string separator="_";                                          \
+    iterator_1 = x1;                                                    \
+    interface = new morpheo::behavioural::Interface_fifo * [iterator_1]; \
     for (uint32_t it1=0; it1<iterator_1; it1++)                         \
       {                                                                 \
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h	(revision 115)
@@ -25,4 +25,5 @@
 namespace behavioural          {
 
+  /*
 #ifdef DEBUG
 # define PORT_MAP(x,a,b,c,d)						\
@@ -40,4 +41,5 @@
   while (0)
 #else
+*/
 # define PORT_MAP(x,a,b,c,d)						\
   do									\
@@ -46,5 +48,5 @@
     }									\
   while (0)
-#endif
+// #endif
 
 #define COMPONENT_MAP(x,a,b,c,d)					\
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h	(revision 115)
@@ -10,8 +10,8 @@
 #define MORPHEO_MAJOR_VERSION "0"
 #define MORPHEO_MINOR_VERSION "2"
-#define MORPHEO_REVISION      "114"
+#define MORPHEO_REVISION      "115"
 #define MORPHEO_CODENAME      "Castor"
 
-#define MORPHEO_DATE_DAY      "17"  
+#define MORPHEO_DATE_DAY      "20"  
 #define MORPHEO_DATE_MONTH    "04"
 #define MORPHEO_DATE_YEAR     "2009" 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces.cpp	(revision 114)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces.cpp	(revision 115)
@@ -39,8 +39,14 @@
 #endif
 
-    for (std::list<Interface_fifo*>::iterator it = _list_interface->begin();
-         it!=_list_interface->end();
-         ++it)
-      delete (*it);
+//     for (std::list<Interface_fifo*>::iterator it = _list_interface->begin();
+//          it!=_list_interface->end();
+//          ++it)
+//       delete (*it);
+
+    while (not _list_interface->empty())
+      {
+	delete _list_interface->front();
+	_list_interface->pop_front();
+      }
 
     delete _list_interface;
