Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 117)
@@ -60,6 +60,10 @@
   public : uint32_t         ** _array_size_depth        ;//[nb_front_end][nb_context]
 //public : uint32_t            _max_size_depth          ;
-  public : Tpacket_t           _shift_num_bank          ;
-  public : Tpacket_t           _mask_size_bank          ;
+
+//public : Tpacket_t           _shift_num_bank          ;
+  public : Tpacket_t           _mask_num_bank           ;
+  public : Tpacket_t           _shift_num_slot          ;
+//public : Tpacket_t           _mask_num_slot           ;
+    
 
 //public : bool                _have_port_front_end_id  ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 117)
@@ -336,9 +336,11 @@
 
 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true)
+    directory_init ();
+
     instruction_log_file = new std::ofstream [_param->_nb_thread];
     for (uint32_t i=0; i<_param->_nb_thread; ++i)
       if (_param->_have_thread [i])
         {
-          std::string filename = "Instruction_flow-thread_" + toString(i) + ".log";
+          std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+"-"+toString(getpid())+".log";
           
           instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 117)
@@ -49,5 +49,5 @@
             // packet_id number can 
 	    Tpacket_t packet_id       = (_param->_have_port_rob_ptr  )?PORT_READ(in_COMMIT_PACKET_ID [i]):0;
-	    uint32_t  num_bank        = packet_id >> _param->_shift_num_bank;
+	    uint32_t  num_bank        = packet_id & _param->_mask_num_bank;
 	    uint32_t  num_bank_access = bank_nb_access [num_bank];
             
@@ -62,5 +62,5 @@
 		internal_BANK_COMMIT_NUM_INST [num_bank][num_bank_access] = i;
                 
-                Tpacket_t num_packet = packet_id & _param->_mask_size_bank;
+                Tpacket_t num_packet = packet_id >> _param->_shift_num_slot;
                 
                 // find the good entry !!!
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 117)
@@ -99,5 +99,5 @@
                         insert_ack       [num_rename_unit][num_inst_insert] = true;
                         
-                        Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
+                        Tpacket_t packet_id = ((reg_BANK_PTR [num_bank] << _param->_shift_num_slot) | num_bank);
                         
 #ifdef SYSTEMC_VHDL_COMPATIBILITY
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 117)
@@ -392,5 +392,5 @@
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id : %d",front_end_id );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id   : %d",context_id   );
-                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((num_bank << _param->_shift_num_bank) | entry->ptr));
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((entry->ptr << _param->_shift_num_slot) | num_bank));
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * num_thread   : %d",num_thread   );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * type         : %s",toString(type).c_str());
@@ -740,5 +740,5 @@
                          num_bank                       ,
                          (*it)->ptr                     ,
-                         ((num_bank << _param->_shift_num_bank) | (*it)->ptr),
+                         (((*it)->ptr << _param->_shift_num_slot) | num_bank),
                          (*it)->front_end_id            ,
                          (*it)->context_id              ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 117)
@@ -71,6 +71,9 @@
     _max_nb_inst_retire       = max<uint32_t>(_nb_inst_retire,_nb_rename_unit);
     _size_bank                = _size_queue/_nb_bank;
-    _shift_num_bank           = log2(_size_bank);
-    _mask_size_bank           = gen_mask<Tpacket_t>(log2(_size_bank));
+
+//  _shift_num_bank           = 0;
+    _mask_num_bank            = gen_mask<Tpacket_t>(log2(_nb_bank));
+    _shift_num_slot           = log2(_nb_bank);
+//  _mask_num_slot            = gen_mask<Tpacket_t>(log2(_size_bank));
 
     _have_port_rename_unit_id = _size_rename_unit_id > 0;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-1	1	*2	# nb_inst_issue           
 1	1	*2	# nb_inst_rename         [0]               [nb_rename_unit]
 1	1	*2	# nb_inst_reexecute       
@@ -19,15 +18,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-2	2	*4	# nb_inst_issue           
 1	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
 1	4	*4	# nb_inst_reexecute       
@@ -19,28 +18,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-4	4	*4	# nb_inst_issue           
 4	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
 1	1	*4	# nb_inst_rename         [1]               [nb_rename_unit]
@@ -22,66 +21,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [0][2]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [0][3]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [1][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [1][1]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [1][2]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [1][3]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [2][0]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [2][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [2][2]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [2][3]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [3][0]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [3][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [3][2]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [3][3]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 117)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h"
 
-#define NB_PARAMS 18
+#define NB_PARAMS 17
 
 void usage (int argc, char * argv[])
@@ -27,5 +27,4 @@
   err (_(" * size_store_queue_ptr                                  (uint32_t             )\n"));
   err (_(" * size_load_queue_ptr                                   (uint32_t             )\n"));
-  err (_(" * nb_inst_issue                                         (uint32_t             )\n"));
   err (_(" * nb_inst_rename        [nb_rename_unit]                (uint32_t             )\n"));
   err (_(" * nb_inst_reexecute                                     (uint32_t             )\n"));
@@ -33,18 +32,18 @@
   err (_(" * priority                                              (Tpriority_t          )\n"));
   err (_(" * load_balancing                                        (Tload_balancing_t    )\n"));
-  err (_(" * table_routing         [nb_rename_unit][nb_inst_issue] (bool                 )\n"));
-  err (_(" * table_routing         [nb_inst_issue][nb_type]        (bool                 )\n"));
-  err (_("   * TYPE_ALU    \n"));
-  err (_("   * TYPE_SHIFT  \n"));
-  err (_("   * TYPE_MOVE   \n"));
-  err (_("   * TYPE_TEST   \n"));
-  err (_("   * TYPE_MUL    \n"));
-  err (_("   * TYPE_DIV    \n"));
-  err (_("   * TYPE_EXTEND \n"));
-  err (_("   * TYPE_FIND   \n"));
-  err (_("   * TYPE_SPECIAL\n"));
-  err (_("   * TYPE_CUSTOM \n"));
-  err (_("   * TYPE_BRANCH \n"));
-  err (_("   * TYPE_MEMORY \n"));
+//   err (_(" * table_routing         [nb_rename_unit][nb_inst_issue] (bool                 )\n"));
+//   err (_(" * table_issue_type      [nb_inst_issue][nb_type]        (bool                 )\n"));
+//   err (_("   * TYPE_ALU    \n"));
+//   err (_("   * TYPE_SHIFT  \n"));
+//   err (_("   * TYPE_MOVE   \n"));
+//   err (_("   * TYPE_TEST   \n"));
+//   err (_("   * TYPE_MUL    \n"));
+//   err (_("   * TYPE_DIV    \n"));
+//   err (_("   * TYPE_EXTEND \n"));
+//   err (_("   * TYPE_FIND   \n"));
+//   err (_("   * TYPE_SPECIAL\n"));
+//   err (_("   * TYPE_CUSTOM \n"));
+//   err (_("   * TYPE_BRANCH \n"));
+//   err (_("   * TYPE_MEMORY \n"));
 
   exit (1);
@@ -68,5 +67,5 @@
   uint32_t          _nb_rename_unit         = fromString<uint32_t         >(argv[x++]);
 
-  if (argc <= static_cast<int>(2+NB_PARAMS+_nb_rename_unit))
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit))
     usage (argc, argv);
 
@@ -81,5 +80,5 @@
   uint32_t          _size_store_queue_ptr   = fromString<uint32_t         >(argv[x++]);
   uint32_t          _size_load_queue_ptr    = fromString<uint32_t         >(argv[x++]);
-  uint32_t          _nb_inst_issue          = fromString<uint32_t         >(argv[x++]);
+//uint32_t          _nb_inst_issue          = fromString<uint32_t         >(argv[x++]);
   uint32_t        * _nb_inst_rename         = new uint32_t [_nb_rename_unit];
   for (uint32_t i=0; i<_nb_rename_unit; i++)
@@ -90,33 +89,33 @@
   Tload_balancing_t _load_balancing         = fromString<Tload_balancing_t>(argv[x++]);
 
-  if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))
-    usage (argc, argv);
+//   if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))
+//     usage (argc, argv);
 
-  bool           ** _table_routing          = new bool * [_nb_rename_unit];
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    {
-      _table_routing [i] = new bool [_nb_inst_issue];
-      for (uint32_t j=0; j<_nb_inst_issue; j++)
-	_table_routing [i][j] = fromString<bool>(argv[x++]);
-    }
+//   bool           ** _table_routing          = new bool * [_nb_rename_unit];
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     {
+//       _table_routing [i] = new bool [_nb_inst_issue];
+//       for (uint32_t j=0; j<_nb_inst_issue; j++)
+// 	_table_routing [i][j] = fromString<bool>(argv[x++]);
+//     }
 
-  bool           ** _table_issue_type          = new bool * [_nb_inst_issue];
-  for (uint32_t i=0; i<_nb_inst_issue; i++)
-    {
-      _table_issue_type [i] = new bool [_nb_inst_issue];
+//   bool           ** _table_issue_type          = new bool * [_nb_inst_issue];
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)
+//     {
+//       _table_issue_type [i] = new bool [_nb_inst_issue];
 
-      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
-    }
+//       _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+//     }
 
   int _return = EXIT_SUCCESS;
@@ -137,5 +136,5 @@
 	 _size_store_queue_ptr  ,
 	 _size_load_queue_ptr   ,
-	 _nb_inst_issue         ,
+// 	 _nb_inst_issue         ,
 	 _nb_inst_rename        ,
 	 _nb_inst_reexecute     ,
@@ -143,6 +142,6 @@
 	 _priority              ,
 	 _load_balancing        ,
-	 _table_routing         ,
-	 _table_issue_type      ,
+// 	 _table_routing         ,
+// 	 _table_issue_type      ,
          true // is_toplevel
          );
@@ -173,10 +172,10 @@
   delete [] _nb_inst_rename;
 
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    delete [] _table_routing [i];
-  delete [] _table_routing   ;
-  for (uint32_t i=0; i<_nb_inst_issue; i++)
-    delete [] _table_issue_type [i];
-  delete [] _table_issue_type;
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     delete [] _table_routing [i];
+//   delete [] _table_routing   ;
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)
+//     delete [] _table_issue_type [i];
+//   delete [] _table_issue_type;
 
   return (_return);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 117)
@@ -48,4 +48,68 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_VAL                   ;
+  sc_signal<Tcontrol_t        > *** out_ISSUE_IN_ACK                   ;
+  sc_signal<Tcontext_t        > ***  in_ISSUE_IN_CONTEXT_ID            ;
+  sc_signal<Tcontext_t        > ***  in_ISSUE_IN_FRONT_END_ID          ;
+  sc_signal<Tpacket_t         > ***  in_ISSUE_IN_PACKET_ID             ;
+  sc_signal<Toperation_t      > ***  in_ISSUE_IN_OPERATION             ;
+  sc_signal<Ttype_t           > ***  in_ISSUE_IN_TYPE                  ;
+  sc_signal<Tlsq_ptr_t        > ***  in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ;
+  sc_signal<Tlsq_ptr_t        > ***  in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_HAS_IMMEDIAT          ;
+  sc_signal<Tgeneral_data_t   > ***  in_ISSUE_IN_IMMEDIAT              ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RA               ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RA            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RB               ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RB            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RC               ;
+  sc_signal<Tspecial_address_t> ***  in_ISSUE_IN_NUM_REG_RC            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_WRITE_RD              ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RD            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_WRITE_RE              ;
+  sc_signal<Tspecial_address_t> ***  in_ISSUE_IN_NUM_REG_RE            ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_VAL                  ;
+  sc_signal<Tcontrol_t        >  ** out_REEXECUTE_ACK                  ;
+  sc_signal<Tcontext_t        >  **  in_REEXECUTE_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        >  **  in_REEXECUTE_FRONT_END_ID         ;
+  sc_signal<Tpacket_t         >  **  in_REEXECUTE_PACKET_ID            ;
+  sc_signal<Toperation_t      >  **  in_REEXECUTE_OPERATION            ;
+  sc_signal<Ttype_t           >  **  in_REEXECUTE_TYPE                 ;
+  sc_signal<Tlsq_ptr_t        >  **  in_REEXECUTE_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t        >  **  in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_HAS_IMMEDIAT         ;
+  sc_signal<Tgeneral_data_t   >  **  in_REEXECUTE_IMMEDIAT             ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RA              ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RA           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RB              ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RB           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RC              ;
+  sc_signal<Tspecial_address_t>  **  in_REEXECUTE_NUM_REG_RC           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_WRITE_RD             ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RD           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_WRITE_RE             ;
+  sc_signal<Tspecial_address_t>  **  in_REEXECUTE_NUM_REG_RE           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_VAL                  ;
+  sc_signal<Tcontrol_t        >  **  in_ISSUE_OUT_ACK                  ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_OUT_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_OUT_FRONT_END_ID         ;
+  sc_signal<Tpacket_t         >  ** out_ISSUE_OUT_PACKET_ID            ;
+  sc_signal<Toperation_t      >  ** out_ISSUE_OUT_OPERATION            ;
+  sc_signal<Ttype_t           >  ** out_ISSUE_OUT_TYPE                 ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_HAS_IMMEDIAT         ;
+  sc_signal<Tgeneral_data_t   >  ** out_ISSUE_OUT_IMMEDIAT             ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RA              ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RA           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RB              ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RB           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RC              ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_OUT_NUM_REG_RC           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_WRITE_RD             ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RD           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_WRITE_RE             ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_OUT_NUM_REG_RE           ;
 
   ALLOC2_SC_SIGNAL( in_ISSUE_IN_VAL                   ," in_ISSUE_IN_VAL                   ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
@@ -309,5 +373,5 @@
 	    Ttype_t type = out_ISSUE_OUT_TYPE[i]->read();
 	    TEST(Ttype_t,type, tab_type[imm%NB_TYPE]);
-	    TEST(bool   ,_param->_table_issue_type[i][type],true);
+// 	    TEST(bool   ,_param->_table_issue_type[i][type],true);
 	  }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 117)
@@ -38,5 +38,4 @@
 //public : uint32_t              _size_store_queue_ptr    ;
 //public : uint32_t              _size_load_queue_ptr     ;
-  public : uint32_t              _nb_inst_issue           ;
   public : uint32_t            * _nb_inst_rename          ;//[nb_rename_unit]
   public : uint32_t              _nb_inst_reexecute       ;
@@ -44,8 +43,9 @@
   public : Tpriority_t           _priority                ;
   public : Tload_balancing_t     _load_balancing          ;
-  public : bool               ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
-  public : bool               ** _table_issue_type        ;//[nb_inst_issue][nb_type]
+//public : bool               ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
+//public : bool               ** _table_issue_type        ;//[nb_inst_issue][nb_type]
   public : uint32_t              _size_reexecute_queue    ;
                              
+  public : uint32_t              _nb_inst_issue           ;
 //public : uint32_t              _nb_bank_select_out      ;
   public : uint32_t              _max_nb_inst_rename      ;
@@ -74,5 +74,5 @@
 			uint32_t              size_store_queue_ptr    ,
 			uint32_t              size_load_queue_ptr     ,
-			uint32_t              nb_inst_issue           ,
+// 			uint32_t              nb_inst_issue           ,
 			uint32_t            * nb_inst_rename          ,
 			uint32_t              nb_inst_reexecute       ,
@@ -80,6 +80,6 @@
 			Tpriority_t           priority                ,
 			Tload_balancing_t     load_balancing          ,
-			bool               ** table_routing           ,
-			bool               ** table_issue_type        ,
+// 			bool               ** table_routing           ,
+// 			bool               ** table_issue_type        ,
                         bool                  is_toplevel=false);
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 117)
@@ -30,9 +30,13 @@
       Tcontrol_t val [_param->_nb_inst_issue];
 
+      uint32_t index=0;
       for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
         val [i] = 0;
 
+      //--------------------------------------
       // From Reexecute_queue
+      //--------------------------------------
 
+      // scan all reexecute_queue slot ...
 //       uint32_t num_reexecute_entry = 0;
       for (std::list<entry_t*>::iterator it=_reexecute_queue.begin();
@@ -42,45 +46,45 @@
           entry_t* entry = (*it);
 
-          for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
-            // test if no previous transaction and can accept this type
-            if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
-              {
-                // find a issue port
-                val [i] = 1;
-	    
-                if (_param->_have_port_context_id)
-	        PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
-	        if (_param->_have_port_front_end_id)
-	        PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
-	        if (_param->_have_port_rob_ptr  )
-	        PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
-	        PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
-	        PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
-	        PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
-	        if (_param->_have_port_load_queue_ptr)
-	        PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
-	        PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
-	        PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
-	        PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
-	        PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+          val [index] = 1;
+              
+          if (_param->_have_port_context_id)
+	  PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [index], entry->_context_id           );
+	  if (_param->_have_port_front_end_id)
+	  PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [index], entry->_front_end_id         );
+	  if (_param->_have_port_rob_ptr  )
+	  PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [index], entry->_packet_id            );
+	  PORT_WRITE(out_ISSUE_OUT_OPERATION             [index], entry->_operation            );
+	  PORT_WRITE(out_ISSUE_OUT_TYPE                  [index], entry->_type                 );
+	  PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write);
+	  if (_param->_have_port_load_queue_ptr)
+	  PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [index], entry->_load_queue_ptr_write );
+	  PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [index], entry->_has_immediat         );
+	  PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [index], entry->_immediat             );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RA               [index], entry->_read_ra              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [index], entry->_num_reg_ra           );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RB               [index], entry->_read_rb              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [index], entry->_num_reg_rb           );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RC               [index], entry->_read_rc              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [index], entry->_num_reg_rc           );
+	  PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [index], entry->_write_rd             );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [index], entry->_num_reg_rd           );
+	  PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [index], entry->_write_re             );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [index], entry->_num_reg_re           );
 
-                internal_ISSUE_OUT_FROM_REEXECUTE [i] = true;
-//              internal_ISSUE_OUT_NUM_BANK       [i] = num_reexecute_entry;
-                internal_ISSUE_OUT_ENTRY          [i] = entry;
+          internal_ISSUE_OUT_FROM_REEXECUTE [index] = true;
+//        internal_ISSUE_OUT_NUM_BANK       [index] = num_reexecute_entry;
+          internal_ISSUE_OUT_ENTRY          [index] = entry;
 
-                break; // stop scan
-              }
-//           num_reexecute_entry ++;
+          index ++; // next slot
         }
+      
+      //--------------------------------------
+      // From Issue_queue
+      //--------------------------------------
+      index = _param->_nb_inst_reexecute;
 
-      // From Issue_queue
+      log_printf(TRACE,Issue_queue,FUNCTION,"  * From Issue_queue");
+
+      // for all instruction in issue_queue head ...
       for (uint32_t i=0; i<_param->_nb_bank; ++i)
         {
@@ -89,75 +93,80 @@
           log_printf(TRACE,Issue_queue,FUNCTION,"    * Bank [%d]",num_bank);
           
-          bool find = false;
+//           bool find = false;
           
-          // Have instruction ?
+          // ... test if have an instruction
           if (not _issue_queue [num_bank].empty())
             {
  	      log_printf(TRACE,Issue_queue,FUNCTION,"      * Not Empty !!!");
 
+              // read instruction
               entry_t* entry = _issue_queue [num_bank].front();
               
-	      // have valid instruction, search a valid issue slot.
-              for (uint32_t j=0; j<_param->_nb_inst_issue; j++)
-                {
-		  Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [j]);
+//               Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [index]);
+              
+              log_printf(TRACE,Issue_queue,FUNCTION,"      * Issue [%d]",index);
+//               log_printf(TRACE,Issue_queue,FUNCTION,"        * issue_ack            : %d",issue_ack);
+//            log_printf(TRACE,Issue_queue,FUNCTION,"        * previous transaction : %d",val[index]);
+//            log_printf(TRACE,Issue_queue,FUNCTION,"        * can issue type       : %d",_param->_table_issue_type [index][entry->_type]);
 
-                  log_printf(TRACE,Issue_queue,FUNCTION,"      * Issue [%d]",j);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * issue_ack            : %d",issue_ack);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * previous transaction : %d",val[j]);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * can issue type       : %d",_param->_table_issue_type [j][entry->_type]);
+              // in_order : test if find a valid read_unit
+//               if (issue_ack)
+//                 {
+// 	          log_printf(TRACE,Issue_queue,FUNCTION,"        * find !!!");
+                  
+//                   find = true;
+//                 }
 
-                  // test if no previous transaction and can accept this type
-                  if (not val[j] and 
-                      _param->_table_issue_type [j][entry->_type] and
-                      issue_ack)
-                    {
-		      log_printf(TRACE,Issue_queue,FUNCTION,"        * find !!!");
-                      
-                      // find a issue port
-                      val [j] = 1;
-                      
-                      if (_param->_have_port_context_id)
-	              PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [j], entry->_context_id           );
-	              if (_param->_have_port_front_end_id)
-	              PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [j], entry->_front_end_id         );
-	              if (_param->_have_port_rob_ptr  )
-	              PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [j], entry->_packet_id            );
-	              PORT_WRITE(out_ISSUE_OUT_OPERATION             [j], entry->_operation            );
-	              PORT_WRITE(out_ISSUE_OUT_TYPE                  [j], entry->_type                 );
-	              PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [j], entry->_store_queue_ptr_write);
-	              if (_param->_have_port_load_queue_ptr)
-	              PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [j], entry->_load_queue_ptr_write );
-	              PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [j], entry->_has_immediat         );
-	              PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [j], entry->_immediat             );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RA               [j], entry->_read_ra              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [j], entry->_num_reg_ra           );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RB               [j], entry->_read_rb              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [j], entry->_num_reg_rb           );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RC               [j], entry->_read_rc              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [j], entry->_num_reg_rc           );
-	              PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [j], entry->_write_rd             );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [j], entry->_num_reg_rd           );
-	              PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [j], entry->_write_re             );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [j], entry->_num_reg_re           );
-                      
-                      internal_ISSUE_OUT_FROM_REEXECUTE [j] = false;
-                      internal_ISSUE_OUT_NUM_BANK       [j] = num_bank;
-                      internal_ISSUE_OUT_ENTRY          [j] = entry;
-                      
-                      find = true;
-                      break; // find : stop scan
-                    }
-                }
+              // find a issue port
+              val [index] = true; // instruction is valid
+              
+              if (_param->_have_port_context_id)
+              PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [index], entry->_context_id           );
+              if (_param->_have_port_front_end_id)
+              PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [index], entry->_front_end_id         );
+              if (_param->_have_port_rob_ptr  )
+              PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [index], entry->_packet_id            );
+              PORT_WRITE(out_ISSUE_OUT_OPERATION             [index], entry->_operation            );
+              PORT_WRITE(out_ISSUE_OUT_TYPE                  [index], entry->_type                 );
+              PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write);
+              if (_param->_have_port_load_queue_ptr)
+              PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [index], entry->_load_queue_ptr_write );
+              PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [index], entry->_has_immediat         );
+              PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [index], entry->_immediat             );
+              PORT_WRITE(out_ISSUE_OUT_READ_RA               [index], entry->_read_ra              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [index], entry->_num_reg_ra           );
+              PORT_WRITE(out_ISSUE_OUT_READ_RB               [index], entry->_read_rb              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [index], entry->_num_reg_rb           );
+              PORT_WRITE(out_ISSUE_OUT_READ_RC               [index], entry->_read_rc              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [index], entry->_num_reg_rc           );
+              PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [index], entry->_write_rd             );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [index], entry->_num_reg_rd           );
+              PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [index], entry->_write_re             );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [index], entry->_num_reg_re           );
+              
+              internal_ISSUE_OUT_FROM_REEXECUTE [index] = false;
+              internal_ISSUE_OUT_NUM_BANK       [index] = num_bank;
+              internal_ISSUE_OUT_ENTRY          [index] = entry;
+
+              index ++; // next slot
             }
 
-          if (not find)
-            break; // stop scan (in order)
+//           if (not find)
+//             {
+//  	      log_printf(TRACE,Issue_queue,FUNCTION,"      * Not find. Stop Scan (in order)");
+              
+//               break; // stop scan (in order)
+//             }
         }
-
+      
+      // Output
       for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
         {
           internal_ISSUE_OUT_VAL [i] = val [i];
           PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]);
+
+//           // Type invalid to the Core_Glue network
+//           if (not val [i]) // == empty
+//             PORT_WRITE(out_ISSUE_OUT_TYPE [i], TYPE_INVALID);
         }
     }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp	(revision 117)
@@ -109,5 +109,7 @@
           for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
             // test if no previous transaction and can accept this type
-            if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+            if ((val[i] == 0)
+//                 and _param->_table_issue_type [i][entry->_type]
+                )
               {
                 // find a issue port
@@ -168,5 +170,7 @@
               for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
                 // test if no previous transaction and can accept this type
-                if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+                if ((val[i] == 0)
+//                     and _param->_table_issue_type [i][entry->_type]
+                    )
                   {
                     // find a issue port
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 117)
@@ -106,4 +106,10 @@
     log_printf(TRACE,Issue_queue,FUNCTION,"  * Dump Issue_queue");
 
+    if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER)
+      {
+    log_printf(TRACE,Issue_queue,FUNCTION,"    * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD);
+    log_printf(TRACE,Issue_queue,FUNCTION,"    * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
+      }
+
     for (uint32_t i=0; i<_param->_nb_bank; i++)
       {
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 117)
@@ -32,5 +32,5 @@
 			  uint32_t              size_store_queue_ptr    ,
 			  uint32_t              size_load_queue_ptr     ,
-			  uint32_t              nb_inst_issue           ,
+// 			  uint32_t              nb_inst_issue           ,
 			  uint32_t            * nb_inst_rename          ,
 			  uint32_t              nb_inst_reexecute       ,
@@ -38,6 +38,6 @@
 			  Tpriority_t           priority                ,
 			  Tload_balancing_t     load_balancing          ,
-			  bool               ** table_routing           ,
-			  bool               ** table_issue_type        ,
+// 			  bool               ** table_routing           ,
+// 			  bool               ** table_issue_type        ,
                           bool                  is_toplevel             )
   {
@@ -50,5 +50,5 @@
     _queue_scheme             = queue_scheme         ;
     _nb_bank                  = nb_bank              ;   
-    _nb_inst_issue            = nb_inst_issue        ;
+//  _nb_inst_issue            = nb_inst_issue        ;
     _nb_inst_rename           = nb_inst_rename       ;
     _nb_inst_reexecute        = nb_inst_reexecute    ;
@@ -56,19 +56,21 @@
     _priority                 = priority             ;
     _load_balancing           = load_balancing       ;
-    _table_routing            = table_routing        ;
-    _table_issue_type         = table_issue_type     ;
+//  _table_routing            = table_routing        ;
+//  _table_issue_type         = table_issue_type     ;
     _size_reexecute_queue     = nb_inst_reexecute    ;
 
-    log_printf(TRACE,Issue_queue,FUNCTION,"  * table_routing [nb_rename_unit][nb_inst_issue]");
-    for (uint32_t i=0; i<_nb_rename_unit; ++i)
-      for (uint32_t j=0; j<_nb_inst_issue; ++j)
-        if (_table_routing [i][j])
-          log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
+    _nb_inst_issue            = _nb_inst_reexecute+_nb_bank;
+
+//     log_printf(TRACE,Issue_queue,FUNCTION,"  * table_routing [nb_rename_unit][nb_inst_issue]");
+//     for (uint32_t i=0; i<_nb_rename_unit; ++i)
+//       for (uint32_t j=0; j<_nb_inst_issue; ++j)
+//         if (_table_routing [i][j])
+//           log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
         
-    log_printf(TRACE,Issue_queue,FUNCTION,"  * table_issue_type [nb_inst_issue][nb_type]");
-    for (uint32_t i=0; i<_nb_inst_issue; ++i)
-      for (uint32_t j=0; j<_nb_type; ++j)
-        if (_table_issue_type [i][j])
-          log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
+//     log_printf(TRACE,Issue_queue,FUNCTION,"  * table_issue_type [nb_inst_issue][nb_type]");
+//     for (uint32_t i=0; i<_nb_inst_issue; ++i)
+//       for (uint32_t j=0; j<_nb_type; ++j)
+//         if (_table_issue_type [i][j])
+//           log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
     
     _max_nb_inst_rename       = max<uint32_t>(_nb_inst_rename,_nb_rename_unit);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 117)
@@ -48,6 +48,6 @@
       test.error(toString(_("nb_bank (%d) must be a multiple of size_queue (%d).\n"),_nb_bank,_size_queue));
     
-    if (not is_multiple(_nb_bank, _nb_inst_issue))
-      test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));
+//     if (not is_multiple(_nb_bank, _nb_inst_issue))
+//       test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));
 
     if (_nb_rename_unit_select > _nb_rename_unit)
@@ -57,28 +57,28 @@
       test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n"));
 
-    for (uint32_t i=0; i<_nb_rename_unit; i++)
-      {
-	bool type_present [_nb_type];
+//     for (uint32_t i=0; i<_nb_rename_unit; i++)
+//       {
+// 	bool type_present [_nb_type];
 	
-	for (uint32_t j=0; j<_nb_type; j++)
-	  type_present [j] = not is_type_valid(j);
+// 	for (uint32_t j=0; j<_nb_type; j++)
+// 	  type_present [j] = not is_type_valid(j);
 
-	bool find = false;
-	for (uint32_t j=0; j<_nb_inst_issue; j++)
-	  if (_table_routing [i][j])
-	  {
-	    find = true;
+// 	bool find = false;
+// 	for (uint32_t j=0; j<_nb_inst_issue; j++)
+// 	  if (_table_routing [i][j])
+// 	  {
+// 	    find = true;
 
-	    for (uint32_t k=0; k<_nb_type; k++)
-	      type_present [k] |= _table_issue_type [j][k];
-	  }
+// 	    for (uint32_t k=0; k<_nb_type; k++)
+// 	      type_present [k] |= _table_issue_type [j][k];
+// 	  }
 
-	if (not find)
-	  test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));
-	else
-	  for (uint32_t j=0; j<_nb_type; j++)
-	    if (not type_present [j] and not is_type_optionnal(j))
-	      test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str()));
-      }
+// 	if (not find)
+// 	  test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));
+// 	else
+// 	  for (uint32_t j=0; j<_nb_type; j++)
+// 	    if (not type_present [j] and not is_type_optionnal(j))
+// 	      test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str()));
+//       }
     
     if ((_priority != PRIORITY_ROUND_ROBIN))
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 117)
@@ -153,6 +153,6 @@
   ALLOC1_SC_SIGNAL( in_COMMIT_ACK                           ," in_COMMIT_ACK                         ",Tcontrol_t         ,_param->_nb_inst_commit);
   ALLOC1_SC_SIGNAL(out_COMMIT_WEN                           ,"out_COMMIT_WEN                         ",Tcontrol_t         ,_param->_nb_inst_commit);
-  ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,"out_COMMIT_CONTEXT_ID                  ",Tcontext_t         ,_param->_nb_inst_commit);
-  ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,"out_COMMIT_FRONT_END_ID                ",Tcontext_t         ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,"out_COMMIT_CONTEXT_ID                  ",Tcontext_t         ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,"out_COMMIT_FRONT_END_ID                ",Tcontext_t         ,_param->_nb_inst_commit);
   ALLOC1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,"out_COMMIT_PACKET_ID                   ",Tpacket_t          ,_param->_nb_inst_commit);
 //ALLOC1_SC_SIGNAL(out_COMMIT_OPERATION                     ,"out_COMMIT_OPERATION                   ",Toperation_t       ,_param->_nb_inst_commit);
@@ -234,8 +234,8 @@
   INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_COMMIT_ACK                           ,_param->_nb_inst_commit);
   INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_WEN                           ,_param->_nb_inst_commit);
-  if (_param->_have_port_context_id)
-  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
-  if (_param->_have_port_front_end_id)
-  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+//if (_param->_have_port_context_id)
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+//if (_param->_have_port_front_end_id)
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
   if (_param->_have_port_rob_ptr  )
   INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
@@ -415,8 +415,8 @@
 
 		  TEST(Tcontrol_t     ,out_COMMIT_WEN          [i]->read(),request[packet].commit_wen  );
-		  if (_param->_have_port_context_id)
-		  TEST(Tcontext_t     ,out_COMMIT_CONTEXT_ID   [i]->read(),request[packet].context_id  );
-		  if (_param->_have_port_front_end_id)
-		  TEST(Tcontext_t     ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);
+// 		  if (_param->_have_port_context_id)
+// 		  TEST(Tcontext_t     ,out_COMMIT_CONTEXT_ID   [i]->read(),request[packet].context_id  );
+// 		  if (_param->_have_port_front_end_id)
+// 		  TEST(Tcontext_t     ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);
 // 		  TEST(Toperation_t   ,out_COMMIT_OPERATION    [i]->read(),request[packet].operation   );
 // 		  TEST(Ttype_t        ,out_COMMIT_TYPE         [i]->read(),request[packet].type        );
@@ -529,6 +529,6 @@
   DELETE1_SC_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit);
   DELETE1_SC_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit);
-  DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
-  DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
   DELETE1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
 //DELETE1_SC_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 117)
@@ -87,6 +87,6 @@
   public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_ACK                           ;//[nb_inst_commit]
   public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_WEN                           ;//[nb_inst_commit]
-  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_CONTEXT_ID                    ;//[nb_inst_commit]
-  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_FRONT_END_ID                  ;//[nb_inst_commit]
+//public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_CONTEXT_ID                    ;//[nb_inst_commit]
+//public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_FRONT_END_ID                  ;//[nb_inst_commit]
   public    : SC_OUT(Tpacket_t          )  ** out_COMMIT_PACKET_ID                     ;//[nb_inst_commit]
 //public    : SC_OUT(Toperation_t       )  ** out_COMMIT_OPERATION                     ;//[nb_inst_commit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 117)
@@ -83,6 +83,6 @@
       ALLOC1_VALACK_IN ( in_COMMIT_ACK                           ,ACK);
       ALLOC1_SIGNAL_OUT(out_COMMIT_WEN                           ,"wen"         ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID                    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
-      ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID                  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID                    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID                  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
       ALLOC1_SIGNAL_OUT(out_COMMIT_PACKET_ID                     ,"packet_id"   ,Tpacket_t          ,_param->_size_rob_ptr     );
 //    ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION                     ,"operation"   ,Toperation_t       ,_param->_size_operation   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 117)
@@ -44,6 +44,6 @@
         DELETE1_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit,1);
         DELETE1_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit,1);
-        DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit,_param->_size_context_id  );
-        DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit,_param->_size_front_end_id);
+//      DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit,_param->_size_context_id  );
+//      DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit,_param->_size_front_end_id);
         DELETE1_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit,_param->_size_rob_ptr     );
 //      DELETE1_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit,_param->_size_operation   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 117)
@@ -101,8 +101,8 @@
 		if (commit_val)
 		  {
-		    if (_param->_have_port_context_id)
-		    PORT_WRITE(out_COMMIT_CONTEXT_ID   [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]));
-		    if (_param->_have_port_front_end_id)
-		    PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));
+// 		    if (_param->_have_port_context_id)
+// 		    PORT_WRITE(out_COMMIT_CONTEXT_ID   [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]));
+// 		    if (_param->_have_port_front_end_id)
+// 		    PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));
 		    if (_param->_have_port_rob_ptr  )
 		    PORT_WRITE(out_COMMIT_PACKET_ID    [i], PORT_READ(in_EXECUTE_LOOP_PACKET_ID    [x][y]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 117)
@@ -77,4 +77,23 @@
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
+  sc_signal<Tcontrol_t  > **  in_INSERT_VAL                  ;
+  sc_signal<Tcontrol_t  > ** out_INSERT_ACK                  ;
+  sc_signal<Tcontext_t  > **  in_INSERT_FRONT_END_ID         ;
+  sc_signal<Tcontext_t  > **  in_INSERT_CONTEXT_ID           ;
+  sc_signal<Ttype_t     > **  in_INSERT_TYPE                 ;
+  sc_signal<Toperation_t> **  in_INSERT_OPERATION            ;
+  sc_signal<Tlsq_ptr_t  > ** out_INSERT_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t  > ** out_INSERT_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_VAL                  ;
+  sc_signal<Tcontrol_t  > ** out_RETIRE_ACK                  ;
+  sc_signal<Tcontext_t  > **  in_RETIRE_FRONT_END_ID         ;
+  sc_signal<Tcontext_t  > **  in_RETIRE_CONTEXT_ID           ;
+//sc_signal<Ttype_t     > **  in_RETIRE_TYPE                 ;
+//sc_signal<Toperation_t> **  in_RETIRE_OPERATION            ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_USE_STORE_QUEUE      ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_USE_LOAD_QUEUE       ;
+  sc_signal<Tlsq_ptr_t  > **  in_RETIRE_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t  > **  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;
+
   ALLOC1_SC_SIGNAL( in_INSERT_VAL                  ," in_INSERT_VAL                  ",Tcontrol_t  ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_ACK                  ,"out_INSERT_ACK                  ",Tcontrol_t  ,_param->_nb_inst_insert);
@@ -89,6 +108,6 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID         ," in_RETIRE_FRONT_END_ID         ",Tcontext_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID           ," in_RETIRE_CONTEXT_ID           ",Tcontext_t  ,_param->_nb_inst_retire);
-//   ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
-//   ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ," in_RETIRE_USE_STORE_QUEUE      ",Tcontrol_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ," in_RETIRE_USE_LOAD_QUEUE       ",Tcontrol_t  ,_param->_nb_inst_retire);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 117)
@@ -79,13 +79,15 @@
   ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
 
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,"out_INSERT_STAT_LIST_READ_RA                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,"out_INSERT_STAT_LIST_READ_RB                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,"out_INSERT_STAT_LIST_READ_RC                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ",Tspecial_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,"out_INSERT_STAT_LIST_READ_RA                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,"out_INSERT_STAT_LIST_READ_RB                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,"out_INSERT_STAT_LIST_READ_RC                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,"out_INSERT_STAT_LIST_WRITE_RD                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,"out_INSERT_STAT_LIST_WRITE_RE                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ",Tspecial_address_t,_param->_nb_inst_insert);
 
@@ -157,13 +159,15 @@
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
 
@@ -331,13 +335,15 @@
   DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 117)
@@ -108,6 +108,8 @@
   public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RD                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ;//[nb_inst_insert]
   public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RE                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ;//[nb_inst_insert]
   public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ;//[nb_inst_insert]
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 117)
@@ -97,6 +97,8 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"STAT_LIST_NUM_REG_RC_PHY"              ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RD                    ,"STAT_LIST_WRITE_RD"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,"STAT_LIST_NUM_REG_RD_PHY_OLD"          ,Tgeneral_address_t,_param->_size_general_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"STAT_LIST_NUM_REG_RD_PHY_NEW"          ,Tgeneral_address_t,_param->_size_general_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RE                    ,"STAT_LIST_WRITE_RE"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,"STAT_LIST_NUM_REG_RE_PHY_OLD"          ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"STAT_LIST_NUM_REG_RE_PHY_NEW"          ,Tspecial_address_t,_param->_size_special_register      );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 117)
@@ -59,13 +59,15 @@
 	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register      );
 	
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert,_param->_size_special_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert,_param->_size_special_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert,_param->_size_general_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_general_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert,_param->_size_special_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_special_register      );
 	
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 117)
@@ -49,13 +49,15 @@
 	PORT_WRITE(out_INSERT_FREE_LIST_SPR_VAL            [i], WRITE_RE          );
 
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RA            [i], READ_RA           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY     [i], NUM_REG_RA_PHY    );
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RB            [i], READ_RB           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY     [i], NUM_REG_RB_PHY    );
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RC            [i], READ_RC           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY     [i], NUM_REG_RC_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RA            [i], READ_RA           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY     [i], NUM_REG_RA_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RB            [i], READ_RB           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY     [i], NUM_REG_RB_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RC            [i], READ_RC           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY     [i], NUM_REG_RC_PHY    );
 	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD           [i], WRITE_RD          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD [i], NUM_REG_RD_PHY_OLD);
 	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW);
 	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE           [i], WRITE_RE          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD [i], NUM_REG_RE_PHY_OLD);
 	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW);
 	
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 117)
@@ -63,23 +63,25 @@
   sc_signal<Tcontrol_t        >   **  in_INSERT_VAL               ;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   ** out_INSERT_ACK               ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RA           ;//[nb_inst_insert]
-  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RA_PHY    ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RB           ;//[nb_inst_insert]
-  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RB_PHY    ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RC           ;//[nb_inst_insert]
-  sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RA           ;//[nb_inst_insert]
+//sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RA_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RB           ;//[nb_inst_insert]
+//sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RB_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RC           ;//[nb_inst_insert]
+//sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_INSERT_WRITE_RD          ;//[nb_inst_insert]
+  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert]
   sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_INSERT_WRITE_RE          ;//[nb_inst_insert]
+  sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert]
   sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_VAL               ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   ** out_RETIRE_ACK               ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_RESTORE           ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RA           ;//[nb_inst_retire]
-  sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RA_PHY    ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RB           ;//[nb_inst_retire]
-  sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RB_PHY    ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RC           ;//[nb_inst_retire]
-  sc_signal<Tspecial_address_t>   **  in_RETIRE_NUM_REG_RC_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RA           ;//[nb_inst_retire]
+//sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RA_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RB           ;//[nb_inst_retire]
+//sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RB_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RC           ;//[nb_inst_retire]
+//sc_signal<Tspecial_address_t>   **  in_RETIRE_NUM_REG_RC_PHY    ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_WRITE_RD          ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
@@ -99,23 +101,25 @@
   ALLOC1_SC_SIGNAL( in_INSERT_VAL               ," in_INSERT_VAL               ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_ACK               ,"out_INSERT_ACK               ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RA           ," in_INSERT_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY    ," in_INSERT_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RB           ," in_INSERT_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY    ," in_INSERT_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RC           ," in_INSERT_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ," in_INSERT_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RA           ," in_INSERT_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY    ," in_INSERT_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RB           ," in_INSERT_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY    ," in_INSERT_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RC           ," in_INSERT_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ," in_INSERT_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD          ," in_INSERT_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD," in_INSERT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE          ," in_INSERT_WRITE_RE          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD," in_INSERT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_RETIRE_VAL               ," in_RETIRE_VAL               ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL(out_RETIRE_ACK               ,"out_RETIRE_ACK               ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE           ," in_RETIRE_RESTORE           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA           ," in_RETIRE_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ," in_RETIRE_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB           ," in_RETIRE_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ," in_RETIRE_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC           ," in_RETIRE_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ," in_RETIRE_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA           ," in_RETIRE_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ," in_RETIRE_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB           ," in_RETIRE_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ," in_RETIRE_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC           ," in_RETIRE_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ," in_RETIRE_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD          ," in_RETIRE_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
@@ -145,13 +149,15 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL               ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK               ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
@@ -159,10 +165,10 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK               ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
@@ -348,10 +354,10 @@
 
 	      in_INSERT_VAL                [i]->write((rand()%100) < percent_transaction_insert);
-	      in_INSERT_READ_RA            [i]->write(read_ra );
-	      in_INSERT_NUM_REG_RA_PHY     [i]->write(ra);
-	      in_INSERT_READ_RB            [i]->write(read_rb );
-	      in_INSERT_NUM_REG_RB_PHY     [i]->write(rb);
-	      in_INSERT_READ_RC            [i]->write(read_rc );
-	      in_INSERT_NUM_REG_RC_PHY     [i]->write(rc);
+// 	      in_INSERT_READ_RA            [i]->write(read_ra );
+// 	      in_INSERT_NUM_REG_RA_PHY     [i]->write(ra);
+// 	      in_INSERT_READ_RB            [i]->write(read_rb );
+// 	      in_INSERT_NUM_REG_RB_PHY     [i]->write(rb);
+// 	      in_INSERT_READ_RC            [i]->write(read_rc );
+// 	      in_INSERT_NUM_REG_RC_PHY     [i]->write(rc);
 	      in_INSERT_WRITE_RD           [i]->write(write_rd);
 	      in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd);
@@ -394,11 +400,11 @@
 
 	      in_RETIRE_VAL                [i]->write((rand()%100) < percent_transaction_retire);
-	      in_RETIRE_READ_RA            [i]->write(read_ra );
-	      in_RETIRE_RESTORE            [i]->write(0);
- 	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
-	      in_RETIRE_READ_RB            [i]->write(read_rb );
-	      in_RETIRE_NUM_REG_RB_PHY     [i]->write(rb);
-	      in_RETIRE_READ_RC            [i]->write(read_rc );
-	      in_RETIRE_NUM_REG_RC_PHY     [i]->write(rc);
+// 	      in_RETIRE_READ_RA            [i]->write(read_ra );
+// 	      in_RETIRE_RESTORE            [i]->write(0);
+//  	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
+// 	      in_RETIRE_READ_RB            [i]->write(read_rb );
+// 	      in_RETIRE_NUM_REG_RB_PHY     [i]->write(rb);
+// 	      in_RETIRE_READ_RC            [i]->write(read_rc );
+// 	      in_RETIRE_NUM_REG_RC_PHY     [i]->write(rc);
 	      in_RETIRE_WRITE_RD           [i]->write(write_rd);
 	      in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0);
@@ -454,32 +460,32 @@
 	      if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read())
 		{
-		  Tcontrol_t         read_ra  = in_INSERT_READ_RA            [i]->read();
-		  Tgeneral_address_t ra       = in_INSERT_NUM_REG_RA_PHY     [i]->read();
-		  Tcontrol_t         read_rb  = in_INSERT_READ_RB            [i]->read();
-		  Tgeneral_address_t rb       = in_INSERT_NUM_REG_RB_PHY     [i]->read();
-		  Tcontrol_t         read_rc  = in_INSERT_READ_RC            [i]->read();
-		  Tspecial_address_t rc       = in_INSERT_NUM_REG_RC_PHY     [i]->read();
+// 		  Tcontrol_t         read_ra  = in_INSERT_READ_RA            [i]->read();
+// 		  Tgeneral_address_t ra       = in_INSERT_NUM_REG_RA_PHY     [i]->read();
+// 		  Tcontrol_t         read_rb  = in_INSERT_READ_RB            [i]->read();
+// 		  Tgeneral_address_t rb       = in_INSERT_NUM_REG_RB_PHY     [i]->read();
+// 		  Tcontrol_t         read_rc  = in_INSERT_READ_RC            [i]->read();
+// 		  Tspecial_address_t rc       = in_INSERT_NUM_REG_RC_PHY     [i]->read();
 		  Tgeneral_address_t rd_new   = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read();
 		  Tspecial_address_t re_new   = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read();		
 		  
 		  LABEL("INSERT [%d] - Accepted",i);
-		  LABEL(" * read_ra          : %d",read_ra );
-		  LABEL(" * reg_ra           : %d",ra      );
-		  LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
-		  LABEL(" * read_rb          : %d",read_rb );
-		  LABEL(" * reg_rb           : %d",rb      );
-		  LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
-		  LABEL(" * read_rc          : %d",read_rc );
-		  LABEL(" * reg_rc           : %d",rc      );
-		  LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
+// 		  LABEL(" * read_ra          : %d",read_ra );
+// 		  LABEL(" * reg_ra           : %d",ra      );
+// 		  LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
+// 		  LABEL(" * read_rb          : %d",read_rb );
+// 		  LABEL(" * reg_rb           : %d",rb      );
+// 		  LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
+// 		  LABEL(" * read_rc          : %d",read_rc );
+// 		  LABEL(" * reg_rc           : %d",rc      );
+// 		  LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
 		  LABEL(" * read_rd          : %d",write_rd);
 		  LABEL(" * reg_rd_new       : %d",rd_new  );
@@ -495,16 +501,16 @@
 		  LABEL("   * status[%d]._counter  : %d",re_new,spr_status[re_new]._counter );
 		  
-		  if (read_ra)
-		    {
-		      gpr_status[ra]._counter ++;
-		    }
-		  if (read_rb)
-		    {
-		      gpr_status[rb]._counter ++;
-		    }
-		  if (read_rc)
-		    {
-		      spr_status[rc]._counter ++;
-		    }
+// 		  if (read_ra)
+// 		    {
+// 		      gpr_status[ra]._counter ++;
+// 		    }
+// 		  if (read_rb)
+// 		    {
+// 		      gpr_status[rb]._counter ++;
+// 		    }
+// 		  if (read_rc)
+// 		    {
+// 		      spr_status[rc]._counter ++;
+// 		    }
 		  if (write_rd)
 		    {
@@ -544,10 +550,10 @@
 	      {
 		Tcontrol_t         restore        = in_RETIRE_RESTORE            [i]->read();
-		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
-		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
-		Tcontrol_t         read_rb        = in_RETIRE_READ_RB            [i]->read();
-		Tgeneral_address_t rb             = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
-		Tcontrol_t         read_rc        = in_RETIRE_READ_RC            [i]->read();
-		Tspecial_address_t rc             = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
+// 		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
+// 		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
+// 		Tcontrol_t         read_rb        = in_RETIRE_READ_RB            [i]->read();
+// 		Tgeneral_address_t rb             = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
+// 		Tcontrol_t         read_rc        = in_RETIRE_READ_RC            [i]->read();
+// 		Tspecial_address_t rc             = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
 		Tcontrol_t         write_rd       = in_RETIRE_WRITE_RD           [i]->read();
 		Tcontrol_t         restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read();
@@ -561,22 +567,22 @@
 		LABEL("RETIRE [%d] - Accepted",i);
 		LABEL(" * restore          : %d",restore);
-		LABEL(" * read_ra          : %d",read_ra );
-		LABEL(" * reg_ra           : %d",ra      );
-		LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
-		LABEL(" * read_rb          : %d",read_rb );
-		LABEL(" * reg_rb           : %d",rb      );
-		LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
-		LABEL(" * read_rc          : %d",read_rc );
-		LABEL(" * reg_rc           : %d",rc      );
-		LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
+// 		LABEL(" * read_ra          : %d",read_ra );
+// 		LABEL(" * reg_ra           : %d",ra      );
+// 		LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
+// 		LABEL(" * read_rb          : %d",read_rb );
+// 		LABEL(" * reg_rb           : %d",rb      );
+// 		LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
+// 		LABEL(" * read_rc          : %d",read_rc );
+// 		LABEL(" * reg_rc           : %d",rc      );
+// 		LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
 		LABEL(" * read_rd          : %d",write_rd);
 		LABEL(" * restore_rd_old   : %d",restore_rd_old);
@@ -604,16 +610,16 @@
 		LABEL("   * status[%d]._counter  : %d",re_new,spr_status[re_new]._counter );
 
-		if (read_ra)
-		  {
-		    gpr_status[ra]._counter --;
-		  }
-		if (read_rb)
-		  {
-		    gpr_status[rb]._counter --;
-		  }
-		if (read_rc)
-		  {
-		    spr_status[rc]._counter --;
-		  }
+// 		if (read_ra)
+// 		  {
+// 		    gpr_status[ra]._counter --;
+// 		  }
+// 		if (read_rb)
+// 		  {
+// 		    gpr_status[rb]._counter --;
+// 		  }
+// 		if (read_rc)
+// 		  {
+// 		    spr_status[rc]._counter --;
+// 		  }
 		if (write_rd)
 		  {
@@ -721,23 +727,25 @@
   delete []  in_INSERT_VAL               ;
   delete [] out_INSERT_ACK               ;
-  delete []  in_INSERT_READ_RA           ;
-  delete []  in_INSERT_NUM_REG_RA_PHY    ;
-  delete []  in_INSERT_READ_RB           ;
-  delete []  in_INSERT_NUM_REG_RB_PHY    ;
-  delete []  in_INSERT_READ_RC           ;
-  delete []  in_INSERT_NUM_REG_RC_PHY    ;
+//delete []  in_INSERT_READ_RA           ;
+//delete []  in_INSERT_NUM_REG_RA_PHY    ;
+//delete []  in_INSERT_READ_RB           ;
+//delete []  in_INSERT_NUM_REG_RB_PHY    ;
+//delete []  in_INSERT_READ_RC           ;
+//delete []  in_INSERT_NUM_REG_RC_PHY    ;
   delete []  in_INSERT_WRITE_RD          ;
+  delete []  in_INSERT_NUM_REG_RD_PHY_OLD;
   delete []  in_INSERT_NUM_REG_RD_PHY_NEW;
   delete []  in_INSERT_WRITE_RE          ;
+  delete []  in_INSERT_NUM_REG_RE_PHY_OLD;
   delete []  in_INSERT_NUM_REG_RE_PHY_NEW;
   delete []  in_RETIRE_VAL               ;
   delete [] out_RETIRE_ACK               ;
   delete []  in_RETIRE_RESTORE           ;
-  delete []  in_RETIRE_READ_RA           ;
-  delete []  in_RETIRE_NUM_REG_RA_PHY    ;
-  delete []  in_RETIRE_READ_RB           ;
-  delete []  in_RETIRE_NUM_REG_RB_PHY    ;
-  delete []  in_RETIRE_READ_RC           ;
-  delete []  in_RETIRE_NUM_REG_RC_PHY    ;
+//delete []  in_RETIRE_READ_RA           ;
+//delete []  in_RETIRE_NUM_REG_RA_PHY    ;
+//delete []  in_RETIRE_READ_RB           ;
+//delete []  in_RETIRE_NUM_REG_RB_PHY    ;
+//delete []  in_RETIRE_READ_RC           ;
+//delete []  in_RETIRE_NUM_REG_RC_PHY    ;
   delete []  in_RETIRE_WRITE_RD          ;
   delete []  in_RETIRE_RESTORE_RD_PHY_OLD;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 117)
@@ -72,8 +72,10 @@
   public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
   public    : SC_IN (Tcontrol_t        )   **  in_INSERT_WRITE_RD          ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert]
   public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert]
   public    : SC_IN (Tcontrol_t        )   **  in_INSERT_WRITE_RE          ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert]
   public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
-
+  
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_VAL               ;//[nb_inst_retire]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 117)
@@ -23,8 +23,9 @@
   class stat_list_entry_t
   {
-  public : bool     _is_free ; // set = is present in free list
-  public : bool     _is_link ; // set = is present in rat
-//public : bool     _is_valid; // set = an instruction have write in this register
-//public : uint32_t _counter ; // number of register that must read this register
+  public : bool     _is_free      ; // set = is present in free list
+  public : bool     _is_link      ; // set = is present in rat
+  public : bool     _is_use       ; // set = is present in ROB (used by an instruction as destination)
+                                    // not necesseray in single thread mode : because an thread can't rename when they have an event
+                                    // in multi thread, the renaming continue and an old register can be reused
 
   public :  stat_list_entry_t (void) {};
@@ -35,24 +36,19 @@
       _is_free  = 0;
       _is_link  = is_link;
-//    _is_valid = 1;
-//    _counter  = 0;
+      _is_use   = is_link;
     }
 
-//   public : void insert_read (void)
-//     {
-//    _counter ++;
-//     }
+  public : void insert_write_old (void)
+    {
+      // old is not in the rat, but is already used (if miss prediction or event)
+      _is_link  = 0;
+    }
 
-  public : void insert_write (void)
+  public : void insert_write_new (void)
     {
       _is_free  = 0;
       _is_link  = 1;
-//    _is_valid = 0;
+      _is_use   = 1;
     }
-
-//   public : void retire_read (void)
-//     {
-//    _counter --;
-//     }
 
   public : void retire_write_old (bool restore, bool restore_old)
@@ -62,6 +58,16 @@
       // 1       0           0       - event and previous update
       // 1       1           1       - event and first update
-      
-      _is_link = restore and restore_old;
+   
+      if (restore and restore_old)
+        {
+          _is_link = 1;
+//        _is_use  = 1; // already set
+        }
+      else
+        {
+//        _is_link = 0; // already unset
+          _is_use  = 0;
+        }
+        
     }
 
@@ -73,8 +79,11 @@
 
       if (restore)
-        _is_link = 0;
+        {
+          // test if is the actual mapping (in RAT)
+          if (_is_link)
+            _is_use = 0;
 
-      // in all case
-//    _is_valid = 1;
+          _is_link = 0;
+        }
     }
 
@@ -84,16 +93,9 @@
     }
 
-//   public : bool can_insert_read (uint32_t max_reader)
-//     {
-//    return ((_counter+1) < max_reader);
-//     }
-
   public : bool can_free (void)
     {
       return ((_is_free  == 0) and
-	      (_is_link  == 0) // and
-//  	      (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset
-// 	      (_counter  == 0)
-              );
+	      (_is_link  == 0) and
+              (_is_use   == 0));
     }
 
@@ -102,8 +104,6 @@
     {
       output << x._is_free  << " "
-             << x._is_link  // << " "
-//           << x._is_valid  << " "
-//              << x._counter
-        ;
+             << x._is_link  << " "
+             << x._is_use ;
       
       return output;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 117)
@@ -69,15 +69,17 @@
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY    ,"num_reg_rc_phy"    ,Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RD          ,"write_rd"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE          ,"write_re"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register);
-
+  
        ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
      }
-
+  
      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
        ALLOC1_INTERFACE_BEGIN("retire",IN,NORTH,_("Retire a renaming result"),_param->_nb_inst_retire);
-
+  
        ALLOC1_VALACK_IN ( in_RETIRE_VAL               ,VAL);
        ALLOC1_VALACK_OUT(out_RETIRE_ACK               ,ACK);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 117)
@@ -39,8 +39,10 @@
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register);
         DELETE1_SIGNAL( in_INSERT_WRITE_RD          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register);
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register);
         DELETE1_SIGNAL( in_INSERT_WRITE_RE          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register);
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register);
-
+  
         DELETE1_SIGNAL( in_RETIRE_VAL               ,_param->_nb_inst_retire,1);
         DELETE1_SIGNAL(out_RETIRE_ACK               ,_param->_nb_inst_retire,1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 117)
@@ -86,23 +86,45 @@
 	      if (PORT_READ(in_INSERT_WRITE_RD [i]))
 		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg new : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].insert_write();
+                  {
+                    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_OLD [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg old : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_gpr;
+                    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+                    gpr_stat_list [bank][reg].insert_write_old();
+                  }
+                  {
+                    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg new : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_gpr;
+                    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+                    gpr_stat_list [bank][reg].insert_write_new();
+                  }
 		}
 
 	      if (PORT_READ(in_INSERT_WRITE_RE [i]))
 		{
-		  Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg new : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_spr;
-		  uint32_t reg  = num_reg  & _param->_mask_spr ;
-		  spr_stat_list [bank][reg].insert_write();
-		}
+                  {
+                    Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg old : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_spr;
+                    uint32_t reg  = num_reg  & _param->_mask_spr ;
+                    spr_stat_list [bank][reg].insert_write_old();
+                  }
+                  {
+                    Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg new : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_spr;
+                    uint32_t reg  = num_reg  & _param->_mask_spr ;
+                    spr_stat_list [bank][reg].insert_write_new();
+                  }
+                }
 	    }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 117)
@@ -638,8 +638,12 @@
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"          ,
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RD"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_OLD");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_NEW");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"          ,
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RE"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_OLD");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_NEW");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 117)
@@ -7,5 +7,4 @@
 1	1	+1	# nb_inst_insert                    [0]               [nb_rename_unit]
 1	1	+1	# nb_inst_retire                    [0]               [nb_rename_unit]
-1	1	+1	# nb_inst_issue                                       
 1	1	+1	# nb_inst_execute                   [0]               [nb_execute_loop]
 1	1	+1	# nb_inst_reexecute                                   
@@ -28,17 +27,4 @@
 1	1	+1	# issue_priority                           
 1	1	+1	# issue_load_balancing                     
-1	1	+1	# table_routing                     [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type                  [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
 1	1	+1	# size_reexecute_queue                     
 1	1	+1	# reexecute_priority                       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 117)
@@ -9,5 +9,5 @@
 #include "Behavioural/include/Allocation.h"
 
-#define NB_PARAMS 24
+#define NB_PARAMS 23
 
 void usage (int argc, char * argv[])
@@ -22,5 +22,5 @@
   err (_(" * nb_inst_insert                    [nb_rename_unit]                      (uint32_t             )\n"));
   err (_(" * nb_inst_retire                    [nb_rename_unit]                      (uint32_t             )\n"));
-  err (_(" * nb_inst_issue                                                           (uint32_t             )\n"));
+//err (_(" * nb_inst_issue                                                           (uint32_t             )\n"));
   err (_(" * nb_inst_execute                   [nb_execute_loop]                     (uint32_t             )\n"));
   err (_(" * nb_inst_reexecute                                                       (uint32_t             )\n"));
@@ -43,18 +43,18 @@
   err (_(" * issue_priority                                                          (Tpriority_t          )\n"));
   err (_(" * issue_load_balancing                                                    (Tload_balancing_t    )\n"));
-  err (_(" * table_routing                     [nb_rename_unit][nb_inst_issue]       (bool                 )\n"));
-  err (_(" * table_issue_type                  [nb_inst_issue][nb_type]              (bool                 )\n"));
-  err (_("   * TYPE_ALU    \n"));
-  err (_("   * TYPE_SHIFT  \n"));
-  err (_("   * TYPE_MOVE   \n"));
-  err (_("   * TYPE_TEST   \n"));
-  err (_("   * TYPE_MUL    \n"));
-  err (_("   * TYPE_DIV    \n"));
-  err (_("   * TYPE_EXTEND \n"));
-  err (_("   * TYPE_FIND   \n"));
-  err (_("   * TYPE_SPECIAL\n"));
-  err (_("   * TYPE_CUSTOM \n"));
-  err (_("   * TYPE_BRANCH \n"));
-  err (_("   * TYPE_MEMORY \n"));
+//   err (_(" * table_routing                     [nb_rename_unit][nb_inst_issue]       (bool                 )\n"));
+//   err (_(" * table_issue_type                  [nb_inst_issue][nb_type]              (bool                 )\n"));
+//   err (_("   * TYPE_ALU    \n"));
+//   err (_("   * TYPE_SHIFT  \n"));
+//   err (_("   * TYPE_MOVE   \n"));
+//   err (_("   * TYPE_TEST   \n"));
+//   err (_("   * TYPE_MUL    \n"));
+//   err (_("   * TYPE_DIV    \n"));
+//   err (_("   * TYPE_EXTEND \n"));
+//   err (_("   * TYPE_FIND   \n"));
+//   err (_("   * TYPE_SPECIAL\n"));
+//   err (_("   * TYPE_CUSTOM \n"));
+//   err (_("   * TYPE_BRANCH \n"));
+//   err (_("   * TYPE_MEMORY \n"));
   err (_(" * size_reexecute_queue                                                    (uint32_t         )\n"));
   err (_(" * reexecute_priority                                                      (Tpriority_t      )\n"));
@@ -120,5 +120,5 @@
     _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]);
 
-  uint32_t              _nb_inst_issue                     = fromString<uint32_t         >(argv[x++]);
+//uint32_t              _nb_inst_issue                     = fromString<uint32_t         >(argv[x++]);
   uint32_t            * _nb_inst_execute                   = new uint32_t [_nb_execute_loop];
   for (uint32_t i=0; i<_nb_execute_loop; i++)
@@ -152,35 +152,36 @@
   Tpriority_t           _issue_priority                    = fromString<Tpriority_t      >(argv[x++]);
   Tload_balancing_t     _issue_load_balancing              = fromString<Tload_balancing_t>(argv[x++]);
-  bool               ** _table_routing                     = new bool * [_nb_rename_unit];
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    {
-      _table_routing [i] = new bool [_nb_inst_issue];
-      for (uint32_t j=0; j<_nb_inst_issue; j++)
-        _table_routing [i][j] = fromString<bool>(argv[x++]);
-    }
-
-  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue))
+//   bool               ** _table_routing                     = new bool * [_nb_rename_unit];
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     {
+//       _table_routing [i] = new bool [_nb_inst_issue];
+//       for (uint32_t j=0; j<_nb_inst_issue; j++)
+//         _table_routing [i][j] = fromString<bool>(argv[x++]);
+//     }
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop//+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue
+                               ))
     usage (argc, argv);
   
-  bool               ** _table_issue_type                  = new bool * [_nb_inst_issue];
-  for (uint32_t i=0; i<_nb_inst_issue; i++)    
-    {
-      _table_issue_type [i] = new bool [MAX_TYPE];
-      for (uint32_t j=0; j<MAX_TYPE; j++)
-        _table_issue_type [i][j] = false;
-
-      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
-    }
+//   bool               ** _table_issue_type                  = new bool * [_nb_inst_issue];
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)    
+//     {
+//       _table_issue_type [i] = new bool [MAX_TYPE];
+//       for (uint32_t j=0; j<MAX_TYPE; j++)
+//         _table_issue_type [i][j] = false;
+
+//       _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+//     }
   
   uint32_t              _size_reexecute_queue              = fromString<uint32_t         >(argv[x++]);
@@ -220,5 +221,6 @@
     }
 
-  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue))
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+// _nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue
+                               3*_sum_nb_load_store_queue))
     usage (argc, argv);
 
@@ -294,5 +296,5 @@
          _nb_inst_insert                   ,
          _nb_inst_retire                   ,
-         _nb_inst_issue                    ,
+//       _nb_inst_issue                    ,
          _nb_inst_execute                  ,
          _nb_inst_reexecute                ,
@@ -315,6 +317,6 @@
          _issue_priority                   ,
          _issue_load_balancing             ,
-         _table_routing                    ,
-         _table_issue_type                 ,
+//          _table_routing                    ,
+//          _table_issue_type                 ,
          _size_reexecute_queue             ,
          _reexecute_priority               ,
@@ -400,11 +402,11 @@
   delete [] _rename_select_priority            ;
 
-  for (uint32_t i=0; i<_nb_inst_issue; i++)    
-    delete [] _table_issue_type [i];
-  delete [] _table_issue_type;  
-
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    delete [] _table_routing [i];
-  delete [] _table_routing;
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)    
+//     delete [] _table_issue_type [i];
+//   delete [] _table_issue_type;  
+
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     delete [] _table_routing [i];
+//   delete [] _table_routing;
 
   delete [] _link_rename_unit_with_front_end;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 117)
@@ -52,4 +52,131 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t        > ***  in_RENAME_VAL                       ;
+  sc_signal<Tcontrol_t        > *** out_RENAME_ACK                       ;
+  sc_signal<Tcontext_t        > ***  in_RENAME_FRONT_END_ID              ;
+  sc_signal<Tcontext_t        > ***  in_RENAME_CONTEXT_ID                ;
+  sc_signal<Tdepth_t          > ***  in_RENAME_DEPTH                     ;
+  sc_signal<Ttype_t           > ***  in_RENAME_TYPE                      ;
+  sc_signal<Toperation_t      > ***  in_RENAME_OPERATION                 ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_NO_EXECUTE                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_IS_DELAY_SLOT             ;
+  sc_signal<Taddress_t        > ***  in_RENAME_ADDRESS                   ;
+  sc_signal<Taddress_t        > ***  in_RENAME_ADDRESS_NEXT              ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_HAS_IMMEDIAT              ;
+  sc_signal<Tgeneral_data_t   > ***  in_RENAME_IMMEDIAT                  ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RA                   ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RA                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RB                   ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RB                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RC                   ;
+  sc_signal<Tspecial_address_t> ***  in_RENAME_NUM_REG_RC                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_WRITE_RD                  ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RD                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_WRITE_RE                  ;
+  sc_signal<Tspecial_address_t> ***  in_RENAME_NUM_REG_RE                ;
+  sc_signal<Texception_t      > ***  in_RENAME_EXCEPTION_USE             ;
+  sc_signal<Texception_t      > ***  in_RENAME_EXCEPTION                 ;
+
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_VAL                        ;
+  sc_signal<Tcontrol_t        >  **  in_ISSUE_ACK                        ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_FRONT_END_ID               ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_CONTEXT_ID                 ;
+  sc_signal<Tpacket_t         >  ** out_ISSUE_PACKET_ID                  ;
+  sc_signal<Ttype_t           >  ** out_ISSUE_TYPE                       ;
+  sc_signal<Toperation_t      >  ** out_ISSUE_OPERATION                  ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_STORE_QUEUE_PTR_WRITE      ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_LOAD_QUEUE_PTR_WRITE       ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_HAS_IMMEDIAT               ;
+  sc_signal<Tgeneral_data_t   >  ** out_ISSUE_IMMEDIAT                   ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RA                    ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RA                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RB                    ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RB                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RC                    ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_NUM_REG_RC                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_WRITE_RD                   ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RD                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_WRITE_RE                   ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_NUM_REG_RE                 ;
+
+  sc_signal<Tcontrol_t        > ***  in_EXECUTE_LOOP_VAL                 ;
+  sc_signal<Tcontrol_t        > *** out_EXECUTE_LOOP_ACK                 ;
+  sc_signal<Tcontext_t        > ***  in_EXECUTE_LOOP_FRONT_END_ID        ;
+  sc_signal<Tcontext_t        > ***  in_EXECUTE_LOOP_CONTEXT_ID          ;
+  sc_signal<Tpacket_t         > ***  in_EXECUTE_LOOP_PACKET_ID           ;
+//sc_signal<Ttype_t           > ***  in_EXECUTE_LOOP_TYPE                ;
+//sc_signal<Toperation_t      > ***  in_EXECUTE_LOOP_OPERATION           ;
+  sc_signal<Tspecial_data_t   > ***  in_EXECUTE_LOOP_FLAGS               ;
+  sc_signal<Texception_t      > ***  in_EXECUTE_LOOP_EXCEPTION           ;
+  sc_signal<Tcontrol_t        > ***  in_EXECUTE_LOOP_NO_SEQUENCE         ;
+  sc_signal<Taddress_t        > ***  in_EXECUTE_LOOP_ADDRESS             ;
+  sc_signal<Tgeneral_data_t   > ***  in_EXECUTE_LOOP_DATA                ;
+
+  sc_signal<Tcontrol_t        >  ** out_INSERT_VAL                       ;
+  sc_signal<Tcontrol_t        >  **  in_INSERT_ACK                       ;
+  sc_signal<Tcontrol_t        >  ** out_INSERT_RD_USE                    ;
+  sc_signal<Tgeneral_address_t>  ** out_INSERT_RD_NUM_REG                ;
+  sc_signal<Tcontrol_t        >  ** out_INSERT_RE_USE                    ;
+  sc_signal<Tspecial_address_t>  ** out_INSERT_RE_NUM_REG                ;
+
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_VAL                       ;
+//sc_signal<Tcontrol_t        >  **  in_RETIRE_ACK                       ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RD_OLD_USE                ;
+//sc_signal<Tgeneral_address_t>  ** out_RETIRE_RD_OLD_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RD_NEW_USE                ;
+//sc_signal<Tgeneral_address_t>  ** out_RETIRE_RD_NEW_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RE_OLD_USE                ;
+//sc_signal<Tspecial_address_t>  ** out_RETIRE_RE_OLD_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RE_NEW_USE                ;
+//sc_signal<Tspecial_address_t>  ** out_RETIRE_RE_NEW_NUM_REG            ;
+
+  sc_signal<Tcontrol_t        >  ** out_BRANCH_COMPLETE_VAL              ;
+  sc_signal<Tcontrol_t        >  **  in_BRANCH_COMPLETE_ACK              ;
+  sc_signal<Tcontext_t        >  ** out_BRANCH_COMPLETE_FRONT_END_ID     ;
+  sc_signal<Tcontext_t        >  ** out_BRANCH_COMPLETE_CONTEXT_ID       ;
+  sc_signal<Tdepth_t          >  ** out_BRANCH_COMPLETE_DEPTH            ;
+  sc_signal<Taddress_t        >  ** out_BRANCH_COMPLETE_ADDRESS          ;
+  sc_signal<Tcontrol_t        >  ** out_BRANCH_COMPLETE_NO_SEQUENCE      ;
+  sc_signal<Tcontrol_t        >  **  in_BRANCH_COMPLETE_MISS_PREDICTION  ;
+
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_VAL                 ;
+  sc_signal<Tcontrol_t        >   *  in_COMMIT_EVENT_ACK                 ;
+  sc_signal<Tcontext_t        >   * out_COMMIT_EVENT_FRONT_END_ID        ;
+  sc_signal<Tcontext_t        >   * out_COMMIT_EVENT_CONTEXT_ID          ;
+  sc_signal<Tdepth_t          >   * out_COMMIT_EVENT_DEPTH               ;
+  sc_signal<Tevent_type_t     >   * out_COMMIT_EVENT_TYPE                ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_IS_DELAY_SLOT       ;
+  sc_signal<Taddress_t        >   * out_COMMIT_EVENT_ADDRESS             ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ;
+  sc_signal<Taddress_t        >   * out_COMMIT_EVENT_ADDRESS_EPCR        ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ;
+  sc_signal<Tgeneral_data_t   >   * out_COMMIT_EVENT_ADDRESS_EEAR        ;
+
+  sc_signal<Tcontrol_t        > ***  in_EVENT_VAL                        ;
+  sc_signal<Tcontrol_t        > *** out_EVENT_ACK                        ;
+  sc_signal<Taddress_t        > ***  in_EVENT_ADDRESS                    ;
+  sc_signal<Taddress_t        > ***  in_EVENT_ADDRESS_NEXT               ;
+  sc_signal<Tcontrol_t        > ***  in_EVENT_ADDRESS_NEXT_VAL           ;
+  sc_signal<Tcontrol_t        > ***  in_EVENT_IS_DS_TAKE                 ;
+
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_VAL                    ;
+  sc_signal<Tcontrol_t        > *** out_SPR_EVENT_ACK                    ;
+  sc_signal<Tspr_t            > ***  in_SPR_EVENT_EPCR                   ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_EEAR_WEN               ;
+  sc_signal<Tspr_t            > ***  in_SPR_EVENT_EEAR                   ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_SR_DSX                 ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_SR_TO_ESR              ;
+
+  sc_signal<Tcounter_t        > *** out_NB_INST_COMMIT_ALL               ;
+  sc_signal<Tcounter_t        > *** out_NB_INST_COMMIT_MEM               ;
+  sc_signal<Tcounter_t        > ***  in_NB_INST_DECOD_ALL                ;
+
+  sc_signal<Tdepth_t          > ***  in_DEPTH_MIN                        ;
+  sc_signal<Tdepth_t          > ***  in_DEPTH_MAX                        ;
+  sc_signal<Tcontrol_t        > ***  in_DEPTH_FULL                       ;
+
+  sc_signal<Tcontrol_t        > *** out_SPR_SR_IEE                       ;
+  sc_signal<Tcontrol_t        > *** out_SPR_SR_EPH                       ;
 
   ALLOC2_SC_SIGNAL( in_RENAME_VAL                       ," in_RENAME_VAL                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 117)
@@ -61,4 +61,13 @@
     }
 
+  uint32_t    num_thread = 0;
+  uint32_t ** _translate_num_context_to_num_thread       = new uint32_t * [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _translate_num_context_to_num_thread [i] = new uint32_t [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+        _translate_num_context_to_num_thread [i][j] = num_thread ++;
+    }
+
   int _return = EXIT_SUCCESS;
   try 
@@ -70,4 +79,5 @@
 	 _nb_inst_reexecute ,
 	 _implement_group   ,
+         _translate_num_context_to_num_thread,
          true //is_toplevel
         );
@@ -100,4 +110,11 @@
   for (uint32_t i=0; i<_nb_front_end; i++)
     {
+      delete [] _translate_num_context_to_num_thread [i];
+    }
+  delete [] _translate_num_context_to_num_thread;
+
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
       for (uint32_t j=0; j<_nb_context[i]; j++)
 	delete [] _implement_group [i][j];
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 117)
@@ -27,4 +27,5 @@
   public : uint32_t     _nb_inst_reexecute     ;
   public : bool     *** _implement_group       ;//[nb_front_end][nb_context][NB_GROUP]
+  public : uint32_t  ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
 
   public : uint32_t     _max_nb_context        ;
@@ -41,4 +42,5 @@
 			uint32_t     nb_inst_reexecute     ,
 			bool     *** implement_group       ,
+                        uint32_t  ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                         bool         is_toplevel=false
 			);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 117)
@@ -545,19 +545,50 @@
   // [0][21] CID
   //----------------------------------------------------------
-  class CID : public GENERIC 
-  {
-  public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][22] TID
-  //----------------------------------------------------------
-  class TID : public GENERIC 
-  {
-  public : TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][23] TSR
+  class CID : public morpheo::behavioural::SPR
+  {
+  private: const Tspr_t _cpu_id : 32; // cpu_id reset value
+  public :       Tspr_t  cpu_id : 32;
+
+  public :        CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+    _cpu_id ((param==NULL)?0:param->_translate_num_context_to_num_thread[num_front_end][num_context])
+    {};
+  public : void   reset (void  ) 
+    {
+      cpu_id = _cpu_id;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((cpu_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      cpu_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][22] TID - Thread Id
+  //----------------------------------------------------------
+  class TID : public morpheo::behavioural::SPR
+  {
+  public :       Tspr_t  thread_id : 32;
+
+  public :        TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL)
+    {};
+  public : void   reset (void  ) 
+    {
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((thread_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      thread_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][23] TSR - Thread Status Register
   //----------------------------------------------------------
   class TSR : public GENERIC 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 117)
@@ -23,4 +23,5 @@
 			  uint32_t     nb_inst_reexecute     ,
 			  bool     *** implement_group       ,
+                          uint32_t  ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                           bool         is_toplevel
 			  )
@@ -32,4 +33,5 @@
     _nb_inst_reexecute      = nb_inst_reexecute;
     _implement_group        = implement_group  ;
+    _translate_num_context_to_num_thread = translate_num_context_to_num_thread;
 
     _max_nb_context         = max<uint32_t>(_nb_context,_nb_front_end);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 117)
@@ -236,6 +236,7 @@
       for (uint32_t j=0; j<_param->_nb_context[i]; j++)
 	for (uint32_t k=0; k<NB_GROUP; k++)
-	  if (_param->_implement_group [i][j][k])
+          if (_param->_implement_group [i][j][k])
             {
+              
               for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
                 if (_spr [i][j][k][l] == NULL)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 117)
@@ -62,6 +62,6 @@
   public : Tpriority_t           _issue_priority                   ;
   public : Tload_balancing_t     _issue_load_balancing             ;
-  public : bool               ** _table_routing                    ;//[nb_rename_unit][nb_inst_issue]
-  public : bool               ** _table_issue_type                 ;//[nb_inst_issue][nb_type]
+//   public : bool               ** _table_routing                    ;//[nb_rename_unit][nb_inst_issue]
+//   public : bool               ** _table_issue_type                 ;//[nb_inst_issue][nb_type]
     // Reexecute
   public : uint32_t              _size_reexecute_queue             ;
@@ -135,5 +135,5 @@
                         uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
                         uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
-                        uint32_t              nb_inst_issue                    ,
+//                      uint32_t              nb_inst_issue                    ,
                         uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
                         uint32_t              nb_inst_reexecute                ,
@@ -159,6 +159,6 @@
                         Tpriority_t           issue_priority                   ,
                         Tload_balancing_t     issue_load_balancing             ,
-                        bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
-                        bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+//                         bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+//                         bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
                         // Reexecute
                         uint32_t              size_reexecute_queue             ,
@@ -173,5 +173,5 @@
                         uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                         uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-//                         uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                      uint32_t            * size_read_counter                ,//[nb_rename_unit]
                         uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                         uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 117)
@@ -674,7 +674,7 @@
                     COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE",
                                              dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE");
-                    x++;
-                    ++it;
                   }
+                x++;
+                ++it;
               }
         }
@@ -885,4 +885,10 @@
           COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN"        ,
                                    dest,"out_COMMIT_"+toString(i)+"_WEN"        );
+//        if (_param->_have_port_context_id)
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_CONTEXT_ID"  ,
+//                                 dest,"out_COMMIT_"+toString(i)+"_CONTEXT_ID"  );
+//        if (_param->_have_port_front_end_id)
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FRONT_END_ID",
+//                                 dest,"out_COMMIT_"+toString(i)+"_FRONT_END_ID");
           if (_param->_have_port_rob_ptr)
           COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID"  ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 117)
@@ -25,5 +25,5 @@
                           uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
                           uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
-                          uint32_t              nb_inst_issue                    ,
+//                        uint32_t              nb_inst_issue                    ,
                           uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
                           uint32_t              nb_inst_reexecute                ,
@@ -49,6 +49,6 @@
                           Tpriority_t           issue_priority                   ,
                           Tload_balancing_t     issue_load_balancing             ,
-                          bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
-                          bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+//                           bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+//                           bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
                           // Reexecute
                           uint32_t              size_reexecute_queue             ,
@@ -63,5 +63,5 @@
                           uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                           uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-//                           uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                        uint32_t            * size_read_counter                ,//[nb_rename_unit]
                           uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                           uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
@@ -87,5 +87,5 @@
     _nb_inst_insert                    = nb_inst_insert                   ;
     _nb_inst_retire                    = nb_inst_retire                   ;
-    _nb_inst_issue                     = nb_inst_issue                    ;
+//  _nb_inst_issue                     = nb_inst_issue                    ;
     _nb_inst_execute                   = nb_inst_execute                  ;
     _nb_inst_reexecute                 = nb_inst_reexecute                ;
@@ -107,6 +107,6 @@
     _issue_priority                    = issue_priority                   ;
     _issue_load_balancing              = issue_load_balancing             ;
-    _table_routing                     = table_routing                    ;
-    _table_issue_type                  = table_issue_type                 ;
+//     _table_routing                     = table_routing                    ;
+//     _table_issue_type                  = table_issue_type                 ;
     _size_reexecute_queue              = size_reexecute_queue             ;
     _reexecute_priority                = reexecute_priority               ;
@@ -265,5 +265,5 @@
        _commit_load_balancing   ,
        _nb_rename_unit_select   ,
-       _nb_thread                          ,
+       _nb_thread               ,
        _translate_num_context_to_num_thread
        );
@@ -284,13 +284,15 @@
         size_store_queue_ptr    ,
         size_load_queue_ptr     ,
-       _nb_inst_issue           ,
+//     _nb_inst_issue           ,
        _nb_inst_insert          ,
        _nb_inst_reexecute       ,
        _nb_rename_unit_select   ,
        _issue_priority          ,
-       _issue_load_balancing    ,
-       _table_routing           ,
-       _table_issue_type        
+       _issue_load_balancing    // ,
+//        _table_routing           ,
+//        _table_issue_type        
        );
+
+    _nb_inst_issue = _param_issue_queue->_nb_inst_issue;
 
     _param_reexecute_unit        = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters  
@@ -319,5 +321,6 @@
        _nb_context            ,
        _nb_inst_reexecute     ,
-       _implement_group       
+       _implement_group       ,
+       _translate_num_context_to_num_thread
        );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 115)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 117)
@@ -58,10 +58,10 @@
     str+= toString(MSG_INFORMATION)+"   * issue_priority                   : "+toString<Tpriority_t      >(_issue_priority                   )+"\n";
     str+= toString(MSG_INFORMATION)+"   * issue_load_balancing             : "+toString<Tload_balancing_t>(_issue_load_balancing             )+"\n";
-    for (uint32_t i=0; i<_nb_rename_unit; ++i)
-    for (uint32_t j=0; j<_nb_inst_issue ; ++j)
-    str+= toString(MSG_INFORMATION)+"   * table_routing                      ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_routing [i][j]             )+"\n";//[nb_rename_unit][nb_inst_issue]
-    for (uint32_t i=0; i<_nb_inst_issue ; ++i)
-    for (uint32_t j=0; j<_nb_type; ++j)
-    str+= toString(MSG_INFORMATION)+"   * table_issue_type                   ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_issue_type [i][j]          )+"\n";//[nb_inst_issue][nb_type]
+//  for (uint32_t i=0; i<_nb_rename_unit; ++i)
+//  for (uint32_t j=0; j<_nb_inst_issue ; ++j)
+//  str+= toString(MSG_INFORMATION)+"   * table_routing                      ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_routing [i][j]             )+"\n";//[nb_rename_unit][nb_inst_issue]
+//  for (uint32_t i=0; i<_nb_inst_issue ; ++i)
+//  for (uint32_t j=0; j<_nb_type; ++j)
+//  str+= toString(MSG_INFORMATION)+"   * table_issue_type                   ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_issue_type [i][j]          )+"\n";//[nb_inst_issue][nb_type]
     str+= toString(MSG_INFORMATION)+"   * size_reexecute_queue             : "+toString<uint32_t         >(_size_reexecute_queue             )+"\n";
     str+= toString(MSG_INFORMATION)+"   * reexecute_priority               : "+toString<Tpriority_t      >(_reexecute_priority               )+"\n";
