Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/config-min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/config-min.cfg	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/config-min.cfg	(revision 117)
@@ -1,18 +1,18 @@
 Core_Glue
 1	1	+1	# nb_front_end                                                                                     
-1	1	+1	# nb_context                            [0]          [nb_front_end]
-1	1	+1	# nb_ooo_engine                                                                                    
-1	1	+1	# nb_execute_loop                                                                                  
-1	1	+1	# ooo_engine_nb_front_end               [0]          [nb_ooo_engine]
-1	1	+1	# ooo_engine_nb_execute_loop            [0]          [nb_ooo_engine]
-1	1	+1	# execute_loop_nb_ooo_engine            [0]          [nb_execute_loop]
-1	1	+1	# nb_inst_decod                         [0]          [nb_front_end]   
-1	1	+1	# front_end_nb_inst_branch_complete     [0]          [nb_front_end]   
-1	1	+1	# ooo_engine_nb_inst_branch_complete    [0]          [nb_ooo_engine]
-1	1	+1	# nb_inst_insert                        [0]          [nb_ooo_engine]  
-1	1	+1	# nb_inst_issue                         [0]          [nb_ooo_engine]  
-1	1	+1	# nb_inst_execute                       [0][0]       [nb_ooo_engine][ooo_engine_nb_execute_loop]
-1	1	+1	# nb_read_unit                          [0]          [nb_execute_loop]
-1	1	+1	# nb_write_unit                         [0]          [nb_execute_loop]
+1	1	+1	# nb_context                            [0]                  [nb_front_end]
+1	1	+1	# nb_ooo_engine                                                                                            
+1	1	+1	# nb_execute_loop                                                                                          
+1	1	+1	# ooo_engine_nb_front_end               [0]                  [nb_ooo_engine]
+1	1	+1	# ooo_engine_nb_execute_loop            [0]                  [nb_ooo_engine]
+1	1	+1	# execute_loop_nb_ooo_engine            [0]                  [nb_execute_loop]
+1	1	+1	# nb_inst_decod                         [0]                  [nb_front_end]   
+1	1	+1	# front_end_nb_inst_branch_complete     [0]                  [nb_front_end]   
+1	1	+1	# ooo_engine_nb_inst_branch_complete    [0]                  [nb_ooo_engine]
+1	1	+1	# nb_inst_insert                        [0]                  [nb_ooo_engine]  
+1	1	+1	# nb_inst_issue                         [0]                  [nb_ooo_engine]  
+1	1	+1	# nb_inst_execute                       [0][0]               [nb_ooo_engine][ooo_engine_nb_execute_loop]
+1	1	+1	# nb_read_unit                          [0]                  [nb_execute_loop]
+1	1	+1	# nb_write_unit                         [0]                  [nb_execute_loop]
 1	1	+1	# size_depth                                                                                       
 1	1	+1	# size_rob_ptr                                                                                     
@@ -25,6 +25,6 @@
 1	1	+1	# dispatch_priority                                                                                
 1	1	+1	# dispatch_load_balancing                                                                          
-1	1	+1	# table_dispatch                        [0][0][0][0] [nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit] 
-0	0	+1	# translate_ooo_engine_num_front_end    [0][0]       [nb_ooo_engine][ooo_engine_nb_front_end]
-0	0	+1	# translate_ooo_engine_num_execute_loop [0][0]       [nb_ooo_engine][ooo_engine_nb_execute_loop]
-0	0	+1	# translate_execute_loop_num_ooo_engine [0][0]       [nb_execute_loop][execute_loop_nb_ooo_engine]
+1	1	+1	# table_dispatch                        [0][0][0][0]         [nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+0	0	+1	# translate_ooo_engine_num_front_end    [0][0]               [nb_ooo_engine][ooo_engine_nb_front_end]
+0	0	+1	# translate_ooo_engine_num_execute_loop [0][0]               [nb_ooo_engine][ooo_engine_nb_execute_loop]
+0	0	+1	# translate_execute_loop_num_ooo_engine [0][0]               [nb_execute_loop][execute_loop_nb_ooo_engine]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/main.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/main.cpp	(revision 117)
@@ -25,5 +25,6 @@
   err (_(" * ooo_engine_nb_inst_branch_complete    [nb_ooo_engine]                                            (uint32_t         )\n"));
   err (_(" * nb_inst_insert                        [nb_ooo_engine]                                            (uint32_t         )\n"));
-  err (_(" * nb_inst_issue                         [nb_ooo_engine]                                            (uint32_t         )\n"));
+//err (_(" * nb_inst_issue_queue                   [nb_ooo_engine]                                            (uint32_t         )\n"));
+  err (_(" * nb_inst_issue_slot                    [nb_ooo_engine]                                            (uint32_t         )\n"));
   err (_(" * nb_inst_execute                       [nb_ooo_engine][ooo_engine_nb_execute_loop]                (uint32_t         )\n"));
   err (_(" * nb_read_unit                          [nb_execute_loop]                                          (uint32_t         )\n"));
@@ -40,4 +41,17 @@
   err (_(" * dispatch_load_balancing                                                                          (Tload_balancing_t)\n"));
   err (_(" * table_dispatch                        [nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit] (bool             )\n"));
+//   err (_(" * table_issue_type                      [execute_loop][nb_read_unit][MAX_TYPE]                      (bool             )\n"));
+//   err (_("   * TYPE_ALU    \n"));
+//   err (_("   * TYPE_SHIFT  \n"));
+//   err (_("   * TYPE_MOVE   \n"));
+//   err (_("   * TYPE_TEST   \n"));
+//   err (_("   * TYPE_MUL    \n"));
+//   err (_("   * TYPE_DIV    \n"));
+//   err (_("   * TYPE_EXTEND \n"));
+//   err (_("   * TYPE_FIND   \n"));
+//   err (_("   * TYPE_SPECIAL\n"));
+//   err (_("   * TYPE_CUSTOM \n"));
+//   err (_("   * TYPE_BRANCH \n"));
+//   err (_("   * TYPE_MEMORY \n"));
   err (_(" * translate_ooo_engine_num_front_end    [nb_ooo_engine][ooo_engine_nb_front_end]                   (uint32_t         )\n"));
   err (_(" * translate_ooo_engine_num_execute_loop [nb_ooo_engine][ooo_engine_nb_execute_loop]                (uint32_t         )\n"));
@@ -72,5 +86,5 @@
   uint32_t              * ooo_engine_nb_inst_branch_complete   ;//[nb_ooo_engine]
   uint32_t              * nb_inst_insert                       ;//[nb_ooo_engine]
-  uint32_t              * nb_inst_issue                        ;//[nb_ooo_engine]
+  uint32_t              * nb_inst_issue_slot                   ;//[nb_ooo_engine]
   uint32_t             ** nb_inst_execute                      ;//[nb_ooo_engine][ooo_engine_nb_execute_loop]
   uint32_t              * nb_read_unit                         ;//[nb_execute_loop]
@@ -86,5 +100,6 @@
   Tpriority_t             dispatch_priority                    ;
   Tload_balancing_t       dispatch_load_balancing              ;
-  bool               **** table_dispatch                       ;//[nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+  bool               **** table_dispatch                       ;//[nb_ooo_engine][nb_inst_issue_slot][execute_loop][nb_read_unit]
+  bool                *** table_issue_type                     ;//                                   [execute_loop][nb_read_unit][MAX_TYPE]
   uint32_t             ** translate_ooo_engine_num_front_end   ;//[nb_ooo_engine][ooo_engine_nb_front_end]
   uint32_t             ** translate_ooo_engine_num_execute_loop;//[nb_ooo_engine][ooo_engine_nb_execute_loop]
@@ -119,5 +134,5 @@
   SELFTEST1(ooo_engine_nb_inst_branch_complete   ,uint32_t         ,argv,x,nb_ooo_engine);
   SELFTEST1(nb_inst_insert                       ,uint32_t         ,argv,x,nb_ooo_engine);
-  SELFTEST1(nb_inst_issue                        ,uint32_t         ,argv,x,nb_ooo_engine);
+  SELFTEST1(nb_inst_issue_slot                   ,uint32_t         ,argv,x,nb_ooo_engine);
 
   uint32_t sum_ooo_engine_nb_front_end    = 0;
@@ -129,5 +144,5 @@
       sum_ooo_engine_nb_front_end    += ooo_engine_nb_front_end    [i];
       sum_ooo_engine_nb_execute_loop += ooo_engine_nb_execute_loop [i];
-      sum_nb_inst_issue              += nb_inst_issue              [i];
+      sum_nb_inst_issue              += nb_inst_issue_slot         [i];
     }
 
@@ -177,5 +192,31 @@
   SELFTEST0(dispatch_load_balancing              ,Tload_balancing_t,argv,x);
 
-  SELFTEST4(table_dispatch                       ,bool             ,argv,x,nb_ooo_engine,nb_inst_issue[it1],nb_execute_loop,nb_read_unit[it3]);
+  SELFTEST4(table_dispatch                       ,bool             ,argv,x,nb_ooo_engine,nb_inst_issue_slot[it1],nb_execute_loop,nb_read_unit[it3]);
+
+  ALLOC3   (table_issue_type                     ,bool                                                     ,nb_execute_loop,nb_read_unit[it1],MAX_TYPE);
+
+  for (uint32_t i=0; i<nb_execute_loop; ++i)
+    for (uint32_t j=0; j<nb_read_unit[i]; ++j)
+      for (uint32_t k=0; k<MAX_TYPE; ++k)
+//         table_issue_type [i][j][k] = false;
+        table_issue_type [i][j][k] = true;
+
+//   for (uint32_t i=0; i<nb_execute_loop; ++i)
+//     for (uint32_t j=0; j<nb_read_unit[i]; ++j)
+//       {
+//         table_issue_type [i][j][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+//         table_issue_type [i][j][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+//       }
+
   SELFTEST2(translate_ooo_engine_num_front_end   ,uint32_t         ,argv,x,nb_ooo_engine,ooo_engine_nb_front_end[it1]);
   SELFTEST2(translate_ooo_engine_num_execute_loop,uint32_t         ,argv,x,nb_ooo_engine,ooo_engine_nb_execute_loop[it1]);
@@ -198,5 +239,6 @@
          ooo_engine_nb_inst_branch_complete   ,//[nb_ooo_engine]
          nb_inst_insert                       ,//[nb_ooo_engine]
-         nb_inst_issue                        ,//[nb_ooo_engine]
+         nb_inst_issue_slot                   ,//[nb_ooo_engine]
+         nb_inst_issue_slot                   ,//[nb_ooo_engine]
          nb_inst_execute                      ,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
          nb_read_unit                         ,//[nb_execute_loop]
@@ -212,5 +254,6 @@
          dispatch_priority                    ,
          dispatch_load_balancing              ,
-         table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+         table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue_slot][execute_loop][nb_read_unit]
+         table_issue_type                     ,//                                   [execute_loop][nb_read_unit][MAX_TYPE]
          translate_ooo_engine_num_front_end   ,//[nb_ooo_engine][ooo_engine_nb_front_end]
          translate_ooo_engine_num_execute_loop,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
@@ -245,9 +288,10 @@
   DELETE2(translate_ooo_engine_num_execute_loop,nb_ooo_engine,ooo_engine_nb_execute_loop[it1]);
   DELETE2(translate_ooo_engine_num_front_end   ,nb_ooo_engine,ooo_engine_nb_front_end[it1]);
-  DELETE4(table_dispatch                       ,nb_ooo_engine,nb_inst_issue[it1],nb_execute_loop,nb_read_unit[it2]);
+  DELETE3(table_issue_type                                                           ,nb_execute_loop,nb_read_unit[it1],MAX_TYPE);
+  DELETE4(table_dispatch                       ,nb_ooo_engine,nb_inst_issue_slot[it1],nb_execute_loop,nb_read_unit[it2]);
   DELETE1(nb_write_unit                        ,nb_execute_loop);
   DELETE1(nb_read_unit                         ,nb_execute_loop);
   DELETE2(nb_inst_execute                      ,nb_ooo_engine,ooo_engine_nb_execute_loop[it1]);
-  DELETE1(nb_inst_issue                        ,nb_ooo_engine);
+  DELETE1(nb_inst_issue_slot                   ,nb_ooo_engine);
   DELETE1(ooo_engine_nb_inst_branch_complete   ,nb_ooo_engine);
   DELETE1(front_end_nb_inst_branch_complete    ,nb_front_end);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/SelfTest/src/test.cpp	(revision 117)
@@ -48,4 +48,124 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontext_t        >  *** out_RENAME_FRONT_END_ID                       ;
+  sc_signal<Tcontrol_t        >  *** out_BRANCH_COMPLETE_FRONT_END_VAL             ;
+  sc_signal<Tcontrol_t        >  ***  in_BRANCH_COMPLETE_FRONT_END_ACK             ;
+  sc_signal<Tcontext_t        >  *** out_BRANCH_COMPLETE_FRONT_END_CONTEXT_ID      ;
+  sc_signal<Tdepth_t          >  *** out_BRANCH_COMPLETE_FRONT_END_DEPTH           ;
+  sc_signal<Taddress_t        >  *** out_BRANCH_COMPLETE_FRONT_END_ADDRESS         ;
+  sc_signal<Tcontrol_t        >  *** out_BRANCH_COMPLETE_FRONT_END_NO_SEQUENCE     ;
+  sc_signal<Tcontrol_t        >  ***  in_BRANCH_COMPLETE_FRONT_END_MISS_PREDICTION ;
+  sc_signal<Tcontrol_t        >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_VAL            ;
+  sc_signal<Tcontrol_t        >  *** out_BRANCH_COMPLETE_OOO_ENGINE_ACK            ;
+  sc_signal<Tcontext_t        >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_FRONT_END_ID   ;
+  sc_signal<Tcontext_t        >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_CONTEXT_ID     ;
+  sc_signal<Tdepth_t          >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_DEPTH          ;
+  sc_signal<Taddress_t        >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_ADDRESS        ;
+  sc_signal<Tcontrol_t        >  ***  in_BRANCH_COMPLETE_OOO_ENGINE_NO_SEQUENCE    ;
+  sc_signal<Tcontrol_t        >  *** out_BRANCH_COMPLETE_OOO_ENGINE_MISS_PREDICTION;
+  sc_signal<Tcontrol_t        >   ** out_COMMIT_EVENT_FRONT_END_VAL                ;
+  sc_signal<Tcontrol_t        >   **  in_COMMIT_EVENT_FRONT_END_ACK                ;
+  sc_signal<Tcontext_t        >   ** out_COMMIT_EVENT_FRONT_END_CONTEXT_ID         ;
+  sc_signal<Tdepth_t          >   ** out_COMMIT_EVENT_FRONT_END_DEPTH              ;
+  sc_signal<Tevent_type_t     >   ** out_COMMIT_EVENT_FRONT_END_TYPE               ;
+  sc_signal<Tcontrol_t        >   ** out_COMMIT_EVENT_FRONT_END_IS_DELAY_SLOT      ;
+  sc_signal<Taddress_t        >   ** out_COMMIT_EVENT_FRONT_END_ADDRESS            ;
+  sc_signal<Tcontrol_t        >   ** out_COMMIT_EVENT_FRONT_END_ADDRESS_EPCR_VAL   ;
+  sc_signal<Taddress_t        >   ** out_COMMIT_EVENT_FRONT_END_ADDRESS_EPCR       ;
+  sc_signal<Tcontrol_t        >   ** out_COMMIT_EVENT_FRONT_END_ADDRESS_EEAR_VAL   ;
+  sc_signal<Tgeneral_data_t   >   ** out_COMMIT_EVENT_FRONT_END_ADDRESS_EEAR       ;
+  sc_signal<Tcontrol_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_VAL               ;
+  sc_signal<Tcontrol_t        >   ** out_COMMIT_EVENT_OOO_ENGINE_ACK               ;
+  sc_signal<Tcontext_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_FRONT_END_ID      ;
+  sc_signal<Tcontext_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_CONTEXT_ID        ;
+  sc_signal<Tdepth_t          >   **  in_COMMIT_EVENT_OOO_ENGINE_DEPTH             ;
+  sc_signal<Tevent_type_t     >   **  in_COMMIT_EVENT_OOO_ENGINE_TYPE              ;
+  sc_signal<Tcontrol_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_IS_DELAY_SLOT     ;
+  sc_signal<Taddress_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_ADDRESS           ;
+  sc_signal<Tcontrol_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EPCR_VAL  ;
+  sc_signal<Taddress_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EPCR      ;
+  sc_signal<Tcontrol_t        >   **  in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR_VAL  ;
+  sc_signal<Tgeneral_data_t   >   **  in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_VAL                      ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_OOO_ENGINE_ACK                      ;
+  sc_signal<Tcontext_t        >  ***  in_ISSUE_OOO_ENGINE_FRONT_END_ID             ;
+  sc_signal<Tcontext_t        >  ***  in_ISSUE_OOO_ENGINE_CONTEXT_ID               ;
+  sc_signal<Tpacket_t         >  ***  in_ISSUE_OOO_ENGINE_PACKET_ID                ;
+  sc_signal<Ttype_t           >  ***  in_ISSUE_OOO_ENGINE_TYPE                     ;
+  sc_signal<Toperation_t      >  ***  in_ISSUE_OOO_ENGINE_OPERATION                ;
+  sc_signal<Tlsq_ptr_t        >  ***  in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ;
+  sc_signal<Tlsq_ptr_t        >  ***  in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ;
+  sc_signal<Tgeneral_data_t   >  ***  in_ISSUE_OOO_ENGINE_IMMEDIAT                 ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_READ_RA                  ;
+  sc_signal<Tgeneral_address_t>  ***  in_ISSUE_OOO_ENGINE_NUM_REG_RA               ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_READ_RB                  ;
+  sc_signal<Tgeneral_address_t>  ***  in_ISSUE_OOO_ENGINE_NUM_REG_RB               ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_READ_RC                  ;
+  sc_signal<Tspecial_address_t>  ***  in_ISSUE_OOO_ENGINE_NUM_REG_RC               ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_WRITE_RD                 ;
+  sc_signal<Tgeneral_address_t>  ***  in_ISSUE_OOO_ENGINE_NUM_REG_RD               ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_OOO_ENGINE_WRITE_RE                 ;
+  sc_signal<Tspecial_address_t>  ***  in_ISSUE_OOO_ENGINE_NUM_REG_RE               ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_VAL                    ;
+  sc_signal<Tcontrol_t        >  ***  in_ISSUE_EXECUTE_LOOP_ACK                    ;
+  sc_signal<Tcontext_t        >  *** out_ISSUE_EXECUTE_LOOP_CONTEXT_ID             ;
+  sc_signal<Tcontext_t        >  *** out_ISSUE_EXECUTE_LOOP_FRONT_END_ID           ;
+  sc_signal<Tcontext_t        >  *** out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID          ;
+  sc_signal<Tpacket_t         >  *** out_ISSUE_EXECUTE_LOOP_PACKET_ID              ;
+  sc_signal<Toperation_t      >  *** out_ISSUE_EXECUTE_LOOP_OPERATION              ;
+  sc_signal<Ttype_t           >  *** out_ISSUE_EXECUTE_LOOP_TYPE                   ;
+  sc_signal<Tlsq_ptr_t        >  *** out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE  ;
+  sc_signal<Tlsq_ptr_t        >  *** out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE   ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT           ;
+  sc_signal<Tgeneral_data_t   >  *** out_ISSUE_EXECUTE_LOOP_IMMEDIAT               ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_READ_RA                ;
+  sc_signal<Tgeneral_address_t>  *** out_ISSUE_EXECUTE_LOOP_NUM_REG_RA             ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_READ_RB                ;
+  sc_signal<Tgeneral_address_t>  *** out_ISSUE_EXECUTE_LOOP_NUM_REG_RB             ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_READ_RC                ;
+  sc_signal<Tspecial_address_t>  *** out_ISSUE_EXECUTE_LOOP_NUM_REG_RC             ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_WRITE_RD               ;
+  sc_signal<Tgeneral_address_t>  *** out_ISSUE_EXECUTE_LOOP_NUM_REG_RD             ;
+  sc_signal<Tcontrol_t        >  *** out_ISSUE_EXECUTE_LOOP_WRITE_RE               ;
+  sc_signal<Tspecial_address_t>  *** out_ISSUE_EXECUTE_LOOP_NUM_REG_RE             ;
+  sc_signal<Tcontrol_t        > **** out_EXECUTE_OOO_ENGINE_VAL                    ;
+  sc_signal<Tcontrol_t        > ****  in_EXECUTE_OOO_ENGINE_ACK                    ;
+  sc_signal<Tcontext_t        > **** out_EXECUTE_OOO_ENGINE_FRONT_END_ID           ;
+  sc_signal<Tcontext_t        > **** out_EXECUTE_OOO_ENGINE_CONTEXT_ID             ;
+  sc_signal<Tpacket_t         > **** out_EXECUTE_OOO_ENGINE_PACKET_ID              ;
+//sc_signal<Ttype_t           > **** out_EXECUTE_OOO_ENGINE_TYPE                   ;
+//sc_signal<Toperation_t      > **** out_EXECUTE_OOO_ENGINE_OPERATION              ;
+  sc_signal<Tspecial_data_t   > **** out_EXECUTE_OOO_ENGINE_FLAGS                  ;
+  sc_signal<Texception_t      > **** out_EXECUTE_OOO_ENGINE_EXCEPTION              ;
+  sc_signal<Tcontrol_t        > **** out_EXECUTE_OOO_ENGINE_NO_SEQUENCE            ;
+  sc_signal<Taddress_t        > **** out_EXECUTE_OOO_ENGINE_ADDRESS                ;
+  sc_signal<Tgeneral_data_t   > **** out_EXECUTE_OOO_ENGINE_DATA                   ;
+  sc_signal<Tcontrol_t        >  ***  in_EXECUTE_EXECUTE_LOOP_VAL                  ;
+  sc_signal<Tcontrol_t        >  *** out_EXECUTE_EXECUTE_LOOP_ACK                  ;
+  sc_signal<Tcontext_t        >  ***  in_EXECUTE_EXECUTE_LOOP_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        >  ***  in_EXECUTE_EXECUTE_LOOP_FRONT_END_ID         ;
+  sc_signal<Tcontext_t        >  ***  in_EXECUTE_EXECUTE_LOOP_OOO_ENGINE_ID        ;
+  sc_signal<Tpacket_t         >  ***  in_EXECUTE_EXECUTE_LOOP_PACKET_ID            ;
+//sc_signal<Toperation_t      >  ***  in_EXECUTE_EXECUTE_LOOP_OPERATION            ;
+//sc_signal<Ttype_t           >  ***  in_EXECUTE_EXECUTE_LOOP_TYPE                 ;
+  sc_signal<Tspecial_data_t   >  ***  in_EXECUTE_EXECUTE_LOOP_FLAGS                ;
+  sc_signal<Texception_t      >  ***  in_EXECUTE_EXECUTE_LOOP_EXCEPTION            ;
+  sc_signal<Tcontrol_t        >  ***  in_EXECUTE_EXECUTE_LOOP_NO_SEQUENCE          ;
+  sc_signal<Taddress_t        >  ***  in_EXECUTE_EXECUTE_LOOP_ADDRESS              ;
+  sc_signal<Tgeneral_data_t   >  ***  in_EXECUTE_EXECUTE_LOOP_DATA                 ;
+  sc_signal<Tcontrol_t        >  ***  in_INSERT_OOO_ENGINE_VAL                     ;
+  sc_signal<Tcontrol_t        >  *** out_INSERT_OOO_ENGINE_ACK                     ;
+  sc_signal<Tcontrol_t        >  ***  in_INSERT_OOO_ENGINE_RD_USE                  ;
+  sc_signal<Tgeneral_address_t>  ***  in_INSERT_OOO_ENGINE_RD_NUM_REG              ;
+  sc_signal<Tcontrol_t        >  ***  in_INSERT_OOO_ENGINE_RE_USE                  ;
+  sc_signal<Tspecial_address_t>  ***  in_INSERT_OOO_ENGINE_RE_NUM_REG              ;
+  sc_signal<Tcontrol_t        > **** out_INSERT_EXECUTE_LOOP_VAL                   ;
+  sc_signal<Tcontrol_t        > ****  in_INSERT_EXECUTE_LOOP_ACK                   ;
+  sc_signal<Tcontrol_t        > **** out_INSERT_EXECUTE_LOOP_RD_USE                ;
+  sc_signal<Tgeneral_address_t> **** out_INSERT_EXECUTE_LOOP_RD_NUM_REG            ;
+  sc_signal<Tcontrol_t        > **** out_INSERT_EXECUTE_LOOP_RE_USE                ;
+  sc_signal<Tspecial_address_t> **** out_INSERT_EXECUTE_LOOP_RE_NUM_REG            ;
 
   ALLOC2_SC_SIGNAL(out_RENAME_FRONT_END_ID                       ,"out_RENAME_FRONT_END_ID                       ",Tcontext_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
@@ -88,25 +208,25 @@
   ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR_VAL  ," in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR_VAL  ",Tcontrol_t        ,_param->_nb_ooo_engine);
   ALLOC1_SC_SIGNAL( in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ," in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ",Tgeneral_data_t   ,_param->_nb_ooo_engine);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ," in_ISSUE_OOO_ENGINE_VAL                      ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,"out_ISSUE_OOO_ENGINE_ACK                      ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ," in_ISSUE_OOO_ENGINE_FRONT_END_ID             ",Tcontext_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ," in_ISSUE_OOO_ENGINE_CONTEXT_ID               ",Tcontext_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ," in_ISSUE_OOO_ENGINE_PACKET_ID                ",Tpacket_t         ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ," in_ISSUE_OOO_ENGINE_TYPE                     ",Ttype_t           ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ," in_ISSUE_OOO_ENGINE_OPERATION                ",Toperation_t      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ," in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ",Tlsq_ptr_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ," in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ",Tlsq_ptr_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ," in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ," in_ISSUE_OOO_ENGINE_IMMEDIAT                 ",Tgeneral_data_t   ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ," in_ISSUE_OOO_ENGINE_READ_RA                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ," in_ISSUE_OOO_ENGINE_NUM_REG_RA               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ," in_ISSUE_OOO_ENGINE_READ_RB                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ," in_ISSUE_OOO_ENGINE_NUM_REG_RB               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ," in_ISSUE_OOO_ENGINE_READ_RC                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ," in_ISSUE_OOO_ENGINE_NUM_REG_RC               ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ," in_ISSUE_OOO_ENGINE_WRITE_RD                 ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ," in_ISSUE_OOO_ENGINE_NUM_REG_RD               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ," in_ISSUE_OOO_ENGINE_WRITE_RE                 ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ," in_ISSUE_OOO_ENGINE_NUM_REG_RE               ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ," in_ISSUE_OOO_ENGINE_VAL                      ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,"out_ISSUE_OOO_ENGINE_ACK                      ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ," in_ISSUE_OOO_ENGINE_FRONT_END_ID             ",Tcontext_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ," in_ISSUE_OOO_ENGINE_CONTEXT_ID               ",Tcontext_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ," in_ISSUE_OOO_ENGINE_PACKET_ID                ",Tpacket_t         ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ," in_ISSUE_OOO_ENGINE_TYPE                     ",Ttype_t           ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ," in_ISSUE_OOO_ENGINE_OPERATION                ",Toperation_t      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ," in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ",Tlsq_ptr_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ," in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ",Tlsq_ptr_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ," in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ," in_ISSUE_OOO_ENGINE_IMMEDIAT                 ",Tgeneral_data_t   ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ," in_ISSUE_OOO_ENGINE_READ_RA                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ," in_ISSUE_OOO_ENGINE_NUM_REG_RA               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ," in_ISSUE_OOO_ENGINE_READ_RB                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ," in_ISSUE_OOO_ENGINE_NUM_REG_RB               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ," in_ISSUE_OOO_ENGINE_READ_RC                  ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ," in_ISSUE_OOO_ENGINE_NUM_REG_RC               ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ," in_ISSUE_OOO_ENGINE_WRITE_RD                 ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ," in_ISSUE_OOO_ENGINE_NUM_REG_RD               ",Tgeneral_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ," in_ISSUE_OOO_ENGINE_WRITE_RE                 ",Tcontrol_t        ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  ALLOC2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ," in_ISSUE_OOO_ENGINE_NUM_REG_RE               ",Tspecial_address_t,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   ALLOC2_SC_SIGNAL(out_ISSUE_EXECUTE_LOOP_VAL                    ,"out_ISSUE_EXECUTE_LOOP_VAL                    ",Tcontrol_t        ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
   ALLOC2_SC_SIGNAL( in_ISSUE_EXECUTE_LOOP_ACK                    ," in_ISSUE_EXECUTE_LOOP_ACK                    ",Tcontrol_t        ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
@@ -168,5 +288,4 @@
   ALLOC3_SC_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_USE                ,"out_INSERT_EXECUTE_LOOP_RE_USE                ",Tcontrol_t          ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);
   ALLOC3_SC_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_NUM_REG            ,"out_INSERT_EXECUTE_LOOP_RE_NUM_REG            ",Tspecial_address_t  ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);
-
   
   /********************************************************
@@ -229,29 +348,29 @@
   INSTANCE1_SC_SIGNAL(_Core_Glue, in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
   INSTANCE1_SC_SIGNAL(_Core_Glue, in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue,out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue,out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   if (_param->_have_port_front_end_id)
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   if (_param->_have_port_context_id)
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   if (_param->_have_port_rob_ptr)
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]); 
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); 
   if (_param->_have_port_load_queue_ptr)
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   INSTANCE2_SC_SIGNAL(_Core_Glue,out_ISSUE_EXECUTE_LOOP_VAL                    ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
   INSTANCE2_SC_SIGNAL(_Core_Glue, in_ISSUE_EXECUTE_LOOP_ACK                    ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
@@ -476,5 +595,5 @@
 
       for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
-        for (uint32_t j=0; j<_param->_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_param->_nb_inst_issue_queue[i]; ++j)
           {
             Tcontext_t front_end_id   = rand() % _param->_ooo_engine_nb_front_end [i];
@@ -714,25 +833,25 @@
   DELETE1_SC_SIGNAL( in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR_VAL  ,_param->_nb_ooo_engine);
   DELETE1_SC_SIGNAL( in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ,_param->_nb_ooo_engine);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+  DELETE2_SC_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
   DELETE2_SC_SIGNAL(out_ISSUE_EXECUTE_LOOP_VAL                    ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
   DELETE2_SC_SIGNAL( in_ISSUE_EXECUTE_LOOP_ACK                    ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h	(revision 117)
@@ -204,5 +204,6 @@
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-  private   : generic::priority::Priority  ** _priority_ooo_engine;                         //[nb_execute_loop]
+//private   : generic::priority::Priority  ** _priority_ooo_engine;                         //[nb_execute_loop]
+  private   : generic::priority::Priority   * _priority_ooo_engine;
   private   : generic::priority::Priority  ** _priority_read_unit ;                         //[nb_execute_loop]
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h	(revision 117)
@@ -18,5 +18,4 @@
 namespace core_glue {
 
-
   class Parameters : public morpheo::behavioural::Parameters
   {
@@ -33,6 +32,9 @@
   public : uint32_t              * _ooo_engine_nb_inst_branch_complete   ;//[nb_ooo_engine]
   public : uint32_t              * _nb_inst_insert                       ;//[nb_ooo_engine]
-  public : uint32_t              * _nb_inst_issue                        ;//[nb_ooo_engine]
+  public : uint32_t              * _nb_inst_reexecute                    ;//[nb_ooo_engine]
+  public : uint32_t              * _nb_inst_issue_queue                  ;//[nb_ooo_engine]
+  public : uint32_t              * _nb_inst_issue_slot                   ;//[nb_ooo_engine]
   public : uint32_t             ** _nb_inst_execute                      ;//[nb_ooo_engine][ooo_engine_nb_execute_loop]
+  public : bool                  * _issue_queue_in_order                 ;//[nb_ooo_engine]
   public : uint32_t              * _nb_read_unit                         ;//[nb_execute_loop]
   public : uint32_t              * _nb_write_unit                        ;//[nb_execute_loop]
@@ -50,5 +52,6 @@
   public : Tpriority_t             _dispatch_priority                    ;
   public : Tload_balancing_t       _dispatch_load_balancing              ;
-  public : bool               **** _table_dispatch                       ;//[nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+  public : bool               **** _table_dispatch                       ;//[nb_ooo_engine][nb_inst_issue_slot][execute_loop][nb_read_unit]
+  public : bool                *** _table_issue_type                     ;//                                   [execute_loop][nb_read_unit][nb_type]
   public : uint32_t             ** _translate_ooo_engine_num_front_end   ;//[nb_ooo_engine][ooo_engine_nb_front_end]
   public : uint32_t             ** _translate_ooo_engine_num_execute_loop;//[nb_ooo_engine][ooo_engine_nb_execute_loop]
@@ -61,5 +64,5 @@
 
   public : uint32_t             ** _execute_loop_nb_inst_insert                             ;//[nb_execute_loop][execute_loop_nb_ooo_engine]
-  public : uint32_t             ** _execute_loop_nb_inst_issue                              ;//[nb_execute_loop][execute_loop_nb_ooo_engine]
+  public : uint32_t             ** _execute_loop_nb_inst_issue_slot                         ;//[nb_execute_loop][execute_loop_nb_ooo_engine]
 //public : uint32_t              * _link_execute_loop_with_ooo_engine                       ;//[nb_ooo_engine]
 
@@ -70,5 +73,6 @@
   public : uint32_t                _max_nb_write_unit                     ;
   public : uint32_t                _max_nb_inst_insert                    ;
-  public : uint32_t                _max_nb_inst_issue                     ;
+  public : uint32_t                _max_nb_inst_issue_queue               ;
+  public : uint32_t                _max_nb_inst_issue_slot                ;
   public : uint32_t                _max_nb_read_unit                      ;
 
@@ -86,6 +90,9 @@
    uint32_t              * ooo_engine_nb_inst_branch_complete   ,//[nb_ooo_engine]
    uint32_t              * nb_inst_insert                       ,//[nb_ooo_engine]
-   uint32_t              * nb_inst_issue                        ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_reexecute                    ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_issue_queue                  ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_issue_slot                   ,//[nb_ooo_engine]
    uint32_t             ** nb_inst_execute                      ,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
+   bool                  * issue_queue_in_order                 ,//[nb_ooo_engine]
    uint32_t              * nb_read_unit                         ,//[nb_execute_loop]
    uint32_t              * nb_write_unit                        ,//[nb_execute_loop]
@@ -100,5 +107,7 @@
    Tpriority_t             dispatch_priority                    ,
    Tload_balancing_t       dispatch_load_balancing              ,
-   bool               **** table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+   bool               **** table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue_slot][execute_loop][nb_read_unit]
+   bool                *** table_issue_type                     ,//                                   [execute_loop][nb_read_unit][nb_type]
+// bool                *** table_issue_thread                   ,//                                   [execute_loop][nb_read_unit][nb_thread]
    uint32_t             ** translate_ooo_engine_num_front_end   ,//[nb_ooo_engine][ooo_engine_nb_front_end]
    uint32_t             ** translate_ooo_engine_num_execute_loop,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp	(revision 117)
@@ -160,5 +160,5 @@
 
         for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
-          for (uint32_t j=0; j<_param->_nb_inst_issue [i]; ++j)
+          for (uint32_t j=0; j<_param->_nb_inst_issue_queue [i]; ++j)
             {
               sensitive << (*(in_ISSUE_OOO_ENGINE_VAL                   [i][j]))
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp	(revision 117)
@@ -133,29 +133,29 @@
     // ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      ALLOC2_INTERFACE_BEGIN("issue_ooo_engine",SOUTH,IN ,_("Issue : request between rename unit and execute loop"),_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_VAL                      ,"VAL"                  ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_OUT(out_ISSUE_OOO_ENGINE_ACK                      ,"ACK"                  ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,"FRONT_END_ID"         ,Tcontext_t        ,_param->_size_front_end_id    ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,"CONTEXT_ID"           ,Tcontext_t        ,_param->_size_context_id      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_PACKET_ID                ,"PACKET_ID"            ,Tpacket_t         ,_param->_size_rob_ptr         ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_TYPE                     ,"TYPE"                 ,Ttype_t           ,_param->_size_type            ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_OPERATION                ,"OPERATION"            ,Toperation_t      ,_param->_size_operation       ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,"HAS_IMMEDIAT"         ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,"IMMEDIAT"             ,Tgeneral_data_t   ,_param->_size_general_data    ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RA                  ,"READ_RA"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,"NUM_REG_RA"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RB                  ,"READ_RB"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,"NUM_REG_RB"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RC                  ,"READ_RC"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,"NUM_REG_RC"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,"WRITE_RD"             ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,"NUM_REG_RD"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,"WRITE_RE"             ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,"NUM_REG_RE"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
-
-      ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue[it1]);
+      ALLOC2_INTERFACE_BEGIN("issue_ooo_engine",SOUTH,IN ,_("Issue : request between rename unit and execute loop"),_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_VAL                      ,"VAL"                  ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_OUT(out_ISSUE_OOO_ENGINE_ACK                      ,"ACK"                  ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,"FRONT_END_ID"         ,Tcontext_t        ,_param->_size_front_end_id    ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,"CONTEXT_ID"           ,Tcontext_t        ,_param->_size_context_id      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_PACKET_ID                ,"PACKET_ID"            ,Tpacket_t         ,_param->_size_rob_ptr         ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_TYPE                     ,"TYPE"                 ,Ttype_t           ,_param->_size_type            ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_OPERATION                ,"OPERATION"            ,Toperation_t      ,_param->_size_operation       ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t        ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t        ,_param->_size_load_queue_ptr  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,"HAS_IMMEDIAT"         ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,"IMMEDIAT"             ,Tgeneral_data_t   ,_param->_size_general_data    ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RA                  ,"READ_RA"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,"NUM_REG_RA"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RB                  ,"READ_RB"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,"NUM_REG_RB"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_READ_RC                  ,"READ_RC"              ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,"NUM_REG_RC"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,"WRITE_RD"             ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,"NUM_REG_RD"           ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,"WRITE_RE"             ,Tcontrol_t        ,1                             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+      _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,"NUM_REG_RE"           ,Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
+
+      ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]);
     }
 
@@ -257,16 +257,24 @@
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-    _priority_ooo_engine  = new generic::priority::Priority * [_param->_nb_execute_loop];
+    _priority_ooo_engine = new generic::priority::Priority (_name+"_priority_ooo_engine",
+                                                            _param->_dispatch_priority      ,
+                                                            _param->_dispatch_load_balancing,
+                                                            _param->_nb_ooo_engine          ,
+                                                            _param->_nb_inst_issue_slot     ,
+                                                            _param->_nb_ooo_engine          
+                                                            );
+
+//  _priority_ooo_engine  = new generic::priority::Priority * [_param->_nb_execute_loop];
     _priority_read_unit   = new generic::priority::Priority * [_param->_nb_execute_loop];
 
     for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
       {
-        _priority_ooo_engine [i] = new generic::priority::Priority (_name+"_priority_ooo_engine_"+toString(i),
-                                                                    _param->_dispatch_priority      ,
-                                                                    _param->_dispatch_load_balancing,
-                                                                    _param->_execute_loop_nb_ooo_engine [i],
-                                                                    _param->_execute_loop_nb_inst_issue [i],
-                                                                    _param->_execute_loop_nb_ooo_engine [i]
-                                                                    );
+//         _priority_ooo_engine [i] = new generic::priority::Priority (_name+"_priority_ooo_engine_"+toString(i),
+//                                                                     _param->_dispatch_priority      ,
+//                                                                     _param->_dispatch_load_balancing,
+//                                                                     _param->_execute_loop_nb_ooo_engine      [i],
+//                                                                     _param->_execute_loop_nb_inst_issue_slot [i],
+//                                                                     _param->_execute_loop_nb_ooo_engine      [i]
+//                                                                     );
 
         _priority_read_unit  [i] = new generic::priority::Priority (_name+"_priority_read_unit_"+toString(i),
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp	(revision 117)
@@ -70,25 +70,25 @@
         DELETE1_SIGNAL( in_COMMIT_EVENT_OOO_ENGINE_ADDRESS_EEAR      ,_param->_nb_ooo_engine,_param->_size_spr);
 
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_front_end_id);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_context_id);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_rob_ptr);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_type);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_operation);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_store_queue_ptr);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_load_queue_ptr);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_general_data);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_general_register);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_general_register);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_special_register);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_general_register);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],1);
-        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue[it1],_param->_size_special_register);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_VAL                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL(out_ISSUE_OOO_ENGINE_ACK                      ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_FRONT_END_ID             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_front_end_id);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_CONTEXT_ID               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_context_id);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_PACKET_ID                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_rob_ptr);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_TYPE                     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_type);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_OPERATION                ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_operation);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE    ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_store_queue_ptr);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE     ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_load_queue_ptr);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT             ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_IMMEDIAT                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_general_data);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RA                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RA               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RB                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RB               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_READ_RC                  ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RC               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_special_register);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RD                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RD               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_general_register);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_WRITE_RE                 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],1);
+        DELETE2_SIGNAL( in_ISSUE_OOO_ENGINE_NUM_REG_RE               ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1],_param->_size_special_register);
 
         DELETE2_SIGNAL(out_ISSUE_EXECUTE_LOOP_VAL                    ,_param->_nb_execute_loop,_param->_nb_read_unit[it1],1);
@@ -160,9 +160,10 @@
     for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
       {
-        delete _priority_ooo_engine [i];
+//      delete _priority_ooo_engine [i];
         delete _priority_read_unit  [i];
       }
-    delete [] _priority_ooo_engine;
+//  delete [] _priority_ooo_engine;
     delete [] _priority_read_unit ;
+    delete    _priority_ooo_engine;
 
     delete _component;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp	(revision 117)
@@ -15,4 +15,43 @@
 namespace core_glue {
 
+  /*
+      OOO        SLOT     Execute Loop                                  
+    ---+                      +-----
+       |  +-----+     +-----+ |     
+      -+->|     |     |     |-+->   
+       |  |     |-()->|     | |     
+      -+->| _ _ |     |     |-+->   
+       |  | _X_ |-()->|     | |     
+      -+->|     |     |     | +-----
+       |  |     |-()->|     |       
+      -+->|     |     |     | +-----
+       |  +-----+     |     | |     
+    ---+  crossbar    | _ _ |-+->   
+                      | _X_ | |     
+    ---+              |     |-+->   
+       |  +-----+     |     | |     
+      -+->|     |     |     | +-----
+       |  |     |-()->|     |       
+      -+->| _ _ |     |     | +-----
+       |  | _X_ |-()->|     | |     
+      -+->|     |     |     |-+->   
+       |  |     |-()->|     | |     
+      -+->|     |     |     |-+->   
+       |  +-----+     +-----+ |     
+    ---+  crossbar   dispatch +-----
+  */
+
+
+// class num_read_unit_t
+//   {
+//   public : const uint32_t num_execute_loop;
+//   public : const uint32_t num_read_unit;
+    
+//   public : num_read_unit_t (uint32_t num_execute_loop,
+//                             uint32_t num_read_unit) :
+//     this->num_execute_loop (num_execute_loop),
+//     this->num_read_unit    (num_read_unit   )
+//     {};
+//   }
 
 #undef  FUNCTION
@@ -23,123 +62,326 @@
     log_function(Core_Glue,FUNCTION,_name.c_str());
 
-    Tcontrol_t ISSUE_OOO_ENGINE_ACK   [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue];
-    Tcontrol_t ISSUE_EXECUTE_LOOP_VAL [_param->_nb_execute_loop][_param->_max_nb_read_unit ];
-    bool       READ_UNIT_ENABLE       [_param->_nb_execute_loop][_param->_max_nb_read_unit ];
-
+    Tcontrol_t ISSUE_OOO_ENGINE_ACK   [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue_queue];
+    Tcontrol_t ISSUE_EXECUTE_LOOP_VAL [_param->_nb_execute_loop][_param->_max_nb_read_unit];
+    Tcontrol_t READ_UNIT_ENABLE       [_param->_nb_execute_loop][_param->_max_nb_read_unit];
+    Tcontrol_t SLOT_ENABLE            [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue_slot];
+    
     // Init -> all at 0
     for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
-      for (uint32_t j=0; j<_param->_nb_inst_issue[i]; ++j)
-        ISSUE_OOO_ENGINE_ACK [i][j] = 0;
+      {
+        for (uint32_t j=0; j<_param->_nb_inst_issue_queue[i]; ++j)
+          ISSUE_OOO_ENGINE_ACK [i][j] = 0;
+        for (uint32_t j=0; j<_param->_nb_inst_issue_slot[i]; ++j)
+          SLOT_ENABLE [i][j] = 1;         
+      }
+
     for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
       for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
         {
           ISSUE_EXECUTE_LOOP_VAL [i][j] = 0;
+
           // Read unit is enable is signal ack is set
           READ_UNIT_ENABLE       [i][j] = (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1);
-	  log_printf(TRACE,Core_Glue,FUNCTION,"  * Read_unit [%d][%d] : %d",i,j,READ_UNIT_ENABLE[i][j]);
+	  log_printf(TRACE,Core_Glue,FUNCTION,"  * Read_unit [%d][%d].enable : %d",i,j,READ_UNIT_ENABLE[i][j]);
         }
 
+//     std::list<num_read_unit_t> SLOT_TYPE [_param->_nb_ooo_engine][_param->_max_nb_inst_issue_slot][_param->_nb_type];
+
+//     // for each read_unit
+//     for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+//       for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
+//         // test if this read_unit can receive an instruction
+//         if (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1)
+//           for (uint32_t x=0; x<_nb_ooo_engine; ++x)
+//             for (uint32_t y=0; y<_nb_inst_issue_slot[y]; ++y)
+//               // test if can dispatch
+//               if (_param->_table_dispatch [x][y][i][j])
+//                 for (uint32_t k=0;k<_param->_nb_type; ++k)
+//                   // Can receive this type
+//                   if (_param->_table_dispatch [i][j][k])
+//                     SLOT_TYPE[x][y][k].push_back(num_read_unit_t(i,j));
+
+//     // Select an issue_slot of an ooo_engine
+//     std::list<generic::priority::select_t> * select_ooo_engine = _priority_ooo_engine->select();
+//     for (std::list<generic::priority::select_t>::iterator it_ooo_engine=select_ooo_engine->begin();
+//          it_ooo_engine!=select_ooo_engine->end();
+//          ++it_ooo_engine)
+//       { 
+//         // ... get id of the most priotary
+//         const uint32_t num_ooo_engine      = it_ooo_engine->grp;
+//         const uint32_t num_inst_issue_slot = it_ooo_engine->elt;
+
+//         // Test if this ooo_engine is enable (can be desable if issue in_order)
+//         if (OOO_ENGINE_ENABLE[num_ooo_engine])
+//           {
+
+//           }
+//       }
+
+    for (uint32_t num_ooo_engine=0; num_ooo_engine<_param->_nb_ooo_engine; ++num_ooo_engine)
+      for (uint32_t num_inst_issue_queue=0; num_inst_issue_queue<_param->_nb_inst_issue_queue[num_ooo_engine]; ++num_inst_issue_queue)
+        {
+          bool find = false;
+
+          Tcontrol_t val  = PORT_READ(in_ISSUE_OOO_ENGINE_VAL  [num_ooo_engine][num_inst_issue_queue]);
+          Ttype_t    type = PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue_queue]);
+
+          log_printf(TRACE,Core_Glue,FUNCTION,"  * num_ooo_engine                : %d",num_ooo_engine      );
+          log_printf(TRACE,Core_Glue,FUNCTION,"  * num_inst_issue_queue          : %d",num_inst_issue_queue);
+          log_printf(TRACE,Core_Glue,FUNCTION,"    * val                         : %d",val);
+          log_printf(TRACE,Core_Glue,FUNCTION,"    * type                        : %d",type);
+
+          if (val)
+            for (uint32_t num_inst_issue_slot=0; num_inst_issue_slot<_param->_nb_inst_issue_slot[num_ooo_engine]; ++num_inst_issue_slot)
+              {
+                log_printf(TRACE,Core_Glue,FUNCTION,"    * num_inst_issue_slot         : %d",num_inst_issue_slot);
+                
+                // scan all read_unit
+                
+                if (SLOT_ENABLE [num_ooo_engine][num_inst_issue_slot])
+                  for (uint32_t num_execute_loop=0; num_execute_loop<_param->_nb_execute_loop; ++num_execute_loop)
+                    {
+                      for (uint32_t num_read_unit=0; num_read_unit<_param->_nb_read_unit[num_execute_loop]; ++num_read_unit)
+                        {
+                          Tcontrol_t ack = READ_UNIT_ENABLE [num_execute_loop][num_read_unit];
+                          
+                          log_printf(TRACE,Core_Glue,FUNCTION,"      * num_execute_loop          : %d",num_execute_loop);
+                          log_printf(TRACE,Core_Glue,FUNCTION,"      * num_read_unit             : %d",num_read_unit   );
+                          log_printf(TRACE,Core_Glue,FUNCTION,"        * read_unit_enable        : %d",ack             );
+                          
+                          // test if :
+                          //  * read_unit can accept an instruction (valid and no previous instruction)
+                          //  * slot can issue an instruction at this read_unit
+                          //  * read_unit can accept this type
+                          if (ack and
+                              _param->_table_dispatch [num_ooo_engine][num_inst_issue_slot][num_execute_loop][num_read_unit] and
+                              _param->_table_issue_type [num_execute_loop][num_read_unit][type])
+                            {
+                              log_printf(TRACE,Core_Glue,FUNCTION,"  * find !!!");
+
+                              // find !
+                              // Transaction
+                              READ_UNIT_ENABLE       [num_execute_loop][num_read_unit] = false; // now, this read_unit is busy
+                              ISSUE_EXECUTE_LOOP_VAL [num_execute_loop][num_read_unit] = 1; // = val
+                              ISSUE_OOO_ENGINE_ACK   [num_ooo_engine][num_inst_issue_queue] = 1; // = ack
+                              SLOT_ENABLE            [num_ooo_engine][num_inst_issue_slot]  = false; // now this slot is used
+                                      
+			      if (_param->_have_port_context_id)
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID            [num_ooo_engine][num_inst_issue_queue]));
+			      if (_param->_have_port_front_end_id)
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID          [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID          [num_ooo_engine][num_inst_issue_queue]));
+			      if (_param->_have_port_ooo_engine_id)
+                                {
+                              Tcontext_t ooo_engine_id = 0;
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID         [num_execute_loop][num_read_unit],ooo_engine_id);
+                                }
+			      if (_param->_have_port_rob_ptr)
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID             [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID             [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION             [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION             [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE                  [num_execute_loop][num_read_unit],type);
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue_queue]));
+			      if (_param->_have_port_load_queue_ptr)
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE  [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE  [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT          [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT          [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT              [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT              [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA               [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA               [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA            [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB               [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB               [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB            [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC               [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC               [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC            [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD              [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD              [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD            [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE              [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE              [num_ooo_engine][num_inst_issue_queue]));
+			      PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE            [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE            [num_ooo_engine][num_inst_issue_queue]));
+                              
+                              
+                              find = true;
+                              break;
+                            }
+                          //if (find)
+                          //  break;
+                        }
+                      if (find)
+                        break;
+                    }
+                if (find)
+                  break;
+              }
+          
+          if (_param->_issue_queue_in_order [num_ooo_engine] and
+              not find and 
+              (num_inst_issue_queue >= _param->_nb_inst_reexecute [num_ooo_engine]))
+            {
+              log_printf(TRACE,Core_Glue,FUNCTION,"  * stop scan !!!");
+              
+              break; // stop scan
+            }
+        }
+
+    // Write output
+    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
+      for (uint32_t j=0; j<_param->_nb_inst_issue_queue[i]; ++j)
+        PORT_WRITE(out_ISSUE_OOO_ENGINE_ACK [i][j], ISSUE_OOO_ENGINE_ACK [i][j]);
+    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+      for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
+        PORT_WRITE(out_ISSUE_EXECUTE_LOOP_VAL [i][j], ISSUE_EXECUTE_LOOP_VAL [i][j]);
+
+    log_end(Core_Glue,FUNCTION);
+  };
+
+}; // end namespace core_glue
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
+
+    /*
+    bool       OOO_ENGINE_ENABLE      [_param->_nb_ooo_engine  ];
+    Tcontrol_t SLOT_ENABLE            [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue_slot];
+    bool       READ_UNIT_ENABLE       [_param->_nb_execute_loop][_param->_max_nb_read_unit];
+
+    // Init -> all at 0
+    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
+      {
+        OOO_ENGINE_ENABLE [i] = true;
+
+        for (uint32_t j=0; j<_param->_nb_inst_issue_slot[i]; ++j)
+          SLOT_ENABLE [i][j] = 1;         
+      }
+
+    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
+      for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
+        {
+          // Read unit is enable is signal ack is set
+          READ_UNIT_ENABLE       [i][j] = (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1);
+	  log_printf(TRACE,Core_Glue,FUNCTION,"  * Read_unit [%d][%d].enable : %d",i,j,READ_UNIT_ENABLE[i][j]);
+        }
+
+
+    // for each execute_loop
     for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
       {
-        log_printf(TRACE,Core_Glue,FUNCTION,"  * execute_loop [%d]",i);
-
-	// for each issue of each ooo_engine ...
-        std::list<generic::priority::select_t> * select_ooo_engine = _priority_ooo_engine[i]->select();
-        for (std::list<generic::priority::select_t>::iterator it_ooo_engine=select_ooo_engine->begin();
-             it_ooo_engine!=select_ooo_engine->end();
-             ++it_ooo_engine)
+        // Scan all read_unit
+        std::list<generic::priority::select_t> * select_read_unit = _priority_read_unit[i]->select();
+        for (std::list<generic::priority::select_t>::iterator it_read_unit=select_read_unit->begin();
+             it_read_unit!=select_read_unit->end();
+             ++it_read_unit)
           {
-	    // get id
-            const uint32_t ooo_engine_id  = it_ooo_engine->grp;
-            const uint32_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][ooo_engine_id];
-            const uint32_t num_inst_issue = it_ooo_engine->elt;
-
-            log_printf(TRACE,Core_Glue,FUNCTION,"    * num_ooo_engine [%d] (id -> %d)",num_ooo_engine, ooo_engine_id);
-            log_printf(TRACE,Core_Glue,FUNCTION,"    * num_inst_issue          : %d",num_inst_issue);
-
-            Tcontrol_t ooo_engine_val = PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]);
-
-            log_printf(TRACE,Core_Glue,FUNCTION,"    * ISSUE_OOO_ENGINE_VAL    : %d",ooo_engine_val);
-
-            // test if have a request ?
-// 	    if (ooo_engine_val)
+            // get the most priotary ...
+            uint32_t num_read_unit = it_read_unit->grp;
+            
+            log_printf(TRACE,Core_Glue,FUNCTION,"  * read_unit [%d][%d]",i,num_read_unit);
+
+            // ... and test if this read_unit is valid
+            if (READ_UNIT_ENABLE [i][num_read_unit])
               {
-//              // If ooo_engine can issue instruction on multiple execute_loop
-//              if (not ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue])
-
-		// Scan all read_unit
-                std::list<generic::priority::select_t> * select_read_unit = _priority_read_unit[i]->select();
-                for (std::list<generic::priority::select_t>::iterator it_read_unit=select_read_unit->begin();
-                     it_read_unit!=select_read_unit->end();
-                     ++it_read_unit)
-                  {
-                    uint32_t num_read_unit = it_read_unit->grp;
-		    
-		    // Test if have an link and read unit is enable
-		    log_printf(TRACE,Core_Glue,FUNCTION,"      * read_unit             : %d",num_read_unit);
-		    log_printf(TRACE,Core_Glue,FUNCTION,"        * READ_UNIT_ENABLE    : %d",READ_UNIT_ENABLE [i][num_read_unit]);
-		    log_printf(TRACE,Core_Glue,FUNCTION,"        * table_dispatch      : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]);
-		    
-		    Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit];
-
-		    // Test if the read_unit is not busy and if an link is between the issue slot and read_unit
-		    if (read_unit_enable and 
-			_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit])
-		      {
-			log_printf(TRACE,Core_Glue,FUNCTION,"        * find !!!");
-			
-			// Transaction
-			READ_UNIT_ENABLE       [i][num_read_unit] = false; // now, this read_unit is busy
-			ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val; // = 1
-			ISSUE_OOO_ENGINE_ACK   [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1
-			
-			if (_param->_have_port_context_id)
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID            [num_ooo_engine][num_inst_issue]));
-			if (_param->_have_port_front_end_id)
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID          [num_ooo_engine][num_inst_issue]));
-			if (_param->_have_port_ooo_engine_id)
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID         [i][num_read_unit],ooo_engine_id);
-			if (_param->_have_port_rob_ptr)
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID             [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION             [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE                  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE                  [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue]));
-			if (_param->_have_port_load_queue_ptr)
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE  [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT          [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT              [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA               [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA            [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB               [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB            [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC               [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC            [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD              [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD            [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE              [num_ooo_engine][num_inst_issue]));
-			PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE            [num_ooo_engine][num_inst_issue]));
-
-			break; // find : stop scan read_unit
-		      }
+                bool find = false;
+                
+                // This read_unit is valid, now find an valid instruction
+                // for each issue of each ooo_engine ...
+                std::list<generic::priority::select_t> * select_ooo_engine = _priority_ooo_engine[i]->select();
+                for (std::list<generic::priority::select_t>::iterator it_ooo_engine=select_ooo_engine->begin();
+                     it_ooo_engine!=select_ooo_engine->end();
+                     ++it_ooo_engine)
+                  { 
+                    // ... get id of the most priotary
+                    const uint32_t ooo_engine_id       = it_ooo_engine->grp;
+                    const uint32_t num_ooo_engine      = _param->_translate_execute_loop_num_ooo_engine [i][ooo_engine_id];
+                    const uint32_t num_inst_issue_slot = it_ooo_engine->elt;
+                    
+                    log_printf(TRACE,Core_Glue,FUNCTION,"    * num_ooo_engine [%d (%d)][%d]",num_ooo_engine, ooo_engine_id,num_inst_issue_slot);
+                    
+                    if (OOO_ENGINE_ENABLE [num_ooo_engine] and SLOT_ENABLE [num_ooo_engine][num_inst_issue_slot])
+                      {
+                        uint32_t num_inst_issue_queue = 0;
+                        for (; num_inst_issue_queue < _param->_nb_inst_issue_queue [num_ooo_engine]; num_inst_issue_queue ++)
+                          {
+                            // Test if this instruction is not previously send at a read_unit
+                            if (not ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue_queue])
+                              {
+                                Tcontrol_t ooo_engine_val = PORT_READ(in_ISSUE_OOO_ENGINE_VAL  [num_ooo_engine][num_inst_issue_queue]);
+                                Ttype_t    type           = PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue_queue]);
+                                // Test if have an link and read unit is enable
+                                bool can_dispatch   = _param->_table_dispatch [num_ooo_engine][num_inst_issue_slot][i][num_read_unit];
+                                bool can_issue_type = _param->_table_issue_type [i][num_read_unit][type];
+                                
+                                log_printf(TRACE,Core_Glue,FUNCTION,"      * num_ooo_engine_queue  : %d",num_inst_issue_queue);
+                                log_printf(TRACE,Core_Glue,FUNCTION,"      * type                  : %s",toString(type).c_str());
+                                log_printf(TRACE,Core_Glue,FUNCTION,"      * ISSUE_OOO_ENGINE_VAL  : %d",ooo_engine_val);
+                                log_printf(TRACE,Core_Glue,FUNCTION,"      * table_dispatch        : %d",can_dispatch);
+                                log_printf(TRACE,Core_Glue,FUNCTION,"      * table_issue_type      : %d",can_issue_type);
+                                
+                                
+                                // test if have a request ?
+                                // and test if have a link between the issue slot and read_unit 
+                                // and if the read_unit accept this instruction's type
+                                if (ooo_engine_val and 
+                                    can_dispatch   and
+                                    can_issue_type)
+                                  {
+//                                     log_printf(TRACE,Core_Glue,FUNCTION,"          * find !!!");
+                                    
+                                    // Transaction
+                                    READ_UNIT_ENABLE       [i][num_read_unit] = false; // now, this read_unit is busy
+                                    ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val;
+                                    ISSUE_OOO_ENGINE_ACK   [num_ooo_engine][num_inst_issue_queue] = 1;
+                                    SLOT_ENABLE            [num_ooo_engine][num_inst_issue_slot]  = 0; // now this slot is used
+                                      
+			            if (_param->_have_port_context_id)
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID            [num_ooo_engine][num_inst_issue_queue]));
+			            if (_param->_have_port_front_end_id)
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID          [num_ooo_engine][num_inst_issue_queue]));
+			            if (_param->_have_port_ooo_engine_id)
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID         [i][num_read_unit],ooo_engine_id);
+			            if (_param->_have_port_rob_ptr)
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID             [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION             [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION             [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE                  [i][num_read_unit],type);
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue_queue]));
+			            if (_param->_have_port_load_queue_ptr)
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE  [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE  [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT          [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT          [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT              [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA               [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA            [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB               [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB            [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC               [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC               [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC            [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD              [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD            [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE              [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE              [num_ooo_engine][num_inst_issue_queue]));
+			            PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE            [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE            [num_ooo_engine][num_inst_issue_queue]));
+                                    
+                                    find = true;// find : stop scan read_unit
+                                  }
+                              }
+                            if (find)
+                              break;
+                          }
+
+                        if (find)
+                          {
+                            log_printf(TRACE,Core_Glue,FUNCTION,"    * find !!!");
+                            break;
+                          }
+                        else
+                          {
+                            log_printf(TRACE,Core_Glue,FUNCTION,"    * not find !!!");
+                            log_printf(TRACE,Core_Glue,FUNCTION,"      * issue_queue_in_order: %d",_param->_issue_queue_in_order [num_ooo_engine]);
+                            log_printf(TRACE,Core_Glue,FUNCTION,"      * num_inst_issue_queue: %d",num_inst_issue_queue);
+                            log_printf(TRACE,Core_Glue,FUNCTION,"      * nb_inst_reexecute   : %d",_param->_nb_inst_reexecute [num_ooo_engine]);
+
+                            if (_param->_issue_queue_in_order [num_ooo_engine] and
+                                (num_inst_issue_queue >= _param->_nb_inst_reexecute [num_ooo_engine]))
+                                OOO_ENGINE_ENABLE [num_ooo_engine] = false;
+                          }
+                      }
                   }
               }
           }
       }
-
-    // Write output
-    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
-      for (uint32_t j=0; j<_param->_nb_inst_issue[i]; ++j)
-        PORT_WRITE(out_ISSUE_OOO_ENGINE_ACK [i][j], ISSUE_OOO_ENGINE_ACK [i][j]);
-    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
-      for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
-        PORT_WRITE(out_ISSUE_EXECUTE_LOOP_VAL [i][j], ISSUE_EXECUTE_LOOP_VAL [i][j]);
-
-    log_end(Core_Glue,FUNCTION);
-  };
-
-}; // end namespace core_glue
-}; // end namespace core
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
+    */ 
+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp	(revision 117)
@@ -25,7 +25,9 @@
         for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
           {
-            _priority_ooo_engine [i]->reset();
+//          _priority_ooo_engine [i]->reset();
             _priority_read_unit  [i]->reset();
           }
+        _priority_ooo_engine->reset();
+  
       }
     else
@@ -34,7 +36,8 @@
         for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
           {
-            _priority_ooo_engine [i]->transition();
+//          _priority_ooo_engine [i]->transition();
             _priority_read_unit  [i]->transition();
           }
+        _priority_ooo_engine->transition();
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp	(revision 117)
@@ -30,6 +30,9 @@
    uint32_t              * ooo_engine_nb_inst_branch_complete   ,//[nb_ooo_engine]
    uint32_t              * nb_inst_insert                       ,//[nb_ooo_engine]
-   uint32_t              * nb_inst_issue                        ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_reexecute                    ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_issue_queue                  ,//[nb_ooo_engine]
+   uint32_t              * nb_inst_issue_slot                   ,//[nb_ooo_engine]
    uint32_t             ** nb_inst_execute                      ,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
+   bool                  * issue_queue_in_order                 ,//[nb_ooo_engine]
    uint32_t              * nb_read_unit                         ,//[nb_execute_loop]
    uint32_t              * nb_write_unit                        ,//[nb_execute_loop]
@@ -44,5 +47,6 @@
    Tpriority_t             dispatch_priority                    ,
    Tload_balancing_t       dispatch_load_balancing              ,
-   bool               **** table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue][execute_loop][nb_read_unit]
+   bool               **** table_dispatch                       ,//[nb_ooo_engine][nb_inst_issue_slot][execute_loop][nb_read_unit]
+   bool                *** table_issue_type                     ,//                                   [execute_loop][nb_read_unit][nb_type]
    uint32_t             ** translate_ooo_engine_num_front_end   ,//[nb_ooo_engine][ooo_engine_nb_front_end]
    uint32_t             ** translate_ooo_engine_num_execute_loop,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
@@ -63,6 +67,9 @@
     _ooo_engine_nb_inst_branch_complete    = ooo_engine_nb_inst_branch_complete   ;
     _nb_inst_insert                        = nb_inst_insert                       ;
-    _nb_inst_issue                         = nb_inst_issue                        ;
+    _nb_inst_reexecute                     = nb_inst_reexecute                    ;
+    _nb_inst_issue_queue                   = nb_inst_issue_queue                  ;
+    _nb_inst_issue_slot                    = nb_inst_issue_slot                   ;
     _nb_inst_execute                       = nb_inst_execute                      ;
+    _issue_queue_in_order                  = issue_queue_in_order                 ;
     _nb_read_unit                          = nb_read_unit                         ;
     _nb_write_unit                         = nb_write_unit                        ;
@@ -70,4 +77,5 @@
     _dispatch_load_balancing               = dispatch_load_balancing              ;
     _table_dispatch                        = table_dispatch                       ;
+    _table_issue_type                      = table_issue_type                     ;
     _translate_ooo_engine_num_front_end    = translate_ooo_engine_num_front_end   ;
     _translate_ooo_engine_num_execute_loop = translate_ooo_engine_num_execute_loop;
@@ -78,5 +86,4 @@
     ALLOC1(_link_ooo_engine_with_front_end,uint32_t,_nb_front_end);
     ALLOC1(_translate_num_front_end_to_ooo_engine_front_end_id,uint32_t,_nb_front_end);
-
     for (uint32_t i=0; i<_nb_ooo_engine; ++i)
       for (uint32_t j=0; j<_ooo_engine_nb_front_end[i]; ++j)
@@ -102,5 +109,5 @@
 
     ALLOC2(_execute_loop_nb_inst_insert,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
-    ALLOC2(_execute_loop_nb_inst_issue ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
+    ALLOC2(_execute_loop_nb_inst_issue_slot ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
 
     for (uint32_t i=0; i<_nb_execute_loop; ++i)
@@ -108,6 +115,6 @@
         {
           uint32_t num_ooo_engine = _translate_execute_loop_num_ooo_engine [i][j];
-          _execute_loop_nb_inst_issue  [i][j] = _nb_inst_issue  [num_ooo_engine];
-          _execute_loop_nb_inst_insert [i][j] = _nb_inst_insert [num_ooo_engine];
+          _execute_loop_nb_inst_issue_slot [i][j] = _nb_inst_issue_slot [num_ooo_engine];
+          _execute_loop_nb_inst_insert     [i][j] = _nb_inst_insert     [num_ooo_engine];
         }
 
@@ -118,5 +125,6 @@
     _max_nb_write_unit                      = max<uint32_t>(_nb_write_unit             ,_nb_execute_loop);
     _max_nb_inst_insert                     = max<uint32_t>(_nb_inst_insert            ,_nb_ooo_engine);
-    _max_nb_inst_issue                      = max<uint32_t>(_nb_inst_issue             ,_nb_ooo_engine);
+    _max_nb_inst_issue_queue                = max<uint32_t>(_nb_inst_issue_queue       ,_nb_ooo_engine);
+    _max_nb_inst_issue_slot                 = max<uint32_t>(_nb_inst_issue_slot        ,_nb_ooo_engine);
     _max_nb_read_unit                       = max<uint32_t>(_nb_read_unit              ,_nb_execute_loop);
 
@@ -171,5 +179,5 @@
     log_begin(Core_Glue,FUNCTION);
 
-    DELETE2(_execute_loop_nb_inst_issue,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
+    DELETE2(_execute_loop_nb_inst_issue_slot,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
     DELETE2(_execute_loop_nb_inst_insert,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
     DELETE2(_translate_num_execute_loop_to_ooo_engine_execute_loop_id, _nb_execute_loop,_execute_loop_nb_ooo_engine[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Dcache_Access/src/Dcache_Access_genMealy_req.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Dcache_Access/src/Dcache_Access_genMealy_req.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Dcache_Access/src/Dcache_Access_genMealy_req.cpp	(revision 117)
@@ -52,4 +52,6 @@
 		uint32_t   num_port       = _param->_table_routing[num_execute_loop][num_load_store_unit][num_cache_access];
 		Tcontrol_t dcache_req_ack = PORT_READ(in_DCACHE_REQ_ACK [num_port]);
+
+                log_printf(TRACE,Dcache_Access,FUNCTION,"  * num_port      : %d",num_port);
 		
 #ifdef STATISTICS
@@ -66,8 +68,15 @@
 		    lsq_req_ack [num_execute_loop][num_load_store_unit][num_cache_access] = dcache_req_ack;
 		    
+                    log_printf(TRACE,Dcache_Access,FUNCTION,"    * kane - dcache");
+
 		    if (_param->_have_port_dcache_thread_id)
                       {
 		    Tcontext_t num_context = (_param->_have_port_lsq_thread_id [num_execute_loop][num_load_store_unit])?PORT_READ(in_LSQ_REQ_THREAD_ID [num_execute_loop][num_load_store_unit][num_cache_access]):0;
-                    PORT_WRITE(out_DCACHE_REQ_THREAD_ID [num_port], _param->_translate_load_store_unit_to_thread[num_execute_loop][num_load_store_unit][num_context]);
+                    Tcontext_t num_thread  = _param->_translate_load_store_unit_to_thread[num_execute_loop][num_load_store_unit][num_context];
+                    log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_context : %d",num_context);
+                    log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_thread  : %d",num_thread );
+
+
+                    PORT_WRITE(out_DCACHE_REQ_THREAD_ID [num_port], num_thread);
                       }
 // 		    PORT_WRITE(out_DCACHE_REQ_THREAD_ID [num_port], ((num_execute_loop    << _param->_shift_num_execute_loop   )+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp	(revision 117)
@@ -50,4 +50,6 @@
 	    Tcontrol_t icache_req_ack = PORT_READ(in_ICACHE_REQ_ACK [num_port]);
 
+            log_printf(TRACE,Dcache_Access,FUNCTION,"  * num_port      : %d",num_port);
+
 #ifdef STATISTICS
 	    if (icache_req_ack)
@@ -63,6 +65,14 @@
 		context_req_ack [num_front_end][num_context] = icache_req_ack;
 
+                log_printf(TRACE,Dcache_Access,FUNCTION,"    * kane - icache");
+
 		if (_param->_have_port_icache_thread_id)
-		PORT_WRITE(out_ICACHE_REQ_THREAD_ID [num_port], _param->_translate_context_to_thread[num_front_end][num_context]);
+                  {
+                Tcontext_t num_thread = _param->_translate_context_to_thread[num_front_end][num_context];
+                log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_context : %d",num_context);
+                log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_thread  : %d",num_thread );
+
+		PORT_WRITE(out_ICACHE_REQ_THREAD_ID [num_port], num_thread);
+                  }
 // 		if (_param->_have_port_icache_packet_id)
                 if (_param->_have_port_packet_id [num_front_end][num_context])
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Parameters_msg_error.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Parameters_msg_error.cpp	(revision 117)
@@ -44,15 +44,18 @@
     
     for (uint32_t i=0; i<_nb_front_end; i++)
-      for (uint32_t j=0; j<_nb_context [i]; j++)
-        {
-          uint32_t num_thread = _translate_context_to_thread [i][j];
-          if (num_thread >= _nb_thread)
-            test.error(toString(_("Context [%d][%d] is linked with an invalid thread id.\n"),i,j));
-          else
-            if (thread_link [num_thread] == true)
-              test.error(toString(_("Context [%d][%d] is linked with an already used thread id.\n"),i,j));
+      {
+        for (uint32_t j=0; j<_nb_context [i]; j++)
+          {
+            uint32_t num_thread = _translate_context_to_thread [i][j];
+
+            if (num_thread >= _nb_thread)
+              test.error(toString(_("Context [%d][%d] is linked with an invalid thread id.\n"),i,j));
             else
-              thread_link [num_thread] = true;
-        }
+              if (thread_link [num_thread] == true)
+                test.error(toString(_("Context [%d][%d] is linked with an already used thread id.\n"),i,j));
+              else
+                thread_link [num_thread] = true;
+          }
+      }
 
     for (uint32_t i=0; i<_nb_thread; ++i)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp	(revision 117)
@@ -26,17 +26,20 @@
     log_function(Functionnal_unit,FUNCTION,_name.c_str());
 
-    {
-      internal_EXECUTE_OUT_VAL = (reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0));
-      
-      PORT_WRITE(out_EXECUTE_OUT_VAL          , internal_EXECUTE_OUT_VAL);
-    }
-
-    {
-      internal_EXECUTE_IN_ACK = (not reg_BUSY_IN or
-                                 (reg_BUSY_IN and (not reg_BUSY_OUT or 
-                                                   (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK)))));
-      
-      PORT_WRITE(out_EXECUTE_IN_ACK           , internal_EXECUTE_IN_ACK);
-    }
+    if (PORT_READ(in_NRESET) != 0)
+      {
+        {
+          internal_EXECUTE_OUT_VAL = (reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0));
+          
+          PORT_WRITE(out_EXECUTE_OUT_VAL          , internal_EXECUTE_OUT_VAL);
+        }
+        
+        {
+          internal_EXECUTE_IN_ACK = (not reg_BUSY_IN or
+                                     (reg_BUSY_IN and (not reg_BUSY_OUT or 
+                                                       (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK)))));
+          
+          PORT_WRITE(out_EXECUTE_IN_ACK           , internal_EXECUTE_IN_ACK);
+        }
+      }
 
     log_end(Functionnal_unit,FUNCTION);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp	(revision 117)
@@ -60,5 +60,4 @@
 
         if (reg_BUSY_IN and not reg_BUSY_OUT)
-//      if (not reg_BUSY_OUT_old or)
 	  {
 	    reg_BUSY_OUT = reg_BUSY_IN;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp	(revision 117)
@@ -70,5 +70,58 @@
   sc_signal<Tcontrol_t>                  * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
-    // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  sc_signal<Tcontrol_t        > **  in_MEMORY_IN_VAL                  ;
+  sc_signal<Tcontrol_t        > ** out_MEMORY_IN_ACK                  ;
+  sc_signal<Tcontext_t        > **  in_MEMORY_IN_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        > **  in_MEMORY_IN_FRONT_END_ID         ;
+  sc_signal<Tcontext_t        > **  in_MEMORY_IN_OOO_ENGINE_ID        ;
+  sc_signal<Tpacket_t         > **  in_MEMORY_IN_PACKET_ID            ;
+  sc_signal<Toperation_t      > **  in_MEMORY_IN_OPERATION            ;
+  sc_signal<Ttype_t           > **  in_MEMORY_IN_TYPE                 ;
+  sc_signal<Tlsq_ptr_t        > **  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t        > **  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t        > **  in_MEMORY_IN_HAS_IMMEDIAT         ;
+  sc_signal<Tgeneral_data_t   > **  in_MEMORY_IN_IMMEDIAT             ;
+  sc_signal<Tgeneral_data_t   > **  in_MEMORY_IN_DATA_RA              ;
+  sc_signal<Tgeneral_data_t   > **  in_MEMORY_IN_DATA_RB              ;
+  sc_signal<Tspecial_data_t   > **  in_MEMORY_IN_DATA_RC              ;
+  sc_signal<Tcontrol_t        > **  in_MEMORY_IN_WRITE_RD             ;
+  sc_signal<Tgeneral_address_t> **  in_MEMORY_IN_NUM_REG_RD           ;
+  sc_signal<Tcontrol_t        > **  in_MEMORY_IN_WRITE_RE             ;
+  sc_signal<Tspecial_address_t> **  in_MEMORY_IN_NUM_REG_RE           ;
+  sc_signal<Tcontrol_t        > ** out_MEMORY_OUT_VAL                 ;
+  sc_signal<Tcontrol_t        > **  in_MEMORY_OUT_ACK                 ;
+  sc_signal<Tcontext_t        > ** out_MEMORY_OUT_CONTEXT_ID          ;
+  sc_signal<Tcontext_t        > ** out_MEMORY_OUT_FRONT_END_ID        ;
+  sc_signal<Tcontext_t        > ** out_MEMORY_OUT_OOO_ENGINE_ID       ;
+  sc_signal<Tpacket_t         > ** out_MEMORY_OUT_PACKET_ID           ;
+//sc_signal<Toperation_t      > ** out_MEMORY_OUT_OPERATION           ;
+//sc_signal<Ttype_t           > ** out_MEMORY_OUT_TYPE                ;
+  sc_signal<Tcontrol_t        > ** out_MEMORY_OUT_WRITE_RD            ;
+  sc_signal<Tgeneral_address_t> ** out_MEMORY_OUT_NUM_REG_RD          ;
+  sc_signal<Tgeneral_data_t   > ** out_MEMORY_OUT_DATA_RD             ;
+  sc_signal<Tcontrol_t        > ** out_MEMORY_OUT_WRITE_RE            ;
+  sc_signal<Tspecial_address_t> ** out_MEMORY_OUT_NUM_REG_RE          ;
+  sc_signal<Tspecial_data_t   > ** out_MEMORY_OUT_DATA_RE             ;
+  sc_signal<Texception_t      > ** out_MEMORY_OUT_EXCEPTION           ;
+  sc_signal<Tcontrol_t        > ** out_MEMORY_OUT_NO_SEQUENCE         ;
+  sc_signal<Taddress_t        > ** out_MEMORY_OUT_ADDRESS             ;
+  sc_signal<Tcontrol_t        > ** out_DCACHE_REQ_VAL                 ;
+  sc_signal<Tcontrol_t        > **  in_DCACHE_REQ_ACK                 ;
+  sc_signal<Tcontext_t        > ** out_DCACHE_REQ_CONTEXT_ID          ;
+  sc_signal<Tpacket_t         > ** out_DCACHE_REQ_PACKET_ID           ;
+  sc_signal<Tdcache_address_t > ** out_DCACHE_REQ_ADDRESS             ;
+  sc_signal<Tdcache_type_t    > ** out_DCACHE_REQ_TYPE                ;
+  sc_signal<Tdcache_data_t    > ** out_DCACHE_REQ_WDATA               ;
+  sc_signal<Tcontrol_t        > **  in_DCACHE_RSP_VAL                 ;
+  sc_signal<Tcontrol_t        > ** out_DCACHE_RSP_ACK                 ;
+  sc_signal<Tcontext_t        > **  in_DCACHE_RSP_CONTEXT_ID          ;
+  sc_signal<Tpacket_t         > **  in_DCACHE_RSP_PACKET_ID           ;
+  sc_signal<Tdcache_data_t    > **  in_DCACHE_RSP_RDATA               ;
+  sc_signal<Tdcache_error_t   > **  in_DCACHE_RSP_ERROR               ;
+  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL              ;
+  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID    ;
+  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG          ;
+  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA             ;
+
   ALLOC1_SC_SIGNAL( in_MEMORY_IN_VAL                  ," in_MEMORY_IN_VAL                  ",Tcontrol_t        ,_param->_nb_inst_memory);
   ALLOC1_SC_SIGNAL(out_MEMORY_IN_ACK                  ,"out_MEMORY_IN_ACK                  ",Tcontrol_t        ,_param->_nb_inst_memory);
@@ -379,5 +432,6 @@
 	  tab_request[66].modif(550,0,0,0,65,OPERATION_MEMORY_LOAD_32_Z    ,TYPE_MEMORY,1,0,0x0  ,0x0          ,0x0       ,1,0,0,0x55508570); // just to wait the dcache_rsp
 
-	  const uint32_t nb_request = 64;//_param->_nb_packet;
+	  const uint32_t nb_request = 66;//_param->_nb_packet;
+// 	  const uint32_t nb_request = 64;//_param->_nb_packet;
         
 	  for (uint32_t i=0; i<nb_request; i++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h	(revision 117)
@@ -157,7 +157,7 @@
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-  protected : Tstore_queue_entry_t                                        * _store_queue;
-  protected : Tload_queue_entry_t                                         * _load_queue;
-  protected : Tspeculative_access_queue_entry_t                           * _speculative_access_queue;
+  protected : Tstore_queue_entry_t                                        * _store_queue                     ;//[size_store_queue]
+  protected : Tload_queue_entry_t                                         * _load_queue                      ;//[size_load_queue]
+  protected : Tspeculative_access_queue_entry_t                           * _speculative_access_queue        ;//[size_speculative_access_queue]
   protected : morpheo::behavioural::generic::queue_control::Queue_Control * _speculative_access_queue_control;
 
@@ -174,7 +174,8 @@
 
     // Registers
-  public    : Tlsq_ptr_t                      reg_STORE_QUEUE_PTR_READ;
-//public    : Tlsq_ptr_t                      reg_LOAD_QUEUE_PTR_READ ;
-  public    : Tlsq_ptr_t                      reg_LOAD_QUEUE_CHECK_PRIORITY ;
+  public    : Tlsq_ptr_t                    * reg_STORE_QUEUE_NB_CHECK     ;//[size_store_queue]
+  public    : Tlsq_ptr_t                      reg_STORE_QUEUE_PTR_READ     ;
+//public    : Tlsq_ptr_t                      reg_LOAD_QUEUE_PTR_READ      ;
+  public    : Tlsq_ptr_t                      reg_LOAD_QUEUE_CHECK_PRIORITY;
 
     // signal
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp	(revision 117)
@@ -146,15 +146,25 @@
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    if (usage_is_set(_usage,USE_SYSTEMC))
+      {
+        _speculative_access_queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control (_param->_size_speculative_access_queue);
 
-//     internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ = new Tlsq_ptr_t [_param->_nb_cache_port];
+        ALLOC1(_store_queue             ,Tstore_queue_entry_t             ,_param->_size_store_queue);
+        ALLOC1(_load_queue              ,Tload_queue_entry_t              ,_param->_size_load_queue);
+        ALLOC1(_speculative_access_queue,Tspeculative_access_queue_entry_t,_param->_size_speculative_access_queue);
 
-//     internal_MEMORY_IN_ACK           = new Tcontrol_t      [_param->_nb_inst_memory];
-//     internal_MEMORY_OUT_VAL          = new Tcontrol_t      [_param->_nb_inst_memory];
-//     internal_MEMORY_OUT_SELECT_QUEUE = new Tselect_queue_t [_param->_nb_inst_memory];
-//     internal_MEMORY_OUT_PTR          = new Tlsq_ptr_t      [_param->_nb_inst_memory];
-    
-//     internal_DCACHE_RSP_ACK          = new Tcontrol_t      [_param->_nb_cache_port];
-//     internal_DCACHE_REQ_VAL          = new Tcontrol_t      [_param->_nb_cache_port];
-//     internal_DCACHE_REQ_SELECT_QUEUE = new Tselect_queue_t [_param->_nb_cache_port];
+        ALLOC1(reg_STORE_QUEUE_NB_CHECK                  ,Tlsq_ptr_t     ,_param->_size_store_queue);
+
+//      ALLOC1(internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ,Tlsq_ptr_t     ,_param->_nb_cache_port);
+
+//      ALLOC1(internal_MEMORY_IN_ACK                    ,Tcontrol_t     ,_param->_nb_inst_memory);
+//      ALLOC1(internal_MEMORY_OUT_VAL                   ,Tcontrol_t     ,_param->_nb_inst_memory);
+//      ALLOC1(internal_MEMORY_OUT_SELECT_QUEUE          ,Tselect_queue_t,_param->_nb_inst_memory);
+//      ALLOC1(internal_MEMORY_OUT_PTR                   ,Tlsq_ptr_t     ,_param->_nb_inst_memory);
+                                                         
+//      ALLOC1(internal_DCACHE_RSP_ACK                   ,Tcontrol_t     ,_param->_nb_cache_port );
+//      ALLOC1(internal_DCACHE_REQ_VAL                   ,Tcontrol_t     ,_param->_nb_cache_port );
+//      ALLOC1(internal_DCACHE_REQ_SELECT_QUEUE          ,Tselect_queue_t,_param->_nb_cache_port );
+      }
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
@@ -164,9 +174,4 @@
       _component->generate_file();
 #endif
-
-    _store_queue                      = new Tstore_queue_entry_t              [_param->_size_store_queue];
-    _load_queue	                      = new Tload_queue_entry_t               [_param->_size_load_queue];
-    _speculative_access_queue         = new Tspeculative_access_queue_entry_t [_param->_size_speculative_access_queue];
-    _speculative_access_queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control (_param->_size_speculative_access_queue);
 
     log_printf(FUNC,Load_store_unit,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp	(revision 117)
@@ -95,15 +95,22 @@
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    delete    _speculative_access_queue_control ;
     
-//     delete [] internal_MEMORY_IN_ACK          ;
-//     delete [] internal_MEMORY_OUT_VAL         ;
-//     delete [] internal_MEMORY_OUT_SELECT_QUEUE;
-//     delete [] internal_MEMORY_OUT_PTR         ;
-    
-//     delete [] internal_DCACHE_RSP_ACK         ;
-//     delete [] internal_DCACHE_REQ_VAL         ;
-//     delete [] internal_DCACHE_REQ_SELECT_QUEUE;
+    DELETE1(_store_queue             ,_param->_size_store_queue);
+    DELETE1(_load_queue              ,_param->_size_load_queue);
+    DELETE1(_speculative_access_queue,_param->_size_speculative_access_queue);
 
-//     delete [] internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ;
+    DELETE1(reg_STORE_QUEUE_NB_CHECK                  ,_param->_size_store_queue);
+
+//  DELETE1(internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ,_param->_nb_cache_port);
+
+//  DELETE1(internal_MEMORY_IN_ACK                    ,_param->_nb_inst_memory);
+//  DELETE1(internal_MEMORY_OUT_VAL                   ,_param->_nb_inst_memory);
+//  DELETE1(internal_MEMORY_OUT_SELECT_QUEUE          ,_param->_nb_inst_memory);
+//  DELETE1(internal_MEMORY_OUT_PTR                   ,_param->_nb_inst_memory);
+                                                     
+//  DELETE1(internal_DCACHE_RSP_ACK                   ,_param->_nb_cache_port );
+//  DELETE1(internal_DCACHE_REQ_VAL                   ,_param->_nb_cache_port );
+//  DELETE1(internal_DCACHE_REQ_SELECT_QUEUE          ,_param->_nb_cache_port );
       }
 
@@ -112,8 +119,4 @@
     delete    _component;
 
-    delete [] _store_queue                      ;
-    delete [] _load_queue	                ;
-    delete    _speculative_access_queue_control ;
-    delete [] _speculative_access_queue         ;
 
     log_printf(FUNC,Load_store_unit,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp	(revision 117)
@@ -98,5 +98,9 @@
       {
 	log_printf(TRACE,Load_store_unit,FUNCTION,"    * Store queue");
-	if (_store_queue [reg_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_COMMIT)
+        // Can retire an store instruction if :
+        //  * state is commit
+        //  * none load must check this store
+	if ((_store_queue [reg_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_COMMIT) and
+            (reg_STORE_QUEUE_NB_CHECK [reg_STORE_QUEUE_PTR_READ] == 0))
 	  {
 	    log_printf(TRACE,Load_store_unit,FUNCTION,"    * find : %d",reg_STORE_QUEUE_PTR_READ);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 117)
@@ -242,5 +242,8 @@
 
 	for (uint32_t i=0; i< _param->_size_store_queue             ; i++)
+          {
+          reg_STORE_QUEUE_NB_CHECK  [i] = 0;
 	  _store_queue              [i]._state = STORE_QUEUE_EMPTY;
+          }
 
 	for (uint32_t i=0; i< _param->_size_load_queue              ; i++)
@@ -252,4 +255,72 @@
     else
       {
+	//================================================================
+	// Interface "MEMORY_OUT"
+	//================================================================
+
+        if ((    internal_MEMORY_OUT_VAL  == 1) and
+            (PORT_READ(in_MEMORY_OUT_ACK[0]) == 1))
+          {
+	    log_printf(TRACE,Load_store_unit,FUNCTION,"  * MEMORY_OUT[0] transaction");
+
+	    switch (internal_MEMORY_OUT_SELECT_QUEUE)
+	      {
+	      case SELECT_STORE_QUEUE :
+		{
+		  // =======================
+		  // ===== STORE_QUEUE =====
+		  // =======================
+		  
+		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue [%d]",reg_STORE_QUEUE_PTR_READ);
+	    
+		  // Entry flush and increase the read pointer
+		  _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_EMPTY;
+		  
+		  reg_STORE_QUEUE_PTR_READ = (reg_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue;
+
+		  break;
+		}
+	      case SELECT_LOAD_QUEUE :
+		{
+		  // ======================
+		  // ===== LOAD_QUEUE =====
+		  // ======================
+		  
+		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * load_queue  [%d]",internal_MEMORY_OUT_PTR);
+		  
+		  // Entry flush and increase the read pointer
+		  
+		  _load_queue [internal_MEMORY_OUT_PTR]._state = LOAD_QUEUE_EMPTY;
+		  
+		  // reg_LOAD_QUEUE_PTR_READ = (reg_LOAD_QUEUE_PTR_READ+1)%_param->_size_load_queue;
+
+		  break;
+		}
+	      case SELECT_LOAD_QUEUE_SPECULATIVE :
+		{
+		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * load_queue  [%d] (speculative)",internal_MEMORY_OUT_PTR);
+		  
+                  // !!! WARNING !!!
+                  // !!! Test special case :
+                  // !!! in a cycle an instruction can check the last store AND commit instruction
+                  // !!! also the memory_out is before the port_check
+
+		  _load_queue [internal_MEMORY_OUT_PTR]._state    = LOAD_QUEUE_CHECK;
+		  // NOTE : a speculative load write in the register file.
+		  // if the speculation is a miss, write_rd is re set at 1.
+		  _load_queue [internal_MEMORY_OUT_PTR]._write_rd = 0;
+
+#ifdef STATISTICS
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_load_commit_speculative) ++;
+#endif
+
+		  break;
+		}
+
+		break;
+	      }
+	  }
+
 	//================================================================
 	// Interface "PORT_CHECK"
@@ -278,5 +349,7 @@
 
 		// find a entry that it need a check
-		Tlsq_ptr_t index_store  = _load_queue[index_load]._store_queue_ptr_write;
+		Tlsq_ptr_t index_store     = _load_queue[index_load]._store_queue_ptr_write;
+		Tlsq_ptr_t index_store_old = index_store;
+
                 // Init variable
 		bool       end_check    = false;
@@ -534,4 +607,5 @@
 				  // The check is finish if all bit is set
 				  end_check = (_load_queue[index_load]._check_hit_byte == _param->_mask_check_hit_byte);
+
 				}
 			    }
@@ -553,4 +627,12 @@
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * next");
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * new store_queue_ptr_write : %d",index_store);
+
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * update reg_STORE_QUEUE_NB_CHECK");
+#ifdef DEBUG
+                    if (reg_STORE_QUEUE_NB_CHECK [index_store] == 0)
+                      throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
+#endif
+                    reg_STORE_QUEUE_NB_CHECK [index_store] --;
+
 // 		    if (_load_queue[index_load]._store_queue_ptr_write == 0)
 // 		      _load_queue[index_load]._store_queue_ptr_write = _param->_size_store_queue-1;
@@ -615,4 +697,23 @@
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * state new : %s",toString(_load_queue[index_load]._state).c_str());
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * exception : %d",_load_queue[index_load]._exception);
+
+                    if (end_check)
+                      {
+                        log_printf(TRACE,Load_store_unit,FUNCTION,"                * end check, decrease all nb_check");
+                        
+                        uint32_t i=index_store;
+                        while (i!=reg_STORE_QUEUE_PTR_READ)
+                          {
+                            i=((i==0)?_param->_size_store_queue:i)-1;
+                            
+#ifdef DEBUG
+                            if (reg_STORE_QUEUE_NB_CHECK [i] == 0)
+                              throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
+#endif
+                            
+                            reg_STORE_QUEUE_NB_CHECK [i] --;
+                            //i=(i+1)%_param->_size_store_queue;
+                          }
+                      }
 		  }
 	      }
@@ -803,67 +904,4 @@
 
 	//================================================================
-	// Interface "MEMORY_OUT"
-	//================================================================
-
-        if ((    internal_MEMORY_OUT_VAL  == 1) and
-            (PORT_READ(in_MEMORY_OUT_ACK[0]) == 1))
-          {
-	    log_printf(TRACE,Load_store_unit,FUNCTION,"  * MEMORY_OUT[0] transaction");
-
-	    switch (internal_MEMORY_OUT_SELECT_QUEUE)
-	      {
-	      case SELECT_STORE_QUEUE :
-		{
-		  // =======================
-		  // ===== STORE_QUEUE =====
-		  // =======================
-		  
-		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue [%d]",reg_STORE_QUEUE_PTR_READ);
-	    
-		  // Entry flush and increase the read pointer
-		  _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_EMPTY;
-		  
-		  reg_STORE_QUEUE_PTR_READ = (reg_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue;
-
-		  break;
-		}
-	      case SELECT_LOAD_QUEUE :
-		{
-		  // ======================
-		  // ===== LOAD_QUEUE =====
-		  // ======================
-		  
-		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * load_queue  [%d]",internal_MEMORY_OUT_PTR);
-		  
-		  // Entry flush and increase the read pointer
-		  
-		  _load_queue [internal_MEMORY_OUT_PTR]._state = LOAD_QUEUE_EMPTY;
-		  
-		  // reg_LOAD_QUEUE_PTR_READ = (reg_LOAD_QUEUE_PTR_READ+1)%_param->_size_load_queue;
-
-		  break;
-		}
-	      case SELECT_LOAD_QUEUE_SPECULATIVE :
-		{
-		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * load_queue  [%d] (speculative)",internal_MEMORY_OUT_PTR);
-		  
-		  _load_queue [internal_MEMORY_OUT_PTR]._state    = LOAD_QUEUE_CHECK;
-		  // NOTE : a speculative load write in the register file.
-		  // if the speculation is a miss, write_rd is re set at 1.
-		  _load_queue [internal_MEMORY_OUT_PTR]._write_rd = 0;
-
-#ifdef STATISTICS
-                  if (usage_is_set(_usage,USE_STATISTICS))
-                    (*_stat_nb_inst_load_commit_speculative) ++;
-#endif
-
-		  break;
-		}
-
-		break;
-	      }
-	  }
-
-	//================================================================
 	// Interface "DCACHE_REQ"
 	//================================================================
@@ -943,4 +981,5 @@
 	    Tdcache_address_t address_lsb    = (address & _param->_mask_address_lsb);
 	    Tdcache_address_t check_hit_byte = gen_mask_not<Tdcache_address_t>(address_lsb+(memory_size(operation)>>3)-1,address_lsb) & _param->_mask_check_hit_byte;
+            Tlsq_ptr_t        store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write;
 
 	    log_printf(TRACE,Load_store_unit,FUNCTION,"    * address                 : 0x%.8x", address);
@@ -955,5 +994,5 @@
 	    _load_queue [ptr_write]._packet_id             = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._packet_id;
 	    _load_queue [ptr_write]._operation             = operation;
-	    _load_queue [ptr_write]._store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write;
+	    _load_queue [ptr_write]._store_queue_ptr_write = store_queue_ptr_write;
 	    _load_queue [ptr_write]._address               = address;
 	    _load_queue [ptr_write]._check_hit_byte        = check_hit_byte;
@@ -964,5 +1003,4 @@
 	    // NOTE : if have an exception, must write in register, because a depend instruction wait the load data.
 	    _load_queue [ptr_write]._write_rd              = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._write_rd             ;
-	    
 	    _load_queue [ptr_write]._num_reg_rd            = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._num_reg_rd           ;
 	    _load_queue [ptr_write]._exception             = exception;
@@ -980,4 +1018,22 @@
               (*_stat_nb_inst_load) ++;
 #endif
+
+            // Only load need check
+            if (is_operation_memory_load(_load_queue [ptr_write]._operation))
+              {
+                log_printf(TRACE,Load_store_unit,FUNCTION,"    * update nb_check");
+                log_printf(TRACE,Load_store_unit,FUNCTION,"      *     store_queue_ptr_write : %d",store_queue_ptr_write);
+                log_printf(TRACE,Load_store_unit,FUNCTION,"      * reg_STORE_QUEUE_PTR_READ  : %d",reg_STORE_QUEUE_PTR_READ);
+                
+                uint32_t i=store_queue_ptr_write;
+                while (i!=reg_STORE_QUEUE_PTR_READ)
+                  {
+                    i=((i==0)?_param->_size_store_queue:i)-1;
+                    
+                    log_printf(TRACE,Load_store_unit,FUNCTION,"      * i                         : %d",i);
+                    
+                    reg_STORE_QUEUE_NB_CHECK [i] ++;
+                  }
+              }
           }
 
@@ -1075,5 +1131,5 @@
 	    uint32_t j = (reg_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue;
 
-            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.8x, %.2d, %s",
+            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.8x, %.2d, %.2d %s",
                        j,
                        _store_queue[j]._context_id          ,
@@ -1088,4 +1144,5 @@
                      //_store_queue[j]._num_reg_rd          ,
                        _store_queue[j]._exception           ,
+                       reg_STORE_QUEUE_NB_CHECK  [j]        ,
                        toString(_store_queue[j]._state).c_str());
 	  }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp	(revision 117)
@@ -58,6 +58,5 @@
 
     _size_dcache_context_id                = log2(nb_context) + log2(nb_front_end) + log2(nb_ooo_engine);
-    _size_dcache_packet_id                 = (log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1;
-
+    _size_dcache_packet_id                 = log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue)+1;
     _have_port_dcache_context_id           = _size_dcache_context_id>0;
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h	(revision 117)
@@ -121,12 +121,14 @@
       _immediat              = x._immediat     ;
       _read_ra               = x._read_ra      ;
-      _read_ra_val           = x._read_ra == 1 ; //if not must read, the registerFile is already access
+      _read_ra_val           = ((x._read_ra == 1) and (x._num_reg_ra != 0)); //if not must read, the registerFile is already access
       _num_reg_ra            = x._num_reg_ra   ;
-      _data_ra_val           = ((x._read_ra == 0) or (x._num_reg_ra == 0)); //if not must read, the data is already valid
+//    _data_ra_val           = ((x._read_ra == 0) or  (x._num_reg_ra == 0)); //if not must read, the data is already valid
+      _data_ra_val           = not _read_ra_val;
       _data_ra               = 0               ;
       _read_rb               = x._read_rb      ;
-      _read_rb_val           = x._read_rb == 1 ;
+      _read_rb_val           = ((x._read_rb == 1) and (x._num_reg_rb != 0));
       _num_reg_rb            = x._num_reg_rb   ;
-      _data_rb_val           = ((x._read_rb == 0) or (x._num_reg_rb == 0));
+//    _data_rb_val           = ((x._read_rb == 0) or  (x._num_reg_rb == 0));
+      _data_rb_val           = not _read_rb_val;
       _data_rb               = 0               ;
       _read_rc               = x._read_rc      ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp	(revision 117)
@@ -65,11 +65,11 @@
 
 	    if(_param->_have_port_context_id   )
-	      entry->_context_id   = PORT_READ(in_READ_QUEUE_IN_CONTEXT_ID  );
+	    entry->_context_id   = PORT_READ(in_READ_QUEUE_IN_CONTEXT_ID  );
 	    if(_param->_have_port_front_end_id )
-	      entry->_front_end_id = PORT_READ(in_READ_QUEUE_IN_FRONT_END_ID);
+	    entry->_front_end_id = PORT_READ(in_READ_QUEUE_IN_FRONT_END_ID);
 	    if(_param->_have_port_ooo_engine_id)
-	      entry->_ooo_engine_id= PORT_READ(in_READ_QUEUE_IN_OOO_ENGINE_ID);
+	    entry->_ooo_engine_id= PORT_READ(in_READ_QUEUE_IN_OOO_ENGINE_ID);
 	    if(_param->_have_port_rob_ptr      )
-	      entry->_rob_id       = PORT_READ(in_READ_QUEUE_IN_ROB_ID      );
+	    entry->_rob_id       = PORT_READ(in_READ_QUEUE_IN_ROB_ID      );
 	    entry->_operation    = PORT_READ(in_READ_QUEUE_IN_OPERATION   );
 	    entry->_type         = PORT_READ(in_READ_QUEUE_IN_TYPE        );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp	(revision 117)
@@ -100,5 +100,7 @@
       internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty()           ) and
 				      (not _queue->front()->_write_rd) and
-				      (not _queue->front()->_write_re));
+				      (not _queue->front()->_write_re) and
+                                      (_queue->front()->_exception != EXCEPTION_MEMORY_LOAD_SPECULATIVE)
+                                      );
       
       PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp	(revision 117)
@@ -22,5 +22,6 @@
   void Read_unit_to_Execution_unit::genMealy (void)
   {
-    log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"Begin");
+    log_begin(Read_unit_to_Execution_unit,FUNCTION);
+    log_function(Read_unit_to_Execution_unit,FUNCTION,_name.c_str());
 
     bool execute_unit_use [_param->_nb_execute_unit][_param->_max_nb_execute_unit_port];
@@ -35,9 +36,9 @@
 	  bool       ack = false;
 	  
-	  log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"Test Read_unit[%d][%d]",i,j);
+	  log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"  * Test Read_unit[%d][%d]",i,j);
 	  
 	  if (PORT_READ(in_READ_UNIT_OUT_VAL [i][j]) == true)
 	    {
-	      log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION," * have a valid entry.");
+              log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"    * have a valid entry.");
 	      
 	      Tcontext_t context_id    = (_param->_have_port_context_id   )?PORT_READ(in_READ_UNIT_OUT_CONTEXT_ID    [i][j]):0;
@@ -51,5 +52,5 @@
 #ifdef DEBUG_TEST
 	      if (_destination[i][num_thread][type].empty())
-		throw ERRORMORPHEO(FUNCTION,"Invalid Operation : They have no execute_unit to receive a operation from the read_unit ["+toString(i)+"], thread ["+toString(num_thread)+"] and a operation's type ["+toString(type)+"].");
+                throw ERRORMORPHEO(FUNCTION,toString(_("Invalid Operation : They have no execute_unit to receive a operation from the read_unit [%d], thread [%d] and a operation's type [%s]."),i,num_thread,toString(type).c_str()));
 #endif
 	      
@@ -62,9 +63,9 @@
 		  uint32_t port = (*it).elt;
 		  
-		  log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"   * Test destination [%d][%d].",dest,port);
+		  log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"      * Test destination [%d][%d].",dest,port);
 		  
 		  if (execute_unit_use [dest][port] == false)
 		    {
-		      log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"     * Is ok! Link.");
+                      log_printf(TRACE,Read_unit_to_Execution_unit,FUNCTION,"        * Is ok! Link.");
 		      
 		      // have find !!!
@@ -104,5 +105,5 @@
 	PORT_WRITE(out_EXECUTE_UNIT_IN_VAL[i][j], execute_unit_use[i][j]);
 
-    log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"End");
+    log_end(Read_unit_to_Execution_unit,FUNCTION);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp	(revision 117)
@@ -531,6 +531,10 @@
       }
 
-    _have_port_dcache_context_id = (_max_size_dcache_context_id>1);
-
+//     log_printf(TRACE,Load_store_unit,FUNCTION,"kane : size_dcache_context_id      : %d",_max_size_dcache_context_id     );
+//     log_printf(TRACE,Load_store_unit,FUNCTION,"kane : size_dcache_packet_id       : %d",_max_size_dcache_packet_id      );
+
+    _have_port_dcache_context_id = (_max_size_dcache_context_id>0);
+
+//     log_printf(TRACE,Load_store_unit,FUNCTION,"kane : have_port_dcache_context_id : %d",_have_port_dcache_context_id);
 
     if (is_toplevel)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 117)
@@ -41,5 +41,5 @@
       CONTEXT_STATE_KO_MSYNC_EXEC                      , // wait completion of     msync  operation
 //    CONTEXT_STATE_KO_PSYNC                           , // wait completion of all        operation and after flush pipeline
-      CONTEXT_STATE_KO_PSYNC_FLUSH                     , // wait completion of all 
+      CONTEXT_STATE_KO_PSYNC_FLUSH                     , // wait completion of all
       CONTEXT_STATE_KO_PSYNC_ADDR                      , // wait completion of all 
 //    CONTEXT_STATE_KO_CSYNC                           , // wait completion of all        operation and after flush pipeline and flush ALL units (MMU, cache ...)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 117)
@@ -352,10 +352,12 @@
               log_printf(TRACE,Context_State,FUNCTION,"  * BRANCH_COMPLETE [%d]",i);
 
-              context_state_t state = reg_STATE [i];
+              Tcontext_t context_id = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;
+
+              context_state_t state = reg_STATE [context_id];
 
               Tdepth_t   depth      = (_param->_have_port_depth)?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0;
-              Tdepth_t   depth_cur  = reg_EVENT_DEPTH [i];
-              Tdepth_t   depth_min  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [i]):0;
-              Tdepth_t   depth_max  = _param->_nb_inst_branch_speculated [i];
+              Tdepth_t   depth_cur  = reg_EVENT_DEPTH [context_id];
+              Tdepth_t   depth_min  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context_id]):0;
+              Tdepth_t   depth_max  = _param->_nb_inst_branch_speculated [context_id];
               
               Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));
@@ -375,4 +377,5 @@
                                        ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth
 
+              log_printf(TRACE,Context_State,FUNCTION,"    * context_id: %d",context_id);
               log_printf(TRACE,Context_State,FUNCTION,"    * depth     : %d",depth     );
               log_printf(TRACE,Context_State,FUNCTION,"    * depth_cur : %d",depth_cur );
@@ -387,7 +390,7 @@
               if (is_valid)
                 {
-//                reg_STATE                  [i] =  CONTEXT_STATE_KO_MISS_BRANCH_ADDR;
-                  reg_STATE                  [i] =  CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE;
-                  reg_EVENT_DEPTH            [i] =  depth;
+//                reg_STATE                  [context_id] =  CONTEXT_STATE_KO_MISS_BRANCH_ADDR;
+                  reg_STATE                  [context_id] =  CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE;
+                  reg_EVENT_DEPTH            [context_id] =  depth;
                 }
             }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp	(revision 117)
@@ -24,6 +24,6 @@
 namespace decod {
 
-#define EXTENDS(x,nb_bits) extend<Tgeneral_data_t>(32, x,true ,nb_bits)
-#define EXTENDZ(x,nb_bits) extend<Tgeneral_data_t>(32, x,false,nb_bits)
+#define EXTENDS(x,nb_bits) extend<Tgeneral_data_t>(param->_size_data, x,true ,nb_bits)
+#define EXTENDZ(x,nb_bits) extend<Tgeneral_data_t>(param->_size_data, x,false,nb_bits)
 
   void instruction_decod               (decod_instruction_t * inst, decod_param_t * param)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp	(revision 117)
@@ -52,4 +52,76 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t         > ***  in_IFETCH_VAL                         ;
+  sc_signal<Tcontrol_t         > *** out_IFETCH_ACK                         ;
+  sc_signal<Tinstruction_t     > ***  in_IFETCH_INSTRUCTION                 ;
+
+  sc_signal<Tcontext_t         >  **  in_IFETCH_CONTEXT_ID                  ;
+  sc_signal<Tgeneral_address_t >  **  in_IFETCH_ADDRESS                     ;
+//sc_signal<Tgeneral_address_t >  **  in_IFETCH_ADDRESS_NEXT                ;
+  sc_signal<Tinst_ifetch_ptr_t >  **  in_IFETCH_INST_IFETCH_PTR             ;
+  sc_signal<Tbranch_state_t    >  **  in_IFETCH_BRANCH_STATE                ;
+  sc_signal<Tprediction_ptr_t  >  **  in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;
+  sc_signal<Texception_t       >  **  in_IFETCH_EXCEPTION                   ;
+
+  sc_signal<Tcontrol_t         >  ** out_DECOD_VAL                          ;
+  sc_signal<Tcontrol_t         >  **  in_DECOD_ACK                          ;
+  sc_signal<Tcontext_t         >  ** out_DECOD_CONTEXT_ID                   ;
+  sc_signal<Tdepth_t           >  ** out_DECOD_DEPTH                        ;
+  sc_signal<Ttype_t            >  ** out_DECOD_TYPE                         ;
+  sc_signal<Toperation_t       >  ** out_DECOD_OPERATION                    ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_NO_EXECUTE                   ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_IS_DELAY_SLOT                ;
+  sc_signal<Tgeneral_data_t    >  ** out_DECOD_ADDRESS                      ;
+
+  sc_signal<Tgeneral_data_t    >  ** out_DECOD_ADDRESS_NEXT                 ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_HAS_IMMEDIAT                 ;
+  sc_signal<Tgeneral_data_t    >  ** out_DECOD_IMMEDIAT                     ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_READ_RA                      ;
+  sc_signal<Tgeneral_address_t >  ** out_DECOD_NUM_REG_RA                   ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_READ_RB                      ;
+  sc_signal<Tgeneral_address_t >  ** out_DECOD_NUM_REG_RB                   ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_READ_RC                      ;
+  sc_signal<Tspecial_address_t >  ** out_DECOD_NUM_REG_RC                   ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_WRITE_RD                     ;
+  sc_signal<Tgeneral_address_t >  ** out_DECOD_NUM_REG_RD                   ;
+  sc_signal<Tcontrol_t         >  ** out_DECOD_WRITE_RE                     ;
+  sc_signal<Tspecial_address_t >  ** out_DECOD_NUM_REG_RE                   ;
+  sc_signal<Texception_t       >  ** out_DECOD_EXCEPTION_USE                ;
+  sc_signal<Texception_t       >  ** out_DECOD_EXCEPTION                    ;
+
+  sc_signal<Tcontrol_t         >  ** out_PREDICT_VAL                        ;
+  sc_signal<Tcontrol_t         >  **  in_PREDICT_ACK                        ;
+  sc_signal<Tcontext_t         >  ** out_PREDICT_CONTEXT_ID                 ;
+  sc_signal<Tcontrol_t         >  ** out_PREDICT_MATCH_INST_IFETCH_PTR      ;
+  sc_signal<Tbranch_state_t    >  ** out_PREDICT_BRANCH_STATE               ;
+  sc_signal<Tprediction_ptr_t  >  ** out_PREDICT_BRANCH_UPDATE_PREDICTION_ID;
+  sc_signal<Tbranch_condition_t>  ** out_PREDICT_BRANCH_CONDITION           ;
+//sc_signal<Tcontrol_t         >  ** out_PREDICT_BRANCH_STACK_WRITE         ;
+  sc_signal<Tcontrol_t         >  ** out_PREDICT_BRANCH_DIRECTION           ;
+  sc_signal<Tgeneral_data_t    >  ** out_PREDICT_ADDRESS_SRC                ;
+  sc_signal<Tgeneral_data_t    >  ** out_PREDICT_ADDRESS_DEST               ;
+  sc_signal<Tcontrol_t         >  **  in_PREDICT_CAN_CONTINUE               ;
+
+  sc_signal<Tdepth_t           >  **  in_DEPTH_MIN                          ;
+  sc_signal<Tdepth_t           >  **  in_DEPTH_MAX                          ;
+  sc_signal<Tcontrol_t         >  **  in_DEPTH_FULL                         ;
+
+  sc_signal<Tcounter_t         >  ** out_NB_INST_DECOD_ALL                  ;
+
+  sc_signal<Tcontrol_t         >  **  in_CONTEXT_DECOD_ENABLE               ;
+  sc_signal<Tcontrol_t         >  **  in_CONTEXT_DEPTH_VAL                  ;
+  sc_signal<Tdepth_t           >  **  in_CONTEXT_DEPTH                      ;
+
+  sc_signal<Tcontrol_t         >   * out_CONTEXT_EVENT_VAL                  ;
+  sc_signal<Tcontrol_t         >   *  in_CONTEXT_EVENT_ACK                  ;
+  sc_signal<Tcontext_t         >   * out_CONTEXT_EVENT_CONTEXT_ID           ;
+  sc_signal<Tdepth_t           >   * out_CONTEXT_EVENT_DEPTH                ;
+  sc_signal<Tevent_type_t      >   * out_CONTEXT_EVENT_TYPE                 ;
+  sc_signal<Tcontrol_t         >   * out_CONTEXT_EVENT_IS_DELAY_SLOT        ;
+  sc_signal<Tgeneral_data_t    >   * out_CONTEXT_EVENT_ADDRESS              ;
+  sc_signal<Tgeneral_data_t    >   * out_CONTEXT_EVENT_ADDRESS_EPCR         ;
+
+
 
   ALLOC2_SC_SIGNAL( in_IFETCH_VAL                         ," in_IFETCH_VAL                         ",Tcontrol_t         ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 117)
@@ -242,9 +242,11 @@
 
 #if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true)
+    directory_init ();
+
     branchement_log_file = new std::ofstream [_param->_nb_thread];
     for (uint32_t i=0; i<_param->_nb_thread; ++i)
       if (_param->_have_thread [i])
         {
-          std::string filename = "Branchement_prediction-thread_" + toString(i) + ".log";
+          std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Branchement_prediction-thread_"+toString(i)+".log";
           
           branchement_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h	(revision 117)
@@ -60,6 +60,10 @@
   public : uint32_t         ** _array_size_depth        ;//[nb_front_end][nb_context]
 //public : uint32_t            _max_size_depth          ;
-  public : Tpacket_t           _shift_num_bank          ;
-  public : Tpacket_t           _mask_size_bank          ;
+
+//public : Tpacket_t           _shift_num_bank          ;
+  public : Tpacket_t           _mask_num_bank           ;
+  public : Tpacket_t           _shift_num_slot          ;
+//public : Tpacket_t           _mask_num_slot           ;
+    
 
 //public : bool                _have_port_front_end_id  ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp	(revision 117)
@@ -336,9 +336,11 @@
 
 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true)
+    directory_init ();
+
     instruction_log_file = new std::ofstream [_param->_nb_thread];
     for (uint32_t i=0; i<_param->_nb_thread; ++i)
       if (_param->_have_thread [i])
         {
-          std::string filename = "Instruction_flow-thread_" + toString(i) + ".log";
+          std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+"-"+toString(getpid())+".log";
           
           instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 117)
@@ -49,5 +49,5 @@
             // packet_id number can 
 	    Tpacket_t packet_id       = (_param->_have_port_rob_ptr  )?PORT_READ(in_COMMIT_PACKET_ID [i]):0;
-	    uint32_t  num_bank        = packet_id >> _param->_shift_num_bank;
+	    uint32_t  num_bank        = packet_id & _param->_mask_num_bank;
 	    uint32_t  num_bank_access = bank_nb_access [num_bank];
             
@@ -62,5 +62,5 @@
 		internal_BANK_COMMIT_NUM_INST [num_bank][num_bank_access] = i;
                 
-                Tpacket_t num_packet = packet_id & _param->_mask_size_bank;
+                Tpacket_t num_packet = packet_id >> _param->_shift_num_slot;
                 
                 // find the good entry !!!
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp	(revision 117)
@@ -99,5 +99,5 @@
                         insert_ack       [num_rename_unit][num_inst_insert] = true;
                         
-                        Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
+                        Tpacket_t packet_id = ((reg_BANK_PTR [num_bank] << _param->_shift_num_slot) | num_bank);
                         
 #ifdef SYSTEMC_VHDL_COMPATIBILITY
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 117)
@@ -392,5 +392,5 @@
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id : %d",front_end_id );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id   : %d",context_id   );
-                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((num_bank << _param->_shift_num_bank) | entry->ptr));
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * rob_ptr      : %d",((entry->ptr << _param->_shift_num_slot) | num_bank));
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * num_thread   : %d",num_thread   );
                 log_printf(TRACE,Commit_unit,FUNCTION,"    * type         : %s",toString(type).c_str());
@@ -740,5 +740,5 @@
                          num_bank                       ,
                          (*it)->ptr                     ,
-                         ((num_bank << _param->_shift_num_bank) | (*it)->ptr),
+                         (((*it)->ptr << _param->_shift_num_slot) | num_bank),
                          (*it)->front_end_id            ,
                          (*it)->context_id              ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp	(revision 117)
@@ -71,6 +71,9 @@
     _max_nb_inst_retire       = max<uint32_t>(_nb_inst_retire,_nb_rename_unit);
     _size_bank                = _size_queue/_nb_bank;
-    _shift_num_bank           = log2(_size_bank);
-    _mask_size_bank           = gen_mask<Tpacket_t>(log2(_size_bank));
+
+//  _shift_num_bank           = 0;
+    _mask_num_bank            = gen_mask<Tpacket_t>(log2(_nb_bank));
+    _shift_num_slot           = log2(_nb_bank);
+//  _mask_num_slot            = gen_mask<Tpacket_t>(log2(_size_bank));
 
     _have_port_rename_unit_id = _size_rename_unit_id > 0;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-1	1	*2	# nb_inst_issue           
 1	1	*2	# nb_inst_rename         [0]               [nb_rename_unit]
 1	1	*2	# nb_inst_reexecute       
@@ -19,15 +18,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-2	2	*4	# nb_inst_issue           
 1	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
 1	4	*4	# nb_inst_reexecute       
@@ -19,28 +18,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-0	0	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg	(revision 117)
@@ -13,5 +13,4 @@
 1	1	*2	# size_store_queue_ptr    
 0	0	*2	# size_load_queue_ptr     
-4	4	*4	# nb_inst_issue           
 4	4	*4	# nb_inst_rename         [0]               [nb_rename_unit]
 1	1	*4	# nb_inst_rename         [1]               [nb_rename_unit]
@@ -22,66 +21,2 @@
 1	1	*2	# priority                
 1	1	*2	# load_balancing          
-1	1	+1	# table_routing          [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [0][1]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [0][2]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [0][3]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [1][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [1][1]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [1][2]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [1][3]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [2][0]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [2][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [2][2]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [2][3]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [3][0]            [nb_rename_unit][nb_inst_issue]
-0	0	+1	# table_routing          [3][1]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [3][2]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_routing          [3][3]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type       [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [2][TYPE_MEMORY ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type       [3][TYPE_MEMORY ] [nb_inst_issue][nb_type]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp	(revision 117)
@@ -8,5 +8,5 @@
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h"
 
-#define NB_PARAMS 18
+#define NB_PARAMS 17
 
 void usage (int argc, char * argv[])
@@ -27,5 +27,4 @@
   err (_(" * size_store_queue_ptr                                  (uint32_t             )\n"));
   err (_(" * size_load_queue_ptr                                   (uint32_t             )\n"));
-  err (_(" * nb_inst_issue                                         (uint32_t             )\n"));
   err (_(" * nb_inst_rename        [nb_rename_unit]                (uint32_t             )\n"));
   err (_(" * nb_inst_reexecute                                     (uint32_t             )\n"));
@@ -33,18 +32,18 @@
   err (_(" * priority                                              (Tpriority_t          )\n"));
   err (_(" * load_balancing                                        (Tload_balancing_t    )\n"));
-  err (_(" * table_routing         [nb_rename_unit][nb_inst_issue] (bool                 )\n"));
-  err (_(" * table_routing         [nb_inst_issue][nb_type]        (bool                 )\n"));
-  err (_("   * TYPE_ALU    \n"));
-  err (_("   * TYPE_SHIFT  \n"));
-  err (_("   * TYPE_MOVE   \n"));
-  err (_("   * TYPE_TEST   \n"));
-  err (_("   * TYPE_MUL    \n"));
-  err (_("   * TYPE_DIV    \n"));
-  err (_("   * TYPE_EXTEND \n"));
-  err (_("   * TYPE_FIND   \n"));
-  err (_("   * TYPE_SPECIAL\n"));
-  err (_("   * TYPE_CUSTOM \n"));
-  err (_("   * TYPE_BRANCH \n"));
-  err (_("   * TYPE_MEMORY \n"));
+//   err (_(" * table_routing         [nb_rename_unit][nb_inst_issue] (bool                 )\n"));
+//   err (_(" * table_issue_type      [nb_inst_issue][nb_type]        (bool                 )\n"));
+//   err (_("   * TYPE_ALU    \n"));
+//   err (_("   * TYPE_SHIFT  \n"));
+//   err (_("   * TYPE_MOVE   \n"));
+//   err (_("   * TYPE_TEST   \n"));
+//   err (_("   * TYPE_MUL    \n"));
+//   err (_("   * TYPE_DIV    \n"));
+//   err (_("   * TYPE_EXTEND \n"));
+//   err (_("   * TYPE_FIND   \n"));
+//   err (_("   * TYPE_SPECIAL\n"));
+//   err (_("   * TYPE_CUSTOM \n"));
+//   err (_("   * TYPE_BRANCH \n"));
+//   err (_("   * TYPE_MEMORY \n"));
 
   exit (1);
@@ -68,5 +67,5 @@
   uint32_t          _nb_rename_unit         = fromString<uint32_t         >(argv[x++]);
 
-  if (argc <= static_cast<int>(2+NB_PARAMS+_nb_rename_unit))
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit))
     usage (argc, argv);
 
@@ -81,5 +80,5 @@
   uint32_t          _size_store_queue_ptr   = fromString<uint32_t         >(argv[x++]);
   uint32_t          _size_load_queue_ptr    = fromString<uint32_t         >(argv[x++]);
-  uint32_t          _nb_inst_issue          = fromString<uint32_t         >(argv[x++]);
+//uint32_t          _nb_inst_issue          = fromString<uint32_t         >(argv[x++]);
   uint32_t        * _nb_inst_rename         = new uint32_t [_nb_rename_unit];
   for (uint32_t i=0; i<_nb_rename_unit; i++)
@@ -90,33 +89,33 @@
   Tload_balancing_t _load_balancing         = fromString<Tload_balancing_t>(argv[x++]);
 
-  if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))
-    usage (argc, argv);
+//   if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))
+//     usage (argc, argv);
 
-  bool           ** _table_routing          = new bool * [_nb_rename_unit];
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    {
-      _table_routing [i] = new bool [_nb_inst_issue];
-      for (uint32_t j=0; j<_nb_inst_issue; j++)
-	_table_routing [i][j] = fromString<bool>(argv[x++]);
-    }
+//   bool           ** _table_routing          = new bool * [_nb_rename_unit];
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     {
+//       _table_routing [i] = new bool [_nb_inst_issue];
+//       for (uint32_t j=0; j<_nb_inst_issue; j++)
+// 	_table_routing [i][j] = fromString<bool>(argv[x++]);
+//     }
 
-  bool           ** _table_issue_type          = new bool * [_nb_inst_issue];
-  for (uint32_t i=0; i<_nb_inst_issue; i++)
-    {
-      _table_issue_type [i] = new bool [_nb_inst_issue];
+//   bool           ** _table_issue_type          = new bool * [_nb_inst_issue];
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)
+//     {
+//       _table_issue_type [i] = new bool [_nb_inst_issue];
 
-      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
-    }
+//       _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+//     }
 
   int _return = EXIT_SUCCESS;
@@ -137,5 +136,5 @@
 	 _size_store_queue_ptr  ,
 	 _size_load_queue_ptr   ,
-	 _nb_inst_issue         ,
+// 	 _nb_inst_issue         ,
 	 _nb_inst_rename        ,
 	 _nb_inst_reexecute     ,
@@ -143,6 +142,6 @@
 	 _priority              ,
 	 _load_balancing        ,
-	 _table_routing         ,
-	 _table_issue_type      ,
+// 	 _table_routing         ,
+// 	 _table_issue_type      ,
          true // is_toplevel
          );
@@ -173,10 +172,10 @@
   delete [] _nb_inst_rename;
 
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    delete [] _table_routing [i];
-  delete [] _table_routing   ;
-  for (uint32_t i=0; i<_nb_inst_issue; i++)
-    delete [] _table_issue_type [i];
-  delete [] _table_issue_type;
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     delete [] _table_routing [i];
+//   delete [] _table_routing   ;
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)
+//     delete [] _table_issue_type [i];
+//   delete [] _table_issue_type;
 
   return (_return);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp	(revision 117)
@@ -48,4 +48,68 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_VAL                   ;
+  sc_signal<Tcontrol_t        > *** out_ISSUE_IN_ACK                   ;
+  sc_signal<Tcontext_t        > ***  in_ISSUE_IN_CONTEXT_ID            ;
+  sc_signal<Tcontext_t        > ***  in_ISSUE_IN_FRONT_END_ID          ;
+  sc_signal<Tpacket_t         > ***  in_ISSUE_IN_PACKET_ID             ;
+  sc_signal<Toperation_t      > ***  in_ISSUE_IN_OPERATION             ;
+  sc_signal<Ttype_t           > ***  in_ISSUE_IN_TYPE                  ;
+  sc_signal<Tlsq_ptr_t        > ***  in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ;
+  sc_signal<Tlsq_ptr_t        > ***  in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_HAS_IMMEDIAT          ;
+  sc_signal<Tgeneral_data_t   > ***  in_ISSUE_IN_IMMEDIAT              ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RA               ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RA            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RB               ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RB            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_READ_RC               ;
+  sc_signal<Tspecial_address_t> ***  in_ISSUE_IN_NUM_REG_RC            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_WRITE_RD              ;
+  sc_signal<Tgeneral_address_t> ***  in_ISSUE_IN_NUM_REG_RD            ;
+  sc_signal<Tcontrol_t        > ***  in_ISSUE_IN_WRITE_RE              ;
+  sc_signal<Tspecial_address_t> ***  in_ISSUE_IN_NUM_REG_RE            ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_VAL                  ;
+  sc_signal<Tcontrol_t        >  ** out_REEXECUTE_ACK                  ;
+  sc_signal<Tcontext_t        >  **  in_REEXECUTE_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        >  **  in_REEXECUTE_FRONT_END_ID         ;
+  sc_signal<Tpacket_t         >  **  in_REEXECUTE_PACKET_ID            ;
+  sc_signal<Toperation_t      >  **  in_REEXECUTE_OPERATION            ;
+  sc_signal<Ttype_t           >  **  in_REEXECUTE_TYPE                 ;
+  sc_signal<Tlsq_ptr_t        >  **  in_REEXECUTE_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t        >  **  in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_HAS_IMMEDIAT         ;
+  sc_signal<Tgeneral_data_t   >  **  in_REEXECUTE_IMMEDIAT             ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RA              ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RA           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RB              ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RB           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_READ_RC              ;
+  sc_signal<Tspecial_address_t>  **  in_REEXECUTE_NUM_REG_RC           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_WRITE_RD             ;
+  sc_signal<Tgeneral_address_t>  **  in_REEXECUTE_NUM_REG_RD           ;
+  sc_signal<Tcontrol_t        >  **  in_REEXECUTE_WRITE_RE             ;
+  sc_signal<Tspecial_address_t>  **  in_REEXECUTE_NUM_REG_RE           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_VAL                  ;
+  sc_signal<Tcontrol_t        >  **  in_ISSUE_OUT_ACK                  ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_OUT_CONTEXT_ID           ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_OUT_FRONT_END_ID         ;
+  sc_signal<Tpacket_t         >  ** out_ISSUE_OUT_PACKET_ID            ;
+  sc_signal<Toperation_t      >  ** out_ISSUE_OUT_OPERATION            ;
+  sc_signal<Ttype_t           >  ** out_ISSUE_OUT_TYPE                 ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_HAS_IMMEDIAT         ;
+  sc_signal<Tgeneral_data_t   >  ** out_ISSUE_OUT_IMMEDIAT             ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RA              ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RA           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RB              ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RB           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_READ_RC              ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_OUT_NUM_REG_RC           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_WRITE_RD             ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_OUT_NUM_REG_RD           ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_OUT_WRITE_RE             ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_OUT_NUM_REG_RE           ;
 
   ALLOC2_SC_SIGNAL( in_ISSUE_IN_VAL                   ," in_ISSUE_IN_VAL                   ",Tcontrol_t        ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]);
@@ -309,5 +373,5 @@
 	    Ttype_t type = out_ISSUE_OUT_TYPE[i]->read();
 	    TEST(Ttype_t,type, tab_type[imm%NB_TYPE]);
-	    TEST(bool   ,_param->_table_issue_type[i][type],true);
+// 	    TEST(bool   ,_param->_table_issue_type[i][type],true);
 	  }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h	(revision 117)
@@ -38,5 +38,4 @@
 //public : uint32_t              _size_store_queue_ptr    ;
 //public : uint32_t              _size_load_queue_ptr     ;
-  public : uint32_t              _nb_inst_issue           ;
   public : uint32_t            * _nb_inst_rename          ;//[nb_rename_unit]
   public : uint32_t              _nb_inst_reexecute       ;
@@ -44,8 +43,9 @@
   public : Tpriority_t           _priority                ;
   public : Tload_balancing_t     _load_balancing          ;
-  public : bool               ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
-  public : bool               ** _table_issue_type        ;//[nb_inst_issue][nb_type]
+//public : bool               ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
+//public : bool               ** _table_issue_type        ;//[nb_inst_issue][nb_type]
   public : uint32_t              _size_reexecute_queue    ;
                              
+  public : uint32_t              _nb_inst_issue           ;
 //public : uint32_t              _nb_bank_select_out      ;
   public : uint32_t              _max_nb_inst_rename      ;
@@ -74,5 +74,5 @@
 			uint32_t              size_store_queue_ptr    ,
 			uint32_t              size_load_queue_ptr     ,
-			uint32_t              nb_inst_issue           ,
+// 			uint32_t              nb_inst_issue           ,
 			uint32_t            * nb_inst_rename          ,
 			uint32_t              nb_inst_reexecute       ,
@@ -80,6 +80,6 @@
 			Tpriority_t           priority                ,
 			Tload_balancing_t     load_balancing          ,
-			bool               ** table_routing           ,
-			bool               ** table_issue_type        ,
+// 			bool               ** table_routing           ,
+// 			bool               ** table_issue_type        ,
                         bool                  is_toplevel=false);
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp	(revision 117)
@@ -30,9 +30,13 @@
       Tcontrol_t val [_param->_nb_inst_issue];
 
+      uint32_t index=0;
       for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
         val [i] = 0;
 
+      //--------------------------------------
       // From Reexecute_queue
+      //--------------------------------------
 
+      // scan all reexecute_queue slot ...
 //       uint32_t num_reexecute_entry = 0;
       for (std::list<entry_t*>::iterator it=_reexecute_queue.begin();
@@ -42,45 +46,45 @@
           entry_t* entry = (*it);
 
-          for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
-            // test if no previous transaction and can accept this type
-            if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
-              {
-                // find a issue port
-                val [i] = 1;
-	    
-                if (_param->_have_port_context_id)
-	        PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
-	        if (_param->_have_port_front_end_id)
-	        PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
-	        if (_param->_have_port_rob_ptr  )
-	        PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
-	        PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
-	        PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
-	        PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
-	        if (_param->_have_port_load_queue_ptr)
-	        PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
-	        PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
-	        PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
-	        PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
-	        PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
-	        PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
-	        PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+          val [index] = 1;
+              
+          if (_param->_have_port_context_id)
+	  PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [index], entry->_context_id           );
+	  if (_param->_have_port_front_end_id)
+	  PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [index], entry->_front_end_id         );
+	  if (_param->_have_port_rob_ptr  )
+	  PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [index], entry->_packet_id            );
+	  PORT_WRITE(out_ISSUE_OUT_OPERATION             [index], entry->_operation            );
+	  PORT_WRITE(out_ISSUE_OUT_TYPE                  [index], entry->_type                 );
+	  PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write);
+	  if (_param->_have_port_load_queue_ptr)
+	  PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [index], entry->_load_queue_ptr_write );
+	  PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [index], entry->_has_immediat         );
+	  PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [index], entry->_immediat             );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RA               [index], entry->_read_ra              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [index], entry->_num_reg_ra           );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RB               [index], entry->_read_rb              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [index], entry->_num_reg_rb           );
+	  PORT_WRITE(out_ISSUE_OUT_READ_RC               [index], entry->_read_rc              );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [index], entry->_num_reg_rc           );
+	  PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [index], entry->_write_rd             );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [index], entry->_num_reg_rd           );
+	  PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [index], entry->_write_re             );
+	  PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [index], entry->_num_reg_re           );
 
-                internal_ISSUE_OUT_FROM_REEXECUTE [i] = true;
-//              internal_ISSUE_OUT_NUM_BANK       [i] = num_reexecute_entry;
-                internal_ISSUE_OUT_ENTRY          [i] = entry;
+          internal_ISSUE_OUT_FROM_REEXECUTE [index] = true;
+//        internal_ISSUE_OUT_NUM_BANK       [index] = num_reexecute_entry;
+          internal_ISSUE_OUT_ENTRY          [index] = entry;
 
-                break; // stop scan
-              }
-//           num_reexecute_entry ++;
+          index ++; // next slot
         }
+      
+      //--------------------------------------
+      // From Issue_queue
+      //--------------------------------------
+      index = _param->_nb_inst_reexecute;
 
-      // From Issue_queue
+      log_printf(TRACE,Issue_queue,FUNCTION,"  * From Issue_queue");
+
+      // for all instruction in issue_queue head ...
       for (uint32_t i=0; i<_param->_nb_bank; ++i)
         {
@@ -89,75 +93,80 @@
           log_printf(TRACE,Issue_queue,FUNCTION,"    * Bank [%d]",num_bank);
           
-          bool find = false;
+//           bool find = false;
           
-          // Have instruction ?
+          // ... test if have an instruction
           if (not _issue_queue [num_bank].empty())
             {
  	      log_printf(TRACE,Issue_queue,FUNCTION,"      * Not Empty !!!");
 
+              // read instruction
               entry_t* entry = _issue_queue [num_bank].front();
               
-	      // have valid instruction, search a valid issue slot.
-              for (uint32_t j=0; j<_param->_nb_inst_issue; j++)
-                {
-		  Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [j]);
+//               Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [index]);
+              
+              log_printf(TRACE,Issue_queue,FUNCTION,"      * Issue [%d]",index);
+//               log_printf(TRACE,Issue_queue,FUNCTION,"        * issue_ack            : %d",issue_ack);
+//            log_printf(TRACE,Issue_queue,FUNCTION,"        * previous transaction : %d",val[index]);
+//            log_printf(TRACE,Issue_queue,FUNCTION,"        * can issue type       : %d",_param->_table_issue_type [index][entry->_type]);
 
-                  log_printf(TRACE,Issue_queue,FUNCTION,"      * Issue [%d]",j);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * issue_ack            : %d",issue_ack);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * previous transaction : %d",val[j]);
-                  log_printf(TRACE,Issue_queue,FUNCTION,"        * can issue type       : %d",_param->_table_issue_type [j][entry->_type]);
+              // in_order : test if find a valid read_unit
+//               if (issue_ack)
+//                 {
+// 	          log_printf(TRACE,Issue_queue,FUNCTION,"        * find !!!");
+                  
+//                   find = true;
+//                 }
 
-                  // test if no previous transaction and can accept this type
-                  if (not val[j] and 
-                      _param->_table_issue_type [j][entry->_type] and
-                      issue_ack)
-                    {
-		      log_printf(TRACE,Issue_queue,FUNCTION,"        * find !!!");
-                      
-                      // find a issue port
-                      val [j] = 1;
-                      
-                      if (_param->_have_port_context_id)
-	              PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [j], entry->_context_id           );
-	              if (_param->_have_port_front_end_id)
-	              PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [j], entry->_front_end_id         );
-	              if (_param->_have_port_rob_ptr  )
-	              PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [j], entry->_packet_id            );
-	              PORT_WRITE(out_ISSUE_OUT_OPERATION             [j], entry->_operation            );
-	              PORT_WRITE(out_ISSUE_OUT_TYPE                  [j], entry->_type                 );
-	              PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [j], entry->_store_queue_ptr_write);
-	              if (_param->_have_port_load_queue_ptr)
-	              PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [j], entry->_load_queue_ptr_write );
-	              PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [j], entry->_has_immediat         );
-	              PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [j], entry->_immediat             );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RA               [j], entry->_read_ra              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [j], entry->_num_reg_ra           );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RB               [j], entry->_read_rb              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [j], entry->_num_reg_rb           );
-	              PORT_WRITE(out_ISSUE_OUT_READ_RC               [j], entry->_read_rc              );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [j], entry->_num_reg_rc           );
-	              PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [j], entry->_write_rd             );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [j], entry->_num_reg_rd           );
-	              PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [j], entry->_write_re             );
-	              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [j], entry->_num_reg_re           );
-                      
-                      internal_ISSUE_OUT_FROM_REEXECUTE [j] = false;
-                      internal_ISSUE_OUT_NUM_BANK       [j] = num_bank;
-                      internal_ISSUE_OUT_ENTRY          [j] = entry;
-                      
-                      find = true;
-                      break; // find : stop scan
-                    }
-                }
+              // find a issue port
+              val [index] = true; // instruction is valid
+              
+              if (_param->_have_port_context_id)
+              PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [index], entry->_context_id           );
+              if (_param->_have_port_front_end_id)
+              PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [index], entry->_front_end_id         );
+              if (_param->_have_port_rob_ptr  )
+              PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [index], entry->_packet_id            );
+              PORT_WRITE(out_ISSUE_OUT_OPERATION             [index], entry->_operation            );
+              PORT_WRITE(out_ISSUE_OUT_TYPE                  [index], entry->_type                 );
+              PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write);
+              if (_param->_have_port_load_queue_ptr)
+              PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [index], entry->_load_queue_ptr_write );
+              PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [index], entry->_has_immediat         );
+              PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [index], entry->_immediat             );
+              PORT_WRITE(out_ISSUE_OUT_READ_RA               [index], entry->_read_ra              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [index], entry->_num_reg_ra           );
+              PORT_WRITE(out_ISSUE_OUT_READ_RB               [index], entry->_read_rb              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [index], entry->_num_reg_rb           );
+              PORT_WRITE(out_ISSUE_OUT_READ_RC               [index], entry->_read_rc              );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [index], entry->_num_reg_rc           );
+              PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [index], entry->_write_rd             );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [index], entry->_num_reg_rd           );
+              PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [index], entry->_write_re             );
+              PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [index], entry->_num_reg_re           );
+              
+              internal_ISSUE_OUT_FROM_REEXECUTE [index] = false;
+              internal_ISSUE_OUT_NUM_BANK       [index] = num_bank;
+              internal_ISSUE_OUT_ENTRY          [index] = entry;
+
+              index ++; // next slot
             }
 
-          if (not find)
-            break; // stop scan (in order)
+//           if (not find)
+//             {
+//  	      log_printf(TRACE,Issue_queue,FUNCTION,"      * Not find. Stop Scan (in order)");
+              
+//               break; // stop scan (in order)
+//             }
         }
-
+      
+      // Output
       for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
         {
           internal_ISSUE_OUT_VAL [i] = val [i];
           PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]);
+
+//           // Type invalid to the Core_Glue network
+//           if (not val [i]) // == empty
+//             PORT_WRITE(out_ISSUE_OUT_TYPE [i], TYPE_INVALID);
         }
     }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp	(revision 117)
@@ -109,5 +109,7 @@
           for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
             // test if no previous transaction and can accept this type
-            if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+            if ((val[i] == 0)
+//                 and _param->_table_issue_type [i][entry->_type]
+                )
               {
                 // find a issue port
@@ -168,5 +170,7 @@
               for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
                 // test if no previous transaction and can accept this type
-                if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+                if ((val[i] == 0)
+//                     and _param->_table_issue_type [i][entry->_type]
+                    )
                   {
                     // find a issue port
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp	(revision 117)
@@ -106,4 +106,10 @@
     log_printf(TRACE,Issue_queue,FUNCTION,"  * Dump Issue_queue");
 
+    if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER)
+      {
+    log_printf(TRACE,Issue_queue,FUNCTION,"    * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD);
+    log_printf(TRACE,Issue_queue,FUNCTION,"    * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
+      }
+
     for (uint32_t i=0; i<_param->_nb_bank; i++)
       {
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp	(revision 117)
@@ -32,5 +32,5 @@
 			  uint32_t              size_store_queue_ptr    ,
 			  uint32_t              size_load_queue_ptr     ,
-			  uint32_t              nb_inst_issue           ,
+// 			  uint32_t              nb_inst_issue           ,
 			  uint32_t            * nb_inst_rename          ,
 			  uint32_t              nb_inst_reexecute       ,
@@ -38,6 +38,6 @@
 			  Tpriority_t           priority                ,
 			  Tload_balancing_t     load_balancing          ,
-			  bool               ** table_routing           ,
-			  bool               ** table_issue_type        ,
+// 			  bool               ** table_routing           ,
+// 			  bool               ** table_issue_type        ,
                           bool                  is_toplevel             )
   {
@@ -50,5 +50,5 @@
     _queue_scheme             = queue_scheme         ;
     _nb_bank                  = nb_bank              ;   
-    _nb_inst_issue            = nb_inst_issue        ;
+//  _nb_inst_issue            = nb_inst_issue        ;
     _nb_inst_rename           = nb_inst_rename       ;
     _nb_inst_reexecute        = nb_inst_reexecute    ;
@@ -56,19 +56,21 @@
     _priority                 = priority             ;
     _load_balancing           = load_balancing       ;
-    _table_routing            = table_routing        ;
-    _table_issue_type         = table_issue_type     ;
+//  _table_routing            = table_routing        ;
+//  _table_issue_type         = table_issue_type     ;
     _size_reexecute_queue     = nb_inst_reexecute    ;
 
-    log_printf(TRACE,Issue_queue,FUNCTION,"  * table_routing [nb_rename_unit][nb_inst_issue]");
-    for (uint32_t i=0; i<_nb_rename_unit; ++i)
-      for (uint32_t j=0; j<_nb_inst_issue; ++j)
-        if (_table_routing [i][j])
-          log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
+    _nb_inst_issue            = _nb_inst_reexecute+_nb_bank;
+
+//     log_printf(TRACE,Issue_queue,FUNCTION,"  * table_routing [nb_rename_unit][nb_inst_issue]");
+//     for (uint32_t i=0; i<_nb_rename_unit; ++i)
+//       for (uint32_t j=0; j<_nb_inst_issue; ++j)
+//         if (_table_routing [i][j])
+//           log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
         
-    log_printf(TRACE,Issue_queue,FUNCTION,"  * table_issue_type [nb_inst_issue][nb_type]");
-    for (uint32_t i=0; i<_nb_inst_issue; ++i)
-      for (uint32_t j=0; j<_nb_type; ++j)
-        if (_table_issue_type [i][j])
-          log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
+//     log_printf(TRACE,Issue_queue,FUNCTION,"  * table_issue_type [nb_inst_issue][nb_type]");
+//     for (uint32_t i=0; i<_nb_inst_issue; ++i)
+//       for (uint32_t j=0; j<_nb_type; ++j)
+//         if (_table_issue_type [i][j])
+//           log_printf(TRACE,Issue_queue,FUNCTION,"    [%d][%d] -> true",i,j);
     
     _max_nb_inst_rename       = max<uint32_t>(_nb_inst_rename,_nb_rename_unit);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp	(revision 117)
@@ -48,6 +48,6 @@
       test.error(toString(_("nb_bank (%d) must be a multiple of size_queue (%d).\n"),_nb_bank,_size_queue));
     
-    if (not is_multiple(_nb_bank, _nb_inst_issue))
-      test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));
+//     if (not is_multiple(_nb_bank, _nb_inst_issue))
+//       test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));
 
     if (_nb_rename_unit_select > _nb_rename_unit)
@@ -57,28 +57,28 @@
       test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n"));
 
-    for (uint32_t i=0; i<_nb_rename_unit; i++)
-      {
-	bool type_present [_nb_type];
+//     for (uint32_t i=0; i<_nb_rename_unit; i++)
+//       {
+// 	bool type_present [_nb_type];
 	
-	for (uint32_t j=0; j<_nb_type; j++)
-	  type_present [j] = not is_type_valid(j);
+// 	for (uint32_t j=0; j<_nb_type; j++)
+// 	  type_present [j] = not is_type_valid(j);
 
-	bool find = false;
-	for (uint32_t j=0; j<_nb_inst_issue; j++)
-	  if (_table_routing [i][j])
-	  {
-	    find = true;
+// 	bool find = false;
+// 	for (uint32_t j=0; j<_nb_inst_issue; j++)
+// 	  if (_table_routing [i][j])
+// 	  {
+// 	    find = true;
 
-	    for (uint32_t k=0; k<_nb_type; k++)
-	      type_present [k] |= _table_issue_type [j][k];
-	  }
+// 	    for (uint32_t k=0; k<_nb_type; k++)
+// 	      type_present [k] |= _table_issue_type [j][k];
+// 	  }
 
-	if (not find)
-	  test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));
-	else
-	  for (uint32_t j=0; j<_nb_type; j++)
-	    if (not type_present [j] and not is_type_optionnal(j))
-	      test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str()));
-      }
+// 	if (not find)
+// 	  test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));
+// 	else
+// 	  for (uint32_t j=0; j<_nb_type; j++)
+// 	    if (not type_present [j] and not is_type_optionnal(j))
+// 	      test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str()));
+//       }
     
     if ((_priority != PRIORITY_ROUND_ROBIN))
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp	(revision 117)
@@ -153,6 +153,6 @@
   ALLOC1_SC_SIGNAL( in_COMMIT_ACK                           ," in_COMMIT_ACK                         ",Tcontrol_t         ,_param->_nb_inst_commit);
   ALLOC1_SC_SIGNAL(out_COMMIT_WEN                           ,"out_COMMIT_WEN                         ",Tcontrol_t         ,_param->_nb_inst_commit);
-  ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,"out_COMMIT_CONTEXT_ID                  ",Tcontext_t         ,_param->_nb_inst_commit);
-  ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,"out_COMMIT_FRONT_END_ID                ",Tcontext_t         ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,"out_COMMIT_CONTEXT_ID                  ",Tcontext_t         ,_param->_nb_inst_commit);
+//ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,"out_COMMIT_FRONT_END_ID                ",Tcontext_t         ,_param->_nb_inst_commit);
   ALLOC1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,"out_COMMIT_PACKET_ID                   ",Tpacket_t          ,_param->_nb_inst_commit);
 //ALLOC1_SC_SIGNAL(out_COMMIT_OPERATION                     ,"out_COMMIT_OPERATION                   ",Toperation_t       ,_param->_nb_inst_commit);
@@ -234,8 +234,8 @@
   INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_COMMIT_ACK                           ,_param->_nb_inst_commit);
   INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_WEN                           ,_param->_nb_inst_commit);
-  if (_param->_have_port_context_id)
-  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
-  if (_param->_have_port_front_end_id)
-  INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+//if (_param->_have_port_context_id)
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+//if (_param->_have_port_front_end_id)
+//INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
   if (_param->_have_port_rob_ptr  )
   INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
@@ -415,8 +415,8 @@
 
 		  TEST(Tcontrol_t     ,out_COMMIT_WEN          [i]->read(),request[packet].commit_wen  );
-		  if (_param->_have_port_context_id)
-		  TEST(Tcontext_t     ,out_COMMIT_CONTEXT_ID   [i]->read(),request[packet].context_id  );
-		  if (_param->_have_port_front_end_id)
-		  TEST(Tcontext_t     ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);
+// 		  if (_param->_have_port_context_id)
+// 		  TEST(Tcontext_t     ,out_COMMIT_CONTEXT_ID   [i]->read(),request[packet].context_id  );
+// 		  if (_param->_have_port_front_end_id)
+// 		  TEST(Tcontext_t     ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);
 // 		  TEST(Toperation_t   ,out_COMMIT_OPERATION    [i]->read(),request[packet].operation   );
 // 		  TEST(Ttype_t        ,out_COMMIT_TYPE         [i]->read(),request[packet].type        );
@@ -529,6 +529,6 @@
   DELETE1_SC_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit);
   DELETE1_SC_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit);
-  DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
-  DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit);
+//DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit);
   DELETE1_SC_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit);
 //DELETE1_SC_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h	(revision 117)
@@ -87,6 +87,6 @@
   public    : SC_IN (Tcontrol_t         )  **  in_COMMIT_ACK                           ;//[nb_inst_commit]
   public    : SC_OUT(Tcontrol_t         )  ** out_COMMIT_WEN                           ;//[nb_inst_commit]
-  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_CONTEXT_ID                    ;//[nb_inst_commit]
-  public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_FRONT_END_ID                  ;//[nb_inst_commit]
+//public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_CONTEXT_ID                    ;//[nb_inst_commit]
+//public    : SC_OUT(Tcontext_t         )  ** out_COMMIT_FRONT_END_ID                  ;//[nb_inst_commit]
   public    : SC_OUT(Tpacket_t          )  ** out_COMMIT_PACKET_ID                     ;//[nb_inst_commit]
 //public    : SC_OUT(Toperation_t       )  ** out_COMMIT_OPERATION                     ;//[nb_inst_commit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp	(revision 117)
@@ -83,6 +83,6 @@
       ALLOC1_VALACK_IN ( in_COMMIT_ACK                           ,ACK);
       ALLOC1_SIGNAL_OUT(out_COMMIT_WEN                           ,"wen"         ,Tcontrol_t         ,1);
-      ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID                    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
-      ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID                  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID                    ,"context_id"  ,Tcontext_t         ,_param->_size_context_id  );
+//    ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID                  ,"front_end_id",Tcontext_t         ,_param->_size_front_end_id);
       ALLOC1_SIGNAL_OUT(out_COMMIT_PACKET_ID                     ,"packet_id"   ,Tpacket_t          ,_param->_size_rob_ptr     );
 //    ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION                     ,"operation"   ,Toperation_t       ,_param->_size_operation   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp	(revision 117)
@@ -44,6 +44,6 @@
         DELETE1_SIGNAL( in_COMMIT_ACK                           ,_param->_nb_inst_commit,1);
         DELETE1_SIGNAL(out_COMMIT_WEN                           ,_param->_nb_inst_commit,1);
-        DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit,_param->_size_context_id  );
-        DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit,_param->_size_front_end_id);
+//      DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID                    ,_param->_nb_inst_commit,_param->_size_context_id  );
+//      DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID                  ,_param->_nb_inst_commit,_param->_size_front_end_id);
         DELETE1_SIGNAL(out_COMMIT_PACKET_ID                     ,_param->_nb_inst_commit,_param->_size_rob_ptr     );
 //      DELETE1_SIGNAL(out_COMMIT_OPERATION                     ,_param->_nb_inst_commit,_param->_size_operation   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp	(revision 117)
@@ -101,8 +101,8 @@
 		if (commit_val)
 		  {
-		    if (_param->_have_port_context_id)
-		    PORT_WRITE(out_COMMIT_CONTEXT_ID   [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]));
-		    if (_param->_have_port_front_end_id)
-		    PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));
+// 		    if (_param->_have_port_context_id)
+// 		    PORT_WRITE(out_COMMIT_CONTEXT_ID   [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID   [x][y]));
+// 		    if (_param->_have_port_front_end_id)
+// 		    PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));
 		    if (_param->_have_port_rob_ptr  )
 		    PORT_WRITE(out_COMMIT_PACKET_ID    [i], PORT_READ(in_EXECUTE_LOOP_PACKET_ID    [x][y]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp	(revision 117)
@@ -77,4 +77,23 @@
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
+  sc_signal<Tcontrol_t  > **  in_INSERT_VAL                  ;
+  sc_signal<Tcontrol_t  > ** out_INSERT_ACK                  ;
+  sc_signal<Tcontext_t  > **  in_INSERT_FRONT_END_ID         ;
+  sc_signal<Tcontext_t  > **  in_INSERT_CONTEXT_ID           ;
+  sc_signal<Ttype_t     > **  in_INSERT_TYPE                 ;
+  sc_signal<Toperation_t> **  in_INSERT_OPERATION            ;
+  sc_signal<Tlsq_ptr_t  > ** out_INSERT_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t  > ** out_INSERT_LOAD_QUEUE_PTR_WRITE ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_VAL                  ;
+  sc_signal<Tcontrol_t  > ** out_RETIRE_ACK                  ;
+  sc_signal<Tcontext_t  > **  in_RETIRE_FRONT_END_ID         ;
+  sc_signal<Tcontext_t  > **  in_RETIRE_CONTEXT_ID           ;
+//sc_signal<Ttype_t     > **  in_RETIRE_TYPE                 ;
+//sc_signal<Toperation_t> **  in_RETIRE_OPERATION            ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_USE_STORE_QUEUE      ;
+  sc_signal<Tcontrol_t  > **  in_RETIRE_USE_LOAD_QUEUE       ;
+  sc_signal<Tlsq_ptr_t  > **  in_RETIRE_STORE_QUEUE_PTR_WRITE;
+  sc_signal<Tlsq_ptr_t  > **  in_RETIRE_LOAD_QUEUE_PTR_WRITE ;
+
   ALLOC1_SC_SIGNAL( in_INSERT_VAL                  ," in_INSERT_VAL                  ",Tcontrol_t  ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_ACK                  ,"out_INSERT_ACK                  ",Tcontrol_t  ,_param->_nb_inst_insert);
@@ -89,6 +108,6 @@
   ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID         ," in_RETIRE_FRONT_END_ID         ",Tcontext_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID           ," in_RETIRE_CONTEXT_ID           ",Tcontext_t  ,_param->_nb_inst_retire);
-//   ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
-//   ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_TYPE                 ," in_RETIRE_TYPE                 ",Ttype_t     ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION            ," in_RETIRE_OPERATION            ",Toperation_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE      ," in_RETIRE_USE_STORE_QUEUE      ",Tcontrol_t  ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE       ," in_RETIRE_USE_LOAD_QUEUE       ",Tcontrol_t  ,_param->_nb_inst_retire);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp	(revision 117)
@@ -79,13 +79,15 @@
   ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
 
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,"out_INSERT_STAT_LIST_READ_RA                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,"out_INSERT_STAT_LIST_READ_RB                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,"out_INSERT_STAT_LIST_READ_RC                     ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ",Tspecial_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,"out_INSERT_STAT_LIST_READ_RA                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,"out_INSERT_STAT_LIST_READ_RB                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,"out_INSERT_STAT_LIST_READ_RC                     ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,"out_INSERT_STAT_LIST_WRITE_RD                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,"out_INSERT_STAT_LIST_WRITE_RE                    ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ",Tspecial_address_t,_param->_nb_inst_insert);
 
@@ -157,13 +159,15 @@
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
 
@@ -331,13 +335,15 @@
   DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
-  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert);
+//DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert);
+  DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert);
   DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert);
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h	(revision 117)
@@ -108,6 +108,8 @@
   public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RD                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ;//[nb_inst_insert]
   public    : SC_OUT(Tgeneral_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ;//[nb_inst_insert]
   public    : SC_OUT(Tcontrol_t        )   ** out_INSERT_STAT_LIST_WRITE_RE                    ;//[nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ;//[nb_inst_insert]
   public    : SC_OUT(Tspecial_address_t)   ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ;//[nb_inst_insert]
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp	(revision 117)
@@ -97,6 +97,8 @@
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,"STAT_LIST_NUM_REG_RC_PHY"              ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RD                    ,"STAT_LIST_WRITE_RD"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,"STAT_LIST_NUM_REG_RD_PHY_OLD"          ,Tgeneral_address_t,_param->_size_general_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,"STAT_LIST_NUM_REG_RD_PHY_NEW"          ,Tgeneral_address_t,_param->_size_general_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RE                    ,"STAT_LIST_WRITE_RE"                    ,Tcontrol_t        ,1);
+      ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,"STAT_LIST_NUM_REG_RE_PHY_OLD"          ,Tspecial_address_t,_param->_size_special_register      );
       ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,"STAT_LIST_NUM_REG_RE_PHY_NEW"          ,Tspecial_address_t,_param->_size_special_register      );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp	(revision 117)
@@ -59,13 +59,15 @@
 	DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register      );
 	
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert,1);
-	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert,_param->_size_special_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY              ,_param->_nb_inst_insert,_param->_size_general_register      );
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC                     ,_param->_nb_inst_insert,1);
+   	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY              ,_param->_nb_inst_insert,_param->_size_special_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD          ,_param->_nb_inst_insert,_param->_size_general_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_general_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE                    ,_param->_nb_inst_insert,1);
+	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD          ,_param->_nb_inst_insert,_param->_size_special_register      );
 	DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW          ,_param->_nb_inst_insert,_param->_size_special_register      );
 	
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp	(revision 117)
@@ -49,13 +49,15 @@
 	PORT_WRITE(out_INSERT_FREE_LIST_SPR_VAL            [i], WRITE_RE          );
 
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RA            [i], READ_RA           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY     [i], NUM_REG_RA_PHY    );
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RB            [i], READ_RB           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY     [i], NUM_REG_RB_PHY    );
-	PORT_WRITE(out_INSERT_STAT_LIST_READ_RC            [i], READ_RC           );
-	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY     [i], NUM_REG_RC_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RA            [i], READ_RA           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY     [i], NUM_REG_RA_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RB            [i], READ_RB           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY     [i], NUM_REG_RB_PHY    );
+   	PORT_WRITE(out_INSERT_STAT_LIST_READ_RC            [i], READ_RC           );
+   	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY     [i], NUM_REG_RC_PHY    );
 	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD           [i], WRITE_RD          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD [i], NUM_REG_RD_PHY_OLD);
 	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW);
 	PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE           [i], WRITE_RE          );
+	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD [i], NUM_REG_RE_PHY_OLD);
 	PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW);
 	
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp	(revision 117)
@@ -63,23 +63,25 @@
   sc_signal<Tcontrol_t        >   **  in_INSERT_VAL               ;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   ** out_INSERT_ACK               ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RA           ;//[nb_inst_insert]
-  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RA_PHY    ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RB           ;//[nb_inst_insert]
-  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RB_PHY    ;//[nb_inst_insert]
-  sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RC           ;//[nb_inst_insert]
-  sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RA           ;//[nb_inst_insert]
+//sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RA_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RB           ;//[nb_inst_insert]
+//sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RB_PHY    ;//[nb_inst_insert]
+//sc_signal<Tcontrol_t        >   **  in_INSERT_READ_RC           ;//[nb_inst_insert]
+//sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_INSERT_WRITE_RD          ;//[nb_inst_insert]
+  sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert]
   sc_signal<Tgeneral_address_t>   **  in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_INSERT_WRITE_RE          ;//[nb_inst_insert]
+  sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert]
   sc_signal<Tspecial_address_t>   **  in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_VAL               ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   ** out_RETIRE_ACK               ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_RESTORE           ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RA           ;//[nb_inst_retire]
-  sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RA_PHY    ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RB           ;//[nb_inst_retire]
-  sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RB_PHY    ;//[nb_inst_retire]
-  sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RC           ;//[nb_inst_retire]
-  sc_signal<Tspecial_address_t>   **  in_RETIRE_NUM_REG_RC_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RA           ;//[nb_inst_retire]
+//sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RA_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RB           ;//[nb_inst_retire]
+//sc_signal<Tgeneral_address_t>   **  in_RETIRE_NUM_REG_RB_PHY    ;//[nb_inst_retire]
+//sc_signal<Tcontrol_t        >   **  in_RETIRE_READ_RC           ;//[nb_inst_retire]
+//sc_signal<Tspecial_address_t>   **  in_RETIRE_NUM_REG_RC_PHY    ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_WRITE_RD          ;//[nb_inst_retire]
   sc_signal<Tcontrol_t        >   **  in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire]
@@ -99,23 +101,25 @@
   ALLOC1_SC_SIGNAL( in_INSERT_VAL               ," in_INSERT_VAL               ",Tcontrol_t        ,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL(out_INSERT_ACK               ,"out_INSERT_ACK               ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RA           ," in_INSERT_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY    ," in_INSERT_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RB           ," in_INSERT_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY    ," in_INSERT_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_READ_RC           ," in_INSERT_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_insert);
-  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ," in_INSERT_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RA           ," in_INSERT_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY    ," in_INSERT_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RB           ," in_INSERT_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY    ," in_INSERT_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_READ_RC           ," in_INSERT_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_insert);
+//ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ," in_INSERT_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD          ," in_INSERT_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD," in_INSERT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE          ," in_INSERT_WRITE_RE          ",Tcontrol_t        ,_param->_nb_inst_insert);
+  ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD," in_INSERT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
   ALLOC1_SC_SIGNAL( in_RETIRE_VAL               ," in_RETIRE_VAL               ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL(out_RETIRE_ACK               ,"out_RETIRE_ACK               ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE           ," in_RETIRE_RESTORE           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA           ," in_RETIRE_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ," in_RETIRE_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB           ," in_RETIRE_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ," in_RETIRE_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC           ," in_RETIRE_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_retire);
-  ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ," in_RETIRE_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA           ," in_RETIRE_READ_RA           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY    ," in_RETIRE_NUM_REG_RA_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB           ," in_RETIRE_READ_RB           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY    ," in_RETIRE_NUM_REG_RB_PHY    ",Tgeneral_address_t,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC           ," in_RETIRE_READ_RC           ",Tcontrol_t        ,_param->_nb_inst_retire);
+//ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY    ," in_RETIRE_NUM_REG_RC_PHY    ",Tspecial_address_t,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD          ," in_RETIRE_WRITE_RD          ",Tcontrol_t        ,_param->_nb_inst_retire);
   ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t        ,_param->_nb_inst_retire);
@@ -145,13 +149,15 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL               ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK               ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC           ,_param->_nb_inst_insert);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY    ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC           ,_param->_nb_inst_insert);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE          ,_param->_nb_inst_insert);
+  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
 
@@ -159,10 +165,10 @@
   INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK               ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC           ,_param->_nb_inst_retire);
-  INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY    ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC           ,_param->_nb_inst_retire);
+//INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY    ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD          ,_param->_nb_inst_retire);
   INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
@@ -348,10 +354,10 @@
 
 	      in_INSERT_VAL                [i]->write((rand()%100) < percent_transaction_insert);
-	      in_INSERT_READ_RA            [i]->write(read_ra );
-	      in_INSERT_NUM_REG_RA_PHY     [i]->write(ra);
-	      in_INSERT_READ_RB            [i]->write(read_rb );
-	      in_INSERT_NUM_REG_RB_PHY     [i]->write(rb);
-	      in_INSERT_READ_RC            [i]->write(read_rc );
-	      in_INSERT_NUM_REG_RC_PHY     [i]->write(rc);
+// 	      in_INSERT_READ_RA            [i]->write(read_ra );
+// 	      in_INSERT_NUM_REG_RA_PHY     [i]->write(ra);
+// 	      in_INSERT_READ_RB            [i]->write(read_rb );
+// 	      in_INSERT_NUM_REG_RB_PHY     [i]->write(rb);
+// 	      in_INSERT_READ_RC            [i]->write(read_rc );
+// 	      in_INSERT_NUM_REG_RC_PHY     [i]->write(rc);
 	      in_INSERT_WRITE_RD           [i]->write(write_rd);
 	      in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd);
@@ -394,11 +400,11 @@
 
 	      in_RETIRE_VAL                [i]->write((rand()%100) < percent_transaction_retire);
-	      in_RETIRE_READ_RA            [i]->write(read_ra );
-	      in_RETIRE_RESTORE            [i]->write(0);
- 	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
-	      in_RETIRE_READ_RB            [i]->write(read_rb );
-	      in_RETIRE_NUM_REG_RB_PHY     [i]->write(rb);
-	      in_RETIRE_READ_RC            [i]->write(read_rc );
-	      in_RETIRE_NUM_REG_RC_PHY     [i]->write(rc);
+// 	      in_RETIRE_READ_RA            [i]->write(read_ra );
+// 	      in_RETIRE_RESTORE            [i]->write(0);
+//  	      in_RETIRE_NUM_REG_RA_PHY     [i]->write(ra);
+// 	      in_RETIRE_READ_RB            [i]->write(read_rb );
+// 	      in_RETIRE_NUM_REG_RB_PHY     [i]->write(rb);
+// 	      in_RETIRE_READ_RC            [i]->write(read_rc );
+// 	      in_RETIRE_NUM_REG_RC_PHY     [i]->write(rc);
 	      in_RETIRE_WRITE_RD           [i]->write(write_rd);
 	      in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0);
@@ -454,32 +460,32 @@
 	      if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read())
 		{
-		  Tcontrol_t         read_ra  = in_INSERT_READ_RA            [i]->read();
-		  Tgeneral_address_t ra       = in_INSERT_NUM_REG_RA_PHY     [i]->read();
-		  Tcontrol_t         read_rb  = in_INSERT_READ_RB            [i]->read();
-		  Tgeneral_address_t rb       = in_INSERT_NUM_REG_RB_PHY     [i]->read();
-		  Tcontrol_t         read_rc  = in_INSERT_READ_RC            [i]->read();
-		  Tspecial_address_t rc       = in_INSERT_NUM_REG_RC_PHY     [i]->read();
+// 		  Tcontrol_t         read_ra  = in_INSERT_READ_RA            [i]->read();
+// 		  Tgeneral_address_t ra       = in_INSERT_NUM_REG_RA_PHY     [i]->read();
+// 		  Tcontrol_t         read_rb  = in_INSERT_READ_RB            [i]->read();
+// 		  Tgeneral_address_t rb       = in_INSERT_NUM_REG_RB_PHY     [i]->read();
+// 		  Tcontrol_t         read_rc  = in_INSERT_READ_RC            [i]->read();
+// 		  Tspecial_address_t rc       = in_INSERT_NUM_REG_RC_PHY     [i]->read();
 		  Tgeneral_address_t rd_new   = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read();
 		  Tspecial_address_t re_new   = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read();		
 		  
 		  LABEL("INSERT [%d] - Accepted",i);
-		  LABEL(" * read_ra          : %d",read_ra );
-		  LABEL(" * reg_ra           : %d",ra      );
-		  LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
-		  LABEL(" * read_rb          : %d",read_rb );
-		  LABEL(" * reg_rb           : %d",rb      );
-		  LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
-		  LABEL(" * read_rc          : %d",read_rc );
-		  LABEL(" * reg_rc           : %d",rc      );
-		  LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
-		  LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
-		  LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
-		  LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
+// 		  LABEL(" * read_ra          : %d",read_ra );
+// 		  LABEL(" * reg_ra           : %d",ra      );
+// 		  LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
+// 		  LABEL(" * read_rb          : %d",read_rb );
+// 		  LABEL(" * reg_rb           : %d",rb      );
+// 		  LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
+// 		  LABEL(" * read_rc          : %d",read_rc );
+// 		  LABEL(" * reg_rc           : %d",rc      );
+// 		  LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
+// 		  LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
+// 		  LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
+// 		  LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
 		  LABEL(" * read_rd          : %d",write_rd);
 		  LABEL(" * reg_rd_new       : %d",rd_new  );
@@ -495,16 +501,16 @@
 		  LABEL("   * status[%d]._counter  : %d",re_new,spr_status[re_new]._counter );
 		  
-		  if (read_ra)
-		    {
-		      gpr_status[ra]._counter ++;
-		    }
-		  if (read_rb)
-		    {
-		      gpr_status[rb]._counter ++;
-		    }
-		  if (read_rc)
-		    {
-		      spr_status[rc]._counter ++;
-		    }
+// 		  if (read_ra)
+// 		    {
+// 		      gpr_status[ra]._counter ++;
+// 		    }
+// 		  if (read_rb)
+// 		    {
+// 		      gpr_status[rb]._counter ++;
+// 		    }
+// 		  if (read_rc)
+// 		    {
+// 		      spr_status[rc]._counter ++;
+// 		    }
 		  if (write_rd)
 		    {
@@ -544,10 +550,10 @@
 	      {
 		Tcontrol_t         restore        = in_RETIRE_RESTORE            [i]->read();
-		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
-		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
-		Tcontrol_t         read_rb        = in_RETIRE_READ_RB            [i]->read();
-		Tgeneral_address_t rb             = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
-		Tcontrol_t         read_rc        = in_RETIRE_READ_RC            [i]->read();
-		Tspecial_address_t rc             = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
+// 		Tcontrol_t         read_ra        = in_RETIRE_READ_RA            [i]->read();
+// 		Tgeneral_address_t ra             = in_RETIRE_NUM_REG_RA_PHY     [i]->read();
+// 		Tcontrol_t         read_rb        = in_RETIRE_READ_RB            [i]->read();
+// 		Tgeneral_address_t rb             = in_RETIRE_NUM_REG_RB_PHY     [i]->read();
+// 		Tcontrol_t         read_rc        = in_RETIRE_READ_RC            [i]->read();
+// 		Tspecial_address_t rc             = in_RETIRE_NUM_REG_RC_PHY     [i]->read();
 		Tcontrol_t         write_rd       = in_RETIRE_WRITE_RD           [i]->read();
 		Tcontrol_t         restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read();
@@ -561,22 +567,22 @@
 		LABEL("RETIRE [%d] - Accepted",i);
 		LABEL(" * restore          : %d",restore);
-		LABEL(" * read_ra          : %d",read_ra );
-		LABEL(" * reg_ra           : %d",ra      );
-		LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
-		LABEL(" * read_rb          : %d",read_rb );
-		LABEL(" * reg_rb           : %d",rb      );
-		LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
-		LABEL(" * read_rc          : %d",read_rc );
-		LABEL(" * reg_rc           : %d",rc      );
-		LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
-		LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
-		LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
-		LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
+// 		LABEL(" * read_ra          : %d",read_ra );
+// 		LABEL(" * reg_ra           : %d",ra      );
+// 		LABEL("   * status[%d]._is_free  : %d",ra,spr_status[ra]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",ra,spr_status[ra]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",ra,spr_status[ra]._counter );
+// 		LABEL(" * read_rb          : %d",read_rb );
+// 		LABEL(" * reg_rb           : %d",rb      );
+// 		LABEL("   * status[%d]._is_free  : %d",rb,spr_status[rb]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",rb,spr_status[rb]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",rb,spr_status[rb]._counter );
+// 		LABEL(" * read_rc          : %d",read_rc );
+// 		LABEL(" * reg_rc           : %d",rc      );
+// 		LABEL("   * status[%d]._is_free  : %d",rc,spr_status[rc]._is_free );
+// 		LABEL("   * status[%d]._is_link  : %d",rc,spr_status[rc]._is_link );
+// 		LABEL("   * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
+// 		LABEL("   * status[%d]._counter  : %d",rc,spr_status[rc]._counter );
 		LABEL(" * read_rd          : %d",write_rd);
 		LABEL(" * restore_rd_old   : %d",restore_rd_old);
@@ -604,16 +610,16 @@
 		LABEL("   * status[%d]._counter  : %d",re_new,spr_status[re_new]._counter );
 
-		if (read_ra)
-		  {
-		    gpr_status[ra]._counter --;
-		  }
-		if (read_rb)
-		  {
-		    gpr_status[rb]._counter --;
-		  }
-		if (read_rc)
-		  {
-		    spr_status[rc]._counter --;
-		  }
+// 		if (read_ra)
+// 		  {
+// 		    gpr_status[ra]._counter --;
+// 		  }
+// 		if (read_rb)
+// 		  {
+// 		    gpr_status[rb]._counter --;
+// 		  }
+// 		if (read_rc)
+// 		  {
+// 		    spr_status[rc]._counter --;
+// 		  }
 		if (write_rd)
 		  {
@@ -721,23 +727,25 @@
   delete []  in_INSERT_VAL               ;
   delete [] out_INSERT_ACK               ;
-  delete []  in_INSERT_READ_RA           ;
-  delete []  in_INSERT_NUM_REG_RA_PHY    ;
-  delete []  in_INSERT_READ_RB           ;
-  delete []  in_INSERT_NUM_REG_RB_PHY    ;
-  delete []  in_INSERT_READ_RC           ;
-  delete []  in_INSERT_NUM_REG_RC_PHY    ;
+//delete []  in_INSERT_READ_RA           ;
+//delete []  in_INSERT_NUM_REG_RA_PHY    ;
+//delete []  in_INSERT_READ_RB           ;
+//delete []  in_INSERT_NUM_REG_RB_PHY    ;
+//delete []  in_INSERT_READ_RC           ;
+//delete []  in_INSERT_NUM_REG_RC_PHY    ;
   delete []  in_INSERT_WRITE_RD          ;
+  delete []  in_INSERT_NUM_REG_RD_PHY_OLD;
   delete []  in_INSERT_NUM_REG_RD_PHY_NEW;
   delete []  in_INSERT_WRITE_RE          ;
+  delete []  in_INSERT_NUM_REG_RE_PHY_OLD;
   delete []  in_INSERT_NUM_REG_RE_PHY_NEW;
   delete []  in_RETIRE_VAL               ;
   delete [] out_RETIRE_ACK               ;
   delete []  in_RETIRE_RESTORE           ;
-  delete []  in_RETIRE_READ_RA           ;
-  delete []  in_RETIRE_NUM_REG_RA_PHY    ;
-  delete []  in_RETIRE_READ_RB           ;
-  delete []  in_RETIRE_NUM_REG_RB_PHY    ;
-  delete []  in_RETIRE_READ_RC           ;
-  delete []  in_RETIRE_NUM_REG_RC_PHY    ;
+//delete []  in_RETIRE_READ_RA           ;
+//delete []  in_RETIRE_NUM_REG_RA_PHY    ;
+//delete []  in_RETIRE_READ_RB           ;
+//delete []  in_RETIRE_NUM_REG_RB_PHY    ;
+//delete []  in_RETIRE_READ_RC           ;
+//delete []  in_RETIRE_NUM_REG_RC_PHY    ;
   delete []  in_RETIRE_WRITE_RD          ;
   delete []  in_RETIRE_RESTORE_RD_PHY_OLD;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h	(revision 117)
@@ -72,8 +72,10 @@
   public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RC_PHY    ;//[nb_inst_insert]
   public    : SC_IN (Tcontrol_t        )   **  in_INSERT_WRITE_RD          ;//[nb_inst_insert]
+  public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert]
   public    : SC_IN (Tgeneral_address_t)   **  in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert]
   public    : SC_IN (Tcontrol_t        )   **  in_INSERT_WRITE_RE          ;//[nb_inst_insert]
+  public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert]
   public    : SC_IN (Tspecial_address_t)   **  in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert]
-
+  
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_VAL               ;//[nb_inst_retire]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h	(revision 117)
@@ -23,8 +23,9 @@
   class stat_list_entry_t
   {
-  public : bool     _is_free ; // set = is present in free list
-  public : bool     _is_link ; // set = is present in rat
-//public : bool     _is_valid; // set = an instruction have write in this register
-//public : uint32_t _counter ; // number of register that must read this register
+  public : bool     _is_free      ; // set = is present in free list
+  public : bool     _is_link      ; // set = is present in rat
+  public : bool     _is_use       ; // set = is present in ROB (used by an instruction as destination)
+                                    // not necesseray in single thread mode : because an thread can't rename when they have an event
+                                    // in multi thread, the renaming continue and an old register can be reused
 
   public :  stat_list_entry_t (void) {};
@@ -35,24 +36,19 @@
       _is_free  = 0;
       _is_link  = is_link;
-//    _is_valid = 1;
-//    _counter  = 0;
+      _is_use   = is_link;
     }
 
-//   public : void insert_read (void)
-//     {
-//    _counter ++;
-//     }
+  public : void insert_write_old (void)
+    {
+      // old is not in the rat, but is already used (if miss prediction or event)
+      _is_link  = 0;
+    }
 
-  public : void insert_write (void)
+  public : void insert_write_new (void)
     {
       _is_free  = 0;
       _is_link  = 1;
-//    _is_valid = 0;
+      _is_use   = 1;
     }
-
-//   public : void retire_read (void)
-//     {
-//    _counter --;
-//     }
 
   public : void retire_write_old (bool restore, bool restore_old)
@@ -62,6 +58,16 @@
       // 1       0           0       - event and previous update
       // 1       1           1       - event and first update
-      
-      _is_link = restore and restore_old;
+   
+      if (restore and restore_old)
+        {
+          _is_link = 1;
+//        _is_use  = 1; // already set
+        }
+      else
+        {
+//        _is_link = 0; // already unset
+          _is_use  = 0;
+        }
+        
     }
 
@@ -73,8 +79,11 @@
 
       if (restore)
-        _is_link = 0;
+        {
+          // test if is the actual mapping (in RAT)
+          if (_is_link)
+            _is_use = 0;
 
-      // in all case
-//    _is_valid = 1;
+          _is_link = 0;
+        }
     }
 
@@ -84,16 +93,9 @@
     }
 
-//   public : bool can_insert_read (uint32_t max_reader)
-//     {
-//    return ((_counter+1) < max_reader);
-//     }
-
   public : bool can_free (void)
     {
       return ((_is_free  == 0) and
-	      (_is_link  == 0) // and
-//  	      (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset
-// 	      (_counter  == 0)
-              );
+	      (_is_link  == 0) and
+              (_is_use   == 0));
     }
 
@@ -102,8 +104,6 @@
     {
       output << x._is_free  << " "
-             << x._is_link  // << " "
-//           << x._is_valid  << " "
-//              << x._counter
-        ;
+             << x._is_link  << " "
+             << x._is_use ;
       
       return output;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp	(revision 117)
@@ -69,15 +69,17 @@
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY    ,"num_reg_rc_phy"    ,Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RD          ,"write_rd"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE          ,"write_re"          ,Tcontrol_t        ,1                             );
+       ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register);
        ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register);
-
+  
        ALLOC1_INTERFACE_END(_param->_nb_inst_insert);
      }
-
+  
      // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
        ALLOC1_INTERFACE_BEGIN("retire",IN,NORTH,_("Retire a renaming result"),_param->_nb_inst_retire);
-
+  
        ALLOC1_VALACK_IN ( in_RETIRE_VAL               ,VAL);
        ALLOC1_VALACK_OUT(out_RETIRE_ACK               ,ACK);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp	(revision 117)
@@ -39,8 +39,10 @@
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RC_PHY    ,_param->_nb_inst_insert,_param->_size_special_register);
         DELETE1_SIGNAL( in_INSERT_WRITE_RD          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register);
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register);
         DELETE1_SIGNAL( in_INSERT_WRITE_RE          ,_param->_nb_inst_insert,1                             );
+        DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register);
         DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register);
-
+  
         DELETE1_SIGNAL( in_RETIRE_VAL               ,_param->_nb_inst_retire,1);
         DELETE1_SIGNAL(out_RETIRE_ACK               ,_param->_nb_inst_retire,1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp	(revision 117)
@@ -86,23 +86,45 @@
 	      if (PORT_READ(in_INSERT_WRITE_RD [i]))
 		{
-		  Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg new : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_gpr;
-		  uint32_t reg  = num_reg  & _param->_mask_gpr ;
-		  gpr_stat_list [bank][reg].insert_write();
+                  {
+                    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_OLD [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg old : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_gpr;
+                    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+                    gpr_stat_list [bank][reg].insert_write_old();
+                  }
+                  {
+                    Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RD - num_reg new : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_gpr;
+                    uint32_t reg  = num_reg  & _param->_mask_gpr ;
+                    gpr_stat_list [bank][reg].insert_write_new();
+                  }
 		}
 
 	      if (PORT_READ(in_INSERT_WRITE_RE [i]))
 		{
-		  Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
-
-                  log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg new : %d",num_reg);
-
-		  uint32_t bank = num_reg >> _param->_shift_spr;
-		  uint32_t reg  = num_reg  & _param->_mask_spr ;
-		  spr_stat_list [bank][reg].insert_write();
-		}
+                  {
+                    Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg old : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_spr;
+                    uint32_t reg  = num_reg  & _param->_mask_spr ;
+                    spr_stat_list [bank][reg].insert_write_old();
+                  }
+                  {
+                    Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]);
+                    
+                    log_printf(TRACE,Stat_List_unit,FUNCTION,"    * WRITE_RE - num_reg new : %d",num_reg);
+                    
+                    uint32_t bank = num_reg >> _param->_shift_spr;
+                    uint32_t reg  = num_reg  & _param->_mask_spr ;
+                    spr_stat_list [bank][reg].insert_write_new();
+                  }
+                }
 	    }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp	(revision 117)
@@ -638,8 +638,12 @@
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD"          ,
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RD"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_OLD");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW",
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_NEW");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE"          ,
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RE"          );
+	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD",
+		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_OLD");
 	  COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW",
 		                   dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_NEW");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg	(revision 117)
@@ -7,5 +7,4 @@
 1	1	+1	# nb_inst_insert                    [0]               [nb_rename_unit]
 1	1	+1	# nb_inst_retire                    [0]               [nb_rename_unit]
-1	1	+1	# nb_inst_issue                                       
 1	1	+1	# nb_inst_execute                   [0]               [nb_execute_loop]
 1	1	+1	# nb_inst_reexecute                                   
@@ -28,17 +27,4 @@
 1	1	+1	# issue_priority                           
 1	1	+1	# issue_load_balancing                     
-1	1	+1	# table_routing                     [0][0]            [nb_rename_unit][nb_inst_issue]
-1	1	+1	# table_issue_type                  [0][TYPE_ALU    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_SHIFT  ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MOVE   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_TEST   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MUL    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_DIV    ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_FIND   ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]
-1	1	+1	# table_issue_type                  [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]
 1	1	+1	# size_reexecute_queue                     
 1	1	+1	# reexecute_priority                       
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp	(revision 117)
@@ -9,5 +9,5 @@
 #include "Behavioural/include/Allocation.h"
 
-#define NB_PARAMS 24
+#define NB_PARAMS 23
 
 void usage (int argc, char * argv[])
@@ -22,5 +22,5 @@
   err (_(" * nb_inst_insert                    [nb_rename_unit]                      (uint32_t             )\n"));
   err (_(" * nb_inst_retire                    [nb_rename_unit]                      (uint32_t             )\n"));
-  err (_(" * nb_inst_issue                                                           (uint32_t             )\n"));
+//err (_(" * nb_inst_issue                                                           (uint32_t             )\n"));
   err (_(" * nb_inst_execute                   [nb_execute_loop]                     (uint32_t             )\n"));
   err (_(" * nb_inst_reexecute                                                       (uint32_t             )\n"));
@@ -43,18 +43,18 @@
   err (_(" * issue_priority                                                          (Tpriority_t          )\n"));
   err (_(" * issue_load_balancing                                                    (Tload_balancing_t    )\n"));
-  err (_(" * table_routing                     [nb_rename_unit][nb_inst_issue]       (bool                 )\n"));
-  err (_(" * table_issue_type                  [nb_inst_issue][nb_type]              (bool                 )\n"));
-  err (_("   * TYPE_ALU    \n"));
-  err (_("   * TYPE_SHIFT  \n"));
-  err (_("   * TYPE_MOVE   \n"));
-  err (_("   * TYPE_TEST   \n"));
-  err (_("   * TYPE_MUL    \n"));
-  err (_("   * TYPE_DIV    \n"));
-  err (_("   * TYPE_EXTEND \n"));
-  err (_("   * TYPE_FIND   \n"));
-  err (_("   * TYPE_SPECIAL\n"));
-  err (_("   * TYPE_CUSTOM \n"));
-  err (_("   * TYPE_BRANCH \n"));
-  err (_("   * TYPE_MEMORY \n"));
+//   err (_(" * table_routing                     [nb_rename_unit][nb_inst_issue]       (bool                 )\n"));
+//   err (_(" * table_issue_type                  [nb_inst_issue][nb_type]              (bool                 )\n"));
+//   err (_("   * TYPE_ALU    \n"));
+//   err (_("   * TYPE_SHIFT  \n"));
+//   err (_("   * TYPE_MOVE   \n"));
+//   err (_("   * TYPE_TEST   \n"));
+//   err (_("   * TYPE_MUL    \n"));
+//   err (_("   * TYPE_DIV    \n"));
+//   err (_("   * TYPE_EXTEND \n"));
+//   err (_("   * TYPE_FIND   \n"));
+//   err (_("   * TYPE_SPECIAL\n"));
+//   err (_("   * TYPE_CUSTOM \n"));
+//   err (_("   * TYPE_BRANCH \n"));
+//   err (_("   * TYPE_MEMORY \n"));
   err (_(" * size_reexecute_queue                                                    (uint32_t         )\n"));
   err (_(" * reexecute_priority                                                      (Tpriority_t      )\n"));
@@ -120,5 +120,5 @@
     _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]);
 
-  uint32_t              _nb_inst_issue                     = fromString<uint32_t         >(argv[x++]);
+//uint32_t              _nb_inst_issue                     = fromString<uint32_t         >(argv[x++]);
   uint32_t            * _nb_inst_execute                   = new uint32_t [_nb_execute_loop];
   for (uint32_t i=0; i<_nb_execute_loop; i++)
@@ -152,35 +152,36 @@
   Tpriority_t           _issue_priority                    = fromString<Tpriority_t      >(argv[x++]);
   Tload_balancing_t     _issue_load_balancing              = fromString<Tload_balancing_t>(argv[x++]);
-  bool               ** _table_routing                     = new bool * [_nb_rename_unit];
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    {
-      _table_routing [i] = new bool [_nb_inst_issue];
-      for (uint32_t j=0; j<_nb_inst_issue; j++)
-        _table_routing [i][j] = fromString<bool>(argv[x++]);
-    }
-
-  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue))
+//   bool               ** _table_routing                     = new bool * [_nb_rename_unit];
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     {
+//       _table_routing [i] = new bool [_nb_inst_issue];
+//       for (uint32_t j=0; j<_nb_inst_issue; j++)
+//         _table_routing [i][j] = fromString<bool>(argv[x++]);
+//     }
+
+  if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop//+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue
+                               ))
     usage (argc, argv);
   
-  bool               ** _table_issue_type                  = new bool * [_nb_inst_issue];
-  for (uint32_t i=0; i<_nb_inst_issue; i++)    
-    {
-      _table_issue_type [i] = new bool [MAX_TYPE];
-      for (uint32_t j=0; j<MAX_TYPE; j++)
-        _table_issue_type [i][j] = false;
-
-      _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
-      _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
-    }
+//   bool               ** _table_issue_type                  = new bool * [_nb_inst_issue];
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)    
+//     {
+//       _table_issue_type [i] = new bool [MAX_TYPE];
+//       for (uint32_t j=0; j<MAX_TYPE; j++)
+//         _table_issue_type [i][j] = false;
+
+//       _table_issue_type [i][TYPE_ALU    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SHIFT  ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MOVE   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_TEST   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MUL    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_DIV    ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_FIND   ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);
+//       _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);
+//     }
   
   uint32_t              _size_reexecute_queue              = fromString<uint32_t         >(argv[x++]);
@@ -220,5 +221,6 @@
     }
 
-  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue))
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+// _nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue
+                               3*_sum_nb_load_store_queue))
     usage (argc, argv);
 
@@ -294,5 +296,5 @@
          _nb_inst_insert                   ,
          _nb_inst_retire                   ,
-         _nb_inst_issue                    ,
+//       _nb_inst_issue                    ,
          _nb_inst_execute                  ,
          _nb_inst_reexecute                ,
@@ -315,6 +317,6 @@
          _issue_priority                   ,
          _issue_load_balancing             ,
-         _table_routing                    ,
-         _table_issue_type                 ,
+//          _table_routing                    ,
+//          _table_issue_type                 ,
          _size_reexecute_queue             ,
          _reexecute_priority               ,
@@ -400,11 +402,11 @@
   delete [] _rename_select_priority            ;
 
-  for (uint32_t i=0; i<_nb_inst_issue; i++)    
-    delete [] _table_issue_type [i];
-  delete [] _table_issue_type;  
-
-  for (uint32_t i=0; i<_nb_rename_unit; i++)
-    delete [] _table_routing [i];
-  delete [] _table_routing;
+//   for (uint32_t i=0; i<_nb_inst_issue; i++)    
+//     delete [] _table_issue_type [i];
+//   delete [] _table_issue_type;  
+
+//   for (uint32_t i=0; i<_nb_rename_unit; i++)
+//     delete [] _table_routing [i];
+//   delete [] _table_routing;
 
   delete [] _link_rename_unit_with_front_end;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp	(revision 117)
@@ -52,4 +52,131 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t        > ***  in_RENAME_VAL                       ;
+  sc_signal<Tcontrol_t        > *** out_RENAME_ACK                       ;
+  sc_signal<Tcontext_t        > ***  in_RENAME_FRONT_END_ID              ;
+  sc_signal<Tcontext_t        > ***  in_RENAME_CONTEXT_ID                ;
+  sc_signal<Tdepth_t          > ***  in_RENAME_DEPTH                     ;
+  sc_signal<Ttype_t           > ***  in_RENAME_TYPE                      ;
+  sc_signal<Toperation_t      > ***  in_RENAME_OPERATION                 ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_NO_EXECUTE                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_IS_DELAY_SLOT             ;
+  sc_signal<Taddress_t        > ***  in_RENAME_ADDRESS                   ;
+  sc_signal<Taddress_t        > ***  in_RENAME_ADDRESS_NEXT              ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_HAS_IMMEDIAT              ;
+  sc_signal<Tgeneral_data_t   > ***  in_RENAME_IMMEDIAT                  ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RA                   ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RA                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RB                   ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RB                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_READ_RC                   ;
+  sc_signal<Tspecial_address_t> ***  in_RENAME_NUM_REG_RC                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_WRITE_RD                  ;
+  sc_signal<Tgeneral_address_t> ***  in_RENAME_NUM_REG_RD                ;
+  sc_signal<Tcontrol_t        > ***  in_RENAME_WRITE_RE                  ;
+  sc_signal<Tspecial_address_t> ***  in_RENAME_NUM_REG_RE                ;
+  sc_signal<Texception_t      > ***  in_RENAME_EXCEPTION_USE             ;
+  sc_signal<Texception_t      > ***  in_RENAME_EXCEPTION                 ;
+
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_VAL                        ;
+  sc_signal<Tcontrol_t        >  **  in_ISSUE_ACK                        ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_FRONT_END_ID               ;
+  sc_signal<Tcontext_t        >  ** out_ISSUE_CONTEXT_ID                 ;
+  sc_signal<Tpacket_t         >  ** out_ISSUE_PACKET_ID                  ;
+  sc_signal<Ttype_t           >  ** out_ISSUE_TYPE                       ;
+  sc_signal<Toperation_t      >  ** out_ISSUE_OPERATION                  ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_STORE_QUEUE_PTR_WRITE      ;
+  sc_signal<Tlsq_ptr_t        >  ** out_ISSUE_LOAD_QUEUE_PTR_WRITE       ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_HAS_IMMEDIAT               ;
+  sc_signal<Tgeneral_data_t   >  ** out_ISSUE_IMMEDIAT                   ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RA                    ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RA                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RB                    ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RB                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_READ_RC                    ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_NUM_REG_RC                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_WRITE_RD                   ;
+  sc_signal<Tgeneral_address_t>  ** out_ISSUE_NUM_REG_RD                 ;
+  sc_signal<Tcontrol_t        >  ** out_ISSUE_WRITE_RE                   ;
+  sc_signal<Tspecial_address_t>  ** out_ISSUE_NUM_REG_RE                 ;
+
+  sc_signal<Tcontrol_t        > ***  in_EXECUTE_LOOP_VAL                 ;
+  sc_signal<Tcontrol_t        > *** out_EXECUTE_LOOP_ACK                 ;
+  sc_signal<Tcontext_t        > ***  in_EXECUTE_LOOP_FRONT_END_ID        ;
+  sc_signal<Tcontext_t        > ***  in_EXECUTE_LOOP_CONTEXT_ID          ;
+  sc_signal<Tpacket_t         > ***  in_EXECUTE_LOOP_PACKET_ID           ;
+//sc_signal<Ttype_t           > ***  in_EXECUTE_LOOP_TYPE                ;
+//sc_signal<Toperation_t      > ***  in_EXECUTE_LOOP_OPERATION           ;
+  sc_signal<Tspecial_data_t   > ***  in_EXECUTE_LOOP_FLAGS               ;
+  sc_signal<Texception_t      > ***  in_EXECUTE_LOOP_EXCEPTION           ;
+  sc_signal<Tcontrol_t        > ***  in_EXECUTE_LOOP_NO_SEQUENCE         ;
+  sc_signal<Taddress_t        > ***  in_EXECUTE_LOOP_ADDRESS             ;
+  sc_signal<Tgeneral_data_t   > ***  in_EXECUTE_LOOP_DATA                ;
+
+  sc_signal<Tcontrol_t        >  ** out_INSERT_VAL                       ;
+  sc_signal<Tcontrol_t        >  **  in_INSERT_ACK                       ;
+  sc_signal<Tcontrol_t        >  ** out_INSERT_RD_USE                    ;
+  sc_signal<Tgeneral_address_t>  ** out_INSERT_RD_NUM_REG                ;
+  sc_signal<Tcontrol_t        >  ** out_INSERT_RE_USE                    ;
+  sc_signal<Tspecial_address_t>  ** out_INSERT_RE_NUM_REG                ;
+
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_VAL                       ;
+//sc_signal<Tcontrol_t        >  **  in_RETIRE_ACK                       ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RD_OLD_USE                ;
+//sc_signal<Tgeneral_address_t>  ** out_RETIRE_RD_OLD_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RD_NEW_USE                ;
+//sc_signal<Tgeneral_address_t>  ** out_RETIRE_RD_NEW_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RE_OLD_USE                ;
+//sc_signal<Tspecial_address_t>  ** out_RETIRE_RE_OLD_NUM_REG            ;
+//sc_signal<Tcontrol_t        >  ** out_RETIRE_RE_NEW_USE                ;
+//sc_signal<Tspecial_address_t>  ** out_RETIRE_RE_NEW_NUM_REG            ;
+
+  sc_signal<Tcontrol_t        >  ** out_BRANCH_COMPLETE_VAL              ;
+  sc_signal<Tcontrol_t        >  **  in_BRANCH_COMPLETE_ACK              ;
+  sc_signal<Tcontext_t        >  ** out_BRANCH_COMPLETE_FRONT_END_ID     ;
+  sc_signal<Tcontext_t        >  ** out_BRANCH_COMPLETE_CONTEXT_ID       ;
+  sc_signal<Tdepth_t          >  ** out_BRANCH_COMPLETE_DEPTH            ;
+  sc_signal<Taddress_t        >  ** out_BRANCH_COMPLETE_ADDRESS          ;
+  sc_signal<Tcontrol_t        >  ** out_BRANCH_COMPLETE_NO_SEQUENCE      ;
+  sc_signal<Tcontrol_t        >  **  in_BRANCH_COMPLETE_MISS_PREDICTION  ;
+
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_VAL                 ;
+  sc_signal<Tcontrol_t        >   *  in_COMMIT_EVENT_ACK                 ;
+  sc_signal<Tcontext_t        >   * out_COMMIT_EVENT_FRONT_END_ID        ;
+  sc_signal<Tcontext_t        >   * out_COMMIT_EVENT_CONTEXT_ID          ;
+  sc_signal<Tdepth_t          >   * out_COMMIT_EVENT_DEPTH               ;
+  sc_signal<Tevent_type_t     >   * out_COMMIT_EVENT_TYPE                ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_IS_DELAY_SLOT       ;
+  sc_signal<Taddress_t        >   * out_COMMIT_EVENT_ADDRESS             ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_ADDRESS_EPCR_VAL    ;
+  sc_signal<Taddress_t        >   * out_COMMIT_EVENT_ADDRESS_EPCR        ;
+  sc_signal<Tcontrol_t        >   * out_COMMIT_EVENT_ADDRESS_EEAR_VAL    ;
+  sc_signal<Tgeneral_data_t   >   * out_COMMIT_EVENT_ADDRESS_EEAR        ;
+
+  sc_signal<Tcontrol_t        > ***  in_EVENT_VAL                        ;
+  sc_signal<Tcontrol_t        > *** out_EVENT_ACK                        ;
+  sc_signal<Taddress_t        > ***  in_EVENT_ADDRESS                    ;
+  sc_signal<Taddress_t        > ***  in_EVENT_ADDRESS_NEXT               ;
+  sc_signal<Tcontrol_t        > ***  in_EVENT_ADDRESS_NEXT_VAL           ;
+  sc_signal<Tcontrol_t        > ***  in_EVENT_IS_DS_TAKE                 ;
+
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_VAL                    ;
+  sc_signal<Tcontrol_t        > *** out_SPR_EVENT_ACK                    ;
+  sc_signal<Tspr_t            > ***  in_SPR_EVENT_EPCR                   ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_EEAR_WEN               ;
+  sc_signal<Tspr_t            > ***  in_SPR_EVENT_EEAR                   ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_SR_DSX                 ;
+  sc_signal<Tcontrol_t        > ***  in_SPR_EVENT_SR_TO_ESR              ;
+
+  sc_signal<Tcounter_t        > *** out_NB_INST_COMMIT_ALL               ;
+  sc_signal<Tcounter_t        > *** out_NB_INST_COMMIT_MEM               ;
+  sc_signal<Tcounter_t        > ***  in_NB_INST_DECOD_ALL                ;
+
+  sc_signal<Tdepth_t          > ***  in_DEPTH_MIN                        ;
+  sc_signal<Tdepth_t          > ***  in_DEPTH_MAX                        ;
+  sc_signal<Tcontrol_t        > ***  in_DEPTH_FULL                       ;
+
+  sc_signal<Tcontrol_t        > *** out_SPR_SR_IEE                       ;
+  sc_signal<Tcontrol_t        > *** out_SPR_SR_EPH                       ;
 
   ALLOC2_SC_SIGNAL( in_RENAME_VAL                       ," in_RENAME_VAL                       ",Tcontrol_t        ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp	(revision 117)
@@ -61,4 +61,13 @@
     }
 
+  uint32_t    num_thread = 0;
+  uint32_t ** _translate_num_context_to_num_thread       = new uint32_t * [_nb_front_end];
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
+      _translate_num_context_to_num_thread [i] = new uint32_t [_nb_context[i]];
+      for (uint32_t j=0; j<_nb_context[i]; j++)
+        _translate_num_context_to_num_thread [i][j] = num_thread ++;
+    }
+
   int _return = EXIT_SUCCESS;
   try 
@@ -70,4 +79,5 @@
 	 _nb_inst_reexecute ,
 	 _implement_group   ,
+         _translate_num_context_to_num_thread,
          true //is_toplevel
         );
@@ -100,4 +110,11 @@
   for (uint32_t i=0; i<_nb_front_end; i++)
     {
+      delete [] _translate_num_context_to_num_thread [i];
+    }
+  delete [] _translate_num_context_to_num_thread;
+
+
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    {
       for (uint32_t j=0; j<_nb_context[i]; j++)
 	delete [] _implement_group [i][j];
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h	(revision 117)
@@ -27,4 +27,5 @@
   public : uint32_t     _nb_inst_reexecute     ;
   public : bool     *** _implement_group       ;//[nb_front_end][nb_context][NB_GROUP]
+  public : uint32_t  ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
 
   public : uint32_t     _max_nb_context        ;
@@ -41,4 +42,5 @@
 			uint32_t     nb_inst_reexecute     ,
 			bool     *** implement_group       ,
+                        uint32_t  ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                         bool         is_toplevel=false
 			);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h	(revision 117)
@@ -545,19 +545,50 @@
   // [0][21] CID
   //----------------------------------------------------------
-  class CID : public GENERIC 
-  {
-  public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][22] TID
-  //----------------------------------------------------------
-  class TID : public GENERIC 
-  {
-  public : TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][23] TSR
+  class CID : public morpheo::behavioural::SPR
+  {
+  private: const Tspr_t _cpu_id : 32; // cpu_id reset value
+  public :       Tspr_t  cpu_id : 32;
+
+  public :        CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+    _cpu_id ((param==NULL)?0:param->_translate_num_context_to_num_thread[num_front_end][num_context])
+    {};
+  public : void   reset (void  ) 
+    {
+      cpu_id = _cpu_id;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((cpu_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      cpu_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][22] TID - Thread Id
+  //----------------------------------------------------------
+  class TID : public morpheo::behavioural::SPR
+  {
+  public :       Tspr_t  thread_id : 32;
+
+  public :        TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL)
+    {};
+  public : void   reset (void  ) 
+    {
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((thread_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      thread_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][23] TSR - Thread Status Register
   //----------------------------------------------------------
   class TSR : public GENERIC 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp	(revision 117)
@@ -23,4 +23,5 @@
 			  uint32_t     nb_inst_reexecute     ,
 			  bool     *** implement_group       ,
+                          uint32_t  ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                           bool         is_toplevel
 			  )
@@ -32,4 +33,5 @@
     _nb_inst_reexecute      = nb_inst_reexecute;
     _implement_group        = implement_group  ;
+    _translate_num_context_to_num_thread = translate_num_context_to_num_thread;
 
     _max_nb_context         = max<uint32_t>(_nb_context,_nb_front_end);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp	(revision 117)
@@ -236,6 +236,7 @@
       for (uint32_t j=0; j<_param->_nb_context[i]; j++)
 	for (uint32_t k=0; k<NB_GROUP; k++)
-	  if (_param->_implement_group [i][j][k])
+          if (_param->_implement_group [i][j][k])
             {
+              
               for (uint32_t l=0; l<NB_REG_GROUP[k]; l++)
                 if (_spr [i][j][k][l] == NULL)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h	(revision 117)
@@ -62,6 +62,6 @@
   public : Tpriority_t           _issue_priority                   ;
   public : Tload_balancing_t     _issue_load_balancing             ;
-  public : bool               ** _table_routing                    ;//[nb_rename_unit][nb_inst_issue]
-  public : bool               ** _table_issue_type                 ;//[nb_inst_issue][nb_type]
+//   public : bool               ** _table_routing                    ;//[nb_rename_unit][nb_inst_issue]
+//   public : bool               ** _table_issue_type                 ;//[nb_inst_issue][nb_type]
     // Reexecute
   public : uint32_t              _size_reexecute_queue             ;
@@ -135,5 +135,5 @@
                         uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
                         uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
-                        uint32_t              nb_inst_issue                    ,
+//                      uint32_t              nb_inst_issue                    ,
                         uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
                         uint32_t              nb_inst_reexecute                ,
@@ -159,6 +159,6 @@
                         Tpriority_t           issue_priority                   ,
                         Tload_balancing_t     issue_load_balancing             ,
-                        bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
-                        bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+//                         bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+//                         bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
                         // Reexecute
                         uint32_t              size_reexecute_queue             ,
@@ -173,5 +173,5 @@
                         uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                         uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-//                         uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                      uint32_t            * size_read_counter                ,//[nb_rename_unit]
                         uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                         uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp	(revision 117)
@@ -674,7 +674,7 @@
                     COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE",
                                              dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE");
-                    x++;
-                    ++it;
                   }
+                x++;
+                ++it;
               }
         }
@@ -885,4 +885,10 @@
           COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN"        ,
                                    dest,"out_COMMIT_"+toString(i)+"_WEN"        );
+//        if (_param->_have_port_context_id)
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_CONTEXT_ID"  ,
+//                                 dest,"out_COMMIT_"+toString(i)+"_CONTEXT_ID"  );
+//        if (_param->_have_port_front_end_id)
+//        COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FRONT_END_ID",
+//                                 dest,"out_COMMIT_"+toString(i)+"_FRONT_END_ID");
           if (_param->_have_port_rob_ptr)
           COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID"  ,
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp	(revision 117)
@@ -25,5 +25,5 @@
                           uint32_t            * nb_inst_insert                   ,//[nb_rename_unit]
                           uint32_t            * nb_inst_retire                   ,//[nb_rename_unit]
-                          uint32_t              nb_inst_issue                    ,
+//                        uint32_t              nb_inst_issue                    ,
                           uint32_t            * nb_inst_execute                  ,//[nb_execute_loop]
                           uint32_t              nb_inst_reexecute                ,
@@ -49,6 +49,6 @@
                           Tpriority_t           issue_priority                   ,
                           Tload_balancing_t     issue_load_balancing             ,
-                          bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
-                          bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
+//                           bool               ** table_routing                    ,//[nb_rename_unit][nb_inst_issue]
+//                           bool               ** table_issue_type                 ,//[nb_inst_issue][nb_type]
                           // Reexecute
                           uint32_t              size_reexecute_queue             ,
@@ -63,5 +63,5 @@
                           uint32_t            * nb_reg_free                      ,//[nb_rename_unit]
                           uint32_t            * nb_rename_unit_bank              ,//[nb_rename_unit]
-//                           uint32_t            * size_read_counter                ,//[nb_rename_unit]
+//                        uint32_t            * size_read_counter                ,//[nb_rename_unit]
                           uint32_t            * nb_load_store_queue              ,//[nb_rename_unit]
                           uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
@@ -87,5 +87,5 @@
     _nb_inst_insert                    = nb_inst_insert                   ;
     _nb_inst_retire                    = nb_inst_retire                   ;
-    _nb_inst_issue                     = nb_inst_issue                    ;
+//  _nb_inst_issue                     = nb_inst_issue                    ;
     _nb_inst_execute                   = nb_inst_execute                  ;
     _nb_inst_reexecute                 = nb_inst_reexecute                ;
@@ -107,6 +107,6 @@
     _issue_priority                    = issue_priority                   ;
     _issue_load_balancing              = issue_load_balancing             ;
-    _table_routing                     = table_routing                    ;
-    _table_issue_type                  = table_issue_type                 ;
+//     _table_routing                     = table_routing                    ;
+//     _table_issue_type                  = table_issue_type                 ;
     _size_reexecute_queue              = size_reexecute_queue             ;
     _reexecute_priority                = reexecute_priority               ;
@@ -265,5 +265,5 @@
        _commit_load_balancing   ,
        _nb_rename_unit_select   ,
-       _nb_thread                          ,
+       _nb_thread               ,
        _translate_num_context_to_num_thread
        );
@@ -284,13 +284,15 @@
         size_store_queue_ptr    ,
         size_load_queue_ptr     ,
-       _nb_inst_issue           ,
+//     _nb_inst_issue           ,
        _nb_inst_insert          ,
        _nb_inst_reexecute       ,
        _nb_rename_unit_select   ,
        _issue_priority          ,
-       _issue_load_balancing    ,
-       _table_routing           ,
-       _table_issue_type        
+       _issue_load_balancing    // ,
+//        _table_routing           ,
+//        _table_issue_type        
        );
+
+    _nb_inst_issue = _param_issue_queue->_nb_inst_issue;
 
     _param_reexecute_unit        = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters  
@@ -319,5 +321,6 @@
        _nb_context            ,
        _nb_inst_reexecute     ,
-       _implement_group       
+       _implement_group       ,
+       _translate_num_context_to_num_thread
        );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp	(revision 117)
@@ -58,10 +58,10 @@
     str+= toString(MSG_INFORMATION)+"   * issue_priority                   : "+toString<Tpriority_t      >(_issue_priority                   )+"\n";
     str+= toString(MSG_INFORMATION)+"   * issue_load_balancing             : "+toString<Tload_balancing_t>(_issue_load_balancing             )+"\n";
-    for (uint32_t i=0; i<_nb_rename_unit; ++i)
-    for (uint32_t j=0; j<_nb_inst_issue ; ++j)
-    str+= toString(MSG_INFORMATION)+"   * table_routing                      ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_routing [i][j]             )+"\n";//[nb_rename_unit][nb_inst_issue]
-    for (uint32_t i=0; i<_nb_inst_issue ; ++i)
-    for (uint32_t j=0; j<_nb_type; ++j)
-    str+= toString(MSG_INFORMATION)+"   * table_issue_type                   ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_issue_type [i][j]          )+"\n";//[nb_inst_issue][nb_type]
+//  for (uint32_t i=0; i<_nb_rename_unit; ++i)
+//  for (uint32_t j=0; j<_nb_inst_issue ; ++j)
+//  str+= toString(MSG_INFORMATION)+"   * table_routing                      ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_routing [i][j]             )+"\n";//[nb_rename_unit][nb_inst_issue]
+//  for (uint32_t i=0; i<_nb_inst_issue ; ++i)
+//  for (uint32_t j=0; j<_nb_type; ++j)
+//  str+= toString(MSG_INFORMATION)+"   * table_issue_type                   ["+toString(i)+"]["+toString(j)+"] : "+toString<bool             >(_table_issue_type [i][j]          )+"\n";//[nb_inst_issue][nb_type]
     str+= toString(MSG_INFORMATION)+"   * size_reexecute_queue             : "+toString<uint32_t         >(_size_reexecute_queue             )+"\n";
     str+= toString(MSG_INFORMATION)+"   * reexecute_priority               : "+toString<Tpriority_t      >(_reexecute_priority               )+"\n";
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/test.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/test.cpp	(revision 117)
@@ -52,4 +52,35 @@
   sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);	 
   sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
+
+  sc_signal<Tcontrol_t           >  ** out_ICACHE_REQ_VAL         ;
+  sc_signal<Tcontrol_t           >  **  in_ICACHE_REQ_ACK         ;
+  sc_signal<Tcontext_t           >  ** out_ICACHE_REQ_THREAD_ID   ;
+  sc_signal<Tpacket_t            >  ** out_ICACHE_REQ_PACKET_ID   ;
+  sc_signal<Ticache_address_t    >  ** out_ICACHE_REQ_ADDRESS     ;
+  sc_signal<Ticache_type_t       >  ** out_ICACHE_REQ_TYPE        ;
+
+  sc_signal<Tcontrol_t           >  **  in_ICACHE_RSP_VAL         ;
+  sc_signal<Tcontrol_t           >  ** out_ICACHE_RSP_ACK         ;
+  sc_signal<Tcontext_t           >  **  in_ICACHE_RSP_THREAD_ID   ;
+  sc_signal<Tpacket_t            >  **  in_ICACHE_RSP_PACKET_ID   ;
+  sc_signal<Ticache_instruction_t> ***  in_ICACHE_RSP_INSTRUCTION ;
+  sc_signal<Ticache_error_t      >  **  in_ICACHE_RSP_ERROR       ;
+
+  sc_signal<Tcontrol_t           >  ** out_DCACHE_REQ_VAL         ;
+  sc_signal<Tcontrol_t           >  **  in_DCACHE_REQ_ACK         ;
+  sc_signal<Tcontext_t           >  ** out_DCACHE_REQ_THREAD_ID   ;
+  sc_signal<Tpacket_t            >  ** out_DCACHE_REQ_PACKET_ID   ;
+  sc_signal<Tdcache_address_t    >  ** out_DCACHE_REQ_ADDRESS     ;
+  sc_signal<Tdcache_data_t       >  ** out_DCACHE_REQ_WDATA       ;
+  sc_signal<Tdcache_type_t       >  ** out_DCACHE_REQ_TYPE        ;
+
+  sc_signal<Tcontrol_t           >  **  in_DCACHE_RSP_VAL         ;
+  sc_signal<Tcontrol_t           >  ** out_DCACHE_RSP_ACK         ;
+  sc_signal<Tcontext_t           >  **  in_DCACHE_RSP_THREAD_ID   ;
+  sc_signal<Tpacket_t            >  **  in_DCACHE_RSP_PACKET_ID   ;
+  sc_signal<Tdcache_data_t       >  **  in_DCACHE_RSP_RDATA       ;
+  sc_signal<Tdcache_error_t      >  **  in_DCACHE_RSP_ERROR       ;
+
+  sc_signal<Tcontrol_t           >  **  in_INTERRUPT_ENABLE       ;
 
   ALLOC1_SC_SIGNAL(out_ICACHE_REQ_VAL         ,"out_ICACHE_REQ_VAL        ",Tcontrol_t           ,_param->_nb_icache_port);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h	(revision 117)
@@ -135,5 +135,6 @@
   public : uint32_t                _nb_ooo_engine                                 ;
   public : uint32_t              * _nb_rename_unit                                ;//[nb_ooo_engine]
-  public : uint32_t              * _nb_inst_issue                                 ;//[nb_ooo_engine]
+  public : uint32_t              * _nb_inst_issue_queue                           ;//[nb_ooo_engine]
+  public : uint32_t              * _nb_inst_issue_slot                            ;//[nb_ooo_engine]
   public : uint32_t              * _nb_inst_reexecute                             ;//[nb_ooo_engine]
   public : uint32_t              * _nb_inst_commit                                ;//[nb_ooo_engine]
@@ -148,4 +149,5 @@
   public : multi_ooo_engine::ooo_engine::issue_queue::Tissue_queue_scheme_t
                                  * _issue_queue_scheme                            ;//[nb_ooo_engine]
+  public : bool                  * _issue_queue_in_order                          ;//[nb_ooo_engine]
   public : uint32_t              * _nb_issue_queue_bank                           ;//[nb_ooo_engine]
   public : Tpriority_t           * _issue_priority                                ;//[nb_ooo_engine]
@@ -179,5 +181,5 @@
   public : uint32_t              * _link_decod_bloc_with_thread                   ;//[nb_thread]
   public : uint32_t              * _link_rename_bloc_with_front_end               ;//[nb_front_end]
-  public : bool                *** _table_dispatch                                ;//[nb_ooo_engine][nb_inst_issue][nb_read_bloc]
+  public : bool                *** _table_dispatch                                ;//[nb_ooo_engine][nb_inst_issue_slot][nb_read_bloc]
   public : bool                 ** _link_read_bloc_and_load_store_unit            ;//[nb_read_bloc][nb_load_store_unit]
   public : bool                 ** _link_read_bloc_and_functionnal_unit           ;//[nb_read_bloc][nb_functionnal_unit]
@@ -251,7 +253,7 @@
   public : uint32_t             ** _ooo_engine_nb_reg_free                        ;//[nb_ooo_engine][nb_rename_unit]
   public : uint32_t             ** _ooo_engine_nb_rename_unit_bank                ;//[nb_ooo_engine][nb_rename_unit]
-//   public : uint32_t             ** _ooo_engine_size_read_counter                  ;//[nb_ooo_engine][nb_rename_unit]
-  public : bool                *** _ooo_engine_table_routing                      ;//[nb_ooo_engine][nb_rename_unit][nb_inst_issue]
-  public : bool                *** _ooo_engine_table_issue_type                   ;//[nb_ooo_engine][nb_inst_issue][nb_type]
+//public : uint32_t             ** _ooo_engine_size_read_counter                  ;//[nb_ooo_engine][nb_rename_unit]
+//public : bool                *** _ooo_engine_table_routing                      ;//[nb_ooo_engine][nb_rename_unit][nb_inst_issue_slot]
+//public : bool                *** _ooo_engine_table_issue_type                   ;//[nb_ooo_engine][nb_inst_issue_slot][nb_type]
   public : uint32_t             ** _ooo_engine_nb_load_store_unit                 ;//[nb_ooo_engine][nb_rename_unit]
   public : uint32_t            *** _ooo_engine_size_store_queue                   ;//[nb_ooo_engine][nb_rename_unit][ooo_engine_nb_load_store_unit]
@@ -331,5 +333,6 @@
 
 
-  public : bool               **** _network_table_dispatch                        ;//[nb_ooo_engine][nb_inst_issue][nb_execute_loop][nb_read_unit]
+  public : bool               **** _network_table_dispatch                        ;//[nb_ooo_engine][nb_inst_issue_slot][nb_execute_loop][nb_read_unit]
+  public : bool                *** _network_table_issue_type                      ;//                                   [nb_execute_loop][nb_read_unit][nb_type]
 
 
@@ -450,5 +453,5 @@
   uint32_t                nb_ooo_engine                                 ,
   uint32_t              * nb_rename_unit                                ,//[nb_ooo_engine]
-  uint32_t              * nb_inst_issue                                 ,//[nb_ooo_engine]
+  uint32_t              * nb_inst_issue_slot                            ,//[nb_ooo_engine]
   uint32_t              * nb_inst_reexecute                             ,//[nb_ooo_engine]
   uint32_t              * nb_inst_commit                                ,//[nb_ooo_engine]
@@ -494,5 +497,5 @@
   uint32_t              * link_decod_bloc_with_thread                   ,//[nb_thread]
   uint32_t              * link_rename_bloc_with_front_end               ,//[nb_front_end]
-  bool                *** table_dispatch                                ,//[nb_ooo_engine][nb_inst_issue][nb_read_bloc]
+  bool                *** table_dispatch                                ,//[nb_ooo_engine][nb_inst_issue_slot][nb_read_bloc]
   bool                 ** link_read_bloc_and_load_store_unit            ,//[nb_read_bloc][nb_load_store_unit]
   bool                 ** link_read_bloc_and_functionnal_unit           ,//[nb_read_bloc][nb_functionnal_unit]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp	(revision 117)
@@ -701,5 +701,5 @@
 
         // ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-        for (uint32_t j=0; j<_param->_nb_inst_issue [i]; ++j)
+        for (uint32_t j=0; j<_param->_nb_inst_issue_queue [i]; ++j)
           {
             dest = _name+"_glue";
@@ -1210,5 +1210,5 @@
             if (_param->_have_port_dcache_thread_id)
             COMPONENT_MAP(_component,src , "in_LSQ_REQ_"   +toString(i)+"_"+toString(j)+"_"+toString(k)+"_THREAD_ID",
-                                     dest,"out_DCACHE_REQ_"                +toString(j)+"_"+toString(k)+"_THREAD_ID");
+                                     dest,"out_DCACHE_REQ_"                +toString(j)+"_"+toString(k)+"_CONTEXT_ID");
             if (_param->_have_port_dcache_packet_id)
             COMPONENT_MAP(_component,src , "in_LSQ_REQ_"   +toString(i)+"_"+toString(j)+"_"+toString(k)+"_PACKET_ID",
@@ -1239,5 +1239,5 @@
             if (_param->_have_port_dcache_thread_id)
             COMPONENT_MAP(_component,src ,"out_LSQ_RSP_"   +toString(i)+"_"+toString(j)+"_"+toString(k)+"_THREAD_ID",
-                                     dest, "in_DCACHE_RSP_"                +toString(j)+"_"+toString(k)+"_THREAD_ID");
+                                     dest, "in_DCACHE_RSP_"                +toString(j)+"_"+toString(k)+"_CONTEXT_ID");
             if (_param->_have_port_dcache_packet_id)
             COMPONENT_MAP(_component,src ,"out_LSQ_RSP_"   +toString(i)+"_"+toString(j)+"_"+toString(k)+"_PACKET_ID",
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp	(revision 117)
@@ -107,5 +107,5 @@
   uint32_t              * nb_reg_free                                   ,//[nb_rename_bloc]
   uint32_t              * nb_rename_unit_bank                           ,//[nb_rename_bloc]
-//   uint32_t              * size_read_counter                             ,//[nb_rename_bloc]
+//uint32_t              * size_read_counter                             ,//[nb_rename_bloc]
 
   // Read bloc
@@ -173,5 +173,5 @@
   uint32_t                nb_ooo_engine                                 ,
   uint32_t              * nb_rename_unit                                ,//[nb_ooo_engine]
-  uint32_t              * nb_inst_issue                                 ,//[nb_ooo_engine]
+  uint32_t              * nb_inst_issue_slot                            ,//[nb_ooo_engine]
   uint32_t              * nb_inst_reexecute                             ,//[nb_ooo_engine]
   uint32_t              * nb_inst_commit                                ,//[nb_ooo_engine]
@@ -217,5 +217,5 @@
   uint32_t              * link_decod_bloc_with_thread                   ,//[nb_thread]
   uint32_t              * link_rename_bloc_with_front_end               ,//[nb_front_end]
-  bool                *** table_dispatch                                ,//[nb_ooo_engine][nb_inst_issue][nb_read_bloc]
+  bool                *** table_dispatch                                ,//[nb_ooo_engine][nb_inst_issue_slot][nb_read_bloc]
   bool                 ** link_read_bloc_and_load_store_unit            ,//[nb_read_bloc][nb_load_store_unit]
   bool                 ** link_read_bloc_and_functionnal_unit           ,//[nb_read_bloc][nb_functionnal_unit]
@@ -319,5 +319,5 @@
     _nb_ooo_engine                           = nb_ooo_engine                           ;
     _nb_rename_unit                          = nb_rename_unit                          ;
-    _nb_inst_issue                           = nb_inst_issue                           ;
+    _nb_inst_issue_slot                      = nb_inst_issue_slot                      ;
     _nb_inst_reexecute                       = nb_inst_reexecute                       ;
     _nb_inst_commit                          = nb_inst_commit                          ;
@@ -868,5 +868,5 @@
       for (uint32_t i=0; i<_nb_ooo_engine; ++i)
         {
-          for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+          for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
             for (uint32_t k=0; k<_nb_read_bloc; ++k)
               {
@@ -1003,7 +1003,7 @@
       }
     
-    ALLOC4(_network_table_dispatch                        ,bool             ,_nb_ooo_engine,_nb_inst_issue[it1],_nb_execute_loop,_nb_read_unit[it3]);
-    ALLOC3(_ooo_engine_table_routing                      ,bool             ,_nb_ooo_engine,_nb_rename_unit[it1],_nb_inst_issue[it1]);
-    ALLOC3(_ooo_engine_table_issue_type                   ,bool             ,_nb_ooo_engine,_nb_inst_issue[it1],_nb_type);
+    ALLOC4(_network_table_dispatch                        ,bool             ,_nb_ooo_engine,_nb_inst_issue_slot[it1],_nb_execute_loop,_nb_read_unit[it3]);
+//  ALLOC3(_ooo_engine_table_routing                      ,bool             ,_nb_ooo_engine,_nb_rename_unit[it1],_nb_inst_issue_slot[it1]);
+//  ALLOC3(_ooo_engine_table_issue_type                   ,bool             ,_nb_ooo_engine,_nb_inst_issue_slot[it1],_nb_type);
     ALLOC2(_list_functionnal_unit_with_rename_unit        ,std::vector<uint32_t>,_nb_ooo_engine,_nb_rename_unit[it1]);
     ALLOC2(_list_load_store_unit_with_rename_unit         ,std::vector<uint32_t>,_nb_ooo_engine,_nb_rename_unit[it1]);
@@ -1011,22 +1011,21 @@
     for (uint32_t i=0; i<_nb_ooo_engine; ++i)
       {
-        log_printf(TRACE,Core,FUNCTION,_(" * ooo_engine_table_issue_type [%d]"),i);
-
+//         log_printf(TRACE,Core,FUNCTION,_(" * ooo_engine_table_issue_type [%d]"),i);
 
         // Init
-        for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
           {
             for (uint32_t k=0; k<_nb_execute_loop; ++k)
               for (uint32_t l=0; l<_nb_read_unit[k]; ++l)
                 _network_table_dispatch [i][j][k][l] = false;
-            for (uint32_t k=0; k<_nb_rename_unit[i]; ++k)
-              _ooo_engine_table_routing [i][k][j] = false;
-            for (uint32_t k=0; k<_nb_type; ++k)
-              _ooo_engine_table_issue_type [i][j][k] = false;
+//             for (uint32_t k=0; k<_nb_rename_unit[i]; ++k)
+//               _ooo_engine_table_routing [i][k][j] = false;
+//             for (uint32_t k=0; k<_nb_type; ++k)
+//               _ooo_engine_table_issue_type [i][j][k] = false;
           }
 
-        std::vector<uint32_t> list_thread_with_inst_issue [_nb_inst_issue[i]];
+        std::vector<uint32_t> list_thread_with_inst_issue [_nb_inst_issue_slot[i]];
         
-        for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
           {
             for (uint32_t k=0; k<_nb_read_bloc; ++k)
@@ -1044,13 +1043,13 @@
                         {
                           // Scan timing table, test if have an instruction
-                          for (uint32_t m=0; m<_nb_type; ++m)
-                            for (uint32_t n=0; n<_nb_operation; ++n)
-                              if (_timing[l][m][n]._latence > 0)
-                                {
-                                  log_printf(TRACE,Core,FUNCTION,_("   [%d][%d] -> true"),j,m);
+//                           for (uint32_t m=0; m<_nb_type; ++m)
+//                             for (uint32_t n=0; n<_nb_operation; ++n)
+//                               if (_timing[l][m][n]._latence > 0)
+//                                 {
+//                                   log_printf(TRACE,Core,FUNCTION,_("   [%d][%d] -> true"),j,m);
                                   
-                                  _ooo_engine_table_issue_type [i][j][m] = true;
-                                  break;
-                                }
+//                                   _ooo_engine_table_issue_type [i][j][m] = true;
+//                                   break;
+//                                 }
                           
                           for (uint32_t m=0; m<_nb_thread; ++m)
@@ -1073,5 +1072,5 @@
                       if (_link_read_bloc_and_load_store_unit [k][l])
                        {
-                          _ooo_engine_table_issue_type [i][j][TYPE_MEMORY] = true;
+//                        _ooo_engine_table_issue_type [i][j][TYPE_MEMORY] = true;
 //                        _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBS)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBS)._type][instruction_information(INSTRUCTION_L_LBS)._operation]._latence > 0);
 //                        _ooo_engine_table_issue_type [i][j][instruction_information(INSTRUCTION_L_LBZ)._type] |= (_timing[l][instruction_information(INSTRUCTION_L_LBZ)._type][instruction_information(INSTRUCTION_L_LBZ)._operation]._latence > 0);
@@ -1131,30 +1130,71 @@
             }
 
-            uint32_t num_rename_bloc = _link_rename_bloc_with_rename_unit[i][j];
-
-            for (uint32_t k=0; k<_nb_front_end; ++k)
-              // test if this front_end is connected with this rename_bloc
-              if (_link_rename_bloc_with_front_end[k] == num_rename_bloc)
-                // the front end is connected with rename_bloc. Now test all slot issue that it can accepted this front_end
-                for (uint32_t l=0; l<_nb_inst_issue[i]; ++l)
-                  for (std::vector<uint32_t>::iterator it = list_thread_with_inst_issue [l].begin();
-                       it != list_thread_with_inst_issue [l].end();
-                       ++it)
-                    // Test if the this is in front_end [k]
-                    if (_link_context_with_thread[*it].first == k)
-                      {
-                        _ooo_engine_table_routing [i][j][l] |= true;
-                        log_printf(TRACE,Core,FUNCTION,_("   [%d][%d] -> true"),j,l);
-                      }
+//             uint32_t num_rename_bloc = _link_rename_bloc_with_rename_unit[i][j];
+
+//             for (uint32_t k=0; k<_nb_front_end; ++k)
+//               // test if this front_end is connected with this rename_bloc
+//               if (_link_rename_bloc_with_front_end[k] == num_rename_bloc)
+//                 // the front end is connected with rename_bloc. Now test all slot issue that it can accepted this front_end
+//                 for (uint32_t l=0; l<_nb_inst_issue_slot[i]; ++l)
+//                   for (std::vector<uint32_t>::iterator it = list_thread_with_inst_issue [l].begin();
+//                        it != list_thread_with_inst_issue [l].end();
+//                        ++it)
+//                     // Test if the this is in front_end [k]
+//                     if (_link_context_with_thread[*it].first == k)
+//                       {
+//                         _ooo_engine_table_routing [i][j][l] |= true;
+//                         log_printf(TRACE,Core,FUNCTION,_("   [%d][%d] -> true"),j,l);
+//                       }
           }
       }
     
-    log_printf(TRACE,Core,FUNCTION,_("  * network_table_dispatch [nb_ooo_engine][nb_inst_issue][nb_execute_loop][nb_read_unit]"));
+    log_printf(TRACE,Core,FUNCTION,_(" * network_table_dispatch [nb_ooo_engine][nb_inst_issue_slot][nb_execute_loop][nb_read_unit]"));
     for (uint32_t i=0; i<_nb_ooo_engine; ++i)
-      for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+      for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
         for (uint32_t k=0; k<_nb_execute_loop; ++k)
           for (uint32_t l=0; l<_nb_read_unit[k]; ++l)
             if (_network_table_dispatch [i][j][k][l] == true)
               log_printf(TRACE,Core,FUNCTION,_("   Issue Slot [%d][%d] is connected with Read_unit [%d][%d]"),i,j,k,l);
+
+    ALLOC3(_network_table_issue_type,bool,_nb_execute_loop,_nb_read_unit[it1],_nb_type);
+
+    log_printf(TRACE,Core,FUNCTION,_(" * network_table_issue_type"));
+    for (uint32_t i=0; i<_nb_execute_loop; ++i)
+      for (uint32_t j=0; j<_nb_read_unit[i]; ++j)
+        {
+          // init
+          for (uint32_t t=0; t<_nb_type; ++t)
+            _network_table_issue_type [i][j][t] = false;
+
+          // get number of read bloc
+          uint32_t num_read_bloc = _link_read_bloc_with_read_unit[i][j];
+
+          // for each functionnal unit : test if the read bloc is connected with the functionnal unit
+          for (uint32_t k=0; k<_nb_functionnal_unit; ++k)
+            if (_link_read_bloc_and_functionnal_unit [num_read_bloc][k])
+              // Scan timing table, test if have an instruction
+              for (uint32_t t=0; t<_nb_type; ++t)
+                for (uint32_t o=0; o<_nb_operation; ++o)
+                  if (_timing[k][t][o]._latence > 0)
+                    {
+                      log_printf(TRACE,Core,FUNCTION,_("   [%d][%d][%d] -> true"),i,j,t);
+                      
+                      _network_table_issue_type [i][j][t] = true;
+                      break; // operation
+                    }
+          
+          // Test load store unit connected with this read bloc
+          for (uint32_t k=0; k<_nb_load_store_unit; ++k)
+            // Test load store unit connected with this read bloc
+            if (_link_read_bloc_and_load_store_unit [num_read_bloc][k])
+              {
+                uint32_t t = TYPE_MEMORY;
+                
+                log_printf(TRACE,Core,FUNCTION,_("   [%d][%d][%d] -> true"),i,j,t);
+                
+                _network_table_issue_type [i][j][t] = true;
+                break; // load_store_unit
+              }
+        }
 
     ALLOC2(_ooo_engine_nb_load_store_unit                 ,uint32_t         ,_nb_ooo_engine,_nb_rename_unit[it1]);
@@ -1787,4 +1827,8 @@
         }
 
+    ALLOC1(_issue_queue_in_order,bool,_nb_ooo_engine);
+    for (uint32_t i=0; i<_nb_ooo_engine; ++i)
+      _issue_queue_in_order [i] = (_issue_queue_scheme [i] == core::multi_ooo_engine::ooo_engine::issue_queue::ISSUE_QUEUE_SCHEME_IN_ORDER);
+
     // parameters depends
     _size_ooo_engine_id                    = log2(_nb_ooo_engine);
@@ -1838,5 +1882,5 @@
     for (uint32_t i=0; i<_nb_front_end; ++i)
       _param_front_end [i]= new core::multi_front_end::front_end::Parameters 
-       (
+        (
         _nb_context                             [i],
         _nb_decod_unit                          [i],
@@ -1877,7 +1921,10 @@
         );
 
+    ALLOC1(_nb_inst_issue_queue,uint32_t,_nb_ooo_engine);
+
     _param_ooo_engine = new core::multi_ooo_engine::ooo_engine::Parameters * [_nb_ooo_engine];
 
     for (uint32_t i=0; i<_nb_ooo_engine; ++i)
+      {
     _param_ooo_engine [i] = new core::multi_ooo_engine::ooo_engine::Parameters 
       (
@@ -1889,5 +1936,5 @@
        _ooo_engine_nb_inst_insert                    [i],
        _ooo_engine_nb_inst_retire                    [i],
-       _nb_inst_issue                                [i],
+//        _nb_inst_issue                                [i],
        _ooo_engine_nb_inst_execute                   [i],
        _nb_inst_reexecute                            [i],
@@ -1910,6 +1957,6 @@
        _issue_priority                               [i],
        _issue_load_balancing                         [i],
-       _ooo_engine_table_routing                     [i],
-       _ooo_engine_table_issue_type                  [i],
+//        _ooo_engine_table_routing                     [i],
+//        _ooo_engine_table_issue_type                  [i],
        _size_reexecute_queue                         [i],
        _reexecute_priority                           [i],
@@ -1922,5 +1969,5 @@
        _ooo_engine_nb_reg_free                       [i],
        _ooo_engine_nb_rename_unit_bank               [i],
-//        _ooo_engine_size_read_counter                 [i],
+//     _ooo_engine_size_read_counter                 [i],
        _ooo_engine_nb_load_store_unit                [i],
        _ooo_engine_size_store_queue                  [i],
@@ -1932,4 +1979,6 @@
        _ooo_engine_translate_num_context_to_num_thread[i]
        );
+    _nb_inst_issue_queue [i] = _param_ooo_engine [i]->_nb_inst_issue;
+      }
 
     _param_execute_loop = new core::multi_execute_loop::execute_loop::Parameters * [_nb_execute_loop];
@@ -2045,6 +2094,9 @@
        _nb_inst_branch_complete              ,//[nb_ooo_engine]
        _ooo_engine_nb_inst_insert_rob        ,//[nb_ooo_engine]
-       _nb_inst_issue                        ,//[nb_ooo_engine]
+       _nb_inst_reexecute                    ,//[nb_ooo_engine]
+       _nb_inst_issue_queue                  ,//[nb_ooo_engine]
+       _nb_inst_issue_slot                   ,//[nb_ooo_engine]
        _ooo_engine_nb_inst_execute           ,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
+       _issue_queue_in_order                 ,//[nb_ooo_engine]
        _nb_read_unit                         ,//[nb_execute_loop]
        _nb_write_unit                        ,//[nb_execute_loop]
@@ -2059,8 +2111,9 @@
        _dispatch_priority                    ,
        _dispatch_load_balancing              ,
-       _network_table_dispatch               ,//[nb_ooo_engine][nb_inst_issue][nb_execute_loop][nb_read_unit]
+       _network_table_dispatch               ,//[nb_ooo_engine][nb_inst_issue_slot][nb_execute_loop][nb_read_unit]
+       _network_table_issue_type             ,//                                   [nb_execute_loop][nb_read_unit][nb_type]
        _translate_ooo_engine_num_front_end   ,//[nb_ooo_engine][ooo_engine_nb_front_end]
        _translate_ooo_engine_num_execute_loop,//[nb_ooo_engine][ooo_engine_nb_execute_loop]
-       _translate_execute_loop_num_ooo_engine //*[nb_execute_loop][execute_loop_nb_ooo_engine]
+       _translate_execute_loop_num_ooo_engine //[nb_execute_loop][execute_loop_nb_ooo_engine]
        );
     
@@ -2146,8 +2199,9 @@
     DELETE2(_list_load_store_unit_with_rename_unit                  ,_nb_ooo_engine,_nb_rename_unit[it1]);
     DELETE2(_list_functionnal_unit_with_rename_unit                 ,_nb_ooo_engine,_nb_rename_unit[it1]);
-    DELETE3(_ooo_engine_table_issue_type                            ,_nb_ooo_engine,_nb_inst_issue[it1],_nb_type);
-    DELETE3(_ooo_engine_table_routing                               ,_nb_ooo_engine,_nb_rename_unit[it1],_nb_inst_issue[it1]);
-    DELETE4(_network_table_dispatch                                 ,_nb_ooo_engine,_nb_inst_issue[it1],_nb_execute_loop,_nb_read_unit[it3]);
-//     DELETE2(_ooo_engine_size_read_counter                           ,_nb_ooo_engine,_nb_rename_unit[it1]);
+//  DELETE3(_ooo_engine_table_issue_type                            ,_nb_ooo_engine,_nb_inst_issue_slot[it1],_nb_type);
+//  DELETE3(_ooo_engine_table_routing                               ,_nb_ooo_engine,_nb_rename_unit[it1],_nb_inst_issue_slot[it1]);
+    DELETE3(_network_table_issue_type                                                                       ,_nb_execute_loop,_nb_read_unit[it1],_nb_type);
+    DELETE4(_network_table_dispatch                                 ,_nb_ooo_engine,_nb_inst_issue_slot[it1],_nb_execute_loop,_nb_read_unit[it3]);
+//  DELETE2(_ooo_engine_size_read_counter                           ,_nb_ooo_engine,_nb_rename_unit[it1]);
     DELETE2(_ooo_engine_nb_rename_unit_bank                         ,_nb_ooo_engine,_nb_rename_unit[it1]);
     DELETE2(_ooo_engine_nb_reg_free                                 ,_nb_ooo_engine,_nb_rename_unit[it1]);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_msg_error.cpp	(revision 117)
@@ -206,10 +206,10 @@
     {
       // initialisation
-      uint32_t nb_link_slot      [_nb_ooo_engine][max<uint32_t>(_nb_inst_issue,_nb_ooo_engine)];
+      uint32_t nb_link_slot      [_nb_ooo_engine][max<uint32_t>(_nb_inst_issue_slot,_nb_ooo_engine)];
       uint32_t nb_link_read_bloc [_nb_read_bloc];
   
       // initialisation
       for (uint32_t i=0; i<_nb_ooo_engine; ++i)
-        for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
           nb_link_slot [i][j] = 0;
       for (uint32_t i=0; i<_nb_read_bloc; ++i)
@@ -218,5 +218,5 @@
       // set link
       for (uint32_t i=0; i<_nb_ooo_engine; ++i)
-        for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
           for (uint32_t k=0; k<_nb_read_bloc; ++k)
             if (_table_dispatch [i][j][k])
@@ -228,5 +228,5 @@
       // test
       for (uint32_t i=0; i<_nb_ooo_engine; ++i)
-        for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+        for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
           if (nb_link_slot [i][j] == 0)
             test.error(toString(_("In Out Of Order Engine [%d], the slot issue [%d] is not link with a read_bloc.\n"),i,j));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp	(revision 116)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp	(revision 117)
@@ -173,5 +173,6 @@
     str+= toString(MSG_INFORMATION)+"   * OOO_ENGINE ["+toString<uint32_t>(i)+"]\n";
     str+= toString(MSG_INFORMATION)+"     * nb_rename_unit                              : "+toString<uint32_t         >(_nb_rename_unit          [i])+"\n";
-    str+= toString(MSG_INFORMATION)+"     * nb_inst_issue                               : "+toString<uint32_t         >(_nb_inst_issue           [i])+"\n";
+    str+= toString(MSG_INFORMATION)+"     * nb_inst_issue_queue                         : "+toString<uint32_t         >(_nb_inst_issue_queue     [i])+"\n";
+    str+= toString(MSG_INFORMATION)+"     * nb_inst_issue_slot                          : "+toString<uint32_t         >(_nb_inst_issue_slot      [i])+"\n";
     str+= toString(MSG_INFORMATION)+"     * nb_inst_reexecute                           : "+toString<uint32_t         >(_nb_inst_reexecute       [i])+"\n";
     str+= toString(MSG_INFORMATION)+"     * nb_inst_commit                              : "+toString<uint32_t         >(_nb_inst_commit          [i])+"\n";
@@ -261,5 +262,5 @@
 
     for (uint32_t i=0; i<_nb_ooo_engine; ++i)
-      for (uint32_t j=0; j<_nb_inst_issue[i]; ++j)
+      for (uint32_t j=0; j<_nb_inst_issue_slot[i]; ++j)
         for (uint32_t k=0; k<_nb_read_bloc; ++k)
     str+= toString(MSG_INFORMATION)+"   * table_dispatch                                  ["+toString(i)+"]["+toString(j)+"]["+toString(k)+"] : "+toString(_table_dispatch                      [i][j][k])+"\n";//[nb_ooo_engine][nb_inst_issue][nb_read_bloc]
