Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Simulator_fromFile.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Simulator_fromFile.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Simulator_fromFile.cpp (revision 118) @@ -82,9 +82,9 @@ testSingleton (xml,true); - attributes_t attributes = xml->getAttributes(); + attributes_t attributes = xml->getAttributes(); - std::string value_name = getAttribute(xml,attributes,"name" ); - model_type_t value_model = fromString(getAttribute(xml,attributes,"model")); - debug_verbosity_t value_debug = fromString(getAttribute(xml,attributes,"debug")); + std::string value_name = getAttribute(xml,attributes,"name" ); + model_type_t value_model = fromString(getAttribute(xml,attributes,"model")); + bool value_debug = fromString(getAttribute(xml,attributes,"debug")); testAttributesEmpty(xml,attributes); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 118) @@ -209,4 +209,5 @@ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + private : uint32_t reg_PRIORITY ; // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 118) @@ -142,6 +142,7 @@ for (uint32_t num_execute_loop=0; num_execute_loop<_param->_nb_execute_loop; ++num_execute_loop) { - for (uint32_t num_read_unit=0; num_read_unit<_param->_nb_read_unit[num_execute_loop]; ++num_read_unit) + for (uint32_t _num_read_unit=0; _num_read_unit<_param->_nb_read_unit[num_execute_loop]; ++_num_read_unit) { + uint32_t num_read_unit = (_num_read_unit+reg_PRIORITY)%_param->_nb_read_unit[num_execute_loop]; Tcontrol_t ack = READ_UNIT_ENABLE [num_execute_loop][num_read_unit]; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp (revision 118) @@ -29,5 +29,6 @@ } _priority_ooo_engine->reset(); - + + reg_PRIORITY = 0; } else @@ -40,4 +41,6 @@ } _priority_ooo_engine->transition(); + + reg_PRIORITY ++; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 118) @@ -40,5 +40,4 @@ namespace execute_unit { namespace functionnal_unit { - class Functionnal_unit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h (revision 118) @@ -40,4 +40,5 @@ //public : uint32_t _size_load_queue ; public : const Tfunctionnal_unit_scheme_t _functionnal_unit_scheme; + public : const bool _have_pipeline_in ; public : execute_timing_t ** _timing ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 118) @@ -104,4 +104,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + if (_param->_have_pipeline_in) _execute_operation_in = new execute_operation_t; _execute_operation_out = new execute_operation_t; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 118) @@ -77,4 +77,5 @@ DELETE3(_execute_register,_param->_nb_context,_param->_nb_front_end,_param->_nb_ooo_engine); DELETE0(_execute_param); + if (_param->_have_pipeline_in) DELETE0(_execute_operation_in); DELETE0(_execute_operation_out); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp (revision 118) @@ -29,15 +29,27 @@ { { + // Can out if : have an instruction and is finish (latence == 0) internal_EXECUTE_OUT_VAL = (reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0)); - PORT_WRITE(out_EXECUTE_OUT_VAL , internal_EXECUTE_OUT_VAL); + PORT_WRITE(out_EXECUTE_OUT_VAL, internal_EXECUTE_OUT_VAL); } { + // Can accept an instruction if : + // * pipeline in is not busy (not previous instruction) + // * pipeline in is busy ( previous instruction) and the instruction go to pipeline out + if (_param->_have_pipeline_in) + { internal_EXECUTE_IN_ACK = (not reg_BUSY_IN or (reg_BUSY_IN and (not reg_BUSY_OUT or (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))))); - - PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); + } + else + { + internal_EXECUTE_IN_ACK = (not reg_BUSY_OUT or + (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))); + } + + PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp (revision 118) @@ -28,4 +28,5 @@ if (PORT_READ(in_NRESET) == 0) { + if (_param->_have_pipeline_in) reg_BUSY_IN = false; reg_BUSY_OUT = false; @@ -50,13 +51,13 @@ else { - // Test if pop + // Test if pop an instruction if (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK)) { log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_OUT : Transaction Accepted"); - // transaction reg_BUSY_OUT = false; } - + // Test if can move instruction in pipeline in to pipeline out + if (_param->_have_pipeline_in) if (reg_BUSY_IN and not reg_BUSY_OUT) { @@ -87,6 +88,4 @@ } - - // Test if push execute_register_t * execute_register = NULL; @@ -96,5 +95,16 @@ log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_IN : Transaction Accepted"); - reg_BUSY_IN = true; + execute_operation_t * execute_operation; + + if (_param->_have_pipeline_in) + { + reg_BUSY_IN = true; + execute_operation = _execute_operation_in; + } + else + { + reg_BUSY_OUT = true; + execute_operation = _execute_operation_out; + } Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_EXECUTE_IN_CONTEXT_ID ):0; @@ -104,38 +114,38 @@ Toperation_t operation = PORT_READ(in_EXECUTE_IN_OPERATION); Ttype_t type = PORT_READ(in_EXECUTE_IN_TYPE); - - _execute_operation_in->_context_id = context_id ; - _execute_operation_in->_front_end_id = front_end_id ; - _execute_operation_in->_ooo_engine_id = ooo_engine_id; - _execute_operation_in->_packet_id = packet_id ; - _execute_operation_in->_operation = operation ; - _execute_operation_in->_type = type ; - _execute_operation_in->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); - _execute_operation_in->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); - _execute_operation_in->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA ); - _execute_operation_in->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB ); - _execute_operation_in->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC ); - _execute_operation_in->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD ); - _execute_operation_in->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD ); - _execute_operation_in->_data_rd = 0; // no necessaray - _execute_operation_in->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE ); - _execute_operation_in->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE ); - _execute_operation_in->_data_re = 0; // no necessaray - - log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d",_execute_operation_in->_context_id ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d",_execute_operation_in->_front_end_id ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d",_execute_operation_in->_ooo_engine_id); - log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d",_execute_operation_in->_packet_id ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",_execute_operation_in->_operation ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(_execute_operation_in->_type).c_str()); - log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",_execute_operation_in->_has_immediat ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",_execute_operation_in->_immediat ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",_execute_operation_in->_data_ra ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",_execute_operation_in->_data_rb ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x",_execute_operation_in->_data_rc ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" ,_execute_operation_in->_write_rd ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" ,_execute_operation_in->_num_reg_rd ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" ,_execute_operation_in->_write_re ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" ,_execute_operation_in->_num_reg_re ); + + execute_operation->_context_id = context_id ; + execute_operation->_front_end_id = front_end_id ; + execute_operation->_ooo_engine_id = ooo_engine_id; + execute_operation->_packet_id = packet_id ; + execute_operation->_operation = operation ; + execute_operation->_type = type ; + execute_operation->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); + execute_operation->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); + execute_operation->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA ); + execute_operation->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB ); + execute_operation->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC ); + execute_operation->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD ); + execute_operation->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD ); + execute_operation->_data_rd = 0; // no necessaray + execute_operation->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE ); + execute_operation->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE ); + execute_operation->_data_re = 0; // no necessaray + + log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d",execute_operation->_context_id ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d",execute_operation->_front_end_id ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d",execute_operation->_ooo_engine_id); + log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d",execute_operation->_packet_id ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",execute_operation->_operation ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(execute_operation->_type).c_str()); + log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",execute_operation->_has_immediat ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",execute_operation->_immediat ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",execute_operation->_data_ra ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",execute_operation->_data_rb ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x",execute_operation->_data_rc ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" ,execute_operation->_write_rd ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" ,execute_operation->_num_reg_rd ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" ,execute_operation->_write_re ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" ,execute_operation->_num_reg_re ); #ifdef DEBUG_TEST @@ -156,18 +166,18 @@ // ooo_engine_id,_param->_size_ooo_engine_id); - (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) (_execute_operation_in, execute_register, _execute_param); + (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) (execute_operation, execute_register, _execute_param); } else - (*(_function_execute[type][operation])) (_execute_operation_in, execute_register, _execute_param); + (*(_function_execute[type][operation])) (execute_operation, execute_register, _execute_param); log_printf(TRACE,Functionnal_unit,FUNCTION," -----------------"); - log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x",_execute_operation_in->_timing._latence); - log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x",_execute_operation_in->_timing._delay); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x",_execute_operation_in->_data_rd ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x",_execute_operation_in->_data_re ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" ,_execute_operation_in->_exception ); - log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" ,_execute_operation_in->_no_sequence); - log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)",_execute_operation_in->_address,_execute_operation_in->_address<<2); + log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x",execute_operation->_timing._latence); + log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x",execute_operation->_timing._delay); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x",execute_operation->_data_rd ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x",execute_operation->_data_re ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" ,execute_operation->_exception ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" ,execute_operation->_no_sequence); + log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)",execute_operation->_address,execute_operation->_address<<2); #ifdef STATISTICS @@ -175,6 +185,6 @@ { (*_stat_use_functionnal_unit) ++; - (*_stat_sum_delay) += _execute_operation_in->_timing._delay; - (*_stat_sum_latence) += _execute_operation_in->_timing._latence; + (*_stat_sum_delay) += execute_operation->_timing._delay; + (*_stat_sum_latence) += execute_operation->_timing._latence; } #endif @@ -213,4 +223,14 @@ if (reg_BUSY_OUT and (_execute_operation_out->_timing._latence > 0)) _execute_operation_out->_timing._latence --; + +#if defined(DEBUG) and DEBUG_Functionnal_unit and (DEBUG >= DEBUG_TRACE) + { + log_printf(TRACE,Functionnal_unit,FUNCTION," * Dump ALU (Functionnal_unit)"); + + if (_param->_have_pipeline_in) + log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_IN : %d",reg_BUSY_IN ); + log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_OUT : %d",reg_BUSY_OUT); + } +#endif } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp (revision 118) @@ -33,5 +33,6 @@ morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), bool is_toplevel): - _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE) + _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE), + _have_pipeline_in (false) { log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 118) @@ -350,5 +350,5 @@ // find a entry that it need a check Tlsq_ptr_t index_store = _load_queue[index_load]._store_queue_ptr_write; - Tlsq_ptr_t index_store_old = index_store; +// Tlsq_ptr_t index_store_old = index_store; // Init variable @@ -1091,4 +1091,19 @@ _load_queue [packet_id]._exception = EXCEPTION_MEMORY_BUS_ERROR; _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT; + + + uint32_t i=_load_queue[packet_id]._store_queue_ptr_write; + while (i!=reg_STORE_QUEUE_PTR_READ) + { + i=((i==0)?_param->_size_store_queue:i)-1; + +#ifdef DEBUG + if (reg_STORE_QUEUE_NB_CHECK [i] == 0) + throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n")); +#endif + + reg_STORE_QUEUE_NB_CHECK [i] --; + //i=(i+1)%_param->_size_store_queue; + } } else Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 118) @@ -60,30 +60,34 @@ log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_control->nb_elt()); \ for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ - log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ - (*_queue_control)[it_dump], \ - _queue[(*_queue_control)[it_dump]]._context_id , \ - _queue[(*_queue_control)[it_dump]]._front_end_id , \ - _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ - _queue[(*_queue_control)[it_dump]]._rob_id , \ - _queue[(*_queue_control)[it_dump]]._type , \ - _queue[(*_queue_control)[it_dump]]._operation , \ - _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ - _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ - _queue[(*_queue_control)[it_dump]]._has_immediat , \ - _queue[(*_queue_control)[it_dump]]._immediat , \ - _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ - _queue[(*_queue_control)[it_dump]]._data_ra_val , \ - _queue[(*_queue_control)[it_dump]]._data_ra , \ - _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ - _queue[(*_queue_control)[it_dump]]._data_rb_val , \ - _queue[(*_queue_control)[it_dump]]._data_rb , \ - _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ - _queue[(*_queue_control)[it_dump]]._data_rc_val , \ - _queue[(*_queue_control)[it_dump]]._data_rc , \ - _queue[(*_queue_control)[it_dump]]._write_rd , \ - _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ - _queue[(*_queue_control)[it_dump]]._write_re , \ - _queue[(*_queue_control)[it_dump]]._num_reg_re , \ - toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ + if (it_dump < _queue_control->nb_elt()) \ + log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ + (*_queue_control)[it_dump], \ + _queue[(*_queue_control)[it_dump]]._context_id , \ + _queue[(*_queue_control)[it_dump]]._front_end_id , \ + _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ + _queue[(*_queue_control)[it_dump]]._rob_id , \ + _queue[(*_queue_control)[it_dump]]._type , \ + _queue[(*_queue_control)[it_dump]]._operation , \ + _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ + _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ + _queue[(*_queue_control)[it_dump]]._has_immediat , \ + _queue[(*_queue_control)[it_dump]]._immediat , \ + _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ + _queue[(*_queue_control)[it_dump]]._data_ra_val , \ + _queue[(*_queue_control)[it_dump]]._data_ra , \ + _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ + _queue[(*_queue_control)[it_dump]]._data_rb_val , \ + _queue[(*_queue_control)[it_dump]]._data_rb , \ + _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ + _queue[(*_queue_control)[it_dump]]._data_rc_val , \ + _queue[(*_queue_control)[it_dump]]._data_rc , \ + _queue[(*_queue_control)[it_dump]]._write_rd , \ + _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ + _queue[(*_queue_control)[it_dump]]._write_re , \ + _queue[(*_queue_control)[it_dump]]._num_reg_re , \ + toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ + else \ + log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d]", \ + (*_queue_control)[it_dump]); \ } while (0) #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (revision 118) @@ -24,34 +24,35 @@ + class Parameters : public morpheo::behavioural::Parameters { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _size_queue ; - public : uint32_t _nb_context ; - public : uint32_t _nb_front_end ; - public : uint32_t _nb_ooo_engine ; - public : uint32_t _nb_packet ; -//public : uint32_t _size_general_data ; - public : uint32_t _nb_general_register ; -//public : uint32_t _size_special_data ; - public : uint32_t _nb_special_register ; - public : uint32_t _nb_bypass_write ; - public : Twrite_queue_scheme_t _queue_scheme ; - - public : uint32_t _nb_gpr_write ; - public : uint32_t _nb_spr_write ; - -//public : uint32_t _size_context_id ; -//public : uint32_t _size_front_end_id ; -//public : uint32_t _size_ooo_engine_id ; -//public : uint32_t _size_packet_id ; -//public : uint32_t _size_general_register ; -//public : uint32_t _size_special_register ; - public : uint32_t _size_internal_queue ; - -//public : bool _have_port_context_id ; -//public : bool _have_port_front_end_id ; -//public : bool _have_port_ooo_engine_id ; -//public : bool _have_port_packet_id ; + public : uint32_t _size_queue ; + public : uint32_t _nb_context ; + public : uint32_t _nb_front_end ; + public : uint32_t _nb_ooo_engine ; + public : uint32_t _nb_packet ; +//public : uint32_t _size_general_data ; + public : uint32_t _nb_general_register ; +//public : uint32_t _size_special_data ; + public : uint32_t _nb_special_register ; + public : uint32_t _nb_bypass_write ; + public : Twrite_queue_scheme_t _queue_scheme ; + public : Tbypass_write_scheme_t _bypass_write_scheme ; + public : uint32_t _nb_gpr_write ; + public : uint32_t _nb_spr_write ; + +//public : uint32_t _size_context_id ; +//public : uint32_t _size_front_end_id ; +//public : uint32_t _size_ooo_engine_id ; +//public : uint32_t _size_packet_id ; +//public : uint32_t _size_general_register ; +//public : uint32_t _size_special_register ; + public : uint32_t _size_internal_queue ; + +//public : bool _have_port_context_id ; +//public : bool _have_port_front_end_id ; +//public : bool _have_port_ooo_engine_id; +//public : bool _have_port_packet_id ; //-----[ methods ]----------------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h (revision 118) @@ -25,4 +25,10 @@ ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle } Twrite_queue_scheme_t; + + typedef enum + { + BYPASS_WRITE_FROM_ALU, + BYPASS_WRITE_FROM_QUEUE + } Tbypass_write_scheme_t; class write_queue_entry_t @@ -108,4 +114,26 @@ }; + template<> inline std::string toString(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU : return "alu" ; break; + case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE : return "queue"; break; + default : return ""; break; + } + }; + + template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t fromString(const std::string& x) + { + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU))) == 0) or + (x.compare("alu") == 0)) + return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU; + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE))) == 0) or + (x.compare("queue") == 0)) + return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE; + + throw (ErrorMorpheo (" : Unknow string : \""+x+"\"")); + }; + }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h (revision 118) @@ -172,5 +172,6 @@ public : void transition (void); public : void genMoore (void); - public : void genMealy (void); + public : void genMealy_write (void); + public : void genMealy_bypass (void); #endif #ifdef STATISTICS Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp (revision 118) @@ -45,4 +45,6 @@ _nb_bypass_write = nb_bypass_write ; _queue_scheme = queue_scheme ; + _bypass_write_scheme = BYPASS_WRITE_FROM_ALU; +// _bypass_write_scheme = BYPASS_WRITE_FROM_QUEUE; _nb_gpr_write = 1; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp (revision 118) @@ -28,6 +28,8 @@ Parameters_test test (_type); - if (_nb_bypass_write > _size_queue) + if ((_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and (_nb_bypass_write > _size_queue)) test.error("The write_queue can't have more bypass_write than entry in the queue.\n"); + if ((_bypass_write_scheme == BYPASS_WRITE_FROM_QUEUE) and (_nb_bypass_write > _size_queue-1)) + test.error("The write_queue can't have more bypass_write than entry in the queue -1 (the write_queue[0] is unnecessary).\n"); log_printf(FUNC,Write_queue,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp (revision 118) @@ -92,7 +92,7 @@ if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) { - log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy"); + log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_write"); - SC_METHOD (genMealy); + SC_METHOD (genMealy_write); dont_initialize (); sensitive << (*(in_CLOCK)).neg(); // need internal register @@ -106,4 +106,28 @@ # endif } + + if ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and + (_param->_nb_bypass_write > 0)) + { + log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_bypass"); + + SC_METHOD (genMealy_bypass); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg(); // don't need internal register + sensitive << (*(in_WRITE_QUEUE_IN_VAL )) + << (*(in_WRITE_QUEUE_IN_WRITE_RD )) + << (*(in_WRITE_QUEUE_IN_NUM_REG_RD )) + << (*(in_WRITE_QUEUE_IN_DATA_RD )) + << (*(in_WRITE_QUEUE_IN_WRITE_RE )) + << (*(in_WRITE_QUEUE_IN_NUM_REG_RE )) + << (*(in_WRITE_QUEUE_IN_DATA_RE )); + if (_param->_have_port_ooo_engine_id) + sensitive << (*(in_WRITE_QUEUE_IN_OOO_ENGINE_ID)); + + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif + } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp (revision 117) +++ (revision ) @@ -1,106 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_execute_loop { -namespace execute_loop { -namespace multi_write_unit { -namespace write_unit { -namespace write_queue { - - -#undef FUNCTION -#define FUNCTION "Write_queue::genMealy" - void Write_queue::genMealy (void) - { - log_begin(Write_queue,FUNCTION); - log_function(Write_queue,FUNCTION,_name.c_str()); - - // -----[ Interface "bypass_write" ]---------------------------------- - // in genMoore - // -----[ Interface "Write_queue_in" ]-------------------------------- - // in genMoore - - bool val = not _queue->empty(); - Tcontrol_t write_rd = val and _queue->front()->_write_rd; - Tcontrol_t write_re = val and _queue->front()->_write_re; - - // -----[ Interface "gpr_write" ]------------------------------------- - // -----[ Interface "spr_write" ]------------------------------------- - { - internal_GPR_WRITE_VAL = val and write_rd; - internal_SPR_WRITE_VAL = val and write_re; - - PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL); - PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL); - - write_rd = (write_rd)?(not PORT_READ(in_GPR_WRITE_ACK [0])):0; - write_re = (write_re)?(not PORT_READ(in_SPR_WRITE_ACK [0])):0; - - if (val) - { - if (_param->_have_port_ooo_engine_id) - { - PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); - PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); - } - PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd); - PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd ); - PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re); - PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re ); - } - } - - // -----[ Interface "Write_queue_out" ]-------------------------------- - { - Texception_t load_speculative = (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE); - - internal_WRITE_QUEUE_OUT_VAL = ((val ) and - (not load_speculative) and - (not write_rd ) and - (not write_re )); - - PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL); - - if (internal_WRITE_QUEUE_OUT_VAL) - { - if (_param->_have_port_context_id) - PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id ); - if (_param->_have_port_front_end_id) - PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id ); - if (_param->_have_port_ooo_engine_id) - PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id); - if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id ); -// PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); -// PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); - PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); - PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); - PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence ); - PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address ); - PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd ); - } - } - - log_end(Write_queue,FUNCTION); - }; - -}; // end namespace write_queue -}; // end namespace write_unit -}; // end namespace multi_write_unit -}; // end namespace execute_loop -}; // end namespace multi_execute_loop -}; // end namespace core - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_bypass.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_bypass.cpp (revision 118) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_bypass.cpp (revision 118) @@ -0,0 +1,53 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace multi_write_unit { +namespace write_unit { +namespace write_queue { + + +#undef FUNCTION +#define FUNCTION "Write_queue::genMealy_bypass" + void Write_queue::genMealy_bypass (void) + { + log_begin(Write_queue,FUNCTION); + log_function(Write_queue,FUNCTION,_name.c_str()); + + Tcontrol_t val = PORT_READ(in_WRITE_QUEUE_IN_VAL); + + if (_param->_have_port_ooo_engine_id) + PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [0], PORT_READ(in_WRITE_QUEUE_IN_OOO_ENGINE_ID)); + PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [0], val and PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD )); + PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [0], PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD )); // RD + PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [0], PORT_READ(in_WRITE_QUEUE_IN_DATA_RD )); + PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [0], val and PORT_READ(in_WRITE_QUEUE_IN_WRITE_RE )); + PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [0], PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RE )); // RE + PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [0], PORT_READ(in_WRITE_QUEUE_IN_DATA_RE )); + + // -----[ Interface "bypass_write" ]---------------------------------- + + log_end(Write_queue,FUNCTION); + }; + +}; // end namespace write_queue +}; // end namespace write_unit +}; // end namespace multi_write_unit +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp (revision 118) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp (revision 118) @@ -0,0 +1,106 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace multi_write_unit { +namespace write_unit { +namespace write_queue { + + +#undef FUNCTION +#define FUNCTION "Write_queue::genMealy_write" + void Write_queue::genMealy_write (void) + { + log_begin(Write_queue,FUNCTION); + log_function(Write_queue,FUNCTION,_name.c_str()); + + // -----[ Interface "bypass_write" ]---------------------------------- + // in genMoore + // -----[ Interface "Write_queue_in" ]-------------------------------- + // in genMoore + + bool val = not _queue->empty(); + Tcontrol_t write_rd = val and _queue->front()->_write_rd; + Tcontrol_t write_re = val and _queue->front()->_write_re; + + // -----[ Interface "gpr_write" ]------------------------------------- + // -----[ Interface "spr_write" ]------------------------------------- + { + internal_GPR_WRITE_VAL = val and write_rd; + internal_SPR_WRITE_VAL = val and write_re; + + PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL); + PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL); + + write_rd = (write_rd)?(not PORT_READ(in_GPR_WRITE_ACK [0])):0; + write_re = (write_re)?(not PORT_READ(in_SPR_WRITE_ACK [0])):0; + + if (val) + { + if (_param->_have_port_ooo_engine_id) + { + PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); + PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); + } + PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd); + PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd ); + PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re); + PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re ); + } + } + + // -----[ Interface "Write_queue_out" ]-------------------------------- + { + Texception_t load_speculative = (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE); + + internal_WRITE_QUEUE_OUT_VAL = ((val ) and + (not load_speculative) and + (not write_rd ) and + (not write_re )); + + PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL); + + if (internal_WRITE_QUEUE_OUT_VAL) + { + if (_param->_have_port_context_id) + PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id ); + if (_param->_have_port_front_end_id) + PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id ); + if (_param->_have_port_ooo_engine_id) + PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id); + if (_param->_have_port_rob_ptr ) + PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id ); +// PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); +// PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); + PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); + PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); + PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence ); + PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address ); + PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd ); + } + } + + log_end(Write_queue,FUNCTION); + }; + +}; // end namespace write_queue +}; // end namespace write_unit +}; // end namespace multi_write_unit +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 118) @@ -29,16 +29,25 @@ { std::list::iterator it = _queue->begin(); - for (uint32_t i=0; i<_param->_nb_bypass_write; i++) + + // first bypass is the write_queue_in + uint32_t first_index = ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU)?1:0); + for (uint32_t i=first_index; i<_param->_nb_bypass_write; i++) { - bool val = i < _queue->size(); - + // before because first slot is on {GPR|SPR}_WRITE. Also, take next + if (it != _queue->end()) + it++; + + uint32_t index = i; +// bool val = (i+1) < _queue->size(); + bool val = (it != _queue->end()); + if (val) { if (_param->_have_port_ooo_engine_id) - PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i], (*it)->_ooo_engine_id); - PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i], (*it)->_num_reg_rd); - PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i], (*it)->_data_rd ); - PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i], (*it)->_num_reg_re); - PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i], (*it)->_data_re ); + PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], (*it)->_ooo_engine_id); + PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], (*it)->_num_reg_rd); + PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], (*it)->_data_rd ); + PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], (*it)->_num_reg_re); + PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], (*it)->_data_re ); } #ifdef SYSTEMC_VHDL_COMPATIBILITY @@ -46,17 +55,14 @@ { if (_param->_have_port_ooo_engine_id) - PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i], 0); - PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i], 0); - PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i], 0); - PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i], 0); - PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i], 0); + PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], 0); + PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], 0); + PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], 0); + PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], 0); + PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], 0); } #endif - PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [i], val and (*it)->_write_rd ); - PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [i], val and (*it)->_write_re ); - - if (it != _queue->end()) - it++; + PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [index], val and (*it)->_write_rd ); + PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [index], val and (*it)->_write_re ); } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 118) @@ -138,5 +138,5 @@ ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context); - ALLOC1_SIGNAL_OUT(out_NB_INST_ALL ,"all" ,Tcontext_t ,_param->_size_nb_inst_decod); + ALLOC1_SIGNAL_OUT(out_NB_INST_ALL ,"all" ,Tcounter_t ,_param->_size_nb_inst_decod); ALLOC1_INTERFACE_END(_param->_nb_context); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 118) @@ -137,5 +137,5 @@ public : SC_IN (Tcontrol_t ) * in_CONTEXT_EVENT_ACK ; public : SC_OUT(Tcontext_t ) * out_CONTEXT_EVENT_CONTEXT_ID ; - public : SC_OUT(Tcontext_t ) * out_CONTEXT_EVENT_DEPTH ; + public : SC_OUT(Tdepth_t ) * out_CONTEXT_EVENT_DEPTH ; public : SC_OUT(Tevent_type_t ) * out_CONTEXT_EVENT_TYPE ; public : SC_OUT(Tcontrol_t ) * out_CONTEXT_EVENT_IS_DELAY_SLOT ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 118) @@ -149,5 +149,5 @@ ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context); - ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tcontext_t ,_param->_size_nb_inst_decod); + ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tcounter_t ,_param->_size_nb_inst_decod); ALLOC1_INTERFACE_END(_param->_nb_context); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp (revision 118) @@ -25,4 +25,6 @@ log_function(Return_Address_Stack,FUNCTION,_name.c_str()); + if (PORT_READ(in_NRESET) == 1) + { #ifdef DEBUG_TEST // just to test if have many transaction on a same context @@ -63,5 +65,5 @@ PORT_WRITE(out_DECOD_INDEX [i], top); } - + } log_end(Return_Address_Stack,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp (revision 118) @@ -25,4 +25,6 @@ log_function(Return_Address_Stack,FUNCTION,_name.c_str()); + if (PORT_READ(in_NRESET) == 1) + { #ifdef DEBUG_TEST // just to test if have many transaction on a same context @@ -63,5 +65,7 @@ PORT_WRITE(out_PREDICT_ADDRESS_POP [i], reg_stack[context][top]._address); + PORT_WRITE(out_PREDICT_INDEX [i], top); + } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 118) @@ -342,5 +342,5 @@ if (_param->_have_thread [i]) { - std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+"-"+toString(getpid())+".log"; + std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+".log"; instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp (revision 118) @@ -28,12 +28,18 @@ // =================================================================== { + log_printf(TRACE,Commit_unit,FUNCTION," * REEXECUTE [0]"); + // Store instruction comming Out Of Order in Load Store Unit. // Must be executed in no speculative mode. Also, send a signal when an Store is in head of ROB - Tcontrol_t val = false; - - if (not _rob[reg_NUM_BANK_HEAD].empty()) - { - entry_t * entry = _rob [reg_NUM_BANK_HEAD].front(); + Tcontrol_t val = false; + uint32_t num_bank = reg_NUM_BANK_HEAD; + + if (not _rob[num_bank].empty()) + { + log_printf(TRACE,Commit_unit,FUNCTION," * ROB is not empty"); + log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",num_bank); + + entry_t * entry = _rob [num_bank].front(); rob_state_t state = entry->state; @@ -41,7 +47,12 @@ val = ((state == ROB_STORE_HEAD_OK) or (state == ROB_STORE_HEAD_KO)); - + + log_printf(TRACE,Commit_unit,FUNCTION," * val : %d",val); if (val) { + Tpacket_t packet_id = ((entry->ptr << _param->_shift_num_slot) | num_bank); + + log_printf(TRACE,Commit_unit,FUNCTION," * packet_id : %d",packet_id); + // Reexecute store if (_param->_have_port_context_id) @@ -50,5 +61,5 @@ PORT_WRITE(out_REEXECUTE_FRONT_END_ID [0], entry->front_end_id ); if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_REEXECUTE_PACKET_ID [0], entry->ptr ); + PORT_WRITE(out_REEXECUTE_PACKET_ID [0], packet_id ); PORT_WRITE(out_REEXECUTE_TYPE [0], entry->type ); PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [0], entry->store_queue_ptr_write); @@ -58,5 +69,5 @@ internal_REEXECUTE_VAL [0] = val; - internal_REEXECUTE_NUM_BANK [0] = reg_NUM_BANK_HEAD; + internal_REEXECUTE_NUM_BANK [0] = num_bank; PORT_WRITE(out_REEXECUTE_VAL[0], internal_REEXECUTE_VAL [0]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp (revision 118) @@ -34,4 +34,6 @@ Tcontrol_t ack; + log_printf(TRACE,Reexecute_unit,FUNCTION," * REEXECUTE[%d]",i); + if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_REEXECUTE)) { @@ -40,4 +42,8 @@ entry_t * entry = _reexecute_queue [i].front(); + Tpacket_t packet_id = (_param->_have_port_rob_ptr)?entry->packet_id:0; + + log_printf(TRACE,Reexecute_unit,FUNCTION," * From Reexecute_queue"); + log_printf(TRACE,Reexecute_unit,FUNCTION," * packet_id : %d",packet_id); if (_param->_have_port_context_id) @@ -46,5 +52,5 @@ PORT_WRITE(out_REEXECUTE_FRONT_END_ID [i],entry->front_end_id ); if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_REEXECUTE_PACKET_ID [i],entry->packet_id ); + PORT_WRITE(out_REEXECUTE_PACKET_ID [i], packet_id ); PORT_WRITE(out_REEXECUTE_OPERATION [i],entry->operation ); PORT_WRITE(out_REEXECUTE_TYPE [i],entry->type ); @@ -60,4 +66,11 @@ ack = PORT_READ(in_REEXECUTE_ACK [i]); + Tpacket_t packet_id = (_param->_have_port_rob_ptr)?PORT_READ(in_REEXECUTE_ROB_PACKET_ID [i]):0; + + log_printf(TRACE,Reexecute_unit,FUNCTION," * From ROB"); + log_printf(TRACE,Reexecute_unit,FUNCTION," * val & ack : %d",val and ack); + log_printf(TRACE,Reexecute_unit,FUNCTION," * have ?? : %d",_param->_have_port_rob_ptr); + log_printf(TRACE,Reexecute_unit,FUNCTION," * packet_id : %d",packet_id); + if (_param->_have_port_context_id) PORT_WRITE(out_REEXECUTE_CONTEXT_ID [i], PORT_READ(in_REEXECUTE_ROB_CONTEXT_ID [i])); @@ -65,5 +78,5 @@ PORT_WRITE(out_REEXECUTE_FRONT_END_ID [i], PORT_READ(in_REEXECUTE_ROB_FRONT_END_ID [i])); if (_param->_have_port_rob_ptr ) - PORT_WRITE(out_REEXECUTE_PACKET_ID [i], PORT_READ(in_REEXECUTE_ROB_PACKET_ID [i])); + PORT_WRITE(out_REEXECUTE_PACKET_ID [i], packet_id ); PORT_WRITE(out_REEXECUTE_OPERATION [i], PORT_READ(in_REEXECUTE_ROB_OPERATION [i])); PORT_WRITE(out_REEXECUTE_TYPE [i], PORT_READ(in_REEXECUTE_ROB_TYPE [i])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 118) @@ -121,6 +121,8 @@ private : Tcontrol_t * internal_PUSH_GPR_VAL ;//[nb_reg_free] private : uint32_t * internal_PUSH_GPR_NUM_BANK;//[nb_reg_free] + private : uint32_t * internal_PUSH_GPR_NUM_REG ;//[nb_reg_free] private : Tcontrol_t * internal_PUSH_SPR_VAL ;//[nb_reg_free] private : uint32_t * internal_PUSH_SPR_NUM_BANK;//[nb_reg_free] + private : uint32_t * internal_PUSH_SPR_NUM_REG ;//[nb_reg_free] #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp (revision 118) @@ -134,6 +134,8 @@ ALLOC1(internal_PUSH_GPR_VAL ,Tcontrol_t,_param->_nb_reg_free); ALLOC1(internal_PUSH_GPR_NUM_BANK,uint32_t ,_param->_nb_reg_free); + ALLOC1(internal_PUSH_GPR_NUM_REG ,uint32_t ,_param->_nb_reg_free); ALLOC1(internal_PUSH_SPR_VAL ,Tcontrol_t,_param->_nb_reg_free); ALLOC1(internal_PUSH_SPR_NUM_BANK,uint32_t ,_param->_nb_reg_free); + ALLOC1(internal_PUSH_SPR_NUM_REG ,uint32_t ,_param->_nb_reg_free); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp (revision 118) @@ -77,6 +77,8 @@ DELETE1(internal_PUSH_GPR_VAL ,_param->_nb_reg_free); DELETE1(internal_PUSH_GPR_NUM_BANK,_param->_nb_reg_free); + DELETE1(internal_PUSH_GPR_NUM_REG ,_param->_nb_reg_free); DELETE1(internal_PUSH_SPR_VAL ,_param->_nb_reg_free); DELETE1(internal_PUSH_SPR_NUM_BANK,_param->_nb_reg_free); + DELETE1(internal_PUSH_SPR_NUM_REG ,_param->_nb_reg_free); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp (revision 118) @@ -8,4 +8,5 @@ #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" +#include namespace morpheo { @@ -18,4 +19,5 @@ namespace stat_list_unit { +#define STAT_LIST_SCAN_ALL #undef FUNCTION @@ -26,23 +28,56 @@ log_function(Stat_List_unit,FUNCTION,_name.c_str()); - uint32_t gpr_ptr = reg_GPR_PTR_FREE; - uint32_t spr_ptr = reg_SPR_PTR_FREE; + uint32_t gpr_ptr = reg_GPR_PTR_FREE; + uint32_t spr_ptr = reg_SPR_PTR_FREE; +#ifdef STAT_LIST_SCAN_ALL + std::set list_gpr_free; + std::set list_spr_free; +#endif for (uint32_t i=0; i<_param->_nb_reg_free; i++) { + log_printf(TRACE,Stat_List_unit,FUNCTION," * PUSH [%d]",i); + uint32_t offset = i*_param->_nb_bank_by_port_free; // PUSH_GPR { - uint32_t bank_gpr; - - for (bank_gpr=offset; bank_gpr_nb_bank_by_port_free; bank_gpr++) - if (gpr_stat_list[bank_gpr][gpr_ptr].can_free()) - break; - - bool val = (bank_gpr != offset+_param->_nb_bank_by_port_free); - + bool val = false; + uint32_t bank_gpr = offset; + +#ifdef STAT_LIST_SCAN_ALL + for (uint32_t _gpr_ptr=0; _gpr_ptr<_param->_nb_general_register_by_bank; ++_gpr_ptr) + { + gpr_ptr = (gpr_ptr+1)%_param->_nb_general_register_by_bank; +#endif + for (bank_gpr = offset; bank_gpr_nb_bank_by_port_free; bank_gpr++) + if (gpr_stat_list[bank_gpr][gpr_ptr].can_free()) + { +#ifdef STAT_LIST_SCAN_ALL + Tgeneral_address_t num_reg = ((bank_gpr<<_param->_shift_gpr) | gpr_ptr); + if (list_gpr_free.find(num_reg) == list_gpr_free.end()) + { + list_gpr_free.insert(num_reg); +#endif + val = true; + break; +#ifdef STAT_LIST_SCAN_ALL + } +#endif + } +#ifdef STAT_LIST_SCAN_ALL + if (val) + break; + } +#endif + + log_printf(TRACE,Stat_List_unit,FUNCTION," * val : %d",val); + log_printf(TRACE,Stat_List_unit,FUNCTION," * bank_gpr : %d",bank_gpr); + log_printf(TRACE,Stat_List_unit,FUNCTION," * gpr_ptr : %d",gpr_ptr); + log_printf(TRACE,Stat_List_unit,FUNCTION," * num_reg : %d",((bank_gpr<<_param->_shift_gpr) | gpr_ptr)); + internal_PUSH_GPR_VAL [i] = val; internal_PUSH_GPR_NUM_BANK [i] = bank_gpr; + internal_PUSH_GPR_NUM_REG [i] = gpr_ptr ; PORT_WRITE(out_PUSH_GPR_VAL [i], val); @@ -53,14 +88,41 @@ // PUSH_SPR { - uint32_t bank_spr; - - for (bank_spr=offset; bank_spr_nb_bank_by_port_free; bank_spr++) - if (spr_stat_list[bank_spr][spr_ptr].can_free()) - break; + bool val = false; + uint32_t bank_spr = offset; - bool val = (bank_spr != (offset+_param->_nb_bank_by_port_free)); - +#ifdef STAT_LIST_SCAN_ALL + for (uint32_t _spr_ptr=0; _spr_ptr<_param->_nb_special_register_by_bank; ++_spr_ptr) + { + spr_ptr = (spr_ptr+1)%_param->_nb_special_register_by_bank; +#endif + for (bank_spr = offset; bank_spr_nb_bank_by_port_free; bank_spr++) + if (spr_stat_list[bank_spr][spr_ptr].can_free()) + { +#ifdef STAT_LIST_SCAN_ALL + Tspecial_address_t num_reg = ((bank_spr<<_param->_shift_spr) | spr_ptr); + if (list_spr_free.find(num_reg) == list_spr_free.end()) + { + list_spr_free.insert(num_reg); +#endif + val = true; + break; +#ifdef STAT_LIST_SCAN_ALL + } +#endif + } +#ifdef STAT_LIST_SCAN_ALL + if (val) + break; + } +#endif + + log_printf(TRACE,Stat_List_unit,FUNCTION," * val : %d",val); + log_printf(TRACE,Stat_List_unit,FUNCTION," * bank_spr : %d",bank_spr); + log_printf(TRACE,Stat_List_unit,FUNCTION," * spr_ptr : %d",spr_ptr); + log_printf(TRACE,Stat_List_unit,FUNCTION," * num_reg : %d",((bank_spr<<_param->_shift_spr) | spr_ptr)); + internal_PUSH_SPR_VAL [i] = val; internal_PUSH_SPR_NUM_BANK [i] = bank_spr; + internal_PUSH_SPR_NUM_REG [i] = spr_ptr ; PORT_WRITE(out_PUSH_SPR_VAL [i], val); @@ -68,4 +130,6 @@ PORT_WRITE(out_PUSH_SPR_NUM_REG[i], ((bank_spr<<_param->_shift_spr) | spr_ptr)); } + + } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 118) @@ -233,5 +233,5 @@ // ===================================================== if (internal_PUSH_GPR_VAL [i] and PORT_READ(in_PUSH_GPR_ACK [i])) - gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][reg_GPR_PTR_FREE].free(); + gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][internal_PUSH_GPR_NUM_REG [i]].free(); // ===================================================== @@ -239,5 +239,5 @@ // ===================================================== if (internal_PUSH_SPR_VAL [i] and PORT_READ(in_PUSH_SPR_ACK [i])) - spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][reg_SPR_PTR_FREE].free(); + spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][internal_PUSH_SPR_NUM_REG [i]].free(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp (revision 118) @@ -133,4 +133,21 @@ } } + +#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Special_Register_unit == true) + { + log_printf(TRACE,Special_Register_unit,FUNCTION," * Dump SPR"); + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + log_printf(TRACE,Special_Register_unit,FUNCTION," * SR [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR ]->read()); + log_printf(TRACE,Special_Register_unit,FUNCTION," * CID [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_CID ]->read()); + log_printf(TRACE,Special_Register_unit,FUNCTION," * TID [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_TID ]->read()); + log_printf(TRACE,Special_Register_unit,FUNCTION," * TSR [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_TSR ]->read()); +// log_printf(TRACE,Special_Register_unit,FUNCTION," * MACLO [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_MAC ][SPR_MACLO ]->read()); +// log_printf(TRACE,Special_Register_unit,FUNCTION," * MACHI [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_MAC ][SPR_MACHI ]->read()); + } + } +#endif } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h (revision 118) @@ -51,7 +51,4 @@ # define DEBUG_Meta_Predictor_Glue true # define DEBUG_Two_Level_Branch_Predictor true -# define DEBUG_Two_Level_Branch_Predictor_Glue true -# define DEBUG_Branch_History_Table true -# define DEBUG_Pattern_History_Table true # define DEBUG_Prediction_unit_Glue true # define DEBUG_Return_Address_Stack true @@ -98,3 +95,100 @@ # define DEBUG_Allocation true # define DEBUG_Interface true + +//---------------------------------------------------------------------- + +// Boolean +# define NAME_true "true" +# define NAME_false "false" + +// Others +# define NAME_Allocation "Allocation" +# define NAME_Interface "Interface" + +// Component +# define NAME_Morpheo "Morpheo" +# define NAME_Behavioural "Behavioural" +# define NAME_Configuration "Configuration" +# define NAME_Generic "Generic" +# define NAME_Comparator "Comparator" +# define NAME_Counter "Counter" +# define NAME_Divider "Divider" +# define NAME_Multiplier "Multiplier" +# define NAME_Priority "Priority" +# define NAME_Queue "Queue" +# define NAME_Queue_Control "Queue_Control" +# define NAME_RegisterFile "RegisterFile" +# define NAME_RegisterFile_Monolithic "RegisterFile_Monolithic" +# define NAME_RegisterFile_Multi_Banked "RegisterFile_Multi_Banked" +# define NAME_Select "Select" +# define NAME_Select_Priority_Fixed "Select_Priority_Fixed" +# define NAME_Shifter "Shifter" +# define NAME_Sort "Sort" +# define NAME_Victim "Victim" +# define NAME_Victim_Pseudo_LRU "Victim_Pseudo_LRU" +# define NAME_Core "Core" +# define NAME_Core_Glue "Core_Glue" +# define NAME_Dcache_Access "Dcache_Access" +# define NAME_Icache_Access "Icache_Access" +# define NAME_Multi_Front_end "Multi_Front_end" +# define NAME_Front_end "Front_end" +# define NAME_Context_State "Context_State" +# define NAME_Decod_unit "Decod_unit" +# define NAME_Decod "Decod" +# define NAME_Decod_queue "Decod_queue" +# define NAME_Front_end_Glue "Front_end_Glue" +# define NAME_Ifetch_unit "Ifetch_unit" +# define NAME_Address_management "Address_management" +# define NAME_Ifetch_queue "Ifetch_queue" +# define NAME_Ifetch_unit_Glue "Ifetch_unit_Glue" +# define NAME_Prediction_unit "Prediction_unit" +# define NAME_Branch_Target_Buffer "Branch_Target_Buffer" +# define NAME_Branch_Target_Buffer_Glue "Branch_Target_Buffer_Glue" +# define NAME_Branch_Target_Buffer_Register "Branch_Target_Buffer_Register" +# define NAME_Direction "Direction" +# define NAME_Direction_Glue "Direction_Glue" +# define NAME_Meta_Predictor "Meta_Predictor" +# define NAME_Meta_Predictor_Glue "Meta_Predictor_Glue" +# define NAME_Two_Level_Branch_Predictor "Two_Level_Branch_Predictor" +# define NAME_Prediction_unit_Glue "Prediction_unit_Glue" +# define NAME_Return_Address_Stack "Return_Address_Stack" +# define NAME_Update_Prediction_Table "Update_Prediction_Table" +# define NAME_Multi_OOO_Engine "Multi_OOO_Engine" +# define NAME_OOO_Engine "OOO_Engine" +# define NAME_Commit_unit "Commit_unit" +# define NAME_Issue_queue "Issue_queue" +# define NAME_OOO_Engine_Glue "OOO_Engine_Glue" +# define NAME_Reexecute_unit "Reexecute_unit" +# define NAME_Rename_unit "Rename_unit" +# define NAME_Load_Store_pointer_unit "Load_Store_pointer_unit" +# define NAME_Register_translation_unit "Register_translation_unit" +# define NAME_Dependency_checking_unit "Dependency_checking_unit" +# define NAME_Free_List_unit "Free_List_unit" +# define NAME_Register_Address_Translation_unit "Register_Address_Translation_unit" +# define NAME_Register_translation_unit_Glue "Register_translation_unit_Glue" +# define NAME_Stat_List_unit "Stat_List_unit" +# define NAME_Rename_select "Rename_select" +# define NAME_Rename_unit_Glue "Rename_unit_Glue" +# define NAME_Special_Register_unit "Special_Register_unit" +# define NAME_Multi_Execute_loop "Multi_Execute_loop" +# define NAME_Execute_loop "Execute_loop" +# define NAME_Execute_loop_Glue "Execute_loop_Glue" +# define NAME_Multi_Execute_unit "Multi_Execute_unit" +# define NAME_Execute_unit "Execute_unit" +# define NAME_Functionnal_unit "Functionnal_unit" +# define NAME_Load_store_unit "Load_store_unit" +# define NAME_Multi_Read_unit "Multi_Read_unit" +# define NAME_Read_unit "Read_unit" +# define NAME_Read_queue "Read_queue" +# define NAME_Reservation_station "Reservation_station" +# define NAME_Multi_Write_unit "Multi_Write_unit" +# define NAME_Write_unit "Write_unit" +# define NAME_Execute_queue "Execute_queue" +# define NAME_Write_queue "Write_queue" +# define NAME_Network "Network" +# define NAME_Execution_unit_to_Write_unit "Execution_unit_to_Write_unit" +# define NAME_Read_unit_to_Execution_unit "Read_unit_to_Execution_unit" +# define NAME_Register_unit "Register_unit" +# define NAME_Register_unit_Glue "Register_unit_Glue" + #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Model.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Model.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Model.h (revision 118) @@ -9,5 +9,6 @@ */ -#include "Common/include/Debug.h" +#include "Common/include/ToString.h" +#include "Common/include/FromString.h" #include "Common/include/ErrorMorpheo.h" #include @@ -24,21 +25,21 @@ typedef struct { - model_type_t type ; - debug_verbosity_t debug; + model_type_t type ; + bool debug; } model_t; class Model { - private : static const model_type_t default_type = MODEL_SYSTEMC; - private : static const debug_verbosity_t default_debug = DEBUG_NONE; + private : static const model_type_t default_type = MODEL_SYSTEMC; + private : static const bool default_debug = false; private : std::map models; - public : Model (void); - public : ~Model (void); - public : void set_model (std::string component, model_type_t type, debug_verbosity_t debug); - public : model_type_t get_type (std::string component); - public : debug_verbosity_t get_debug (std::string component); - public : void print (void); + public : Model (void); + public : ~Model (void); + public : void set_model (std::string component, model_type_t type, bool debug); + public : model_type_t get_type (std::string component); + public : bool get_debug (std::string component); + public : void print (void); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 118) @@ -20,9 +20,9 @@ typedef uint8_t Texception_t; typedef uint8_t Tcontext_t; - typedef uint8_t Tpacket_t; + typedef uint16_t Tpacket_t; typedef uint8_t Toperation_t; typedef uint8_t Ttype_t; - typedef uint8_t Tcounter_t; // universal counter - typedef uint8_t Tptr_t; // universal pointer + typedef uint32_t Tcounter_t; // universal counter + typedef uint32_t Tptr_t; // universal pointer typedef uint32_t Tspr_t; typedef uint16_t Tspr_address_t; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 118) @@ -10,8 +10,8 @@ #define MORPHEO_MAJOR_VERSION "0" #define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "117" +#define MORPHEO_REVISION "118" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "16" +#define MORPHEO_DATE_DAY "20" #define MORPHEO_DATE_MONTH "05" #define MORPHEO_DATE_YEAR "2009" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model.cpp (revision 118) @@ -7,4 +7,5 @@ #include "Behavioural/include/Model.h" +#include "Common/include/Debug.h" namespace morpheo { @@ -16,4 +17,8 @@ { log_begin(Behavioural,FUNCTION); + + set_model(NAME_true ,MODEL_SYSTEMC,true ); + set_model(NAME_false,MODEL_SYSTEMC,false); + log_end(Behavioural,FUNCTION); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_debug.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_debug.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_debug.cpp (revision 118) @@ -7,4 +7,5 @@ #include "Behavioural/include/Model.h" +#include "Common/include/Debug.h" namespace morpheo { @@ -13,9 +14,9 @@ #undef FUNCTION #define FUNCTION "Model::get_debug" - debug_verbosity_t Model::get_debug (std::string component) + bool Model::get_debug (std::string component) { log_begin(Behavioural,FUNCTION); - debug_verbosity_t _return; + bool _return; std::map::iterator it = models.find(component); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_type.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_type.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_type.cpp (revision 118) @@ -7,4 +7,5 @@ #include "Behavioural/include/Model.h" +#include "Common/include/Debug.h" namespace morpheo { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_print.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_print.cpp (revision 118) @@ -7,4 +7,5 @@ #include "Behavioural/include/Model.h" +#include "Common/include/Debug.h" namespace morpheo { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_set_model.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_set_model.cpp (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_set_model.cpp (revision 118) @@ -7,4 +7,5 @@ #include "Behavioural/include/Model.h" +#include "Common/include/Debug.h" namespace morpheo { @@ -13,5 +14,5 @@ #undef FUNCTION #define FUNCTION "Model::set_model" - void Model::set_model (std::string component, model_type_t type, debug_verbosity_t debug) + void Model::set_model (std::string component, model_type_t type, bool debug) { log_begin(Behavioural,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h (revision 118) @@ -24,4 +24,5 @@ */ +#include "Common/include/Debug_type.h" #include "Common/include/Systemc.h" #include "Common/include/Message.h" @@ -29,4 +30,6 @@ #include "Common/include/ChangeCase.h" #include "Behavioural/include/Debug_component.h" +#include "Behavioural/include/Model.h" +#include "Behavioural/include/Simulation.h" #include #include @@ -39,12 +42,12 @@ namespace morpheo { -typedef enum - { - DEBUG_NONE , - DEBUG_INFO , - DEBUG_TRACE, - DEBUG_FUNC , - DEBUG_ALL - } debug_verbosity_t; +// typedef enum +// { +// DEBUG_NONE , +// DEBUG_INFO , +// DEBUG_TRACE, +// DEBUG_FUNC , +// DEBUG_ALL +// } debug_verbosity_t; extern debug_verbosity_t debug; @@ -81,6 +84,6 @@ if ((debug == DEBUG_ALL ) or \ (DEBUG_ ## level == DEBUG_NONE) or \ - (( DEBUG_ ## level <= debug) and \ - ( DEBUG_ ## component == true )) ) \ + (( DEBUG_ ## level <= debug) and \ + ( morpheo::behavioural::_model.get_debug(NAME_ ## component))) ) \ { \ if (DEBUG_ ## level <= DEBUG_INFO) \ Index: trunk/IPs/systemC/processor/Morpheo/Common/include/Debug_type.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/Debug_type.h (revision 118) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/Debug_type.h (revision 118) @@ -0,0 +1,30 @@ +#ifndef Morpheo_Debug_type_h +#define Morpheo_Debug_type_h + +/* + * $Id$ + * + * [ Description ] + * + * Debug's Level : + * - None : print elementary information + * - Info : print basic information + * - Trace : trace internal variable + * - Func : trace call and return function + * - All : print all information + */ + + +namespace morpheo { + +typedef enum + { + DEBUG_NONE , + DEBUG_INFO , + DEBUG_TRACE, + DEBUG_FUNC , + DEBUG_ALL + } debug_verbosity_t; + +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_0.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_0.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_0.cfg (revision 118) @@ -1,5 +1,5 @@ - + @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_1.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_1.cfg (revision 118) @@ -39,5 +39,5 @@ - + @@ -46,4 +46,5 @@ + @@ -83,5 +84,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg (revision 118) @@ -39,5 +39,5 @@ - + @@ -46,4 +46,5 @@ + @@ -83,5 +84,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg (revision 118) @@ -39,5 +39,5 @@ - + @@ -46,4 +46,5 @@ + @@ -83,5 +84,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg (revision 118) @@ -39,5 +39,5 @@ - + @@ -46,4 +46,5 @@ + @@ -97,5 +98,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg (revision 118) @@ -17,5 +17,5 @@ - + @@ -36,14 +36,15 @@ - + - + - + - + + @@ -60,18 +61,4 @@ - - - - - - - - - - - - - - @@ -123,6 +110,6 @@ - - + + @@ -135,11 +122,8 @@ - + - - - - + @@ -165,8 +149,6 @@ - - @@ -178,33 +160,20 @@ - - - + + - - - - - - - + - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg (revision 118) @@ -17,5 +17,5 @@ - + @@ -39,5 +39,5 @@ - + @@ -45,5 +45,6 @@ - + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg (revision 118) @@ -17,5 +17,5 @@ - + @@ -39,11 +39,12 @@ - + - + - + + @@ -124,5 +125,5 @@ - + @@ -170,5 +171,4 @@ - @@ -200,5 +200,5 @@ - + @@ -207,6 +207,4 @@ - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg (revision 118) @@ -17,5 +17,5 @@ - + @@ -39,11 +39,12 @@ - + - + - + + @@ -124,5 +125,5 @@ - + @@ -175,6 +176,4 @@ - - @@ -213,16 +212,14 @@ - + - - - - - + + + @@ -231,10 +228,4 @@ - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg (revision 118) @@ -39,11 +39,12 @@ - + - + - + + @@ -88,5 +89,5 @@ - + @@ -122,5 +123,5 @@ - + @@ -129,5 +130,5 @@ - + @@ -141,5 +142,5 @@ - + @@ -177,7 +178,4 @@ - - - @@ -230,31 +228,22 @@ - + - - - + - + - - - - + + - + - - - - + + - - - - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg (revision 118) @@ -39,11 +39,12 @@ - + - + - + + @@ -88,13 +89,13 @@ - + - - + + - + @@ -105,5 +106,5 @@ - + @@ -122,12 +123,12 @@ - + - + - + @@ -141,5 +142,5 @@ - + @@ -183,10 +184,4 @@ - - - - - - @@ -273,77 +268,44 @@ - + - - - - - - - - - + + + - - - - - - - - + + - - - - - - + - - + + - - - - - - + - - + + - - - - - - + - - + + - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg (revision 118) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg (revision 118) @@ -0,0 +1,437 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_2.cfg (revision 118) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_2.cfg (revision 118) @@ -0,0 +1,596 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_0.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_0.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_0.cfg (revision 118) @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_1.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_1.cfg (revision 118) @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg (revision 118) @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg (revision 118) @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg (revision 118) @@ -46,4 +46,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 118) @@ -6,24 +6,24 @@ - + - + - - + + - - - + + + - + @@ -31,6 +31,6 @@ - - + + @@ -38,40 +38,40 @@ - - + + - - - - + + + + - - - - + + + + - + - + - - - + + + - - + + - - - + + + - - + + @@ -86,9 +86,9 @@ - - - - - + + + + + @@ -96,23 +96,23 @@ - - + + - + - - - - - - - - - + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 118) @@ -11,4 +11,9 @@ + + + + + @@ -17,9 +22,4 @@ - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 117) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 118) @@ -11,93 +11,93 @@ + + + + + - + - - - - - - - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +