Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp	(revision 119)
@@ -44,4 +44,7 @@
 	uint32_t num_front_end = it->grp;
 	uint32_t num_context   = it->elt;
+
+        log_printf(TRACE,Dcache_Access,FUNCTION,"  * Context [%d][%d]",num_front_end, num_context);
+
 	
 	if (PORT_READ(in_CONTEXT_REQ_VAL [num_front_end][num_context]))
@@ -50,5 +53,7 @@
 	    Tcontrol_t icache_req_ack = PORT_READ(in_ICACHE_REQ_ACK [num_port]);
 
-            log_printf(TRACE,Dcache_Access,FUNCTION,"  * num_port      : %d",num_port);
+            log_printf(TRACE,Dcache_Access,FUNCTION,"    * context have request");
+            log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_port      : %d",num_port);
+            log_printf(TRACE,Dcache_Access,FUNCTION,"    * icache_req_val: %d",icache_req_val [num_port]);
 
 #ifdef STATISTICS
@@ -65,10 +70,7 @@
 		context_req_ack [num_front_end][num_context] = icache_req_ack;
 
-                log_printf(TRACE,Dcache_Access,FUNCTION,"    * kane - icache");
-
 		if (_param->_have_port_icache_thread_id)
                   {
                 Tcontext_t num_thread = _param->_translate_context_to_thread[num_front_end][num_context];
-                log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_context : %d",num_context);
                 log_printf(TRACE,Dcache_Access,FUNCTION,"    * num_thread  : %d",num_thread );
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h	(revision 119)
@@ -136,11 +136,11 @@
   // ----------------------------------------------------------
 
-  //                                   HAVE_DCACHE_RSP MUST_CHECK STD::DECOD_BARRIER
+  //                                   HAVE_DCACHE_RSP MUST_CHECK DECOD_BARRIER
   // OPERATION_MEMORY_LOAD             X               X          -
   // OPERATION_MEMORY_LOCK             -               -          -
-  // OPERATION_MEMORY_INVALIDATE       -               -          X
+  // OPERATION_MEMORY_INVALIDATE       -               -          X (mtspr)
   // OPERATION_MEMORY_PREFETCH         -               -          -
-  // OPERATION_MEMORY_FLUSH            -               -          X
-  // OPERATION_MEMORY_SYNCHRONIZATION  X               -          X
+  // OPERATION_MEMORY_FLUSH            -               -          X (mtspr)
+  // OPERATION_MEMORY_SYNCHRONIZATION  X               -          X (msync, psync, csync)
   
 #define have_dcache_rsp(x) (is_operation_memory_load(x) or (x==OPERATION_MEMORY_SYNCHRONIZATION))
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 119)
@@ -255,4 +255,7 @@
     else
       {
+        // load_queue_push if speculative_access_queue have access at the dcache, or they have an event
+	bool load_queue_push = (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE);
+
 	//================================================================
 	// Interface "MEMORY_OUT"
@@ -898,6 +901,4 @@
 
 		_speculative_access_queue [index]._exception            = exception;
-		
-		log_printf(TRACE,Load_store_unit,FUNCTION,"      * index         : %d",index);
 	      }
 	  }
@@ -906,6 +907,4 @@
 	// Interface "DCACHE_REQ"
 	//================================================================
-	bool load_queue_push = (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE);
-
         if ((    internal_DCACHE_REQ_VAL  == 1) and
             (PORT_READ(in_DCACHE_REQ_ACK[0]) == 1))
@@ -948,8 +947,11 @@
 	if (load_queue_push)
 	  {
+            log_printf(TRACE,Load_store_unit,FUNCTION,"  * load_queue_push");
+
 	    Tlsq_ptr_t   ptr_write = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._load_queue_ptr_write;
 	    Toperation_t operation = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._operation;
 	    Texception_t exception = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._exception;
 	    bool         have_exception = (exception != EXCEPTION_MEMORY_NONE);
+            bool         need_check= false;
 	    
 	    if (have_exception)
@@ -963,4 +965,5 @@
 		      {
 			// load
+                        need_check = true;
 			_load_queue [ptr_write]._state = LOAD_QUEUE_WAIT_CHECK;
 		      }
@@ -1020,5 +1023,6 @@
 
             // Only load need check
-            if (is_operation_memory_load(_load_queue [ptr_write]._operation))
+            if (need_check)
+//             if (is_operation_memory_load(_load_queue [ptr_write]._operation))
               {
                 log_printf(TRACE,Load_store_unit,FUNCTION,"    * update nb_check");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp	(revision 119)
@@ -56,4 +56,5 @@
   ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL  ," in_BRANCH_EVENT_ADDRESS_DEST_VAL  ",Tcontrol_t   ,_param->_nb_context);
   ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST      ," in_BRANCH_EVENT_ADDRESS_DEST      ",Taddress_t   ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE      ," in_BRANCH_EVENT_CAN_CONTINUE      ",Tcontrol_t   ,_param->_nb_context);
 
   ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL                ," in_DECOD_EVENT_VAL                ",Tcontrol_t   ,_param->_nb_decod_unit);
@@ -97,7 +98,9 @@
   ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT             ,"out_EVENT_ADDRESS_NEXT             ",Taddress_t   ,_param->_nb_context   ); 
   ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL         ,"out_EVENT_ADDRESS_NEXT_VAL         ",Tcontrol_t   ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_EVENT_FLUSH_ONLY               ,"out_EVENT_FLUSH_ONLY               ",Tcontrol_t   ,_param->_nb_context   );
   ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE               ,"out_EVENT_IS_DS_TAKE               ",Tcontrol_t   ,_param->_nb_context   );
   ALLOC1_SC_SIGNAL(out_EVENT_TYPE                     ,"out_EVENT_TYPE                     ",Tevent_type_t,_param->_nb_context   );
   ALLOC1_SC_SIGNAL(out_EVENT_DEPTH                    ,"out_EVENT_DEPTH                    ",Tdepth_t     ,_param->_nb_context   );
+  ALLOC1_SC_SIGNAL(out_EVENT_FLUSH_ONLY               ,"out_EVENT_FLUSH_ONLY               ",Tcontrol_t   ,_param->_nb_context   );
 
   ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL                  ,"out_SPR_EVENT_VAL                  ",Tcontrol_t   ,_param->_nb_context   );
@@ -136,4 +139,6 @@
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL  ,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST      ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CAN_CONTINUE      ,_param->_nb_context);
+
   INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
   INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
@@ -185,4 +190,5 @@
   if (_param->_have_port_depth)
   INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_DEPTH                    ,_param->_nb_context   );
+  INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_FLUSH_ONLY               ,_param->_nb_context   );
 								        
   INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL                  ,_param->_nb_context   );
@@ -399,4 +405,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -477,4 +484,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -582,5 +590,6 @@
 	  in_BRANCH_EVENT_ADDRESS_SRC      [port]->write(0x400);
 	  in_BRANCH_EVENT_ADDRESS_DEST     [port]->write(0x500);
-	  in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0);
+ 	  in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0);
+	  in_BRANCH_EVENT_CAN_CONTINUE     [port]->write(0);
 
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
@@ -623,4 +632,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -672,4 +682,5 @@
 	  in_BRANCH_EVENT_ADDRESS_DEST     [port]->write(0x700);
 	  in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(1);
+          in_BRANCH_EVENT_CAN_CONTINUE     [port]->write(0);
 
 	  TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1);
@@ -711,4 +722,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),1);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -779,4 +791,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -873,4 +886,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -968,4 +982,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -1063,4 +1078,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -1158,4 +1174,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -1253,4 +1270,5 @@
 		  TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0);
 		  TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE       [context]->read(),0);
+ 		  TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY       [context]->read(),0);
 		  
 		  find = true;
@@ -1315,4 +1333,6 @@
   DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL  ,_param->_nb_context);
   DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST      ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE      ,_param->_nb_context);
+
   DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL                ,_param->_nb_decod_unit);
   DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK                ,_param->_nb_decod_unit);
@@ -1353,4 +1373,5 @@
   DELETE1_SC_SIGNAL(out_EVENT_TYPE                     ,_param->_nb_context   );
   DELETE1_SC_SIGNAL(out_EVENT_DEPTH                    ,_param->_nb_context   );
+  DELETE1_SC_SIGNAL(out_EVENT_FLUSH_ONLY               ,_param->_nb_context   );
   DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL                  ,_param->_nb_context   );
   DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK                  ,_param->_nb_context   );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h	(revision 119)
@@ -72,4 +72,5 @@
   public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_ADDRESS_DEST_VAL      ;//[nb_context]// take or not
   public    : SC_IN (Taddress_t         )  **  in_BRANCH_EVENT_ADDRESS_DEST          ;//[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_BRANCH_EVENT_CAN_CONTINUE          ;//[nb_context]
 
     // ~~~~~[ Interface : "decod_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -120,4 +121,5 @@
   public    : SC_OUT(Tevent_type_t      )  ** out_EVENT_TYPE                         ;//[nb_context]
   public    : SC_OUT(Tdepth_t           )  ** out_EVENT_DEPTH                        ;//[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_FLUSH_ONLY                   ;//[nb_context]
 
     // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -155,4 +157,5 @@
   private   : Tcontrol_t                    * reg_EVENT_IS_DS_TAKE                   ;//[nb_context]
   private   : Tdepth_t                      * reg_EVENT_DEPTH                        ;//[nb_context]
+  private   : Tcontrol_t                    * reg_EVENT_FLUSH_ONLY                   ;//[nb_context]
   private   : Tcontrol_t                    * reg_INTERRUPT_ENABLE                   ;//[nb_context]
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h	(revision 119)
@@ -29,4 +29,6 @@
       CONTEXT_STATE_KO_EXCEP_ADDR                      , // update address manager
       CONTEXT_STATE_KO_EXCEP_SPR                       , // update spr (epc, esr, sr[DSX])
+//       CONTEXT_STATE_KO_MISS_BRANCH_FAST_ADDR           , // update address manager
+//       CONTEXT_STATE_KO_MISS_BRANCH_FAST_WAIT_UPDATE    , // branch is complete, wait update by update_prediction_table
       CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE         , // branch is complete, wait update by update_prediction_table
       CONTEXT_STATE_KO_MISS_BRANCH_ADDR                , // update address manager
@@ -66,4 +68,6 @@
       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_ADDR                       : return "context_state_ko_excep_addr"                      ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_SPR                        : return "context_state_ko_excep_spr"                       ; break;
+//       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_FAST_WAIT_UPDATE     : return "context_state_ko_miss_branch_fast_wait_update"    ; break;
+//       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_FAST_ADDR            : return "context_state_ko_miss_branch_fast_addr"           ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE          : return "context_state_ko_miss_branch_wait_update"         ; break;
       case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_ADDR                 : return "context_state_ko_miss_branch_addr"                ; break;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp	(revision 119)
@@ -68,4 +68,5 @@
       ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST_VAL      ,"address_dest_val"       ,Tcontrol_t         ,1);
       ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST          ,"address_dest"           ,Taddress_t         ,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_CAN_CONTINUE          ,"can_continue"           ,Tcontrol_t         ,1);
 
       ALLOC1_INTERFACE_END(_param->_nb_context);
@@ -146,4 +147,5 @@
       ALLOC1_SIGNAL_OUT(out_EVENT_TYPE                         ,"type"            ,Tevent_type_t     ,_param->_size_event_type);
       ALLOC1_SIGNAL_OUT(out_EVENT_DEPTH                        ,"depth"           ,Tdepth_t          ,_param->_size_depth);
+      ALLOC1_SIGNAL_OUT(out_EVENT_FLUSH_ONLY                   ,"flush_only"      ,Tcontrol_t        ,1);
 
       ALLOC1_INTERFACE_END(_param->_nb_context);
@@ -216,4 +218,5 @@
      ALLOC1(reg_EVENT_IS_DS_TAKE      ,Tcontrol_t     ,_param->_nb_context);
      ALLOC1(reg_EVENT_DEPTH           ,Tdepth_t       ,_param->_nb_context);
+     ALLOC1(reg_EVENT_FLUSH_ONLY      ,Tcontrol_t     ,_param->_nb_context);
      ALLOC1(reg_INTERRUPT_ENABLE      ,Tcontrol_t     ,_param->_nb_context);
         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp	(revision 119)
@@ -36,4 +36,5 @@
         DELETE1_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL      ,_param->_nb_context,1);
         DELETE1_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST          ,_param->_nb_context,_param->_size_instruction_address);
+        DELETE1_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE          ,_param->_nb_context,1);
 
         DELETE1_SIGNAL( in_DECOD_EVENT_VAL                    ,_param->_nb_decod_unit,1);
@@ -79,4 +80,5 @@
         DELETE1_SIGNAL(out_EVENT_TYPE                         ,_param->_nb_context,_param->_size_event_type);
         DELETE1_SIGNAL(out_EVENT_DEPTH                        ,_param->_nb_context,_param->_size_depth);
+        DELETE1_SIGNAL(out_EVENT_FLUSH_ONLY                   ,_param->_nb_context,1);
 
 	DELETE1_SIGNAL(out_SPR_EVENT_VAL                      ,_param->_nb_context,1);
@@ -107,4 +109,5 @@
         DELETE1(reg_EVENT_IS_DS_TAKE      ,_param->_nb_context);
         DELETE1(reg_EVENT_DEPTH           ,_param->_nb_context);
+        DELETE1(reg_EVENT_FLUSH_ONLY      ,_param->_nb_context);
         DELETE1(reg_INTERRUPT_ENABLE      ,_param->_nb_context);
         
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp	(revision 119)
@@ -50,4 +50,5 @@
         Tevent_type_t type                         ;//[nb_context]
         Tdepth_t      depth            = reg_EVENT_DEPTH [i];
+        Tcontrol_t    flush_only       = reg_EVENT_FLUSH_ONLY [i];
 
         switch (state)
@@ -74,4 +75,5 @@
         if (_param->_have_port_depth)
 	PORT_WRITE(out_EVENT_DEPTH            [i], depth);
+	PORT_WRITE(out_EVENT_FLUSH_ONLY       [i], flush_only);
 
 	log_printf(TRACE,Context_State,FUNCTION,"  * EVENT Context      : %d", i);
@@ -83,4 +85,5 @@
 	log_printf(TRACE,Context_State,FUNCTION,"    * TYPE             : %d", type);
 	log_printf(TRACE,Context_State,FUNCTION,"    * DEPTH            : %d", depth);
+	log_printf(TRACE,Context_State,FUNCTION,"    * FLUSH_ONLY       : %d", flush_only);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp	(revision 119)
@@ -328,15 +328,24 @@
                   else
                     {
-                      reg_STATE                  [i] =  CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; //@@@ TODO : make MISS fast (miss decod)
-
-                      Tcontrol_t dest_val = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]);
-                      reg_EVENT_ADDRESS          [i] =  PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC  [i])+1; // address delay slot
-                      reg_EVENT_ADDRESS_EPCR     [i] =  PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]);   // address_next
-                      reg_EVENT_ADDRESS_EPCR_VAL [i] =  dest_val;
-                    //reg_EVENT_ADDRESS_EEAR     [i] =  0; 
-                      reg_EVENT_ADDRESS_EEAR_VAL [i] =  0;
-                      reg_EVENT_IS_DELAY_SLOT    [i] =  1;
-                      reg_EVENT_IS_DS_TAKE       [i] =  dest_val;
-                      reg_EVENT_DEPTH            [i] =  depth;
+                      Tcontrol_t can_continue = PORT_READ(in_BRANCH_EVENT_CAN_CONTINUE    [i]);
+                      Tcontrol_t dest_val     = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]);
+
+                      log_printf(TRACE,Context_State,FUNCTION,"  * dest_val    : %d",dest_val    );
+                      log_printf(TRACE,Context_State,FUNCTION,"  * can_continue: %d",can_continue);
+
+                      if (can_continue)
+                        reg_STATE                [i] =  CONTEXT_STATE_KO_MISS_BRANCH_ADDR;
+                      else
+                        reg_STATE                [i] =  CONTEXT_STATE_KO_MISS_BRANCH_WAITEND;
+
+                      reg_EVENT_ADDRESS          [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC  [i])+1; // address delay slot
+                      reg_EVENT_ADDRESS_EPCR     [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]);   // address_next
+                      reg_EVENT_ADDRESS_EPCR_VAL [i] = dest_val;
+                    //reg_EVENT_ADDRESS_EEAR     [i] = 0; 
+                      reg_EVENT_ADDRESS_EEAR_VAL [i] = 0;
+                      reg_EVENT_IS_DELAY_SLOT    [i] = 1;
+                      reg_EVENT_IS_DS_TAKE       [i] = dest_val;
+                      reg_EVENT_DEPTH            [i] = depth;
+                      reg_EVENT_FLUSH_ONLY       [i] = can_continue;
                     }
                 }
@@ -363,6 +372,6 @@
               Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));
               Tdepth_t   depth1     = (depth    >=depth_min)?(depth    -depth_min):((depth    +depth_max-depth_min));
-//               Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));
-//               Tdepth_t   depth1     = (depth    >=depth_min)?(depth    ):((depth    +depth_max));
+//            Tdepth_t   depth0     = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));
+//            Tdepth_t   depth1     = (depth    >=depth_min)?(depth    ):((depth    +depth_max));
 
               // priority : miss_load > miss_branch > excep > spr/sync
@@ -390,7 +399,8 @@
               if (is_valid)
                 {
-//                reg_STATE                  [context_id] =  CONTEXT_STATE_KO_MISS_BRANCH_ADDR;
-                  reg_STATE                  [context_id] =  CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE;
-                  reg_EVENT_DEPTH            [context_id] =  depth;
+//                reg_STATE                  [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR;
+                  reg_STATE                  [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE;
+                  reg_EVENT_DEPTH            [context_id] = depth;
+                  reg_EVENT_FLUSH_ONLY       [context_id] = false;
                 }
             }
@@ -524,4 +534,5 @@
                 //reg_EVENT_IS_DS_TAKE       [context] = 0;
                   reg_EVENT_DEPTH            [context] = depth;
+                  reg_EVENT_FLUSH_ONLY       [context] = false;
                 }
             }
@@ -635,4 +646,5 @@
                 reg_EVENT_IS_DS_TAKE       [context] = 0;
                 reg_EVENT_DEPTH            [context] = depth;
+                reg_EVENT_FLUSH_ONLY       [context] = false;
               }
           }
@@ -679,4 +691,5 @@
         log_printf(TRACE,Context_State,FUNCTION,"    * reg_EVENT_IS_DS_TAKE       : %d"         ,reg_EVENT_IS_DS_TAKE       [i]);
         log_printf(TRACE,Context_State,FUNCTION,"    * reg_EVENT_DEPTH            : %d"         ,reg_EVENT_DEPTH            [i]);
+        log_printf(TRACE,Context_State,FUNCTION,"    * reg_EVENT_FLUSH_ONLY       : %d"         ,reg_EVENT_FLUSH_ONLY       [i]);
       }
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp	(revision 119)
@@ -63,4 +63,6 @@
     for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
       {
+        log_printf(TRACE,Decod,FUNCTION,"  * DECOD [%d]",i);    
+
 	while ((it != select->end())    and  // have a no scanned "slot_in" ?
 	       (decod_val [i] == false) and  // have not a previous selected entry?
@@ -72,10 +74,13 @@
 	    uint32_t   y = it->elt;
 
+            log_printf(TRACE,Decod,FUNCTION,"    * IFETCH [%d][%d]",x,y);    
+            log_printf(TRACE,Decod,FUNCTION,"      * in_IFETCH_VAL          : %d",PORT_READ(in_IFETCH_VAL [x][y]));
+            log_printf(TRACE,Decod,FUNCTION,"      * can_continue           : %d",can_continue [x]               );
+
 	    // Test if this instruction is valid
 	    if ((PORT_READ(in_IFETCH_VAL [x][y]) == 1) and // entry is valid
 		(can_continue [x]                == 1))    // context can decod instruction (have not a previous event)
 	      {
-                log_printf(TRACE,Decod,FUNCTION,"  * IFETCH [%d][%d]",x,y);    
-                log_printf(TRACE,Decod,FUNCTION,"    * decod_ack [%d] : %d",i,PORT_READ(in_DECOD_ACK [i]));
+                log_printf(TRACE,Decod,FUNCTION,"      * decod_ack              : %d",PORT_READ(in_DECOD_ACK [i]));
 
 		decod_val  [i]    = true;                        // fetch_val and decod_enable 
@@ -97,13 +102,10 @@
                   {
                     // Decod !
-                    log_printf(TRACE,Decod,FUNCTION,"  * DECOD [%d]",i);
-                    log_printf(TRACE,Decod,FUNCTION,"    * context       : %d",x);
-                    log_printf(TRACE,Decod,FUNCTION,"    * fetch         : %d",y);
-                    log_printf(TRACE,Decod,FUNCTION,"    * address       : %.8x (%.8x)",addr,(addr<<2));
-                    log_printf(TRACE,Decod,FUNCTION,"    * is_delay_slot : %d",internal_CONTEXT_IS_DELAY_SLOT [x]);
+                    log_printf(TRACE,Decod,FUNCTION,"      * address                : %.8x (%.8x)",addr,(addr<<2));
+                    log_printf(TRACE,Decod,FUNCTION,"      * is_delay_slot          : %d",internal_CONTEXT_IS_DELAY_SLOT [x]);
                     
                     instruction_decod (_decod_instruction, _decod_param[x]);
 
-                    log_printf(TRACE,Decod,FUNCTION,"    * address_next  : %.8x (%.8x)",_decod_instruction->_address_next,(_decod_instruction->_address_next<<2));
+                    log_printf(TRACE,Decod,FUNCTION,"      * address_next           : %.8x (%.8x)",_decod_instruction->_address_next,(_decod_instruction->_address_next<<2));
                   }
                 else
@@ -166,5 +168,5 @@
 
                 // Branch predictor can accept : the depth is valid
-                log_printf(TRACE,Decod,FUNCTION,"    * context_depth_val : %d",PORT_READ(in_CONTEXT_DEPTH_VAL [x]));
+                log_printf(TRACE,Decod,FUNCTION,"      * context_depth_val      : %d",PORT_READ(in_CONTEXT_DEPTH_VAL [x]));
                 decod_val   [i]    &= PORT_READ(in_CONTEXT_DEPTH_VAL [x]);
                 ifetch_ack  [x][y] &= PORT_READ(in_CONTEXT_DEPTH_VAL [x]);
@@ -172,10 +174,10 @@
 		if (type == TYPE_BRANCH)
 		  {
-		    log_printf(TRACE,Decod,FUNCTION,"    * type is branch");
-                    log_printf(TRACE,Decod,FUNCTION,"      * predict_val  : %d",ifetch_ack [x][y]);
-                    log_printf(TRACE,Decod,FUNCTION,"      * predict_ack  : %d",PORT_READ(in_PREDICT_ACK [i]));
-
-		    log_printf(TRACE,Decod,FUNCTION,"      * address src  : %.8x (%.8x)",_decod_instruction->_address     ,_decod_instruction->_address     <<2);
-		    log_printf(TRACE,Decod,FUNCTION,"      * address dest : %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2);
+		    log_printf(TRACE,Decod,FUNCTION,"      * Instruction is branch");
+                    log_printf(TRACE,Decod,FUNCTION,"        * predict_val       : %d",ifetch_ack [x][y]);
+                    log_printf(TRACE,Decod,FUNCTION,"        * predict_ack       : %d",PORT_READ(in_PREDICT_ACK [i]));
+                                                         
+		    log_printf(TRACE,Decod,FUNCTION,"        * address src       : %.8x (%.8x)",_decod_instruction->_address     ,_decod_instruction->_address     <<2);
+		    log_printf(TRACE,Decod,FUNCTION,"        * address dest      : %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2);
                     
                     // test if have already decod an branch : one branch per context
@@ -207,4 +209,7 @@
 		if (event_type != EVENT_TYPE_NONE)
 		  {
+		    log_printf(TRACE,Decod,FUNCTION,"      * Instruction make an EVENT (%s)",toString(event_type).c_str());
+                    log_printf(TRACE,Decod,FUNCTION,"        * context_event_ack : %d",PORT_READ(in_CONTEXT_EVENT_ACK));
+
 		    // speculative jump at the exception handler
 		    // if type = TYPE_BRANCH, also event_type == EVENT_TYPE_NONE
@@ -243,8 +248,8 @@
 
 	    log_printf(TRACE,Decod,FUNCTION,"    - num_(decod, context, fetch) : %d %d %d",i, x, y);
-	    log_printf(TRACE,Decod,FUNCTION,"      - ifetch_ack        : %d",ifetch_ack  [x][y]);
-	    log_printf(TRACE,Decod,FUNCTION,"      - context_event_val : %d",context_event_val );
-	    log_printf(TRACE,Decod,FUNCTION,"      - predict_val       : %d",predict_val [i]   );
-	    log_printf(TRACE,Decod,FUNCTION,"      - decod_val         : %d",decod_val   [i]   );
+	    log_printf(TRACE,Decod,FUNCTION,"      - ifetch_ack             : %d",ifetch_ack  [x][y]);
+	    log_printf(TRACE,Decod,FUNCTION,"      - context_event_val      : %d",context_event_val );
+	    log_printf(TRACE,Decod,FUNCTION,"      - predict_val            : %d",predict_val [i]   );
+	    log_printf(TRACE,Decod,FUNCTION,"      - decod_val              : %d",decod_val   [i]   );
 	    
 	    it ++;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/SelfTest/src/test.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/SelfTest/src/test.cpp	(revision 119)
@@ -87,4 +87,5 @@
   ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE                       ," in_EVENT_CONTEXT_STATE_TYPE                       ",Tevent_type_t,_param->_nb_context);
   ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH                      ," in_EVENT_CONTEXT_STATE_DEPTH                      ",Tdepth_t  ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY                 ," in_EVENT_CONTEXT_STATE_FLUSH_ONLY                 ",Tcontrol_t,_param->_nb_context);
 
   ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT                                  ,"out_DEPTH_CURRENT                                  ",Tdepth_t  ,_param->_nb_context);
@@ -161,4 +162,5 @@
   if (_param->_have_port_depth)
   INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_EVENT_CONTEXT_STATE_DEPTH                        ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_EVENT_CONTEXT_STATE_FLUSH_ONLY                   ,_param->_nb_context);
 
   INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_DEPTH_PREDICTION_UNIT_VAL                        ,_param->_nb_context);
@@ -273,4 +275,5 @@
   DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE                         ,_param->_nb_context);
   DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH                        ,_param->_nb_context);
+  DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY                   ,_param->_nb_context);
 
   DELETE1_SC_SIGNAL(out_DEPTH_MIN                                        ,_param->_nb_context);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/include/Front_end_Glue.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/include/Front_end_Glue.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/include/Front_end_Glue.h	(revision 119)
@@ -111,4 +111,5 @@
   public    : SC_IN (Tevent_type_t        )  **  in_EVENT_CONTEXT_STATE_TYPE                          ;//[nb_context]
   public    : SC_IN (Tdepth_t             )  **  in_EVENT_CONTEXT_STATE_DEPTH                         ;//[nb_context]
+  public    : SC_IN (Tcontrol_t           )  **  in_EVENT_CONTEXT_STATE_FLUSH_ONLY                    ;//[nb_context]
 
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	      
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue.cpp	(revision 119)
@@ -147,5 +147,7 @@
                       << (*( in_EVENT_CONTEXT_STATE_ADDRESS_NEXT_VAL [i]))
                       << (*( in_EVENT_CONTEXT_STATE_IS_DS_TAKE       [i]))
-                      << (*( in_EVENT_CONTEXT_STATE_TYPE             [i]));
+                      << (*( in_EVENT_CONTEXT_STATE_TYPE             [i]))
+                      << (*( in_EVENT_CONTEXT_STATE_FLUSH_ONLY       [i]))
+              ;
             if (_param->_have_port_depth)
             sensitive << (*( in_EVENT_CONTEXT_STATE_DEPTH            [i]));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_allocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_allocation.cpp	(revision 119)
@@ -125,4 +125,5 @@
       ALLOC1_SIGNAL_IN  ( in_EVENT_CONTEXT_STATE_TYPE                          ,"CONTEXT_STATE_TYPE"            ,Tevent_type_t        ,_param->_size_event_type);
       ALLOC1_SIGNAL_IN  ( in_EVENT_CONTEXT_STATE_DEPTH                         ,"CONTEXT_STATE_DEPTH"           ,Tdepth_t             ,_param->_size_depth);
+      ALLOC1_SIGNAL_IN  ( in_EVENT_CONTEXT_STATE_FLUSH_ONLY                    ,"CONTEXT_STATE_FLUSH_ONLY"      ,Tcontrol_t           ,1);
 
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_deallocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_deallocation.cpp	(revision 119)
@@ -69,4 +69,5 @@
         DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE                         ,_param->_nb_context,_param->_size_event_type);
         DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH                        ,_param->_nb_context,_param->_size_depth);
+        DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY                   ,_param->_nb_context,1);
         
         DELETE1_SIGNAL(out_DEPTH_MIN                                        ,_param->_nb_context,_param->_size_depth);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_genMealy_event.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_genMealy_event.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_genMealy_event.cpp	(revision 119)
@@ -49,4 +49,5 @@
         PORT_WRITE(out_EVENT_PREDICTION_UNIT_DEPTH [i],depth);
           }
+        Tcontrol_t    flush_only = PORT_READ(in_EVENT_CONTEXT_STATE_FLUSH_ONLY [i]);
         
 
@@ -56,19 +57,39 @@
         Tcontrol_t context_state_val   = PORT_READ(in_EVENT_CONTEXT_STATE_VAL   [i]);
 
-        Tcontrol_t val                 = (//ack                 and
+        Tcontrol_t val                 = (  not flush_only      and
+                                          //ack                 and
                                             ifetch_unit_ack     and
                                             prediction_unit_ack and
-                                            context_state_val   
+                                            context_state_val
+                                          
                                           );
-        Tcontrol_t ifetch_unit_val     = (  ack                 and
+//         Tcontrol_t ifetch_unit_val     = (  ack                 and
+//                                           //ifetch_unit_ack     and
+//                                             prediction_unit_ack and
+//                                             context_state_val   
+//                                             );
+        Tcontrol_t ifetch_unit_val     = (  (
+                                             flush_only or
+                                             ack              ) and
                                           //ifetch_unit_ack     and
                                             prediction_unit_ack and
-                                            context_state_val   
+                                            context_state_val
                                             );
-        Tcontrol_t prediction_unit_val = (  ack                 and
+
+//         Tcontrol_t prediction_unit_val = (  ack                 and
+//                                             ifetch_unit_ack     and
+//                                           //prediction_unit_ack and
+//                                             context_state_val   
+//                                             );
+
+        Tcontrol_t prediction_unit_val = (  (
+                                             flush_only or
+                                             ack              ) and
                                             ifetch_unit_ack     and
                                           //prediction_unit_ack and
-                                            context_state_val   
+                                            context_state_val
                                             );
+
+
         Tcontrol_t context_state_ack   = (  ack                 and
                                             ifetch_unit_ack     and
@@ -97,4 +118,5 @@
             log_printf(TRACE,Front_end_Glue,FUNCTION,"    * address_next_val : %d",address_next_val);
             log_printf(TRACE,Front_end_Glue,FUNCTION,"    * is_ds_take       : %d",is_ds_take      );
+            log_printf(TRACE,Front_end_Glue,FUNCTION,"    * flush_only       : %d",flush_only      );
           }
         else
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp	(revision 119)
@@ -189,5 +189,5 @@
 	    reg_PC_NEXT_IS_DS_TAKE                  = PORT_READ(in_EVENT_IS_DS_TAKE);
 // 	    reg_PC_NEXT_INST_IFETCH_PTR             = 0;
-// 	    reg_PC_NEXT_BRANCH_STATE                = BRANCH_STATE_NONE;
+	    reg_PC_NEXT_BRANCH_STATE                = BRANCH_STATE_NONE;
 // 	    reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0;
 	    
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp	(revision 119)
@@ -26,29 +26,33 @@
     // =====[ ADDRESS ]==========================================
     // ==========================================================
-    internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY);
-
-    PORT_WRITE(out_ADDRESS_ACK            , internal_ADDRESS_ACK);
-    if (_param->_have_port_ifetch_queue_ptr)
-    PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE);
+    {
+      internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY);
+      
+      PORT_WRITE(out_ADDRESS_ACK            , internal_ADDRESS_ACK);
+      if (_param->_have_port_ifetch_queue_ptr)
+      PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE);
+    }
 
     // ==========================================================
     // =====[ DECOD ]============================================
     // ==========================================================
-    bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP);
-
-    for (uint32_t i=0; i<_param->_nb_instruction; i++)
-      {
-	internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i];
-	PORT_WRITE(out_DECOD_VAL         [i], internal_DECOD_VAL [i]);
-	PORT_WRITE(out_DECOD_INSTRUCTION [i],         _queue[reg_PTR_READ]->_instruction        [i]);
-      }
-
-    PORT_WRITE(out_DECOD_ADDRESS                    , _queue[reg_PTR_READ]->_address                    );
-    if (_param->_have_port_inst_ifetch_ptr)
-    PORT_WRITE(out_DECOD_INST_IFETCH_PTR            , _queue[reg_PTR_READ]->_inst_ifetch_ptr            );
-    PORT_WRITE(out_DECOD_BRANCH_STATE               , _queue[reg_PTR_READ]->_branch_state               );
-    if (_param->_have_port_depth)
-    PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id);
-    PORT_WRITE(out_DECOD_EXCEPTION                  , _queue[reg_PTR_READ]->_exception                  );
+    {
+      bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP);
+      
+      for (uint32_t i=0; i<_param->_nb_instruction; i++)
+        {
+          internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i];
+          PORT_WRITE(out_DECOD_VAL         [i], internal_DECOD_VAL [i]);
+          PORT_WRITE(out_DECOD_INSTRUCTION [i],         _queue[reg_PTR_READ]->_instruction        [i]);
+        }
+      
+      PORT_WRITE(out_DECOD_ADDRESS                    , _queue[reg_PTR_READ]->_address                    );
+      if (_param->_have_port_inst_ifetch_ptr)
+      PORT_WRITE(out_DECOD_INST_IFETCH_PTR            , _queue[reg_PTR_READ]->_inst_ifetch_ptr            );
+      PORT_WRITE(out_DECOD_BRANCH_STATE               , _queue[reg_PTR_READ]->_branch_state               );
+      if (_param->_have_port_depth)
+      PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id);
+      PORT_WRITE(out_DECOD_EXCEPTION                  , _queue[reg_PTR_READ]->_exception                  );
+    }
 
     log_printf(FUNC,Ifetch_queue,FUNCTION,"End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp	(revision 119)
@@ -23,4 +23,5 @@
   {
     log_begin(Ifetch_queue,FUNCTION);
+    log_function(Ifetch_queue,FUNCTION,_name.c_str());
 
     if (PORT_READ(in_NRESET) == 0)
@@ -39,4 +40,8 @@
 	if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK)
 	  {
+	    log_printf(TRACE,Ifetch_queue,FUNCTION,"  * ADDRESS : Transaction");
+	    log_printf(TRACE,Ifetch_queue,FUNCTION,"    * reg_PTR_WRITE : %d",reg_PTR_WRITE);
+            log_printf(TRACE,Ifetch_queue,FUNCTION,"    * ADDRESS       : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS));
+
 	    // New slot in ifetch_queue is allocated
 	    
@@ -75,4 +80,6 @@
 	    if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i]))
 	      {
+                log_printf(TRACE,Ifetch_queue,FUNCTION,"  * DECOD [%d] : Transaction",i);
+
 		have_instruction_decod = true;
 		_queue[reg_PTR_READ]->_instruction_enable [i] = false;
@@ -94,4 +101,6 @@
 	if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK)
 	  {
+	    log_printf(TRACE,Ifetch_queue,FUNCTION,"  * ICACHE_RSP : Transaction");
+
 	    Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0;
 	    
@@ -119,4 +128,6 @@
 	if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK)
 	  {
+	    log_printf(TRACE,Ifetch_queue,FUNCTION,"  * EVENT_RESET : Transaction");
+
 	    // Scan all entry of queue and test the status
 	    for (uint32_t i=0; i<_param->_size_queue; i++)
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp	(revision 119)
@@ -1,2 +1,3 @@
+
 #ifdef SYSTEMC
 /*
@@ -8,4 +9,5 @@
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h"
+// #include <assert.h>
 
 namespace morpheo                    {
@@ -46,4 +48,9 @@
             {
               Thistory_t bht_num_reg = address & _param->_bht_address_mask;
+
+// #ifdef DEBUG_TEST
+//               assert(bht_num_reg < _param->_bht_nb_shifter);
+// #endif
+
               Thistory_t bht_history = reg_BHT [bht_num_reg];
               pht_bht_history = bht_history;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp	(revision 119)
@@ -8,4 +8,5 @@
 
 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h"
+// #include <assert.h>
 
 namespace morpheo                    {
@@ -53,4 +54,8 @@
                         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht_num_reg      : %d",bht_num_reg);
 
+// #ifdef DEBUG_TEST
+//                         assert(bht_num_reg < _param->_bht_nb_shifter);
+// #endif
+
                         Thistory_t bht_history = reg_BHT[bht_num_reg];
                         log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * bht_history (old): %x",bht_history);
@@ -135,4 +140,9 @@
                       pht_bht_history = bht_history;
                       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"    * bht_history (new): %x",bht_history);
+
+// #ifdef DEBUG_TEST
+//                         assert(bht_num_reg < _param->_bht_nb_shifter);
+// #endif
+
                       reg_BHT [bht_num_reg]               = bht_history;
                     }
@@ -170,5 +180,6 @@
 
 #if defined(DEBUG) and DEBUG_Two_Level_Branch_Predictor and (DEBUG >= DEBUG_TRACE)
-    if (1)
+
+# if 0
     {
       log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION,"  * Dump Two_Level_Branch_Predictor");
@@ -190,5 +201,7 @@
                     break;
                   else
-                    str+=toString("[%.4d] %.4x ",index,reg_BHT[index]);
+                    {
+                      str+=toString("[%.4d] %.4x ",index,reg_BHT[index]);
+                    }
                 }
               
@@ -232,4 +245,5 @@
         }
     }
+# endif
 #endif
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp	(revision 119)
@@ -94,4 +94,5 @@
   ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL      ,"out_BRANCH_EVENT_ADDRESS_DEST_VAL      ",Tcontrol_t         ,_param->_nb_context);
   ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST          ,"out_BRANCH_EVENT_ADDRESS_DEST          ",Taddress_t         ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE          ,"out_BRANCH_EVENT_CAN_CONTINUE          ",Tcontrol_t         ,_param->_nb_context);
 												                         
   ALLOC1_SC_SIGNAL( in_EVENT_VAL                          ," in_EVENT_VAL                          ",Tcontrol_t         ,_param->_nb_context);
@@ -165,4 +166,5 @@
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST_VAL      ,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST          ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_CAN_CONTINUE          ,_param->_nb_context);
 
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_EVENT_VAL                          ,_param->_nb_context);
@@ -373,4 +375,5 @@
   DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context);
   DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST     ,_param->_nb_context);
+  DELETE1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE     ,_param->_nb_context);
 
   DELETE1_SC_SIGNAL( in_EVENT_VAL                      ,_param->_nb_context);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp	(revision 119)
@@ -120,4 +120,5 @@
   ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL,"out_BRANCH_EVENT_ADDRESS_DEST_VAL",Tcontrol_t         ,_param->_nb_context);
   ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST   ,"out_BRANCH_EVENT_ADDRESS_DEST   ",Taddress_t         ,_param->_nb_context);
+  ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE   ,"out_BRANCH_EVENT_CAN_CONTINUE"   ,Tcontrol_t         ,_param->_nb_context);
 
   ALLOC1_SC_SIGNAL(out_UPDATE_VAL                     ,"out_UPDATE_VAL                     ",Tcontrol_t         ,_param->_nb_inst_update);
@@ -216,4 +217,5 @@
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_ADDRESS_DEST_VAL,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_ADDRESS_DEST   ,_param->_nb_context);
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_CAN_CONTINUE   ,_param->_nb_context);
 
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_VAL                     ,_param->_nb_inst_update);
@@ -948,4 +950,5 @@
                     if (event.take)
                     TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST     [port]->read(),event.address_good);
+                    TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE     [port]->read(),not event.miss_commit);
 
                     event.address_src  = 0;
@@ -1392,4 +1395,5 @@
                     if (event.take)
                     TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST     [port]->read(),event.address_good);
+                    TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE     [port]->read(),not event.miss_commit);
 
                     event.address_src  = 0;
@@ -2022,4 +2026,5 @@
                       if (event.take_good)
                       TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST     [port]->read(),event.address_good);
+                      TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE     [port]->read(),not event.miss_commit);
                       
                       event.address_src  = 0;
@@ -2681,5 +2686,6 @@
                       if (event.take_good)
                       TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST     [port]->read(),event.address_good);
-                      
+                      TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE     [port]->read(),not event.miss_commit);
+
                       event.address_src  = 0;
                       event.take         = 0;
@@ -2860,4 +2866,5 @@
   delete [] out_BRANCH_EVENT_ADDRESS_DEST_VAL;
   delete [] out_BRANCH_EVENT_ADDRESS_DEST   ;
+  delete [] out_BRANCH_EVENT_CAN_CONTINUE   ;
   
   // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h	(revision 119)
@@ -72,4 +72,5 @@
   public : Tptr_t              _index_ras        ;
 //public : Tcontrol_t          _ifetch_prediction;
+//public : Tcontrol_t          _miss_commit      ;
   };
 
@@ -87,4 +88,5 @@
   public : Tptr_t              _index_ras        ;
   public : Tcontrol_t          _ifetch_prediction; // not in ufpt
+  public : Tcontrol_t          _miss_commit      ; // not in ufpt
 
     // to branchement_log_file
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h	(revision 119)
@@ -125,4 +125,5 @@
   public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST_VAL  ; //[nb_context]
   public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST      ; //[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_CAN_CONTINUE      ; //[nb_context]
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -193,4 +194,5 @@
   private   : Tcontrol_t                    * reg_EVENT_ADDRESS_DEST_VAL         ; //[nb_context] // if miss ifetch, decod issue branch, dest must be reload
   private   : Taddress_t                    * reg_EVENT_ADDRESS_DEST             ; //[nb_context] // Address dest
+  private   : bool                          * reg_EVENT_CAN_CONTINUE             ; //[nb_context]
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp	(revision 119)
@@ -129,4 +129,5 @@
       ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val",Tcontrol_t,1);
       ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST     ,"address_dest"    ,Taddress_t,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_CAN_CONTINUE     ,"can_continue"    ,Tcontrol_t,1);
 
       ALLOC1_INTERFACE_END(_param->_nb_context);
@@ -232,4 +233,5 @@
     ALLOC1(reg_EVENT_ADDRESS_DEST_VAL       ,Tcontrol_t    ,_param->_nb_context);
     ALLOC1(reg_EVENT_ADDRESS_DEST           ,Taddress_t    ,_param->_nb_context);
+    ALLOC1(reg_EVENT_CAN_CONTINUE           ,Tcontrol_t    ,_param->_nb_context);
       }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp	(revision 119)
@@ -81,4 +81,5 @@
         DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context,1);
         DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST     ,_param->_nb_context,_param->_size_instruction_address);
+        DELETE1_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE     ,_param->_nb_context,1);
 
         // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -160,4 +161,5 @@
         DELETE1(reg_EVENT_ADDRESS_DEST_VAL       ,_param->_nb_context);
         DELETE1(reg_EVENT_ADDRESS_DEST           ,_param->_nb_context);
+        DELETE1(reg_EVENT_CAN_CONTINUE           ,_param->_nb_context);
        }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp	(revision 119)
@@ -287,5 +287,6 @@
         PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST_VAL [i],reg_EVENT_ADDRESS_DEST_VAL [i]);
         PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST     [i],reg_EVENT_ADDRESS_DEST     [i]);
-
+        PORT_WRITE(out_BRANCH_EVENT_CAN_CONTINUE     [i],reg_EVENT_CAN_CONTINUE     [i]);
+        
 	internal_BRANCH_EVENT_VAL [i] = val;
       }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp	(revision 119)
@@ -249,5 +249,5 @@
               Taddress_t          address_src   = PORT_READ(in_DECOD_BTB_ADDRESS_SRC  [i]);
               Taddress_t          address_dest  = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]);
-              Tcontrol_t          last_take     = PORT_READ(in_DECOD_BTB_LAST_TAKE    [i]);
+              Tcontrol_t          direction     = PORT_READ(in_DECOD_BTB_LAST_TAKE    [i]);
 
               log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * DECOD[%d] - Accepted",i);
@@ -259,39 +259,61 @@
               if (miss_ifetch or miss_decod)
 		{
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss !!!");
+
                   // Have a miss !!!
+                  condition   = PORT_READ(in_DECOD_BTB_CONDITION [i]);
+                  is_accurate = PORT_READ(in_DECOD_IS_ACCURATE   [i]);
+
+                  // if can_continue else don't wait the end of all instruction
+                  // can_continue = not miss_commit and the destination is accurate (know)
+                  Tcontrol_t can_continue = is_accurate;
+
 #ifdef DEBUG_TEST
                   if (reg_EVENT_STATE [context] != EVENT_STATE_OK)
                     throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state."));
 #endif
-                  if (reg_UFPT_NB_NEED_UPDATE [context] == 0)
+
+                  // miss_ifetch = branch is previously predict, but it's not the good
+                  //   * need flush ufpt
+                  // miss_decod  = branch was not detected
+                  //   * not necessary
+
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * can_continue: %d",can_continue);
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * direction   : %d",direction   );
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * miss_ifetch : %d",miss_ifetch );
+                  log_printf(TRACE,Update_Prediction_Table,FUNCTION,"      * change    : %d",(not (can_continue and not direction and not miss_ifetch)));
+
+                  // if can_continue (destination is know) and direction is not take, don't need flush fetch_unit.
+                  if (not (can_continue and not direction and not miss_ifetch))
                     {
-                      // Change state
-                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context);
-                      reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT;
-//                       reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT;
+                      if (reg_UFPT_NB_NEED_UPDATE [context] == 0)
+                        {
+                          // Change state
+                          log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context);
+                          reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT;
+//                        reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT;
+                        }
+                      else
+                        {
+                          log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context);
+                          reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT;
+                        }
+
+                      // Flush UPFT
+                      flush_UFPT [context] = true;
+
+                      reg_EVENT_IS_BRANCH       [context] = true;
+                      reg_EVENT_DEPTH           [context] = upt_ptr_write;
+                      reg_EVENT_ADDRESS_SRC     [context] = address_src; // delay_slot is compute in Context_State
+                      reg_EVENT_ADDRESS_DEST_VAL[context] = direction;
+                      reg_EVENT_ADDRESS_DEST    [context] = address_dest;
+                      reg_EVENT_CAN_CONTINUE    [context] = can_continue;
                     }
-                  else
-                    {
-                      log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context);
-                      reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT;
-                    }
-
-                  // Flush UPFT
-                  flush_UFPT [context] = true;
-
-                  reg_EVENT_IS_BRANCH       [context] = true;
-                  reg_EVENT_DEPTH           [context] = upt_ptr_write;
-                  reg_EVENT_ADDRESS_SRC     [context] = address_src; // delay_slot is compute in Context_State
-                  reg_EVENT_ADDRESS_DEST_VAL[context] = last_take;
-                  reg_EVENT_ADDRESS_DEST    [context] = address_dest;
-
+                  
                   // Push upt (from decod interface)
-                  condition   = PORT_READ(in_DECOD_BTB_CONDITION [i]);
-                  is_accurate = PORT_READ(in_DECOD_IS_ACCURATE   [i]);
-
                   reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition         = condition;
                   reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src       = address_src ;
                   reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest      = address_dest;
-                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take         = last_take   ;
+                  reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take         = direction   ;
 //                reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take;
                   reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate       = is_accurate;
@@ -336,5 +358,4 @@
                       reg_UFPT_NB_NEED_UPDATE [context] --;
                       log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]);
-
                     }
 		}
@@ -349,5 +370,6 @@
               log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write);
               reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END;
-              reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false;
+              reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok   = false;
+              reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._miss_commit = false;
 
               // Write new accurate 
@@ -356,4 +378,7 @@
                 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag."));
 #endif
+
+              log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * is_accurate : %d",is_accurate);
+
               reg_IS_ACCURATE [context] = is_accurate;
               
@@ -728,5 +753,8 @@
                       reg_EVENT_ADDRESS_DEST_VAL[context] = good_take;
                       reg_EVENT_ADDRESS_DEST    [context] = good_addr;
+                      reg_EVENT_CAN_CONTINUE    [context] = false;
+
                     }
+                  reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_commit = true;
                 }
 	      else
@@ -770,9 +798,8 @@
 
               // if different : an other branch is occured
-              if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT)
+              if (reg_EVENT_STATE        [i] == EVENT_STATE_UPDATE_CONTEXT)
                 {
                   // Change state
                   log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i);
-                  
                   reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT;
                 }
@@ -809,25 +836,28 @@
                   {
                     log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * type  : EVENT_TYPE_BRANCH_MISS_SPECULATION");
+
+// #ifdef DEBUG_TEST
+//                     if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT)
+//                       throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state."));
+// #endif
+                    // Special case : test if event and branch_complete !
+                    if (reg_EVENT_STATE [i] == EVENT_STATE_WAIT_END_EVENT)
+                      {
                     
-#ifdef DEBUG_TEST
-                    if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT)
-                      throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state."));
-#endif
-                    
-                    // Change state
-                    log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_OK (event)",i);
-                    
-                    reg_EVENT_STATE [i] = EVENT_STATE_OK;
-                    reg_IS_ACCURATE [i] = true;
-
-                    Tdepth_t depth = reg_EVENT_UPT_PTR [i];
-
-                    if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO)
-                      {
-                        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth);
+                        // Change state
+                        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * EVENT [%d] <- EVENT_STATE_OK (event)",i);
                         
-                        reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END;
-                      }
-
+                        reg_EVENT_STATE [i] = EVENT_STATE_OK;
+                        reg_IS_ACCURATE [i] = true;
+                        
+                        Tdepth_t depth = reg_EVENT_UPT_PTR [i];
+                        
+                        if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO)
+                          {
+                            log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * UPT  [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth);
+                            
+                            reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END;
+                          }
+                        
 #ifdef DEBUG_TEST
 //                     if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END)
@@ -840,5 +870,5 @@
                     
 //                     reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO;
-                    
+                      }
                     break;
                   }
@@ -1191,4 +1221,5 @@
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST_VAL: %d"  ,reg_EVENT_ADDRESS_DEST_VAL[i]);
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_ADDRESS_DEST    : %.8x (%.8x)",reg_EVENT_ADDRESS_DEST    [i],reg_EVENT_ADDRESS_DEST    [i]<<2);
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * reg_EVENT_CAN_CONTINUE    : %d"  ,reg_EVENT_CAN_CONTINUE    [i]);
 
 	log_printf(TRACE,Update_Prediction_Table,FUNCTION,"    * Update_Fetch_Prediction_Table   [%d]",i);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h	(revision 119)
@@ -114,4 +114,5 @@
   public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST_VAL       ; //[nb_context]
   public    : SC_OUT(Taddress_t         )  ** out_BRANCH_EVENT_ADDRESS_DEST           ; //[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_BRANCH_EVENT_CAN_CONTINUE           ; //[nb_context]
 
     // ~~~~~[ Interface : "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp	(revision 119)
@@ -132,4 +132,5 @@
       ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val",Tcontrol_t,1);
       ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST     ,"address_dest"    ,Taddress_t,_param->_size_address);
+      ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_CAN_CONTINUE     ,"can_continue"    ,Tcontrol_t,1);
 
       ALLOC1_INTERFACE_END(_param->_nb_context);
@@ -725,4 +726,5 @@
 	  PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST_VAL",dest,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST_VAL");
 	  PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST"    ,dest,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST"    );
+	  PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE"    ,dest,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE"    );
 	}
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp	(revision 119)
@@ -71,4 +71,5 @@
         DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context,1);
         DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST     ,_param->_nb_context,_param->_size_instruction_address);
+        DELETE1_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE     ,_param->_nb_context,1);
 
         DELETE1_SIGNAL( in_EVENT_VAL    ,_param->_nb_context,1);
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp	(revision 119)
@@ -610,4 +610,6 @@
           COMPONENT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST"    ,
                                    dest, "in_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST"    );
+          COMPONENT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE"    ,
+                                   dest, "in_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE"    );
         }
 
@@ -1045,4 +1047,6 @@
           COMPONENT_MAP(_component,src ,"out_EVENT_"+toString(i)+              "_DEPTH"           ,
                                    dest, "in_EVENT_"+toString(i)+"_CONTEXT_STATE_DEPTH"           );
+          COMPONENT_MAP(_component,src ,"out_EVENT_"+toString(i)+              "_FLUSH_ONLY"      ,
+                                   dest, "in_EVENT_"+toString(i)+"_CONTEXT_STATE_FLUSH_ONLY"      );
         }
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp	(revision 119)
@@ -29,5 +29,5 @@
 
     uint32_t           bank_nb_access    [_param->_nb_bank];
-    Tcontrol_t         commit_ack        [_param->_nb_inst_commit];
+    uint32_t           commit_ack        [_param->_nb_inst_commit];
 
     // Initialisation
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h	(revision 118)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h	(revision 119)
@@ -10,8 +10,8 @@
 #define MORPHEO_MAJOR_VERSION "0"
 #define MORPHEO_MINOR_VERSION "2"
-#define MORPHEO_REVISION      "118"
+#define MORPHEO_REVISION      "119"
 #define MORPHEO_CODENAME      "Castor"
 
-#define MORPHEO_DATE_DAY      "20"  
+#define MORPHEO_DATE_DAY      "25"  
 #define MORPHEO_DATE_MONTH    "05"
 #define MORPHEO_DATE_YEAR     "2009" 
