Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 119)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp	(revision 122)
@@ -275,10 +275,14 @@
 		  // =======================
 		  
-		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue [%d]",reg_STORE_QUEUE_PTR_READ);
+		  log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue [%d]",internal_MEMORY_OUT_PTR);
 	    
 		  // Entry flush and increase the read pointer
-		  _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_EMPTY;
-		  
-		  reg_STORE_QUEUE_PTR_READ = (reg_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue;
+		  if (_store_queue [internal_MEMORY_OUT_PTR]._send_commit)
+		    {
+		      _store_queue [internal_MEMORY_OUT_PTR]._state = STORE_QUEUE_EMPTY;
+		      reg_STORE_QUEUE_PTR_READ = (reg_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue;
+		    }
+		  else
+		    _store_queue [internal_MEMORY_OUT_PTR]._send_commit = true;
 
 		  break;
@@ -339,19 +343,21 @@
 	  {
             // Get an index from load queue
-	    uint32_t index_load = (i + reg_LOAD_QUEUE_CHECK_PRIORITY)%_param->_size_load_queue;
+	    uint32_t index_load_queue = (i + reg_LOAD_QUEUE_CHECK_PRIORITY)%_param->_size_load_queue;
 
             // Test if this load must ckecked store queue
-	    if (((_load_queue[index_load]._state == LOAD_QUEUE_WAIT_CHECK) or
-		 (_load_queue[index_load]._state == LOAD_QUEUE_COMMIT_CHECK) or
-		 (_load_queue[index_load]._state == LOAD_QUEUE_CHECK)) and
-		is_operation_memory_load(_load_queue[index_load]._operation))
+	    if (((_load_queue[index_load_queue]._state == LOAD_QUEUE_WAIT_CHECK) or
+		 (_load_queue[index_load_queue]._state == LOAD_QUEUE_COMMIT_CHECK) or
+		 (_load_queue[index_load_queue]._state == LOAD_QUEUE_CHECK)) and
+		is_operation_memory_load(_load_queue[index_load_queue]._operation))
 	      {
-		log_printf(TRACE,Load_store_unit,FUNCTION,"    * Find a load : %d",index_load);
+		log_printf(TRACE,Load_store_unit,FUNCTION,"    * Find a load : %d",index_load_queue);
 
 		nb_check++; // use one port
 
 		// find a entry that it need a check
-		Tlsq_ptr_t index_store     = _load_queue[index_load]._store_queue_ptr_write;
-// 		Tlsq_ptr_t index_store_old = index_store;
+		Tlsq_ptr_t store_queue_ptr_write = _load_queue[index_load_queue]._store_queue_ptr_write;
+		Tlsq_ptr_t store_queue_ptr_read  = _load_queue[index_load_queue]._store_queue_ptr_read ;
+ 		Tlsq_ptr_t store_queue_empty     = _load_queue[index_load_queue]._store_queue_empty    ;
+// 		Tlsq_ptr_t store_queue_ptr_write_old = store_queue_ptr_write;
 
                 // Init variable
@@ -365,10 +371,14 @@
 		//  * when a store is out of store queue, also it was in head of re order buffer. Also, they are none previous load.
 
-		log_printf(TRACE,Load_store_unit,FUNCTION,"    * index_store : %d",index_store);
-		log_printf(TRACE,Load_store_unit,FUNCTION,"    * ptr_read    : %d",reg_STORE_QUEUE_PTR_READ);
-
-		if (index_store == reg_STORE_QUEUE_PTR_READ)
+		log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue_ptr_write    : %d",store_queue_ptr_write);
+		log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue_ptr_read     : %d",store_queue_ptr_read );
+// 		log_printf(TRACE,Load_store_unit,FUNCTION,"    * store_queue_empty        : %d",store_queue_empty );
+		log_printf(TRACE,Load_store_unit,FUNCTION,"    * reg_STORE_QUEUE_PTR_READ : %d",reg_STORE_QUEUE_PTR_READ);
+
+ 		if ((store_queue_ptr_write ==     store_queue_ptr_read) or
+		    (store_queue_ptr_write == reg_STORE_QUEUE_PTR_READ))
+// 		if (store_queue_empty)
 		  {
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * index_store == reg_STORE_QUEUE_PTR_READ");
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_ptr_write == store_queue_ptr_read");
 		    end_check    = true;
 		    change_state = true;
@@ -376,12 +386,12 @@
 		else
 		  {
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * index_store != reg_STORE_QUEUE_PTR_READ");
-
-		    index_store = (index_store-1)%(_param->_size_store_queue); // store_queue_ptr_write target the next slot to write, also the slot is not significatif when the load is renaming
-
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * index_store : %d",index_store);
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_ptr_write != store_queue_ptr_read");
+
+		    store_queue_ptr_write = (store_queue_ptr_write-1)%(_param->_size_store_queue); // store_queue_ptr_write target the next slot to write, also the slot is not significatif when the load is renaming
+
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_ptr_write : %d",store_queue_ptr_write);
 		    
                     // switch on store_queue state
-		    switch (_store_queue[index_store]._state)
+		    switch (_store_queue[store_queue_ptr_write]._state)
 		      {
 		      case STORE_QUEUE_VALID_NO_SPECULATIVE : 
@@ -397,9 +407,9 @@
 			  // Test thread id
 			  if (_param->_have_port_context_id)
-			    test_thread_id &= (_load_queue[index_load]._context_id    == _store_queue[index_store]._context_id);
+			    test_thread_id &= (_load_queue[index_load_queue]._context_id    == _store_queue[store_queue_ptr_write]._context_id);
 			  if (_param->_have_port_front_end_id)
-			    test_thread_id &= (_load_queue[index_load]._front_end_id  == _store_queue[index_store]._front_end_id);
+			    test_thread_id &= (_load_queue[index_load_queue]._front_end_id  == _store_queue[store_queue_ptr_write]._front_end_id);
 			  if (_param->_have_port_ooo_engine_id)
-			    test_thread_id &= (_load_queue[index_load]._ooo_engine_id == _store_queue[index_store]._ooo_engine_id);
+			    test_thread_id &= (_load_queue[index_load_queue]._ooo_engine_id == _store_queue[store_queue_ptr_write]._ooo_engine_id);
 			  
 			  if (test_thread_id)
@@ -408,6 +418,6 @@
 
 			      log_printf(TRACE,Load_store_unit,FUNCTION,"        * load and store is the same thread.");
-			      Tdcache_address_t load_addr  = _load_queue [index_load ]._address;
-			      Tdcache_address_t store_addr = _store_queue[index_store]._address;
+			      Tdcache_address_t load_addr  = _load_queue [index_load_queue ]._address;
+			      Tdcache_address_t store_addr = _store_queue[store_queue_ptr_write]._address;
 			      
 			      log_printf(TRACE,Load_store_unit,FUNCTION,"          * load_addr                     : %.8x.",load_addr );
@@ -435,10 +445,10 @@
                                   bool is_big_endian = true;
 
-				  Tgeneral_data_t   load_data      = _load_queue [index_load ]._rdata  ;
-				  Tgeneral_data_t   store_data     = _store_queue[index_store]._wdata  ;
-                                  Tdcache_address_t check_hit_byte = _load_queue [index_load ]._check_hit_byte;
-                                  Tcontrol_t        check_hit      = _load_queue [index_load ]._check_hit;
-                                  uint32_t          load_size_access  = memory_size(_load_queue [index_load ]._operation)>>3;
-                                  uint32_t          store_size_access = memory_size(_store_queue[index_store]._operation)>>3;
+				  Tgeneral_data_t   load_data      = _load_queue [index_load_queue ]._rdata  ;
+				  Tgeneral_data_t   store_data     = _store_queue[store_queue_ptr_write]._wdata  ;
+                                  Tdcache_address_t check_hit_byte = _load_queue [index_load_queue ]._check_hit_byte;
+                                  Tcontrol_t        check_hit      = _load_queue [index_load_queue ]._check_hit;
+                                  uint32_t          load_size_access  = memory_size(_load_queue [index_load_queue ]._operation)>>3;
+                                  uint32_t          store_size_access = memory_size(_store_queue[store_queue_ptr_write]._operation)>>3;
 
                                   log_printf(TRACE,Load_store_unit,FUNCTION,"            * is_big_endian           : %d",is_big_endian);
@@ -464,5 +474,5 @@
                                     }
 
-                                  uint32_t store_nb_byte     = (1<<memory_access(_store_queue[index_store]._operation));
+                                  uint32_t store_nb_byte     = (1<<memory_access(_store_queue[store_queue_ptr_write]._operation));
 
                                   // Take interval to the store
@@ -473,5 +483,5 @@
 				  log_printf(TRACE,Load_store_unit,FUNCTION,"            * store_num_byte_max      : %d",store_num_byte_max);
 
-//                                   uint32_t load_nb_byte      = (1<<memory_access(_load_queue[index_load]._operation));
+//                                   uint32_t load_nb_byte      = (1<<memory_access(_load_queue[index_load_queue]._operation));
 
 // 				  uint32_t load_num_byte_min = (load_addr & _param->_mask_address_lsb);
@@ -517,5 +527,5 @@
 
 //                                           // store duplicate = all store access can be see as full size_data store
-// //                                           uint32_t load_nb_byte = (1<<memory_access(_load_queue [index_load ]._operation));
+// //                                           uint32_t load_nb_byte = (1<<memory_access(_load_queue [index_load_queue ]._operation));
 
 // //                                           int32_t diff = ((_param->_size_general_data>>3)+load_nb_byte-2*load_nb_byte*((num_store_byte/load_nb_byte)+1));
@@ -597,7 +607,7 @@
                                     }
 
-				  _load_queue[index_load]._rdata          = load_data;
-                                  _load_queue[index_load]._check_hit_byte = check_hit_byte;
-                                  _load_queue[index_load]._check_hit      = check_hit;
+				  _load_queue[index_load_queue]._rdata          = load_data;
+                                  _load_queue[index_load_queue]._check_hit_byte = check_hit_byte;
+                                  _load_queue[index_load_queue]._check_hit      = check_hit;
 
 				  log_printf(TRACE,Load_store_unit,FUNCTION,"            * load_data  (after) : 0x%.8x",load_data);
@@ -609,5 +619,5 @@
 				  log_printf(TRACE,Load_store_unit,FUNCTION,"            * mask_check_hit_byte: %x",_param->_mask_check_hit_byte);
 				  // The check is finish if all bit is set
-				  end_check = (_load_queue[index_load]._check_hit_byte == _param->_mask_check_hit_byte);
+				  end_check = (_load_queue[index_load_queue]._check_hit_byte == _param->_mask_check_hit_byte);
 
 				}
@@ -629,25 +639,32 @@
 		  {
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * next");
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * new store_queue_ptr_write : %d",index_store);
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * new store_queue_ptr_write : %d",store_queue_ptr_write);
 
 		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * update reg_STORE_QUEUE_NB_CHECK");
 #ifdef DEBUG
-                    if (reg_STORE_QUEUE_NB_CHECK [index_store] == 0)
+                    if (reg_STORE_QUEUE_NB_CHECK [store_queue_ptr_write] == 0)
                       throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
 #endif
-                    reg_STORE_QUEUE_NB_CHECK [index_store] --;
-
-// 		    if (_load_queue[index_load]._store_queue_ptr_write == 0)
-// 		      _load_queue[index_load]._store_queue_ptr_write = _param->_size_store_queue-1;
+
+                    reg_STORE_QUEUE_NB_CHECK [store_queue_ptr_write] --;
+
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * reg_STORE_QUEUE_NB_CHECK 1 [%d] <- %d", store_queue_ptr_write,reg_STORE_QUEUE_NB_CHECK [store_queue_ptr_write]);
+
+		    if ((store_queue_ptr_write ==     store_queue_ptr_read) or
+			(store_queue_ptr_write == reg_STORE_QUEUE_PTR_READ))
+		      {
+// 			store_queue_empty = true;
+			end_check         = true;
+			change_state      = true;
+		      }
+
+// 		    if (_load_queue[index_load_queue]._store_queue_ptr_write == 0)
+// 		      _load_queue[index_load_queue]._store_queue_ptr_write = _param->_size_store_queue-1;
 // 		    else
-// 		      _load_queue[index_load]._store_queue_ptr_write --;
-		    _load_queue[index_load]._store_queue_ptr_write = index_store; // because the index store have be decrease
-
-		    // FIXME : peut n'est pas obliger de faire cette comparaison. Au prochain cycle on le détectera que les pointeur sont égaux. Ceci évitera d'avoir deux comparateurs avec le registre "reg_STORE_QUEUE_PTR_READ"
-		    if (index_store == reg_STORE_QUEUE_PTR_READ)
-		      {
-			end_check    = true;
-			change_state = true;
-		      }
+// 		      _load_queue[index_load_queue]._store_queue_ptr_write --;
+		    _load_queue[index_load_queue]._store_queue_ptr_write = store_queue_ptr_write; // because the index store have be decrease
+ 		    _load_queue[index_load_queue]._store_queue_empty     = store_queue_empty; // because the index store have be decrease
+
+		    // FIXME : peut n'est pas obliger de faire cette comparaison. Au prochain cycle on le détectera que les pointeur sont égaux. Ceci évitera d'avoir deux comparateurs avec le registre "store_queue_ptr_read"
 		  }
 
@@ -657,12 +674,12 @@
                     log_printf(TRACE,Load_store_unit,FUNCTION,"              * end_check : %d",end_check);
 
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * state old : %s",toString(_load_queue[index_load]._state).c_str());
-
-		    switch (_load_queue[index_load]._state)
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * state old : %s",toString(_load_queue[index_load_queue]._state).c_str());
+
+		    switch (_load_queue[index_load_queue]._state)
 		      {
 		      case LOAD_QUEUE_WAIT_CHECK   : 
                         {
 			  if (end_check)
-                            _load_queue[index_load]._state = LOAD_QUEUE_WAIT  ; 
+                            _load_queue[index_load_queue]._state = LOAD_QUEUE_WAIT  ; 
                           break;
                         }
@@ -670,7 +687,7 @@
 			{
 			  if (end_check)
-			    _load_queue[index_load]._state = LOAD_QUEUE_COMMIT; 
+			    _load_queue[index_load_queue]._state = LOAD_QUEUE_COMMIT; 
 			  else
-			    _load_queue[index_load]._state = LOAD_QUEUE_CHECK; // No commit : check hit and no end
+			    _load_queue[index_load_queue]._state = LOAD_QUEUE_CHECK; // No commit : check hit and no end
 			  break;
 			}
@@ -678,13 +695,13 @@
 			{
 			  if (end_check)
-			    _load_queue[index_load]._state     = LOAD_QUEUE_COMMIT;
+			    _load_queue[index_load_queue]._state     = LOAD_QUEUE_COMMIT;
 
 			  // check find a bypass. A speculative load have been committed : report a speculation miss.
-			  if ((_load_queue[index_load]._check_hit != 0) and 
-                              (_load_queue[index_load]._write_rd  == 0) // is commit
+			  if ((_load_queue[index_load_queue]._check_hit != 0) and 
+                              (_load_queue[index_load_queue]._write_rd  == 0) // is commit
                               )
 			    {
-			      _load_queue[index_load]._exception = EXCEPTION_MEMORY_MISS_SPECULATION;
-			      _load_queue[index_load]._write_rd  = 1; // write the good result
+			      _load_queue[index_load_queue]._exception = EXCEPTION_MEMORY_MISS_SPECULATION;
+			      _load_queue[index_load_queue]._write_rd  = 1; // write the good result
 
 #ifdef STATISTICS
@@ -698,13 +715,14 @@
 		      default : break;
 		      }
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * state new : %s",toString(_load_queue[index_load]._state).c_str());
-		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * exception : %d",_load_queue[index_load]._exception);
-
-                    if (end_check)
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * state new : %s",toString(_load_queue[index_load_queue]._state).c_str());
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"                * exception : %d",_load_queue[index_load_queue]._exception);
+
+                    if (end_check//  and not store_queue_empty
+			)
                       {
                         log_printf(TRACE,Load_store_unit,FUNCTION,"                * end check, decrease all nb_check");
                         
-                        uint32_t i=index_store;
-                        while (i!=reg_STORE_QUEUE_PTR_READ)
+                        uint32_t i=store_queue_ptr_write;
+                        while (i!=store_queue_ptr_read)
                           {
                             i=((i==0)?_param->_size_store_queue:i)-1;
@@ -714,8 +732,13 @@
                               throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
 #endif
-                            
+			    
                             reg_STORE_QUEUE_NB_CHECK [i] --;
+
+			    log_printf(TRACE,Load_store_unit,FUNCTION,"              * reg_STORE_QUEUE_NB_CHECK 2 [%d] <- %d", i,reg_STORE_QUEUE_NB_CHECK [i]);
+
                             //i=(i+1)%_param->_size_store_queue;
                           }
+			
+			_load_queue[index_load_queue]._store_queue_empty = true; // end of check
                       }
 		  }
@@ -856,4 +879,5 @@
 		    _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]);
 		    _store_queue [index]._address              = address;
+		    _store_queue [index]._send_commit          = false;
 
 		    // reordering data
@@ -895,4 +919,6 @@
 		_speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]);
 		_speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]);
+		_speculative_access_queue [index]._store_queue_ptr_read = PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_READ [internal_MEMORY_IN_PORT]);
+		_speculative_access_queue [index]._store_queue_empty    = PORT_READ(in_MEMORY_IN_STORE_QUEUE_EMPTY    [internal_MEMORY_IN_PORT]);
 		_speculative_access_queue [index]._address              = address;
 		// NOTE : is operation is a load, then they are a result and must write in the register file
@@ -954,4 +980,7 @@
 	    bool         have_exception = (exception != EXCEPTION_MEMORY_NONE);
             bool         need_check= false;
+            Tlsq_ptr_t        store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write;
+            Tlsq_ptr_t        store_queue_ptr_read  = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_read ;
+            Tcontrol_t        store_queue_empty     = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_empty    ;
 	    
 	    if (have_exception)
@@ -962,8 +991,9 @@
 		  {
 		    // load and synchronisation
-		    if (must_check(operation))
+		    if (must_check(operation) and not store_queue_empty)
 		      {
 			// load
                         need_check = true;
+			
 			_load_queue [ptr_write]._state = LOAD_QUEUE_WAIT_CHECK;
 		      }
@@ -984,5 +1014,4 @@
 	    Tdcache_address_t address_lsb    = (address & _param->_mask_address_lsb);
 	    Tdcache_address_t check_hit_byte = gen_mask_not<Tdcache_address_t>(address_lsb+(memory_size(operation)>>3)-1,address_lsb) & _param->_mask_check_hit_byte;
-            Tlsq_ptr_t        store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write;
 
 	    log_printf(TRACE,Load_store_unit,FUNCTION,"    * address                 : 0x%.8x", address);
@@ -998,4 +1027,6 @@
 	    _load_queue [ptr_write]._operation             = operation;
 	    _load_queue [ptr_write]._store_queue_ptr_write = store_queue_ptr_write;
+	    _load_queue [ptr_write]._store_queue_ptr_read  = store_queue_ptr_read ;
+ 	    _load_queue [ptr_write]._store_queue_empty     = store_queue_empty    ;
 	    _load_queue [ptr_write]._address               = address;
 	    _load_queue [ptr_write]._check_hit_byte        = check_hit_byte;
@@ -1023,13 +1054,16 @@
 
             // Only load need check
-            if (need_check)
+            if (need_check//  and not store_queue_empty
+		)
 //             if (is_operation_memory_load(_load_queue [ptr_write]._operation))
               {
                 log_printf(TRACE,Load_store_unit,FUNCTION,"    * update nb_check");
                 log_printf(TRACE,Load_store_unit,FUNCTION,"      *     store_queue_ptr_write : %d",store_queue_ptr_write);
+                log_printf(TRACE,Load_store_unit,FUNCTION,"      *     store_queue_ptr_read  : %d",store_queue_ptr_read );
+		log_printf(TRACE,Load_store_unit,FUNCTION,"      *     store_queue_empty     : %d",store_queue_empty    );
                 log_printf(TRACE,Load_store_unit,FUNCTION,"      * reg_STORE_QUEUE_PTR_READ  : %d",reg_STORE_QUEUE_PTR_READ);
                 
                 uint32_t i=store_queue_ptr_write;
-                while (i!=reg_STORE_QUEUE_PTR_READ)
+                while (i!=store_queue_ptr_read)
                   {
                     i=((i==0)?_param->_size_store_queue:i)-1;
@@ -1038,4 +1072,6 @@
                     
                     reg_STORE_QUEUE_NB_CHECK [i] ++;
+
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"              * reg_STORE_QUEUE_NB_CHECK 3 [%d] <- %d", i,reg_STORE_QUEUE_NB_CHECK [i]);
                   }
               }
@@ -1097,17 +1133,30 @@
 
                     
-                    uint32_t i=_load_queue[packet_id]._store_queue_ptr_write;
-                    while (i!=reg_STORE_QUEUE_PTR_READ)
-                      {
-                        i=((i==0)?_param->_size_store_queue:i)-1;
-                        
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_ptr_write : %d", _load_queue[packet_id]._store_queue_ptr_write);
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_ptr_read  : %d", _load_queue[packet_id]._store_queue_ptr_read );
+		    log_printf(TRACE,Load_store_unit,FUNCTION,"      * store_queue_empty     : %d", _load_queue[packet_id]._store_queue_empty    );
+
+ 		    if (not _load_queue[packet_id]._store_queue_empty)
+		      {
+			uint32_t i=_load_queue[packet_id]._store_queue_ptr_write;
+			
+			while (i!=_load_queue[packet_id]._store_queue_ptr_read)
+			  {
+			    i=((i==0)?_param->_size_store_queue:i)-1;
+			    
 #ifdef DEBUG
-                        if (reg_STORE_QUEUE_NB_CHECK [i] == 0)
-                          throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
+			    if (reg_STORE_QUEUE_NB_CHECK [i] == 0)
+			      throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n"));
 #endif
-                        
-                        reg_STORE_QUEUE_NB_CHECK [i] --;
-                        //i=(i+1)%_param->_size_store_queue;
-                      }
+			    
+			    reg_STORE_QUEUE_NB_CHECK [i] --;
+
+			    log_printf(TRACE,Load_store_unit,FUNCTION,"              * reg_STORE_QUEUE_NB_CHECK 4 [%d] <- %d", i,reg_STORE_QUEUE_NB_CHECK [i]);
+
+			    //i=(i+1)%_param->_size_store_queue;
+			  }
+			_load_queue[packet_id]._store_queue_empty = true; // end of check
+
+		      }
 		  }
 		else
@@ -1150,5 +1199,5 @@
 	    uint32_t j = (reg_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue;
 
-            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.8x, %.2d, %.2d %s",
+            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.8x, %.2d %.1d, %.2d %s",
                        j,
                        _store_queue[j]._context_id          ,
@@ -1163,4 +1212,5 @@
                      //_store_queue[j]._num_reg_rd          ,
                        _store_queue[j]._exception           ,
+                       _store_queue[j]._send_commit         ,
                        reg_STORE_QUEUE_NB_CHECK  [j]        ,
                        toString(_store_queue[j]._state).c_str());
@@ -1174,5 +1224,5 @@
 	    uint32_t j = (*_speculative_access_queue_control)[i];
 
-            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d %.4d, %.8x, %.1d %.4d, %.2d, %s",
+            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d %.4d %.4d %.1d, %.8x, %.1d %.4d, %.2d, %s",
                        j,
                        _speculative_access_queue[j]._context_id          ,
@@ -1183,4 +1233,6 @@
                        _speculative_access_queue[j]._load_queue_ptr_write,
                        _speculative_access_queue[j]._store_queue_ptr_write,
+                       _speculative_access_queue[j]._store_queue_ptr_read ,
+                       _speculative_access_queue[j]._store_queue_empty    ,
                        _speculative_access_queue[j]._address             ,
                        _speculative_access_queue[j]._write_rd            ,
@@ -1198,5 +1250,5 @@
 	    uint32_t j = i;
 
-            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s",
+            log_printf(TRACE,Load_store_unit,FUNCTION,"    [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d %.4d %.1d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s",
                        j,
                        _load_queue[j]._context_id          ,
@@ -1206,4 +1258,6 @@
                        _load_queue[j]._operation           ,
                        _load_queue[j]._store_queue_ptr_write,
+                       _load_queue[j]._store_queue_ptr_read ,
+		       _load_queue[j]._store_queue_empty    ,
                        _load_queue[j]._address             ,
                        _load_queue[j]._check_hit_byte      , 
