Changeset 122 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src
- Timestamp:
- Jun 3, 2009, 10:15:51 AM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp
r120 r122 34 34 uint32_t * translate_num_context_to_num_thread ,//[nb_context] 35 35 bool is_toplevel): 36 _accurate_block_predict (false), 37 _accurate_block_decod (false) 36 _always_accurate_predict (false), 37 _always_accurate_decod (false), 38 _can_accurate_predict (true ), 39 _can_accurate_decod (true ) 38 40 { 39 41 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
r120 r122 224 224 ALLOC1(reg_UPT_EMPTY ,bool ,_param->_nb_context); 225 225 226 ALLOC1(reg_EVENT_VAL ,bool ,_param->_nb_context); 226 ALLOC1(reg_UFPT_EVENT_STATE ,ufpt_event_state_t,_param->_nb_context); 227 ALLOC1(reg_UPT_EVENT_STATE ,upt_event_state_t ,_param->_nb_context); 228 229 // ALLOC1(reg_EVENT_VAL ,bool ,_param->_nb_context); 227 230 ALLOC1(reg_EVENT_UPT_PTR ,uint32_t ,_param->_nb_context); 228 231 ALLOC1(reg_EVENT_UPT_FULL ,bool ,_param->_nb_context); 229 232 230 ALLOC1(reg_EVENT_STATE ,event_state_t ,_param->_nb_context);231 ALLOC1(reg_EVENT_IS_BRANCH ,bool ,_param->_nb_context);233 // ALLOC1(reg_EVENT_STATE ,event_state_t ,_param->_nb_context); 234 // ALLOC1(reg_EVENT_IS_BRANCH ,bool ,_param->_nb_context); 232 235 ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); 233 236 ALLOC1(reg_EVENT_ADDRESS_SRC ,Taddress_t ,_param->_nb_context); … … 257 260 false, 258 261 log_with_pid, 259 false);262 true); 260 263 261 264 branchement_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
r119 r122 151 151 DELETE1(reg_UPT_EMPTY ,_param->_nb_context); 152 152 153 DELETE1(reg_EVENT_VAL ,_param->_nb_context); 153 DELETE1(reg_UFPT_EVENT_STATE ,_param->_nb_context); 154 DELETE1(reg_UPT_EVENT_STATE ,_param->_nb_context); 155 156 // DELETE1(reg_EVENT_VAL ,_param->_nb_context); 154 157 DELETE1(reg_EVENT_UPT_PTR ,_param->_nb_context); 155 158 DELETE1(reg_EVENT_UPT_FULL ,_param->_nb_context); 156 159 157 DELETE1(reg_EVENT_STATE ,_param->_nb_context);158 DELETE1(reg_EVENT_IS_BRANCH ,_param->_nb_context);160 // DELETE1(reg_EVENT_STATE ,_param->_nb_context); 161 // DELETE1(reg_EVENT_IS_BRANCH ,_param->_nb_context); 159 162 DELETE1(reg_EVENT_DEPTH ,_param->_nb_context); 160 163 DELETE1(reg_EVENT_ADDRESS_SRC ,_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_branch_complete.cpp
r111 r122 33 33 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE [%d]",i); 34 34 35 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; 36 Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; 37 Tcontrol_t miss = false; 38 Tcontrol_t take = reg_UPDATE_PREDICTION_TABLE [context][depth]._last_take ; 39 Taddress_t addr_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; 40 Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition ; 35 // Read information 36 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; 37 Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; 38 Tcontrol_t miss = false; // init 39 Tcontrol_t take = reg_UPDATE_PREDICTION_TABLE [context][depth]._last_take ; 40 Taddress_t addr_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; 41 Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition ; 41 42 42 43 Tcontrol_t no_sequence = PORT_READ(in_BRANCH_COMPLETE_NO_SEQUENCE [i]); 43 Taddress_t addr_good = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]);44 Taddress_t addr_good = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]); 44 45 45 46 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); … … 54 55 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * address_dest : %.8x",addr_dest); 55 56 57 // Test branch condition 56 58 switch (condition) 57 59 { … … 80 82 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_CONDITION_FLAG"); 81 83 82 // Tcontrol_t take_good = not flag; // flag set = not take83 // Tcontrol_t take_good = flag; // flag set = take84 84 Tcontrol_t take_good = no_sequence; 85 85 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp
r120 r122 28 28 if (PORT_READ(in_NRESET) != 0) 29 29 { 30 // for each decod instruction 30 31 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 31 32 { 32 33 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD [%d]",i); 33 34 34 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; 35 bool is_accurate = _param->_accurate_block_decod or reg_IS_ACCURATE [context]; 36 event_state_t event_state = reg_EVENT_STATE [context]; 37 uint32_t ptr_write = reg_UPT_TOP [context]; 38 // can continue if next slot is empty 39 Tcontrol_t can_continue= ((reg_UPDATE_PREDICTION_TABLE [context][(reg_UPT_TOP [context]+1)%_param->_size_upt_queue[context]]._state == UPDATE_PREDICTION_STATE_EMPTY) and 40 (reg_EVENT_STATE [context] == EVENT_STATE_OK)); 35 // Read information 36 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; 37 bool is_accurate = (_param->_always_accurate_decod or 38 (_param->_can_accurate_decod and reg_IS_ACCURATE [context])); 39 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [context]; 40 ufpt_event_state_t ufpt_event_state = reg_UFPT_EVENT_STATE [context]; 41 uint32_t ptr_write = reg_UPT_TOP [context]; // One branch per context per cycle 42 uint32_t ptr_write_next = (ptr_write+1)%_param->_size_upt_queue[context]; 43 // Decod can continue until the next branch if next slot is empty, and no event 44 Tcontrol_t can_continue = (reg_UPDATE_PREDICTION_TABLE [context][ptr_write_next]._state == UPDATE_PREDICTION_STATE_EMPTY); 41 45 42 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context ); 43 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is_accurate : %d",is_accurate); 44 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_state : %s",toString(event_state).c_str()); 45 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ptr_write : %d",ptr_write ); 46 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_state : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state).c_str()); 47 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * can_continue: %d",can_continue); 46 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 47 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is_accurate : %d",is_accurate); 48 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_event_state : %s",toString(ufpt_event_state).c_str()); 49 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_event_state : %s",toString(upt_event_state).c_str()); 50 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ptr_write : %d - %d",ptr_write,ptr_write_next); 51 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_state : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state).c_str()); 52 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * can_continue : %d",can_continue); 48 53 49 // ack:54 // can decod (ack) if : 50 55 // * in all case (miss or hit), need empty slot 56 // * not previous event (state = ok) 51 57 // * is_accurate 52 // * event_state : don't update upt53 58 internal_DECOD_ACK [i] = ((reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state == UPDATE_PREDICTION_STATE_EMPTY) and 54 is_accurate and 55 // ( 56 (event_state == EVENT_STATE_OK)// or 57 // (event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or 58 // (event_state == EVENT_STATE_UPDATE_CONTEXT)) 59 ); 59 (ufpt_event_state == UFPT_EVENT_STATE_OK) and 60 (upt_event_state == UPT_EVENT_STATE_OK ) and 61 is_accurate); 60 62 internal_DECOD_UPT_PTR_WRITE [i] = ptr_write; 61 63 62 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ack : %d",internal_DECOD_ACK [i]);64 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ack : %d",internal_DECOD_ACK [i]); 63 65 64 66 PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_predict.cpp
r120 r122 27 27 if (PORT_READ(in_NRESET) != 0) 28 28 { 29 29 // For each prediction 30 30 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 31 31 { 32 // Read information 32 33 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; 33 uint32_t top = reg_UFPT_TOP[context]; 34 uint32_t top = reg_UFPT_TOP[context]; // not multi branch prediction 34 35 35 36 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT [%d] (genMealy)",i); … … 40 41 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * need update : %d",reg_NB_ELT_NEED_UPDATE [context]); 41 42 43 bool is_accurate = (_param->_always_accurate_predict or 44 (_param->_can_accurate_predict and reg_IS_ACCURATE [context])); 45 46 // Ack if : 47 // * no previous event (ufpt and upt is ok) 48 // * top slot is empty 49 // * is_accurate 50 internal_PREDICT_ACK [i] = ((reg_UFPT_EVENT_STATE [context] == UFPT_EVENT_STATE_OK) and 51 (reg_UPT_EVENT_STATE [context] == UPT_EVENT_STATE_OK ) and 52 (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state == UPDATE_FETCH_PREDICTION_STATE_EMPTY) and 53 is_accurate); 54 42 55 internal_PREDICT_UPDATE_PREDICTION_ID [i] = top; 43 56 57 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ACK : %d",internal_PREDICT_ACK [i]); 58 59 PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]); 44 60 if (_param->_have_port_depth) 45 61 PORT_WRITE(out_PREDICT_UPDATE_PREDICTION_ID [i], internal_PREDICT_UPDATE_PREDICTION_ID [i]); 46 47 bool is_accurate = _param->_accurate_block_predict or reg_IS_ACCURATE[context];48 49 // Ack if :50 // * slot is empty51 // * no previous miss52 // * is_accurate53 internal_PREDICT_ACK [i] = ((reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state == UPDATE_FETCH_PREDICTION_STATE_EMPTY) and54 (reg_EVENT_STATE [context] == EVENT_STATE_OK) and55 // (reg_UFPT_NB_UPDATE [context] == 0) and56 is_accurate);57 58 59 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ACK : %d",internal_PREDICT_ACK [i]);60 PORT_WRITE(out_PREDICT_ACK [i], internal_PREDICT_ACK [i]);61 62 } 62 63 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp
r119 r122 40 40 // include ]DEPTH_MIN:DEPTH_MAX] -> speculative 41 41 42 PORT_WRITE(out_DEPTH_VAL [i],((reg_UPDATE_PREDICTION_TABLE [i][reg_UPT_TOP [i]]._state == UPDATE_PREDICTION_STATE_EMPTY) 43 and (reg_EVENT_STATE [i] == EVENT_STATE_OK) 42 uint32_t bottom = reg_UPT_BOTTOM [i]; 43 uint32_t top = reg_UPT_TOP [i]; 44 bool empty = reg_UPT_EMPTY [i]; 45 46 // Depth_val is set when state is ok and the UPT[top] is empty 47 PORT_WRITE(out_DEPTH_VAL [i],((reg_UPDATE_PREDICTION_TABLE [i][top]._state == UPDATE_PREDICTION_STATE_EMPTY) 48 and (reg_UFPT_EVENT_STATE [i] == UFPT_EVENT_STATE_OK) 49 and (reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_OK) 44 50 )); 45 51 if (_param->_have_port_depth) 46 52 { 47 PORT_WRITE(out_DEPTH_CURRENT [i], reg_UPT_TOP [i]); 48 PORT_WRITE(out_DEPTH_MIN [i], reg_UPT_BOTTOM [i]); 49 PORT_WRITE(out_DEPTH_MAX [i], reg_UPT_TOP [i]); 50 } 51 PORT_WRITE(out_DEPTH_FULL [i], not reg_UPT_EMPTY [i] and (reg_UPT_TOP [i] == reg_UPT_BOTTOM [i])); 52 53 // bool empty = reg_UPT_EMPTY [i]; 54 // PORT_WRITE(out_DEPTH_MAX [i], ((empty)?reg_UPT_BOTTOM [i]:((reg_UPT_TOP [i]==0)?(_param->_size_upt_queue[i]-1):(reg_UPT_TOP [i]-1)))); 53 PORT_WRITE(out_DEPTH_CURRENT [i], top); 54 PORT_WRITE(out_DEPTH_MIN [i], bottom); 55 PORT_WRITE(out_DEPTH_MAX [i], top); 56 } 57 PORT_WRITE(out_DEPTH_FULL [i], not empty and (top == bottom)); 55 58 } 56 59 … … 58 61 // =====[ UPDATE ]==================================================== 59 62 // =================================================================== 60 61 bool retire_ras_from_ufpt [_param->_nb_context]; // event ufpt -> restore RAS, else update upt 62 bool retire_ras_from_upt [_param->_nb_context]; // event upt -> restore RAS, else restore others structure 63 // bool have_event [_param->_nb_context]; 64 bool ufpt_update [_param->_nb_context]; 65 bool upt_update [_param->_nb_context]; 66 Tdepth_t tab_ufpt_depth [_param->_nb_context]; 67 Tdepth_t tab_upt_depth [_param->_nb_context]; 68 69 for (uint32_t i=0; i<_param->_nb_context; i++) 70 { 71 event_state_t event_state = reg_EVENT_STATE [i]; 72 73 retire_ras_from_ufpt [i] = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or 74 (event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or 75 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT ) or 76 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT)); 77 retire_ras_from_upt [i] = ((event_state == EVENT_STATE_MISS_FLUSH_UPT) or 78 (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); 79 80 // have_event [i] = (event_state == EVENT_STATE_EVENT_FLUSH_UPT); 81 82 ufpt_update [i] = true; 83 upt_update [i] = true; 84 tab_ufpt_depth [i] = reg_UFPT_UPDATE [i]; 85 tab_upt_depth [i] = reg_UPT_UPDATE [i]; 86 } 63 { 64 bool flush_ufpt [_param->_nb_context]; // event ufpt -> restore RAS, else update upt 65 bool flush_upt [_param->_nb_context]; // event upt -> restore RAS, else restore others structure 66 bool ufpt_can_update [_param->_nb_context]; 67 bool upt_can_update [_param->_nb_context]; 68 Tdepth_t tab_ufpt_depth [_param->_nb_context]; 69 Tdepth_t tab_upt_depth [_param->_nb_context]; 70 71 // Init 72 for (uint32_t i=0; i<_param->_nb_context; i++) 73 { 74 ufpt_event_state_t ufpt_event_state = reg_UFPT_EVENT_STATE [i]; 75 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [i]; 76 77 flush_ufpt [i] = (ufpt_event_state == UFPT_EVENT_STATE_KO_FLUSH); 78 flush_upt [i] = ((upt_event_state == UPT_EVENT_STATE_KO_MISS_FLUSH_UPT) or 79 (upt_event_state == UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT)); 80 ufpt_can_update [i] = true; 81 upt_can_update [i] = true; 82 tab_ufpt_depth [i] = reg_UFPT_UPDATE [i]; 83 tab_upt_depth [i] = reg_UPT_UPDATE [i]; 84 } 87 85 88 86 for (uint32_t i=0; i<_param->_nb_inst_update; i++) 89 87 { 90 Tcontext_t context = (reg_UPDATE_PRIORITY+i)%_param->_nb_context;88 Tcontext_t context = (reg_UPDATE_PRIORITY+i)%_param->_nb_context; 91 89 92 90 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE [%d] (genMoore)",i); 93 91 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 94 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_state : %s",toString(reg_EVENT_STATE [context]).c_str()); 92 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flush_ufpt : %d",flush_ufpt[context]); 93 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flush_upt : %d",flush_upt [context]); 95 94 96 95 Tcontrol_t val = false; 97 96 Tcontrol_t val_without_ack = false; 98 Tcontrol_t miss_prediction ;99 Tcontrol_t direction_good ;100 Tcontrol_t prediction_ifetch ;101 Tcontrol_t btb_val ;102 Taddress_t btb_address_src ;103 Taddress_t btb_address_dest ;104 Tbranch_condition_t btb_condition ;105 Tcontrol_t dir_val ;106 Thistory_t dir_history ;107 Tcontrol_t ras_val ;108 Tcontrol_t ras_flush ;109 Tcontrol_t ras_push ;110 Taddress_t ras_address ;111 Tptr_t ras_index ;97 Tcontrol_t miss_prediction = 0; // not necessary init 98 Tcontrol_t direction_good = 0; // not necessary init 99 Tcontrol_t prediction_ifetch = 0; // not necessary init 100 Tcontrol_t btb_val = 0; // not necessary init 101 Taddress_t btb_address_src = 0; // not necessary init 102 Taddress_t btb_address_dest = 0; // not necessary init 103 Tbranch_condition_t btb_condition = 0; // not necessary init 104 Tcontrol_t dir_val = 0; // not necessary init 105 Thistory_t dir_history = 0; // not necessary init 106 Tcontrol_t ras_val = 0; // not necessary init 107 Tcontrol_t ras_flush = 0; // not necessary init 108 Tcontrol_t ras_push = 0; // not necessary init 109 Taddress_t ras_address = 0; // not necessary init 110 Tptr_t ras_index = 0; // not necessary init 112 111 113 112 // Test if update fetch prediction table need update port 114 if ( retire_ras_from_ufpt [context])115 { 116 if (ufpt_ update [context])113 if (flush_ufpt [context]) 114 { 115 if (ufpt_can_update [context]) 117 116 { 118 117 // Update Fetch Prediction Table 119 // An update of ufpt is to previous miss. Just restore Return Address Stack 120 118 // An update of ufpt is to previous miss. Just restore Prediction_unit 119 120 // Read information 121 121 Tdepth_t depth = tab_ufpt_depth[context]; 122 122 ufpt_state_t state = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state; … … 131 131 // val_without_ack = not update_ras(condition); 132 132 133 miss_prediction = 1; 133 miss_prediction = 1; // need update, also previous miss 134 134 // direction_good = ; 135 135 prediction_ifetch = 1; … … 138 138 // btb_address_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; 139 139 // btb_condition = condition; 140 dir_val = update_ ras(condition);140 dir_val = update_dir(condition); 141 141 dir_history = reg_UPDATE_PREDICTION_TABLE [context][depth]._history; 142 // repop/ repush data -> don't corrupt ras 143 ras_val = update_ras(condition); 144 ras_flush = 0; 142 ras_val = update_ras(condition); // repop/ repush data -> don't corrupt ras 143 ras_flush = 0; // no ras corruption 145 144 ras_push = push_ras(condition); 146 145 ras_address = reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._address_ras; … … 153 152 // Warning : don't update same entry 154 153 if (depth == reg_UFPT_BOTTOM[context]) 155 ufpt_update [context] = false; 156 157 tab_ufpt_depth[context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; 154 ufpt_can_update [context] = false; 155 else 156 // update pointer 157 tab_ufpt_depth[context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; 158 158 } 159 159 } 160 160 else 161 161 { 162 if (upt_ update [context])162 if (upt_can_update [context]) 163 163 { 164 164 // Update Prediction Table 165 165 166 // Read information 166 167 Tdepth_t depth = tab_upt_depth[context]; 167 168 upt_state_t state = reg_UPDATE_PREDICTION_TABLE [context][depth]._state; … … 174 175 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * condition : %s",toString(condition).c_str()); 175 176 176 Tcontrol_t state_is_ok_ko = ((state == UPDATE_PREDICTION_STATE_OK ) or 177 (state == UPDATE_PREDICTION_STATE_KO )); 178 // Tcontrol_t state_is_event = ((state == UPDATE_PREDICTION_STATE_KO ) or 179 // (state == UPDATE_PREDICTION_STATE_EVENT)// or 180 // ((have_event[context])?(state == UPDATE_PREDICTION_STATE_OK):false) 181 // ); 182 183 // Tcontrol_t state_is_event_update = state_is_event and need_update(condition); 184 // Tcontrol_t state_is_event_no_update = state_is_event and not need_update(condition); 185 186 if (retire_ras_from_upt [context]) 177 // is the valid branch (valid branch hit, or valid branch miss) 178 Tcontrol_t state_is_ok_ko = ((state == UPDATE_PREDICTION_STATE_OK ) or 179 (state == UPDATE_PREDICTION_STATE_KO )); 180 181 if (not flush_upt [context]) 187 182 { 188 // val = state_is_event_update; 189 // val_without_ack = state_is_event_no_update; 190 val = ((state == UPDATE_PREDICTION_STATE_KO ) or 191 ((state == UPDATE_PREDICTION_STATE_EVENT) and need_update(condition))); 192 val_without_ack = ((state == UPDATE_PREDICTION_STATE_EVENT) and not need_update(condition)); 183 // no event, just update predictor 184 val = (state == UPDATE_PREDICTION_STATE_OK); 185 val_without_ack = false; 193 186 } 194 187 else 195 188 { 196 val = (state == UPDATE_PREDICTION_STATE_OK); 197 val_without_ack = false; 189 // event, restore event (if need update) 190 val = ( (state == UPDATE_PREDICTION_STATE_KO ) or 191 ((state == UPDATE_PREDICTION_STATE_EVENT) and need_update(condition))); 192 val_without_ack = ( (state == UPDATE_PREDICTION_STATE_EVENT) and not need_update(condition)); 198 193 } 199 194 … … 205 200 btb_address_dest = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest; 206 201 btb_condition = condition; 207 dir_val = // state_is_ok_ko and 208 update_dir(condition); // if not ifetch, then static prediction 202 dir_val = ifetch and update_dir(condition); // if not ifetch, then static prediction -> history is wrong 209 203 dir_history = reg_UPDATE_PREDICTION_TABLE [context][depth]._history ; 210 204 ras_val = update_ras(condition); // repop/ repush data -> don't corrupt ras 211 ras_flush = (state == UPDATE_PREDICTION_STATE_KO); // miss prediction ,RAS is corrupted205 ras_flush = (state == UPDATE_PREDICTION_STATE_KO); // miss prediction on RAS -> RAS is corrupted 212 206 ras_push = push_ras(condition); 213 207 // If corrupt, RAS must be flushed. … … 218 212 internal_UPDATE_FROM_UFPT [i] = false; 219 213 internal_UPDATE_DEPTH [i] = depth; 220 internal_UPDATE_RAS [i] = retire_ras_from_upt [context];214 internal_UPDATE_RAS [i] = flush_upt [context]; 221 215 222 216 // Warning : don't update same entry 223 if ( retire_ras_from_upt [context])217 if (flush_upt [context]) 224 218 { 225 // Restore RAS.219 // Stop condition 226 220 if ((depth == reg_UPT_BOTTOM[context]) or not (val or val_without_ack)) 227 upt_ update [context] = false;221 upt_can_update [context] = false; 228 222 223 // flush -> ptr is decrease 229 224 tab_upt_depth[context] = (depth==0)?(_param->_size_upt_queue[context]-1):(depth-1); 230 225 } 231 226 else 232 227 { 228 // Stop condition 233 229 if ((depth == reg_UPT_TOP [context]) or not (val or val_without_ack)) 234 upt_ update [context] = false;230 upt_can_update [context] = false; 235 231 232 // flush -> ptr is increase 236 233 tab_upt_depth[context] = (depth+1)%_param->_size_upt_queue[context]; 237 234 } … … 273 270 } 274 271 } 275 272 } 273 276 274 // =================================================================== 277 275 // =====[ BRANCH_EVENT ]============================================== 278 276 // =================================================================== 277 278 // For all context ... 279 279 for (uint32_t i=0; i<_param->_nb_context; i++) 280 280 { 281 Tcontrol_t val = (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT); 282 281 // ... send an event if upt must be update the context 282 Tcontrol_t val = ((reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_KO_DECODE_UPDATE_CONTEXT) or 283 (reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT)); 283 284 PORT_WRITE(out_BRANCH_EVENT_VAL [i],val); 284 285 if (_param->_have_port_depth) … … 291 292 internal_BRANCH_EVENT_VAL [i] = val; 292 293 } 294 293 295 } 294 296 else 295 297 { 298 // Reset 296 299 for (uint32_t i=0; i<_param->_nb_inst_update; i++) 297 300 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r120 r122 51 51 reg_IS_ACCURATE [i] = true; 52 52 53 reg_EVENT_VAL [i] = false; 54 reg_EVENT_STATE [i] = EVENT_STATE_OK; 55 reg_EVENT_IS_BRANCH [i] = true; 53 reg_UFPT_EVENT_STATE [i] = UFPT_EVENT_STATE_OK; 54 reg_UPT_EVENT_STATE [i] = UPT_EVENT_STATE_OK; 55 56 // reg_EVENT_VAL [i] = false; 57 // reg_EVENT_STATE [i] = EVENT_STATE_OK; 58 // reg_EVENT_IS_BRANCH [i] = true; 56 59 } 57 60 } … … 74 77 for (uint32_t i=0; i<_param->_nb_context; i++) 75 78 { 79 // ----------------------------- 76 80 // UPDATE_FETCH_PREDICTION_TABLE 81 // ----------------------------- 77 82 { 78 83 uint32_t bottom = reg_UFPT_BOTTOM [i]; 79 80 // Test if state is end 81 if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END) 84 bool end = (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END); 85 86 // Test if bottom slot can be remove 87 if (end) 82 88 { 83 89 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d]",i,bottom); 84 90 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state = UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom); 85 91 86 92 // Free slot 87 93 reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; 88 94 // Update pointer 89 reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i]; 95 bottom = (bottom+1)%_param->_size_ufpt_queue[i]; 96 97 reg_UFPT_BOTTOM [i] = bottom; 90 98 } 91 99 } 92 100 101 // ----------------------- 93 102 // UPDATE_PREDICTION_TABLE 103 // ----------------------- 94 104 { 95 uint32_t bottom = reg_UPT_BOTTOM [i]; 96 bool end = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END); 97 // bool end_ok = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_OK); 98 // bool end_ko = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_KO); 99 // event_state_t event_state = reg_EVENT_STATE [i]; 100 101 // Test if state is end 102 // if (end_ok or end_ko) 103 104 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state is STATE_END : %d",end); 105 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (before) : %d",reg_UPT_BOTTOM [i]); 106 107 if (end) 105 uint32_t bottom = reg_UPT_BOTTOM [i]; 106 107 // if (reg_UPT_EVENT_STATE [i] == UPT_EVENT_STATE_OK) 108 108 { 109 bool end = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END); 110 111 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (before) : %d",bottom); 112 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state is STATE_END : %d",end); 113 114 if (end) 115 { 109 116 #if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) 110 if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._retire_ok) 111 { 112 uint32_t num_thread = _param->_translate_num_context_to_num_thread [i]; 113 branchement_log_file [num_thread] 114 << std::hex 115 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " 116 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " 117 << std::dec 118 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " 119 << "[" << simulation_cycle() << "] " << " " 120 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " 121 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " " 122 << "(" << (uint32_t)reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition << ")" 123 << std::endl; 117 if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._retire_ok) 118 { 119 uint32_t num_thread = _param->_translate_num_context_to_num_thread [i]; 120 branchement_log_file [num_thread] 121 << std::hex 122 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " 123 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " 124 << std::dec 125 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " 126 << "[" << simulation_cycle() << "] " << " " 127 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " 128 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " " 129 << "(" << (uint32_t)reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition << ")" 130 << std::endl; 131 } 132 #endif 133 134 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); 135 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); 136 // Free slot 137 reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; 138 139 // Update pointer 140 reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i]; 141 142 // Free a slot, test if bottom pointer overtake the top pointer 143 if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) 144 reg_UPT_EMPTY [i] = true; // free a slot 145 146 reg_EVENT_UPT_FULL [i] = false; 124 147 } 125 #endif126 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom);127 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom);128 // Free slot129 reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY;130 131 // Update pointer132 reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i];133 148 134 if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) 135 reg_UPT_EMPTY [i] = true; // free a slot 136 137 // if (bottom = reg_UPT_UPDATE [i]) 138 // reg_UPT_UPDATE [i] = reg_UPT_BOTTOM [i]; 139 }// @@@ 140 141 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (after ) : %d",reg_UPT_BOTTOM [i]); 142 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); 143 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); 144 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL[i]); 145 146 if (reg_EVENT_VAL [i] and (reg_EVENT_UPT_PTR [i] == bottom)) 147 { 148 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * END EVENT"); 149 150 if ((reg_EVENT_IS_BRANCH [i] == false) and (reg_EVENT_UPT_FULL [i] == false)) 151 reg_EVENT_STATE[i] = EVENT_STATE_OK; 152 153 if ((reg_EVENT_IS_BRANCH [i] == true) or (reg_EVENT_UPT_FULL [i] == false)) 154 { 155 reg_EVENT_VAL [i] = false; 156 // reg_EVENT_IS_BRANCH [i] = true; 157 reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; 158 reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; 159 160 if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i]) 161 reg_UPT_EMPTY [i] = false; 162 } 163 164 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); 165 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); 166 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); 167 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); 168 149 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (after ) : %d",reg_UPT_BOTTOM [i]); 169 150 } 170 171 if (end)172 reg_EVENT_UPT_FULL [i] = false;173 151 } 174 152 } … … 186 164 187 165 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 166 // Test if have a transaction 188 167 if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) 189 168 { 190 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; 191 uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; 169 // get transaction information 170 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; 171 uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; 172 Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); 173 bool is_accurate = (_param->_always_accurate_predict or 174 (_param->_can_accurate_predict and PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]))); 175 192 176 193 177 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * PREDICT[%d] - Accepted",i); 194 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 195 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 178 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 179 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 180 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * condition : %d",condition); 181 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is_accurate : %d",is_accurate); 196 182 197 183 #ifdef DEBUG_TEST … … 200 186 #endif 201 187 188 // Ifetch unit have fetch an instruction bundle with a branchement. 189 // Insert in UFPT 202 190 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top); 203 191 reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD; 204 192 205 Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); 206 bool is_accurate = _param->_accurate_block_predict or PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); 193 // Write information 207 194 reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition = condition; 208 195 reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); … … 214 201 reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); 215 202 203 // Update pointer 216 204 reg_UFPT_TOP [context] = (top+1)%_param->_size_ufpt_queue [context]; 217 // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; 205 206 // Test if this branchement need update 218 207 if (need_update(condition)) 219 208 { 220 209 reg_UFPT_NB_NEED_UPDATE [context] ++; 221 210 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); 222 223 211 } 224 212 } … … 239 227 240 228 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 229 // Test if have a decod transaction 241 230 if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) 242 231 { 232 // Read information 243 233 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; 244 234 Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]); 245 235 Tcontrol_t miss_decod = PORT_READ(in_DECOD_MISS_DECOD [i]); 246 236 uint32_t upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i]; 237 uint32_t top_next = (upt_ptr_write+1)%_param->_size_upt_queue [context]; 247 238 Tbranch_condition_t condition ; 248 239 Tcontrol_t is_accurate; … … 257 248 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_ptr_write : %d",upt_ptr_write); 258 249 259 if (miss_ifetch or miss_decod) 250 // In decod step, two miss type : 251 // miss_ifetch = branch is previously predict (predict interface), but it's not the good 252 // miss_decod = branch was not detected 253 if (not (miss_ifetch or miss_decod)) 260 254 { 255 // Normal case : branch is previous predicted, change state of branch 256 257 // Read ufpt_ptr (send in predic step) 258 uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; 259 260 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); 261 262 #ifdef DEBUG_TEST 263 if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) 264 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); 265 #endif 266 // Change state 267 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); 268 reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; 269 270 // Push upt (from Pop ufpt) 271 condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; 272 is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; 273 274 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; 275 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; 276 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; 277 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; 278 // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; 279 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; 280 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; 281 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; 282 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; 283 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true ; // prediction from ifetch 284 285 // Update pointer (now, this instruction is not in ufpt) 286 if (need_update(condition)) 287 { 288 reg_UFPT_NB_NEED_UPDATE [context] --; 289 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); 290 } 291 } 292 else 293 { 294 // Have a miss !!! 261 295 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss !!!"); 262 296 263 // Have a miss !!!264 297 condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); 265 is_accurate = _param->_accurate_block_decod or PORT_READ(in_DECOD_IS_ACCURATE [i]); 266 267 // if can_continue else don't wait the end of all instruction 268 // can_continue = not miss_commit and the destination is accurate (know) 298 is_accurate = (_param->_always_accurate_decod or 299 (_param->_can_accurate_decod and PORT_READ(in_DECOD_IS_ACCURATE [i]))); 300 301 // if can_continue, don't wait the end of all instruction 302 // (can_continue = not miss_commit and the destination is accurate (know)) 269 303 Tcontrol_t can_continue = is_accurate; 270 304 271 305 #ifdef DEBUG_TEST 272 if (reg_EVENT_STATE [context] != EVENT_STATE_OK) 273 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); 274 #endif 275 276 // miss_ifetch = branch is previously predict, but it's not the good 277 // * need flush ufpt 278 // miss_decod = branch was not detected 279 // * not necessary 306 if (reg_UPT_EVENT_STATE [context] != UPT_EVENT_STATE_OK) 307 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt event state.")); 308 if (reg_UFPT_EVENT_STATE [context] != UFPT_EVENT_STATE_OK) 309 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt event state.")); 310 #endif 311 312 // miss_ifetch -> need flush ufpt 313 // miss_decod -> not necessary 314 // if can_continue (destination is know) and direction is not take (instruction in ifetch_queue can be valid) 315 bool flush_ufpt = (not (can_continue and not direction and not miss_ifetch)); 280 316 281 317 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * can_continue: %d",can_continue); 282 318 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * direction : %d",direction ); 283 319 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch ); 284 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * change : %d",(not (can_continue and not direction and not miss_ifetch)));285 286 // if can_continue (destination is know) and direction is not take, don't need flush fetch_unit.287 if ( not (can_continue and not direction and not miss_ifetch))320 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * flush_ufpt: %d",flush_ufpt ); 321 322 // Test if can continue without flushing the ufpt (and ifetch_queue) 323 if (flush_ufpt) 288 324 { 289 if (reg_UFPT_NB_NEED_UPDATE [context] == 0) 290 { 291 // Change state 292 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); 293 reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; 294 // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; 295 } 296 else 297 { 298 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); 299 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; 300 } 301 302 // Flush UPFT 325 // // Optimisation : Test if ufpt have entry that need update prediction struction (as Return Address Stack) 326 // if (reg_UFPT_NB_NEED_UPDATE [context] == 0) 327 // { 328 // // Change state 329 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT_EVENT [%d] <- UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); 330 // reg_UPT_EVENT_STATE [context] = UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT; 331 332 // // @@@ 333 // // // Have an actual event ? 334 // // if (not reg_EVENT_VAL [context]) 335 // // reg_EVENT_UPT_PTR [context] = upt_ptr_write; 336 // } 337 // else 338 // { 339 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- UPT_EVENT_STATE_KO_MISS_WAIT_UFPT (decod - miss - flush ufpt)",context); 340 // // just wait ufpt, don't flush upt 341 // reg_UPT_EVENT_STATE [context] = UPT_EVENT_STATE_KO_MISS_WAIT_UFPT; 342 // } 343 344 reg_UPT_EVENT_STATE [context] = UPT_EVENT_STATE_KO_DECODE_UPDATE_CONTEXT; 345 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT_EVENT_STATE [%d] <- %s (decod, miss)",context,toString(reg_UPT_EVENT_STATE [context]).c_str()); 346 347 // Need Flush UPFT 303 348 flush_UFPT [context] = true; 304 349 305 reg_EVENT_IS_BRANCH [context] = true; 350 // Write information 351 // reg_EVENT_IS_BRANCH [context] = true; 306 352 reg_EVENT_DEPTH [context] = upt_ptr_write; 307 353 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State … … 310 356 reg_EVENT_CAN_CONTINUE [context] = can_continue; 311 357 } 312 358 // else can continue 359 313 360 // Push upt (from decod interface) 314 361 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; … … 323 370 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction 324 371 } 325 else 326 { 327 // Normal case : branch is previous predicated, change state of branch 328 uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; 329 330 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); 331 332 #ifdef DEBUG_TEST 333 if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) 334 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); 335 #endif 336 // Change state 337 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); 338 reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; 339 340 // Push upt (from Pop ufpt) 341 condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; 342 is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; 343 344 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; 345 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; 346 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; 347 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; 348 // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; 349 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; 350 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; 351 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; 352 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; 353 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true ; // prediction from ifetch 354 355 // Update pointer 356 if (need_update(condition)) 357 { 358 reg_UFPT_NB_NEED_UPDATE [context] --; 359 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); 360 } 361 } 362 363 // All case !!! 372 373 // In all case !!! 364 374 #ifdef DEBUG_TEST 365 375 if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY) … … 369 379 // Change state 370 380 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); 371 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END;381 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; 372 382 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; 373 383 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._miss_commit = false; … … 384 394 385 395 // Update pointer 386 reg_UPT_TOP [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context]; 387 reg_UPT_EMPTY [context] = false; 388 // reg_UPT_UPDATE [context] = reg_UPT_TOP [context]; 389 390 // if (miss_ifetch or miss_decod) 391 // reg_UPT_TOP_EVENT [context] = reg_UPT_TOP [context]; 396 reg_UPT_TOP [context] = top_next; 397 reg_UPT_EMPTY [context] = false; // new instruction 392 398 } 393 399 … … 400 406 can_continue [i] = true; 401 407 408 // For each updated instruction 402 409 for (uint32_t i=0; i<_param->_nb_inst_update; i++) 403 410 { 404 411 Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; 405 412 413 // Test if transaction 414 // (an val_with_out is an update and don't need update prediction structure 406 415 if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or 407 416 (internal_UPDATE_VAL_WITHOUT_ACK [i] and can_continue [context])) … … 413 422 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 414 423 424 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [context]; 425 426 // One interface to two source : 427 // * from ufpt -> newest prediction 428 // * from upt -> oldest prediction 415 429 if (internal_UPDATE_FROM_UFPT [i]) 416 430 { 417 431 // if free a slot, also all queue is updated 418 432 // Last slot ? 419 // if (reg_UFPT_UPDATE [context] == reg_UFPT_BOTTOM [context])420 433 if ((--reg_UFPT_NB_UPDATE [context])==0) 421 434 { 422 switch (reg_EVENT_STATE [context])423 {424 case EVENT_STATE_MISS_FLUSH_UFPT :425 { 426 reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; 427 // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT;428 429 break; 430 } 431 // impossible to have an update on ufpt and reg_upt_update>reg_upt_top 432 case EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT : reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; break;433 case EVENT_STATE_EVENT_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_OK ;break;434 case EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT: reg_EVENT_STATE [context] = EVENT_STATE_EVENT_FLUSH_UPT; break; 435 default : break; 436 } 435 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT_EVENT [%d] <- UFPT_EVENT_STATE_OK (update - end flush ufpt)",context); 436 reg_UFPT_EVENT_STATE [context] = UFPT_EVENT_STATE_OK; 437 reg_UFPT_NB_NEED_UPDATE [context] = 0; 438 439 // // Test upt event to change state 440 // // test if upt wait ufpt 441 // switch (upt_event_state) 442 // { 443 // // this case when don't need flush upt (miss decod and can continue) 444 // case UPT_EVENT_STATE_KO_MISS_WAIT_UFPT : upt_event_state = UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT; break; 445 // case UPT_EVENT_STATE_KO_EVENT_WAIT_UFPT : upt_event_state = UPT_EVENT_STATE_OK ; break; 446 // default : break; 447 // } 448 449 // reg_UPT_EVENT_STATE [context] = upt_event_state; 437 450 } 438 451 … … 453 466 reg_UFPT_UPDATE [context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; 454 467 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [context]); 455 // Free a register that need update ?456 if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition))457 {458 reg_UFPT_NB_NEED_UPDATE [context] --;459 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]);460 }461 468 } 462 469 else … … 464 471 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); 465 472 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (before) : %d",reg_UPT_UPDATE [context]); 466 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_ EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str());473 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s",toString(upt_event_state).c_str()); 467 474 468 475 // Change state … … 481 488 #endif 482 489 483 // bool have_event = ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) or484 // (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_EVENT));485 490 #ifdef STATISTICS 486 491 Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; 487 492 #endif 488 bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); 489 bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); 490 493 bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); 494 bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); 495 496 // Test if branch is valid (prediction can be incorrect) 491 497 if (ok or ko) 492 498 { … … 508 514 if (ko) 509 515 { 510 // Ko : wait end of all instruction 511 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO_WAIT_END (update)",context,depth); 512 513 // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO_WAIT_END; 514 516 // Ko 515 517 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",context,depth); 516 518 519 // Wait update of context_state 517 520 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO; 518 521 519 reg_EVENT_VAL [context] = true;520 522 reg_EVENT_UPT_PTR [context] = depth; 521 // reg_EVENT_UPT_FULL [context] = 0;522 // reg_EVENT_UPT_FULL [i] = (not reg_UPT_EMPTY [i] and (bottom == reg_UPT_TOP [i]));523 524 523 525 524 #ifdef STATISTICS … … 530 529 else 531 530 { 532 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_OK (update)",context,depth); 533 // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_OK; 531 // ok or event 534 532 535 533 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (update)",context,depth); … … 564 562 // reg_UPT_UPDATE [context] = reg_UPT_BOTTOM[context]; 565 563 566 if (reg_EVENT_STATE [context] == EVENT_STATE_EVENT_FLUSH_UPT)564 switch (upt_event_state) 567 565 { 568 reg_EVENT_STATE [context] = EVENT_STATE_OK; 566 // this case when don't need flush upt (miss decod and can continue) 567 case UPT_EVENT_STATE_KO_MISS_FLUSH_UPT : upt_event_state = UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT; break; 568 case UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT : 569 { 570 upt_event_state = UPT_EVENT_STATE_OK; 571 reg_UPT_TOP [context] = reg_UPT_TOP_EVENT [context]; 572 reg_UPT_UPDATE [context] = reg_UPT_TOP_EVENT [context]; 573 574 break; 575 } 576 default : break; 569 577 } 570 else 571 { 572 reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; 573 // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UPT; 574 } 578 579 reg_UPT_EVENT_STATE [context] = upt_event_state; 575 580 } 576 581 else 577 582 { 583 // else, decrease update pointer 578 584 reg_UPT_UPDATE [context] = (((depth==0)?_param->_size_upt_queue[context]:depth)-1); 579 585 } … … 587 593 } 588 594 589 // Freethe branch with no accurate ?595 // Test if freeing the branch with no accurate ? 590 596 if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false) and not ko) 591 597 reg_IS_ACCURATE [context] = true; 592 598 593 599 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (after ) : %d",reg_UPT_UPDATE[context]); 594 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_ EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str());600 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s",toString(reg_UPT_EVENT_STATE [context]).c_str()); 595 601 } 596 602 } … … 611 617 // * update status 612 618 // * Miss prediction : 613 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 614 if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) 615 { 616 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; 617 Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; 618 Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; 619 Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; 620 Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; 621 622 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); 623 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 624 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 625 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); 626 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); 627 628 if (miss) 629 { 630 // Flush UPT 631 uint32_t top = reg_UPT_TOP [context]; 632 uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 633 634 Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; 635 event_state_t event_state = reg_EVENT_STATE [context]; 636 upt_state_t event_top = reg_UPDATE_PREDICTION_TABLE [context][top]._state; 637 638 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_top : %s",toString(event_top).c_str()); 639 640 bool previous_ufpt_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or 641 (event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or 642 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or 643 (event_state == EVENT_STATE_EVENT_FLUSH_UFPT )); 644 645 bool previous_upt_event = (false 646 or (event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) 647 or (event_state == EVENT_STATE_MISS_FLUSH_UPT ) 648 or (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) 649 or (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) 650 or (event_top == UPDATE_PREDICTION_STATE_END_KO ) 651 or (event_top == UPDATE_PREDICTION_STATE_KO ) 652 // or (event_state == EVENT_STATE_WAIT_END_EVENT ) 653 // or ((event_state == EVENT_STATE_UPDATE_CONTEXT ) 654 // and (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT)) 655 ); 656 // bool update_ras = (new_update != depth); 657 658 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 659 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); 660 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); 661 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_upt_event : %d",previous_upt_event); 662 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_ufpt_event : %d",previous_ufpt_event); 663 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [context]); 664 665 // Have a miss !!! 666 // Flush UPFT 667 flush_UFPT [context] |= not previous_ufpt_event; 668 669 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) 670 { 671 for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; 672 j!=top; 673 j=(j+1)%_param->_size_upt_queue[context]) 674 { 675 reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; 676 reg_UPDATE_PREDICTION_TABLE [context][j]._retire_ok = false; 677 } 678 679 680 // reg_UPT_BOTTOM [context]; 681 reg_UPT_TOP [context] = depth; 682 // reg_UPT_TOP_EVENT [context] = top; 683 684 if (not previous_upt_event) 685 { 686 reg_UPT_TOP_EVENT [context] = top; 687 reg_UPT_UPDATE [context] = new_update; 688 } 689 else 690 { 691 // Have event. Top index this slot 692 reg_UPDATE_PREDICTION_TABLE [context][top]._retire_ok = false; 693 694 switch (event_top) 695 { 696 case UPDATE_PREDICTION_STATE_END_KO : 619 { 620 bool branch_complete_miss [_param->_nb_context]; 621 for (uint32_t i=0; i<_param->_nb_context; ++i) 622 branch_complete_miss [i] = false; 623 624 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 625 if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) 626 { 627 // Read information 628 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; 629 Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; 630 Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; 631 Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; 632 Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; 633 634 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [context]; 635 636 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); 637 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 638 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 639 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); 640 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s",toString(upt_event_state).c_str()); 641 642 // Test if the completed branch is a speculation miss 643 if (miss) 644 { 645 // special case : two branch complete on the same context. 646 // when the re order keep the order, the branch complete j is most speculative that the branch comple i if i < j 647 if (not branch_complete_miss [context]) 648 { 649 branch_complete_miss [context] = true; 650 // Flush UPT 651 // get information 652 uint32_t top = reg_UPT_TOP [context]; 653 uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; 654 655 Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; 656 upt_state_t event_top = reg_UPDATE_PREDICTION_TABLE [context][top]._state; 657 658 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_event_state : %s",toString(upt_event_state).c_str()); 659 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_top : %s",toString(event_top).c_str()); 660 661 bool previous_ufpt_event = (reg_UFPT_EVENT_STATE [i] == UFPT_EVENT_STATE_KO_FLUSH); 662 663 664 bool previous_upt_event = (false 665 or (upt_event_state == UPT_EVENT_STATE_KO_MISS_WAIT_UFPT ) 666 or (upt_event_state == UPT_EVENT_STATE_KO_MISS_FLUSH_UPT ) 667 or (upt_event_state == UPT_EVENT_STATE_KO_EVENT_WAIT_UFPT) 668 or (upt_event_state == UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT) 669 or (event_top == UPDATE_PREDICTION_STATE_END_KO ) 670 or (event_top == UPDATE_PREDICTION_STATE_KO ) 671 ); 672 673 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 674 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); 675 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_upt_event : %d",previous_upt_event); 676 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_ufpt_event : %d",previous_ufpt_event); 677 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [context]); 678 679 // Have a miss !!! 680 // Flush UPFT 681 flush_UFPT [context] |= not previous_ufpt_event; 682 683 // Test if the entry wait the branchment (else, they have a previous event) 684 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) 685 { 686 // All instruction between the instruction and the top is disable 687 for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; 688 j!=top; 689 j=(j+1)%_param->_size_upt_queue[context]) 697 690 { 698 // Have already update predictor 699 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; 700 reg_UPT_UPDATE [context] = new_update; 701 break; 691 reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; 692 reg_UPDATE_PREDICTION_TABLE [context][j]._retire_ok = false; // event 702 693 } 703 case UPDATE_PREDICTION_STATE_KO : 694 695 // New top 696 reg_UPT_TOP [context] = depth; 697 698 if (not previous_upt_event) 704 699 { 705 // Doesn't have update predictor 706 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; 707 break; 700 reg_UPT_TOP_EVENT [context] = top; 701 reg_UPT_UPDATE [context] = new_update; 708 702 } 709 default :703 else 710 704 { 711 // reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; 705 // Have event. Top index this slot 706 reg_UPDATE_PREDICTION_TABLE [context][top]._retire_ok = false; 707 708 switch (event_top) 709 { 710 case UPDATE_PREDICTION_STATE_END_KO : 711 { 712 // Have already update predictor 713 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; 714 reg_UPT_UPDATE [context] = new_update; 715 break; 716 } 717 case UPDATE_PREDICTION_STATE_KO : 718 { 719 // Doesn't have update predictor 720 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; 721 break; 722 } 723 default : 724 { 725 // reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; 712 726 // break; 713 727 714 728 #ifdef DEBUG_TEST 715 throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); 716 #endif 729 throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); 730 #endif 731 } 732 } 717 733 } 718 }719 }720 721 if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context])722 reg_UPT_EMPTY [context] = true;723 724 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth);725 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO;726 727 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE [%d] : %d",context,reg_UFPT_NB_NEED_UPDATE [context]);728 729 if ( (reg_UFPT_NB_NEED_UPDATE [context] > 0) or730 (reg_UFPT_NB_UPDATE [context] > 0))731 {732 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context);733 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT;734 }735 else736 {737 // if (not previous_update_ras)738 {739 // have ras prediction ?740 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context);741 734 742 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; 735 if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) 736 reg_UPT_EMPTY [context] = true; 737 738 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); 739 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; 740 741 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE [%d] : %d",context,reg_UFPT_NB_NEED_UPDATE [context]); 742 743 // if ( (reg_UFPT_NB_NEED_UPDATE [context] > 0) or 744 // (reg_UFPT_NB_UPDATE [context] > 0)) 745 // { 746 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); 747 // reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; 748 // } 749 // else 750 // { 751 // // if (not previous_update_ras) 752 // { 753 // // have ras prediction ? 754 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); 755 756 // reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; 757 758 // } 759 // } 760 761 reg_UPT_EVENT_STATE [context] = UPT_EVENT_STATE_KO_MISS_FLUSH_UPT; 762 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT_EVENT_STATE [%d] <- %s (branch_complete, ifetch hit)",context,toString(reg_UPT_EVENT_STATE [context]).c_str()); 763 764 // reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; 765 766 // else no update 767 768 // reg_EVENT_IS_BRANCH [context] = true; 769 reg_EVENT_DEPTH [context] = depth; 770 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 771 reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; 772 reg_EVENT_ADDRESS_DEST [context] = good_addr; 773 reg_EVENT_CAN_CONTINUE [context] = false; 743 774 744 775 } 745 } 746 // reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; 747 748 // else no update 749 750 reg_EVENT_IS_BRANCH [context] = true; 751 reg_EVENT_DEPTH [context] = depth; 752 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 753 reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; 754 reg_EVENT_ADDRESS_DEST [context] = good_addr; 755 reg_EVENT_CAN_CONTINUE [context] = false; 756 757 } 758 reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_commit = true; 759 } 760 else 761 { 776 777 reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_commit = true; 778 } 779 } 780 else 781 { 762 782 // Hit case 763 783 … … 767 787 // #endif 768 788 769 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) 770 { 771 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); 772 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; 773 } 774 } 775 776 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); 777 778 // In all case : update good_take 779 reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; 780 781 // Write address_dest if need read register 782 Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; 783 784 if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or 785 (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or 786 (condition == BRANCH_CONDITION_READ_STACK ) ) 787 reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr; 788 } 789 789 // In same cycle, can have a previous branch_complete 790 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) 791 { 792 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); 793 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; 794 } 795 } 796 797 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s",toString(reg_UPT_EVENT_STATE [context]).c_str()); 798 799 // In all case : update good_take 800 reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; 801 802 // Write address_dest if need read register 803 Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; 804 805 if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or 806 (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or 807 (condition == BRANCH_CONDITION_READ_STACK ) ) 808 reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr; 809 } 810 } 790 811 791 812 // =================================================================== … … 797 818 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); 798 819 799 // if different : an other branch is occured 800 if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT) 820 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [i]; 821 822 switch (upt_event_state) 801 823 { 802 // Change state803 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i);804 reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT;824 case UPT_EVENT_STATE_KO_DECODE_UPDATE_CONTEXT : upt_event_state = UPT_EVENT_STATE_KO_DECODE_WAIT_END_EVENT; break; 825 case UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT : upt_event_state = UPT_EVENT_STATE_KO_COMMIT_WAIT_END_EVENT; break; 826 default : break; // an other branch is occured 805 827 } 828 829 reg_UPT_EVENT_STATE [i] = upt_event_state; 830 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s (branch_event)",toString(upt_event_state).c_str()); 806 831 } 807 832 … … 826 851 // * EVENT_TYPE_CSYNC - nothing 827 852 828 Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); 853 Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); 854 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [i]; 829 855 830 856 // Test if end of miss -> all previous branch is complete … … 837 863 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_BRANCH_MISS_SPECULATION"); 838 864 839 // #ifdef DEBUG_TEST 840 // if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) 841 // throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); 842 // #endif 843 // Special case : test if event and branch_complete ! 844 if (reg_EVENT_STATE [i] == EVENT_STATE_WAIT_END_EVENT) 865 switch (upt_event_state) 845 866 { 846 847 // Change state 848 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); 849 850 reg_EVENT_STATE [i] = EVENT_STATE_OK; 851 reg_IS_ACCURATE [i] = true; 852 853 Tdepth_t depth = reg_EVENT_UPT_PTR [i]; 854 855 if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) 856 { 857 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); 858 859 reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; 860 } 861 862 #ifdef DEBUG_TEST 863 // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) 864 // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); 865 // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO) 866 // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); 867 #endif 868 869 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",i,depth); 870 871 // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; 867 case UPT_EVENT_STATE_KO_COMMIT_WAIT_END_EVENT : 868 { 869 Tdepth_t depth = reg_EVENT_UPT_PTR [i]; 870 871 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 872 873 if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) 874 { 875 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); 876 877 reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; 878 } 879 880 reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; 881 reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; 882 883 // break; continue 884 } 885 case UPT_EVENT_STATE_KO_DECODE_WAIT_END_EVENT : 886 { 887 // Change state 888 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); 889 890 upt_event_state = UPT_EVENT_STATE_OK; 891 reg_IS_ACCURATE [i] = true; 892 893 break; 894 } 895 default : break; // an other branch is occured 872 896 } 897 873 898 break; 874 899 } … … 893 918 // (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); 894 919 895 bool find = false; // have slot to update ??? 896 Tdepth_t top = bottom; 897 Tdepth_t update = bottom; 898 bool empty = reg_UPT_EMPTY [i]; 920 bool find = false; // have slot to update ??? 921 bool find_top = false; 922 Tdepth_t top = bottom; 923 Tdepth_t update = bottom; 924 bool empty = reg_UPT_EMPTY [i]; 899 925 900 926 // flush all slot, because this event is in head of rob … … 902 928 { 903 929 Tdepth_t x = (bottom+j)%_param->_size_upt_queue[i]; 930 931 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d] : %s",x,toString(reg_UPDATE_PREDICTION_TABLE [i][x]._state).c_str()); 904 932 905 933 if ((reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_END) and 906 934 (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY)) 907 935 { 936 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find at UPT[%d]",x); 937 908 938 find = true; // find a not empty slot 909 reg_UPDATE_PREDICTION_TABLE [i][x]._state = UPDATE_PREDICTION_STATE_EVENT;939 reg_UPDATE_PREDICTION_TABLE [i][x]._state = UPDATE_PREDICTION_STATE_EVENT; 910 940 reg_UPDATE_PREDICTION_TABLE [i][x]._retire_ok = false; 911 941 update = x; … … 913 943 914 944 if (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY) 915 top = x+1; 945 if (not find_top) 946 { 947 top = x; 948 find_top = true; 949 } 916 950 } 917 918 top = top%_param->_size_upt_queue[i];919 951 920 952 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); 921 953 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 954 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update : %d",update); 922 955 923 956 // Test if have update slot 957 reg_UPT_TOP_EVENT [i] = reg_UPT_TOP[i]; 924 958 if (find) 925 959 { 926 960 // TODO : special case : event is an exception on branch, also depth is not valid 927 961 reg_UPT_TOP [i] = top; // depth is again valid 928 reg_UPT_TOP_EVENT [i] = top;929 962 930 963 if (bottom == reg_UPT_TOP [i]) 931 964 reg_UPT_EMPTY [i] = true; 965 966 reg_UPT_UPDATE [i] = update; 932 967 } 933 reg_UPT_UPDATE [i] = update;934 968 935 969 // new state : … … 939 973 // * ok : nothing 940 974 // * ko : flush upt 941 reg_EVENT_VAL [i] = find; 942 reg_EVENT_IS_BRANCH [i] = false; 975 // reg_EVENT_VAL [i] = find; 976 // reg_EVENT_IS_BRANCH [i] = false; 977 // reg_EVENT_UPT_PTR [i] = ((top==0)?_param->_size_upt_queue[i]:top)-1; ///// ZE MODIF 943 978 reg_EVENT_UPT_PTR [i] = top; 944 979 reg_EVENT_UPT_FULL [i] = (not empty and (bottom == reg_UPT_TOP [i])); … … 952 987 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); 953 988 954 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]);989 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); 955 990 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); 956 991 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL [i]); … … 958 993 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); 959 994 960 if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or 961 (reg_UFPT_NB_UPDATE [i] > 0)) 995 if (find) 962 996 { 963 if (find) 964 { 965 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (event - find)",i); 966 reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; 967 } 968 else 969 { 970 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (event - not find)",i); 971 // reg_EVENT_VAL [i] = false; 972 973 reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; 974 } 997 // have ras prediction ? 998 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT_EVENT [%d] <- UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT (event - find)",i); 999 1000 upt_event_state = UPT_EVENT_STATE_KO_EVENT_FLUSH_UPT; 975 1001 } 976 1002 else 977 1003 { 978 if (find) 979 { 980 // have ras prediction ? 981 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - find)",i); 982 983 reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; 984 } 985 else 986 { 987 // special case : nothing 988 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - not find)",i); 989 990 // reg_EVENT_VAL [i] = false; 991 992 reg_EVENT_STATE [i] = EVENT_STATE_OK; 993 } 1004 // special case : nothing 1005 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT_EVENT [%d] <- UPT_EVENT_STATE_KO_EVENT_WAIT_UFPT (event - not find)",i); 1006 1007 // reg_EVENT_VAL [i] = false; 1008 1009 upt_event_state = UPT_EVENT_STATE_KO_EVENT_WAIT_UFPT; 994 1010 } 995 996 // else no update997 998 // Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_EVENT_DEPTH [i]):0;999 // uint32_t top = reg_UPT_TOP [i];1000 // uint32_t bottom = reg_UPT_BOTTOM [i];1001 // uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1;1002 // // bool empty = reg_UPT_EMPTY [i];1003 1004 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top);1005 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth);1006 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update);1007 1008 // event_state_t event_state = reg_EVENT_STATE [i];1009 // bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or1010 // (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or1011 // (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or1012 // (event_state == EVENT_STATE_EVENT_FLUSH_UPT));1013 1014 // bool find = false; // have slot to update ???1015 // Tdepth_t depth_new = depth;1016 1017 // // flush all slot, because this event is in head of rob1018 // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i];1019 // //uint32_t j=bottom;1020 // j!=top;1021 // j=(j+1)%_param->_size_upt_queue[i])1022 // if ((reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_END) and1023 // (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY))1024 // {1025 // find = true;1026 // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT;1027 // reg_UPDATE_PREDICTION_TABLE [i][j]._retire_ok = false;1028 // }1029 // else1030 // if (not find) // while state == end or empty1031 // depth_new ++;1032 1033 // if ((reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END) and1034 // (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_EMPTY))1035 // {1036 // find = true;1037 // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT;1038 // reg_UPDATE_PREDICTION_TABLE [i][depth]._retire_ok = false;1039 1040 // }1041 // else1042 // // while state == end or empty1043 // depth = (depth_new+1)%_param->_size_upt_queue[i];1044 1045 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find);1046 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth_new : %d",depth_new);1047 1048 // // Test if have update slot1049 // if (find)1050 // {1051 // // // flush all slot after the event1052 // // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i];1053 // // j!=top;1054 // // j=(j+1)%_param->_size_upt_queue[i])1055 // // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT;1056 1057 // // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT;1058 1059 // // reg_UPT_BOTTOM [i];1060 // // TODO : special case : event is an exception on branch, also depth is not valid1061 // reg_UPT_TOP [i] = depth; // depth is again valid1062 // reg_UPT_TOP_EVENT [i] = top;1063 1064 // if (bottom == reg_UPT_TOP [i])1065 // reg_UPT_EMPTY [i] = true;1066 // }1067 1068 // bool full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]);1069 // bool update_ras = find and ((top != depth) or full);1070 1071 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras);1072 1073 // if (not previous_update_ras and update_ras)1074 // reg_UPT_UPDATE [i] = new_update;1075 1076 // // new state :1077 // // * test if ufpt is empty1078 // // * ok : flush upft and upt1079 // // * ko : test if have previous flush upt1080 // // * ok : nothing1081 // // * ko : flush upt1082 // reg_EVENT_VAL [i] = update_ras;1083 // reg_EVENT_UPT_PTR [i] = depth;1084 1085 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]);1086 // // if (reg_UFPT_NB_NEED_UPDATE [i] > 0)1087 // if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or1088 // (reg_UFPT_NB_UPDATE [i] > 0))1089 // {1090 // if (update_ras)1091 // {1092 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (branch_complete - miss)",i);1093 // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT;1094 // }1095 // else1096 // {1097 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (branch_complete - miss)",i);1098 // // reg_EVENT_VAL [i] = false;1099 1100 // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT;1101 // }1102 // }1103 // else1104 // {1105 // // if (not previous_update_ras)1106 // if (update_ras)1107 // {1108 // // have ras prediction ?1109 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (branch_complete - miss)",i);1110 1111 // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT;1112 // }1113 // else1114 // {1115 // // special case : nothing1116 // // reg_EVENT_VAL [i] = false;1117 1118 // reg_EVENT_STATE [i] = EVENT_STATE_OK;1119 // }1120 // }1121 1122 // // else no update1123 1124 // reg_EVENT_DEPTH [i] = depth;1125 // // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State1126 // // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take;1127 // // reg_EVENT_ADDRESS_DEST [i] = good_addr;1128 1011 1129 1012 break; … … 1135 1018 } 1136 1019 } 1020 1021 reg_UPT_EVENT_STATE [i] = upt_event_state; 1022 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EVENT_STATE : %s (branch_event)",toString(upt_event_state).c_str()); 1137 1023 } 1138 1024 … … 1149 1035 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); 1150 1036 1151 // It's to accelerate miss speculation 1037 // It's to accelerate miss speculation -> associative access 1152 1038 if (reg_UFPT_NB_NEED_UPDATE [i] == 0) 1153 1039 { … … 1157 1043 reg_UFPT_BOTTOM [i] = 0; 1158 1044 reg_UFPT_TOP [i] = 0; 1159 // reg_UFPT_UPDATE [i];1160 1045 } 1161 1046 else … … 1176 1061 } 1177 1062 1178 // // TOP is next write slot : last slot is TOP-1 1179 // uint32_t top = reg_UFPT_TOP [i]; 1180 // reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; 1181 1182 // reg_UFPT_BOTTOM [i]; 1183 // reg_UFPT_TOP [i]; 1063 // Change state 1064 reg_UFPT_EVENT_STATE [i] = UFPT_EVENT_STATE_KO_FLUSH; 1184 1065 } 1185 1066 … … 1187 1068 1188 1069 } 1070 1071 // Change state on UPT 1072 { 1073 upt_event_state_t upt_event_state = reg_UPT_EVENT_STATE [i]; 1074 ufpt_event_state_t ufpt_event_state = reg_UFPT_EVENT_STATE [i]; 1075 1076 // Test upt event to change state 1077 // test if upt wait ufpt 1078 if (ufpt_event_state == UFPT_EVENT_STATE_OK) 1079 switch (upt_event_state) 1080 { 1081 // this case when don't need flush upt (miss decod and can continue) 1082 case UPT_EVENT_STATE_KO_MISS_WAIT_UFPT : upt_event_state = UPT_EVENT_STATE_KO_COMMIT_UPDATE_CONTEXT; break; 1083 case UPT_EVENT_STATE_KO_EVENT_WAIT_UFPT : upt_event_state = UPT_EVENT_STATE_OK ; break; 1084 default : break; 1085 } 1086 1087 reg_UPT_EVENT_STATE [i] = upt_event_state; 1088 } 1189 1089 } 1190 1090 … … 1212 1112 { 1213 1113 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_IS_ACCURATE : %d",reg_IS_ACCURATE [i]); 1214 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d" ,reg_EVENT_VAL [i]); 1114 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UFPT_STATE : %s" ,toString(reg_UFPT_EVENT_STATE [i]).c_str()); 1115 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_STATE : %s" ,toString(reg_UPT_EVENT_STATE [i]).c_str()); 1116 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d" ,reg_EVENT_VAL [i]); 1215 1117 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); 1216 1118 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d" ,reg_EVENT_UPT_FULL [i]); 1217 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); 1218 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_IS_BRANCH : %d" ,reg_EVENT_IS_BRANCH [i]); 1119 // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_IS_BRANCH : %d" ,reg_EVENT_IS_BRANCH [i]); 1219 1120 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); 1220 1121 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]<<2); … … 1223 1124 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_CAN_CONTINUE : %d" ,reg_EVENT_CAN_CONTINUE [i]); 1224 1125 1225 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i);1126 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump UFPT [%d] (Update_Fetch_Prediction_Table)",i); 1226 1127 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_BOTTOM : %d",reg_UFPT_BOTTOM [i]); 1227 1128 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_TOP : %d",reg_UFPT_TOP [i]); … … 1246 1147 ); 1247 1148 1248 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i);1149 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump UPT [%d] (Update_Prediction_Table)",i); 1249 1150 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); 1250 1151 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]);
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