Ignore:
Timestamp:
Jun 8, 2009, 10:43:30 PM (15 years ago)
Author:
rosiere
Message:

1) Fix performance
2) add auto generation to SPECINT2000
3) add reset in genMoore and genMealy

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp

    r122 r123  
    3737    usage_environment(_usage);
    3838
    39 #if DEBUG_Core_Glue == true
    40     log_printf(INFO,Core_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
    41 
    42     std::cout << *param << std::endl;
    43 #endif   
     39// #if DEBUG_Core_Glue == true
     40//     log_printf(INFO,Core_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
     41
     42//     std::cout << *param << std::endl;
     43// #endif   
    4444
    4545    log_printf(INFO,Core_Glue,FUNCTION,_("<%s> : Allocation"),_name.c_str());
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_branch_complete.cpp

    r98 r123  
    3333        BRANCH_COMPLETE_OOO_ENGINE_ACK [i][j] = 0;
    3434
     35    if (PORT_READ(in_NRESET))
     36      {
    3537    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
    3638      for (uint32_t j=0; j<_param->_ooo_engine_nb_inst_branch_complete[i]; ++j)
     
    5456          PORT_WRITE(out_BRANCH_COMPLETE_OOO_ENGINE_MISS_PREDICTION [i][j], PORT_READ(in_BRANCH_COMPLETE_FRONT_END_MISS_PREDICTION [num_front_end][j]));
    5557        }
     58      }
    5659
    5760    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_commit_event.cpp

    r105 r123  
    3232      COMMIT_EVENT_OOO_ENGINE_ACK [i] = 0;
    3333
     34    if (PORT_READ(in_NRESET))
     35      {
    3436     for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
    3537       {
     
    5759       }
    5860
     61      }
     62
    5963    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
    6064      PORT_WRITE(out_COMMIT_EVENT_FRONT_END_VAL [i], COMMIT_EVENT_FRONT_END_VAL [i]);
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_execute.cpp

    r88 r123  
    3434        EXECUTE_EXECUTE_LOOP_ACK [i][j] = 0;
    3535   
     36    if (PORT_READ(in_NRESET))
     37      {
    3638
    3739    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
     
    6062          PORT_WRITE(out_EXECUTE_OOO_ENGINE_DATA         [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_DATA         [i][j]));
    6163        }
     64      }
    6265
    6366    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp

    r109 r123  
    2222    log_function(Core_Glue,FUNCTION,_name.c_str());
    2323
     24    if (PORT_READ(in_NRESET))
     25      {
    2426    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
    2527      for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)
     
    5052            }
    5153        }
     54      }
     55    else
     56      {
     57        for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
     58          for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)
     59            {
     60              Tcontext_t num_ooo_engine   = _param->_translate_execute_loop_num_ooo_engine [i][j];
     61             
     62              for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k)
     63                {
     64                  PORT_WRITE(out_INSERT_OOO_ENGINE_ACK  [num_ooo_engine][k],0);
     65                 PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],0);
     66                }
     67            }
     68      }
    5269
    5370    log_end(Core_Glue,FUNCTION);
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp

    r122 r123  
    6464    Tcontrol_t ISSUE_OOO_ENGINE_ACK   [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue_queue];
    6565    Tcontrol_t ISSUE_EXECUTE_LOOP_VAL [_param->_nb_execute_loop][_param->_max_nb_read_unit];
     66
     67    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
     68      for (uint32_t j=0; j<_param->_nb_inst_issue_queue[i]; ++j)
     69        ISSUE_OOO_ENGINE_ACK [i][j] = 0;
     70    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
     71      for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
     72        ISSUE_EXECUTE_LOOP_VAL [i][j] = 0;
     73   
     74    if (PORT_READ(in_NRESET))
     75      {
    6676    Tcontrol_t READ_UNIT_ENABLE       [_param->_nb_execute_loop][_param->_max_nb_read_unit];
    6777    Tcontrol_t SLOT_ENABLE            [_param->_nb_ooo_engine  ][_param->_max_nb_inst_issue_slot];
     
    6979    // Init -> all at 0
    7080    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
    71       {
    72         for (uint32_t j=0; j<_param->_nb_inst_issue_queue[i]; ++j)
    73           ISSUE_OOO_ENGINE_ACK [i][j] = 0;
    74         for (uint32_t j=0; j<_param->_nb_inst_issue_slot[i]; ++j)
    75           SLOT_ENABLE [i][j] = 1;         
    76       }
     81      for (uint32_t j=0; j<_param->_nb_inst_issue_slot[i]; ++j)
     82        SLOT_ENABLE [i][j] = 1;         
    7783
    7884    for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)
    7985      for (uint32_t j=0; j<_param->_nb_read_unit[i]; ++j)
    8086        {
    81           ISSUE_EXECUTE_LOOP_VAL [i][j] = 0;
    82 
    8387          // Read unit is enable is signal ack is set
    8488          READ_UNIT_ENABLE       [i][j] = (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1);
     
    236240      }
    237241
     242      }
     243
    238244    // Write output
    239245    for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)
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