- Timestamp:
- Jun 8, 2009, 10:43:30 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access.cpp
r88 r123 37 37 usage_environment(_usage); 38 38 39 #if DEBUG_Core == true40 log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str());41 42 std::cout << *param << std::endl;43 #endif39 // #if DEBUG_Core == true 40 // log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str()); 41 42 // std::cout << *param << std::endl; 43 // #endif 44 44 45 45 log_printf(INFO,Icache_Access,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp
r119 r123 23 23 Tcontrol_t icache_req_val [_param->_nb_icache_port]; 24 24 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 25 icache_req_val [i] = 0; 26 Tcontrol_t context_req_ack [_param->_nb_front_end][_param->_max_nb_context]; 27 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 28 for (uint32_t j=0; j<_param->_nb_context[i]; ++j) 29 context_req_ack [i][j] = 0; 30 31 if (PORT_READ(in_NRESET)) 25 32 { 26 icache_req_val [i] = 0; 27 33 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 34 { 28 35 #ifdef STATISTICS 29 36 _internal_ICACHE_REQ_NB_ACCESS [i] = 0; … … 32 39 } 33 40 34 Tcontrol_t context_req_ack [_param->_nb_front_end][_param->_max_nb_context];35 for (uint32_t i=0; i<_param->_nb_front_end; ++i)36 for (uint32_t j=0; j<_param->_nb_context[i]; ++j)37 context_req_ack [i][j] = 0;38 39 41 std::list<generic::priority::select_t> * select = _priority ->select(); 40 42 for (std::list<generic::priority::select_t>::iterator it=select ->begin(); … … 85 87 } 86 88 } 89 } 90 87 91 88 92 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_rsp.cpp
r88 r123 26 26 context_rsp_val [i][j] = 0; 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 29 31 { … … 75 77 } 76 78 79 } 80 else 81 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 82 PORT_WRITE(out_ICACHE_RSP_ACK [i],0); 83 77 84 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 78 85 for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
Note: See TracChangeset
for help on using the changeset viewer.