Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 122)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp	(revision 123)
@@ -53,6 +53,8 @@
               reg_EVENT_STATE           [i][j] = COMMIT_EVENT_STATE_NO_EVENT;
 //            reg_EVENT_FLUSH           [i][j] = false;
-              reg_EVENT_STOP            [i][j] = false;
+//            reg_EVENT_STOP            [i][j] = false;
               reg_EVENT_LAST            [i][j] = false;
+
+              reg_EVENT_NEXT_STOP       [i][j] = false;
 
 //            reg_PC_PREVIOUS           [i][j] = (0x100-4)>>2;
@@ -86,8 +88,8 @@
               //   * and decod_queue is empty
               //   * and have an event or have a futur event
-              if (not reg_EVENT_CAN_RESTART [i][j] and
-                   (PORT_READ(in_NB_INST_DECOD_ALL [i][j]) == 0) and
-                   (reg_EVENT_STOP [i][j] or (reg_EVENT_STATE [i][j] != COMMIT_EVENT_STATE_NO_EVENT)))
-                reg_EVENT_CAN_RESTART [i][j] = true;
+//               if (not reg_EVENT_CAN_RESTART [i][j] and
+//                    (PORT_READ(in_NB_INST_DECOD_ALL [i][j]) == 0) and
+//                    (reg_EVENT_STOP [i][j] or (reg_EVENT_STATE [i][j] != COMMIT_EVENT_STATE_NO_EVENT)))
+//                 reg_EVENT_CAN_RESTART [i][j] = true;
 
               // Test event state
@@ -100,7 +102,7 @@
                       {
                         // A minor optimisation : test if wait_decod is previously empty.
-                        if (not reg_EVENT_CAN_RESTART [i][j])
-                          reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_DECOD;
-                        else
+//                         if (not reg_EVENT_CAN_RESTART [i][j])
+//                           reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_DECOD;
+//                         else
                           reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END; 
                       }
@@ -108,20 +110,20 @@
                     break;
                   }
-                case COMMIT_EVENT_STATE_WAIT_DECOD : 
-                  {
-                    // Wait flush of decod_queue.
-                    // Test if can restart now
-                    if (reg_EVENT_CAN_RESTART [i][j])
-                      {
-                        //reg_EVENT_FLUSH [i][j] = false;
-
-                        // A minor optimisation : test if the last element is already retire
-                        if (not reg_EVENT_LAST [i][j])
-                          reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END;
-                        else
-                          reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END; 
-                      }
-                    break;
-                  }
+//                 case COMMIT_EVENT_STATE_WAIT_DECOD : 
+//                   {
+//                     // Wait flush of decod_queue.
+//                     // Test if can restart now
+//                     if (reg_EVENT_CAN_RESTART [i][j])
+//                       {
+//                         //reg_EVENT_FLUSH [i][j] = false;
+
+//                         // A minor optimisation : test if the last element is already retire
+//                         if (not reg_EVENT_LAST [i][j])
+//                           reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END;
+//                         else
+//                           reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END; 
+//                       }
+//                     break;
+//                   }
                 case COMMIT_EVENT_STATE_WAIT_END : 
                   {
@@ -138,9 +140,22 @@
                     
                     // flush of re order buffer is finish
-                    reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT;
                     reg_EVENT_LAST  [i][j] = false;
+
+                    if (not reg_EVENT_NEXT_STOP [i][j])
+                      reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT;
+                    else
+                      {
+                        reg_EVENT_NEXT_STOP [i][j] = false;
+                        reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j];
+                        reg_EVENT_STATE         [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT;
+//                      reg_EVENT_STOP          [i][j] = true;
+                        reg_EVENT_LAST_NUM_BANK [i][j] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
+                        reg_EVENT_LAST_NUM_PTR  [i][j] = reg_NUM_PTR_TAIL;
+                      }
+
                     break;
                   }
                   //case COMMIT_EVENT_STATE_NO_EVENT : 
+                  //case COMMIT_EVENT_STATE_NOT_YET_EVENT : 
                 default : break;
                 }
@@ -296,20 +311,21 @@
                       //     * or present_event 
                       //   * and not can_restart (previous empty decod queue), because between the event_stop (branch_complete) and the state event (miss in head), many cycle is occured.
-                      bool flush = ((// present event
-                                     ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or
-                                      (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD)) or
-                                     // futur event
-                                     reg_EVENT_STOP [front_end_id][context_id])
-                                    // can't restart
-                                    and not reg_EVENT_CAN_RESTART[front_end_id][context_id]
-                                    );
-
-                      if (flush)
-                        {
-                          // A new invalid instruction is push in rob -> new last instruction
-                          reg_EVENT_LAST          [front_end_id][context_id] = false;
-                          reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = num_bank;
-                          reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] = ptr;
-                        }
+//                       bool flush = ((// present event
+//                                      ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or
+//                                       (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD)
+//                                       ) or
+//                                      futur event
+//                                      reg_EVENT_STOP [front_end_id][context_id])
+//                                     // can't restart
+//                                     and not reg_EVENT_CAN_RESTART[front_end_id][context_id]
+//                                     );
+
+//                       if (flush)
+//                         {
+//                           // A new invalid instruction is push in rob -> new last instruction
+//                           reg_EVENT_LAST          [front_end_id][context_id] = false;
+//                           reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = num_bank;
+//                           reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] = ptr;
+//                         }
                       
                       // Update pointer
@@ -359,4 +375,6 @@
 		    // find the good entry !!!
 		    entry_t *       entry        = internal_BANK_COMMIT_ENTRY [i][j];
+
+		    log_printf(TRACE,Commit_unit,FUNCTION,"    * ptr        : %d",entry->ptr);
                                                  
 		  //Toperation_t    operation    = PORT_READ(in_COMMIT_OPERATION   [x]);
@@ -480,42 +498,82 @@
 
                     // Commit an instruction ... 
-                    // Test if have an event (miss_speculation or exception) and not manage a previous event
-                    // if yes, this instruction would modify state machine. Also stop Re Order Buffer
-
-//                  bool flush = reg_EVENT_FLUSH [entry->front_end_id][entry->context_id];
-                    bool flush = ((reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_EVENT) or
-                                  (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or
-                                  (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_WAIT_END));
-                    
-                    if ((have_exception or have_miss_speculation) and (not flush))
+                    // Test if have an event (miss_speculation or exception)
+
+                    if (have_exception or have_miss_speculation)
                       {
+                        // Two case :
+                        // if no previous manage event -> generate an event
+                        // if    previous manage event -> next generate an event
+
+//                      bool flush = reg_EVENT_FLUSH [front_end_id][context_id];
+                        bool flush = ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or
+//                                    (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or
+                                      (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END) or
+                                      (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_END)
+                                      );
+                        
                         uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | i);
-                        
-                        // test have a previous event detected (event_stop = 1)
-                        // if yes, test if the actual event if "before (in order)" that the previous event
-                        if (reg_EVENT_STOP [entry->front_end_id][entry->context_id])
+                        uint32_t _top   = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD);
+                            
+                        if (not flush)
                           {
-                            // Compare packet_id (by construction instruction is insert in order by increase packet_id)
-
-                            uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD);
-                            uint32_t _old = reg_EVENT_PACKET [entry->front_end_id][entry->context_id];
-                            uint32_t _new = packet;
-                            if (_old < _top) _old = _old+_param->_size_queue;
-                            if (_new < _top) _new = _new+_param->_size_queue;
-                            if (_new < _old) reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet;
+                            bool     can    = true;
+                            // test have a previous event detected (event_stop = 1)
+                            // if yes, test if the actual event if "before (in order)" that the previous event
+                            if (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT)
+                              {
+                                // Compare packet_id (by construction instruction is insert in order by increase packet_id)
+                                
+                                uint32_t _old = reg_EVENT_PACKET [front_end_id][context_id];
+                                uint32_t _new = packet;
+                                if (_old < _top) _old = _old+_param->_size_queue;
+                                if (_new < _top) _new = _new+_param->_size_queue;
+                                if (_new < _old) reg_EVENT_PACKET [front_end_id][context_id] = packet;
+                                else can = false;
+                              }
+                            else
+                              reg_EVENT_PACKET [front_end_id][context_id] = packet;
+                            
+                            if (can)
+                              {
+                                // have an error, stop issue instruction
+                                reg_EVENT_STATE         [front_end_id][context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT;
+                                //                      reg_EVENT_STOP          [front_end_id][context_id] = true;
+                                
+                                reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
+                                reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] = reg_NUM_PTR_TAIL;
+                              }
                           }
                         else
-                          reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet;
-                        
-                        // have an error, stop issue instruction
-                        reg_EVENT_STOP          [entry->front_end_id][entry->context_id] = true;
-//                         reg_EVENT_NUM_BANK      [entry->front_end_id][entry->context_id] = i;
-//                         reg_EVENT_NUM_PTR       [entry->front_end_id][entry->context_id] = entry->ptr;
-
-//                      reg_EVENT_CAN_RESTART   [entry->front_end_id][entry->context_id] = false;
-                        reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
-                        reg_EVENT_LAST_NUM_PTR  [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL;
+                          {
+                            bool find = true;
+
+                            // already manage an event.
+                            if (reg_EVENT_NEXT_STOP [front_end_id][context_id])
+                              {
+                                // after last ?
+                                uint32_t _old = reg_EVENT_NEXT_PACKET [front_end_id][context_id];
+                                uint32_t _new = packet;
+                                if (_old < _top) _old = _old+_param->_size_queue;
+                                if (_new < _top) _new = _new+_param->_size_queue;
+                                if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet;
+                                find = false;
+                              }
+                            else
+                              {
+                                // after last ?
+                                uint32_t _old = ((reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [front_end_id][context_id]);
+                                uint32_t _new = packet;
+                                if (_old < _top) _old = _old+_param->_size_queue;
+                                if (_new < _top) _new = _new+_param->_size_queue;
+                                if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet;
+                                find = false;
+                              }
+
+                            if (find)
+                            reg_EVENT_NEXT_STOP [front_end_id][context_id] = true; // in all case : need stop
+                          }
                       }
-                    
+
 		    // Update Re Order Buffer
 		    entry->state        = state;
@@ -633,20 +691,18 @@
 	              {
                           reg_EVENT_STATE         [front_end_id][context_id] = COMMIT_EVENT_STATE_EVENT;
-//                        reg_EVENT_FLUSH         [front_end_id][context_id] = true;
-                          reg_EVENT_STOP          [front_end_id][context_id] = false; // instruction flow can continue
-//                        reg_EVENT_CAN_RESTART   [front_end_id][context_id] = false;
+//                        reg_EVENT_STOP          [front_end_id][context_id] = false; // instruction flow can continue
                           reg_EVENT_LAST          [front_end_id][context_id] = false;
                           // it the head !
                           reg_EVENT_PACKET        [front_end_id][context_id] = packet_id;
 	            
-                          // If event is an load_miss, many instruction can be inserted. 
-                          // -> new last instruction
-                          if (state == ROB_END_LOAD_MISS)
-                            {
-                            reg_EVENT_CAN_RESTART   [front_end_id][context_id] = false;
+//                           // If event is an load_miss, many instruction can be inserted. 
+//                           // -> new last instruction
+//                           if (state == ROB_END_LOAD_MISS)
+//                             {
+// //                             reg_EVENT_CAN_RESTART   [front_end_id][context_id] = false;
                             
-                            reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
-                            reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] = reg_NUM_PTR_TAIL;
-                            }
+//                             reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
+//                             reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] = reg_NUM_PTR_TAIL;
+//                             }
                         }
 	            
@@ -654,5 +710,6 @@
                     //   * need event
                     //   * packet id = last packet id
-                    if ((reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and
+                    if (((reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT     ) and
+                         (reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and
                         (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank            ) and
                         (reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] == entry->ptr          ))
@@ -666,8 +723,4 @@
 	            // Update pointer
 	            reg_NUM_BANK_HEAD = (num_bank+1)%_param->_nb_bank;
-                    
-	            // Remove entry
-	            delete entry;
-	            _rob [num_bank].pop_front();
                     
                     // Reset watch dog timer because have transaction on retire interface
@@ -708,4 +761,8 @@
 	            }
 #endif	    
+
+	            // Remove entry
+	            delete entry;
+	            _rob [num_bank].pop_front();
 	          }
 	      }
@@ -775,8 +832,9 @@
               if (miss)
                 {
+                  bool     can    = true;
                   uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | num_bank);
                       
                   // test if this packet is before previous event
-                  if (reg_EVENT_STOP [entry->front_end_id][entry->context_id])
+                  if (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT)
                     {
                       uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD);
@@ -786,17 +844,20 @@
                       if (_new < _top) _new = _new+_param->_size_queue;
                       if (_new < _old) reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet;
+                      else can = false;
                     }
                   else
                     reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet;
 
-                  // In all case, stop instruction flow
-                  reg_EVENT_STOP          [entry->front_end_id][entry->context_id] = true;
-//                   reg_EVENT_NUM_BANK      [entry->front_end_id][entry->context_id] = num_bank;
-//                   reg_EVENT_NUM_PTR       [entry->front_end_id][entry->context_id] = entry->ptr;
-
-                  reg_EVENT_CAN_RESTART   [entry->front_end_id][entry->context_id] = false;
-
-                  reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
-                  reg_EVENT_LAST_NUM_PTR  [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL;
+                  if (can)
+                    {
+                      // In all case, stop instruction flow
+                      reg_EVENT_STATE         [entry->front_end_id][entry->context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT;
+//                    reg_EVENT_STOP          [entry->front_end_id][entry->context_id] = true;
+
+//                    reg_EVENT_CAN_RESTART   [entry->front_end_id][entry->context_id] = false;
+
+                      reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;
+                      reg_EVENT_LAST_NUM_PTR  [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL;
+                    }
                 }
 	    }
@@ -902,5 +963,5 @@
                       
                       bool         flush         = ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or
-                                                    (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or
+//                                                  (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or
                                                     (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END));
                       bool         speculative   = entry->speculative and not (depth == depth_min);
@@ -1005,5 +1066,6 @@
                       
                       // Test if this instruction is the last of event
-                      if ((reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and
+                      if (((reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and
+                           (reg_EVENT_STATE         [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and
                           (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank            ) and
                           (reg_EVENT_LAST_NUM_PTR  [front_end_id][context_id] == entry->ptr          ))
@@ -1044,10 +1106,12 @@
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STATE       : %s - %s",toString(reg_EVENT_STATE [i][j]).c_str(),toString(commit_event_state_to_event_state(reg_EVENT_STATE [i][j])).c_str());
 //          log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_FLUSH       : %d",reg_EVENT_FLUSH [i][j]);
-            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STOP        : %d",reg_EVENT_STOP  [i][j]);
-//             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT             : %d (bank %d, ptr %d)",((reg_EVENT_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_NUM_BANK [i][j]), reg_EVENT_NUM_BANK [i][j],reg_EVENT_NUM_PTR [i][j]);
-            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_CAN_RESTART : %d",reg_EVENT_CAN_RESTART [i][j]);
+//          log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STOP        : %d",reg_EVENT_STOP  [i][j]);
+//          log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT             : %d (bank %d, ptr %d)",((reg_EVENT_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_NUM_BANK [i][j]), reg_EVENT_NUM_BANK [i][j],reg_EVENT_NUM_PTR [i][j]);
+//          log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_CAN_RESTART : %d",reg_EVENT_CAN_RESTART [i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_PACKET      : %d",reg_EVENT_PACKET[i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_LAST        : %d",reg_EVENT_LAST [i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_LAST        : %d (bank %d, ptr %d)",((reg_EVENT_LAST_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [i][j]), reg_EVENT_LAST_NUM_BANK [i][j],reg_EVENT_LAST_NUM_PTR [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_NEXT_STOP   : %d",reg_EVENT_NEXT_STOP  [i][j]);
+            log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_NEXT_PACKET : %d",reg_EVENT_NEXT_PACKET[i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_ALL       : %d",reg_NB_INST_COMMIT_ALL[i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * NB_INST_MEM       : %d",reg_NB_INST_COMMIT_MEM[i][j]);
@@ -1065,5 +1129,8 @@
         }
 
-      bool all_empty = false;
+      bool     all_empty   = false;
+      uint32_t nb_write_rd = 0;
+      uint32_t nb_write_re = 0;
+
       while (not all_empty)
         {
@@ -1078,4 +1145,7 @@
                 {
                   all_empty = false;
+
+                  nb_write_rd += ((*it)->write_rd)?1:0;
+                  nb_write_re += ((*it)->write_re)?1:0;
 
                   log_printf(TRACE,Commit_unit,FUNCTION,"        [%.4d][%.4d] (%.4d) %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s",
@@ -1130,4 +1200,7 @@
             }
         }
+
+      log_printf(TRACE,Commit_unit,FUNCTION,"    * nb_write_rd   : %d",nb_write_rd);
+      log_printf(TRACE,Commit_unit,FUNCTION,"    * nb_write_re   : %d",nb_write_re);
     }
 #endif
