Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp	(revision 82)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp	(revision 131)
@@ -3,9 +3,10 @@
  * $Id$
  *
- * [ Description ]
+ * [ Description ]
  * 
  */
 
 #include "Behavioural/Generic/RegisterFile/include/RegisterFile.h"
+#include "Behavioural/include/Allocation.h"
 
 namespace morpheo                    {
@@ -13,5 +14,4 @@
 namespace generic {
 namespace registerfile {
-
 
   void RegisterFile::allocation (
@@ -27,56 +27,38 @@
     log_printf(FUNC,RegisterFile,"allocation","Begin");
 
-    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#ifdef SYSTEMCASS_SPECIFIC
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     {
-      in_CLOCK              = new SC_CLOCK           ("in_CLOCK" );
-      in_NRESET             = new SC_IN (Tcontrol_t) ("in_NRESET");
+      __ALLOC0_SIGNAL(in_CLOCK ,"in_CLOCK" ,SC_CLOCK          );
+      __ALLOC0_SIGNAL(in_NRESET,"in_NRESET",SC_IN (Tcontrol_t));
     }
-    // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      __ALLOC1_INTERFACE_BEGIN("READ",_param->_nb_port_read);
 
-     in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];
-    out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];
-    if (_param->_have_port_address == true)
-     in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read];
-    out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param->_nb_port_read];
+      __ALLOC1_SIGNAL_IN ( in_READ_VAL    ,"VAL"    ,Tcontrol_t);
+      __ALLOC1_SIGNAL_OUT(out_READ_ACK    ,"ACK"    ,Tcontrol_t);
+      if (_param->_have_port_address)
+      __ALLOC1_SIGNAL_IN ( in_READ_ADDRESS,"ADDRESS",Taddress_t);
+      __ALLOC1_SIGNAL_OUT(out_READ_DATA   ,"DATA"   ,Tdata_t   );
 
-    for (uint32_t i=0; i<_param->_nb_port_read; i++)
-      { 
-	rename =  "in_READ_"+toString(i)+"_VAL"    ;
-	 in_READ_VAL     [i]  = new SC_IN (Tcontrol_t) (rename.c_str());   
-	rename = "out_READ_"+toString(i)+"_ACK"    ;
-	out_READ_ACK     [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
-	if (_param->_have_port_address == true)
-	  {
-	rename =  "in_READ_"+toString(i)+"_ADDRESS";
-	 in_READ_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
-	  }
-	rename = "out_READ_"+toString(i)+"_DATA"   ;
-	out_READ_DATA    [i]  = new SC_OUT(Tdata_t   ) (rename.c_str());
-      }
+      __ALLOC1_INTERFACE_END(_param->_nb_port_read);
+    }
 
-    // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      __ALLOC1_INTERFACE_BEGIN("WRITE",_param->_nb_port_write);
 
-     in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param->_nb_port_write];
-    out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write];
-    if (_param->_have_port_address == true)
-     in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param->_nb_port_write];
-     in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_write];
-    
-    for (uint32_t i=0; i<_param->_nb_port_write; i++)
-      {
-	rename =  "in_WRITE_"+toString(i)+"_VAL"    ;
-	 in_WRITE_VAL     [i]  = new SC_IN (Tcontrol_t) (rename.c_str());
-	rename = "out_WRITE_"+toString(i)+"_ACK"    ;
-	out_WRITE_ACK     [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
-	if (_param->_have_port_address == true)
-	  {
-	rename =  "in_WRITE_"+toString(i)+"_ADDRESS";
-	 in_WRITE_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
-	  }
-	rename =  "in_WRITE_"+toString(i)+"_DATA"   ;
-	 in_WRITE_DATA    [i]  = new SC_IN (Tdata_t   ) (rename.c_str());
-      }
+      __ALLOC1_SIGNAL_IN ( in_WRITE_VAL    ,"VAL"    ,Tcontrol_t);
+      __ALLOC1_SIGNAL_OUT(out_WRITE_ACK    ,"ACK"    ,Tcontrol_t);
+      if (_param->_have_port_address)
+      __ALLOC1_SIGNAL_IN ( in_WRITE_ADDRESS,"ADDRESS",Taddress_t);
+      __ALLOC1_SIGNAL_IN ( in_WRITE_DATA   ,"DATA"   ,Tdata_t   );
 
-    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~                                                                                                
+      __ALLOC1_INTERFACE_END(_param->_nb_port_write);
+    }
+#endif
+
+     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~                                                                                                
     if (_param->_instance == instance_RegisterFile_Monolithic)
     // =====[ component_RegisterFile_Monolithic ]=========================
@@ -106,5 +88,6 @@
     // =====[ Component_RegisterFile_Monolithic - Instanciation ]=========
       {
-	(*(component_RegisterFile_Monolithic  ->in_CLOCK )) (*(in_CLOCK ));
+#ifdef SYSTEMCASS_SPECIFIC
+        (*(component_RegisterFile_Monolithic  ->in_CLOCK )) (*(in_CLOCK ));
 	(*(component_RegisterFile_Monolithic  ->in_NRESET)) (*(in_NRESET));
 	
@@ -126,8 +109,23 @@
 	    (*(component_RegisterFile_Monolithic  -> in_WRITE_DATA    [i])) (*( in_WRITE_DATA    [i]));
 	  }
+#else
+	 in_CLOCK         = component_RegisterFile_Monolithic-> in_CLOCK        ;
+	 in_NRESET        = component_RegisterFile_Monolithic-> in_NRESET       ;
+
+         in_READ_VAL      = component_RegisterFile_Monolithic-> in_READ_VAL     ;   
+        out_READ_ACK      = component_RegisterFile_Monolithic->out_READ_ACK     ;
+         in_READ_ADDRESS  = component_RegisterFile_Monolithic-> in_READ_ADDRESS ;
+        out_READ_DATA     = component_RegisterFile_Monolithic->out_READ_DATA    ;
+
+         in_WRITE_VAL     = component_RegisterFile_Monolithic-> in_WRITE_VAL    ;
+        out_WRITE_ACK     = component_RegisterFile_Monolithic->out_WRITE_ACK    ;
+         in_WRITE_ADDRESS = component_RegisterFile_Monolithic-> in_WRITE_ADDRESS;
+         in_WRITE_DATA    = component_RegisterFile_Monolithic-> in_WRITE_DATA   ;
+#endif
       }
     else
     // =====[ Component_RegisterFile_Multi_Banked - Instanciation ]=======
       {
+#ifdef SYSTEMCASS_SPECIFIC
 	(*(component_RegisterFile_Multi_Banked->in_CLOCK )) (*(in_CLOCK ));
 	(*(component_RegisterFile_Multi_Banked->in_NRESET)) (*(in_NRESET));
@@ -150,4 +148,19 @@
 	    (*(component_RegisterFile_Multi_Banked-> in_WRITE_DATA    [i])) (*( in_WRITE_DATA    [i]));
 	  }
+#else
+	 in_CLOCK         = component_RegisterFile_Multi_Banked-> in_CLOCK        ;
+	 in_NRESET        = component_RegisterFile_Multi_Banked-> in_NRESET       ;
+	
+         in_READ_VAL      = component_RegisterFile_Multi_Banked-> in_READ_VAL     ;   
+        out_READ_ACK      = component_RegisterFile_Multi_Banked->out_READ_ACK     ;
+         in_READ_ADDRESS  = component_RegisterFile_Multi_Banked-> in_READ_ADDRESS ;
+        out_READ_DATA     = component_RegisterFile_Multi_Banked->out_READ_DATA    ;
+        
+         in_WRITE_VAL     = component_RegisterFile_Multi_Banked-> in_WRITE_VAL    ;
+        out_WRITE_ACK     = component_RegisterFile_Multi_Banked->out_WRITE_ACK    ;
+         in_WRITE_ADDRESS = component_RegisterFile_Multi_Banked-> in_WRITE_ADDRESS;
+         in_WRITE_DATA    = component_RegisterFile_Multi_Banked-> in_WRITE_DATA   ;
+#endif
+
       }
 
