Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 135) @@ -140,6 +140,6 @@ ALLOC1_VALACK_IN ( in_SPR_READ_ACK ,ACK); ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID ,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); - ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data); + ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA ,"data" ,Tgeneral_data_t ,_param->_size_special_data); ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA_VAL ,"data_val" ,Tcontrol_t ,1); @@ -165,6 +165,6 @@ ALLOC1_VALACK_IN (in_SPR_WRITE_VAL ,VAL); ALLOC1_SIGNAL_IN (in_SPR_WRITE_OOO_ENGINE_ID ,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); - ALLOC1_SIGNAL_IN (in_SPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_IN (in_SPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data); + ALLOC1_SIGNAL_IN (in_SPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN (in_SPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_special_data); ALLOC1_INTERFACE_END(_param->_nb_spr_write); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 135) @@ -136,6 +136,6 @@ ALLOC1_VALACK_IN ( in_SPR_WRITE_VAL ,VAL); ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); - ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_IN ( in_SPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data); + ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_IN ( in_SPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_special_data); ALLOC1_INTERFACE_END(_param->_nb_spr_write); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp (revision 135) @@ -158,6 +158,6 @@ ALLOC1_VALACK_OUT(out_SPR_EVENT_VAL ,VAL); ALLOC1_VALACK_IN ( in_SPR_EVENT_ACK ,ACK); - ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EPCR ,"epcr" ,Taddress_t, _param->_size_instruction_address); - ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR ,"eear" ,Taddress_t, _param->_size_instruction_address); + ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EPCR ,"epcr" ,Taddress_t, _param->_size_spr); + ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR ,"eear" ,Taddress_t, _param->_size_spr); ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR_WEN ,"eear_wen" ,Tcontrol_t,1); ALLOC1_SIGNAL_OUT(out_SPR_EVENT_SR_DSX ,"sr_dsx" ,Tcontrol_t,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod.fig (revision 135) @@ -0,0 +1,68 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +6 150 750 1500 1350 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 1500 1350 1500 750 150 750 150 1350 1500 1350 +4 1 0 50 -1 2 10 0.0000 0 120 795 825 1050 IFetch Unit\001 +-6 +6 150 1950 1500 2550 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 1500 2550 1500 1950 150 1950 150 2550 1500 2550 +4 1 0 50 -1 2 10 0.0000 0 120 795 825 2250 IFetch Unit\001 +-6 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 8850 2550 8850 1200 7350 1200 7350 2550 8850 2550 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 5400 3150 5400 2250 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 6075 3750 6075 3000 4725 3000 4725 3750 6075 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 3000 900 3300 1650 3000 2400 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 6150 2550 6150 750 2700 750 2700 2550 6150 2550 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3300 1650 3600 1650 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3900 2250 3900 3150 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 4575 3750 4575 3000 3225 3000 3225 3750 4575 3750 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 3150 4350 2250 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 3150 4950 2250 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1350 1050 3000 1050 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1350 2250 3000 2250 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 3000 900 3300 900 3300 2400 3000 2400 3000 900 +2 4 0 1 0 7 50 -1 -1 0.000 0 0 7 0 0 5 + 3600 1050 3600 2250 5625 2250 5625 1050 3600 1050 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5625 1650 7500 1650 +4 1 0 50 -1 3 10 0.0000 0 165 615 4650 1650 D\351codage\001 +4 1 0 50 -1 0 10 0.0000 0 105 360 3675 2850 Event\001 +4 1 0 50 -1 0 10 0.0000 0 105 570 4650 2850 Continue\001 +4 1 0 50 -1 0 10 0.0000 0 105 420 5625 2850 Branch\001 +4 1 0 50 -1 2 10 0.0000 0 120 1050 5400 3450 Prediction Unit\001 +4 1 0 50 -1 2 10 0.0000 0 105 945 3900 3450 Context State\001 +4 1 0 50 -1 2 10 0.0000 0 105 450 4425 975 Decod\001 +4 1 0 50 -1 0 10 0.0000 0 105 765 6750 1425 Instructions\001 +4 1 0 50 -1 2 10 0.0000 0 135 885 8100 1950 Decod Queue\001 +4 1 0 50 -1 0 10 0.0000 0 105 765 2100 1200 Instructions\001 +4 1 0 50 -1 0 10 0.0000 0 105 765 2100 2175 Instructions\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_instruction.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_instruction.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_instruction.fig (revision 135) @@ -0,0 +1,95 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 300 3525 1800 3525 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 300 3600 1800 3600 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 300 3675 1800 3675 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1950 3150 1950 3375 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 1800 3375 2100 3375 2100 3825 1800 3825 1800 3375 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 1800 3375 2100 3600 1800 3825 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 6300 1275 7050 2475 6300 3675 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 6300 1275 7050 1275 7050 3675 6300 3675 6300 1275 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 7050 2475 7950 2475 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6675 675 6675 1275 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4800 1425 6300 1425 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4500 2175 6300 2175 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4800 1500 6300 1500 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4800 1575 6300 1575 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 3375 6300 3375 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 4050 3000 4350 3375 4050 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 2775 4200 3000 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 4050 3000 4350 3000 4350 3750 4050 3750 4050 3000 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2400 3150 4050 3150 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2400 3225 4050 3225 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2400 3300 4050 3300 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2100 3600 4050 3600 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2700 2100 4200 2100 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2700 2175 4200 2175 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2700 2250 4200 2250 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 1725 4350 1950 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 4200 1950 4500 1950 4500 2400 4200 2400 4200 1950 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 4200 1950 4500 2175 4200 2400 +4 0 0 50 -1 0 8 0.0000 0 120 1485 300 3450 Instructions d\351calage registre\001 +4 1 0 50 -1 0 8 0.0000 0 90 615 1950 3075 OPCOD_11\001 +4 2 0 50 -1 0 8 0.0000 0 105 765 7950 2400 out_instruction\001 +4 1 0 50 -1 0 8 0.0000 0 90 555 6675 450 OPCOD_0\001 +4 0 0 50 -1 0 8 0.0000 0 90 1335 4800 1350 Instructions avec immediat\001 +4 1 0 50 -1 0 8 0.0000 0 105 1020 6675 600 in_instruction[31:26]\001 +4 1 0 50 -1 0 8 0.0000 0 90 555 4200 2700 OPCOD_3\001 +4 0 0 50 -1 0 8 0.0000 0 120 1515 2400 3075 Instructions registre \340 registre\001 +4 0 0 50 -1 0 8 0.0000 0 90 1425 2700 2025 Instructions sur les flottants\001 +4 1 0 50 -1 0 8 0.0000 0 90 555 4350 1650 OPCOD_1\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_signaux.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_signaux.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/doc/fig/Decod_signaux.fig (revision 135) @@ -0,0 +1,128 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5250.000 1350.000 4950 1350 5250 1650 5550 1350 +6 1275 2850 1725 3600 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 1350.000 3225.000 1350 2925 1650 3225 1350 3525 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 1350.000 3225.000 1350 2925 1650 3225 1350 3525 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 1350 2925 1350 3525 +-6 +6 2325 2700 2775 3450 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 2400.000 3075.000 2400 2775 2700 3075 2400 3375 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 2400.000 3075.000 2400 2775 2700 3075 2400 3375 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 2400 2775 2400 3375 +-6 +6 5475 2550 5925 3300 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 5550.000 2925.000 5550 2625 5850 2925 5550 3225 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 5550.000 2925.000 5550 2625 5850 2925 5550 3225 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 5550 2625 5550 3225 +-6 +6 4725 2025 5475 2475 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5100.000 2100.000 4800 2100 5100 2400 5400 2100 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5100.000 1875.000 4800 2100 5100 2250 5400 2100 +-6 +6 3750 1350 4050 1875 +1 3 0 1 0 7 50 -1 -1 0.000 1 0.0000 3900 1725 75 75 3900 1725 3975 1725 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 3750 1350 3900 1650 4050 1350 3750 1350 +-6 +6 5250 600 5550 1125 +1 3 0 1 0 7 50 -1 -1 0.000 1 0.0000 5400 975 75 75 5400 975 5475 975 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 5250 600 5400 900 5550 600 5250 600 +-6 +6 8925 2400 9375 3150 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 9000.000 2775.000 9000 2475 9300 2775 9000 3075 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 9000.000 2775.000 9000 2475 9300 2775 9000 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 9000 2475 9000 3075 +-6 +6 8175 1875 8925 2325 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 8550.000 1950.000 8250 1950 8550 2250 8850 1950 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 8550.000 1725.000 8250 1950 8550 2100 8850 1950 +-6 +6 7500 1200 7800 1725 +1 3 0 1 0 7 50 -1 -1 0.000 1 0.0000 7650 1575 75 75 7650 1575 7725 1575 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 7500 1200 7650 1500 7800 1200 7500 1200 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 300 3075 1350 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 300 3375 1350 3375 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 3225 2400 3225 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 2100 2475 2100 2925 2400 2925 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 2700 3075 5550 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 5100 2400 5100 2775 5550 2775 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 4950 1350 5550 1350 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 3900 1800 3900 1950 4950 1950 4950 2175 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5250 1650 5250 2175 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3000 1050 3900 1050 3900 1350 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4500 1050 5100 1050 5100 1350 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 5400 1050 5400 1050 5400 1350 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 6450 300 5400 300 5400 600 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 2925 9000 2925 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 8550 2250 8550 2625 9000 2625 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 7650 1650 7650 1800 8400 1800 8400 2025 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8700 1350 8700 2025 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 7650 900 7650 1200 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 9300 2400 9300 600 6900 600 6900 2400 9300 2400 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 6600 2550 6600 0 2850 0 2850 2550 6600 2550 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 9300 2775 10050 2775 +4 0 0 50 -1 0 8 0.0000 0 120 765 300 3000 ifetch_val[x][y]\001 +4 0 0 50 -1 0 8 0.0000 0 105 795 300 3300 can_continue[x]\001 +4 0 0 50 -1 0 8 0.0000 0 90 900 3000 975 TYPE_BRANCH\001 +4 1 0 50 -1 0 8 0.0000 0 120 1095 2100 2400 context_depth_val[x]\001 +4 0 0 50 -1 0 8 0.0000 0 105 600 4500 975 Predict_ack\001 +4 2 0 50 -1 0 8 0.0000 0 105 1110 6450 225 have_decod_branch[x]\001 +4 0 0 50 -1 3 8 0.0000 0 75 465 6000 2400 BLOC IF\001 +4 1 0 50 -1 0 8 0.0000 0 90 1185 7650 825 EVENT_TYPE_NONE\001 +4 1 0 50 -1 0 8 0.0000 0 90 975 8700 1275 context_event_ack\001 +4 0 0 50 -1 3 8 0.0000 0 75 465 7050 2250 BLOC IF\001 +4 2 0 50 -1 0 8 0.0000 0 90 510 10050 2700 decod_val\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 135) @@ -200,5 +200,5 @@ PORT_WRITE(out_DECOD_NUM_REG_RE [i], _decod_instruction->_num_reg_re ); PORT_WRITE(out_DECOD_EXCEPTION_USE [i], _decod_instruction->_exception_use ); -// PORT_WRITE(out_DECOD_EXCEPTION [i], _decod_instruction->_exception ); + PORT_WRITE(out_DECOD_EXCEPTION [i], _decod_instruction->_exception ); // Branch predictor can accept : the depth is valid Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 135) @@ -17,4 +17,13 @@ namespace decod { +#define instruction_illegale(tab,num_inst) vhdl->set_comment(tab," ILLEGAL INSTRUCTION --");\ + vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_ILLEGAL_INSTRUCTION)+"; "); \ + vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_ILLEGAL_INSTRUCTION)+"; "); \ + vhdl->set_body(tab,"if internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_IS_DELAY_SLOT = '1' then "); \ + vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_CONTEXT_0_ADDRESS_PREVIOUS; "); \ + vhdl->set_body(tab,"else "); \ + vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS; "); \ + vhdl->set_body(tab,"end if;"); \ + vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); #undef FUNCTION @@ -23,5 +32,2540 @@ { log_printf(FUNC,Decod,FUNCTION,"Begin"); + + std::string extend_signal; + + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_VAL <= internal_DECOD_"+toString(i)+"_VAL; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_TYPE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_OPERATION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_HAS_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT; "); +#ifdef DEBUG + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); +#endif + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS <= in_IFETCH_0_ADDRESS + "+std_logic_cst(_param->_size_instruction_address,i)+" ;"); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(0,"internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + '1'; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_STATE <= in_IFETCH_0_BRANCH_STATE; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_VAL <= internal_PREDICT_"+toString(i)+"_VAL; "); + + if(_param->_have_port_depth) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID <= in_IFETCH_0_BRANCH_UPDATE_PREDICTION_ID; "); + if(_param->_have_port_inst_ifetch_ptr) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN in_IFETCH_0_INST_IFETCH_PTR = "+std_logic_cst(_param->_size_inst_ifetch_ptr,i)+" ELSE '0'; "); + else vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0' ; "); + } + vhdl->set_body (""); + + if(_param->_have_port_context_id){ + + } + else{ + + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_0_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; "); + for(uint32_t i = 1;i < _param->_nb_inst_decod;i++){ + + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT <= internal_HAVE_DECOD_BRANCH"+toString(i-1)+"; "); + } + + vhdl->set_body(0,"out_CONTEXT_EVENT_VAL <= internal_CONTEXT_EVENT_VAL; "); + vhdl->set_body(0,"out_CONTEXT_EVENT_TYPE <= internal_DECOD_INSTRUCTION_0_EVENT_TYPE WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); + vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS <= internal_DECOD_INSTRUCTION_0_ADDRESS; "); + vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS_EPCR <= internal_DECOD_INSTRUCTION_0_ADDRESS_NEXT; "); + vhdl->set_body(0,"out_CONTEXT_EVENT_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; "); + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"out_IFETCH_0_"+toString(i)+"_ACK <= internal_IFETCH_0_"+toString(i)+"_ACK; "); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_CONTEXT_EVENT_VAL <= internal_DECOD_0_VAL AND internal_IFETCH_0_0_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '0'; "); + + for(uint32_t x = 0;x < _param->_nb_context;x++){ + if(_param->_nb_inst_decod <= 1){ + vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_0 <= '0'; "); + vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE; "); + } + else{ + vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE WHEN internal_DECOD_INSTRUCTION_0_TYPE /= "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE ( in_CONTEXT_"+toString(x)+"_DECOD_ENABLE AND in_PREDICT_0_CAN_CONTINUE ); "); + for(uint32_t i = 1;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_"+toString(i)+" <= internal_DECOD_BRANCH_"+toString(i-1)+"_VAL; "); + } + vhdl->set_body(0,"internal_CONTEXT_"+toString(x)+"_HAVE_TRANSACTION <= internal_IFETCH_"+toString(x)+"_0_ACK "); + for (uint32_t y = 1; y < _param->_nb_inst_fetch[x]; y++) vhdl->set_body(1,"OR internal_IFETCH_"+toString(x)+"_"+toString(y)+"_ACK "); + vhdl->set_body(0,";"); + } + + if(_param->_nb_inst_decod <= 1){ + + vhdl->set_body(0,"internal_DECOD_BRANCH_0_VAL <= in_PREDICT_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '1'; "); + vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_0_VAL <= in_CONTEXT_EVENT_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '1'; "); + vhdl->set_body(0,"internal_DECOD_0_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; "); + vhdl->set_body(0,"internal_IFETCH_0_0_ACK <= ((( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_DECOD_0_ACK ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; "); + + vhdl->set_body(0,"internal_PREDICT_0_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 AND in_CONTEXT_0_DEPTH_VAL AND in_DECOD_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0'; "); + } + else{ // TO DO + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(0,"internal_PREDICT_"+toString(i)+"_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_DECOD_"+toString(i)+"_ACK AND in_CONTEXT_0_DEPTH_VAL WHEN ( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) = '1' ELSE '0'; "); + + vhdl->set_body(0,"internal_DECOD_BRANCH_"+toString(i)+"_VAL <= ( in_PREDICT_"+toString(i)+"_ACK AND NOT internal_HAVE_DECOD_BRANCH_0 ) OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ); "); + vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL <= in_CONTEXT_EVENT_ACK OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE = "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ); "); + vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_"+toString(i)+"_VAL AND internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL; "); + } + } + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Case process "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(0,"case_DECOD_INST_"+toString(i)+": process (internal_DECOD_INSTRUCTION_"+toString(i)+")"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 : "+std_logic(6)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 : "+std_logic(8)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 : "+std_logic(8)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 : "+std_logic(6)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 : "+std_logic(5)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 : "+std_logic(5)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 : "+std_logic(2)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 : "+std_logic(4)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 : "+std_logic(1)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 : "+std_logic(3)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 : "+std_logic(2)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 : "+std_logic(2)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 : "+std_logic(4)+";"); + vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 : "+std_logic(4)+";"); + + vhdl->set_body(0,"begin"); + + //vhdl->set_body(1,"if in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" then"); + //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION ;"); + //vhdl->set_body(1,"else"); + //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); + //vhdl->set_body(1,"end if;"); + + +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= "+std_logic_cst(1,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,0)+";"); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= "+std_logic_cst(1,0)+";"); +#endif + + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 := internal_DECOD_INSTRUCTION_"+toString(i)+"(31 downto 26); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 8) & internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 := internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 := internal_DECOD_INSTRUCTION_"+toString(i)+"(16); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 23); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 24); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); "); + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); "); + + vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT;"); + + vhdl->set_body(1,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 is"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_J)+" => "); + vhdl->set_comment(2," OPCOD_L_J --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_J + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_J)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_J)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JAL)+" => "); + vhdl->set_comment(2," OPCOD_L_JAL --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_JAL + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JAL)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JAL)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITH_WRITE_STACK)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BNF)+" => "); + vhdl->set_comment(2," OPCOD_L_BNF --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_BNF + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BNF)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BNF)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_UNSET)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BF)+" => "); + vhdl->set_comment(2," OPCOD_L_BF --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_BF + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BF)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BF)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_SET)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_RFE)+" => "); + vhdl->set_comment(2," OPCOD_L_RFE --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_RFE + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RFE)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RFE)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JR)+" => "); + vhdl->set_comment(2," OPCOD_L_JR --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_JR + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JR)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JR)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_STACK)+"; "); + vhdl->set_body(3,"else "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK)+"; "); + vhdl->set_body(3,"end if; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JALR)+" => "); + vhdl->set_comment(2," OPCOD_L_JALR --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_JALR + + vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then "); + instruction_illegale(3,i) + // illegal instruction + vhdl->set_body(3,"else "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JALR)._type)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JALR)._operation)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK)+"; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + vhdl->set_body(3,"end if; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MACI)+" => "); + vhdl->set_comment(2," OPCOD_L_MACI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_MACI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST1)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST1 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST1 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST2)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST2 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST2 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST3)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST3 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST3 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST4)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST4 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST4 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST5)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST5 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST5 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST6)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST6 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST6 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST7)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST7 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST7 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST8)+" => "); + vhdl->set_comment(2," OPCOD_L_CUST8 --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_CUST8 + + instruction_illegale(2,i) + // illegal instruction + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LD)+" => "); + vhdl->set_comment(2," OPCOD_L_LD --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LD + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LD)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LD)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWS)+" => "); + vhdl->set_comment(2," OPCOD_L_LWS --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LWS + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWS)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWS)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWZ)+" => "); + vhdl->set_comment(2," OPCOD_L_LWZ --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LWZ + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWZ)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWZ)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBS)+" => "); + vhdl->set_comment(2," OPCOD_L_LBS --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LBS + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBS)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBS)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBZ)+" => "); + vhdl->set_comment(2," OPCOD_L_LBZ --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LBZ + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBZ)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBZ)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHS)+" => "); + vhdl->set_comment(2," OPCOD_L_LHS --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LHS + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHS)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHS)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHZ)+" => "); + vhdl->set_comment(2," OPCOD_L_LHZ --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_LHZ + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHZ)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHZ)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDI)+" => "); + vhdl->set_comment(2," OPCOD_L_ADDI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_ADDI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDIC)+" => "); + vhdl->set_comment(2," OPCOD_L_ADDIC --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_ADDIC + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDIC)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDIC)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ANDI)+" => "); + vhdl->set_comment(2," OPCOD_L_ANDI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_ANDI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ANDI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ANDI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ORI)+" => "); + vhdl->set_comment(2," OPCOD_L_ORI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_ORI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ORI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ORI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_XORI)+" => "); + vhdl->set_comment(2," OPCOD_L_XORI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_XORI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XORI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XORI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MULI)+" => "); + vhdl->set_comment(2," OPCOD_L_MULI --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_MULI + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULI)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULI)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MFSPR)+" => "); + vhdl->set_comment(2," OPCOD_L_MFSPR --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_MFSPR + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MFSPR)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MFSPR)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MTSPR)+" => "); + vhdl->set_comment(2," OPCOD_L_MTSPR --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_MTSPR + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MTSPR)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MTSPR)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SD)+" => "); + vhdl->set_comment(2," OPCOD_L_SD --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_SD + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SD)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SD)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SW)+" => "); + vhdl->set_comment(2," OPCOD_L_SW --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_SW + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SW)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SW)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SB)+" => "); + vhdl->set_comment(2," OPCOD_L_SB --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_SB + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SB)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SB)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SH)+" => "); + vhdl->set_comment(2," OPCOD_L_SH --"); + + // TYPE_0 IMMEDIAT + // OPCOD_L_SH + + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SH)._type)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SH)._operation)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_1)+" => "); + vhdl->set_comment(2," OPCOD_1 ORFPX32/64 --"); + + // TYPE_1 ORFPX32/64 + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 is"); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_2)+" => "); + vhdl->set_comment(2," OPCOD_2 ORVDX64 --"); + + // TYPE_2 ORVDX64 + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 is"); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_3)+" => "); + vhdl->set_comment(2," OPCOD_3 Register-Register --"); + + // TYPE_3 Register-Register + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADD)+" => "); + vhdl->set_comment(4," OPCOD_L_ADD --"); + + // TYPE_3 Register-Register + // OPCOD_L_ADD + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADD)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADD)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADDC)+" => "); + vhdl->set_comment(4," OPCOD_L_ADDC --"); + + // TYPE_3 Register-Register + // OPCOD_L_ADDC + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDC)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDC)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_SUB)+" => "); + vhdl->set_comment(4," OPCOD_L_SUB --"); + + // TYPE_3 Register-Register + // OPCOD_L_SUB + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SUB)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SUB)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_AND)+" => "); + vhdl->set_comment(4," OPCOD_L_AND --"); + + // TYPE_3 Register-Register + // OPCOD_L_AND + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_AND)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_AND)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_OR)+" => "); + vhdl->set_comment(4," OPCOD_L_OR --"); + + // TYPE_3 Register-Register + // OPCOD_L_OR + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_OR)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_OR)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_XOR)+" => "); + vhdl->set_comment(4," OPCOD_L_XOR --"); + + // TYPE_3 Register-Register + // OPCOD_L_XOR + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XOR)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XOR)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_CMOV)+" => "); + vhdl->set_comment(4," OPCOD_L_CMOV --"); + + // TYPE_3 Register-Register + // OPCOD_L_CMOV + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CMOV)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CMOV)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FF1)+" => "); + vhdl->set_comment(4," OPCOD_L_FF1 --"); + + // TYPE_3 Register-Register + // OPCOD_L_FF1 + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FF1)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FF1)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FL1)+" => "); + vhdl->set_comment(4," OPCOD_L_FL1 --"); + + // TYPE_3 Register-Register + // OPCOD_L_FL1 + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FL1)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FL1)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MUL)+" => "); + vhdl->set_comment(4," OPCOD_L_MUL --"); + + // TYPE_3 Register-Register + // OPCOD_L_MUL + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MUL)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MUL)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIV)+" => "); + vhdl->set_comment(4," OPCOD_L_DIV --"); + + // TYPE_3 Register-Register + // OPCOD_L_DIV + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIV)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIV)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIVU)+" => "); + vhdl->set_comment(4," OPCOD_L_DIVU --"); + + // TYPE_3 Register-Register + // OPCOD_L_DIVU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIVU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIVU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MULU)+" => "); + vhdl->set_comment(4," OPCOD_L_MULU --"); + + // TYPE_3 Register-Register + // OPCOD_L_MULU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_11)+" => "); + vhdl->set_comment(4," OPCOD_11 Shift/Rotate with register --"); + + // TYPE_11 Shift/Rotate with register + + vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 is"); + + vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SLL)+" => "); + vhdl->set_comment(6," OPCOD_L_SLL --"); + + // TYPE_11 Shift/Rotate with register + // OPCOD_L_SLL + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLL)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLL)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRL)+" => "); + vhdl->set_comment(6," OPCOD_L_SRL --"); + + // TYPE_11 Shift/Rotate with register + // OPCOD_L_SRL + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRL)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRL)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRA)+" => "); + vhdl->set_comment(6," OPCOD_L_SRA --"); + + // TYPE_11 Shift/Rotate with register + // OPCOD_L_SRA + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRA)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRA)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_ROR)+" => "); + vhdl->set_comment(6," OPCOD_L_ROR --"); + + // TYPE_11 Shift/Rotate with register + // OPCOD_L_ROR + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ROR)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ROR)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN others => "); + instruction_illegale(6,i) + + // TYPE_11 Shift/Rotate with register + // illegal instruction + + vhdl->set_body(5,"end case;"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_12)+" => "); + vhdl->set_comment(4," OPCOD_12 extend --"); + + // TYPE_12 extend + + vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 is"); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHS)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTHS --"); + + // TYPE_12 extend + // OPCOD_L_EXTHS + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHS)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHS)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHZ)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTHZ --"); + + // TYPE_12 extend + // OPCOD_L_EXTHZ + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHZ)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHZ)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBS)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTBS --"); + + // TYPE_12 extend + // OPCOD_L_EXTBS + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBS)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBS)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBZ)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTBZ --"); + + // TYPE_12 extend + // OPCOD_L_EXTBZ + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBZ)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBZ)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN others => "); + instruction_illegale(6,i) + + // TYPE_12 extend + // illegal instruction + + vhdl->set_body(5,"end case;"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_13)+" => "); + vhdl->set_comment(4," OPCOD_13 extend (64b) --"); + + // TYPE_13 extend (64b) + + vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 is"); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWS)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTWS --"); + + // TYPE_13 extend (64b) + // OPCOD_L_EXTWS + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWS)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWS)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWZ)+" => "); + vhdl->set_comment(6," OPCOD_L_EXTWZ --"); + + // TYPE_13 extend (64b) + // OPCOD_L_EXTWZ + + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWZ)._type)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWZ)._operation)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(6,"WHEN others => "); + instruction_illegale(6,i) + + // TYPE_13 extend (64b) + // illegal instruction + + vhdl->set_body(5,"end case;"); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_3 Register-Register + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_4)+" => "); + vhdl->set_comment(2," OPCOD_4 Set flag with register --"); + + // TYPE_4 Set flag with register + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQ)+" => "); + vhdl->set_comment(4," OPCOD_L_SFEQ --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFEQ + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQ)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQ)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNE)+" => "); + vhdl->set_comment(4," OPCOD_L_SFNE --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFNE + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNE)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNE)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTU)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGTU --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFGTU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEU)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGEU --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFGEU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTU)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLTU --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFLTU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEU)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLEU --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFLEU + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEU)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEU)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTS)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGTS --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFGTS + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTS)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTS)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGES)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGES --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFGES + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGES)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGES)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTS)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLTS --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFLTS + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTS)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTS)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLES)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLES --"); + + // TYPE_4 Set flag with register + // OPCOD_L_SFLES + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLES)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLES)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_4 Set flag with register + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_5)+" => "); + vhdl->set_comment(2," OPCOD_5 Set flag with immediat --"); + + // TYPE_5 Set flag with immediat + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFEQI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFEQI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNEI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFNEI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFNEI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNEI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNEI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTUI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGTUI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFGTUI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTUI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTUI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEUI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGEUI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFGEUI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEUI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEUI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTUI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLTUI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFLTUI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTUI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTUI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEUI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLEUI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFLEUI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEUI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEUI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTSI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGTSI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFGTSI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTSI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTSI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGESI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFGESI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFGESI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGESI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGESI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTSI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLTSI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFLTSI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTSI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTSI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLESI)+" => "); + vhdl->set_comment(4," OPCOD_L_SFLESI --"); + + // TYPE_5 Set flag with immediat + // OPCOD_L_SFLESI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLESI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLESI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_5 Set flag with immediat + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_6)+" => "); + vhdl->set_comment(2," OPCOD_6 Shift/Rotate with immediat --"); + + // TYPE_6 Shift/Rotate with immediat + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SLLI)+" => "); + vhdl->set_comment(4," OPCOD_L_SLLI --"); + + // TYPE_6 Shift/Rotate with immediat + // OPCOD_L_SLLI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLLI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLLI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRLI)+" => "); + vhdl->set_comment(4," OPCOD_L_SRLI --"); + + // TYPE_6 Shift/Rotate with immediat + // OPCOD_L_SRLI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRLI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRLI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRAI)+" => "); + vhdl->set_comment(4," OPCOD_L_SRAI --"); + + // TYPE_6 Shift/Rotate with immediat + // OPCOD_L_SRAI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRAI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRAI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_RORI)+" => "); + vhdl->set_comment(4," OPCOD_L_RORI --"); + + // TYPE_6 Shift/Rotate with immediat + // OPCOD_L_RORI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RORI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RORI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_6 Shift/Rotate with immediat + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_7)+" => "); + vhdl->set_comment(2," OPCOD_7 multiply with HI-LO --"); + + // TYPE_7 multiply with HI-LO + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MAC)+" => "); + vhdl->set_comment(4," OPCOD_L_MAC --"); + + // TYPE_7 multiply with HI-LO + // OPCOD_L_MAC + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MAC)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MAC)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MSB)+" => "); + vhdl->set_comment(4," OPCOD_L_MSB --"); + + // TYPE_7 multiply with HI-LO + // OPCOD_L_MSB + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSB)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSB)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_7 multiply with HI-LO + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_8)+" => "); + vhdl->set_comment(2," OPCOD_8 acces at HI-LO --"); + + // TYPE_8 acces at HI-LO + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MOVHI)+" => "); + vhdl->set_comment(4," OPCOD_L_MOVHI --"); + + // TYPE_8 acces at HI-LO + // OPCOD_L_MOVHI + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MOVHI)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MOVHI)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MACRC)+" => "); + vhdl->set_comment(4," OPCOD_L_MACRC --"); + + // TYPE_8 acces at HI-LO + // OPCOD_L_MACRC + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 0) = \"0000000000000000\" then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACRC)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACRC)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_8 acces at HI-LO + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_9)+" => "); + vhdl->set_comment(2," OPCOD_9 special --"); + + // TYPE_9 special + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_SYS)+" => "); + vhdl->set_comment(4," OPCOD_L_SYS --"); + + // TYPE_9 special + // OPCOD_L_SYS + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SYS)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SYS)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_SYSCALL)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_SYSCALL)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_TRAP)+" => "); + vhdl->set_comment(4," OPCOD_L_TRAP --"); + + // TYPE_9 special + // OPCOD_L_TRAP + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_TRAP)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_TRAP)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); + extend_signal = ""; + for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_TRAP)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_MSYNC)+" => "); + vhdl->set_comment(4," OPCOD_L_MSYNC --"); + + // TYPE_9 special + // OPCOD_L_MSYNC + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSYNC)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSYNC)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_MSYNC)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_PSYNC)+" => "); + vhdl->set_comment(4," OPCOD_L_PSYNC --"); + + // TYPE_9 special + // OPCOD_L_PSYNC + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_PSYNC)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_PSYNC)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_PSYNC)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_CSYNC)+" => "); + vhdl->set_comment(4," OPCOD_L_CSYNC --"); + + // TYPE_9 special + // OPCOD_L_CSYNC + + vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(23) = '0' then "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CSYNC)._type)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CSYNC)._operation)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); + //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_CSYNC)+"; "); + vhdl->set_body(5,"else "); + instruction_illegale(6,i) + // illegal instruction + vhdl->set_body(5,"end if; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_9 special + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_10)+" => "); + vhdl->set_comment(2," OPCOD_10 no operation --"); + + // TYPE_10 no operation + + vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 is"); + + vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_NOP)+" => "); + vhdl->set_comment(4," OPCOD_L_NOP --"); + + // TYPE_10 no operation + // OPCOD_L_NOP + + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_NOP)._type)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_NOP)._operation)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); + //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); + vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); + + vhdl->set_body(4,"WHEN others => "); + instruction_illegale(4,i) + + // TYPE_10 no operation + // illegal instruction + + vhdl->set_body(3,"end case;"); + + vhdl->set_body(2,"WHEN others => "); + instruction_illegale(2,i) + + // TYPE_0 IMMEDIAT + // illegal instruction + + vhdl->set_body(1,"end case;"); + vhdl->set_body(0,"end process case_DECOD_INST_"+toString(i)+";"); + vhdl->set_body(0,""); + + + } + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Registers "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + vhdl->set_body(0,"reg_DECOD : process (in_CLOCK)"); + vhdl->set_body(0,"begin"); + vhdl->set_body(1,"if in_CLOCK'event AND in_CLOCK = '1' then"); + vhdl->set_body(2,"if in_NRESET = '0' then"); + + for(uint32_t i = 0;i < _param->_nb_context;i++){ + vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= "+std_logic_cst(_param->_size_instruction_address,0xfc)+";"); + vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';"); + } + + vhdl->set_body(2,"else"); + + for(uint32_t i = 0;i < _param->_nb_context;i++){ + vhdl->set_body(3,"if internal_CONTEXT_"+toString(i)+"_HAVE_TRANSACTION = '1' then"); + + vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= internal_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;"); + vhdl->set_body(4,"if internal_DECOD_INSTRUCTION_"+toString(_param->_nb_inst_decod - 1)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" then"); + vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '1';"); + vhdl->set_body(4,"else"); + vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';"); + vhdl->set_body(4,"end if;"); + + //vhdl->set_body(3,"else"); + + //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;"); + //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT ;"); + + vhdl->set_body(3,"end if;"); + } + + vhdl->set_body(2,"end if;"); + vhdl->set_body(1,"end if;"); + vhdl->set_body(0,"end process reg_DECOD;"); + vhdl->set_body(0,""); + log_printf(FUNC,Decod,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 135) @@ -23,4 +23,53 @@ { log_printf(FUNC,Decod,FUNCTION,"Begin"); + + vhdl->set_signal ("internal_CONTEXT_EVENT_VAL",1); + + for(uint32_t x = 0;x < _param->_nb_context;x++){ + vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_HAVE_TRANSACTION",1); + vhdl->set_signal ("reg_CONTEXT_"+toString(x)+"_IS_DELAY_SLOT",1); + vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_IS_DELAY_SLOT",1); + vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_ADDRESS_PREVIOUS",_param->_size_instruction_address); + vhdl->set_signal ("reg_CONTEXT_"+toString(x)+"_ADDRESS_PREVIOUS",_param->_size_instruction_address); + vhdl->set_signal ("internal_HAVE_DECOD_BRANCH_"+toString(x),1); + vhdl->set_signal ("internal_CAN_CONTINUE_"+toString(x),1); + for (uint32_t y = 0; y < _param->_nb_inst_fetch[x]; y++) vhdl->set_signal ("internal_IFETCH_"+toString(x)+"_"+toString(y)+"_ACK",1); + } + + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ + vhdl->set_signal ("internal_DECOD_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_PREDICT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_DECOD_BRANCH_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i),_param->_size_instruction); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE ",_param->_size_type); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION ",_param->_size_operation); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT ",1); +#ifdef DEBUG + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS ",_param->_size_instruction_address); +#endif + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT ",_param->_size_instruction_address); + vhdl->set_signal ("internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT ",_param->_size_instruction_address); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT ",_param->_size_general_data); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA ",_param->_size_general_register_logic); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB ",_param->_size_general_register_logic); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC ",_param->_size_special_register_logic); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD ",_param->_size_general_register_logic); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE ",_param->_size_special_register_logic); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE ",_param->_size_exception_use); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION ",_param->_size_exception_decod); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION ",_param->_size_branch_condition); + //vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_STACK_WRITE ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION ",1); + vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE ",_param->_size_event_type); + } + log_printf(FUNC,Decod,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.deps =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.deps (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.deps (revision 135) @@ -13,4 +13,7 @@ include $(DIR_MORPHEO)/Behavioural/Makefile.deps endif +ifndef Queue +include $(DIR_MORPHEO)/Behavioural/Generic/Queue/Makefile.deps +endif #-----[ Directory ]---------------------------------------- @@ -21,7 +24,9 @@ Decod_queue_LIBRARY = -lDecod_queue \ + $(Queue_LIBRARY) \ $(Behavioural_LIBRARY) Decod_queue_DIR_LIBRARY = -L$(Decod_queue_DIR)/lib \ + $(Queue_DIR_LIBRARY) \ $(Behavioural_DIR_LIBRARY) @@ -31,4 +36,5 @@ @\ $(MAKE) Behavioural_library; \ + $(MAKE) Queue_library; \ $(MAKE) --directory=$(Decod_queue_DIR) --makefile=Makefile; @@ -36,3 +42,4 @@ @\ $(MAKE) Behavioural_library_clean; \ + $(MAKE) Queue_library_clean; \ $(MAKE) --directory=$(Decod_queue_DIR) --makefile=Makefile clean; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue.fig (revision 135) @@ -0,0 +1,67 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 4 + 2850 1500 4050 1500 4050 2400 2850 2400 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3750 1500 3750 2400 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3450 1500 3450 2400 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 3150 1500 3150 2400 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6000 1950 7200 1950 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 6000 2250 7200 2250 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4050 1650 7200 1650 +2 4 0 1 0 7 50 -1 -1 0.000 0 0 7 0 0 5 + 4800 1800 4800 2400 6000 2400 6000 1800 4800 1800 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 4800 1950 4050 1950 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 4050 2250 4800 2250 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5400 3150 5400 2400 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3450 2400 3450 3150 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 4125 3750 4125 3000 2775 3000 2775 3750 4125 3750 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 6075 3750 6075 3000 4725 3000 4725 3750 6075 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 1950 2925 1950 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 6150 2550 6150 1050 2700 1050 2700 2550 6150 2550 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 8550 2550 8550 1350 7050 1350 7050 2550 8550 2550 +2 4 2 1 0 7 50 -1 -1 3.000 0 0 7 0 0 5 + 1800 2550 1800 1350 450 1350 450 2550 1800 2550 +4 1 0 50 -1 2 10 0.0000 0 105 945 3450 3450 Context State\001 +4 1 0 50 -1 2 10 0.0000 0 120 1050 5400 3450 Prediction Unit\001 +4 1 0 50 -1 0 10 0.0000 0 135 375 5625 2850 Depth\001 +4 1 0 50 -1 0 10 0.0000 0 150 525 3750 2850 Nb_Inst\001 +4 1 0 50 -1 0 10 0.0000 0 105 330 4425 2175 ACK\001 +4 1 0 50 -1 0 10 0.0000 0 105 330 4425 1875 VAL\001 +4 1 0 50 -1 3 10 0.0000 0 150 705 5400 2100 Profondeur\001 +4 1 0 50 -1 2 10 0.0000 0 150 900 4425 1275 Decod_queue\001 +4 1 0 50 -1 0 10 0.0000 0 105 765 6600 1575 Instructions\001 +4 1 0 50 -1 0 10 0.0000 0 105 330 6600 1875 VAL\001 +4 1 0 50 -1 0 10 0.0000 0 105 330 6600 2175 ACK\001 +4 1 0 50 -1 2 10 0.0000 0 165 1350 7800 1950 Out Of Order Engine\001 +4 1 0 50 -1 2 10 0.0000 0 105 450 1125 1950 Decod\001 +4 1 0 50 -1 0 10 0.0000 0 105 765 2250 1800 Instructions\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_index.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_index.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_index.fig (revision 135) @@ -0,0 +1,156 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 3.000 0 0 0 0 4865.625 4425.000 4800 4200 5100 4425 4800 4650 +1 4 0 1 0 7 50 -1 -1 3.000 1 0.0000 4350 2100 150 150 4200 2100 4500 2100 +1 4 0 1 0 7 50 -1 -1 3.000 1 0.0000 4350 3150 150 150 4200 3150 4500 3150 +1 4 0 1 0 7 50 -1 -1 3.000 1 0.0000 4350 825 375 375 4050 600 4650 1050 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 3450 4800 3450 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 2400 4800 2400 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 1350 4800 1350 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 1650 1050 2700 1050 2700 600 4050 600 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 1650 2100 2850 2100 2850 750 3975 750 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 1650 4200 3150 4200 3150 1050 4050 1050 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 1650 3150 3000 3150 3000 900 3975 900 +2 2 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 + 4800 1200 5100 1200 5100 1950 4800 1950 4800 1200 +2 2 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 + 4800 2250 5100 2250 5100 2850 4800 2850 4800 2250 +2 2 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 + 4800 3300 5100 3300 5100 3750 4800 3750 4800 3300 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 3 + 4800 1200 5100 1575 4800 1950 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 3 + 4800 2250 5100 2550 4800 2850 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 3 + 4800 3300 5100 3525 4800 3750 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3750 3300 3750 2550 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3750 4500 3750 3300 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3750 2550 3750 1800 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3600 2400 3600 1650 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3600 3450 3600 2400 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 3450 2400 3450 1500 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 4800 4200 4800 4650 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 2250 4350 3000 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 1200 4350 1950 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4500 3150 4950 3150 4950 3300 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4500 2100 4950 2100 4950 2250 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4725 900 4950 900 4950 1200 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 2100 6000 2100 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 3150 6000 3150 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4350 4050 6000 4050 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3750 3600 4800 3600 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3600 2550 4800 2550 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3750 2700 4800 2700 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3750 1800 4800 1800 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3600 1650 4800 1650 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3450 1500 4800 1500 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4725 750 6000 750 +2 1 1 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4350 3300 4350 4350 4800 4350 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 4500 4800 4500 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5100 2550 6000 2550 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5100 1575 6000 1575 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5100 3525 6000 3525 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5100 4425 6000 4425 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2 + 450 600 750 600 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 1350 600 1650 600 1650 4800 1350 4800 1350 600 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 1050 600 1350 600 1350 4800 1050 4800 1050 600 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 750 600 1050 600 1050 4800 750 4800 750 600 +2 1 0 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 750 4800 450 4800 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 750 1650 1650 1650 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 750 2700 1650 2700 +2 1 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 2 + 750 3750 1650 3750 +4 0 0 50 -1 0 8 0.0000 0 105 525 1800 2025 in_VAL_1\001 +4 0 0 50 -1 0 8 0.0000 0 105 525 1800 975 in_VAL_0\001 +4 0 0 50 -1 0 8 0.0000 0 105 525 1800 3075 in_VAL_2\001 +4 0 0 50 -1 0 8 0.0000 0 105 525 1800 4125 in_VAL_3\001 +4 0 0 50 -1 0 8 0.0000 0 105 555 1800 1275 in_INST_0\001 +4 0 0 50 -1 0 8 0.0000 0 105 555 1800 2325 in_INST_1\001 +4 0 0 50 -1 0 8 0.0000 0 105 555 1800 3375 in_INST_2\001 +4 0 0 50 -1 0 8 0.0000 0 105 555 1800 4425 in_INST_3\001 +4 1 0 50 -1 0 8 0.0000 0 75 405 4350 900 DEPTH\001 +4 2 0 50 -1 0 8 0.0000 0 90 600 5850 675 out_VAL_0\001 +4 2 0 50 -1 0 8 0.0000 0 90 600 5850 2025 out_VAL_1\001 +4 2 0 50 -1 0 8 0.0000 0 90 600 5850 3075 out_VAL_2\001 +4 2 0 50 -1 0 8 0.0000 0 90 600 5850 3975 out_VAL_3\001 +4 2 0 50 -1 0 8 0.0000 0 90 630 5850 1500 out_INST_0\001 +4 2 0 50 -1 0 8 0.0000 0 90 630 5850 2475 out_INST_1\001 +4 2 0 50 -1 0 8 0.0000 0 90 630 5850 3450 out_INST_2\001 +4 2 0 50 -1 0 8 0.0000 0 90 630 5850 4350 out_INST_3\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_reg.fig =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_reg.fig (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/fig/Decod_queue_reg.fig (revision 135) @@ -0,0 +1,51 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +2 2 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 5 + 1500 900 1800 900 1800 1500 1500 1500 1500 900 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 3 + 1500 900 1800 1200 1500 1500 +2 2 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 5 + 2850 750 3150 750 3150 1350 2850 1350 2850 750 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 3 + 2850 750 3150 1050 2850 1350 +2 2 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 5 + 3600 600 3900 600 3900 1500 3600 1500 3600 600 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 0 3 + 3600 1500 3750 1350 3900 1500 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 6 + 3 0 1.00 60.00 120.00 + 3900 1050 4200 1050 4200 1650 1200 1650 1200 1350 1500 1350 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1650 450 1650 900 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3000 450 3000 750 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 1800 1200 2850 1200 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3150 1050 3600 1050 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 2850 900 2550 900 +2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 0 1 2 + 3 0 1.00 60.00 120.00 + 1500 1050 900 1050 +4 0 0 50 -1 0 8 0.0000 0 90 480 900 975 out_VAL\001 +4 0 0 50 -1 0 8 0.0000 0 75 60 2550 825 0\001 +4 1 0 50 -1 0 8 0.0000 0 90 495 1650 375 new_head\001 +4 1 0 50 -1 0 8 0.0000 0 90 540 3000 375 transaction\001 +4 1 0 50 -1 0 8 0.0000 0 90 480 3750 525 reg_VAL\001 +4 1 0 50 -1 0 8 0.0000 0 75 60 1725 1425 0\001 +4 1 0 50 -1 0 8 0.0000 0 75 60 3075 1275 0\001 +4 1 0 50 -1 0 8 0.0000 0 75 60 1725 1050 1\001 +4 1 0 50 -1 0 8 0.0000 0 75 60 3075 900 1\001 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/sty/header.sty =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/sty/header.sty (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/sty/header.sty (revision 135) @@ -2,5 +2,5 @@ %\def\review{\number\day/\number\month/\number\year\xspace} -\title{Decod_queue} +\title{Decod\_queue} \author{} Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h (revision 135) @@ -34,4 +34,5 @@ public : uint32_t _nb_bank; + public : uint32_t _size_internal_queue ; // data size in queue //-----[ methods ]----------------------------------------------------------- @@ -60,5 +61,4 @@ }; // end namespace multi_front_end }; // end namespace core - }; // end namespace behavioural }; // end namespace morpheo Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl.cpp (revision 135) @@ -9,4 +9,5 @@ #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" #include "Behavioural/include/Vhdl.h" +#include "Behavioural/Generic/Queue/include/Queue.h" namespace morpheo { @@ -24,4 +25,33 @@ { log_begin(Decod_queue,FUNCTION); + + //----- Queue ----- + + morpheo::behavioural::generic::queue::Parameters * param_queue; + morpheo::behavioural::generic::queue::Queue * queue; + + param_queue = new morpheo::behavioural::generic::queue::Parameters + (_param->_size_queue, + _param->_size_internal_queue, + 0, + false, + false + ); + + std::string queue_name = _name + "_queue"; + queue = new morpheo::behavioural::generic::queue::Queue + (queue_name.c_str() +#ifdef STATISTICS + ,NULL +#endif + ,param_queue + ,USE_VHDL); + + _component->set_component(queue->_component +#ifdef POSITION + , 0, 0, 0, 0 +#endif + , INSTANCE_LIBRARY + ); Vhdl * vhdl = new Vhdl (_name); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_body.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_body.cpp (revision 135) @@ -23,5 +23,386 @@ { log_begin(Decod_queue,FUNCTION); - vhdl->set_body (""); + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Instance queue "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + vhdl->set_body (0,"instance_"+_name+"_queue : "+_name+"_queue"); + vhdl->set_body (0,"port map ("); + vhdl->set_body (1," in_CLOCK => in_CLOCK "); + vhdl->set_body (1,", in_NRESET => in_NRESET"); + vhdl->set_body (1,", in_INSERT_VAL => internal_QUEUE_INSERT_VAL"); + vhdl->set_body (1,",out_INSERT_ACK => internal_QUEUE_INSERT_ACK"); + vhdl->set_body (1,", in_INSERT_DATA => internal_QUEUE_INSERT_DATA"); + vhdl->set_body (1,",out_RETIRE_VAL => internal_QUEUE_RETIRE_VAL"); + vhdl->set_body (1,", in_RETIRE_ACK => internal_QUEUE_RETIRE_ACK"); + vhdl->set_body (1,",out_RETIRE_DATA => internal_QUEUE_RETIRE_DATA"); + vhdl->set_body (0,");"); + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Entree Queue "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Instruction "+toString(i)+" "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + if(_param->_have_port_context_id) vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_CONTEXT_ID <= in_DECOD_IN_"+toString(i)+"_CONTEXT_ID ;"); + if(_param->_have_port_depth) vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_DEPTH <= in_DECOD_IN_"+toString(i)+"_DEPTH ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_TYPE <= in_DECOD_IN_"+toString(i)+"_TYPE ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_OPERATION <= in_DECOD_IN_"+toString(i)+"_OPERATION ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NO_EXECUTE <= in_DECOD_IN_"+toString(i)+"_NO_EXECUTE ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT <= in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT ;"); +#ifdef DEBUG + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_ADDRESS <= in_DECOD_IN_"+toString(i)+"_ADDRESS ;"); +#endif + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT <= in_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT <= in_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_IMMEDIAT <= in_DECOD_IN_"+toString(i)+"_IMMEDIAT ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RA <= in_DECOD_IN_"+toString(i)+"_READ_RA ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RA <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RA ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RB <= in_DECOD_IN_"+toString(i)+"_READ_RB ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RB <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RB ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RC <= in_DECOD_IN_"+toString(i)+"_READ_RC ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RC <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RC ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_WRITE_RD <= in_DECOD_IN_"+toString(i)+"_WRITE_RD ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RD <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RD ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_WRITE_RE <= in_DECOD_IN_"+toString(i)+"_WRITE_RE ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RE <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RE ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_EXCEPTION_USE <= in_DECOD_IN_"+toString(i)+"_EXCEPTION_USE ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_EXCEPTION <= in_DECOD_IN_"+toString(i)+"_EXCEPTION ;"); + vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_VAL <= in_DECOD_IN_"+toString(i)+"_VAL ;"); + vhdl->set_body(0,"out_DECOD_IN_"+toString(i)+"_ACK <= internal_QUEUE_INSERT_ACK ;"); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_QUEUE_INSERT_VAL <= '0'"); + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(1," OR internal_DECOD_IN_"+toString(i)+"_VAL"); + } + vhdl->set_body(1,";"); + + vhdl->set_body(0,""); + + if(_param->_have_port_context_id){ + if(_param->_size_nb_inst_decod < 2){ + for(uint32_t i_context=0;i_context < _param->_nb_context;i_context++) + vhdl->set_body(0,"internal_NB_INST_"+toString(i_context)+"_ALL <= ( reg_NB_INST_"+toString(i_context)+"_ALL OR ( internal_DECOD_IN_0_VAL AND ( internal_QUEUE_INSERT_ACK AND internal_DECOD_OUT_0_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ))) AND ( NOT ( internal_OUT_DECOD_OUT_0_VAL AND ( internal_DECOD_OUT_0_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" AND ( NOT internal_DECOD_OUT_0_VAL ))));"); + } + else{ + for(uint32_t i_context=0;i_context < _param->_nb_context;i_context++){ + + for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){ + vhdl->set_body(0,"internal_NB_INST_OUT_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_OUT_"+toString(i_inst)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" AND internal_OUT_DECOD_OUT_"+toString(i_inst)+"_VAL = '1' AND internal_DECOD_OUT_"+toString(i_inst)+"_VAL = '0' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";"); + vhdl->set_body(0,"internal_NB_INST_IN_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_IN_"+toString(i_inst)+"_VAL = '1' AND internal_QUEUE_INSERT_ACK = '1' AND internal_DECOD_IN_"+toString(i_inst)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";"); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_NB_INST_"+toString(i_context)+"_ALL <= reg_NB_INST_"+toString(i_context)+"_ALL"); + + for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){ + vhdl->set_body(1,"+ internal_NB_INST_IN_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT"); + vhdl->set_body(1,"- internal_NB_INST_OUT_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT"); + } + vhdl->set_body(1,";"); + } + } + } + else{ + if(_param->_size_nb_inst_decod < 2) vhdl->set_body(0,"internal_NB_INST_0_ALL <= ( reg_NB_INST_0_ALL OR ( internal_DECOD_IN_0_VAL AND internal_QUEUE_INSERT_ACK )) AND ( NOT ( internal_OUT_DECOD_OUT_0_VAL AND ( NOT internal_DECOD_OUT_0_VAL )));"); + else{ + for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){ + vhdl->set_body(0,"internal_NB_INST_OUT_0_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN(( internal_OUT_DECOD_OUT_"+toString(i_inst)+"_VAL = '1' ) AND internal_DECOD_OUT_"+toString(i_inst)+"_VAL = '0' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";"); + vhdl->set_body(0,"internal_NB_INST_IN_0_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_IN_"+toString(i_inst)+"_VAL = '1' AND internal_QUEUE_INSERT_ACK = '1' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";"); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_NB_INST_0_ALL <= reg_NB_INST_0_ALL"); + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(1," + internal_NB_INST_IN_0_"+toString(i)+"_CONTEXT"); + vhdl->set_body(1," - internal_NB_INST_OUT_0_"+toString(i)+"_CONTEXT"); + } + vhdl->set_body(1,";"); + } + } + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Sortie Queue "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Instruction "+toString(i)+" "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + if(_param->_have_port_context_id){ + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_CONTEXT_ID <= internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_CONTEXT_ID "); + } + vhdl->set_body(0," ;"); + } + if(_param->_have_port_depth){ + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_DEPTH <= internal_DECOD_OUT_"+toString(i)+"_DEPTH"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_DEPTH "); + } + vhdl->set_body(0," ;"); + } + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_TYPE <= internal_DECOD_OUT_"+toString(i)+"_TYPE"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_TYPE "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_OPERATION <= internal_DECOD_OUT_"+toString(i)+"_OPERATION"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_OPERATION "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_OUT_"+toString(i)+"_NO_EXECUTE"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NO_EXECUTE "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_IS_DELAY_SLOT "); + } + vhdl->set_body(0," ;"); +#ifdef DEBUG + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_ADDRESS <= internal_DECOD_OUT_"+toString(i)+"_ADDRESS"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_ADDRESS "); + } + vhdl->set_body(0," ;"); +#endif + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_ADDRESS_NEXT "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT <= internal_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_HAS_IMMEDIAT "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_IMMEDIAT <= internal_DECOD_OUT_"+toString(i)+"_IMMEDIAT"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_IMMEDIAT "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RA <= internal_DECOD_OUT_"+toString(i)+"_READ_RA"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RA "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RA"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RA "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RB <= internal_DECOD_OUT_"+toString(i)+"_READ_RB"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RB "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RB"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RB "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RC <= internal_DECOD_OUT_"+toString(i)+"_READ_RC"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RC "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RC <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RC"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RC "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_WRITE_RD <= internal_DECOD_OUT_"+toString(i)+"_WRITE_RD"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_WRITE_RD "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RD"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RD "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_WRITE_RE <= internal_DECOD_OUT_"+toString(i)+"_WRITE_RE"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_WRITE_RE "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RE"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RE "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_EXCEPTION_USE "); + } + vhdl->set_body(0," ;"); + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION <= internal_DECOD_OUT_"+toString(i)+"_EXCEPTION"); + for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){ + + vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_EXCEPTION "); + } + vhdl->set_body(0," ;"); + + vhdl->set_body(0,""); + + if(_param->_have_port_depth){ + if(_param->_have_port_context_id){ + + vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VALID <= '1' WHEN(( in_DEPTH_0_FULL = '1' AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ) "); + for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++) + vhdl->set_body(2," OR ( in_DEPTH_"+toString(i_context)+"_FULL = '1' AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) "); + + vhdl->set_body(1," ) ELSE '1' WHEN(( in_DEPTH_0_MIN = in_DEPTH_0_MAX AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ) "); + for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++) + vhdl->set_body(2," OR ( in_DEPTH_"+toString(i_context)+"_MIN = in_DEPTH_"+toString(i_context)+"_MAX AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) "); + + vhdl->set_body(1," ) ELSE '1' WHEN((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MAX ) AND ( in_DEPTH_0_MIN < in_DEPTH_0_MAX ) AND ( internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" )) "); + for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++) + vhdl->set_body(2," OR (( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_"+toString(i_context)+"_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_"+toString(i_context)+"_MAX ) AND ( in_DEPTH_"+toString(i_context)+"_MIN < in_DEPTH_"+toString(i_context)+"_MAX ) AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) "); + + vhdl->set_body(1," ) ELSE '1' WHEN(((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MIN )) AND ( in_DEPTH_0_MIN > in_DEPTH_0_MAX ) AND ( internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ))"); + for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++) + vhdl->set_body(2," OR ((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_"+toString(i_context)+"_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_"+toString(i_context)+"_MIN )) AND ( in_DEPTH_"+toString(i_context)+"_MIN > in_DEPTH_"+toString(i_context)+"_MAX ) AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) "); + + vhdl->set_body(1," ) ELSE '0' ;"); + } + else{ + vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VALID <= '1' WHEN( in_DEPTH_0_FULL = '1' ) ELSE '1' WHEN( in_DEPTH_0_MIN = in_DEPTH_0_MAX ) ELSE '1' WHEN(( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MAX ) AND ( in_DEPTH_0_MIN < in_DEPTH_0_MAX )) ELSE '1' WHEN((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MIN )) AND ( in_DEPTH_0_MIN > in_DEPTH_0_MAX )) ELSE '0' ;"); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_OUT_DECOD_OUT_"+toString(i)+"_VAL <= ( internal_QUEUE_OUT_"+toString(i)+"_VAL AND internal_QUEUE_RETIRE_VAL AND internal_DECOD_"+toString(i)+"_VALID ) WHEN( internal_QUEUE_NEW_HEAD = '1' ) ELSE reg_DECOD_OUT_"+toString(i)+"_VAL ;"); + } + else vhdl->set_body(0,"internal_OUT_DECOD_OUT_"+toString(i)+"_VAL <= ( internal_QUEUE_OUT_"+toString(i)+"_VAL AND internal_QUEUE_RETIRE_VAL ) WHEN( internal_QUEUE_NEW_HEAD = '1' ) ELSE reg_DECOD_OUT_"+toString(i)+"_VAL ;"); + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_DECOD_OUT_"+toString(i)+"_VAL <= '0' WHEN(( in_DECOD_OUT_"+toString(i)+"_ACK = '1' ) AND ( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,i*2 + 1)+" ))"); + for(uint32_t cp = 0;cp < i;cp++){ + + vhdl->set_body(1," ELSE '0' WHEN(( in_DECOD_OUT_"+toString(cp)+"_ACK = '1' ) AND ( internal_INDEX_"+toString(cp)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,i*2 + 1)+" ))"); + } + vhdl->set_body(1," ELSE '1' WHEN( internal_OUT_DECOD_OUT_"+toString(i)+"_VAL = '1' ) ELSE '0' ;"); + + vhdl->set_body(0,""); + + vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_VAL <= internal_INDEX_"+toString(i)+"(0) ;"); + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_INDEX_"+toString(i)+" <= "); + for(uint32_t cp = i;cp < _param->_nb_inst_decod;cp++){ + + vhdl->set_body(1,std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+" WHEN( internal_OUT_DECOD_OUT_"+toString(cp)+"_VAL = '1'"); + for(uint32_t cp2 = 0;cp2 < i;cp2++){ + + vhdl->set_body(2," AND NOT( internal_INDEX_"+toString(cp2)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+" )"); + } + vhdl->set_body(1," ) ELSE "); + } + vhdl->set_body(1,std_logic_conv(_param->_size_nb_inst_decod + 1,0)+" ;"); + } + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_QUEUE_NEW_HEAD <= NOT( '0'"); + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(1," OR reg_DECOD_OUT_"+toString(i)+"_VAL"); + } + vhdl->set_body(1,");"); + + vhdl->set_body(0,""); + + vhdl->set_body(0,"internal_QUEUE_RETIRE_ACK <= NOT( '0'"); + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(1," OR internal_DECOD_OUT_"+toString(i)+"_VAL"); + } + vhdl->set_body(1,");"); + + vhdl->set_body(0,""); + + for(uint32_t i=0;i < _param->_nb_context;i++){ + vhdl->set_body(0,"out_NB_INST_"+toString(i)+"_ALL <= reg_NB_INST_"+toString(i)+"_ALL ;"); + } + + vhdl->set_body(0,""); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_comment(0,"-- Registers "); + vhdl->set_comment(0,"-----------------------------------"); + vhdl->set_body(0,""); + + vhdl->set_body(0,"reg_DECOD_write: process (in_CLOCK)"); + vhdl->set_body(0,"begin"); + vhdl->set_body(1,"if in_CLOCK'event AND in_CLOCK = '1' then"); + vhdl->set_body(2,"if in_NRESET = '0' then"); + + for(uint32_t i=0;i < _param->_nb_context;i++){ + vhdl->set_body(3,"reg_NB_INST_"+toString(i)+"_ALL <= "+std_logic_conv(_param->_size_nb_inst_decod,0)+";"); + } + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(3,"reg_DECOD_OUT_"+toString(i)+"_VAL <= '0';"); + } + + vhdl->set_body(2,"else"); + + for(uint32_t i=0;i < _param->_nb_context;i++){ + vhdl->set_body(3,"reg_NB_INST_"+toString(i)+"_ALL <= internal_NB_INST_"+toString(i)+"_ALL;"); + } + for(uint32_t i=0;i < _param->_nb_inst_decod;i++){ + vhdl->set_body(3,"reg_DECOD_OUT_"+toString(i)+"_VAL <= internal_DECOD_OUT_"+toString(i)+"_VAL;"); + } + + vhdl->set_body(2,"end if;"); + vhdl->set_body(1,"end if;"); + vhdl->set_body(0,"end process reg_DECOD_write;"); + log_end(Decod_queue,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_declaration.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_declaration.cpp (revision 135) @@ -23,4 +23,185 @@ { log_begin(Decod_queue,FUNCTION); + + vhdl->set_signal ("internal_QUEUE_INSERT_DATA ",_param->_size_internal_queue); + vhdl->set_signal ("internal_QUEUE_RETIRE_DATA ",_param->_size_internal_queue); + vhdl->set_signal ("internal_QUEUE_INSERT_VAL ",1); + vhdl->set_signal ("internal_QUEUE_RETIRE_VAL ",1); + vhdl->set_signal ("internal_QUEUE_INSERT_ACK ",1); + vhdl->set_signal ("internal_QUEUE_RETIRE_ACK ",1); + + vhdl->set_signal ("internal_QUEUE_NEW_HEAD ",1); + + uint32_t min = 0; + uint32_t max, size; + + for(uint32_t i = 0;i < _param->_nb_context;i++){ + + vhdl->set_signal ("reg_NB_INST_"+toString(i)+"_ALL",_param->_size_nb_inst_decod); + vhdl->set_signal ("internal_NB_INST_"+toString(i)+"_ALL",_param->_size_nb_inst_decod); + + for(uint32_t i_inst = 0;i_inst < _param->_nb_inst_decod;i_inst++){ + vhdl->set_signal ("internal_NB_INST_IN_"+toString(i)+"_"+toString(i_inst)+"_CONTEXT",_param->_size_nb_inst_decod); + vhdl->set_signal ("internal_NB_INST_OUT_"+toString(i)+"_"+toString(i_inst)+"_CONTEXT",_param->_size_nb_inst_decod); + } + } + + for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ + vhdl->set_signal ("reg_DECOD_OUT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_DECOD_OUT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_OUT_DECOD_OUT_"+toString(i)+"_VAL",1); + vhdl->set_signal ("internal_DECOD_"+toString(i)+"_VALID",1); + vhdl->set_signal ("internal_INDEX_"+toString(i),_param->_size_nb_inst_decod + 1); + + max = min; + + if(_param->_have_port_context_id) + { + size = _param->_size_context_id; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_CONTEXT_ID",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + } + + if(_param->_have_port_depth) + { + size = _param->_size_depth; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_DEPTH",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_DEPTH",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + } + + size = _param->_size_type; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_TYPE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_TYPE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_operation; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_OPERATION",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_OPERATION",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NO_EXECUTE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NO_EXECUTE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + +#ifdef DEBUG + size = _param->_size_instruction_address; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_ADDRESS",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_ADDRESS",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; +#endif + + size = _param->_size_instruction_address; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_general_data; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_IMMEDIAT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_IMMEDIAT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RA",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RA",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_general_register_logic; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RA",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RA",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RB",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RB",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_general_register_logic; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RB",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RB",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RC",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RC",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_special_register_logic; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RC",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RC",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_WRITE_RD",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_WRITE_RD",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_general_register_logic; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RD",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RD",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_WRITE_RE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_WRITE_RE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_special_register_logic; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_exception_use; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_EXCEPTION_USE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = _param->_size_exception_decod; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_EXCEPTION",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_EXCEPTION",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + size = 1; + max = min-1+size; + vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_VAL",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + vhdl->set_alias ("internal_QUEUE_OUT_"+toString(i)+"_VAL",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min)); + min = max+1; + + } + log_end(Decod_queue,FUNCTION); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 135) @@ -41,4 +41,32 @@ test(); + + _size_internal_queue = + (1 + // _val + _size_context_id + // _context_id + _size_depth + // _depth + _size_type + // _type + _size_operation + // _operation + 1 + // _no_execute + 1 + // _is_delay_slot +#ifdef DEBUG + _size_instruction_address + // _address +#endif + _size_instruction_address + // _address_next + 1 + // _has_immediat + _size_general_data + // _immediat + 1 + // _read_ra + _size_general_register_logic + // _num_reg_ra + 1 + // _read_rb + _size_general_register_logic + // _num_reg_rb + 1 + // _read_rc + _size_special_register_logic + // _num_reg_rc + 1 + // _write_rd + _size_general_register_logic + // _num_reg_rd + 1 + // _write_re + _size_special_register_logic + // _num_reg_re + _size_exception_use + // _exception_use + _size_exception_decod // _exception + ) * _nb_inst_decod; if (is_toplevel) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp (revision 135) @@ -70,4 +70,5 @@ { ALLOC1_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."),_param->_nb_instruction); + INTERFACE1_TEST(false,_param->_nb_instruction); ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); @@ -96,4 +97,5 @@ { ALLOC1_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."),_param->_nb_instruction); + INTERFACE1_TEST(false,_param->_nb_instruction); ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE ,"instruction_enable" ,Tcontrol_t ,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp (revision 135) @@ -23,5 +23,361 @@ { log_printf(FUNC,Address_management,FUNCTION,"Begin"); - vhdl->set_body (""); + + vhdl->set_body (0,""); + vhdl->set_comment(0,"========================================="); + vhdl->set_comment(0,"===== CONSTANT =========================="); + vhdl->set_comment(0,"========================================="); + vhdl->set_body (0,""); + vhdl->set_body (0,"internal_EVENT_ACK <= '1';"); + vhdl->set_body (0," out_EVENT_ACK <= internal_EVENT_ACK;"); + + vhdl->set_body (0,""); + vhdl->set_comment(0,"========================================="); + vhdl->set_comment(0,"===== TRANSITION ========================"); + vhdl->set_comment(0,"========================================="); + vhdl->set_body (0,""); + + vhdl->set_body (0,"TRANSITION : process (in_CLOCK)"); + + vhdl->set_body (0,""); + vhdl->set_body (0,"variable var_PC_ACCESS_VAL : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_ACCESS : "+std_logic(_param->_size_instruction_address)+";"); + vhdl->set_body (0,"variable var_PC_ACCESS_IS_DS_TAKE : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_ACCESS_INSTRUCTION_ENABLE : Tinstruction_enable;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (0,"variable var_PC_ACCESS_INST_IFETCH_PTR : "+std_logic(_param->_size_inst_ifetch_ptr)+";"); + vhdl->set_body (0,"variable var_PC_ACCESS_BRANCH_STATE : "+std_logic(_param->_size_branch_state)+";"); + if (_param->_have_port_depth) + vhdl->set_body (0,"variable var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";"); + vhdl->set_body (0,""); + vhdl->set_body (0,"variable var_PC_CURRENT_VAL : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_CURRENT : "+std_logic(_param->_size_instruction_address)+";"); + vhdl->set_body (0,"variable var_PC_CURRENT_IS_DS_TAKE : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_CURRENT_INSTRUCTION_ENABLE : Tinstruction_enable;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (0,"variable var_PC_CURRENT_INST_IFETCH_PTR : "+std_logic(_param->_size_inst_ifetch_ptr)+";"); + vhdl->set_body (0,"variable var_PC_CURRENT_BRANCH_STATE : "+std_logic(_param->_size_branch_state)+";"); + if (_param->_have_port_depth) + vhdl->set_body (0,"variable var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";"); + vhdl->set_body (0,""); + vhdl->set_body (0,"variable var_PC_NEXT_VAL : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_NEXT : "+std_logic(_param->_size_instruction_address)+";"); + vhdl->set_body (0,"variable var_PC_NEXT_IS_DS_TAKE : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_NEXT_INSTRUCTION_ENABLE : Tinstruction_enable;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (0,"variable var_PC_NEXT_INST_IFETCH_PTR : "+std_logic(_param->_size_inst_ifetch_ptr)+";"); + vhdl->set_body (0,"variable var_PC_NEXT_BRANCH_STATE : "+std_logic(_param->_size_branch_state)+";"); + if (_param->_have_port_depth) + vhdl->set_body (0,"variable var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";"); + vhdl->set_body (0,""); + vhdl->set_body (0,"variable var_PC_NEXT_NEXT_VAL : "+std_logic(1)+";"); + vhdl->set_body (0,"variable var_PC_NEXT_NEXT : "+std_logic(_param->_size_instruction_address)+";"); + vhdl->set_body (0,"variable var_PC_NEXT_NEXT_IS_DS_TAKE : "+std_logic(1)+";"); +// vhdl->set_body (0,"variable var_PC_NEXT_NEXT_INSTRUCTION_ENABLE : Tinstruction_enable;"); +// if (_param->_have_port_inst_ifetch_ptr) +// vhdl->set_body (0,"variable var_PC_NEXT_NEXT_INST_IFETCH_PTR : "+std_logic(_param->_size_inst_ifetch_ptr)+";"); +// vhdl->set_body (0,"variable var_PC_NEXT_NEXT_BRANCH_STATE : "+std_logic(_param->_size_branch_state)+";"); +// if (_param->_have_port_depth) +// vhdl->set_body (0,"variable var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";"); + vhdl->set_body (0,""); + vhdl->set_body (0,"begin -- TRANSITION"); + vhdl->set_body (1,"if (in_CLOCK'event and in_CLOCK = '1')then"); + vhdl->set_body (1,""); + vhdl->set_body (2,"if (in_NRESET = '0') then"); + vhdl->set_body (3,""); + + { + vhdl->set_body (3,"reg_PC_ACCESS_VAL <= '0';"); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (3,"reg_PC_ACCESS <= "+std_logic_cst(_param->_size_instruction_address,0)+";"); +#endif + vhdl->set_body (3,"reg_PC_CURRENT_VAL <= '0';"); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (3,"reg_PC_CURRENT <= "+std_logic_cst(_param->_size_instruction_address,0)+";"); +#endif + vhdl->set_body (3,"reg_PC_NEXT_VAL <= '1';"); + vhdl->set_body (3,"reg_PC_NEXT <= "+std_logic_cst(_param->_size_instruction_address,0x100>>2)+";"); + vhdl->set_body (3,"reg_PC_NEXT_IS_DS_TAKE <= '0';"); + uint32_t index = reg_PC_NEXT % _param->_nb_instruction; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + std::string value = (i != index)?"'0'":"'1'"; + vhdl->set_body (3,"reg_PC_NEXT_INSTRUCTION_ENABLE ("+toString(i)+") <= "+value+";"); + } + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"reg_PC_NEXT_INST_IFETCH_PTR <= "+std_logic_cst(_param->_size_inst_ifetch_ptr,0)+";"); + vhdl->set_body (3,"reg_PC_NEXT_BRANCH_STATE <= "+std_logic_cst(_param->_size_branch_state ,0)+";"); + if (_param->_have_port_depth) + vhdl->set_body (3,"reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID <= "+std_logic_cst(_param->_size_depth ,0)+";"); + vhdl->set_body (3,"reg_PC_NEXT_NEXT_VAL <= '0';"); +#ifdef SYSTEMC_VHDL_COMPATIBILITY + vhdl->set_body (3,"reg_PC_NEXT_NEXT <= "+std_logic_cst(_param->_size_instruction_address,0)+";"); +#endif + } + vhdl->set_body (3,""); + vhdl->set_body (2,"else"); + + vhdl->set_body (3,"var_PC_ACCESS_VAL := reg_PC_ACCESS_VAL ;"); + vhdl->set_body (3,"var_PC_ACCESS := reg_PC_ACCESS ;"); + vhdl->set_body (3,"var_PC_ACCESS_IS_DS_TAKE := reg_PC_ACCESS_IS_DS_TAKE ;"); + vhdl->set_body (3,"var_PC_ACCESS_INSTRUCTION_ENABLE := reg_PC_ACCESS_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"var_PC_ACCESS_INST_IFETCH_PTR := reg_PC_ACCESS_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"var_PC_ACCESS_BRANCH_STATE := reg_PC_ACCESS_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID := reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"var_PC_CURRENT_VAL := reg_PC_CURRENT_VAL ;"); + vhdl->set_body (3,"var_PC_CURRENT := reg_PC_CURRENT ;"); + vhdl->set_body (3,"var_PC_CURRENT_IS_DS_TAKE := reg_PC_CURRENT_IS_DS_TAKE ;"); + vhdl->set_body (3,"var_PC_CURRENT_INSTRUCTION_ENABLE := reg_PC_CURRENT_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"var_PC_CURRENT_INST_IFETCH_PTR := reg_PC_CURRENT_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"var_PC_CURRENT_BRANCH_STATE := reg_PC_CURRENT_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID := reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"var_PC_NEXT_VAL := reg_PC_NEXT_VAL ;"); + vhdl->set_body (3,"var_PC_NEXT := reg_PC_NEXT ;"); + vhdl->set_body (3,"var_PC_NEXT_IS_DS_TAKE := reg_PC_NEXT_IS_DS_TAKE ;"); + vhdl->set_body (3,"var_PC_NEXT_INSTRUCTION_ENABLE := reg_PC_NEXT_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"var_PC_NEXT_INST_IFETCH_PTR := reg_PC_NEXT_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"var_PC_NEXT_BRANCH_STATE := reg_PC_NEXT_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID := reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"var_PC_NEXT_NEXT_VAL := reg_PC_NEXT_NEXT_VAL ;"); + vhdl->set_body (3,"var_PC_NEXT_NEXT := reg_PC_NEXT_NEXT ;"); + vhdl->set_body (3,"var_PC_NEXT_NEXT_IS_DS_TAKE := reg_PC_NEXT_NEXT_IS_DS_TAKE ;"); +// vhdl->set_body (3,"var_PC_NEXT_NEXT_INSTRUCTION_ENABLE := reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE ;"); +// if (_param->_have_port_inst_ifetch_ptr) +// vhdl->set_body (3,"var_PC_NEXT_NEXT_INST_IFETCH_PTR := reg_PC_NEXT_NEXT_INST_IFETCH_PTR ;"); +// vhdl->set_body (3,"var_PC_NEXT_NEXT_BRANCH_STATE := reg_PC_NEXT_NEXT_BRANCH_STATE ;"); +// if (_param->_have_port_depth) +// vhdl->set_body (3,"var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID := reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID ;"); + + { + vhdl->set_comment(3,"========================================="); + vhdl->set_comment(3,"===== PREDICT ==========================="); + vhdl->set_comment(3,"========================================="); + + vhdl->set_body (3,"if ((internal_PREDICT_VAL and in_PREDICT_ACK) = '1') then"); + vhdl->set_body (4,"if (var_PC_NEXT_IS_DS_TAKE = '1') then"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (5,"var_PC_CURRENT_INST_IFETCH_PTR := in_PREDICT_INST_IFETCH_PTR;"); + vhdl->set_body (5,"var_PC_CURRENT_BRANCH_STATE := in_PREDICT_BRANCH_STATE;"); + if (_param->_have_port_depth) + vhdl->set_body (5,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID := in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;"); + vhdl->set_body (5,"else"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (5,"var_PC_NEXT_INST_IFETCH_PTR := in_PREDICT_INST_IFETCH_PTR;"); + vhdl->set_body (5,"var_PC_NEXT_BRANCH_STATE := in_PREDICT_BRANCH_STATE;"); + if (_param->_have_port_depth) + vhdl->set_body (5,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID := in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;"); + vhdl->set_body (4,"end if;"); + + vhdl->set_body (4,"var_PC_NEXT_NEXT_VAL := '1'; -- address is valid"); + vhdl->set_body (4,"var_PC_NEXT_NEXT := in_PREDICT_PC_NEXT;"); + vhdl->set_body (4,"var_PC_NEXT_NEXT_IS_DS_TAKE := in_PREDICT_PC_NEXT_IS_DS_TAKE;"); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE;"); + + vhdl->set_body (3,"end if;"); + } + + { + vhdl->set_comment(3,"========================================="); + vhdl->set_comment(3,"===== ADDRESS ==========================="); + vhdl->set_comment(3,"========================================="); + + vhdl->set_body (3,"if ((internal_ADDRESS_VAL and in_ADDRESS_ACK) = '1') then"); + + vhdl->set_body (4,"var_PC_ACCESS_VAL := '0'; -- transaction with icache"); + + vhdl->set_body (3,"end if;"); + } + + { + vhdl->set_comment(3,"========================================="); + vhdl->set_comment(3,"===== Shift Register ===================="); + vhdl->set_comment(3,"========================================="); + + vhdl->set_body (3,"if ((var_PC_NEXT_NEXT_VAL and var_PC_NEXT_VAL and var_PC_CURRENT_VAL and not var_PC_ACCESS_VAL) = '1') then"); + vhdl->set_body (4,"var_PC_ACCESS_VAL := '1'; -- new request"); + vhdl->set_body (4,"var_PC_CURRENT_VAL := '0'; -- invalid current"); + vhdl->set_body (4,"var_PC_ACCESS := var_PC_CURRENT;"); + vhdl->set_body (4,"var_PC_ACCESS_IS_DS_TAKE := var_PC_CURRENT_IS_DS_TAKE;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (4,"var_PC_ACCESS_INST_IFETCH_PTR := var_PC_CURRENT_INST_IFETCH_PTR;"); + vhdl->set_body (4,"var_PC_ACCESS_BRANCH_STATE := var_PC_CURRENT_BRANCH_STATE;"); + if (_param->_have_port_depth) + vhdl->set_body (4,"var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID := var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID;"); +// for (uint32_t i=0; i<_param->_nb_instruction; i++) +// vhdl->set_body (4,"var_PC_ACCESS_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_CURRENT_INSTRUCTION_ENABLE("+toString(i)+");"); + vhdl->set_body (4,"var_PC_ACCESS_INSTRUCTION_ENABLE := var_PC_CURRENT_INSTRUCTION_ENABLE;"); + vhdl->set_body (3,"end if;"); + + vhdl->set_body (3,"if ((var_PC_NEXT_NEXT_VAL and var_PC_NEXT_VAL and not var_PC_CURRENT_VAL) = '1') then"); + vhdl->set_body (4,"var_PC_CURRENT_VAL := '1'; -- new request"); + vhdl->set_body (4,"var_PC_NEXT_VAL := '0'; -- invalid next"); + vhdl->set_body (4,"var_PC_CURRENT := var_PC_NEXT;"); + vhdl->set_body (4,"var_PC_CURRENT_IS_DS_TAKE := var_PC_NEXT_IS_DS_TAKE;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (4,"var_PC_CURRENT_INST_IFETCH_PTR := var_PC_NEXT_INST_IFETCH_PTR;"); + vhdl->set_body (4,"var_PC_CURRENT_BRANCH_STATE := var_PC_NEXT_BRANCH_STATE;"); + if (_param->_have_port_depth) + vhdl->set_body (4,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID := var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID;"); +// for (uint32_t i=0; i<_param->_nb_instruction; i++) +// vhdl->set_body (4,"var_PC_CURRENT_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+");"); + vhdl->set_body (4,"var_PC_CURRENT_INSTRUCTION_ENABLE := var_PC_NEXT_INSTRUCTION_ENABLE;"); + vhdl->set_body (3,"end if;"); + + vhdl->set_body (3,"if ((var_PC_NEXT_NEXT_VAL and not var_PC_NEXT_VAL) = '1') then"); + vhdl->set_body (4,"var_PC_NEXT_VAL := '1'; -- new request"); + vhdl->set_body (4,"var_PC_NEXT_NEXT_VAL := '0'; -- invalid next_next"); + vhdl->set_body (4,"var_PC_NEXT := var_PC_NEXT_NEXT;"); + vhdl->set_body (4,"var_PC_NEXT_IS_DS_TAKE := var_PC_NEXT_NEXT_IS_DS_TAKE;"); +// if (_param->_have_port_inst_ifetch_ptr) +// vhdl->set_body (4,"var_PC_NEXT_INST_IFETCH_PTR := var_PC_NEXT_NEXT_INST_IFETCH_PTR;"); +// vhdl->set_body (4,"var_PC_NEXT_BRANCH_STATE := var_PC_NEXT_NEXT_BRANCH_STATE;"); +// if (_param->_have_port_depth) +// vhdl->set_body (4,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID := var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID;"); +// for (uint32_t i=0; i<_param->_nb_instruction; i++) +// vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_NEXT_NEXT_INSTRUCTION_ENABLE("+toString(i)+");"); +// vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE := var_PC_NEXT_NEXT_INSTRUCTION_ENABLE;"); + vhdl->set_body (3,"end if;"); + } + + { + vhdl->set_comment(3,"========================================="); + vhdl->set_comment(3,"===== EVENT ============================="); + vhdl->set_comment(3,"========================================="); + + vhdl->set_body (3,"if ((in_EVENT_VAL and internal_EVENT_ACK) = '1') then"); + vhdl->set_body (4,"var_PC_ACCESS_VAL := '0';"); + vhdl->set_body (4,"var_PC_CURRENT_VAL := '0';"); + vhdl->set_body (4,"var_PC_NEXT_VAL := '1';"); + vhdl->set_body (4,"var_PC_NEXT := in_EVENT_ADDRESS;"); + vhdl->set_body (4,"var_PC_NEXT_IS_DS_TAKE := in_EVENT_IS_DS_TAKE;"); + + if (is_power2(_param->_nb_instruction)) + { + uint32_t size = log2(_param->_nb_instruction); + + if (size != 0) + { + std::string range = "var_PC_NEXT"+std_logic_range(size-1,0); + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + vhdl->set_body (4,"if ("+range+" = "+std_logic_cst(size,i)+") then"); + vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := '1';"); + vhdl->set_body (4,"else"); + vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := '0';"); + vhdl->set_body (4,"end if;"); + } + } + else + vhdl->set_body (4,"var_PC_NEXT_INSTRUCTION_ENABLE(0) := '1';"); + } + else + { + throw ERRORMORPHEO(FUNCTION,_("Not Yet supported, Comming Soon.")); + } + + vhdl->set_body (4,"var_PC_NEXT_NEXT_VAL := in_EVENT_ADDRESS_NEXT_VAL;"); + vhdl->set_body (4,"var_PC_NEXT_NEXT := in_EVENT_ADDRESS_NEXT;"); + vhdl->set_body (4,"var_PC_NEXT_NEXT_IS_DS_TAKE := '0';"); + + vhdl->set_body (3,"end if;"); + } + + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"WRITE Register"); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + + vhdl->set_body (3,"reg_PC_ACCESS_VAL <= var_PC_ACCESS_VAL ;"); + vhdl->set_body (3,"reg_PC_ACCESS <= var_PC_ACCESS ;"); + vhdl->set_body (3,"reg_PC_ACCESS_IS_DS_TAKE <= var_PC_ACCESS_IS_DS_TAKE ;"); + vhdl->set_body (3,"reg_PC_ACCESS_INSTRUCTION_ENABLE <= var_PC_ACCESS_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"reg_PC_ACCESS_INST_IFETCH_PTR <= var_PC_ACCESS_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"reg_PC_ACCESS_BRANCH_STATE <= var_PC_ACCESS_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID <= var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"reg_PC_CURRENT_VAL <= var_PC_CURRENT_VAL ;"); + vhdl->set_body (3,"reg_PC_CURRENT <= var_PC_CURRENT ;"); + vhdl->set_body (3,"reg_PC_CURRENT_IS_DS_TAKE <= var_PC_CURRENT_IS_DS_TAKE ;"); + vhdl->set_body (3,"reg_PC_CURRENT_INSTRUCTION_ENABLE <= var_PC_CURRENT_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"reg_PC_CURRENT_INST_IFETCH_PTR <= var_PC_CURRENT_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"reg_PC_CURRENT_BRANCH_STATE <= var_PC_CURRENT_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID <= var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"reg_PC_NEXT_VAL <= var_PC_NEXT_VAL ;"); + vhdl->set_body (3,"reg_PC_NEXT <= var_PC_NEXT ;"); + vhdl->set_body (3,"reg_PC_NEXT_IS_DS_TAKE <= var_PC_NEXT_IS_DS_TAKE ;"); + vhdl->set_body (3,"reg_PC_NEXT_INSTRUCTION_ENABLE <= var_PC_NEXT_INSTRUCTION_ENABLE ;"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"reg_PC_NEXT_INST_IFETCH_PTR <= var_PC_NEXT_INST_IFETCH_PTR ;"); + vhdl->set_body (3,"reg_PC_NEXT_BRANCH_STATE <= var_PC_NEXT_BRANCH_STATE ;"); + if (_param->_have_port_depth) + vhdl->set_body (3,"reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID <= var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID ;"); + vhdl->set_body (3,""); + vhdl->set_body (3,"reg_PC_NEXT_NEXT_VAL <= var_PC_NEXT_NEXT_VAL ;"); + vhdl->set_body (3,"reg_PC_NEXT_NEXT <= var_PC_NEXT_NEXT ;"); + vhdl->set_body (3,"reg_PC_NEXT_NEXT_IS_DS_TAKE <= var_PC_NEXT_NEXT_IS_DS_TAKE ;"); +// vhdl->set_body (3,"reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE <= var_PC_NEXT_NEXT_INSTRUCTION_ENABLE ;"); +// if (_param->_have_port_inst_ifetch_ptr) +// vhdl->set_body (3,"reg_PC_NEXT_NEXT_INST_IFETCH_PTR <= var_PC_NEXT_NEXT_INST_IFETCH_PTR ;"); +// vhdl->set_body (3,"reg_PC_NEXT_NEXT_BRANCH_STATE <= var_PC_NEXT_NEXT_BRANCH_STATE ;"); +// if (_param->_have_port_depth) +// vhdl->set_body (3,"reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID <= var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID ;"); + + + vhdl->set_body (2,"end if; -- reset"); + vhdl->set_body (1,"end if; -- clock"); + vhdl->set_body (0,"end process; -- TRANSITION"); + + vhdl->set_comment(0,"========================================="); + vhdl->set_comment(0,"===== ADDRESS ==========================="); + vhdl->set_comment(0,"========================================="); + + vhdl->set_body (0,"internal_ADDRESS_VAL <= reg_PC_ACCESS_VAL;"); + vhdl->set_body (0," out_ADDRESS_VAL <= internal_ADDRESS_VAL;"); + + if (is_power2(_param->_nb_instruction)) + { + uint32_t size = log2(_param->_nb_instruction); + + vhdl->set_body (0,"out_ADDRESS_INSTRUCTION_ADDRESS <= reg_PC_ACCESS and not "+std_logic_cst(_param->_size_instruction_address,(1<_have_port_inst_ifetch_ptr) + vhdl->set_body (0,"out_ADDRESS_INST_IFETCH_PTR <= reg_PC_ACCESS_INST_IFETCH_PTR;"); + vhdl->set_body (0,"out_ADDRESS_BRANCH_STATE <= reg_PC_ACCESS_BRANCH_STATE;"); + if (_param->_have_port_depth) + vhdl->set_body (0,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID<= reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID;"); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body (0,"out_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE <= reg_PC_ACCESS_INSTRUCTION_ENABLE ("+toString(i)+");"); + + vhdl->set_comment(0,"========================================="); + vhdl->set_comment(0,"===== PREDICT ==========================="); + vhdl->set_comment(0,"========================================="); + + vhdl->set_body (0,"internal_PREDICT_VAL <= not reg_PC_NEXT_NEXT_VAL;"); + vhdl->set_body (0," out_PREDICT_VAL <= internal_PREDICT_VAL; "); + vhdl->set_body (0,"out_PREDICT_PC_PREVIOUS <= reg_PC_CURRENT; "); + vhdl->set_body (0,"out_PREDICT_PC_CURRENT <= reg_PC_NEXT; "); + vhdl->set_body (0,"out_PREDICT_PC_CURRENT_IS_DS_TAKE <= reg_PC_NEXT_IS_DS_TAKE;"); + log_printf(FUNC,Address_management,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp (revision 135) @@ -23,4 +23,52 @@ { log_printf(FUNC,Address_management,FUNCTION,"Begin"); + + vhdl->set_type ("Tinstruction_enable ","array "+_std_logic_range(_param->_nb_instruction)+" of std_logic"); + + vhdl->set_signal ("reg_PC_ACCESS_VAL ", 1); + vhdl->set_signal ("reg_PC_ACCESS ", _param->_size_instruction_address); + vhdl->set_signal ("reg_PC_ACCESS_IS_DS_TAKE ", 1); + vhdl->set_signal ("reg_PC_ACCESS_INSTRUCTION_ENABLE ", "Tinstruction_enable"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_signal ("reg_PC_ACCESS_INST_IFETCH_PTR ", _param->_size_inst_ifetch_ptr); + vhdl->set_signal ("reg_PC_ACCESS_BRANCH_STATE ", _param->_size_branch_state); + if (_param->_have_port_depth) + vhdl->set_signal ("reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID ", _param->_size_depth); + + + vhdl->set_signal ("reg_PC_CURRENT_VAL ", 1); + vhdl->set_signal ("reg_PC_CURRENT ", _param->_size_instruction_address); + vhdl->set_signal ("reg_PC_CURRENT_IS_DS_TAKE ", 1); + vhdl->set_signal ("reg_PC_CURRENT_INSTRUCTION_ENABLE ", "Tinstruction_enable"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_signal ("reg_PC_CURRENT_INST_IFETCH_PTR ",_param->_size_inst_ifetch_ptr); + vhdl->set_signal ("reg_PC_CURRENT_BRANCH_STATE ", _param->_size_branch_state); + if (_param->_have_port_depth) + vhdl->set_signal ("reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID ", _param->_size_depth); + + vhdl->set_signal ("reg_PC_NEXT_VAL ", 1); + vhdl->set_signal ("reg_PC_NEXT ", _param->_size_instruction_address); + vhdl->set_signal ("reg_PC_NEXT_IS_DS_TAKE ", 1); + vhdl->set_signal ("reg_PC_NEXT_INSTRUCTION_ENABLE ", "Tinstruction_enable"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_signal ("reg_PC_NEXT_INST_IFETCH_PTR ",_param->_size_inst_ifetch_ptr); + vhdl->set_signal ("reg_PC_NEXT_BRANCH_STATE ", _param->_size_branch_state); + if (_param->_have_port_depth) + vhdl->set_signal ("reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID ", _param->_size_depth); + + vhdl->set_signal ("reg_PC_NEXT_NEXT_VAL ", 1); + vhdl->set_signal ("reg_PC_NEXT_NEXT ", _param->_size_instruction_address); + vhdl->set_signal ("reg_PC_NEXT_NEXT_IS_DS_TAKE ", 1); +// vhdl->set_signal ("reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE ", "Tinstruction_enable"); +// if (_param->_have_port_inst_ifetch_ptr) +// vhdl->set_signal ("reg_PC_NEXT_NEXT_INST_IFETCH_PTR ",_param->_size_inst_ifetch_ptr); +// vhdl->set_signal ("reg_PC_NEXT_NEXT_BRANCH_STATE ", _param->_size_branch_state); +// if (_param->_have_port_depth) +// vhdl->set_signal ("reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID", _param->_size_depth); + + vhdl->set_signal ("internal_PREDICT_VAL ", 1); + vhdl->set_signal ("internal_ADDRESS_VAL ", 1); + vhdl->set_signal ("internal_EVENT_ACK ", 1); + log_printf(FUNC,Address_management,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 135) @@ -27,4 +27,6 @@ IFETCH_QUEUE_STATE_ERROR_WAIT_RSP // A event occure -> flush the queue but, ack rsp } ifetch_queue_state_t; + +#define IFETCH_QUEUE_STATE_SIZE 2 class ifetch_queue_entry_t Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 135) @@ -23,5 +23,295 @@ { log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); - vhdl->set_body (""); + + vhdl->set_comment(0,"========================================="); + vhdl->set_comment(0,"===== CONSTANT =========================="); + vhdl->set_comment(0,"========================================="); + vhdl->set_body (0,""); + vhdl->set_body (0,"internal_ICACHE_RSP_ACK <= '1';"); + vhdl->set_body (0,"internal_EVENT_RESET_ACK <= '1';"); + vhdl->set_body (0,"out_EVENT_RESET_ACK <= '1';"); + vhdl->set_body (0,"out_ICACHE_RSP_ACK <= '1';"); + vhdl->set_body (0,""); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_comment(0,"TRANSLATION "); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_body (0,"TRANSITION : process (in_CLOCK)"); + vhdl->set_body (0,"variable have_instruction_decod : std_logic;"); + vhdl->set_body (0,"variable have_instruction_enable : std_logic;"); + // vhdl->set_body (0,"variable reg_INSTRUCTION_ENABLE_VAR : std_logic;"); + if (_param->_size_queue>1) { + vhdl->set_body (0,"variable var_PTR_READ :"+ std_logic(log2(_param->_size_queue))+";"); + vhdl->set_body (0,"variable var_PTR_WRITE :"+ std_logic(log2(_param->_size_queue))+";"); + } +// vhdl->set_body (0,"variable var_EMPTY : std_logic;"); + vhdl->set_body (0,"variable var_STATE : Tstate;"); + vhdl->set_body (0,"variable var_INSTRUCTION_ENABLE : Tenable;"); + vhdl->set_body (0,"variable var_ADDRESS : Tadress;"); + if(_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (0,"variable var_INST_IFETCH_PTR : Tinst_ptr;"); + vhdl->set_body (0,"variable var_BRANCH_STATE : Tbranch_state;"); + if(_param->_have_port_depth) + vhdl->set_body (0,"variable var_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";"); + // vhdl->set_body (0,"variable var_internal_ICACHE_RSP_ACK : std_logic;"); + if (_param->_have_port_ifetch_queue_ptr) + vhdl->set_body (0,"variable var_internal_ICACHE_RSP_PACKET_ID : "+std_logic(_param->_size_ifetch_queue_ptr)+";"); + vhdl->set_body (0,"variable var_EXCEPTION : Texception;"); + + + vhdl->set_body (0,"begin -- TRANSITION"); + vhdl->set_body (1,"if (in_CLOCK'event and in_CLOCK = '1')then"); + vhdl->set_body (0,""); + vhdl->set_comment(2,"---------------------------------------------------------------------------"); + vhdl->set_comment(2,"Reset"); + vhdl->set_comment(2,"---------------------------------------------------------------------------"); + vhdl->set_body (2,"if (in_NRESET = '0') then"); + if (_param->_size_queue>1) + { + vhdl->set_body (3,"reg_PTR_READ <= "+std_logic_cst( log2(_param->_size_queue), 0)+";"); + vhdl->set_body (3,"reg_PTR_WRITE <= "+std_logic_cst( log2(_param->_size_queue), 0)+";"); + } +// vhdl->set_body (3,"var_EMPTY := '1';"); + + for (uint32_t i=0; i<_param->_size_queue; i++) + { + vhdl->set_body (3,"reg_STATE("+toString(i)+") <= IFETCH_QUEUE_STATE_EMPTY;"); + } + + vhdl->set_body (3,""); + vhdl->set_body (2,"else"); + vhdl->set_body (3,""); + // std::string write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)"; + // vhdl->set_body (3,"var_STATE := reg_STATE ("+write+");"); + vhdl->set_body (3,"var_STATE := reg_STATE ;"); + if (_param->_size_queue>1) + { + vhdl->set_body (3,"var_PTR_READ := reg_PTR_READ;"); + vhdl->set_body (3,"var_PTR_WRITE := reg_PTR_WRITE;"); + } + +// if (_param->_size_queue>1) +// { +// vhdl->set_body (3,"var_EMPTY := reg_EMPTY ;"); +// } + vhdl->set_body (3,"var_INSTRUCTION_ENABLE := reg_INSTRUCTION_ENABLE ;"); + vhdl->set_body (3,"var_ADDRESS := reg_ADDRESS ;"); + if(_param->_have_port_inst_ifetch_ptr) + vhdl->set_body (3,"var_INST_IFETCH_PTR := reg_INST_IFETCH_PTR ;"); + if (_param->_have_port_ifetch_queue_ptr) + // vhdl->set_body (3,"var_BRANCH_UPDATE_PREDICTION_ID := reg_BRANCH_UPDATE_PREDICTION_ID;"); + vhdl->set_body (3,"var_BRANCH_STATE := reg_BRANCH_STATE ;"); + vhdl->set_body (3,"var_EXCEPTION := reg_EXCEPTION ;"); + + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"ADDRESS "); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + { + std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)"; + vhdl->set_body (3,"if ((in_ADDRESS_VAL and internal_ADDRESS_ACK) = '1') then"); + vhdl->set_body (3,"var_STATE ("+reg_ptr_write+") := IFETCH_QUEUE_STATE_WAIT_RSP;"); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body (3,"var_INSTRUCTION_ENABLE ("+reg_ptr_write+")("+toString(i)+") := in_address_"+toString(i)+"_instruction_enable;"); + + vhdl->set_body (3,"var_ADDRESS("+reg_ptr_write+") := in_ADDRESS_INSTRUCTION_ADDRESS;"); + if(_param->_have_port_inst_ifetch_ptr) + { + vhdl->set_body (3,"var_INST_IFETCH_PTR("+reg_ptr_write+") := in_ADDRESS_INST_IFETCH_PTR;"); + } + vhdl->set_body (3,"var_BRANCH_STATE("+reg_ptr_write+") := in_ADDRESS_BRANCH_STATE;"); + if(_param->_have_port_depth) + vhdl->set_body (3,"var_BRANCH_UPDATE_PREDICTION_ID := in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID;"); + if (_param->_size_queue>1) + { + vhdl->set_body (3,"if (var_PTR_WRITE ="+std_logic_cst( log2(_param->_size_queue),_param->_size_queue-1)+") then"); + vhdl->set_body (3,"var_PTR_WRITE := "+std_logic_cst( log2(_param->_size_queue), 0)+";"); + vhdl->set_body (3,"else"); + if (_param->_size_ifetch_queue_ptr == 1) + vhdl->set_body (3,"var_PTR_WRITE := not var_PTR_WRITE;"); + else + vhdl->set_body (3,"var_PTR_WRITE := (var_PTR_WRITE +"+std_logic_cst( log2(_param->_size_queue),1)+");"); + vhdl->set_body (3,"end if;"); + } + vhdl->set_body (3,"end if;"); + } + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"DECOD "); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + +// have_instruction_decod <= ((internal_DECOD_0_VAL and in_DECOD_0_ACK) or +// (internal_DECOD_1_VAL and in_DECOD_1_ACK) or +// (internal_DECOD_2_VAL and in_DECOD_2_ACK) or +// (internal_DECOD_3_VAL and in_DECOD_3_ACK)); + vhdl->set_body (3,"have_instruction_decod := '0';"); + vhdl->set_body (3,"have_instruction_enable := '0';"); + std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)"; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + vhdl->set_body (3,"if ((internal_DECOD_"+toString(i)+"_VAL and in_DECOD_"+toString(i)+"_ACK) = '1') then"); + vhdl->set_body (4,"have_instruction_decod := '1';"); + vhdl->set_body (4,"var_INSTRUCTION_ENABLE ("+reg_ptr_read+")("+toString(i)+") := '0';"); + vhdl->set_body (3,"end if;"); + vhdl->set_body (4,"have_instruction_enable := have_instruction_enable or var_INSTRUCTION_ENABLE ("+reg_ptr_read+")("+toString(i)+");"); + } + vhdl->set_body (3,"if (have_instruction_decod = '1') then"); + vhdl->set_body (3,"if (have_instruction_enable = '0') then"); + vhdl->set_body (4,"var_STATE ("+reg_ptr_read+") := IFETCH_QUEUE_STATE_EMPTY;"); + + if(_param->_size_queue>1) + { + vhdl->set_body (4,"if (var_PTR_READ ="+std_logic_cst( log2(_param->_size_queue),_param->_size_queue-1)+") then"); + vhdl->set_body (4,"var_PTR_READ := "+std_logic_cst( log2(_param->_size_queue), 0)+"; else"); + if (_param->_size_ifetch_queue_ptr == 1) + vhdl->set_body (4,"var_PTR_READ := not var_PTR_READ;"); + else + vhdl->set_body (4,"var_PTR_READ := var_PTR_READ +"+std_logic_cst( log2(_param->_size_queue),1)+";"); + vhdl->set_body (4,"end if;"); + } + vhdl->set_body (3,"end if;"); + vhdl->set_body (3,"end if;"); + + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"ICACHE_RSP "); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + { std::string address; + if (_param->_have_port_ifetch_queue_ptr) + { + address="conv_integer(var_internal_ICACHE_RSP_PACKET_ID)"; + } + else + { + address="0"; + } + vhdl->set_body (3,"if ((in_ICACHE_RSP_VAL and internal_ICACHE_RSP_ACK)= '1') then"); + if (_param->_have_port_ifetch_queue_ptr) + { + vhdl->set_body(4,"var_internal_ICACHE_RSP_PACKET_ID := in_ICACHE_RSP_PACKET_ID;"); + } + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body(3,"reg_DATA("+address+")("+toString(i)+") <= in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION ;"); + + vhdl->set_body(4,"if (in_ICACHE_RSP_ERROR = ICACHE_ERROR_NONE) then"); + vhdl->set_body(5,"var_EXCEPTION("+address+") := EXCEPTION_IFETCH_NONE;"); + vhdl->set_body(4,"else if (in_ICACHE_RSP_ERROR = ICACHE_ERROR_BUS_ERROR) then"); + vhdl->set_body(5,"var_EXCEPTION("+address+") := EXCEPTION_IFETCH_BUS_ERROR;"); + vhdl->set_body (4,"end if;"); + vhdl->set_body (4,"end if;"); + vhdl->set_body(4,"if (var_STATE("+address+") = IFETCH_QUEUE_STATE_WAIT_RSP) then"); + vhdl->set_body(5," var_STATE("+address+") := IFETCH_QUEUE_STATE_HAVE_RSP;"); + vhdl->set_body(4,"else if var_STATE("+address+") = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP then"); + vhdl->set_body(5," var_STATE("+address+") := IFETCH_QUEUE_STATE_EMPTY;"); + vhdl->set_body (4,"end if;"); + vhdl->set_body (4,"end if;"); + vhdl->set_body (3,"end if;"); + } + + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"EVENT_RESET"); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_body (3,"if ((in_EVENT_RESET_VAL and internal_EVENT_RESET_ACK) = '1' ) then"); + for (uint32_t i=0; i<_param->_size_queue; i++) { + vhdl->set_body(4,"if (var_STATE("+toString(i)+") = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP) then "); + vhdl->set_body(4,"var_STATE("+toString(i)+") := IFETCH_QUEUE_STATE_ERROR_WAIT_RSP;"); + vhdl->set_body(4,"else if var_STATE("+toString(i)+") = IFETCH_QUEUE_STATE_WAIT_RSP then "); + vhdl->set_body(4,"var_STATE("+toString(i)+") := IFETCH_QUEUE_STATE_ERROR_WAIT_RSP;"); + vhdl->set_body(4,"else var_STATE("+toString(i)+") := IFETCH_QUEUE_STATE_EMPTY;"); + if (_param->_size_queue>1) + vhdl->set_body(5,"var_PTR_READ := var_PTR_WRITE;"); +// else +// vhdl->set_body(5,"reg_EMPTY <= '1';"); + + vhdl->set_body(4,"end if;"); + vhdl->set_body(4,"end if;"); + } + //vhdl->set_body (3,"end if;"); + vhdl->set_body (3,"end if;"); + + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + vhdl->set_comment(3,"WRITE Register"); + vhdl->set_comment(3,"---------------------------------------------------------------------------"); + { + if (_param->_size_queue>1) { + vhdl->set_body (3,"reg_PTR_READ <= var_PTR_READ;"); + vhdl->set_body (3,"reg_PTR_WRITE <= var_PTR_WRITE;"); + } +// vhdl->set_body (3,"reg_EMPTY <= var_EMPTY;"); + std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)"; + // vhdl->set_body (3,"reg_STATE ("+reg_ptr_write+") <= var_STATE;"); + vhdl->set_body (3,"reg_STATE <= var_STATE;"); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body (3,"reg_INSTRUCTION_ENABLE("+reg_ptr_write+")("+toString(i)+") <= var_INSTRUCTION_ENABLE("+reg_ptr_write+")("+toString(i)+");"); + // vhdl->set_body (3,"reg_ADDRESS ("+reg_ptr_write+") <= var_ADDRESS;"); + vhdl->set_body (3,"reg_ADDRESS <= var_ADDRESS;"); + if(_param->_have_port_inst_ifetch_ptr) + // vhdl->set_body (3,"reg_INST_IFETCH_PTR ("+reg_ptr_write+") <= var_INST_IFETCH_PTR;"); + vhdl->set_body (3,"reg_INST_IFETCH_PTR <= var_INST_IFETCH_PTR;"); + // vhdl->set_body (3,"reg_BRANCH_STATE ("+reg_ptr_write+") <= var_BRANCH_STATE;"); + vhdl->set_body (3,"reg_BRANCH_STATE <= var_BRANCH_STATE;"); + if(_param->_have_port_depth) + vhdl->set_body (3,"reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_write+") <= var_BRANCH_UPDATE_PREDICTION_ID;"); + if (_param->_size_queue>1) + vhdl->set_body (3,"reg_PTR_WRITE <= var_PTR_WRITE;"); + + std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)"; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + vhdl->set_body (3,"reg_INSTRUCTION_ENABLE("+reg_ptr_read+") ("+toString(i)+") <= var_INSTRUCTION_ENABLE("+reg_ptr_read+")("+toString(i)+");"); + // vhdl->set_body (3,"reg_STATE("+reg_ptr_read+") <= var_STATE;"); + if(_param->_size_queue>1) + vhdl->set_body (3,"reg_PTR_READ <= var_PTR_READ ;"); + // vhdl->set_body (3,"internal_ICACHE_RSP_ACK <= internal_ICACHE_RSP_ACK;"); + if (_param->_have_port_ifetch_queue_ptr) + { + vhdl->set_body (3,"internal_ICACHE_RSP_PACKET_ID <= var_internal_ICACHE_RSP_PACKET_ID;"); + std::string address; + if (_param->_have_port_ifetch_queue_ptr) + address="conv_integer(var_internal_ICACHE_RSP_PACKET_ID)"; + else + address="0"; + // vhdl->set_body (3,"reg_EXCEPTION("+address+") <= var_EXCEPTION;"); + vhdl->set_body (3,"reg_EXCEPTION <= var_EXCEPTION;"); + } + } + vhdl->set_body (2,"end if;"); + vhdl->set_body (1,"end if;"); + vhdl->set_body (0,"end process; -- TRANSITION"); + + + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_comment(0,"GENMOORE"); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_comment(0,"ADDRESS "); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + { + std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)"; + vhdl->set_body (1,"internal_ADDRESS_ACK <= '1' WHEN (reg_STATE("+reg_ptr_write+") = IFETCH_QUEUE_STATE_EMPTY) ELSE"); + vhdl->set_body (1,"'0';"); + vhdl->set_body (1,"out_ADDRESS_ACK <= internal_ADDRESS_ACK;"); + if (_param->_have_port_ifetch_queue_ptr) { + vhdl->set_body (1,"out_ADDRESS_IFETCH_QUEUE_ID <= reg_PTR_WRITE;"); + } + } + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + vhdl->set_comment(0,"DECOD "); + vhdl->set_comment(0,"---------------------------------------------------------------------------"); + { + std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)"; + vhdl->set_body (0,"internal_ack <= '1' WHEN (reg_STATE("+reg_ptr_read+") = IFETCH_QUEUE_STATE_HAVE_RSP) ELSE"); + vhdl->set_body (0,"'0';"); + for (uint32_t j=0; j<_param->_nb_instruction; j++) + { + vhdl->set_body(0,"internal_DECOD_"+toString(j)+"_VAL <= (internal_ack AND reg_INSTRUCTION_ENABLE("+reg_ptr_read+")("+toString(j)+"));"); + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_VAL <= internal_DECOD_"+toString(j)+"_VAL;"); + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_INSTRUCTION <= reg_DATA("+reg_ptr_read+")("+toString(j)+") ;"); + } + vhdl->set_body(0,"out_DECOD_ADDRESS <= reg_ADDRESS("+reg_ptr_read+");"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body(0,"out_DECOD_INST_IFETCH_PTR <= reg_INST_IFETCH_PTR("+reg_ptr_read+");"); + vhdl->set_body(0,"out_DECOD_BRANCH_STATE <= reg_BRANCH_STATE("+reg_ptr_read+");"); + if (_param->_have_port_depth) + vhdl->set_body(0,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID <= reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_read+");"); + vhdl->set_body(0,"out_DECOD_EXCEPTION <= reg_EXCEPTION("+reg_ptr_read+");"); + } + vhdl->set_body(0,""); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 135) @@ -23,4 +23,70 @@ { log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); + + vhdl->set_constant ("IFETCH_QUEUE_STATE_EMPTY ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_EMPTY); +// vhdl->set_constant ("IFETCH_QUEUE_STATE_WAIT_REQ ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_WAIT_REQ); + vhdl->set_constant ("IFETCH_QUEUE_STATE_WAIT_RSP ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_WAIT_RSP); + vhdl->set_constant ("IFETCH_QUEUE_STATE_HAVE_RSP ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_HAVE_RSP); + vhdl->set_constant ("IFETCH_QUEUE_STATE_ERROR_WAIT_RSP ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_ERROR_WAIT_RSP); + + vhdl->set_constant ("EXCEPTION_IFETCH_NONE ",_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE); + vhdl->set_constant ("EXCEPTION_IFETCH_BUS_ERROR ",_param->_size_exception_ifetch,EXCEPTION_IFETCH_BUS_ERROR); + + vhdl->set_constant ("ICACHE_ERROR_NONE ",_param->_size_icache_error,ICACHE_ERROR_NONE); + vhdl->set_constant ("ICACHE_ERROR_BUS_ERROR ",_param->_size_icache_error,ICACHE_ERROR_BUS_ERROR); + + if (_param->_size_queue>1) + { + vhdl->set_signal ("reg_PTR_READ ", log2(_param->_size_queue)); + vhdl->set_signal ("reg_PTR_WRITE ", log2(_param->_size_queue)); + } + if (_param->_have_port_ifetch_queue_ptr) + { + if (_param->_size_queue>1) + vhdl->set_signal ("reg_PACKET_PTR ", log2(_param->_size_queue)); + else + vhdl->set_signal ("reg_PACKET_PTR ", 1); + } + + vhdl->set_signal ("reg_EMPTY ", 1); + + vhdl->set_type ("Tcase ","array ("+toString(_param->_nb_instruction-1)+" downto 0) of "+std_logic(_param->_size_instruction)); + vhdl->set_type ("Tcase_enable ","array ("+toString(_param->_nb_instruction-1)+" downto 0) of std_logic"); + + vhdl->set_type ("Tstate ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(IFETCH_QUEUE_STATE_SIZE)); + vhdl->set_signal ("reg_STATE ", "Tstate"); + + vhdl->set_type ("Tqueue ","array ("+toString(_param->_size_queue-1)+" downto 0) of Tcase"); + vhdl->set_signal ("reg_DATA ", "Tqueue"); + + vhdl->set_type ("Tenable ","array ("+toString(_param->_size_queue-1)+" downto 0) of Tcase_enable"); + vhdl->set_signal ("reg_INSTRUCTION_ENABLE ", "Tenable"); + vhdl->set_type ("Tadress ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_instruction)); + vhdl->set_signal ("reg_ADDRESS ", "Tadress"); + + if (_param->_have_port_inst_ifetch_ptr) + { + vhdl->set_type ("Tinst_ptr ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_inst_ifetch_ptr)); + vhdl->set_signal ("reg_INST_IFETCH_PTR ", "Tinst_ptr"); + } + if (_param->_have_port_depth) + { + vhdl->set_type ("Tbranch ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_depth)); + vhdl->set_signal ("reg_BRANCH_UPDATE_PREDICTION_ID ", "Tbranch"); + } + vhdl->set_type ("Tbranch_state ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_branch_state)); + vhdl->set_signal ("reg_BRANCH_STATE ", "Tbranch_state"); + vhdl->set_type ("Texception ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_exception_ifetch)); + vhdl->set_signal ("reg_EXCEPTION ", "Texception"); + + for (uint32_t i=0; i<_param->_nb_instruction; ++i) + vhdl->set_signal ("internal_DECOD_"+toString(i)+"_VAL ", 1); + vhdl->set_signal ("internal_ADDRESS_ACK ", 1); + vhdl->set_signal ("internal_ICACHE_RSP_ACK ", 1); + vhdl->set_signal ("internal_EVENT_RESET_ACK ", 1); + if(_param->_have_port_ifetch_queue_ptr) + vhdl->set_signal ("internal_ICACHE_RSP_PACKET_ID ", _param->_size_ifetch_queue_ptr); + vhdl->set_signal ("internal_ack ", 1); + log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 135) @@ -38,5 +38,5 @@ { _size_instruction_address = size_general_data; - _size_ifetch_queue_ptr = log2(size_queue); + _size_ifetch_queue_ptr = log2(_size_queue); _size_inst_ifetch_ptr = log2(nb_instruction); _size_depth = size_branch_update_prediction; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp (revision 135) @@ -74,5 +74,5 @@ ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address); ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST,"address_dest",Tgeneral_data_t ,_param->_size_instruction_address); - ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); ALLOC2_SIGNAL_OUT(out_PREDICT_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); ALLOC2_SIGNAL_OUT(out_PREDICT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1); @@ -96,5 +96,5 @@ ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address); ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_instruction_address); - ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); ALLOC1_SIGNAL_IN ( in_DECOD_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); @@ -119,5 +119,5 @@ ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address); ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_instruction_address); - ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_state); + ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION ,"condition" ,Tbranch_condition_t,_param->_size_branch_condition); ALLOC1_SIGNAL_IN ( in_UPDATE_LAST_TAKE ,"last_take" ,Tcontrol_t ,1); ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 135) @@ -156,5 +156,5 @@ // ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); - ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_general_data ); + ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE ,"no_sequence",Tcontrol_t ,1 ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h (revision 135) @@ -36,5 +36,4 @@ namespace register_translation_unit { namespace stat_list_unit { - class Stat_List_unit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp (revision 135) @@ -24,5 +24,406 @@ { log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); - vhdl->set_body (""); + + uint32_t size_bank = log2(_param->_nb_bank); + uint32_t size_gpr_ptr = log2(_param->_nb_general_register_by_bank); + uint32_t size_spr_ptr = log2(_param->_nb_special_register_by_bank); + + uint32_t LSB_gpr_num_reg = 0; + uint32_t MSB_gpr_num_reg = log2(_param->_nb_general_register_by_bank) - 1; + uint32_t LSB_gpr_num_bank = MSB_gpr_num_reg+1; + uint32_t MSB_gpr_num_bank = _param->_size_general_register -1 ; + + uint32_t LSB_spr_num_reg = 0; + uint32_t MSB_spr_num_reg = log2(_param->_nb_special_register_by_bank) - 1; + uint32_t LSB_spr_num_bank = MSB_spr_num_reg+1; + uint32_t MSB_spr_num_bank = _param->_size_special_register -1; + + + vhdl->set_comment(0,"====================================================="); + vhdl->set_comment(0,"=====[ CONSTANT ]===================================="); + vhdl->set_comment(0,"====================================================="); + + for (uint32_t j=0; j<_param->_nb_inst_insert; j++) + vhdl->set_body (0,"internal_INSERT_"+toString(j)+"_ACK <= '1';"); + + for (uint32_t j=0; j<_param->_nb_inst_insert; j++) + vhdl->set_body (0," out_INSERT_"+toString(j)+"_ACK <= internal_INSERT_"+toString(j)+"_ACK;"); + + for (uint32_t j=0; j<_param->_nb_inst_retire; j++) + vhdl->set_body (0,"internal_RETIRE_"+toString(j)+"_ACK <= '1';"); + + for (uint32_t j=0; j<_param->_nb_inst_retire; j++) + vhdl->set_body (0," out_RETIRE_"+toString(j)+"_ACK <= internal_RETIRE_"+toString(j)+"_ACK;"); + + + vhdl->set_body (0,""); + vhdl->set_body (0,"transition: process (in_CLOCK)"); + +// vhdl->set_body (0,"variable gpr_stat_list_next : Tstat_list_gpr;"); +// vhdl->set_body (0,"variable spr_stat_list_next : Tstat_list_spr;"); + + vhdl->set_body (0,"begin -- process transition"); + vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); + vhdl->set_body (2,"if in_NRESET = '0' then"); + + uint32_t gpr = 0; + uint32_t spr = 0; + + vhdl->set_comment(3,"Init Stat List"); + vhdl->set_comment(3,"xxx_stat_list : "); + + vhdl->set_comment(3," [0] is_free"); + vhdl->set_comment(3," [1] is_link"); + + vhdl->set_body (3,""); + vhdl->set_comment(3,"gpr_stat_list"); + vhdl->set_body (3,""); + for (uint32_t i=0; i<_param->_nb_bank; i++) + for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) + if ((gpr++)<_param->_nb_gpr_use_init) + { + vhdl->set_body (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";"); + } + else + { + vhdl->set_body (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";"); + } + + vhdl->set_body (3,""); + vhdl->set_comment(3,"spr_stat_list"); + vhdl->set_body (3,""); + for (uint32_t i=0; i<_param->_nb_bank; i++) + for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) + if ((spr++)<_param->_nb_spr_use_init) + { + vhdl->set_body (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";"); + } + else + { + vhdl->set_body (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";"); + } + + vhdl->set_body (3,""); + vhdl->set_comment(3,"Init Pointer"); + +#ifdef SYSTEMC_VHDL_COMPATIBILITY + if (size_gpr_ptr>0) + vhdl->set_body (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,1)+";"); + if (size_spr_ptr>0) + vhdl->set_body (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,1)+";"); +#else + if (size_gpr_ptr>0) + vhdl->set_body (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,0)+";"); + if (size_spr_ptr>0) + vhdl->set_body (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,0)+";"); +#endif + + vhdl->set_body (2,"else"); // in_CLOCK'event and in_CLOCK = '1' + +// vhdl->set_body (2,"gpr_stat_list_next := gpr_stat_list;"); +// vhdl->set_body (2,"spr_stat_list_next := spr_stat_list;"); + + vhdl->set_comment(3,"====================================================="); + vhdl->set_comment(3,"=====[ INSERT ]======================================"); + vhdl->set_comment(3,"====================================================="); + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + vhdl->set_body (3,"if ((in_INSERT_"+toString(i)+"_VAL and internal_INSERT_"+toString(i)+"_ACK) = '1') then"); + + { + vhdl->set_body (4,"if (in_INSERT_"+toString(i)+"_WRITE_RD = '1') then"); + std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; + std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (5,"gpr_stat_list"+addr+" <= \"10\";"); + vhdl->set_body (4,"end if;"); // write_rd + } + + { + vhdl->set_body (4,"if (in_INSERT_"+toString(i)+"_WRITE_RE = '1') then"); + std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; + std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + vhdl->set_body (5,"spr_stat_list"+addr+" <= \"10\";"); + vhdl->set_body (4,"end if;"); // write_re + } + + vhdl->set_body (3,"end if;"); // transaction insert + } + + vhdl->set_comment(3,"====================================================="); + vhdl->set_comment(3,"=====[ RETIRE ]======================================"); + vhdl->set_comment(3,"====================================================="); + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + vhdl->set_body (3,"if ((in_RETIRE_"+toString(i)+"_VAL and internal_RETIRE_"+toString(i)+"_ACK) = '1') then"); + + std::string restore = "in_RETIRE_"+toString(i)+"_RESTORE"; + + // write rd + vhdl->set_body (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RD = '1') then"); + { + std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"; + + { + std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; + std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + vhdl->set_body (5,"gpr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";"); + } + + { + std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0"; + std::string num_reg = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (5,"if ("+restore+" = '1') then"); + vhdl->set_body (5,"gpr_stat_list"+addr+"(1) <= '0';"); + vhdl->set_body (5,"end if;"); // write_rd + } + } + + vhdl->set_body (4,"end if;"); // write_rd + + // write re + vhdl->set_body (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RE = '1') then"); + { + std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"; + + { + std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; + std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + vhdl->set_body (5,"spr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";"); + } + + { + std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"; + std::string num_bank = (size_bank >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0"; + std::string num_reg = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (5,"if ("+restore+" = '1') then"); + vhdl->set_body (5,"spr_stat_list"+addr+"(1) <= '0';"); + vhdl->set_body (5,"end if;"); // write_re + } + } + + vhdl->set_body (4,"end if;"); // write_re + vhdl->set_body (3,"end if;"); // transaction retire + } + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + { + vhdl->set_comment(3,"====================================================="); + vhdl->set_comment(3,"=====[ PUSH_GPR ]===================================="); + vhdl->set_comment(3,"====================================================="); + vhdl->set_body (3,"if ((internal_PUSH_GPR_"+toString(i)+"_VAL and in_PUSH_GPR_"+toString(i)+"_ACK) = '1') then"); + + std::string num_bank = (size_bank >0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_BANK)"):"0"; + std::string num_reg = (size_gpr_ptr>0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_REG )"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (4,"gpr_stat_list"+addr+"(0) <= '1';"); + vhdl->set_body (3,"end if;"); + } + + { + vhdl->set_comment(3,"====================================================="); + vhdl->set_comment(3,"=====[ PUSH_SPR ]===================================="); + vhdl->set_comment(3,"====================================================="); + vhdl->set_body (3,"if ((internal_PUSH_SPR_"+toString(i)+"_VAL and in_PUSH_SPR_"+toString(i)+"_ACK) = '1') then"); + + std::string num_bank = (size_bank >0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_BANK)"):"0"; + std::string num_reg = (size_spr_ptr>0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_REG )"):"0"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (4,"spr_stat_list"+addr+"(0) <= '1';"); + vhdl->set_body (3,"end if;"); + } + } + + vhdl->set_comment(3,"====================================================="); + vhdl->set_comment(3,"=====[ POINTER ]====================================="); + vhdl->set_comment(3,"====================================================="); + + if (size_gpr_ptr>0) + { + if (is_power2(_param->_nb_general_register_by_bank)) + { + if (size_gpr_ptr == 1) + vhdl->set_body (3,"reg_GPR_PTR_FREE <= not reg_GPR_PTR_FREE;"); + else + vhdl->set_body (3,"reg_GPR_PTR_FREE <= reg_GPR_PTR_FREE - "+std_logic_cst(size_gpr_ptr,1)+";"); + } + else + { + throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2.")); + } + } + + if (size_spr_ptr>0) + { + if (is_power2(_param->_nb_special_register_by_bank)) + { + if (size_spr_ptr == 1) + vhdl->set_body (3,"reg_SPR_PTR_FREE <= not reg_SPR_PTR_FREE;"); + else + vhdl->set_body (3,"reg_SPR_PTR_FREE <= reg_SPR_PTR_FREE - "+std_logic_cst(size_spr_ptr,1)+";"); + } + else + { + throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2.")); + } + } + + vhdl->set_body (2,"end if;"); // in_CLOCK'event and in_CLOCK = '1' + vhdl->set_body (1,"end if;"); // if in_NRESET = '0' + vhdl->set_body (0,"end process transition;"); + + { + vhdl->set_body (0,""); + vhdl->set_comment(0,"====================================================="); + vhdl->set_comment(0,"=====[ PUSH_GPR ]===================================="); + vhdl->set_comment(0,"====================================================="); + vhdl->set_body (0,""); + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + uint32_t offset = i*_param->_nb_bank_by_port_free; + std::string address; + + if (size_gpr_ptr > 0) + { + address = "internal_PUSH_GPR_"+toString(i)+"_NUM_REG"; + vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_REG <= reg_GPR_PTR_FREE;"); + } + else + { + address = "0"; + } + + vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_VAL <= '1' when"); + vhdl->set_body (1,"false"); + + for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++) + { + std::string num_bank = toString(offset+j); + std::string num_reg = "conv_integer("+address+")"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (1,"or (gpr_stat_list"+addr+" = \"00\")"); + } + vhdl->set_body (1,"else '0';"); + + if (size_bank > 0) + { + vhdl->set_body (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_BANK <= "); + for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++) + { + uint32_t _num_bank = offset+j; + std::string num_bank = toString(_num_bank); + std::string num_reg = "conv_integer("+address+")"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (1,std_logic_cst(size_bank,_num_bank)+" when (gpr_stat_list"+addr+" = \"00\") else"); + } + vhdl->set_body (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";"); + } + + vhdl->set_body (0,"out_PUSH_GPR_"+toString(i)+"_VAL <= internal_PUSH_GPR_"+toString(i)+"_VAL;"); + + if (is_power2(_param->_nb_general_register_by_bank)) + { + std::string num_bank = (size_bank > 0)?("internal_PUSH_GPR_"+toString(i)+"_NUM_BANK"):""; + std::string num_reg = (size_gpr_ptr > 0)?address:""; + std::string conc = ((size_gpr_ptr*size_bank) > 0)?" & ":""; + + vhdl->set_body (0,"out_PUSH_GPR_"+toString(i)+"_NUM_REG <= "+num_bank+conc+num_reg+";"); + } + else + { + throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2.")); + } + } + } + + + { + vhdl->set_body (0,""); + vhdl->set_comment(0,"====================================================="); + vhdl->set_comment(0,"=====[ PUSH_SPR ]===================================="); + vhdl->set_comment(0,"====================================================="); + vhdl->set_body (0,""); + + for (uint32_t i=0; i<_param->_nb_reg_free; i++) + { + uint32_t offset = i*_param->_nb_bank_by_port_free; + std::string address; + + if (size_spr_ptr > 0) + { + address = "internal_PUSH_SPR_"+toString(i)+"_NUM_REG"; + vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_REG <= reg_SPR_PTR_FREE;"); + } + else + { + address = "0"; + } + + vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_VAL <= '1' when"); + vhdl->set_body (1,"false"); + + for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++) + { + std::string num_bank = toString(offset+j); + std::string num_reg = "conv_integer("+address+")"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (1,"or (spr_stat_list"+addr+" = \"00\")"); + } + vhdl->set_body (1,"else '0';"); + + if (size_bank > 0) + { + vhdl->set_body (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_BANK <= "); + for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++) + { + uint32_t _num_bank = offset+j; + std::string num_bank = toString(_num_bank); + std::string num_reg = "conv_integer("+address+")"; + std::string addr = "("+num_bank+")("+num_reg+")"; + + vhdl->set_body (1,std_logic_cst(size_bank,_num_bank)+" when (spr_stat_list"+addr+" = \"00\") else"); + } + vhdl->set_body (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";"); + } + + vhdl->set_body (0,"out_PUSH_SPR_"+toString(i)+"_VAL <= internal_PUSH_SPR_"+toString(i)+"_VAL;"); + + if (is_power2(_param->_nb_special_register_by_bank)) + { + std::string num_bank = (size_bank > 0)?("internal_PUSH_SPR_"+toString(i)+"_NUM_BANK"):""; + std::string num_reg = (size_spr_ptr > 0)?address:""; + std::string conc = ((size_spr_ptr*size_bank) > 0)?" & ":""; + + vhdl->set_body (0,"out_PUSH_SPR_"+toString(i)+"_NUM_REG <= "+num_bank+conc+num_reg+";"); + } + else + { + throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2.")); + } + } + } + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp (revision 135) @@ -24,4 +24,45 @@ { log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); + + uint32_t size_bank = log2(_param->_nb_bank); + uint32_t size_gpr_ptr = log2(_param->_nb_general_register_by_bank); + uint32_t size_spr_ptr = log2(_param->_nb_special_register_by_bank); + + // bit 0 : _is_free + // bit 1 : _is_link + vhdl->set_type ("Tone_stat_list_gpr ", "array " + _std_logic_range(_param->_nb_general_register_by_bank) + " of " + std_logic(2)); + vhdl->set_type ("Tstat_list_gpr ", "array " + _std_logic_range(_param->_nb_bank) + " of Tone_stat_list_gpr"); + vhdl->set_signal("gpr_stat_list ", "Tstat_list_gpr"); + + vhdl->set_type ("Tone_stat_list_spr ", "array " + _std_logic_range(_param->_nb_special_register_by_bank) + " of " + std_logic(2)); + vhdl->set_type ("Tstat_list_spr ", "array " + _std_logic_range(_param->_nb_bank) + " of Tone_stat_list_spr"); + vhdl->set_signal("spr_stat_list ", "Tstat_list_spr"); + + if (size_gpr_ptr>0) + vhdl->set_signal("reg_GPR_PTR_FREE ",size_gpr_ptr); + if (size_spr_ptr>0) + vhdl->set_signal("reg_SPR_PTR_FREE ",size_spr_ptr); + + for (uint32_t i=0; i<_param->_nb_inst_insert; i ++) + vhdl->set_signal ("internal_INSERT_"+toString(i)+"_ACK",1); + + for (uint32_t i=0; i<_param->_nb_inst_retire; i ++) + vhdl->set_signal ("internal_RETIRE_"+toString(i)+"_ACK",1); + + for (uint32_t i=0; i<_param->_nb_reg_free; i ++) + { + vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_VAL " ,1); + if (size_bank>0) + vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_NUM_BANK" ,size_bank); + if (size_gpr_ptr>0) + vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_NUM_REG " ,size_gpr_ptr); + + vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_VAL " ,1); + if (size_bank>0) + vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_NUM_BANK" ,size_bank); + if (size_spr_ptr>0) + vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_NUM_REG " ,size_spr_ptr); + } + log_printf(FUNC,Stat_List_unit,FUNCTION,"End"); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 135) @@ -277,5 +277,5 @@ { name = _name+"_rename_unit_"+toString(i); - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit @@ -296,5 +296,5 @@ { name = _name+"_commit_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit @@ -315,5 +315,5 @@ { name = _name+"_issue_queue"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue @@ -334,5 +334,5 @@ { name = _name+"_reexecute_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit @@ -353,5 +353,5 @@ { name = _name+"_special_register_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit @@ -372,5 +372,5 @@ { name = _name+"_glue"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create : %s"),_name.c_str(),name.c_str()); _component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue @@ -398,5 +398,5 @@ { src = _name+"_rename_unit_"+toString(i); - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { @@ -746,5 +746,5 @@ { src = _name+"_commit_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { @@ -1147,5 +1147,5 @@ { src = _name+"_issue_queue"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { @@ -1352,5 +1352,5 @@ { src = _name+"_reexecute_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { @@ -1490,5 +1490,5 @@ { src = _name+"_special_register_unit"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { @@ -1571,5 +1571,5 @@ { src = _name+"_glue"; - log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str()); + log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str()); { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 135) @@ -154,4 +154,14 @@ #define ALLOC0_INTERFACE_END() + +#ifdef VHDL_TESTBENCH +#define INTERFACE0_TEST(value) \ + do \ + { \ + interface->make_testbench(value); \ + } while(0) +#else +#define INTERFACE0_TEST(value) +#endif #define ALLOC0_VAL_ACK_IN( sig, name, type) \ @@ -351,4 +361,15 @@ delete [] interface; \ } while (0) + +#ifdef VHDL_TESTBENCH +#define INTERFACE1_TEST(value,x1) \ + do \ + { \ + for (uint32_t it1=0; it1make_testbench(value); \ + } while(0) +#else +#define INTERFACE1_TEST(value,x1) +#endif #define ALLOC1_VAL_ACK_IN( sig, name, type) \ @@ -571,4 +592,16 @@ delete [] interface; \ } while (0) + +#ifdef VHDL_TESTBENCH +#define INTERFACE2_TEST(value,x1,x2) \ + do \ + { \ + for (uint32_t it1=0; it1make_testbench(value); \ + } while(0) +#else +#define INTERFACE2_TEST(value,x1,x2) +#endif #define _ALLOC2_VAL_ACK_IN( sig, name, type, x1, x2) \ @@ -861,4 +894,17 @@ } while (0) +#ifdef VHDL_TESTBENCH +#define INTERFACE3_TEST(value,x1,x2,x3) \ + do \ + { \ + for (uint32_t it1=0; it1make_testbench(value); \ + } while(0) +#else +#define INTERFACE3_TEST(value,x1,x2,x3) +#endif + // #define _ALLOC3_VAL_ACK_IN( sig, name, type, x1, x2, x3) // #define _ALLOC3_VAL_ACK_OUT( sig, name, type, x1, x2, x3) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 135) @@ -55,4 +55,5 @@ #ifdef VHDL_TESTBENCH private : uint32_t _nb_cycle ; + protected : bool _make_testbench; #endif @@ -232,4 +233,5 @@ public : Signal * get_reset (void); + public : void make_testbench (bool value) {_make_testbench = value;} public : void testbench (void); public : void testbench_cycle (void); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 135) @@ -10,8 +10,8 @@ #define MORPHEO_MAJOR_VERSION "0" #define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "134" +#define MORPHEO_REVISION "135" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "15" +#define MORPHEO_DATE_DAY "17" #define MORPHEO_DATE_MONTH "07" #define MORPHEO_DATE_YEAR "2009" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h (revision 135) @@ -23,4 +23,9 @@ namespace morpheo { namespace behavioural { + +#define id1(x1) toString(x1) +#define id2(x1,x2) toString(x1)+"_"+toString(x2) +#define id3(x1,x2,x3) toString(x1)+"_"+toString(x2)+"_"+toString(x3) +#define id4(x1,x2,x3,x4) toString(x1)+"_"+toString(x2)+"_"+toString(x3)+"_"+toString(x4) #define VHDL_EXTENSION ".vhdl" Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 135) @@ -19,4 +19,9 @@ #target_dep all Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest #target_dep all Generic/Select/Select_Priority_Fixed/SelfTest + target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest + target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest + target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest + target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest + target_dep all Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp (revision 135) @@ -38,4 +38,5 @@ #ifdef VHDL_TESTBENCH _nb_cycle = 0; + _make_testbench= true; #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp (revision 135) @@ -52,5 +52,10 @@ vhdl->set_body(""); - vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";"); +// vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";"); + + if (_make_testbench) + vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";"); + else + vhdl->set_body(test_name + " <= '1';"); // #ifdef VHDL_TESTBENCH_ASSERT Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp (revision 135) @@ -26,5 +26,10 @@ std::string test_name_ok = testbench_test_ok (vhdl); - vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";"); +// vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";"); + + if (_make_testbench) + vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";"); + else + vhdl->set_body(test_name + " <= '1';"); log_printf(FUNC,Behavioural,"testbench_test","End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 135) @@ -102,6 +102,6 @@ if (not source_have_multi_consumer) connect (signal_dest); - else - msgWarning(_("Source have multi consumer !\n")); +// else +// msgWarning(_("Source have multi consumer !\n")); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 134) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 135) @@ -4,5 +4,5 @@ - + @@ -25,5 +25,5 @@ - +