Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 136) @@ -26,4 +26,6 @@ public : uint32_t _nb_thread ; public : uint32_t * _size_ifetch_queue ;//[nb_thread] + public : morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * _ifetch_queue_scheme ;//[nb_thread] public : uint32_t * _nb_inst_fetch ;//[nb_thread] public : bool ** _implement_group ;//[nb_thread][NB_GROUP] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 136) @@ -172,4 +172,5 @@ DELETE2(_param->_implement_group ,_param->_nb_thread,NB_GROUP); DELETE1(_param->_nb_inst_fetch ,_param->_nb_thread); + DELETE1(_param->_ifetch_queue_scheme ,_param->_nb_thread); DELETE1(_param->_size_ifetch_queue ,_param->_nb_thread); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 136) @@ -42,4 +42,6 @@ ALLOC1(_param->_size_ifetch_queue,uint32_t,_param->_nb_thread); + ALLOC1(_param->_ifetch_queue_scheme ,morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + ,_param->_nb_thread); ALLOC1(_param->_nb_inst_fetch ,uint32_t,_param->_nb_thread); ALLOC2(_param->_implement_group ,bool ,_param->_nb_thread,NB_GROUP); @@ -52,9 +54,11 @@ //log_printf(INFO,Configuration,FUNCTION,_("THREAD [%d]"),i); - _param->_size_ifetch_queue [i] = fromString(getParam("size_ifetch_queue", "thread",toString(i).c_str(),"")); - _param->_nb_inst_fetch [i] = fromString(getParam("nb_inst_fetch" , "thread",toString(i).c_str(),"")); - _param->_ras_size_queue [i] = fromString(getParam("ras_size_queue" , "thread",toString(i).c_str(),"")); - _param->_upt_size_queue [i] = fromString(getParam("upt_size_queue" , "thread",toString(i).c_str(),"")); - _param->_ufpt_size_queue [i] = fromString(getParam("ufpt_size_queue" , "thread",toString(i).c_str(),"")); + _param->_size_ifetch_queue [i] = fromString(getParam("size_ifetch_queue" , "thread",toString(i).c_str(),"")); + _param->_ifetch_queue_scheme [i] = fromString + (getParam("ifetch_queue_scheme", "thread",toString(i).c_str(),"")); + _param->_nb_inst_fetch [i] = fromString(getParam("nb_inst_fetch" , "thread",toString(i).c_str(),"")); + _param->_ras_size_queue [i] = fromString(getParam("ras_size_queue" , "thread",toString(i).c_str(),"")); + _param->_upt_size_queue [i] = fromString(getParam("upt_size_queue" , "thread",toString(i).c_str(),"")); + _param->_ufpt_size_queue [i] = fromString(getParam("ufpt_size_queue" , "thread",toString(i).c_str(),"")); // just read !!! Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h (revision 136) @@ -120,4 +120,5 @@ public : SC_IN (Ttype_t ) *** in_ISSUE_OOO_ENGINE_TYPE ;//[nb_ooo_engine][nb_inst_issue] public : SC_IN (Toperation_t ) *** in_ISSUE_OOO_ENGINE_OPERATION ;//[nb_ooo_engine][nb_inst_issue] + public : SC_IN (Tcontrol_t ) *** in_ISSUE_OOO_ENGINE_CANCEL ;//[nb_ooo_engine][nb_inst_issue] public : SC_IN (Tlsq_ptr_t ) *** in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE ;//[nb_ooo_engine][nb_inst_issue] public : SC_IN (Tlsq_ptr_t ) *** in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ ;//[nb_ooo_engine][nb_inst_issue] @@ -145,4 +146,5 @@ public : SC_OUT(Toperation_t ) *** out_ISSUE_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_read_unit] public : SC_OUT(Ttype_t ) *** out_ISSUE_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_read_unit] + public : SC_OUT(Tcontrol_t ) *** out_ISSUE_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_read_unit] public : SC_OUT(Tlsq_ptr_t ) *** out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE ;//[nb_execute_loop][nb_read_unit] public : SC_OUT(Tlsq_ptr_t ) *** out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ ;//[nb_execute_loop][nb_read_unit] @@ -171,4 +173,5 @@ //public : SC_OUT(Ttype_t ) **** out_EXECUTE_OOO_ENGINE_TYPE ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] //public : SC_OUT(Toperation_t ) **** out_EXECUTE_OOO_ENGINE_OPERATION ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] + public : SC_OUT(Tcontrol_t ) **** out_EXECUTE_OOO_ENGINE_CANCEL ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] public : SC_OUT(Tspecial_data_t ) **** out_EXECUTE_OOO_ENGINE_FLAGS ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] public : SC_OUT(Texception_t ) **** out_EXECUTE_OOO_ENGINE_EXCEPTION ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] @@ -185,4 +188,5 @@ //public : SC_IN (Toperation_t ) *** in_EXECUTE_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_write_unit] //public : SC_IN (Ttype_t ) *** in_EXECUTE_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_write_unit] + public : SC_IN (Tcontrol_t ) *** in_EXECUTE_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_write_unit] public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_write_unit] public : SC_IN (Texception_t ) *** in_EXECUTE_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_write_unit] @@ -191,18 +195,18 @@ public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_write_unit] - // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_VAL ;//[nb_ooo_engine][nb_inst_insert] - public : SC_OUT(Tcontrol_t ) *** out_INSERT_OOO_ENGINE_ACK ;//[nb_ooo_engine][nb_inst_insert] - public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RD_USE ;//[nb_ooo_engine][nb_inst_insert] - public : SC_IN (Tgeneral_address_t) *** in_INSERT_OOO_ENGINE_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] - public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RE_USE ;//[nb_ooo_engine][nb_inst_insert] - public : SC_IN (Tspecial_address_t) *** in_INSERT_OOO_ENGINE_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] - - public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_VAL ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] - public : SC_IN (Tcontrol_t ) **** in_INSERT_EXECUTE_LOOP_ACK ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] - public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RD_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] - public : SC_OUT(Tgeneral_address_t) **** out_INSERT_EXECUTE_LOOP_RD_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] - public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RE_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] - public : SC_OUT(Tspecial_address_t) **** out_INSERT_EXECUTE_LOOP_RE_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_VAL ;//[nb_ooo_engine][nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_OOO_ENGINE_ACK ;//[nb_ooo_engine][nb_inst_insert] +// public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RD_USE ;//[nb_ooo_engine][nb_inst_insert] +// public : SC_IN (Tgeneral_address_t) *** in_INSERT_OOO_ENGINE_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] +// public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RE_USE ;//[nb_ooo_engine][nb_inst_insert] +// public : SC_IN (Tspecial_address_t) *** in_INSERT_OOO_ENGINE_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] + +// public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_VAL ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// public : SC_IN (Tcontrol_t ) **** in_INSERT_EXECUTE_LOOP_ACK ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RD_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// public : SC_OUT(Tgeneral_address_t) **** out_INSERT_EXECUTE_LOOP_RD_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RE_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] +// public : SC_OUT(Tspecial_address_t) **** out_INSERT_EXECUTE_LOOP_RE_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] @@ -254,5 +258,5 @@ public : void genMealy_issue (void); public : void genMealy_execute (void); - public : void genMealy_insert (void); +//public : void genMealy_insert (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h (revision 136) @@ -31,5 +31,5 @@ public : uint32_t * _front_end_nb_inst_branch_complete ;//[nb_front_end] public : uint32_t * _ooo_engine_nb_inst_branch_complete ;//[nb_ooo_engine] - public : uint32_t * _nb_inst_insert ;//[nb_ooo_engine] +//public : uint32_t * _nb_inst_insert ;//[nb_ooo_engine] public : uint32_t * _nb_inst_reexecute ;//[nb_ooo_engine] public : uint32_t * _nb_inst_issue_queue ;//[nb_ooo_engine] @@ -64,5 +64,5 @@ public : Tcontext_t ** _translate_num_ooo_engine_to_execute_loop_ooo_engine_id ;//[nb_ooo_engine][nb_execute_loop] - public : uint32_t ** _execute_loop_nb_inst_insert ;//[nb_execute_loop][execute_loop_nb_ooo_engine] +//public : uint32_t ** _execute_loop_nb_inst_insert ;//[nb_execute_loop][execute_loop_nb_ooo_engine] public : uint32_t ** _execute_loop_nb_inst_issue_slot ;//[nb_execute_loop][execute_loop_nb_ooo_engine] //public : uint32_t * _link_execute_loop_with_ooo_engine ;//[nb_ooo_engine] @@ -73,5 +73,5 @@ public : uint32_t _max_nb_inst_execute ; public : uint32_t _max_nb_write_unit ; - public : uint32_t _max_nb_inst_insert ; +//public : uint32_t _max_nb_inst_insert ; public : uint32_t _max_nb_inst_issue_queue ; public : uint32_t _max_nb_inst_issue_slot ; @@ -90,5 +90,5 @@ uint32_t * front_end_nb_inst_branch_complete ,//[nb_front_end] uint32_t * ooo_engine_nb_inst_branch_complete ,//[nb_ooo_engine] - uint32_t * nb_inst_insert ,//[nb_ooo_engine] +// uint32_t * nb_inst_insert ,//[nb_ooo_engine] uint32_t * nb_inst_reexecute ,//[nb_ooo_engine] uint32_t * nb_inst_issue_queue ,//[nb_ooo_engine] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp (revision 136) @@ -174,4 +174,5 @@ << (*(in_ISSUE_OOO_ENGINE_TYPE [i][j])) << (*(in_ISSUE_OOO_ENGINE_OPERATION [i][j])) + << (*(in_ISSUE_OOO_ENGINE_CANCEL [i][j])) << (*(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [i][j])) << (*(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ [i][j])) @@ -224,4 +225,5 @@ // << (*(in_EXECUTE_EXECUTE_LOOP_OPERATION [i][j])) // << (*(in_EXECUTE_EXECUTE_LOOP_TYPE [i][j])) + << (*(in_EXECUTE_EXECUTE_LOOP_CANCEL [i][j])) << (*(in_EXECUTE_EXECUTE_LOOP_FLAGS [i][j])) << (*(in_EXECUTE_EXECUTE_LOOP_EXCEPTION [i][j])) @@ -243,25 +245,25 @@ # endif - log_printf(INFO,Core_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str()); - SC_METHOD (genMealy_insert); - dont_initialize (); -// sensitive << (*(in_CLOCK)).neg(); // don't need internal register - sensitive << (*(in_NRESET)); - - for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) - for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) - sensitive << (*(in_INSERT_OOO_ENGINE_VAL [i][j])) - << (*(in_INSERT_OOO_ENGINE_RD_USE [i][j])) - << (*(in_INSERT_OOO_ENGINE_RD_NUM_REG [i][j])) - << (*(in_INSERT_OOO_ENGINE_RE_USE [i][j])) - << (*(in_INSERT_OOO_ENGINE_RE_NUM_REG [i][j])); - for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) - for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) - sensitive << (*(in_INSERT_EXECUTE_LOOP_ACK [i][j][k])); - -# ifdef SYSTEMCASS_SPECIFIC - // List dependency information -# endif +// log_printf(INFO,Core_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str()); +// SC_METHOD (genMealy_insert); +// dont_initialize (); +// // sensitive << (*(in_CLOCK)).neg(); // don't need internal register +// sensitive << (*(in_NRESET)); + +// for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) +// for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) +// sensitive << (*(in_INSERT_OOO_ENGINE_VAL [i][j])) +// << (*(in_INSERT_OOO_ENGINE_RD_USE [i][j])) +// << (*(in_INSERT_OOO_ENGINE_RD_NUM_REG [i][j])) +// << (*(in_INSERT_OOO_ENGINE_RE_USE [i][j])) +// << (*(in_INSERT_OOO_ENGINE_RE_NUM_REG [i][j])); +// for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) +// for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) +// for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) +// sensitive << (*(in_INSERT_EXECUTE_LOOP_ACK [i][j][k])); + +// # ifdef SYSTEMCASS_SPECIFIC +// // List dependency information +// # endif #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp (revision 136) @@ -140,4 +140,5 @@ _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); + _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); @@ -171,4 +172,5 @@ _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); + _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); @@ -202,4 +204,5 @@ // _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); // _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); + _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); @@ -222,4 +225,5 @@ // _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); // _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); + _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); @@ -231,30 +235,30 @@ } - // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - { - ALLOC2_INTERFACE_BEGIN("insert_ooo_engine",SOUTH,IN ,_("Insert"),_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// ALLOC2_INTERFACE_BEGIN("insert_ooo_engine",SOUTH,IN ,_("Insert"),_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_OUT(out_INSERT_OOO_ENGINE_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); - } - - { - ALLOC3_INTERFACE_BEGIN("insert_execute_loop",SOUTH,IN ,_("Insert"),_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// _ALLOC2_SIGNAL_OUT(out_INSERT_OOO_ENGINE_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); +// } + +// { +// ALLOC3_INTERFACE_BEGIN("insert_execute_loop",SOUTH,IN ,_("Insert"),_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_IN ( in_INSERT_EXECUTE_LOOP_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - - ALLOC3_INTERFACE_END(_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); - } +// _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC3_SIGNAL_IN ( in_INSERT_EXECUTE_LOOP_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); + +// ALLOC3_INTERFACE_END(_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); +// } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp (revision 136) @@ -146,17 +146,17 @@ DELETE2_SIGNAL( in_EXECUTE_EXECUTE_LOOP_DATA ,_param->_nb_execute_loop,_param->_nb_write_unit[it1],_param->_size_general_data); - DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); - DELETE2_SIGNAL(out_INSERT_OOO_ENGINE_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); - DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); - DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_general_register); - DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); - DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_special_register); +// DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); +// DELETE2_SIGNAL(out_INSERT_OOO_ENGINE_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_general_register); +// DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_special_register); - DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_VAL ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); - DELETE3_SIGNAL( in_INSERT_EXECUTE_LOOP_ACK ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); - DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); - DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_general_register); - DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); - DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_special_register); +// DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_VAL ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); +// DELETE3_SIGNAL( in_INSERT_EXECUTE_LOOP_ACK ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); +// DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); +// DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_general_register); +// DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); +// DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_special_register); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_execute.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_execute.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_execute.cpp (revision 136) @@ -56,4 +56,5 @@ // PORT_WRITE(out_EXECUTE_OOO_ENGINE_TYPE [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_TYPE [i][j])); // PORT_WRITE(out_EXECUTE_OOO_ENGINE_OPERATION [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_OPERATION [i][j])); + PORT_WRITE(out_EXECUTE_OOO_ENGINE_CANCEL [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_CANCEL [i][j])); PORT_WRITE(out_EXECUTE_OOO_ENGINE_FLAGS [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_FLAGS [i][j])); PORT_WRITE(out_EXECUTE_OOO_ENGINE_EXCEPTION [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_EXCEPTION [i][j])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp (revision 136) @@ -1,78 +1,78 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ +// #ifdef SYSTEMC +// /* +// * $Id$ +// * +// * [ Description ] +// * +// */ -#include "Behavioural/Core/Core_Glue/include/Core_Glue.h" +// #include "Behavioural/Core/Core_Glue/include/Core_Glue.h" -namespace morpheo { -namespace behavioural { -namespace core { -namespace core_glue { +// namespace morpheo { +// namespace behavioural { +// namespace core { +// namespace core_glue { -#undef FUNCTION -#define FUNCTION "Core_Glue::genMealy_insert" - void Core_Glue::genMealy_insert (void) - { - log_begin(Core_Glue,FUNCTION); - log_function(Core_Glue,FUNCTION,_name.c_str()); +// #undef FUNCTION +// #define FUNCTION "Core_Glue::genMealy_insert" +// void Core_Glue::genMealy_insert (void) +// { +// log_begin(Core_Glue,FUNCTION); +// log_function(Core_Glue,FUNCTION,_name.c_str()); - if (PORT_READ(in_NRESET)) - { - for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) - { - Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; +// if (PORT_READ(in_NRESET)) +// { +// for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) +// for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) +// { +// Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; - for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) - { - log_printf(TRACE,Core_Glue,FUNCTION," * INSERT_OOO_ENGINE [%d][%d] <-> INSERT_EXECUTE_LOOP [%d][%d][%d]",num_ooo_engine,k,i,j,k); +// for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) +// { +// log_printf(TRACE,Core_Glue,FUNCTION," * INSERT_OOO_ENGINE [%d][%d] <-> INSERT_EXECUTE_LOOP [%d][%d][%d]",num_ooo_engine,k,i,j,k); - Tcontrol_t ooo_engine_val = PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k]); - Tcontrol_t execute_loop_ack = PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]); +// Tcontrol_t ooo_engine_val = PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k]); +// Tcontrol_t execute_loop_ack = PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]); - Tcontrol_t execute_loop_val = ooo_engine_val ; - Tcontrol_t ooo_engine_ack = execute_loop_ack; +// Tcontrol_t execute_loop_val = ooo_engine_val ; +// Tcontrol_t ooo_engine_ack = execute_loop_ack; - log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_val (r) : %d",ooo_engine_val ); - log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_ack (w) : %d",ooo_engine_ack ); - log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_val (w) : %d",execute_loop_val); - log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_ack (r) : %d",execute_loop_ack); +// log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_val (r) : %d",ooo_engine_val ); +// log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_ack (w) : %d",ooo_engine_ack ); +// log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_val (w) : %d",execute_loop_val); +// log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_ack (r) : %d",execute_loop_ack); - PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],ooo_engine_ack ); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],execute_loop_val); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_USE [num_ooo_engine][k])); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_NUM_REG [num_ooo_engine][k])); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_USE [num_ooo_engine][k])); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_NUM_REG [num_ooo_engine][k])); - } - } - } - else - { - for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) - for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) - { - Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; +// PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],ooo_engine_ack ); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],execute_loop_val); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_USE [num_ooo_engine][k])); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_NUM_REG [num_ooo_engine][k])); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_USE [num_ooo_engine][k])); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_NUM_REG [num_ooo_engine][k])); +// } +// } +// } +// else +// { +// for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) +// for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) +// { +// Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; - for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) - { - PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],0); - PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],0); - } - } - } +// for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) +// { +// PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],0); +// PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],0); +// } +// } +// } - log_end(Core_Glue,FUNCTION); - }; +// log_end(Core_Glue,FUNCTION); +// }; -}; // end namespace core_glue -}; // end namespace core +// }; // end namespace core_glue +// }; // end namespace core -}; // end namespace behavioural -}; // end namespace morpheo -#endif +// }; // end namespace behavioural +// }; // end namespace morpheo +// #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp (revision 136) @@ -197,4 +197,5 @@ PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue_queue])); PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [num_execute_loop][num_read_unit],type); + PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CANCEL [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CANCEL [num_ooo_engine][num_inst_issue_queue])); PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue_queue])); PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ [num_ooo_engine][num_inst_issue_queue])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp (revision 136) @@ -29,5 +29,5 @@ uint32_t * front_end_nb_inst_branch_complete ,//[nb_front_end] uint32_t * ooo_engine_nb_inst_branch_complete ,//[nb_ooo_engine] - uint32_t * nb_inst_insert ,//[nb_ooo_engine] +// uint32_t * nb_inst_insert ,//[nb_ooo_engine] uint32_t * nb_inst_reexecute ,//[nb_ooo_engine] uint32_t * nb_inst_issue_queue ,//[nb_ooo_engine] @@ -66,5 +66,5 @@ _front_end_nb_inst_branch_complete = front_end_nb_inst_branch_complete ; _ooo_engine_nb_inst_branch_complete = ooo_engine_nb_inst_branch_complete ; - _nb_inst_insert = nb_inst_insert ; +// _nb_inst_insert = nb_inst_insert ; _nb_inst_reexecute = nb_inst_reexecute ; _nb_inst_issue_queue = nb_inst_issue_queue ; @@ -117,5 +117,5 @@ } - ALLOC2(_execute_loop_nb_inst_insert,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// ALLOC2(_execute_loop_nb_inst_insert,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); ALLOC2(_execute_loop_nb_inst_issue_slot ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); @@ -125,5 +125,5 @@ uint32_t num_ooo_engine = _translate_execute_loop_num_ooo_engine [i][j]; _execute_loop_nb_inst_issue_slot [i][j] = _nb_inst_issue_slot [num_ooo_engine]; - _execute_loop_nb_inst_insert [i][j] = _nb_inst_insert [num_ooo_engine]; +// _execute_loop_nb_inst_insert [i][j] = _nb_inst_insert [num_ooo_engine]; } @@ -133,5 +133,5 @@ _max_nb_inst_execute = max(_nb_inst_execute ,_nb_ooo_engine, _ooo_engine_nb_execute_loop); _max_nb_write_unit = max(_nb_write_unit ,_nb_execute_loop); - _max_nb_inst_insert = max(_nb_inst_insert ,_nb_ooo_engine); +// _max_nb_inst_insert = max(_nb_inst_insert ,_nb_ooo_engine); _max_nb_inst_issue_queue = max(_nb_inst_issue_queue ,_nb_ooo_engine); _max_nb_inst_issue_slot = max(_nb_inst_issue_slot ,_nb_ooo_engine); @@ -189,5 +189,5 @@ DELETE2(_execute_loop_nb_inst_issue_slot ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); - DELETE2(_execute_loop_nb_inst_insert ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// DELETE2(_execute_loop_nb_inst_insert ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); DELETE2(_translate_num_ooo_engine_to_execute_loop_ooo_engine_id ,_nb_ooo_engine,_nb_execute_loop); DELETE2(_translate_num_execute_loop_to_ooo_engine_execute_loop_id,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Execute_loop_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Execute_loop_Glue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Execute_loop_Glue.h (revision 136) @@ -102,4 +102,14 @@ public : SC_OUT(Tspecial_address_t) ** out_SPR_WRITE_READ_UNIT_NUM_REG ; public : SC_OUT(Tspecial_data_t ) ** out_SPR_WRITE_READ_UNIT_DATA ; + + // -----[ Interface "issue" ]----------------------------------------- + public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; + + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_READ_UNIT_VAL ; + public : SC_IN (Tcontrol_t ) ** in_ISSUE_READ_UNIT_ACK ; + + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_REGISTER_UNIT_VAL ; + public : SC_IN (Tcontrol_t ) ** in_ISSUE_REGISTER_UNIT_ACK ; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -144,4 +154,5 @@ public : void genMealy_gpr_write (void); public : void genMealy_spr_write (void); + public : void genMealy_issue (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Parameters.h (revision 136) @@ -25,4 +25,5 @@ public : uint32_t _nb_gpr_write ; public : uint32_t _nb_spr_write ; + public : uint32_t _nb_inst_issue ; //public : uint32_t _size_ooo_engine_id ; //public : uint32_t _size_general_register ; @@ -36,4 +37,5 @@ public : Parameters (uint32_t nb_gpr_write , uint32_t nb_spr_write , + uint32_t nb_inst_issue , uint32_t size_ooo_engine_id , uint32_t size_general_register , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue.cpp (revision 136) @@ -166,4 +166,18 @@ } # endif + + log_printf(INFO,Execute_loop_Glue,FUNCTION,_("<%s> : Method - genMealy_issue"),_name.c_str()); + + SC_METHOD (genMealy_issue); + dont_initialize (); +// sensitive << (*(in_CLOCK)).neg();// don't need internal register + for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) + sensitive << (*(in_ISSUE_VAL [i])) + << (*(in_ISSUE_READ_UNIT_ACK [i])) + << (*(in_ISSUE_REGISTER_UNIT_ACK [i])); + +# ifdef SYSTEMCASS_SPECIFIC + // List dependency information +# endif #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_allocation.cpp (revision 136) @@ -132,4 +132,18 @@ } + // -----[ Interface "issue" ]----------------------------------------- + { + ALLOC1_INTERFACE_BEGIN("issue",IN,WEST, _("Issue"), _param->_nb_inst_issue); + + ALLOC1_SIGNAL_IN ( in_ISSUE_VAL ,"val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_ISSUE_ACK ,"ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_ISSUE_READ_UNIT_VAL ,"read_unit_val" ,Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_ISSUE_READ_UNIT_ACK ,"read_unit_ack" ,Tcontrol_t,1); + ALLOC1_SIGNAL_OUT(out_ISSUE_REGISTER_UNIT_VAL,"register_unit_val",Tcontrol_t,1); + ALLOC1_SIGNAL_IN ( in_ISSUE_REGISTER_UNIT_ACK,"register_unit_ack",Tcontrol_t,1); + + ALLOC1_INTERFACE_END(_param->_nb_inst_issue); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_genMealy_issue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_genMealy_issue.cpp (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_genMealy_issue.cpp (revision 136) @@ -0,0 +1,75 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Execute_loop_Glue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_execute_loop { +namespace execute_loop { +namespace execute_loop_glue { + + +#undef FUNCTION +#define FUNCTION "Execute_loop_Glue::genMealy_issue" + void Execute_loop_Glue::genMealy_issue (void) + { + log_begin(Execute_loop_Glue,FUNCTION); + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + { + Tcontrol_t ack ; + Tcontrol_t read_unit_val ; + Tcontrol_t register_unit_val; + + if (PORT_READ(in_NRESET)) + { + Tcontrol_t val = PORT_READ(in_ISSUE_VAL [i]); + Tcontrol_t read_unit_ack = PORT_READ(in_ISSUE_READ_UNIT_ACK [i]); + Tcontrol_t register_unit_ack = PORT_READ(in_ISSUE_REGISTER_UNIT_ACK [i]); + + ack = ( +// val and + read_unit_ack and + register_unit_ack + ); + read_unit_val = ( + val and +// read_unit_ack and + register_unit_ack + ); + register_unit_val = ( + val and + read_unit_ack // and +// register_unit_ack + ); + } + else + { + ack = false; + read_unit_val = false; + register_unit_val = false; + } + + PORT_WRITE(out_ISSUE_ACK [i],ack ); + PORT_WRITE(out_ISSUE_READ_UNIT_VAL [i],read_unit_val ); + PORT_WRITE(out_ISSUE_REGISTER_UNIT_VAL [i],register_unit_val); + } + + log_end(Execute_loop_Glue,FUNCTION); + }; + +}; // end namespace execute_loop_glue +}; // end namespace execute_loop +}; // end namespace multi_execute_loop +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters.cpp (revision 136) @@ -20,4 +20,5 @@ Parameters::Parameters (uint32_t nb_gpr_write , uint32_t nb_spr_write , + uint32_t nb_inst_issue , uint32_t size_ooo_engine_id , uint32_t size_general_register , @@ -31,4 +32,5 @@ _nb_gpr_write = nb_gpr_write ; _nb_spr_write = nb_spr_write ; + _nb_inst_issue = nb_inst_issue ; // _size_ooo_engine_id = size_ooo_engine_id ; // _size_general_register = size_general_register ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters_print.cpp (revision 136) @@ -28,4 +28,5 @@ xml.singleton_begin("nb_gpr_write "); xml.attribut("value",toString(_nb_gpr_write )); xml.singleton_end(); xml.singleton_begin("nb_spr_write "); xml.attribut("value",toString(_nb_spr_write )); xml.singleton_end(); + xml.singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); xml.singleton_begin("size_ooo_engine_id "); xml.attribut("value",toString(_size_ooo_engine_id )); xml.singleton_end(); xml.singleton_begin("size_general_register"); xml.attribut("value",toString(_size_general_register)); xml.singleton_end(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h (revision 136) @@ -52,4 +52,5 @@ Toperation_t _operation ; Ttype_t _type ; + Tcontrol_t _cancel ; Tcontrol_t _has_immediat; Tgeneral_data_t _immediat ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (revision 136) @@ -84,4 +84,5 @@ public : SC_IN (Toperation_t ) * in_EXECUTE_IN_OPERATION ; public : SC_IN (Ttype_t ) * in_EXECUTE_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_EXECUTE_IN_CANCEL ; public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_READ ; @@ -107,4 +108,5 @@ //public : SC_OUT(Toperation_t ) * out_EXECUTE_OUT_OPERATION ; //public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_CANCEL ; public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_WRITE_RD ; public : SC_OUT(Tgeneral_address_t) * out_EXECUTE_OUT_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (revision 136) @@ -62,4 +62,5 @@ ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_OPERATION ,"operation" ,Toperation_t , _param->_size_operation ); ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_TYPE ,"type" ,Ttype_t , _param->_size_type ); + ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_CANCEL ,"cancel" ,Tcontrol_t , 1); ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); @@ -90,4 +91,5 @@ //ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); //ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1); ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (revision 136) @@ -38,4 +38,5 @@ DELETE0_SIGNAL( in_EXECUTE_IN_OPERATION ,_param->_size_operation ); DELETE0_SIGNAL( in_EXECUTE_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_EXECUTE_IN_CANCEL ,1); DELETE0_SIGNAL( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE ,_param->_size_store_queue_ptr); DELETE0_SIGNAL( in_EXECUTE_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr); @@ -60,4 +61,5 @@ //DELETE0_SIGNAL(out_EXECUTE_OUT_OPERATION ,_param->_size_operation ); //DELETE0_SIGNAL(out_EXECUTE_OUT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL(out_EXECUTE_OUT_CANCEL ,1); DELETE0_SIGNAL(out_EXECUTE_OUT_WRITE_RD ,1); DELETE0_SIGNAL(out_EXECUTE_OUT_NUM_REG_RD ,_param->_size_general_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp (revision 136) @@ -38,4 +38,5 @@ // PORT_WRITE(out_EXECUTE_OUT_OPERATION ,_execute_operation_out->_operation ); // PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation_out->_type ); + PORT_WRITE(out_EXECUTE_OUT_CANCEL ,_execute_operation_out->_cancel ); PORT_WRITE(out_EXECUTE_OUT_WRITE_RD ,_execute_operation_out->_write_rd ); PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD ,_execute_operation_out->_num_reg_rd ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp (revision 136) @@ -55,4 +55,5 @@ // _execute_operation_out->_operation = 0; // not necessary // _execute_operation_out->_type = 0; // not necessary + _execute_operation_out->_cancel = 0; // not necessary _execute_operation_out->_write_rd = 0; // not necessary _execute_operation_out->_num_reg_rd = 0; // not necessary @@ -88,4 +89,5 @@ _execute_operation_out->_operation = _execute_operation_in->_operation ; _execute_operation_out->_type = _execute_operation_in->_type ; + _execute_operation_out->_cancel = _execute_operation_in->_cancel ; _execute_operation_out->_has_immediat = _execute_operation_in->_has_immediat ; _execute_operation_out->_immediat = _execute_operation_in->_immediat ; @@ -130,4 +132,5 @@ Toperation_t operation = PORT_READ(in_EXECUTE_IN_OPERATION); Ttype_t type = PORT_READ(in_EXECUTE_IN_TYPE); + Tcontrol_t cancel = PORT_READ(in_EXECUTE_IN_CANCEL); execute_operation->_context_id = context_id ; @@ -137,4 +140,5 @@ execute_operation->_operation = operation ; execute_operation->_type = type ; + execute_operation->_cancel = cancel ; execute_operation->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); execute_operation->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); @@ -158,4 +162,5 @@ log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",execute_operation->_operation ); log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(execute_operation->_type).c_str()); + log_printf(TRACE,Functionnal_unit,FUNCTION," * cancel : %d",execute_operation->_cancel ); log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",execute_operation->_has_immediat ); log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",execute_operation->_immediat ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h (revision 136) @@ -104,4 +104,5 @@ public : SC_IN (Toperation_t ) ** in_MEMORY_IN_OPERATION ;//[nb_inst_memory] public : SC_IN (Ttype_t ) ** in_MEMORY_IN_TYPE ;//[nb_inst_memory] + public : SC_IN (Tcontrol_t ) ** in_MEMORY_IN_CANCEL ;//[nb_inst_memory] public : SC_IN (Tlsq_ptr_t ) ** in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;//[nb_inst_memory] public : SC_IN (Tlsq_ptr_t ) ** in_MEMORY_IN_STORE_QUEUE_PTR_READ ;//[nb_inst_memory] @@ -127,4 +128,5 @@ //public : SC_OUT(Toperation_t ) ** out_MEMORY_OUT_OPERATION ;//[nb_inst_memory] //public : SC_OUT(Ttype_t ) ** out_MEMORY_OUT_TYPE ;//[nb_inst_memory] + public : SC_OUT(Tcontrol_t ) ** out_MEMORY_OUT_CANCEL ;//[nb_inst_memory] public : SC_OUT(Tcontrol_t ) ** out_MEMORY_OUT_WRITE_RD ;//[nb_inst_memory] // = (operation==load) public : SC_OUT(Tgeneral_address_t) ** out_MEMORY_OUT_NUM_REG_RD ;//[nb_inst_memory] // destination (load) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h (revision 136) @@ -67,4 +67,5 @@ public : Tpacket_t _packet_id ; public : Toperation_t _operation ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _load_queue_ptr_write; public : Tdcache_address_t _address ; @@ -80,5 +81,5 @@ << " * packet : " << toString(x._packet_id) << std::endl << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl - << " * operation : " << toString(x._operation) << std::endl + << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl << " * load_ptr : " << toString(x._load_queue_ptr_write) << std::endl << " * exception : " << toString(x._exception) << std::endl @@ -111,4 +112,5 @@ public : Tpacket_t _packet_id ; public : Toperation_t _operation ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _load_queue_ptr_write ; public : Tlsq_ptr_t _store_queue_ptr_write; @@ -125,5 +127,5 @@ << " * packet : " << toString(x._packet_id) << std::endl << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl - << " * operation : " << toString(x._operation) << std::endl + << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl << " * load, store ptr_(write/read) empty: " << toString(x._load_queue_ptr_write) << " - " << toString(x._store_queue_ptr_write) << " - " << toString(x._store_queue_ptr_read) << " - " << toString(x._store_queue_empty) << std::endl << " * exception : " << toString(x._exception) << std::endl @@ -168,4 +170,5 @@ public : Tpacket_t _packet_id ; public : Toperation_t _operation ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _store_queue_ptr_write; public : Tlsq_ptr_t _store_queue_ptr_read ; @@ -187,5 +190,5 @@ << " * packet : " << toString(x._packet_id) << std::endl << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl - << " * operation : " << toString(x._operation) << std::endl + << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl << " * store_queue ptr_(write,read) empty: " << toString(x._store_queue_ptr_write) << " - " << toString(x._store_queue_ptr_read) << " - " << toString(x._store_queue_empty) <_size_operation ); ALLOC1_SIGNAL_IN ( in_MEMORY_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_IN ( in_MEMORY_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_IN ( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); ALLOC1_SIGNAL_IN ( in_MEMORY_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); @@ -94,4 +95,5 @@ // ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp (revision 136) @@ -44,4 +44,5 @@ DELETE1_SIGNAL( in_MEMORY_IN_OPERATION ,_param->_nb_inst_memory,_param->_size_operation ); DELETE1_SIGNAL( in_MEMORY_IN_TYPE ,_param->_nb_inst_memory,_param->_size_type ); + DELETE1_SIGNAL( in_MEMORY_IN_CANCEL ,_param->_nb_inst_memory,1); DELETE1_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_memory,_param->_size_store_queue_ptr ); DELETE1_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_READ ,_param->_nb_inst_memory,_param->_size_store_queue_ptr ); @@ -66,4 +67,5 @@ // DELETE1_SIGNAL(out_MEMORY_OUT_OPERATION ,_param->_nb_inst_memory,_param->_size_operation ); // DELETE1_SIGNAL(out_MEMORY_OUT_TYPE ,_param->_nb_inst_memory,_param->_size_type ); + DELETE1_SIGNAL(out_MEMORY_OUT_CANCEL ,_param->_nb_inst_memory,1 ); DELETE1_SIGNAL(out_MEMORY_OUT_WRITE_RD ,_param->_nb_inst_memory,1 ); DELETE1_SIGNAL(out_MEMORY_OUT_NUM_REG_RD ,_param->_nb_inst_memory,_param->_size_general_register ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp (revision 136) @@ -35,4 +35,5 @@ Tcontext_t memory_out_ooo_engine_id = 0; Tpacket_t memory_out_packet_id = 0; + Tcontrol_t memory_out_cancel = 0; Tcontrol_t memory_out_write_rd = 0; Tgeneral_address_t memory_out_num_reg_rd = 0; @@ -67,4 +68,5 @@ memory_out_ooo_engine_id = _load_queue [internal_MEMORY_OUT_PTR]._ooo_engine_id; memory_out_packet_id = _load_queue [internal_MEMORY_OUT_PTR]._packet_id ; + memory_out_cancel = _load_queue [internal_MEMORY_OUT_PTR]._cancel ; memory_out_write_rd = _load_queue [internal_MEMORY_OUT_PTR]._write_rd ; memory_out_num_reg_rd = _load_queue [internal_MEMORY_OUT_PTR]._num_reg_rd; @@ -130,4 +132,5 @@ memory_out_ooo_engine_id = _store_queue [internal_MEMORY_OUT_PTR]._ooo_engine_id; memory_out_packet_id = _store_queue [internal_MEMORY_OUT_PTR]._packet_id ; + memory_out_cancel = _store_queue [internal_MEMORY_OUT_PTR]._cancel; // memory_out_write_rd // memory_out_num_reg_rd @@ -152,4 +155,5 @@ // PORT_WRITE(out_MEMORY_OUT_OPERATION [0], memory_out_operation ); // PORT_WRITE(out_MEMORY_OUT_TYPE [0], TYPE_MEMORY ); + PORT_WRITE(out_MEMORY_OUT_CANCEL [0], memory_out_cancel ); PORT_WRITE(out_MEMORY_OUT_WRITE_RD [0], memory_out_write_rd ); PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD [0], memory_out_num_reg_rd ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (revision 136) @@ -251,4 +251,5 @@ _store_queue [i]._packet_id = 0; // not necessary _store_queue [i]._operation = 0; // not necessary + _store_queue [i]._cancel = 0; // not necessary _store_queue [i]._load_queue_ptr_write = 0; // not necessary _store_queue [i]._address = 0; // not necessary @@ -268,4 +269,5 @@ _load_queue [i]._packet_id = 0; // not necessary _load_queue [i]._operation = 0; // not necessary + _load_queue [i]._cancel = 0; // not necessary _load_queue [i]._store_queue_ptr_write = 0; // not necessary _load_queue [i]._store_queue_ptr_read = 0; // not necessary @@ -291,4 +293,5 @@ _speculative_access_queue [i]._packet_id = 0; // not necessary _speculative_access_queue [i]._operation = 0; // not necessary + _speculative_access_queue [i]._cancel = 0; // not necessary _speculative_access_queue [i]._load_queue_ptr_write = 0; // not necessary _speculative_access_queue [i]._store_queue_ptr_write = 0; // not necessary @@ -815,4 +818,5 @@ #endif Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION[internal_MEMORY_IN_PORT]); + Tcontrol_t cancel = PORT_READ(in_MEMORY_IN_CANCEL [internal_MEMORY_IN_PORT]); Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT[internal_MEMORY_IN_PORT]) + PORT_READ(in_MEMORY_IN_DATA_RA [internal_MEMORY_IN_PORT])); @@ -925,4 +929,5 @@ _store_queue [index]._packet_id = (not _param->_have_port_rob_ptr )?0:PORT_READ(in_MEMORY_IN_PACKET_ID [internal_MEMORY_IN_PORT]); _store_queue [index]._operation = operation; + _store_queue [index]._cancel = cancel ; _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); _store_queue [index]._address = address; @@ -965,4 +970,5 @@ _speculative_access_queue [index]._operation = operation; + _speculative_access_queue [index]._cancel = cancel ; _speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); @@ -1094,4 +1100,5 @@ _load_queue [ptr_write]._packet_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._packet_id; _load_queue [ptr_write]._operation = operation; + _load_queue [ptr_write]._cancel = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._cancel; _load_queue [ptr_write]._store_queue_ptr_write = store_queue_ptr_write; _load_queue [ptr_write]._store_queue_ptr_read = store_queue_ptr_read ; @@ -1286,5 +1293,5 @@ uint32_t j = (reg_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue; - log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d, %.8x %.8x, %.2d %.1d, %.2d %s", + log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d, %.8x %.8x, %.2d %.1d, %.2d %s", j, _store_queue[j]._context_id , @@ -1293,4 +1300,5 @@ _store_queue[j]._packet_id , _store_queue[j]._operation , + _store_queue[j]._cancel , _store_queue[j]._load_queue_ptr_write, _store_queue[j]._address , @@ -1311,5 +1319,5 @@ uint32_t j = (*_speculative_access_queue_control)[i]; - log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d %.4d %.4d %.1d, %.8x, %.1d %.4d, %.2d, %s", + log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d %.4d %.4d %.1d, %.8x, %.1d %.4d, %.2d, %s", j, _speculative_access_queue[j]._context_id , @@ -1318,4 +1326,5 @@ _speculative_access_queue[j]._packet_id , _speculative_access_queue[j]._operation , + _speculative_access_queue[j]._cancel , _speculative_access_queue[j]._load_queue_ptr_write, _speculative_access_queue[j]._store_queue_ptr_write, @@ -1337,5 +1346,5 @@ uint32_t j = i; - log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d, %.4d %.4d %.1d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s", + log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d %.4d %.1d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s", j, _load_queue[j]._context_id , @@ -1344,4 +1353,5 @@ _load_queue[j]._packet_id , _load_queue[j]._operation , + _load_queue[j]._cancel , _load_queue[j]._store_queue_ptr_write, _load_queue[j]._store_queue_ptr_read , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h (revision 136) @@ -72,4 +72,5 @@ public : SC_IN (Toperation_t ) * in_READ_QUEUE_IN_OPERATION ; public : SC_IN (Ttype_t ) * in_READ_QUEUE_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_READ_QUEUE_IN_CANCEL ; public : SC_IN (Tlsq_ptr_t ) * in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; public : SC_IN (Tlsq_ptr_t ) * in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ; @@ -99,4 +100,5 @@ public : SC_OUT(Toperation_t ) * out_READ_QUEUE_OUT_OPERATION ; public : SC_OUT(Ttype_t ) * out_READ_QUEUE_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_CANCEL ; public : SC_OUT(Tlsq_ptr_t ) * out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; public : SC_OUT(Tlsq_ptr_t ) * out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ; @@ -105,13 +107,13 @@ public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_HAS_IMMEDIAT ; public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_IMMEDIAT ; -// public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RA ; +//public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RA ; public : SC_OUT(Tgeneral_address_t) * out_READ_QUEUE_OUT_NUM_REG_RA ; public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RA_VAL ; public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_DATA_RA ; -// public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RB ; +//public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RB ; public : SC_OUT(Tgeneral_address_t) * out_READ_QUEUE_OUT_NUM_REG_RB ; public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RB_VAL ; public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_DATA_RB ; -// public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RC ; +//public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RC ; public : SC_OUT(Tspecial_address_t) * out_READ_QUEUE_OUT_NUM_REG_RC ; public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RC_VAL ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h (revision 136) @@ -28,4 +28,5 @@ public : Toperation_t _operation ; public : Ttype_t _type ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _store_queue_ptr_write; public : Tlsq_ptr_t _store_queue_ptr_read ; @@ -54,4 +55,5 @@ << " * _operation : " << toString(x._operation ) << std::endl << " * _type : " << toString(x._type ) << std::endl + << " * _cancel : " << toString(x._cancel ) << std::endl << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl @@ -84,4 +86,5 @@ public : Toperation_t _operation ; public : Ttype_t _type ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _store_queue_ptr_write; public : Tlsq_ptr_t _store_queue_ptr_read ; @@ -122,4 +125,5 @@ _operation = x._operation ; _type = x._type ; + _cancel = x._cancel ; _store_queue_ptr_write = x._store_queue_ptr_write; _store_queue_ptr_read = x._store_queue_ptr_read ; @@ -164,4 +168,5 @@ << " * _operation : " << x._operation << std::endl << " * _type : " << x._type << std::endl + << " * _cancel : " << x._cancel << std::endl << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp (revision 136) @@ -18,4 +18,6 @@ +#undef FUNCTION +#define FUNCTION "Read_queue::Read_queue" Read_queue::Read_queue ( @@ -34,5 +36,5 @@ ,_usage (usage) { - log_printf(FUNC,Read_queue,"Read_queue","Begin"); + log_printf(FUNC,Read_queue,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Read_queue == true @@ -43,5 +45,5 @@ #ifdef SYSTEMC - log_printf(INFO,Read_queue,"Read_queue","Allocation"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation (); @@ -51,5 +53,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_queue,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -61,5 +63,5 @@ { // generate the vhdl - log_printf(INFO,Read_queue,"Read_queue","Generate the vhdl"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -70,5 +72,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Read_queue,"Read_queue","Method - transition"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -76,5 +78,5 @@ sensitive << (*(in_CLOCK)).pos(); - log_printf(INFO,Read_queue,"Read_queue","Method - genMoore"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMoore"),_name.c_str()); SC_METHOD (genMoore); @@ -82,5 +84,5 @@ sensitive << (*(in_CLOCK)).neg(); - log_printf(INFO,Read_queue,"Read_queue","Method - genMealy_read_queue_out_val"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_val"),_name.c_str()); SC_METHOD (genMealy_read_queue_out_val); @@ -130,5 +132,5 @@ #endif - log_printf(INFO,Read_queue,"Read_queue","Method - genMealy_read_queue_out_gpr"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_gpr"),_name.c_str()); SC_METHOD (genMealy_read_queue_out_gpr); @@ -183,5 +185,5 @@ #endif - log_printf(INFO,Read_queue,"Read_queue","Method - genMealy_read_queue_out_spr"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_spr"),_name.c_str()); SC_METHOD (genMealy_read_queue_out_spr); @@ -225,15 +227,17 @@ } #endif - log_printf(FUNC,Read_queue,"Read_queue","End"); + log_printf(FUNC,Read_queue,FUNCTION,_("<%s> End"),_name.c_str()); }; - + +#undef FUNCTION +#define FUNCTION "Read_queue::~Read_queue" Read_queue::~Read_queue (void) { - log_printf(FUNC,Read_queue,"~Read_queue","Begin"); + log_printf(FUNC,Read_queue,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_queue,"~Read_queue","Generate Statistics file"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -242,10 +246,10 @@ #ifdef SYSTEMC - log_printf(INFO,Read_queue,"~Read_queue","Deallocation"); + log_printf(INFO,Read_queue,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); #endif - log_printf(FUNC,Read_queue,"~Read_queue","End"); + log_printf(FUNC,Read_queue,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp (revision 136) @@ -61,4 +61,5 @@ ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); @@ -93,4 +94,5 @@ ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t , _param->_size_store_queue_ptr ); ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t , _param->_size_store_queue_ptr ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp (revision 136) @@ -37,4 +37,5 @@ DELETE0_SIGNAL( in_READ_QUEUE_IN_OPERATION ,_param->_size_operation ); DELETE0_SIGNAL( in_READ_QUEUE_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_READ_QUEUE_IN_CANCEL ,1 ); DELETE0_SIGNAL( in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_size_store_queue_ptr ); DELETE0_SIGNAL( in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); @@ -62,4 +63,5 @@ DELETE0_SIGNAL(out_READ_QUEUE_OUT_OPERATION ,_param->_size_operation ); DELETE0_SIGNAL(out_READ_QUEUE_OUT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL(out_READ_QUEUE_OUT_CANCEL ,1 ); DELETE0_SIGNAL(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr ); DELETE0_SIGNAL(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp (revision 136) @@ -27,4 +27,7 @@ if (PORT_READ(in_NRESET)) { + + // Tcontrol_t cancel = _queue_head->_cancel; + internal_READ_QUEUE_OUT_DATA_RA_VAL = (// Previous value _queue_head->_data_ra_val or @@ -36,4 +39,5 @@ log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RA_VAL : %d",internal_READ_QUEUE_OUT_DATA_RA_VAL); + log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_cancel : %d",_queue_head->_cancel ); log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_data_ra_val : %d",_queue_head->_data_ra_val); log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_read_ra_val : %d",_queue_head->_read_ra_val); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp (revision 136) @@ -37,13 +37,14 @@ if(_param->_have_port_context_id ) - PORT_WRITE (out_READ_QUEUE_OUT_CONTEXT_ID , _queue_head->_context_id ); + PORT_WRITE (out_READ_QUEUE_OUT_CONTEXT_ID , _queue_head->_context_id ); if(_param->_have_port_front_end_id ) - PORT_WRITE (out_READ_QUEUE_OUT_FRONT_END_ID , _queue_head->_front_end_id); + PORT_WRITE (out_READ_QUEUE_OUT_FRONT_END_ID , _queue_head->_front_end_id); if(_param->_have_port_ooo_engine_id) - PORT_WRITE (out_READ_QUEUE_OUT_OOO_ENGINE_ID, _queue_head->_ooo_engine_id); + PORT_WRITE (out_READ_QUEUE_OUT_OOO_ENGINE_ID, _queue_head->_ooo_engine_id); if(_param->_have_port_rob_ptr ) - PORT_WRITE (out_READ_QUEUE_OUT_ROB_ID , _queue_head->_rob_id ); + PORT_WRITE (out_READ_QUEUE_OUT_ROB_ID , _queue_head->_rob_id ); PORT_WRITE (out_READ_QUEUE_OUT_OPERATION , _queue_head->_operation ); PORT_WRITE (out_READ_QUEUE_OUT_TYPE , _queue_head->_type ); + PORT_WRITE (out_READ_QUEUE_OUT_CANCEL , _queue_head->_cancel ); PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE, _queue_head->_store_queue_ptr_write); PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ , _queue_head->_store_queue_ptr_read ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp (revision 136) @@ -49,4 +49,5 @@ _queue_head->_operation = 0;// not necessary _queue_head->_type = 0;// not necessary + _queue_head->_cancel = 0;// not necessary _queue_head->_store_queue_ptr_write = 0;// not necessary _queue_head->_store_queue_ptr_read = 0;// not necessary @@ -102,4 +103,5 @@ entry->_operation = PORT_READ(in_READ_QUEUE_IN_OPERATION ); entry->_type = PORT_READ(in_READ_QUEUE_IN_TYPE ); + entry->_cancel = PORT_READ(in_READ_QUEUE_IN_CANCEL ); entry->_store_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE); entry->_store_queue_ptr_read = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ); @@ -181,5 +183,5 @@ if (_queue->size()>0) { - log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", + log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", 0, @@ -191,4 +193,5 @@ _queue_head->_type , _queue_head->_operation , + _queue_head->_cancel , _queue_head->_store_queue_ptr_write, @@ -233,5 +236,5 @@ for (;it!=_queue->end(); ++it) { - log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d , %.1d %.4d , %.1d %.4d , %.1d %.4d, %.1d %.4d (%s)", + log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d , %.1d %.4d , %.1d %.4d , %.1d %.4d, %.1d %.4d (%s)", i, @@ -243,4 +246,5 @@ (*it)->_type , (*it)->_operation , + (*it)->_cancel , (*it)->_store_queue_ptr_write, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h (revision 136) @@ -73,4 +73,5 @@ public : SC_IN (Toperation_t ) * in_INSERT_OPERATION ; public : SC_IN (Ttype_t ) * in_INSERT_TYPE ; + public : SC_IN (Tcontrol_t ) * in_INSERT_CANCEL ; public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_WRITE; public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_READ ; @@ -105,4 +106,5 @@ public : SC_OUT(Toperation_t ) ** out_RETIRE_OPERATION ; public : SC_OUT(Ttype_t ) ** out_RETIRE_TYPE ; + public : SC_OUT(Tcontrol_t ) ** out_RETIRE_CANCEL ; public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_WRITE; public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_READ ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h (revision 136) @@ -28,4 +28,5 @@ public : Toperation_t _operation ; public : Ttype_t _type ; + public : Tcontrol_t _cancel ; public : Tlsq_ptr_t _store_queue_ptr_write; public : Tlsq_ptr_t _store_queue_ptr_read ; @@ -60,4 +61,5 @@ << " * _operation : " << toString(x._operation ) << std::endl << " * _type : " << toString(x._type ) << std::endl + << " * _cancel : " << toString(x._cancel ) << std::endl << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station.cpp (revision 136) @@ -37,5 +37,5 @@ ,_usage (usage) { - log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); + log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Reservation_station == true @@ -46,5 +46,5 @@ #ifdef SYSTEMC - log_printf(INFO,Reservation_station,FUNCTION,"Allocation"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation (); @@ -54,5 +54,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Reservation_station,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -64,5 +64,5 @@ { // generate the vhdl - log_printf(INFO,Reservation_station,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -74,5 +74,5 @@ { //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - log_printf(INFO,Reservation_station,FUNCTION,"Method - transition"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -85,5 +85,5 @@ #endif - log_printf(INFO,Reservation_station,FUNCTION,"Method - genMoore"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Method - genMoore"),_name.c_str()); SC_METHOD (genMoore); @@ -96,5 +96,5 @@ } #endif - log_printf(FUNC,Reservation_station,FUNCTION,"End"); + log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -103,10 +103,10 @@ Reservation_station::~Reservation_station (void) { - log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); + log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Reservation_station,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -115,10 +115,10 @@ #ifdef SYSTEMC - log_printf(INFO,Reservation_station,FUNCTION,"Deallocation"); + log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); #endif - log_printf(FUNC,Reservation_station,FUNCTION,"End"); + log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp (revision 136) @@ -63,4 +63,5 @@ ALLOC0_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC0_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_INSERT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); ALLOC0_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); @@ -101,4 +102,5 @@ ALLOC1_SIGNAL_OUT(out_RETIRE_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); ALLOC1_SIGNAL_OUT(out_RETIRE_TYPE ,"type" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_OUT(out_RETIRE_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC1_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC1_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp (revision 136) @@ -42,4 +42,5 @@ DELETE0_SIGNAL( in_INSERT_OPERATION ,_param->_size_operation ); DELETE0_SIGNAL( in_INSERT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_INSERT_CANCEL ,1 ); DELETE0_SIGNAL( in_INSERT_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr ); DELETE0_SIGNAL( in_INSERT_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); @@ -73,4 +74,5 @@ DELETE1_SIGNAL(out_RETIRE_OPERATION ,_param->_nb_inst_retire,_param->_size_operation); DELETE1_SIGNAL(out_RETIRE_TYPE ,_param->_nb_inst_retire,_param->_size_type); + DELETE1_SIGNAL(out_RETIRE_CANCEL ,_param->_nb_inst_retire,1); DELETE1_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr); DELETE1_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_retire,_param->_size_store_queue_ptr); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp (revision 136) @@ -112,4 +112,5 @@ PORT_WRITE(out_RETIRE_OPERATION [i],_queue[index_find]._operation); PORT_WRITE(out_RETIRE_TYPE [i],_queue[index_find]._type); + PORT_WRITE(out_RETIRE_CANCEL [i],_queue[index_find]._cancel); PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write); PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_READ [i],_queue[index_find]._store_queue_ptr_read ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (revision 136) @@ -26,5 +26,5 @@ for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ if (_queue_valid [it_dump]) \ - log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ + log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ it_dump, \ _queue[it_dump]._context_id , \ @@ -34,4 +34,5 @@ _queue[it_dump]._type , \ _queue[it_dump]._operation , \ + _queue[it_dump]._cancel , \ _queue[it_dump]._store_queue_ptr_write, \ _queue[it_dump]._store_queue_ptr_read , \ @@ -63,5 +64,5 @@ for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ if (it_dump < _queue_control->nb_elt()) \ - log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ + log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ (*_queue_control)[it_dump], \ _queue[(*_queue_control)[it_dump]]._context_id , \ @@ -71,4 +72,5 @@ _queue[(*_queue_control)[it_dump]]._type , \ _queue[(*_queue_control)[it_dump]]._operation , \ + _queue[(*_queue_control)[it_dump]]._cancel , \ _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ _queue[(*_queue_control)[it_dump]]._store_queue_ptr_read , \ @@ -121,4 +123,5 @@ _queue[i]._operation = 0; // not necessary _queue[i]._type = 0; // not necessary + _queue[i]._cancel = 0; // not necessary _queue[i]._store_queue_ptr_write = 0; // not necessary _queue[i]._store_queue_ptr_read = 0; // not necessary @@ -327,4 +330,5 @@ _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); _queue[index]._type = PORT_READ(in_INSERT_TYPE ); + _queue[index]._cancel = PORT_READ(in_INSERT_CANCEL ); _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE); _queue[index]._store_queue_ptr_read = PORT_READ(in_INSERT_STORE_QUEUE_PTR_READ ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h (revision 136) @@ -73,4 +73,5 @@ public : SC_IN (Toperation_t ) * in_READ_UNIT_IN_OPERATION ; public : SC_IN (Ttype_t ) * in_READ_UNIT_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_READ_UNIT_IN_CANCEL ; public : SC_IN (Tlsq_ptr_t ) * in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE; public : SC_IN (Tlsq_ptr_t ) * in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ; @@ -99,4 +100,5 @@ public : SC_OUT(Toperation_t ) ** out_READ_UNIT_OUT_OPERATION ; public : SC_OUT(Ttype_t ) ** out_READ_UNIT_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) ** out_READ_UNIT_OUT_CANCEL ; public : SC_OUT(Tlsq_ptr_t ) ** out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; public : SC_OUT(Tlsq_ptr_t ) ** out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit.cpp (revision 136) @@ -36,5 +36,5 @@ ,_usage (usage) { - log_printf(FUNC,Read_unit,FUNCTION,"Begin"); + log_printf(FUNC,Read_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Read_unit == true @@ -44,5 +44,5 @@ // #endif - log_printf(INFO,Read_unit,FUNCTION,"Allocation"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation ( @@ -55,5 +55,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_unit,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -65,5 +65,5 @@ { // generate the vhdl - log_printf(INFO,Read_unit,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -74,5 +74,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Read_unit,FUNCTION,"Method - transition"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -86,5 +86,5 @@ #endif } - log_printf(FUNC,Read_unit,FUNCTION,"End"); + log_printf(FUNC,Read_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -93,10 +93,10 @@ Read_unit::~Read_unit (void) { - log_printf(FUNC,Read_unit,FUNCTION,"Begin"); + log_printf(FUNC,Read_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_unit,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -104,8 +104,8 @@ #endif - log_printf(INFO,Read_unit,FUNCTION,"Deallocation"); + log_printf(INFO,Read_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Read_unit,FUNCTION,"End"); + log_printf(FUNC,Read_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp (revision 136) @@ -67,4 +67,5 @@ ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); @@ -99,4 +100,5 @@ ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); @@ -271,4 +273,5 @@ _component->port_map(name, "in_READ_QUEUE_IN_OPERATION" ,dest, "in_READ_UNIT_IN_OPERATION" ); _component->port_map(name, "in_READ_QUEUE_IN_TYPE" ,dest, "in_READ_UNIT_IN_TYPE" ); + _component->port_map(name, "in_READ_QUEUE_IN_CANCEL" ,dest, "in_READ_UNIT_IN_CANCEL" ); _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE"); _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ" ,dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_READ" ); @@ -310,4 +313,5 @@ _component->port_map(name,"out_READ_QUEUE_OUT_OPERATION" ,dest, "in_INSERT_OPERATION" ); _component->port_map(name,"out_READ_QUEUE_OUT_TYPE" ,dest, "in_INSERT_TYPE" ); + _component->port_map(name,"out_READ_QUEUE_OUT_CANCEL" ,dest, "in_INSERT_CANCEL" ); _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE"); _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" ,dest, "in_INSERT_STORE_QUEUE_PTR_READ" ); @@ -436,4 +440,5 @@ _component->port_map(name, "in_INSERT_OPERATION" ,dest,"out_READ_QUEUE_OUT_OPERATION" ); _component->port_map(name, "in_INSERT_TYPE" ,dest,"out_READ_QUEUE_OUT_TYPE" ); + _component->port_map(name, "in_INSERT_CANCEL" ,dest,"out_READ_QUEUE_OUT_CANCEL" ); _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE"); _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_READ" ,dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" ); @@ -483,4 +488,5 @@ _component->port_map(name,"out_RETIRE_"+toString(i)+"_OPERATION" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_OPERATION" ); _component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE" ); + _component->port_map(name,"out_RETIRE_"+toString(i)+"_CANCEL" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_CANCEL" ); _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_READ" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_READ" ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp (revision 136) @@ -34,7 +34,8 @@ DELETE0_SIGNAL( in_READ_UNIT_IN_FRONT_END_ID ,_param->_size_front_end_id ); DELETE0_SIGNAL( in_READ_UNIT_IN_OOO_ENGINE_ID ,_param->_size_ooo_engine_id); - DELETE0_SIGNAL( in_READ_UNIT_IN_PACKET_ID ,_param->_size_rob_ptr ); + DELETE0_SIGNAL( in_READ_UNIT_IN_PACKET_ID ,_param->_size_rob_ptr ); DELETE0_SIGNAL( in_READ_UNIT_IN_OPERATION ,_param->_size_operation ); DELETE0_SIGNAL( in_READ_UNIT_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_READ_UNIT_IN_CANCEL ,1); DELETE0_SIGNAL( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr); DELETE0_SIGNAL( in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr); @@ -62,4 +63,5 @@ DELETE1_SIGNAL(out_READ_UNIT_OUT_OPERATION ,_param->_nb_inst_retire,_param->_size_operation ); DELETE1_SIGNAL(out_READ_UNIT_OUT_TYPE ,_param->_nb_inst_retire,_param->_size_type ); + DELETE1_SIGNAL(out_READ_UNIT_OUT_CANCEL ,_param->_nb_inst_retire,1); DELETE1_SIGNAL(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr); DELETE1_SIGNAL(out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_retire,_param->_size_store_queue_ptr); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h (revision 136) @@ -79,4 +79,5 @@ //public : SC_IN (Toperation_t ) * in_EXECUTE_QUEUE_IN_OPERATION ; //public : SC_IN (Ttype_t ) * in_EXECUTE_QUEUE_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_EXECUTE_QUEUE_IN_CANCEL ; public : SC_IN (Tspecial_data_t ) * in_EXECUTE_QUEUE_IN_FLAGS ; public : SC_IN (Texception_t ) * in_EXECUTE_QUEUE_IN_EXCEPTION ; @@ -94,4 +95,5 @@ //public : SC_OUT(Toperation_t ) * out_EXECUTE_QUEUE_OUT_OPERATION ; //public : SC_OUT(Ttype_t ) * out_EXECUTE_QUEUE_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_EXECUTE_QUEUE_OUT_CANCEL ; public : SC_OUT(Tspecial_data_t ) * out_EXECUTE_QUEUE_OUT_FLAGS ; public : SC_OUT(Texception_t ) * out_EXECUTE_QUEUE_OUT_EXCEPTION ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Types.h (revision 136) @@ -28,4 +28,5 @@ //public : Toperation_t _operation ; //public : Ttype_t _type ; + public : Tcontrol_t _cancel ; public : Tspecial_data_t _flags ; public : Texception_t _exception ; @@ -40,4 +41,5 @@ //Toperation_t operation , //Ttype_t type , + Tcontrol_t cancel , Tspecial_data_t flags , Texception_t exception , @@ -52,4 +54,5 @@ //_operation = operation ; //_type = type ; + _cancel = cancel ; _flags = flags ; _exception = exception ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Wrapper_Execute_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Wrapper_Execute_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Wrapper_Execute_queue.h (revision 136) @@ -43,4 +43,5 @@ //public : SC_IN (Toperation_t ) * in_EXECUTE_QUEUE_IN_OPERATION ; //public : SC_IN (Ttype_t ) * in_EXECUTE_QUEUE_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_EXECUTE_QUEUE_IN_CANCEL ; public : SC_IN (Tspecial_data_t) * in_EXECUTE_QUEUE_IN_FLAGS ; public : SC_IN (Texception_t ) * in_EXECUTE_QUEUE_IN_EXCEPTION ; @@ -58,4 +59,5 @@ //public : SC_OUT(Toperation_t ) * out_EXECUTE_QUEUE_OUT_OPERATION ; //public : SC_OUT(Ttype_t ) * out_EXECUTE_QUEUE_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_EXECUTE_QUEUE_OUT_CANCEL ; public : SC_OUT(Tspecial_data_t) * out_EXECUTE_QUEUE_OUT_FLAGS ; public : SC_OUT(Texception_t ) * out_EXECUTE_QUEUE_OUT_EXCEPTION ; @@ -87,4 +89,5 @@ // ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_OPERATION ,"execute_queue_in" ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_TYPE ,"execute_queue_in" ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CANCEL ,"execute_queue_in" ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_FLAGS ,"execute_queue_in" ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_EXCEPTION ,"execute_queue_in" ,"exception" ,Texception_t ,_param->_size_exception ); @@ -101,4 +104,5 @@ // ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_OPERATION ,"execute_queue_out","operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_TYPE ,"execute_queue_out","type" ,Ttype_t ,_param->_size_type ); + ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CANCEL ,"execute_queue_out","cancel" ,Tcontrol_t ,1 ); ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_FLAGS ,"execute_queue_out","flags" ,Tspecial_data_t ,_param->_size_special_data ); ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_EXCEPTION ,"execute_queue_out","exception" ,Texception_t ,_param->_size_exception ); @@ -123,4 +127,5 @@ // DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_OPERATION ,_param->_size_operation ); // DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_TYPE ,_param->_size_type ); + DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_CANCEL ,1 ); DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_FLAGS ,_param->_size_special_data ); DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_EXCEPTION ,_param->_size_exception ); @@ -137,4 +142,5 @@ // DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_OPERATION ,_param->_size_operation ); // DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_TYPE ,_param->_size_type ); + DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_CANCEL ,1 ); DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp (revision 136) @@ -61,4 +61,5 @@ // ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); @@ -82,4 +83,5 @@ // ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); @@ -184,4 +186,5 @@ // INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_OPERATION ,Toperation_t , "in_EXECUTE_QUEUE_IN_OPERATION" ,_param->_size_operation ); // INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_TYPE ,Ttype_t , "in_EXECUTE_QUEUE_IN_TYPE" ,_param->_size_type ); + INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_CANCEL ,Tcontrol_t , "in_EXECUTE_QUEUE_IN_CANCEL" ,1 ); INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_FLAGS ,Tspecial_data_t, "in_EXECUTE_QUEUE_IN_FLAGS" ,_param->_size_special_data ); INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_EXCEPTION ,Texception_t , "in_EXECUTE_QUEUE_IN_EXCEPTION" ,_param->_size_exception ); @@ -198,4 +201,5 @@ // INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_OPERATION ,Toperation_t ,"out_EXECUTE_QUEUE_OUT_OPERATION" ,_param->_size_operation ); // INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_TYPE ,Ttype_t ,"out_EXECUTE_QUEUE_OUT_TYPE" ,_param->_size_type ); + INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_CANCEL ,Tcontrol_t ,"out_EXECUTE_QUEUE_OUT_CANCEL" ,1 ); INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_FLAGS ,Tspecial_data_t,"out_EXECUTE_QUEUE_OUT_FLAGS" ,_param->_size_special_data ); INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_EXCEPTION ,Texception_t ,"out_EXECUTE_QUEUE_OUT_EXCEPTION" ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_deallocation.cpp (revision 136) @@ -38,4 +38,5 @@ // DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_CANCEL ,1 ); DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_FLAGS ,_param->_size_special_data ); DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_EXCEPTION ,_param->_size_exception ); @@ -52,4 +53,5 @@ // DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_CANCEL ,1 ); DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp (revision 136) @@ -49,4 +49,5 @@ // PORT_WRITE(out_EXECUTE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); // PORT_WRITE(out_EXECUTE_QUEUE_OUT_TYPE , _queue->front()->_type ); + PORT_WRITE(out_EXECUTE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); PORT_WRITE(out_EXECUTE_QUEUE_OUT_FLAGS , _queue->front()->_flags ); PORT_WRITE(out_EXECUTE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp (revision 136) @@ -47,4 +47,5 @@ //PORT_READ(in_EXECUTE_QUEUE_IN_OPERATION ), //PORT_READ(in_EXECUTE_QUEUE_IN_TYPE ), + PORT_READ(in_EXECUTE_QUEUE_IN_CANCEL ), PORT_READ(in_EXECUTE_QUEUE_IN_FLAGS ), PORT_READ(in_EXECUTE_QUEUE_IN_EXCEPTION ), @@ -77,5 +78,5 @@ ++it) { - log_printf(TRACE,Execute_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.4d, %.1d, %.2d %.1d, %.8x %.8x", + log_printf(TRACE,Execute_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.1d, %.4d, %.1d, %.2d %.1d, %.8x %.8x", i, (*it)->_context_id , @@ -85,4 +86,5 @@ //(*it)->_operation , //(*it)->_type , + (*it)->_cancel , (*it)->_flags , (*it)->_exception , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h (revision 136) @@ -40,4 +40,5 @@ //public : Toperation_t _operation ; //public : Ttype_t _type ; + public : Tcontrol_t _cancel ; public : Tcontrol_t _write_rd ; public : Tgeneral_address_t _num_reg_rd ; @@ -56,4 +57,5 @@ // Toperation_t operation , // Ttype_t type , + Tcontrol_t cancel , Tcontrol_t write_rd , Tgeneral_address_t num_reg_rd , @@ -72,4 +74,5 @@ //_operation = operation ; //_type = type ; + _cancel = cancel ; _write_rd = write_rd ; _num_reg_rd = num_reg_rd ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h (revision 136) @@ -79,4 +79,5 @@ //public : SC_IN (Toperation_t ) * in_WRITE_QUEUE_IN_OPERATION ; //public : SC_IN (Ttype_t ) * in_WRITE_QUEUE_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_CANCEL ; public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_WRITE_RD ; public : SC_IN (Tgeneral_address_t) * in_WRITE_QUEUE_IN_NUM_REG_RD ; @@ -98,4 +99,5 @@ //public : SC_OUT(Toperation_t ) * out_WRITE_QUEUE_OUT_OPERATION ; //public : SC_OUT(Ttype_t ) * out_WRITE_QUEUE_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_WRITE_QUEUE_OUT_CANCEL ; public : SC_OUT(Tspecial_data_t ) * out_WRITE_QUEUE_OUT_FLAGS ; public : SC_OUT(Texception_t ) * out_WRITE_QUEUE_OUT_EXCEPTION ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp (revision 136) @@ -61,4 +61,5 @@ // ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); @@ -86,4 +87,5 @@ // ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_deallocation.cpp (revision 136) @@ -38,4 +38,5 @@ // DELETE0_SIGNAL( in_WRITE_QUEUE_IN_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL( in_WRITE_QUEUE_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_WRITE_QUEUE_IN_CANCEL ,1 ); DELETE0_SIGNAL( in_WRITE_QUEUE_IN_WRITE_RD ,1 ); DELETE0_SIGNAL( in_WRITE_QUEUE_IN_NUM_REG_RD ,_param->_size_general_register ); @@ -56,4 +57,5 @@ // DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_CANCEL ,1 ); DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp (revision 136) @@ -86,4 +86,5 @@ // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); + PORT_WRITE(out_WRITE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (revision 136) @@ -119,4 +119,5 @@ // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); + PORT_WRITE(out_WRITE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp (revision 136) @@ -54,4 +54,5 @@ //PORT_READ(in_WRITE_QUEUE_IN_OPERATION ), //PORT_READ(in_WRITE_QUEUE_IN_TYPE ), + PORT_READ(in_WRITE_QUEUE_IN_CANCEL ), PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD ), PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD ), @@ -96,5 +97,5 @@ ++it) { - log_printf(TRACE,Write_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.4d, %.1d %.4d %.8x, %.1d %.4d %.1d, %.2d %.1d, %.8x", + log_printf(TRACE,Write_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.4d, %.1d, %.1d %.4d %.8x, %.1d %.4d %.1d, %.2d %.1d, %.8x", i, (*it)->_context_id , @@ -104,4 +105,5 @@ //(*it)->_operation , //(*it)->_type , + (*it)->_cancel , (*it)->_write_rd , (*it)->_num_reg_rd , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h (revision 136) @@ -72,4 +72,5 @@ //public : SC_IN (Toperation_t ) * in_WRITE_UNIT_IN_OPERATION ; //public : SC_IN (Ttype_t ) * in_WRITE_UNIT_IN_TYPE ; + public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_CANCEL ; public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RD ; public : SC_IN (Tgeneral_address_t) * in_WRITE_UNIT_IN_NUM_REG_RD ; @@ -91,4 +92,5 @@ //public : SC_OUT(Toperation_t ) * out_WRITE_UNIT_OUT_OPERATION ; //public : SC_OUT(Ttype_t ) * out_WRITE_UNIT_OUT_TYPE ; + public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_CANCEL ; public : SC_OUT(Tspecial_data_t ) * out_WRITE_UNIT_OUT_FLAGS ; public : SC_OUT(Texception_t ) * out_WRITE_UNIT_OUT_EXCEPTION ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp (revision 136) @@ -67,4 +67,5 @@ // ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); @@ -92,4 +93,5 @@ // ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); @@ -216,4 +218,5 @@ //_component->port_map(name, "in_WRITE_QUEUE_IN_OPERATION" , _name, "in_WRITE_UNIT_IN_OPERATION" ); //_component->port_map(name, "in_WRITE_QUEUE_IN_TYPE" , _name, "in_WRITE_UNIT_IN_TYPE" ); + _component->port_map(name, "in_WRITE_QUEUE_IN_CANCEL" , _name, "in_WRITE_UNIT_IN_CANCEL" ); _component->port_map(name, "in_WRITE_QUEUE_IN_WRITE_RD" , _name, "in_WRITE_UNIT_IN_WRITE_RD" ); _component->port_map(name, "in_WRITE_QUEUE_IN_NUM_REG_RD" , _name, "in_WRITE_UNIT_IN_NUM_REG_RD" ); @@ -246,4 +249,5 @@ //_component->port_map(name,"out_WRITE_QUEUE_OUT_OPERATION" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_OPERATION" ); //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_TYPE" ); + _component->port_map(name,"out_WRITE_QUEUE_OUT_CANCEL" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_CANCEL" ); _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_FLAGS" ); _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_EXCEPTION" ); @@ -272,4 +276,5 @@ //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE" , _name,"out_WRITE_UNIT_OUT_TYPE" ); _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS" , _name,"out_WRITE_UNIT_OUT_FLAGS" ); + _component->port_map(name,"out_WRITE_QUEUE_OUT_CANCEL" , _name,"out_WRITE_UNIT_OUT_CANCEL" ); _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION" , _name,"out_WRITE_UNIT_OUT_EXCEPTION" ); _component->port_map(name,"out_WRITE_QUEUE_OUT_NO_SEQUENCE" , _name,"out_WRITE_UNIT_OUT_NO_SEQUENCE" ); @@ -358,4 +363,5 @@ //_component->port_map(name, "in_EXECUTE_QUEUE_IN_OPERATION" , _name+"_write_queue","out_WRITE_QUEUE_OUT_OPERATION" ); //_component->port_map(name, "in_EXECUTE_QUEUE_IN_TYPE" , _name+"_write_queue","out_WRITE_QUEUE_OUT_TYPE" ); + _component->port_map(name, "in_EXECUTE_QUEUE_IN_CANCEL" , _name+"_write_queue","out_WRITE_QUEUE_OUT_CANCEL" ); _component->port_map(name, "in_EXECUTE_QUEUE_IN_FLAGS" , _name+"_write_queue","out_WRITE_QUEUE_OUT_FLAGS" ); _component->port_map(name, "in_EXECUTE_QUEUE_IN_EXCEPTION" , _name+"_write_queue","out_WRITE_QUEUE_OUT_EXCEPTION" ); @@ -381,4 +387,5 @@ //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_OPERATION" , _name,"out_WRITE_UNIT_OUT_OPERATION" ); //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_TYPE" , _name,"out_WRITE_UNIT_OUT_TYPE" ); + _component->port_map(name,"out_EXECUTE_QUEUE_OUT_CANCEL" , _name,"out_WRITE_UNIT_OUT_CANCEL" ); _component->port_map(name,"out_EXECUTE_QUEUE_OUT_FLAGS" , _name,"out_WRITE_UNIT_OUT_FLAGS" ); _component->port_map(name,"out_EXECUTE_QUEUE_OUT_EXCEPTION" , _name,"out_WRITE_UNIT_OUT_EXCEPTION" ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp (revision 136) @@ -37,4 +37,5 @@ // DELETE0_SIGNAL( in_WRITE_UNIT_IN_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL( in_WRITE_UNIT_IN_TYPE ,_param->_size_type ); + DELETE0_SIGNAL( in_WRITE_UNIT_IN_CANCEL ,1 ); DELETE0_SIGNAL( in_WRITE_UNIT_IN_WRITE_RD ,1 ); DELETE0_SIGNAL( in_WRITE_UNIT_IN_NUM_REG_RD ,_param->_size_general_register ); @@ -55,4 +56,5 @@ // DELETE0_SIGNAL(out_WRITE_UNIT_OUT_OPERATION ,_param->_size_operation ); // DELETE0_SIGNAL(out_WRITE_UNIT_OUT_TYPE ,_param->_size_type ); + DELETE0_SIGNAL(out_WRITE_UNIT_OUT_CANCEL ,1 ); DELETE0_SIGNAL(out_WRITE_UNIT_OUT_FLAGS ,_param->_size_special_data ); DELETE0_SIGNAL(out_WRITE_UNIT_OUT_EXCEPTION ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h (revision 136) @@ -73,4 +73,5 @@ //public : SC_IN (Toperation_t ) *** in_EXECUTE_UNIT_OUT_OPERATION ; //public : SC_IN (Ttype_t ) *** in_EXECUTE_UNIT_OUT_TYPE ; + public : SC_IN (Tcontrol_t ) *** in_EXECUTE_UNIT_OUT_CANCEL ; public : SC_IN (Tcontrol_t ) *** in_EXECUTE_UNIT_OUT_WRITE_RD ; public : SC_IN (Tgeneral_address_t) *** in_EXECUTE_UNIT_OUT_NUM_REG_RD ; @@ -92,4 +93,5 @@ //public : SC_OUT(Toperation_t ) ** out_WRITE_UNIT_IN_OPERATION ; //public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ; + public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_CANCEL ; public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_WRITE_RD ; public : SC_OUT(Tgeneral_address_t) ** out_WRITE_UNIT_IN_NUM_REG_RD ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit.cpp (revision 136) @@ -36,5 +36,5 @@ ,_usage (usage) { - log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin"); + log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Execution_unit_to_Write_unit == true @@ -44,5 +44,5 @@ // #endif - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Allocation"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation ( @@ -55,5 +55,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -65,5 +65,5 @@ { // generate the vhdl - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -74,5 +74,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Method - transition"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -84,5 +84,5 @@ # endif - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Method - genMealy"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Method - genMealy"),_name.c_str()); SC_METHOD (genMealy); @@ -105,4 +105,5 @@ //<< (*(in_EXECUTE_UNIT_OUT_OPERATION [i][j])) //<< (*(in_EXECUTE_UNIT_OUT_TYPE [i][j])) + << (*(in_EXECUTE_UNIT_OUT_CANCEL [i][j])) << (*(in_EXECUTE_UNIT_OUT_WRITE_RD [i][j])) << (*(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i][j])) @@ -371,5 +372,5 @@ #endif } - log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End"); + log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -378,10 +379,10 @@ Execution_unit_to_Write_unit::~Execution_unit_to_Write_unit (void) { - log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin"); + log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -389,8 +390,8 @@ #endif - log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,"Deallocation"); + log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End"); + log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp (revision 136) @@ -68,4 +68,5 @@ //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); + _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); @@ -93,4 +94,5 @@ //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp (revision 136) @@ -37,4 +37,5 @@ // DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_operation ); // DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_type ); + DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_CANCEL , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],1 ); DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],1 ); DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_general_register); @@ -55,4 +56,5 @@ // DELETE1_SIGNAL(out_WRITE_UNIT_IN_OPERATION , _param->_nb_write_unit,_param->_size_operation ); // DELETE1_SIGNAL(out_WRITE_UNIT_IN_TYPE , _param->_nb_write_unit,_param->_size_type ); + DELETE1_SIGNAL(out_WRITE_UNIT_IN_CANCEL , _param->_nb_write_unit,1 ); DELETE1_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD , _param->_nb_write_unit,1 ); DELETE1_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD , _param->_nb_write_unit,_param->_size_general_register); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp (revision 136) @@ -79,4 +79,5 @@ // PORT_WRITE(out_WRITE_UNIT_IN_OPERATION [dest], PORT_READ(in_EXECUTE_UNIT_OUT_OPERATION [i][j])); // PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i][j])); + PORT_WRITE(out_WRITE_UNIT_IN_CANCEL [dest], PORT_READ(in_EXECUTE_UNIT_OUT_CANCEL [i][j])); PORT_WRITE(out_WRITE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_WRITE_RD [i][j])); PORT_WRITE(out_WRITE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i][j])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h (revision 136) @@ -84,4 +84,5 @@ public : SC_IN (Toperation_t ) *** in_READ_UNIT_OUT_OPERATION ;//[nb_read_unit][nb_read_unit_port] public : SC_IN (Ttype_t ) *** in_READ_UNIT_OUT_TYPE ;//[nb_read_unit][nb_read_unit_port] + public : SC_IN (Tcontrol_t ) *** in_READ_UNIT_OUT_CANCEL ;//[nb_read_unit][nb_read_unit_port] public : SC_IN (Tlsq_ptr_t ) *** in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE ;//[nb_read_unit][nb_read_unit_port] public : SC_IN (Tlsq_ptr_t ) *** in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ;//[nb_read_unit][nb_read_unit_port] @@ -107,4 +108,5 @@ public : SC_OUT(Toperation_t ) *** out_EXECUTE_UNIT_IN_OPERATION ;//[nb_execute_unit][nb_execute_unit_port] public : SC_OUT(Ttype_t ) *** out_EXECUTE_UNIT_IN_TYPE ;//[nb_execute_unit][nb_execute_unit_port] + public : SC_OUT(Tcontrol_t ) *** out_EXECUTE_UNIT_IN_CANCEL ;//[nb_execute_unit][nb_execute_unit_port] public : SC_OUT(Tlsq_ptr_t ) *** out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE;//[nb_execute_unit][nb_execute_unit_port] public : SC_OUT(Tlsq_ptr_t ) *** out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_READ ;//[nb_execute_unit][nb_execute_unit_port] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp (revision 136) @@ -36,5 +36,5 @@ ,_usage (usage) { - log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"Begin"); + log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Read_unit_to_Execution_unit == true @@ -44,5 +44,5 @@ // #endif - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Allocation"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation ( @@ -55,5 +55,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -65,5 +65,5 @@ { // generate the vhdl - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -74,5 +74,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Method - transition"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -84,5 +84,5 @@ # endif - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Method - genMealy"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Method - genMealy"),_name.c_str()); SC_METHOD (genMealy); @@ -97,4 +97,5 @@ << (*(in_READ_UNIT_OUT_OPERATION [i][j])) << (*(in_READ_UNIT_OUT_TYPE [i][j])) + << (*(in_READ_UNIT_OUT_CANCEL [i][j])) << (*(in_READ_UNIT_OUT_HAS_IMMEDIAT [i][j])) << (*(in_READ_UNIT_OUT_IMMEDIAT [i][j])) @@ -450,5 +451,5 @@ #endif } - log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"End"); + log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -457,10 +458,10 @@ Read_unit_to_Execution_unit::~Read_unit_to_Execution_unit (void) { - log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"Begin"); + log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -468,8 +469,8 @@ #endif - log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,"Deallocation"); + log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"End"); + log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp (revision 136) @@ -67,4 +67,5 @@ _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); + _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); @@ -95,4 +96,5 @@ _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); + _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_CANCEL ,"CANCEL" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp (revision 136) @@ -37,4 +37,5 @@ DELETE2_SIGNAL( in_READ_UNIT_OUT_OPERATION , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_operation ); DELETE2_SIGNAL( in_READ_UNIT_OUT_TYPE , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_type ); + DELETE2_SIGNAL( in_READ_UNIT_OUT_CANCEL , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],1 ); DELETE2_SIGNAL( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_store_queue_ptr ); DELETE2_SIGNAL( in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_store_queue_ptr ); @@ -59,4 +60,5 @@ DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_OPERATION , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_operation ); DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_TYPE , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_type ); + DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_CANCEL , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],1 ); DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],1 ); DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_DATA_RC , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_special_data ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp (revision 136) @@ -84,4 +84,5 @@ PORT_WRITE(out_EXECUTE_UNIT_IN_PACKET_ID [dest][port], PORT_READ(in_READ_UNIT_OUT_PACKET_ID [i][j])); PORT_WRITE(out_EXECUTE_UNIT_IN_OPERATION [dest][port], PORT_READ(in_READ_UNIT_OUT_OPERATION [i][j])); + PORT_WRITE(out_EXECUTE_UNIT_IN_CANCEL [dest][port], PORT_READ(in_READ_UNIT_OUT_CANCEL [i][j])); PORT_WRITE(out_EXECUTE_UNIT_IN_TYPE [dest][port], PORT_READ(in_READ_UNIT_OUT_TYPE [i][j])); PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest][port], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i][j])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h (revision 136) @@ -34,6 +34,7 @@ public : uint32_t _nb_gpr_write ; public : uint32_t _nb_spr_write ; - public : uint32_t * _nb_inst_insert_rob ; - public : uint32_t * _nb_inst_retire_rob ; + public : uint32_t _nb_inst_issue ; +// public : uint32_t * _nb_inst_insert_rob ; +// public : uint32_t * _nb_inst_retire_rob ; //public : bool _have_port_ooo_engine_id; @@ -47,6 +48,7 @@ uint32_t nb_gpr_write , uint32_t nb_spr_write , - uint32_t * nb_inst_insert_rob , - uint32_t * nb_inst_retire_rob , + uint32_t nb_inst_issue , +// uint32_t * nb_inst_insert_rob , +// uint32_t * nb_inst_retire_rob , bool is_toplevel=false); //public : Parameters (Parameters & param) ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Register_unit_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Register_unit_Glue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Register_unit_Glue.h (revision 136) @@ -118,17 +118,32 @@ public : SC_OUT(Tspecial_data_t ) *** out_SPR_WRITE_STATUS_DATA ; // type for compatibility with the registerFile - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; - public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; - - public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_GPR_STATUS_VAL ; - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_GPR_STATUS_ACK ; - public : SC_OUT(Tgeneral_data_t ) *** out_INSERT_ROB_GPR_STATUS_DATA ; // type for compatibility with the registerFile - - public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_SPR_STATUS_VAL ; - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_SPR_STATUS_ACK ; - public : SC_OUT(Tspecial_data_t ) *** out_INSERT_ROB_SPR_STATUS_DATA ; // type for compatibility with the registerFile + // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; + public : SC_IN (Tcontext_t ) ** in_ISSUE_OOO_ENGINE_ID ; + public : SC_IN (Tcontrol_t ) ** in_ISSUE_RD_USE ; + public : SC_IN (Tcontrol_t ) ** in_ISSUE_RE_USE ; + + public : SC_OUT(Tcontrol_t ) *** out_ISSUE_GPR_STATUS_VAL ; + public : SC_IN (Tcontrol_t ) *** in_ISSUE_GPR_STATUS_ACK ; + public : SC_OUT(Tgeneral_data_t ) *** out_ISSUE_GPR_STATUS_DATA ; // type for compatibility with the registerFile + + public : SC_OUT(Tcontrol_t ) *** out_ISSUE_SPR_STATUS_VAL ; + public : SC_IN (Tcontrol_t ) *** in_ISSUE_SPR_STATUS_ACK ; + public : SC_OUT(Tspecial_data_t ) *** out_ISSUE_SPR_STATUS_DATA ; // type for compatibility with the registerFile + +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; + +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_GPR_STATUS_VAL ; +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_GPR_STATUS_ACK ; +// public : SC_OUT(Tgeneral_data_t ) *** out_INSERT_ROB_GPR_STATUS_DATA ; // type for compatibility with the registerFile + +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_SPR_STATUS_VAL ; +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_SPR_STATUS_ACK ; +// public : SC_OUT(Tspecial_data_t ) *** out_INSERT_ROB_SPR_STATUS_DATA ; // type for compatibility with the registerFile // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters.cpp (revision 136) @@ -26,6 +26,7 @@ uint32_t nb_gpr_write , uint32_t nb_spr_write , - uint32_t * nb_inst_insert_rob , - uint32_t * nb_inst_retire_rob , + uint32_t nb_inst_issue , +// uint32_t * nb_inst_insert_rob , +// uint32_t * nb_inst_retire_rob , bool is_toplevel ) { @@ -37,6 +38,7 @@ _nb_gpr_write = nb_gpr_write ; _nb_spr_write = nb_spr_write ; - _nb_inst_insert_rob = nb_inst_insert_rob; - _nb_inst_retire_rob = nb_inst_retire_rob; + _nb_inst_issue = nb_inst_issue ; +// _nb_inst_insert_rob = nb_inst_insert_rob; +// _nb_inst_retire_rob = nb_inst_retire_rob; test(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_print.cpp (revision 136) @@ -34,16 +34,17 @@ xml.singleton_begin("nb_gpr_write "); xml.attribut("value",toString(_nb_gpr_write )); xml.singleton_end(); xml.singleton_begin("nb_spr_write "); xml.attribut("value",toString(_nb_spr_write )); xml.singleton_end(); + xml.singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); - xml. balise_open("multi_ooo_engine"); - for (uint32_t i=0; i<_nb_ooo_engine; i++) - { - xml. balise_open_begin("ooo_engine"); - xml. attribut("id", toString(i)); - xml. balise_open_end(); - xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); - xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); - xml. balise_close(); - } - xml. balise_close(); +// xml. balise_open("multi_ooo_engine"); +// for (uint32_t i=0; i<_nb_ooo_engine; i++) +// { +// xml. balise_open_begin("ooo_engine"); +// xml. attribut("id", toString(i)); +// xml. balise_open_end(); +// xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); +// xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); +// xml. balise_close(); +// } +// xml. balise_close(); xml.balise_close(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue.cpp (revision 136) @@ -36,5 +36,5 @@ ,_usage (usage) { - log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Register_unit_Glue == true @@ -44,5 +44,5 @@ // #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Allocation"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation (); @@ -50,5 +50,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Register_unit_Glue,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); // Allocation of statistics @@ -61,5 +61,5 @@ { // generate the vhdl - log_printf(INFO,Register_unit_Glue,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -73,5 +73,5 @@ constant(); #else - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - constant"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - constant"),_name.c_str()); SC_METHOD (constant); @@ -83,5 +83,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - transition"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -93,5 +93,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_read"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read"),_name.c_str()); SC_METHOD (genMealy_gpr_read); @@ -131,5 +131,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_read_status"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read_status"),_name.c_str()); SC_METHOD (genMealy_gpr_read_status); @@ -161,5 +161,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_read_registerfile"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read_registerfile"),_name.c_str()); SC_METHOD (genMealy_gpr_read_registerfile); @@ -191,5 +191,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_write"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write"),_name.c_str()); SC_METHOD (genMealy_gpr_write); @@ -222,5 +222,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_write_status"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write_status"),_name.c_str()); SC_METHOD (genMealy_gpr_write_status); @@ -252,5 +252,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_gpr_write_registerfile"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write_registerfile"),_name.c_str()); SC_METHOD (genMealy_gpr_write_registerfile); @@ -282,5 +282,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_read"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read"),_name.c_str()); SC_METHOD (genMealy_spr_read); @@ -320,5 +320,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_read_status"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read_status"),_name.c_str()); SC_METHOD (genMealy_spr_read_status); @@ -350,5 +350,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_read_registerfile"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read_registerfile"),_name.c_str()); SC_METHOD (genMealy_spr_read_registerfile); @@ -380,5 +380,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_write"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write"),_name.c_str()); SC_METHOD (genMealy_spr_write); @@ -411,5 +411,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_write_status"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write_status"),_name.c_str()); SC_METHOD (genMealy_spr_write_status); @@ -441,5 +441,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_spr_write_registerfile"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write_registerfile"),_name.c_str()); SC_METHOD (genMealy_spr_write_registerfile); @@ -471,5 +471,5 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_insert"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_insert"),_name.c_str()); SC_METHOD (genMealy_insert); @@ -477,36 +477,50 @@ // sensitive << (*(in_CLOCK)).neg(); sensitive << (*(in_NRESET)); - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - { - uint32_t x=_param->_nb_inst_insert_rob [i]; - for (uint32_t j=0; j_nb_ooo_engine; i++) - { - uint32_t x=_param->_nb_inst_insert_rob [i]; - for (uint32_t j=0; j_nb_inst_issue; i++) + { + sensitive << *( in_ISSUE_VAL [i]) + << *( in_ISSUE_RD_USE [i]) + << *( in_ISSUE_RE_USE [i]); + + if (_param->_have_port_ooo_engine_id == true) + sensitive << *( in_ISSUE_OOO_ENGINE_ID [i]); + + for (uint32_t j=0; j<_param->_nb_ooo_engine; ++j) + sensitive << *( in_ISSUE_GPR_STATUS_ACK [j][i]) + << *( in_ISSUE_SPR_STATUS_ACK [j][i]); + } + +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// { +// uint32_t x=_param->_nb_inst_insert_rob [i]; +// for (uint32_t j=0; j_nb_ooo_engine; i++) +// { +// uint32_t x=_param->_nb_inst_insert_rob [i]; +// for (uint32_t j=0; j Method - genMealy_retire"),_name.c_str()); // SC_METHOD (genMealy_retire); @@ -567,5 +581,5 @@ } #endif - log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); + log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -574,10 +588,10 @@ Register_unit_Glue::~Register_unit_Glue (void) { - log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin"); + log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Register_unit_Glue,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -585,8 +599,8 @@ #endif - log_printf(INFO,Register_unit_Glue,FUNCTION,"Deallocation"); + log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); + log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_allocation.cpp (revision 136) @@ -177,35 +177,68 @@ } - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - { - ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE,"rd_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE,"re_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - } - - { - ALLOC2_INTERFACE_BEGIN("insert_rob_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - _ALLOC2_VALACK_OUT(out_INSERT_ROB_GPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_VALACK_IN ( in_INSERT_ROB_GPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_GPR_STATUS_DATA,"data",Tgeneral_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - } - - { - ALLOC2_INTERFACE_BEGIN("insert_rob_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - _ALLOC2_VALACK_OUT(out_INSERT_ROB_SPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_VALACK_IN ( in_INSERT_ROB_SPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_SPR_STATUS_DATA,"data",Tspecial_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - } + // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + ALLOC1_INTERFACE_BEGIN("issue",IN,WEST,_("Interface to update status (insert)"),_param->_nb_inst_issue); + + ALLOC1_VALACK_IN ( in_ISSUE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_ISSUE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t,_param->_size_ooo_engine_id); + ALLOC1_SIGNAL_IN ( in_ISSUE_RD_USE ,"rd_use" ,Tcontrol_t, 1); + ALLOC1_SIGNAL_IN ( in_ISSUE_RE_USE ,"re_use" ,Tcontrol_t, 1); + + ALLOC1_INTERFACE_END(_param->_nb_inst_issue); + } + + { + ALLOC2_INTERFACE_BEGIN("issue_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_issue); + + ALLOC2_VALACK_OUT(out_ISSUE_GPR_STATUS_VAL ,VAL ); + ALLOC2_VALACK_IN ( in_ISSUE_GPR_STATUS_ACK ,ACK ); + ALLOC2_SIGNAL_OUT(out_ISSUE_GPR_STATUS_DATA,"data",Tgeneral_data_t,1); + + ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue); + } + + { + ALLOC2_INTERFACE_BEGIN("issue_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine, _param->_nb_inst_issue); + + ALLOC2_VALACK_OUT(out_ISSUE_SPR_STATUS_VAL ,VAL ); + ALLOC2_VALACK_IN ( in_ISSUE_SPR_STATUS_ACK ,ACK ); + ALLOC2_SIGNAL_OUT(out_ISSUE_SPR_STATUS_DATA,"data",Tspecial_data_t,1); + + ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue); + } + +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE,"rd_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE,"re_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// } + +// { +// ALLOC2_INTERFACE_BEGIN("insert_rob_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// _ALLOC2_VALACK_OUT(out_INSERT_ROB_GPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_VALACK_IN ( in_INSERT_ROB_GPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_GPR_STATUS_DATA,"data",Tgeneral_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// } + +// { +// ALLOC2_INTERFACE_BEGIN("insert_rob_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// _ALLOC2_VALACK_OUT(out_INSERT_ROB_SPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_VALACK_IN ( in_INSERT_ROB_SPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_SPR_STATUS_DATA,"data",Tspecial_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// } // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_constant.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_constant.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_constant.cpp (revision 136) @@ -33,10 +33,17 @@ PORT_WRITE(out_SPR_WRITE_STATUS_DATA [i][j],1); - for (uint32_t j=0; j<_param->_nb_inst_insert_rob[i]; ++j) - { - PORT_WRITE(out_INSERT_ROB_GPR_STATUS_DATA [i][j],0); - PORT_WRITE(out_INSERT_ROB_SPR_STATUS_DATA [i][j],0); - } +// for (uint32_t j=0; j<_param->_nb_inst_insert_rob[i]; ++j) +// { +// PORT_WRITE(out_INSERT_ROB_GPR_STATUS_DATA [i][j],0); +// PORT_WRITE(out_INSERT_ROB_SPR_STATUS_DATA [i][j],0); +// } } + + for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) + for (uint32_t j=0; j<_param->_nb_inst_issue; ++j) + { + PORT_WRITE(out_ISSUE_GPR_STATUS_DATA [i][j],0); + PORT_WRITE(out_ISSUE_SPR_STATUS_DATA [i][j],0); + } log_end(Register_unit_Glue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_deallocation.cpp (revision 136) @@ -84,16 +84,30 @@ DELETE2_SIGNAL(out_SPR_WRITE_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_spr_write,1 ); - DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); + DELETE1_SIGNAL( in_ISSUE_VAL ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL(out_ISSUE_ACK ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL( in_ISSUE_OOO_ENGINE_ID ,_param->_nb_inst_issue,_param->_size_ooo_engine_id); + DELETE1_SIGNAL( in_ISSUE_RD_USE ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL( in_ISSUE_RE_USE ,_param->_nb_inst_issue,1); - DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); + DELETE2_SIGNAL(out_ISSUE_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); + DELETE2_SIGNAL( in_ISSUE_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); + DELETE2_SIGNAL(out_ISSUE_GPR_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); - DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); + DELETE2_SIGNAL(out_ISSUE_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); + DELETE2_SIGNAL( in_ISSUE_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); + DELETE2_SIGNAL(out_ISSUE_SPR_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); + +// DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); + +// DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); + +// DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_genMealy_insert.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_genMealy_insert.cpp (revision 136) @@ -28,47 +28,103 @@ if (PORT_READ(in_NRESET)) { - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) - { - Tcontrol_t val = PORT_READ(in_INSERT_ROB_VAL [i][j]); - Tcontrol_t gpr_use = PORT_READ(in_INSERT_ROB_RD_USE [i][j]); - Tcontrol_t spr_use = PORT_READ(in_INSERT_ROB_RE_USE [i][j]); - Tcontrol_t gpr_status_ack = PORT_READ(in_INSERT_ROB_GPR_STATUS_ACK [i][j]); - Tcontrol_t spr_status_ack = PORT_READ(in_INSERT_ROB_SPR_STATUS_ACK [i][j]); - - Tcontrol_t ack = (gpr_status_ack and - spr_status_ack); - Tcontrol_t gpr_status_val = (val and - gpr_use and - spr_status_ack); - Tcontrol_t spr_status_val = (val and - spr_use and - gpr_status_ack); + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + { + Tcontrol_t val = PORT_READ(in_ISSUE_VAL [i]); + Tcontrol_t gpr_use = PORT_READ(in_ISSUE_RD_USE [i]); + Tcontrol_t spr_use = PORT_READ(in_ISSUE_RE_USE [i]); + Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id)?PORT_READ(in_ISSUE_VAL [i]):0; + Tcontrol_t gpr_status_ack = PORT_READ(in_ISSUE_GPR_STATUS_ACK [ooo_engine_id][i]); + Tcontrol_t spr_status_ack = PORT_READ(in_ISSUE_SPR_STATUS_ACK [ooo_engine_id][i]); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * insert_rob [%d][%d]",i,j); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); - log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); + Tcontrol_t ack = (gpr_status_ack and + spr_status_ack); + Tcontrol_t gpr_status_val = (val and + gpr_use and + spr_status_ack); + Tcontrol_t spr_status_val = (val and + spr_use and + gpr_status_ack); + + log_printf(TRACE,Register_unit_Glue,FUNCTION," * issue [%d]",i); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * ooo_engine_id (w) : %d",ooo_engine_id ); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); + log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); + + PORT_WRITE(out_ISSUE_ACK [i], ack ); + PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [ooo_engine_id][i], gpr_status_val); + PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [ooo_engine_id][i], spr_status_val); - PORT_WRITE(out_INSERT_ROB_ACK [i][j], ack ); - PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], gpr_status_val); - PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], spr_status_val); + for (uint32_t j=0; j<_param->_nb_ooo_engine; ++j) + if (j!=ooo_engine_id) + { + PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [j][i], 0); + PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [j][i], 0); + } } } else { - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) - { - PORT_WRITE(out_INSERT_ROB_ACK [i][j], 0); - PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], 0); - PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], 0); - } + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) + { + PORT_WRITE(out_ISSUE_ACK [i], 0); + for (uint32_t j=0; j<_param->_nb_ooo_engine; j++) + { + PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [j][i], 0); + PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [j][i], 0); + } + } } + +// if (PORT_READ(in_NRESET)) +// { +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) +// { +// Tcontrol_t val = PORT_READ(in_INSERT_ROB_VAL [i][j]); +// Tcontrol_t gpr_use = PORT_READ(in_INSERT_ROB_RD_USE [i][j]); +// Tcontrol_t spr_use = PORT_READ(in_INSERT_ROB_RE_USE [i][j]); +// Tcontrol_t gpr_status_ack = PORT_READ(in_INSERT_ROB_GPR_STATUS_ACK [i][j]); +// Tcontrol_t spr_status_ack = PORT_READ(in_INSERT_ROB_SPR_STATUS_ACK [i][j]); + +// Tcontrol_t ack = (gpr_status_ack and +// spr_status_ack); +// Tcontrol_t gpr_status_val = (val and +// gpr_use and +// spr_status_ack); +// Tcontrol_t spr_status_val = (val and +// spr_use and +// gpr_status_ack); + +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * insert_rob [%d][%d]",i,j); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); +// log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); + +// PORT_WRITE(out_INSERT_ROB_ACK [i][j], ack ); +// PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], gpr_status_val); +// PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], spr_status_val); +// } +// } +// else +// { +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) +// { +// PORT_WRITE(out_INSERT_ROB_ACK [i][j], 0); +// PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], 0); +// PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], 0); +// } +// } log_end(Register_unit_Glue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp (revision 136) @@ -245,73 +245,115 @@ //----------------------------------- - // INSERT_ROB + // ISSUE //----------------------------------- vhdl->set_body (""); for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - { - uint32_t x=_param->_nb_inst_insert_rob [i]; - for (uint32_t j=0; jset_body ("out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); - vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE and"); - vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE and"); - vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); - } - } - - //----------------------------------- - // RETIRE_ROB - //----------------------------------- - vhdl->set_body (""); - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - { - uint32_t x=_param->_nb_inst_retire_rob [i]; - for (uint32_t j=0; jset_body ("out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); - - vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); - vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); - vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK;"); - } - } + for (uint32_t j=0; j<_param->_nb_inst_issue; j++) + { + vhdl->set_body ("out_ISSUE_"+toString(j)+"_ACK <="); + vhdl->set_body ("\tin_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); + vhdl->set_body ("\tin_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); + if (_param->_have_port_ooo_engine_id) + { + vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); + vhdl->set_body ("else '0'"); + } + vhdl->set_body (";"); + + + vhdl->set_body ("out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); + vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_VAL and"); + vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_RD_USE and"); + vhdl->set_body ("\tin_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); + if (_param->_have_port_ooo_engine_id) + { + vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); + vhdl->set_body ("else '0'"); + } + vhdl->set_body (";"); + + vhdl->set_body ("out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); + vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_VAL and"); + vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_RE_USE and"); + vhdl->set_body ("\tin_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); + if (_param->_have_port_ooo_engine_id) + { + vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); + vhdl->set_body ("else '0'"); + } + vhdl->set_body (";"); + } + +// //----------------------------------- +// // INSERT_ROB +// //----------------------------------- + +// vhdl->set_body (""); +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// { +// uint32_t x=_param->_nb_inst_insert_rob [i]; +// for (uint32_t j=0; jset_body ("out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); +// vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE and"); +// vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE and"); +// vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); +// } +// } + +// //----------------------------------- +// // RETIRE_ROB +// //----------------------------------- +// vhdl->set_body (""); +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// { +// uint32_t x=_param->_nb_inst_retire_rob [i]; +// for (uint32_t j=0; jset_body ("out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); + +// vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); +// vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); +// vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK;"); +// } +// } log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h (revision 136) @@ -40,6 +40,7 @@ public : uint32_t * _nb_general_register ; public : uint32_t * _nb_special_register ; - public : uint32_t * _nb_inst_insert_rob ; - public : uint32_t * _nb_inst_retire_rob ; + public : uint32_t _nb_inst_issue ; +// public : uint32_t * _nb_inst_insert_rob ; +// public : uint32_t * _nb_inst_retire_rob ; //public : bool _have_port_ooo_engine_id ; @@ -73,6 +74,7 @@ uint32_t * nb_general_register , uint32_t * nb_special_register , - uint32_t * nb_inst_insert_rob , - uint32_t * nb_inst_retire_rob , + uint32_t nb_inst_issue , +// uint32_t * nb_inst_insert_rob , +// uint32_t * nb_inst_retire_rob , bool is_toplevel=false); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h (revision 136) @@ -93,12 +93,21 @@ public : SC_IN (Tspecial_address_t) ** in_SPR_WRITE_NUM_REG ; public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; + + // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; + public : SC_IN (Tcontext_t ) ** in_ISSUE_OOO_ENGINE_ID ; + public : SC_IN (Tcontrol_t ) ** in_ISSUE_RD_USE ; + public : SC_IN (Tgeneral_address_t) ** in_ISSUE_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 + public : SC_IN (Tcontrol_t ) ** in_ISSUE_RE_USE ; + public : SC_IN (Tspecial_address_t) ** in_ISSUE_RE_NUM_REG ; - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; - public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; - public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; - public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ; +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; +// public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; +// public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ; // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters.cpp (revision 136) @@ -33,6 +33,7 @@ uint32_t * nb_general_register , uint32_t * nb_special_register , - uint32_t * nb_inst_insert_rob , - uint32_t * nb_inst_retire_rob , + uint32_t nb_inst_issue , +// uint32_t * nb_inst_insert_rob , +// uint32_t * nb_inst_retire_rob , bool is_toplevel ) { @@ -53,6 +54,7 @@ _nb_general_register = nb_general_register ; _nb_special_register = nb_special_register ; - _nb_inst_insert_rob = nb_inst_insert_rob ; - _nb_inst_retire_rob = nb_inst_retire_rob ; + _nb_inst_issue = nb_inst_issue ; +// _nb_inst_insert_rob = nb_inst_insert_rob ; +// _nb_inst_retire_rob = nb_inst_retire_rob ; _size_gpr_address = log2(nb_general_register [0]); @@ -101,5 +103,6 @@ (_nb_gpr_read , // _nb_gpr_write+_nb_inst_insert_rob[i]+2*_nb_inst_retire_rob[i], - _nb_gpr_write+_nb_inst_insert_rob[i], +// _nb_gpr_write+_nb_inst_insert_rob[i], + _nb_gpr_write+_nb_inst_issue, 0, nb_general_register[i], @@ -122,5 +125,6 @@ (_nb_spr_read , // _nb_spr_write+_nb_inst_insert_rob[i]+2*_nb_inst_retire_rob[i], - _nb_spr_write+_nb_inst_insert_rob[i], +// _nb_spr_write+_nb_inst_insert_rob[i], + _nb_spr_write+_nb_inst_issue, 0, nb_special_register[i], @@ -134,13 +138,16 @@ } - _param_glue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Parameters (_nb_ooo_engine , - size_general_data , - size_special_data , - _nb_gpr_read , - _nb_spr_read , - _nb_gpr_write , - _nb_spr_write , - _nb_inst_insert_rob , - _nb_inst_retire_rob ); + _param_glue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Parameters + (_nb_ooo_engine , + size_general_data , + size_special_data , + _nb_gpr_read , + _nb_spr_read , + _nb_gpr_write , + _nb_spr_write , + _nb_inst_issue +// _nb_inst_insert_rob , +// _nb_inst_retire_rob + ); test(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_print.cpp (revision 136) @@ -39,18 +39,19 @@ xml. singleton_begin("nb_spr_port_read_by_bank "); xml.attribut("value",toString(_nb_spr_port_read_by_bank )); xml.singleton_end(); xml. singleton_begin("nb_spr_port_write_by_bank"); xml.attribut("value",toString(_nb_spr_port_write_by_bank)); xml.singleton_end(); + xml. singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); - xml. balise_open("multi_ooo_engine"); - for (uint32_t i=0; i<_nb_ooo_engine; i++) - { - xml. balise_open_begin("ooo_engine"); - xml. attribut("id", toString(i)); - xml. balise_open_end(); - xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); - xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); - xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); - xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); - xml. balise_close(); - } - xml. balise_close(); +// xml. balise_open("multi_ooo_engine"); +// for (uint32_t i=0; i<_nb_ooo_engine; i++) +// { +// xml. balise_open_begin("ooo_engine"); +// xml. attribut("id", toString(i)); +// xml. balise_open_end(); +// xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); +// xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); +// xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); +// xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); +// xml. balise_close(); +// } +// xml. balise_close(); // xml. text (_param_glue->print(depth+1)); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit.cpp (revision 136) @@ -35,5 +35,5 @@ ,_usage (usage) { - log_printf(FUNC,Register_unit,FUNCTION,"Begin"); + log_printf(FUNC,Register_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Register_unit == true @@ -43,5 +43,5 @@ // #endif - log_printf(INFO,Register_unit,FUNCTION,"Allocation"); + log_printf(INFO,Register_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation ( #ifdef STATISTICS @@ -63,5 +63,5 @@ { // generate the vhdl - log_printf(INFO,Register_unit,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Register_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -73,5 +73,5 @@ { //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - log_printf(INFO,Register_unit,FUNCTION,"Method - transition"); + log_printf(INFO,Register_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -85,5 +85,5 @@ } #endif - log_printf(FUNC,Register_unit,FUNCTION,"End"); + log_printf(FUNC,Register_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -92,18 +92,18 @@ Register_unit::~Register_unit (void) { - log_printf(FUNC,Register_unit,FUNCTION,"Begin"); + log_printf(FUNC,Register_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Register_unit,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Register_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; } #endif - log_printf(INFO,Register_unit,FUNCTION,"Deallocation"); + log_printf(INFO,Register_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Register_unit,FUNCTION,"End"); + log_printf(FUNC,Register_unit,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp (revision 136) @@ -106,17 +106,32 @@ } - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { - ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + ALLOC1_INTERFACE_BEGIN("issue",IN,WEST,_("Interface to update status (issue)"),_param->_nb_inst_issue); - _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_gpr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_spr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + ALLOC1_VALACK_IN ( in_ISSUE_VAL ,VAL); + ALLOC1_VALACK_OUT(out_ISSUE_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); + ALLOC1_SIGNAL_IN ( in_ISSUE_RD_USE ,"rd_use" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_ISSUE_RD_NUM_REG ,"rd_num_reg" ,Tgeneral_address_t,_param->_size_gpr_address ); + ALLOC1_SIGNAL_IN ( in_ISSUE_RE_USE ,"re_use" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_ISSUE_RE_NUM_REG ,"re_num_reg" ,Tspecial_address_t,_param->_size_spr_address ); - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + ALLOC1_INTERFACE_END(_param->_nb_inst_issue); } + +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_gpr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_spr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); +// } // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -375,4 +390,6 @@ // ------------------------------------------------------------------- { + uint32_t x=0; + for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) { @@ -413,5 +430,4 @@ } - uint32_t x=0; for (uint32_t j=0; j<_param->_nb_gpr_write; j++) { @@ -439,28 +455,53 @@ } - for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) - { - dest = _name+"_glue"; - -#ifdef POSITION - _component->interface_map (src , "write_"+toString(j), - dest,"insert_rob_gpr_status_"+toString(i)+"_"+toString(j)); -#endif - - COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", - dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); - COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", - dest, "in_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); - COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", - dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); -// dest,"out_CONST_0"); - - dest = _name; - - PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); - - x++; - } +// for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) +// { +// dest = _name+"_glue"; + +// #ifdef POSITION +// _component->interface_map (src , "write_"+toString(j), +// dest,"insert_rob_gpr_status_"+toString(i)+"_"+toString(j)); +// #endif + +// COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", +// dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); +// COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", +// dest, "in_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); +// COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", +// dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); +// // dest,"out_CONST_0"); + +// dest = _name; + +// PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); + +// x++; +// } + + for (uint32_t j=0; j<_param->_nb_inst_issue; j++) + { + dest = _name+"_glue"; + +#ifdef POSITION + _component->interface_map (src ,"write_"+toString(j), + dest,"issue_gpr_status_"+toString(i)+"_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", + dest,"out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); + COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", + dest, "in_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); + COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", + dest,"out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); +// dest,"out_CONST_0"); + + dest = _name; + + PORT_MAP (_component,src , "in_WRITE_"+toString(x)+"_ADDRESS", + dest, "in_ISSUE_"+toString(j)+"_RD_NUM_REG"); + + x++; + } } }// gpr_status @@ -534,4 +575,5 @@ // ------------------------------------------------------------------- { + uint32_t x=0; for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) { @@ -572,5 +614,4 @@ } - uint32_t x=0; for (uint32_t j=0; j<_param->_nb_spr_write; j++) { @@ -597,29 +638,55 @@ x++; } + +// for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) +// { +// dest = _name+"_glue"; + +// #ifdef POSITION +// _component->interface_map (src , "write_"+toString(x), +// dest,"insert_rob_spr_status_"+toString(i)+"_"+toString(j)); +// #endif + +// COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", +// dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); +// COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", +// dest, "in_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); +// COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", +// dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); +// // dest,"out_CONST_0"); + +// dest = _name; + +// PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); + +// x++; +// } - for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) - { - dest = _name+"_glue"; - -#ifdef POSITION - _component->interface_map (src , "write_"+toString(x), - dest,"insert_rob_spr_status_"+toString(i)+"_"+toString(j)); -#endif - - COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", - dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); - COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", - dest, "in_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); - COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", - dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); -// dest,"out_CONST_0"); - - dest = _name; - - PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); - - x++; - } + for (uint32_t j=0; j<_param->_nb_inst_issue; j++) + { + dest = _name+"_glue"; + +#ifdef POSITION + _component->interface_map (src , "write_"+toString(x), + dest,"issue_spr_status_"+toString(i)+"_"+toString(j)); +#endif + + COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", + dest,"out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); + COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", + dest, "in_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); + COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", + dest,"out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); +// dest,"out_CONST_0"); + + dest = _name; + + PORT_MAP (_component,src , "in_WRITE_"+toString(x)+"_ADDRESS", + dest, "in_ISSUE_"+toString(j)+"_RE_NUM_REG"); + + x++; + } + } }// spr_status @@ -751,34 +818,64 @@ } - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// { +// uint32_t x = _param->_nb_inst_insert_rob [i]; + +// for (uint32_t j=0; jinterface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), +// dest,"insert_rob_"+toString(i)+"_"+toString(j)); +// #endif + +// PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"); +// PORT_MAP(_component,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK", +// dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"); +// PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"); +// PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"); + +// // out_INSERT_ROB_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL +// // in_INSERT_ROB_GPR_STATUS_ACK - gpr_status. out_WRITE_ACK +// // out_INSERT_ROB_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA +// // out_INSERT_ROB_SPR_STATUS_VAL - spr_status. in_WRITE_VAL +// // in_INSERT_ROB_SPR_STATUS_ACK - spr_status. out_WRITE_ACK +// // in_INSERT_ROB_SPR_STATUS_DATA- spr_status. out_WRITE_DATA +// } +// } + + for (uint32_t i=0; i<_param->_nb_inst_issue; i++) { - uint32_t x = _param->_nb_inst_insert_rob [i]; - - for (uint32_t j=0; jinterface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), - dest,"insert_rob_"+toString(i)+"_"+toString(j)); -#endif - - PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"); - PORT_MAP(_component,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK", - dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"); - PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"); - PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"); - - // out_INSERT_ROB_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL - // in_INSERT_ROB_GPR_STATUS_ACK - gpr_status. out_WRITE_ACK - // out_INSERT_ROB_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA - // out_INSERT_ROB_SPR_STATUS_VAL - spr_status. in_WRITE_VAL - // in_INSERT_ROB_SPR_STATUS_ACK - spr_status. out_WRITE_ACK - // in_INSERT_ROB_SPR_STATUS_DATA- spr_status. out_WRITE_DATA - } + dest = _name; + +#ifdef POSITION + _component->interface_map (src ,"issue_"+toString(i), + dest,"issue_"+toString(i)); +#endif + + PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_VAL", + dest, "in_ISSUE_"+toString(i)+"_VAL"); + PORT_MAP(_component,src ,"out_ISSUE_"+toString(i)+"_ACK", + dest,"out_ISSUE_"+toString(i)+"_ACK"); + if (_param->_have_port_ooo_engine_id == true) + PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_OOO_ENGINE_ID", + dest, "in_ISSUE_"+toString(i)+"_OOO_ENGINE_ID"); + PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_RD_USE", + dest, "in_ISSUE_"+toString(i)+"_RD_USE"); + PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_RE_USE", + dest, "in_ISSUE_"+toString(i)+"_RE_USE"); + + // out_ISSUE_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL + // in_ISSUE_GPR_STATUS_ACK - gpr_status.out_WRITE_ACK + // out_ISSUE_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA + // out_ISSUE_SPR_STATUS_VAL - spr_status. in_WRITE_VAL + // in_ISSUE_SPR_STATUS_ACK - spr_status.out_WRITE_ACK + // in_ISSUE_SPR_STATUS_DATA- spr_status.out_WRITE_DATA } + }// glue Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_deallocation.cpp (revision 136) @@ -54,10 +54,18 @@ DELETE1_SIGNAL( in_SPR_WRITE_DATA ,_param->_nb_spr_write,_param->_size_special_data); - DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_gpr_address); - DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); - DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_spr_address); + DELETE1_SIGNAL( in_ISSUE_VAL ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL(out_ISSUE_ACK ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL( in_ISSUE_OOO_ENGINE_ID,_param->_nb_inst_issue,_param->_size_ooo_engine_id); + DELETE1_SIGNAL( in_ISSUE_RD_USE ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL( in_ISSUE_RD_NUM_REG ,_param->_nb_inst_issue,_param->_size_gpr_address); + DELETE1_SIGNAL( in_ISSUE_RE_USE ,_param->_nb_inst_issue,1); + DELETE1_SIGNAL( in_ISSUE_RE_NUM_REG ,_param->_nb_inst_issue,_param->_size_spr_address); + +// DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_gpr_address); +// DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); +// DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_spr_address); // delete [] in_RETIRE_ROB_VAL ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h (revision 136) @@ -80,4 +80,5 @@ public : SC_IN (Toperation_t ) ** in_EXECUTE_LOOP_IN_OPERATION ;//[nb_read_unit] public : SC_IN (Ttype_t ) ** in_EXECUTE_LOOP_IN_TYPE ;//[nb_read_unit] + public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_CANCEL ;//[nb_read_unit] public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;//[nb_read_unit] public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ;//[nb_read_unit] @@ -106,4 +107,5 @@ //public : SC_OUT(Toperation_t ) ** out_EXECUTE_LOOP_OUT_OPERATION ;//[nb_write_unit] //public : SC_OUT(Ttype_t ) ** out_EXECUTE_LOOP_OUT_TYPE ;//[nb_write_unit] + public : SC_OUT(Tcontrol_t ) ** out_EXECUTE_LOOP_OUT_CANCEL ;//[nb_write_unit] public : SC_OUT(Tspecial_data_t ) ** out_EXECUTE_LOOP_OUT_FLAGS ;//[nb_write_unit] public : SC_OUT(Texception_t ) ** out_EXECUTE_LOOP_OUT_EXCEPTION ;//[nb_write_unit] @@ -129,11 +131,11 @@ public : SC_IN (Tdcache_error_t ) *** in_DCACHE_RSP_ERROR ;//[nb_load_store_queue][nb_cache_port] - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;//[nb_ooo_engine][nb_inst_insert_rob] - public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;//[nb_ooo_engine][nb_inst_insert_rob] - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;//[nb_ooo_engine][nb_inst_insert_rob] - public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] - public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;//[nb_ooo_engine][nb_inst_insert_rob] - public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;//[nb_ooo_engine][nb_inst_insert_rob] +// public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;//[nb_ooo_engine][nb_inst_insert_rob] +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;//[nb_ooo_engine][nb_inst_insert_rob] +// public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] +// public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;//[nb_ooo_engine][nb_inst_insert_rob] +// public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h (revision 136) @@ -88,6 +88,6 @@ public : uint32_t * _nb_general_register ; //[nb_ooo_engine] public : uint32_t * _nb_special_register ; //[nb_ooo_engine] - public : uint32_t * _nb_inst_insert_rob ; //[nb_ooo_engine] - public : uint32_t * _nb_inst_retire_rob ; //[nb_ooo_engine] +//public : uint32_t * _nb_inst_insert_rob ; //[nb_ooo_engine] +//public : uint32_t * _nb_inst_retire_rob ; //[nb_ooo_engine] // * network public : Tpriority_t _execution_unit_to_write_unit_priority ; @@ -105,4 +105,5 @@ public : bool * _num_thread_valid ; //[nb_thread] + public : uint32_t _nb_thread ; public : uint32_t _nb_execute_unit ; public : uint32_t * _nb_execute_unit_port ; @@ -119,4 +120,5 @@ public : bool _have_port_dcache_context_id ; + public : uint32_t _max_nb_inst_memory ; public : uint32_t _max_nb_general_register; public : uint32_t _max_nb_special_register; @@ -186,6 +188,6 @@ uint32_t * nb_general_register ,//[nb_ooo_engine] uint32_t * nb_special_register ,//[nb_ooo_engine] - uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] - uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] +// uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] +// uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] Tpriority_t execution_unit_to_write_unit_priority , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp (revision 136) @@ -34,5 +34,5 @@ ,_usage (usage) { - log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> Begin"),_name.c_str()); // #if DEBUG_Execute_loop == true @@ -42,5 +42,5 @@ // #endif - log_printf(INFO,Execute_loop,FUNCTION,"Allocation"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Allocation"),_name.c_str()); allocation ( @@ -53,5 +53,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Execute_loop,FUNCTION,"Allocation of statistics"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); statistics_declaration(param_statistics); @@ -63,5 +63,5 @@ { // generate the vhdl - log_printf(INFO,Execute_loop,FUNCTION,"Generate the vhdl"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); vhdl(); @@ -72,5 +72,5 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - log_printf(INFO,Execute_loop,FUNCTION,"Method - transition"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Method - transition"),_name.c_str()); SC_METHOD (transition); @@ -84,5 +84,5 @@ #endif } - log_printf(FUNC,Execute_loop,FUNCTION,"End"); + log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> End"),_name.c_str()); }; @@ -91,10 +91,10 @@ Execute_loop::~Execute_loop (void) { - log_printf(FUNC,Execute_loop,FUNCTION,"Begin"); + log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> Begin"),_name.c_str()); #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) { - log_printf(INFO,Execute_loop,FUNCTION,"Generate Statistics file"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); delete _stat; @@ -102,8 +102,8 @@ #endif - log_printf(INFO,Execute_loop,FUNCTION,"Deallocation"); + log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Deallocation"),_name.c_str()); deallocation (); - log_printf(FUNC,Execute_loop,FUNCTION,"End"); + log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> End"),_name.c_str()); }; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp (revision 136) @@ -65,4 +65,5 @@ ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); @@ -96,4 +97,5 @@ // ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); // ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data); ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception); @@ -133,18 +135,18 @@ } - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - { - ALLOC2_INTERFACE_BEGIN("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - - _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - - ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); - } +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// ALLOC2_INTERFACE_BEGIN("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); + +// _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); +// _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); + +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); +// _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); + +// ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); +// } // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -440,5 +442,19 @@ } - + // -----[ Interface "issue" ]----------------------------------------- + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + dest = _name; + + PORT_MAP(_component ,src , "in_ISSUE_"+toString(i)+"_VAL", + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL"); + PORT_MAP(_component ,src ,"out_ISSUE_"+toString(i)+"_ACK", + dest,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK"); + + //out_ISSUE_READ_UNIT_VAL + // in_ISSUE_READ_UNIT_ACK + //out_ISSUE_REGISTER_UNIT_VAL + // in_ISSUE_REGISTER_UNIT_ACK + } } @@ -466,4 +482,11 @@ // ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { + dest = _name+"_glue"; + + COMPONENT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" , + dest,"out_ISSUE_"+toString(i)+"_READ_UNIT_VAL"); + COMPONENT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" + ,dest, "in_ISSUE_"+toString(i)+"_READ_UNIT_ACK"); + dest = _name; #ifdef POSITION @@ -472,6 +495,4 @@ #endif - PORT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL" ); - PORT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" ,dest ,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK" ); if (_param->_have_port_context_id) PORT_MAP(_component ,src , "in_READ_UNIT_IN_CONTEXT_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CONTEXT_ID" ); @@ -484,4 +505,5 @@ PORT_MAP(_component ,src , "in_READ_UNIT_IN_OPERATION" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OPERATION" ); PORT_MAP(_component ,src , "in_READ_UNIT_IN_TYPE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src , "in_READ_UNIT_IN_CANCEL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CANCEL" ); PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE",dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_READ" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_READ" ); @@ -533,4 +555,6 @@ COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_TYPE" , dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_TYPE" ); + COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_CANCEL" , + dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_STORE_QUEUE_PTR_WRITE", dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); @@ -818,4 +842,6 @@ COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_TYPE" , dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_TYPE" ); + COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_CANCEL" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_CANCEL" ); COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE", dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_STORE_QUEUE_PTR_WRITE"); @@ -876,4 +902,6 @@ // COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_TYPE" , // dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_TYPE" ); + COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_CANCEL" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_CANCEL" ); COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RD" , dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_WRITE_RD" ); @@ -946,4 +974,6 @@ COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_TYPE" , dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_TYPE" ); + COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_CANCEL" , + dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_STORE_QUEUE_PTR_WRITE", dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); @@ -1005,4 +1035,6 @@ // COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_TYPE" , // dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_TYPE" ); + COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_CANCEL" , + dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_WRITE_RD" , dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_WRITE_RD" ); @@ -1115,4 +1147,6 @@ // COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_TYPE" , // dest,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" ); + COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_CANCEL" , + dest,"out_WRITE_UNIT_IN_"+toString(i)+"_CANCEL" ); COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RD" , dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" ); @@ -1163,4 +1197,6 @@ // PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_TYPE" , // dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_TYPE" ); + PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_CANCEL" , + dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_CANCEL" ); PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FLAGS" , dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FLAGS" ); @@ -1279,10 +1315,15 @@ #endif - COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_VAL" ); - COMPONENT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_ACK" ); + COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" , + dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_VAL" ); + COMPONENT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" , + dest, "in_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_ACK" ); if (_param->_have_port_ooo_engine_id) - COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_OOO_ENGINE_ID"); - COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_NUM_REG" ); - COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); + COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID", + dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_OOO_ENGINE_ID"); + COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" , + dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_NUM_REG" ); + COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" , + dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); } @@ -1321,32 +1362,61 @@ COMPONENT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_SPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); } + + // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + for (uint32_t i=0; i<_param->_nb_read_unit; i++) + { + dest = _name+"_glue"; + + COMPONENT_MAP(_component ,src , "in_ISSUE_"+toString(i)+"_VAL", + dest,"out_ISSUE_"+toString(i)+"_REGISTER_UNIT_VAL"); + COMPONENT_MAP(_component ,src ,"out_ISSUE_"+toString(i)+"_ACK", + dest, "in_ISSUE_"+toString(i)+"_REGISTER_UNIT_ACK"); + + dest = _name; +#ifdef POSITION + _component->interface_map (src ,"issue_"+toString(i), + dest,"issue_"+toString(i)); +#endif + + if (_param->_have_port_ooo_engine_id) + PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_OOO_ENGINE_ID", + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_OOO_ENGINE_ID"); + PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RD_USE" , + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RD" ); + PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RE_USE" , + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RE" ); + PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RD_NUM_REG", + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RD"); + PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RE_NUM_REG", + dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RE"); + } - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) - { - uint32_t x=_param->_nb_inst_insert_rob [i]; +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) +// { +// uint32_t x=_param->_nb_inst_insert_rob [i]; - for (uint32_t j=0; jinterface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), - dest,"insert_rob_"+toString(i)+"_"+toString(j)); -#endif - - PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" , - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ); - PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" , - dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ); - PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" , - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ); - PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); - PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" , - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ); - PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG", - dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); - } - } +// for (uint32_t j=0; jinterface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), +// dest,"insert_rob_"+toString(i)+"_"+toString(j)); +// #endif + +// PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" , +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ); +// PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" , +// dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ); +// PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" , +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ); +// PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); +// PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" , +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ); +// PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG", +// dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); +// } +// } // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -1756,5 +1826,5 @@ log_printf(FUNC,Execute_loop,FUNCTION,"End"); - }; + }; }; // end namespace execute_loop Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp (revision 136) @@ -35,4 +35,5 @@ DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_OPERATION ,_param->_nb_read_unit,_param->_size_operation); DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_TYPE ,_param->_nb_read_unit,_param->_size_type); + DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_CANCEL ,_param->_nb_read_unit,1); DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit,_param->_size_store_queue_ptr); DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ,_param->_nb_read_unit,_param->_size_store_queue_ptr); @@ -60,4 +61,5 @@ // DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_OPERATION ,_param->_nb_write_unit,_param->_size_operation); // DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_TYPE ,_param->_nb_write_unit,_param->_size_type); + DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_CANCEL ,_param->_nb_write_unit,1); DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_FLAGS ,_param->_nb_write_unit,_param->_size_special_data); DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_EXCEPTION ,_param->_nb_write_unit,_param->_size_exception); @@ -81,10 +83,10 @@ DELETE2_SIGNAL( in_DCACHE_RSP_ERROR , _param->_nb_load_store_unit, _param->_nb_cache_port[it1],_param->_size_dcache_error ); - DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); - DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); - DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); - DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_general_register); - DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); - DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_special_register); +// DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); +// DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_general_register); +// DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); +// DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_special_register); // DELETE2_SIGNAL( in_RETIRE_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[it1],1 ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp (revision 136) @@ -61,6 +61,6 @@ uint32_t * nb_general_register ,//[nb_ooo_engine] uint32_t * nb_special_register ,//[nb_ooo_engine] - uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] - uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] +// uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] +// uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] Tpriority_t execution_unit_to_write_unit_priority , @@ -122,6 +122,6 @@ _nb_general_register = nb_general_register ; _nb_special_register = nb_special_register ; - _nb_inst_insert_rob = nb_inst_insert_rob ; - _nb_inst_retire_rob = nb_inst_retire_rob ; +// _nb_inst_insert_rob = nb_inst_insert_rob ; +// _nb_inst_retire_rob = nb_inst_retire_rob ; _execution_unit_to_write_unit_priority = execution_unit_to_write_unit_priority; @@ -139,4 +139,10 @@ _nb_execute_unit = _nb_functionnal_unit + _nb_load_store_unit; + + + _nb_thread = get_nb_thread(_nb_context, + _nb_front_end, + _nb_ooo_engine); + _max_nb_inst_memory = max(_nb_inst_memory,_nb_load_store_unit); ALLOC1(_nb_execute_unit_port ,uint32_t,_nb_execute_unit); @@ -194,10 +200,4 @@ _max_size_store_queue = max(size_store_queue,nb_load_store_unit); _max_size_load_queue = max(size_load_queue ,nb_load_store_unit); - - uint32_t _nb_thread = get_nb_thread(_nb_context, - _nb_front_end, - _nb_ooo_engine); - - uint32_t _max_nb_inst_memory = max(_nb_inst_memory,_nb_load_store_unit); ALLOC1(_set_read_unit_source_register_write ,std::set,_nb_read_unit); @@ -297,5 +297,5 @@ // } -// std::cout << "_set_......." << std::endl; +// std::cout << "_set_......." << std::endl; for (uint32_t i=0; i<_nb_read_unit; i++) @@ -308,5 +308,5 @@ for (uint32_t k=0; k<_nb_thread; k++) { -// std::cout << " * Thread[" << k << "]" << std::endl; +// std::cout << " * Thread[" << k << "]" << std::endl; if ( (_execution_unit_to_write_unit_table_thread [j][k]) and (_link_read_unit_with_thread [i][k])) @@ -367,4 +367,5 @@ (_nb_gpr_write , _nb_spr_write , + _nb_read_unit , size_ooo_engine_id , size_general_register , @@ -518,6 +519,8 @@ _nb_general_register , _nb_special_register , - _nb_inst_insert_rob , - _nb_inst_retire_rob ); + _nb_read_unit // , +// _nb_inst_insert_rob , +// _nb_inst_retire_rob + ); _max_size_dcache_context_id = 0; @@ -604,9 +607,4 @@ delete _param_register_unit; - uint32_t _nb_thread = get_nb_thread(_nb_context, - _nb_front_end, - _nb_ooo_engine); - uint32_t _max_nb_inst_memory = max(_nb_inst_memory,_nb_load_store_unit); - DELETE2(_link_read_unit_with_thread ,_nb_read_unit,_nb_thread ); DELETE2(_link_read_unit_with_write_unit ,_nb_read_unit,_nb_write_unit ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp (revision 136) @@ -93,6 +93,6 @@ xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); - xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); - xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); +// xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); +// xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); xml.balise_close(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 136) @@ -72,11 +72,11 @@ public : SC_OUT(Tcontrol_t ) *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] public : SC_IN (Tinstruction_t ) *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] - public : SC_IN (Tcontext_t ) ** in_IFETCH_CONTEXT_ID ;//[nb_context] - public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS ;//[nb_context] -//public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS_NEXT ;//[nb_context] - public : SC_IN (Tinst_ifetch_ptr_t ) ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context] - public : SC_IN (Tbranch_state_t ) ** in_IFETCH_BRANCH_STATE ;//[nb_context] - public : SC_IN (Tprediction_ptr_t ) ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context] - public : SC_IN (Texception_t ) ** in_IFETCH_EXCEPTION ;//[nb_context] + public : SC_IN (Tcontext_t ) *** in_IFETCH_CONTEXT_ID ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS ;//[nb_context][nb_inst_fetch] +//public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS_NEXT ;//[nb_context][nb_inst_fetch] +//public : SC_IN (Tinst_ifetch_ptr_t ) *** in_IFETCH_INST_IFETCH_PTR ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tbranch_state_t ) *** in_IFETCH_BRANCH_STATE ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tprediction_ptr_t ) *** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context][nb_inst_fetch] + public : SC_IN (Texception_t ) *** in_IFETCH_EXCEPTION ;//[nb_context][nb_inst_fetch] // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_OUT(Tcontrol_t ) ** out_DECOD_VAL ;//[nb_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp (revision 136) @@ -94,20 +94,23 @@ { for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++) - sensitive << (*(in_IFETCH_VAL [i][j])) - << (*(in_IFETCH_INSTRUCTION [i][j])); - sensitive << (*(in_IFETCH_ADDRESS [i])) -// << (*(in_IFETCH_ADDRESS_NEXT [i])) - << (*(in_IFETCH_BRANCH_STATE [i])) - << (*(in_IFETCH_EXCEPTION [i])) - << (*(in_CONTEXT_DECOD_ENABLE [i])); - if (_param->_have_port_context_id) - sensitive << (*(in_IFETCH_CONTEXT_ID [i])); - if (_param->_have_port_depth) - sensitive << (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i])); - sensitive << (*(in_CONTEXT_DEPTH_VAL [i])); + { + sensitive << (*(in_IFETCH_VAL [i][j])) + << (*(in_IFETCH_INSTRUCTION [i][j])) + << (*(in_IFETCH_ADDRESS [i][j])) +// << (*(in_IFETCH_ADDRESS_NEXT [i][j])) + << (*(in_IFETCH_BRANCH_STATE [i][j])) + << (*(in_IFETCH_EXCEPTION [i][j])); + + if (_param->_have_port_context_id) + sensitive << (*(in_IFETCH_CONTEXT_ID [i][j])); + if (_param->_have_port_depth) + sensitive << (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i][j])); +// if (_param->_have_port_inst_ifetch_ptr) +// sensitive << (*(in_IFETCH_INST_IFETCH_PTR [i][j])); + } + sensitive << (*(in_CONTEXT_DECOD_ENABLE [i])) + << (*(in_CONTEXT_DEPTH_VAL [i])); if (_param->_have_port_depth) sensitive << (*(in_CONTEXT_DEPTH [i])); - if (_param->_have_port_inst_ifetch_ptr) - sensitive << (*(in_IFETCH_INST_IFETCH_PTR [i])); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 136) @@ -61,23 +61,16 @@ - _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); - _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); - _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); +// _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); +// _ALLOC2_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ,_param->_nb_context, _param->_nb_inst_fetch[it1]); ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]); - } - { - ALLOC1_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context); - - - ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); - ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address ); -// ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address ); - ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ); - ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); - ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ); - ALLOC1_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); - - ALLOC1_INTERFACE_END(_param->_nb_context); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 136) @@ -29,15 +29,14 @@ delete in_NRESET; - DELETE2_SIGNAL( in_IFETCH_VAL , _param->_nb_context, _param->_nb_inst_fetch[it1],1); - DELETE2_SIGNAL(out_IFETCH_ACK , _param->_nb_context, _param->_nb_inst_fetch[it1],1); - DELETE2_SIGNAL( in_IFETCH_INSTRUCTION, _param->_nb_context, _param->_nb_inst_fetch[it1],_param->_size_instruction); - - DELETE1_SIGNAL(in_IFETCH_CONTEXT_ID , _param->_nb_context,_param->_size_context_id ); - DELETE1_SIGNAL(in_IFETCH_ADDRESS , _param->_nb_context,_param->_size_instruction_address ); -// DELETE1_SIGNAL(in_IFETCH_ADDRESS_NEXT , _param->_nb_context,_param->_size_instruction_address ); - DELETE1_SIGNAL(in_IFETCH_INST_IFETCH_PTR , _param->_nb_context,_param->_size_inst_ifetch_ptr ); - DELETE1_SIGNAL(in_IFETCH_BRANCH_STATE , _param->_nb_context,_param->_size_branch_state ); - DELETE1_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID, _param->_nb_context,_param->_size_depth ); - DELETE1_SIGNAL(in_IFETCH_EXCEPTION , _param->_nb_context,_param->_size_exception_ifetch); + DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); + DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); + DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction); + DELETE2_SIGNAL( in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_context_id ); + DELETE2_SIGNAL( in_IFETCH_ADDRESS ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address ); +// DELETE2_SIGNAL( in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address ); +// DELETE2_SIGNAL( in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_inst_ifetch_ptr ); + DELETE2_SIGNAL( in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_branch_state ); + DELETE2_SIGNAL( in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_depth ); + DELETE2_SIGNAL( in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_exception_ifetch); DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 136) @@ -99,5 +99,5 @@ ifetch_ack [x][y] = PORT_READ(in_DECOD_ACK [i]); // fetch_val and decod_enable and decod_ack - Tgeneral_data_t addr = PORT_READ(in_IFETCH_ADDRESS [x])+y; + Tgeneral_data_t addr = PORT_READ(in_IFETCH_ADDRESS [x][y]); _decod_instruction->_instruction = PORT_READ(in_IFETCH_INSTRUCTION [x][y]); @@ -132,5 +132,5 @@ // Test IFetch exception - Texception_t ifetch_exception = PORT_READ(in_IFETCH_EXCEPTION [x]); + Texception_t ifetch_exception = PORT_READ(in_IFETCH_EXCEPTION [x][y]); if (ifetch_exception == EXCEPTION_IFETCH_NONE) @@ -232,10 +232,13 @@ } + Tbranch_state_t ifetch_branch_state = PORT_READ(in_IFETCH_BRANCH_STATE [x][y]); if (_param->_have_port_context_id) PORT_WRITE(out_PREDICT_CONTEXT_ID [i],x); - PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); - PORT_WRITE(out_PREDICT_BRANCH_STATE [i],PORT_READ(in_IFETCH_BRANCH_STATE [x])); +// PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); + PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],ifetch_branch_state != BRANCH_STATE_NONE); + + PORT_WRITE(out_PREDICT_BRANCH_STATE [i],ifetch_branch_state); if (_param->_have_port_depth) - PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x])); + PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x][y])); PORT_WRITE(out_PREDICT_BRANCH_CONDITION [i],_decod_instruction->_branch_condition ); // PORT_WRITE(out_PREDICT_BRANCH_STACK_WRITE [i],_decod_instruction->_branch_stack_write); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 136) @@ -56,7 +56,7 @@ private : counter_t * _stat_use_queue; - private : counter_t * _stat_sum_inst_enable; - private : counter_t * _stat_sum_transaction_decod_in; - private : counter_t * _stat_average_occupation_bundle; + private : counter_t * _stat_decode_in_empty ; + private : counter_t * _stat_decode_in_full ; + private : counter_t * _stat_decode_in_average; #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 136) @@ -51,21 +51,20 @@ { #ifdef STATISTICS - bool find = false; -#endif + uint32_t nb_decod_in = 0; +#endif + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) { log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); - + +#ifdef STATISTICS + nb_decod_in ++; +#endif + // Create entry decod_queue_entry_t * entry = new decod_queue_entry_t (1); reg_QUEUE[reg_NUM_BANK_TAIL].push_back(entry); -#ifdef STATISTICS - find = true; - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_sum_inst_enable) ++; -#endif - Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; @@ -107,7 +106,18 @@ #ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - if (find) - (*_stat_sum_transaction_decod_in) ++; + if (usage_is_set(_usage,USE_STATISTICS)) + { + if (nb_decod_in > 0) + { + if (nb_decod_in == _param->_nb_inst_decod) + (*_stat_decode_in_full) ++; + else + (*_stat_decode_in_average) += nb_decod_in; + } + else + { + (*_stat_decode_in_empty) ++; + } + } #endif } @@ -208,7 +218,7 @@ { for (uint32_t i=0; i<_param->_nb_bank; ++i) - *(_stat_use_queue) += reg_QUEUE[i].size(); + (*_stat_use_queue) += reg_QUEUE[i].size(); for (uint32_t i=0; i<_param->_nb_context; i++) - *(_stat_nb_inst [i]) += reg_NB_INST [i]; + (*_stat_nb_inst [i]) += reg_NB_INST [i]; } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 136) @@ -46,5 +46,11 @@ //-----[ DECOD_IN ]--------------------------------------------------- //-------------------------------------------------------------------- + { decod_queue_entry_t * entry = NULL; + +#ifdef STATISTICS + uint32_t nb_decod_in = 0; +#endif + for (uint32_t i=0; i<_param->_nb_inst_decod; i++) { @@ -58,14 +64,8 @@ entry = new decod_queue_entry_t (_param->_nb_inst_decod); reg_QUEUE->push_back(entry); - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_sum_transaction_decod_in) ++; -#endif } #ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_sum_inst_enable) ++; + nb_decod_in ++; #endif @@ -106,4 +106,22 @@ } } + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + { + if (nb_decod_in > 0) + { + if (nb_decod_in == _param->_nb_inst_decod) + (*_stat_decode_in_full) ++; + else + (*_stat_decode_in_average) += nb_decod_in; + } + else + { + (*_stat_decode_in_empty) ++; + } + } +#endif + } //-------------------------------------------------------------------- @@ -217,7 +235,7 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - *(_stat_use_queue) += reg_QUEUE->size(); + (*_stat_use_queue) += reg_QUEUE->size(); for (uint32_t i=0; i<_param->_nb_context; i++) - *(_stat_nb_inst [i]) += reg_NB_INST [i]; + (*_stat_nb_inst [i]) += reg_NB_INST [i]; } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_statistics_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_statistics_allocation.cpp (revision 136) @@ -17,5 +17,4 @@ namespace decod_queue { - #undef FUNCTION #define FUNCTION "Decod_queue::statistics_allocation" @@ -29,10 +28,10 @@ param_statistics); - _stat_sum_transaction_decod_in = _stat->create_variable("sum_transaction_decod_in"); - _stat_sum_inst_enable = _stat->create_variable("sum_inst_enable"); - _stat_average_occupation_bundle= _stat->create_counter ("average_occupation_bundle", "", "Occupation average of instruction's bundle."); + _stat_decode_in_empty = _stat->create_counter ("decode_in_empty" , "", "Number cycle with no input instruction."); + _stat_decode_in_full = _stat->create_counter ("decode_in_full" , "", toString("Number cycle with full input instruction (%d).",_param->_nb_inst_decod)); + _stat_decode_in_average = _stat->create_counter ("decode_in_average", "", "Average decod instruction."); - _stat->create_expr ("average_occupation_bundle" ,"/ sum_inst_enable sum_transaction_decod_in"); - _stat->create_expr_percent ("percent_occupation_bundle" ,"average_occupation_bundle", toString(_param->_nb_inst_decod),"Percent of instruction's bundle occupation."); + _stat->create_expr_average_by_cycle("average_decod_in", toString("+ * decode_in_full %d decode_in_average",_param->_nb_inst_decod), "", "Average instruction from decode unit"); + _stat->create_expr_percent ("percent_decod_in" ,"average_decod_in", toString(_param->_nb_inst_decod),"Percent of instruction's bundle occupation."); _stat_use_queue = _stat->create_variable ("use_queue"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 136) @@ -70,11 +70,11 @@ public : SC_OUT(Tcontrol_t ) *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] public : SC_IN (Tinstruction_t ) *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] - public : SC_IN (Tcontext_t ) ** in_IFETCH_CONTEXT_ID ;//[nb_context] - public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS ;//[nb_context] -//public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS_NEXT ;//[nb_context] - public : SC_IN (Tinst_ifetch_ptr_t ) ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context] - public : SC_IN (Tbranch_state_t ) ** in_IFETCH_BRANCH_STATE ;//[nb_context] - public : SC_IN (Tprediction_ptr_t ) ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context] - public : SC_IN (Texception_t ) ** in_IFETCH_EXCEPTION ;//[nb_context] + public : SC_IN (Tcontext_t ) *** in_IFETCH_CONTEXT_ID ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS ;//[nb_context][nb_inst_fetch] +//public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS_NEXT ;//[nb_context][nb_inst_fetch] +//public : SC_IN (Tinst_ifetch_ptr_t ) *** in_IFETCH_INST_IFETCH_PTR ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tbranch_state_t ) *** in_IFETCH_BRANCH_STATE ;//[nb_context][nb_inst_fetch] + public : SC_IN (Tprediction_ptr_t ) *** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context][nb_inst_fetch] + public : SC_IN (Texception_t ) *** in_IFETCH_EXCEPTION ;//[nb_context][nb_inst_fetch] // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 136) @@ -15,6 +15,4 @@ namespace front_end { namespace decod_unit { - - #undef FUNCTION @@ -60,22 +58,16 @@ ALLOC2_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context, _param->_nb_inst_fetch[it1]); - _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); - _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); - _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); +// _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); +// _ALLOC2_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ,_param->_nb_context, _param->_nb_inst_fetch[it1]); + _ALLOC2_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ,_param->_nb_context, _param->_nb_inst_fetch[it1]); ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]); - } - { - ALLOC1_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context); - - ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); - ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address ); -// ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address ); - ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ); - ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); - ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ); - ALLOC1_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); - - ALLOC1_INTERFACE_END(_param->_nb_context); } @@ -261,28 +253,23 @@ PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION", dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION"); + if (_param->_have_port_context_id) + PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" , + dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ); + PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" , + dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" ); +// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" , +// dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ); +// if (_param->_have_port_inst_ifetch_ptr) +// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" , +// dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" ); + PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" , + dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" ); + if (_param->_have_port_depth) + PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID", + dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID"); + PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" , + dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ); } - -#ifdef POSITION - _component->interface_map (src ,"ifetch_"+toString(i), - dest,"ifetch_"+toString(i)); -#endif - - if (_param->_have_port_context_id) - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_CONTEXT_ID" , - dest, "in_IFETCH_"+toString(i)+"_CONTEXT_ID" ); - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS" , - dest, "in_IFETCH_"+toString(i)+"_ADDRESS" ); -// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" , -// dest, "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" ); - if (_param->_have_port_inst_ifetch_ptr) - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" , - dest, "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" ); - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_STATE" , - dest, "in_IFETCH_"+toString(i)+"_BRANCH_STATE" ); - if (_param->_have_port_depth) - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID", - dest, "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID"); - PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_EXCEPTION" , - dest, "in_IFETCH_"+toString(i)+"_EXCEPTION" ); + } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 136) @@ -28,15 +28,14 @@ delete in_NRESET; - DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1],1); - DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1],1); - DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1],_param->_size_instruction); - - DELETE1_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_size_context_id ); - DELETE1_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context,_param->_size_instruction_address); -// DELETE1_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_size_instruction_address); - DELETE1_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_size_inst_ifetch_ptr ); - DELETE1_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_size_branch_state ); - DELETE1_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context,_param->_size_depth ); - DELETE1_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_size_exception_ifetch); + DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); + DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); + DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction); + DELETE2_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_context_id ); + DELETE2_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address); +// DELETE2_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address); +// DELETE2_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_inst_ifetch_ptr ); + DELETE2_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_branch_state ); + DELETE2_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_depth ); + DELETE2_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_exception_ifetch ); DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp (revision 136) @@ -70,20 +70,25 @@ log_printf(TRACE,Address_management,FUNCTION," * PREDICT"); - bool branch_is_current = reg_PC_NEXT_IS_DS_TAKE; + bool branch_is_current = reg_PC_NEXT_IS_DS_TAKE; + Tbranch_state_t branch_state = PORT_READ(in_PREDICT_BRANCH_STATE ); + Tprediction_ptr_t branch_update_prediction_id = (_param->_have_port_depth )?PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID):0; + Tinst_ifetch_ptr_t inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_PREDICT_INST_IFETCH_PTR ):0; + + log_printf(TRACE,Address_management,FUNCTION," * branch_is_current : %d",branch_is_current ); + log_printf(TRACE,Address_management,FUNCTION," * branch_state : %d",branch_state ); + log_printf(TRACE,Address_management,FUNCTION," * branch_update_prediction_id : %d",branch_update_prediction_id); + log_printf(TRACE,Address_management,FUNCTION," * inst_ifetch_ptr : %d",inst_ifetch_ptr ); + if (branch_is_current) { - if (_param->_have_port_inst_ifetch_ptr) - reg_PC_CURRENT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); - reg_PC_CURRENT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); - if (_param->_have_port_depth) - reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + reg_PC_CURRENT_INST_IFETCH_PTR = inst_ifetch_ptr ; + reg_PC_CURRENT_BRANCH_STATE = branch_state ; + reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = branch_update_prediction_id; } else { - if (_param->_have_port_inst_ifetch_ptr) - reg_PC_NEXT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); - reg_PC_NEXT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); - if (_param->_have_port_depth) - reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); + reg_PC_NEXT_INST_IFETCH_PTR = inst_ifetch_ptr ; + reg_PC_NEXT_BRANCH_STATE = branch_state ; + reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = branch_update_prediction_id; } @@ -161,5 +166,4 @@ } -// if (not reg_PC_NEXT_VAL and reg_PC_NEXT_NEXT_VAL) if (reg_PC_NEXT_NEXT_VAL and not reg_PC_NEXT_VAL) { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h (revision 136) @@ -84,9 +84,13 @@ public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] - public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; - public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; - public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; - public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; - public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; + public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_ADDRESS ; + public : SC_OUT(Tbranch_state_t ) ** out_DECOD_BRANCH_STATE ; + public : SC_OUT(Tprediction_ptr_t ) ** out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + public : SC_OUT(Texception_t ) ** out_DECOD_EXCEPTION ; +//public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; +//public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; +//public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; +//public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; +//public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -110,7 +114,15 @@ // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ private : Tcontrol_t internal_ADDRESS_ACK ; - private : Tcontrol_t * internal_DECOD_VAL ; + private : Tcontrol_t * internal_DECOD_VAL ;//[nb_instruction] + private : uint32_t * internal_DECOD_PTR ;//[nb_instruction] Only queue_scheme == full_assoc + private : uint32_t * internal_DECOD_SLOT ;//[nb_instruction] Only queue_scheme == full_assoc private : Tcontrol_t internal_ICACHE_RSP_ACK ; private : Tcontrol_t internal_EVENT_RESET_ACK; + + + + // function pointer + public : void (morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::*function_transition ) (void); + public : void (morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::*function_genMoore ) (void); #endif @@ -146,6 +158,13 @@ #ifdef SYSTEMC public : void constant (void); - public : void transition (void); - public : void genMoore (void); + + public : void transition (void); + public : void genMoore (void); + + public : void function_no_assoc_transition (void); + public : void function_no_assoc_genMoore (void); + + public : void function_full_assoc_transition (void); + public : void function_full_assoc_genMoore (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h (revision 136) @@ -11,4 +11,5 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Parameters.h" +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h" namespace morpheo { @@ -24,23 +25,25 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _size_queue ; - public : uint32_t _nb_instruction ; -//public : uint32_t _size_branch_update_prediction ; -//public : uint32_t _size_general_data ; - public : uint32_t _nb_instruction_in_queue ; - -//public : uint32_t _size_queue_ptr ; -//public : uint32_t _size_instruction_ptr ; - -//public : bool _have_port_queue_ptr ; -//public : bool _have_port_instruction_ptr ; -//public : bool _have_port_branch_update_prediction_id; + public : uint32_t _size_queue ; + public : Tifetch_queue_scheme_t _queue_scheme ; + public : uint32_t _nb_instruction ; +//public : uint32_t _size_branch_update_prediction ; +//public : uint32_t _size_general_data ; + public : uint32_t _nb_instruction_in_queue ; + +//public : uint32_t _size_queue_ptr ; +//public : uint32_t _size_instruction_ptr ; + +//public : bool _have_port_queue_ptr ; +//public : bool _have_port_instruction_ptr ; +//public : bool _have_port_branch_update_prediction_id; //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t size_queue , - uint32_t nb_instruction , - uint32_t size_branch_update_prediction, - uint32_t size_general_data , - bool is_toplevel=false); + public : Parameters (uint32_t size_queue , + Tifetch_queue_scheme_t queue_scheme , + uint32_t nb_instruction , + uint32_t size_branch_update_prediction, + uint32_t size_general_data , + bool is_toplevel=false); // public : Parameters (Parameters & param) ; public : ~Parameters () ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h (revision 136) @@ -18,4 +18,10 @@ namespace ifetch_unit { namespace ifetch_queue { + + typedef enum + { + IFETCH_QUEUE_SCHEME_NO_ASSOC // Read only head + ,IFETCH_QUEUE_SCHEME_FULL_ASSOC // Scan all slot + } Tifetch_queue_scheme_t; typedef enum @@ -60,4 +66,26 @@ }; // end namespace core }; // end namespace behavioural + + template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t& x) + { + switch (x) + { + case morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC : return "no_assoc" ; break; + case morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC : return "full_assoc"; break; + default : return ""; break; + } + }; + + template<> inline morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t fromString(const std::string& x) + { + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC ))) == 0) or + (x.compare("no_assoc") == 0)) + return morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC; + if ( (x.compare(toString(static_cast(morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC))) == 0) or + (x.compare("full_assoc") == 0)) + return morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC; + + throw (ErrorMorpheo (" : Unknow string : \""+x+"\"")); + }; template<> inline std::string toString(const morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::ifetch_queue_state_t& x) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp (revision 136) @@ -74,4 +74,27 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + // Function pointer + switch (_param->_queue_scheme) + { + case IFETCH_QUEUE_SCHEME_NO_ASSOC : + { + function_transition = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_no_assoc_transition ; + function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_no_assoc_genMoore ; + + break; + } + case IFETCH_QUEUE_SCHEME_FULL_ASSOC : + { + function_transition = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_full_assoc_transition ; + function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_full_assoc_genMoore ; + + break; + } + default : + { + break; + } + } + log_printf(INFO,Ifetch_queue,FUNCTION,_("<%s> Method - constant"),_name.c_str()); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp (revision 136) @@ -84,19 +84,23 @@ ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); - ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION,"instruction",Tinstruction_t,_param->_size_instruction); + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); + ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); + ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); + ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); ALLOC1_INTERFACE_END(_param->_nb_instruction); } - { - ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage.")); +// { +// ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage.")); - ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address ); - ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr ); - ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); - ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ); - ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); +// ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address ); +// ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr ); +// ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); +// ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ); +// ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); - ALLOC0_INTERFACE_END(); - } +// ALLOC0_INTERFACE_END(); +// } // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -132,6 +136,11 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - ALLOC1(internal_DECOD_VAL,Tcontrol_t,_param->_nb_instruction); - + ALLOC1(internal_DECOD_VAL ,Tcontrol_t,_param->_nb_instruction); + if (_param->_queue_scheme == IFETCH_QUEUE_SCHEME_FULL_ASSOC) + { + ALLOC1(internal_DECOD_PTR ,uint32_t ,_param->_nb_instruction); + ALLOC1(internal_DECOD_SLOT,uint32_t ,_param->_nb_instruction); + } + _queue = new ifetch_queue_entry_t * [_param->_size_queue]; for (uint32_t i=0;i<_param->_size_queue; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp (revision 136) @@ -41,9 +41,13 @@ DELETE1_SIGNAL( in_DECOD_ACK ,_param->_nb_instruction,1); DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_instruction,_param->_size_instruction); - DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address); - DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr ); - DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state ); - DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth ); - DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); + DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_instruction,_param->_size_instruction_address); + DELETE1_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_nb_instruction,_param->_size_branch_state); + DELETE1_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_instruction,_param->_size_depth); + DELETE1_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_instruction,_param->_size_exception_ifetch); +// DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address); +// DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr ); +// DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state ); +// DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth ); +// DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); DELETE0_SIGNAL( in_ICACHE_RSP_VAL ,1); @@ -60,5 +64,10 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { - DELETE1(internal_DECOD_VAL,_param->_nb_instruction); + DELETE1(internal_DECOD_VAL ,_param->_nb_instruction); + if (_param->_queue_scheme == IFETCH_QUEUE_SCHEME_FULL_ASSOC) + { + DELETE1(internal_DECOD_PTR ,_param->_nb_instruction); + DELETE1(internal_DECOD_SLOT,_param->_nb_instruction); + } for (uint32_t i=0;i<_param->_size_queue; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_genMoore.cpp (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_genMoore.cpp (revision 136) @@ -0,0 +1,132 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::function_full_assoc_genMoore" + void Ifetch_queue::function_full_assoc_genMoore (void) + { + log_begin(Ifetch_queue,FUNCTION); + log_function(Ifetch_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET)) + { + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + { + internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); + + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS_ACK : %d",internal_ADDRESS_ACK); + + if (_param->_have_port_ifetch_queue_ptr) + PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); + } + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + { + bool stop = false; + uint32_t inst = 0; + + // init + for (uint32_t i=0; i<_param->_nb_instruction; ++i) + internal_DECOD_VAL [i] = 0; + + for (uint32_t i=0; i<_param->_size_queue; ++i) + { + uint32_t ptr = (reg_PTR_READ+i)%_param->_size_queue; + + // Test if have an respons + if (_queue[ptr]->_state == IFETCH_QUEUE_STATE_HAVE_RSP) + { + for (uint32_t j=0; j<_param->_nb_instruction; j++) + { + // test if instruction is enable + if (_queue[ptr]->_instruction_enable [j]) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD_VAL [%d] : ifetch_queue[%d][%d]",inst,ptr,j); + + // Find an valid instruction + internal_DECOD_VAL [inst] = true; + internal_DECOD_PTR [inst] = ptr; + internal_DECOD_SLOT[inst] = j; + + // Get info + Tgeneral_address_t address = _queue[ptr]->_address; + Tinst_ifetch_ptr_t inst_ifetch_ptr = _queue[ptr]->_inst_ifetch_ptr; + Tbranch_state_t branch_state = _queue[ptr]->_branch_state; + Tprediction_ptr_t branch_update_prediction_id = _queue[ptr]->_branch_update_prediction_id; + Texception_t exception = _queue[ptr]->_exception; + + PORT_WRITE(out_DECOD_INSTRUCTION [inst],_queue[ptr]->_instruction [j]); + PORT_WRITE(out_DECOD_ADDRESS [inst],address+j); + + // Warning : ONE BRANCH PER SLOT + if (inst_ifetch_ptr == j) + PORT_WRITE(out_DECOD_BRANCH_STATE [inst],branch_state); + else + PORT_WRITE(out_DECOD_BRANCH_STATE [inst],BRANCH_STATE_NONE); + if (_param->_have_port_depth) + PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID[inst],branch_update_prediction_id); + PORT_WRITE(out_DECOD_EXCEPTION [inst],exception); // all is same + + inst ++; + + // Test if have all slot + if (inst >= _param->_nb_instruction) + stop = true; + } + if (stop) + break; + } + } + else + stop = true; // slot have not respons -> exit the loop + + // if not find an valid instruction, break the loop + if (stop) + break; + } + } + } + else + { + // Reset + internal_ADDRESS_ACK = 0; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + internal_DECOD_VAL [i] = 0; + + } + + // Write Output + PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); + + log_end(Ifetch_queue,FUNCTION); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp (revision 136) @@ -0,0 +1,239 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::function_full_assoc_transition" + void Ifetch_queue::function_full_assoc_transition (void) + { + log_begin(Ifetch_queue,FUNCTION); + log_function(Ifetch_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + reg_PTR_READ = 0; + reg_PTR_WRITE = 0; + + for (uint32_t i=0; i<_param->_size_queue; i++) + { + _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; + _queue [i]->_address = 0; // not necessary + _queue [i]->_inst_ifetch_ptr = 0; // not necessary + _queue [i]->_branch_state = 0; // not necessary + _queue [i]->_branch_update_prediction_id = 0; // not necessary + _queue [i]->_exception = 0; // not necessary + + for (uint32_t j=0; j<_param->_nb_instruction; j++) + { + _queue [i]->_instruction [j] = 0; // not necessary + _queue [i]->_instruction_enable [j] = 0; // not necessary + } + } + } + else + { + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : Transaction"); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS)); + + // New slot in ifetch_queue is allocated + + _queue[reg_PTR_WRITE]->_state = IFETCH_QUEUE_STATE_WAIT_RSP; + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_sum_transaction_address) ++; +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]); +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_sum_inst_enable) += enable; +#endif + _queue[reg_PTR_WRITE]->_instruction_enable [i] = enable; + } + + _queue[reg_PTR_WRITE]->_address = PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS); + _queue[reg_PTR_WRITE]->_inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_ADDRESS_INST_IFETCH_PTR ):0; + _queue[reg_PTR_WRITE]->_branch_state = PORT_READ(in_ADDRESS_BRANCH_STATE); + _queue[reg_PTR_WRITE]->_branch_update_prediction_id = (_param->_have_port_depth)?PORT_READ(in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID):0; + + reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue; + } + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + bool have_instruction_decod = false; + bool have_instruction_enable = false; + uint32_t last_ptr = reg_PTR_READ; + + for (uint32_t i=0; i<_param->_nb_instruction; ++i) + { + if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD [%d] : Transaction",i); + + uint32_t ptr = internal_DECOD_PTR [i]; + uint32_t slot = internal_DECOD_SLOT[i]; + + have_instruction_decod = true; + last_ptr = ptr; + + _queue[ptr]->_instruction_enable [slot] = false; + } + have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; + } + + // Test if all is decoded + if (have_instruction_decod) + { + // Invalid all ptr + while (reg_PTR_READ != last_ptr) + { +#ifdef DEBUG_TEST + bool have_instruction_enable = false; + for (uint32_t i=0; i<_param->_nb_instruction; ++i) + have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; + + if (have_instruction_enable) + throw ERRORMORPHEO(FUNCTION,toString("Can't free : Ifetch_queue[%d] content an valid instruction.\n",reg_PTR_READ)); +#endif + + _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; + reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; + } + + // For last ptr, test if all instruction is disable + bool have_instruction_enable = false; + for (uint32_t i=0; i<_param->_nb_instruction; ++i) + have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; + + if (not have_instruction_enable) + { + _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; + reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; + } + } + + // ========================================================== + // =====[ ICACHE_RSP ]======================================= + // ========================================================== + if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * ICACHE_RSP : Transaction"); + + Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + _queue[ptr]->_instruction [i] = PORT_READ(in_ICACHE_RSP_INSTRUCTION [i]); + + switch (PORT_READ(in_ICACHE_RSP_ERROR)) + { + case ICACHE_ERROR_NONE : _queue[ptr]->_exception = EXCEPTION_IFETCH_NONE ; break; + case ICACHE_ERROR_BUS_ERROR : _queue[ptr]->_exception = EXCEPTION_IFETCH_BUS_ERROR; break; + default : throw ERRORMORPHEO(FUNCTION,"icache_rsp_error : unknow value."); + } + + switch (_queue[ptr]->_state) + { + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_HAVE_RSP; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + default : throw ERRORMORPHEO(FUNCTION,"icache_rsp : invalid ifetch_queue state."); + } + } + + // ========================================================== + // =====[ EVENT_RESET ]====================================== + // ========================================================== + if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * EVENT_RESET : Transaction"); + + // Scan all entry of queue and test the status + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[i]->_state = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP; break; + default : _queue[i]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + } + + // all entry is empty (or wait respons to flush) + // reset ptr + // 1) reg_PTR_READ = reg_PTR_WRITE = = 0 + // 2) reg_PTR_READ = reg_PTR_WRITE + // In method 1), the probalitie than the entry pointed by reg_PTR_WRITE is a slot with state "error_wait_rsp" is more importate that the method 2) + reg_PTR_READ = reg_PTR_WRITE; + } + +#if defined(DEBUG) and (DEBUG >= DEBUG_TRACE) + log_printf(TRACE,Ifetch_queue,FUNCTION," * Dump ifetch_queue"); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_READ : %d",reg_PTR_READ ); + for (uint32_t i=0; i<_param->_size_queue; i++) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s", + i, + _queue [i]->_address, + _queue [i]->_address<<2, + _queue [i]->_inst_ifetch_ptr, + _queue [i]->_branch_state, + _queue [i]->_branch_update_prediction_id, + _queue [i]->_exception, + toString(_queue [i]->_state).c_str() + ); + + for (uint32_t j=0; j<_param->_nb_instruction; j++) + log_printf(TRACE,Ifetch_queue,FUNCTION," * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]); + } +#endif + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_EMPTY : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : (*_sum_use_queue_wait_rsp ) ++; break; + case IFETCH_QUEUE_STATE_HAVE_RSP : (*_sum_use_queue_have_rsp ) ++; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : (*_sum_use_queue_error_wait_rsp) ++; break; + default : break; + } +#endif + } + + log_end(Ifetch_queue,FUNCTION); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_genMoore.cpp (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_genMoore.cpp (revision 136) @@ -0,0 +1,99 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::function_no_assoc_genMoore" + void Ifetch_queue::function_no_assoc_genMoore (void) + { + log_begin(Ifetch_queue,FUNCTION); + log_function(Ifetch_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET)) + { + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + { + internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); + + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS_ACK : %d",internal_ADDRESS_ACK); + + if (_param->_have_port_ifetch_queue_ptr) + PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); + } + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + { + bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); + + Tgeneral_address_t address = _queue[reg_PTR_READ]->_address; + Tinst_ifetch_ptr_t inst_ifetch_ptr = _queue[reg_PTR_READ]->_inst_ifetch_ptr; + Tbranch_state_t branch_state = _queue[reg_PTR_READ]->_branch_state; + Tprediction_ptr_t branch_update_prediction_id = _queue[reg_PTR_READ]->_branch_update_prediction_id; + Texception_t exception = _queue[reg_PTR_READ]->_exception; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; + + log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD_VAL [%d] : %d",i,internal_DECOD_VAL [i]); + + PORT_WRITE(out_DECOD_INSTRUCTION [i],_queue[reg_PTR_READ]->_instruction [i]); + PORT_WRITE(out_DECOD_ADDRESS [i],address+i); + if (inst_ifetch_ptr == i) + { + PORT_WRITE(out_DECOD_BRANCH_STATE [i],branch_state); + } + else + { + PORT_WRITE(out_DECOD_BRANCH_STATE [i], BRANCH_STATE_NONE); + } + if (_param->_have_port_depth) + PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID[i],branch_update_prediction_id); + PORT_WRITE(out_DECOD_EXCEPTION [i],exception); // all is same + } + + } + } + else + { + // Reset + internal_ADDRESS_ACK = 0; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + internal_DECOD_VAL [i] = 0; + + } + + // Write Output + PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); + for (uint32_t i=0; i<_param->_nb_instruction; i++) + PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); + + log_end(Ifetch_queue,FUNCTION); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp (revision 136) @@ -0,0 +1,209 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_front_end { +namespace front_end { +namespace ifetch_unit { +namespace ifetch_queue { + + +#undef FUNCTION +#define FUNCTION "Ifetch_queue::function_no_assoc_transition" + void Ifetch_queue::function_no_assoc_transition (void) + { + log_begin(Ifetch_queue,FUNCTION); + log_function(Ifetch_queue,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + reg_PTR_READ = 0; + reg_PTR_WRITE = 0; + + for (uint32_t i=0; i<_param->_size_queue; i++) + { + _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; + _queue [i]->_address = 0; // not necessary + _queue [i]->_inst_ifetch_ptr = 0; // not necessary + _queue [i]->_branch_state = 0; // not necessary + _queue [i]->_branch_update_prediction_id = 0; // not necessary + _queue [i]->_exception = 0; // not necessary + + for (uint32_t j=0; j<_param->_nb_instruction; j++) + { + _queue [i]->_instruction [j] = 0; // not necessary + _queue [i]->_instruction_enable [j] = 0; // not necessary + } + } + } + else + { + // ========================================================== + // =====[ ADDRESS ]========================================== + // ========================================================== + if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : Transaction"); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); + log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS)); + + // New slot in ifetch_queue is allocated + + _queue[reg_PTR_WRITE]->_state = IFETCH_QUEUE_STATE_WAIT_RSP; + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_sum_transaction_address) ++; +#endif + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]); +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + (*_sum_inst_enable) += enable; +#endif + _queue[reg_PTR_WRITE]->_instruction_enable [i] = enable; + } + + _queue[reg_PTR_WRITE]->_address = PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS); + _queue[reg_PTR_WRITE]->_inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_ADDRESS_INST_IFETCH_PTR ):0; + _queue[reg_PTR_WRITE]->_branch_state = PORT_READ(in_ADDRESS_BRANCH_STATE); + _queue[reg_PTR_WRITE]->_branch_update_prediction_id = (_param->_have_port_depth)?PORT_READ(in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID):0; + + reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue; + } + + // ========================================================== + // =====[ DECOD ]============================================ + // ========================================================== + bool have_instruction_decod = false; + bool have_instruction_enable = false; + for (uint32_t i=0; i<_param->_nb_instruction; i++) + { + if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD [%d] : Transaction",i); + + have_instruction_decod = true; + _queue[reg_PTR_READ]->_instruction_enable [i] = false; + } + have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; + } + + // Test if all is decoded + if (have_instruction_decod and not have_instruction_enable) + { + // all is decod + _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; + reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; + } + + // ========================================================== + // =====[ ICACHE_RSP ]======================================= + // ========================================================== + if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * ICACHE_RSP : Transaction"); + + Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; + + for (uint32_t i=0; i<_param->_nb_instruction; i++) + _queue[ptr]->_instruction [i] = PORT_READ(in_ICACHE_RSP_INSTRUCTION [i]); + + switch (PORT_READ(in_ICACHE_RSP_ERROR)) + { + case ICACHE_ERROR_NONE : _queue[ptr]->_exception = EXCEPTION_IFETCH_NONE ; break; + case ICACHE_ERROR_BUS_ERROR : _queue[ptr]->_exception = EXCEPTION_IFETCH_BUS_ERROR; break; + default : ERRORMORPHEO(FUNCTION,"icache_rsp_error : unknow value."); + } + + switch (_queue[ptr]->_state) + { + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_HAVE_RSP; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + default : ERRORMORPHEO(FUNCTION,"icache_rsp : invalid ifetch_queue state."); + } + } + + // ========================================================== + // =====[ EVENT_RESET ]====================================== + // ========================================================== + if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * EVENT_RESET : Transaction"); + + // Scan all entry of queue and test the status + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[i]->_state = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP; break; + default : _queue[i]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; + } + + // all entry is empty (or wait respons to flush) + // reset ptr + // 1) reg_PTR_READ = reg_PTR_WRITE = = 0 + // 2) reg_PTR_READ = reg_PTR_WRITE + // In method 1), the probalitie than the entry pointed by reg_PTR_WRITE is a slot with state "error_wait_rsp" is more importate that the method 2) + reg_PTR_READ = reg_PTR_WRITE; + } + +#if defined(DEBUG) and (DEBUG >= DEBUG_TRACE) + log_printf(TRACE,Ifetch_queue,FUNCTION," * Dump ifetch_queue"); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); + log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_READ : %d",reg_PTR_READ ); + for (uint32_t i=0; i<_param->_size_queue; i++) + { + log_printf(TRACE,Ifetch_queue,FUNCTION," * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s", + i, + _queue [i]->_address, + _queue [i]->_address<<2, + _queue [i]->_inst_ifetch_ptr, + _queue [i]->_branch_state, + _queue [i]->_branch_update_prediction_id, + _queue [i]->_exception, + toString(_queue [i]->_state).c_str() + ); + + for (uint32_t j=0; j<_param->_nb_instruction; j++) + log_printf(TRACE,Ifetch_queue,FUNCTION," * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]); + } +#endif + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + for (uint32_t i=0; i<_param->_size_queue; i++) + switch (_queue[i]->_state) + { + case IFETCH_QUEUE_STATE_EMPTY : break; + case IFETCH_QUEUE_STATE_WAIT_RSP : (*_sum_use_queue_wait_rsp ) ++; break; + case IFETCH_QUEUE_STATE_HAVE_RSP : (*_sum_use_queue_have_rsp ) ++; break; + case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : (*_sum_use_queue_error_wait_rsp) ++; break; + default : break; + } +#endif + } + + log_end(Ifetch_queue,FUNCTION); + }; + +}; // end namespace ifetch_queue +}; // end namespace ifetch_unit +}; // end namespace front_end +}; // end namespace multi_front_end +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp (revision 136) @@ -24,55 +24,5 @@ log_function(Ifetch_queue,FUNCTION,_name.c_str()); - if (PORT_READ(in_NRESET)) - { - // ========================================================== - // =====[ ADDRESS ]========================================== - // ========================================================== - { - internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); - - log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS_ACK : %d",internal_ADDRESS_ACK); - - if (_param->_have_port_ifetch_queue_ptr) - PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); - } - - // ========================================================== - // =====[ DECOD ]============================================ - // ========================================================== - { - bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); - - for (uint32_t i=0; i<_param->_nb_instruction; i++) - { - internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; - - log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD_VAL [%d] : %d",i,internal_DECOD_VAL [i]); - - PORT_WRITE(out_DECOD_INSTRUCTION [i], _queue[reg_PTR_READ]->_instruction [i]); - } - - PORT_WRITE(out_DECOD_ADDRESS , _queue[reg_PTR_READ]->_address ); - if (_param->_have_port_inst_ifetch_ptr) - PORT_WRITE(out_DECOD_INST_IFETCH_PTR , _queue[reg_PTR_READ]->_inst_ifetch_ptr ); - PORT_WRITE(out_DECOD_BRANCH_STATE , _queue[reg_PTR_READ]->_branch_state ); - if (_param->_have_port_depth) - PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id); - PORT_WRITE(out_DECOD_EXCEPTION , _queue[reg_PTR_READ]->_exception ); - } - } - else - { - // Reset - internal_ADDRESS_ACK = 0; - for (uint32_t i=0; i<_param->_nb_instruction; i++) - internal_DECOD_VAL [i] = 0; - - } - - // Write Output - PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); - for (uint32_t i=0; i<_param->_nb_instruction; i++) - PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); + (this->*function_genMoore) (); log_end(Ifetch_queue,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp (revision 136) @@ -25,174 +25,5 @@ log_function(Ifetch_queue,FUNCTION,_name.c_str()); - if (PORT_READ(in_NRESET) == 0) - { - reg_PTR_READ = 0; - reg_PTR_WRITE = 0; - - for (uint32_t i=0; i<_param->_size_queue; i++) - { - _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; - _queue [i]->_address = 0; // not necessary - _queue [i]->_inst_ifetch_ptr = 0; // not necessary - _queue [i]->_branch_state = 0; // not necessary - _queue [i]->_branch_update_prediction_id = 0; // not necessary - _queue [i]->_exception = 0; // not necessary - - for (uint32_t j=0; j<_param->_nb_instruction; j++) - { - _queue [i]->_instruction [j] = 0; // not necessary - _queue [i]->_instruction_enable [j] = 0; // not necessary - } - } - } - else - { - // ========================================================== - // =====[ ADDRESS ]========================================== - // ========================================================== - if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) - { - log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : Transaction"); - log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); - log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS)); - - // New slot in ifetch_queue is allocated - - _queue[reg_PTR_WRITE]->_state = IFETCH_QUEUE_STATE_WAIT_RSP; - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_sum_transaction_address) ++; -#endif - - for (uint32_t i=0; i<_param->_nb_instruction; i++) - { - Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]); -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_sum_inst_enable) += enable; -#endif - _queue[reg_PTR_WRITE]->_instruction_enable [i] = enable; - } - - _queue[reg_PTR_WRITE]->_address = PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS); - _queue[reg_PTR_WRITE]->_inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_ADDRESS_INST_IFETCH_PTR ):0; - _queue[reg_PTR_WRITE]->_branch_state = PORT_READ(in_ADDRESS_BRANCH_STATE); - _queue[reg_PTR_WRITE]->_branch_update_prediction_id = (_param->_have_port_depth)?PORT_READ(in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID):0; - - reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue; - } - - // ========================================================== - // =====[ DECOD ]============================================ - // ========================================================== - bool have_instruction_decod = false; - bool have_instruction_enable = false; - for (uint32_t i=0; i<_param->_nb_instruction; i++) - { - if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) - { - log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD [%d] : Transaction",i); - - have_instruction_decod = true; - _queue[reg_PTR_READ]->_instruction_enable [i] = false; - } - have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; - } - - // Test if all is decoded - if (have_instruction_decod and not have_instruction_enable) - { - // all is decod - _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; - reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; - } - - // ========================================================== - // =====[ ICACHE_RSP ]======================================= - // ========================================================== - if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) - { - log_printf(TRACE,Ifetch_queue,FUNCTION," * ICACHE_RSP : Transaction"); - - Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; - - for (uint32_t i=0; i<_param->_nb_instruction; i++) - _queue[ptr]->_instruction [i] = PORT_READ(in_ICACHE_RSP_INSTRUCTION [i]); - - switch (PORT_READ(in_ICACHE_RSP_ERROR)) - { - case ICACHE_ERROR_NONE : _queue[ptr]->_exception = EXCEPTION_IFETCH_NONE ; break; - case ICACHE_ERROR_BUS_ERROR : _queue[ptr]->_exception = EXCEPTION_IFETCH_BUS_ERROR; break; - default : ERRORMORPHEO(FUNCTION,"icache_rsp_error : unknow value."); - } - - switch (_queue[ptr]->_state) - { - case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_HAVE_RSP; break; - case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; - default : ERRORMORPHEO(FUNCTION,"icache_rsp : invalid ifetch_queue state."); - } - } - - // ========================================================== - // =====[ EVENT_RESET ]====================================== - // ========================================================== - if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) - { - log_printf(TRACE,Ifetch_queue,FUNCTION," * EVENT_RESET : Transaction"); - - // Scan all entry of queue and test the status - for (uint32_t i=0; i<_param->_size_queue; i++) - switch (_queue[i]->_state) - { - case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : break; - case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[i]->_state = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP; break; - default : _queue[i]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; - } - - // all entry is empty (or wait respons to flush) - // reset ptr - // 1) reg_PTR_READ = reg_PTR_WRITE = = 0 - // 2) reg_PTR_READ = reg_PTR_WRITE - // In method 1), the probalitie than the entry pointed by reg_PTR_WRITE is a slot with state "error_wait_rsp" is more importate that the method 2) - reg_PTR_READ = reg_PTR_WRITE; - } - -#if defined(DEBUG) and (DEBUG >= DEBUG_TRACE) - log_printf(TRACE,Ifetch_queue,FUNCTION," * Dump ifetch_queue"); - log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); - log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_READ : %d",reg_PTR_READ ); - for (uint32_t i=0; i<_param->_size_queue; i++) - { - log_printf(TRACE,Ifetch_queue,FUNCTION," * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s", - i, - _queue [i]->_address, - _queue [i]->_address<<2, - _queue [i]->_inst_ifetch_ptr, - _queue [i]->_branch_state, - _queue [i]->_branch_update_prediction_id, - _queue [i]->_exception, - toString(_queue [i]->_state).c_str() - ); - - for (uint32_t j=0; j<_param->_nb_instruction; j++) - log_printf(TRACE,Ifetch_queue,FUNCTION," * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]); - } -#endif - -#ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - for (uint32_t i=0; i<_param->_size_queue; i++) - switch (_queue[i]->_state) - { - case IFETCH_QUEUE_STATE_EMPTY : break; - case IFETCH_QUEUE_STATE_WAIT_RSP : (*_sum_use_queue_wait_rsp ) ++; break; - case IFETCH_QUEUE_STATE_HAVE_RSP : (*_sum_use_queue_have_rsp ) ++; break; - case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : (*_sum_use_queue_error_wait_rsp) ++; break; - default : break; - } -#endif - } + (this->*function_transition) (); #if defined(STATISTICS) or defined(VHDL_TESTBENCH) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp (revision 136) @@ -19,9 +19,10 @@ #undef FUNCTION #define FUNCTION "Ifetch_queue::Parameters" - Parameters::Parameters (uint32_t size_queue , - uint32_t nb_instruction , - uint32_t size_branch_update_prediction, - uint32_t size_general_data , - bool is_toplevel) + Parameters::Parameters (uint32_t size_queue , + Tifetch_queue_scheme_t queue_scheme , + uint32_t nb_instruction , + uint32_t size_branch_update_prediction, + uint32_t size_general_data , + bool is_toplevel) { log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); @@ -29,4 +30,5 @@ _nb_instruction_in_queue = size_queue ; _size_queue = size_queue/nb_instruction ; + _queue_scheme = queue_scheme ; _nb_instruction = nb_instruction ; // _size_branch_update_prediction = size_branch_update_prediction; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp (revision 136) @@ -29,4 +29,18 @@ test.error(_("Size of ifetch queue must be a multiple of nb_instruction.\n")); + switch (_queue_scheme) + { + case IFETCH_QUEUE_SCHEME_NO_ASSOC : + case IFETCH_QUEUE_SCHEME_FULL_ASSOC : + { + break; + } + default : + { + test.error(toString(_("Ifetch queue scheme '%s' is not supported. Please wait a next revision.\n"),toString(_queue_scheme).c_str())); + break; + } + } + if (_size_queue == 1) test.warning(_("To best perfomance, size_queue must be > 1.\n")); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp (revision 136) @@ -28,4 +28,5 @@ xml.balise_open("ifetch_queue"); xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); + xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); // xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h (revision 136) @@ -98,10 +98,9 @@ public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] -//public : SC_OUT(Tcontext_t ) * out_DECOD_CONTEXT_ID ; - public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; - public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; - public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; - public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; - public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; +//public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ; + public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_ADDRESS ; + public : SC_OUT(Tbranch_state_t ) ** out_DECOD_BRANCH_STATE ; + public : SC_OUT(Tprediction_ptr_t ) ** out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; + public : SC_OUT(Texception_t ) ** out_DECOD_EXCEPTION ; // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h (revision 136) @@ -27,4 +27,6 @@ //-----[ fields ]------------------------------------------------------------ public : uint32_t _size_queue ; + public : ifetch_queue::Tifetch_queue_scheme_t + _queue_scheme ; public : uint32_t _nb_instruction ; //public : uint32_t _size_address ; @@ -44,4 +46,6 @@ //-----[ methods ]----------------------------------------------------------- public : Parameters (uint32_t size_queue , + ifetch_queue::Tifetch_queue_scheme_t + queue_scheme , uint32_t nb_instruction , uint32_t size_branch_update_prediction, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp (revision 136) @@ -116,21 +116,14 @@ // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ { - ALLOC0_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit.")); - - //ALLOC0_SIGNAL_OUT (out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); - ALLOC0_SIGNAL_OUT (out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); - ALLOC0_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr); - ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); - ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); - ALLOC0_SIGNAL_OUT (out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); - - ALLOC0_INTERFACE_END(); - } - { ALLOC1_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction); ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); + ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); + ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); + ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); + ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); ALLOC1_INTERFACE_END(_param->_nb_instruction); @@ -405,13 +398,14 @@ PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_INSTRUCTION" , dest,"out_DECOD_"+toString(i)+"_INSTRUCTION" ); + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_ADDRESS" , + dest,"out_DECOD_"+toString(i)+"_ADDRESS" ); + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_STATE" , + dest,"out_DECOD_"+toString(i)+"_BRANCH_STATE" ); + if (_param->_have_port_depth) + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID", + dest,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID"); + PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_EXCEPTION" , + dest,"out_DECOD_"+toString(i)+"_EXCEPTION" ); } - - PORT_MAP(_component,src ,"out_DECOD_ADDRESS" ,dest,"out_DECOD_ADDRESS" ); - if (_param->_have_port_inst_ifetch_ptr) - PORT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR" ,dest,"out_DECOD_INST_IFETCH_PTR" ); - PORT_MAP(_component,src ,"out_DECOD_BRANCH_STATE" ,dest,"out_DECOD_BRANCH_STATE" ); - if (_param->_have_port_depth) - PORT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID"); - PORT_MAP(_component,src ,"out_DECOD_EXCEPTION" ,dest,"out_DECOD_EXCEPTION" ); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp (revision 136) @@ -54,13 +54,12 @@ DELETE1_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction,1); - // DELETE0_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_size_context_id); - DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address); - DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr); - DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state); - DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth); - DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_instruction,1); DELETE1_SIGNAL( in_DECOD_ACK ,_param->_nb_instruction,1); DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_instruction,_param->_size_instruction); + // DELETE1_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_instruction,_param->_size_context_id); + DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_instruction,_param->_size_instruction_address); + DELETE1_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_nb_instruction,_param->_size_branch_state); + DELETE1_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_instruction,_param->_size_depth); + DELETE1_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_instruction,_param->_size_exception_ifetch); DELETE0_SIGNAL( in_EVENT_VAL ,1); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp (revision 136) @@ -19,4 +19,6 @@ #define FUNCTION "Ifetch_unit::Parameters" Parameters::Parameters (uint32_t size_queue , + ifetch_queue::Tifetch_queue_scheme_t + queue_scheme , uint32_t nb_instruction , uint32_t size_branch_update_prediction, @@ -28,4 +30,5 @@ _size_queue = size_queue ; + _queue_scheme = queue_scheme ; _nb_instruction = nb_instruction ; // _size_branch_update_prediction = size_branch_update_prediction; @@ -40,4 +43,5 @@ _param_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue:: Parameters (size_queue , + queue_scheme , nb_instruction , size_branch_update_prediction, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp (revision 136) @@ -27,4 +27,5 @@ // xml.balise_open("ifetch_unit"); // xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); +// xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); // xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); // // xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp (revision 136) @@ -26,4 +26,8 @@ Parameters_test test ("Prediction_unit"); + for (uint32_t i=0; i<_nb_context; ++i) + if ((_nb_instruction[i] > 1) and (_ufpt_size_queue[i] < 2)) + test.error(toString(_("context \"%d\" : can fetch must than 1 instruction per cycle, size of Update Fetch Prediction Table must be less 1\n"),i)); + log_printf(FUNC,Prediction_unit,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h (revision 136) @@ -41,4 +41,6 @@ // ifetch_unit public : uint32_t * _size_ifetch_queue ;//[nb_context] + public : ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * _ifetch_queue_scheme ;//[nb_context] public : uint32_t * _nb_inst_fetch ;//[nb_context] public : bool ** _instruction_implemeted ;//[nb_context][nb_inst_fetch] @@ -111,8 +113,10 @@ morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), // ifetch_unit - uint32_t * size_ifetch_queue , - uint32_t * nb_inst_fetch , - bool ** instruction_implemeted , - uint32_t * link_context_to_decod_unit , + uint32_t * size_ifetch_queue ,//[nb_context] + ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * ifetch_queue_scheme ,//[nb_context] + uint32_t * nb_inst_fetch ,//[nb_context] + bool ** instruction_implemeted ,//[nb_context] + uint32_t * link_context_to_decod_unit ,//[nb_context] // decod_unit uint32_t * size_decod_queue ,//[nb_decod_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 136) @@ -449,12 +449,4 @@ ////out_DECOD_CONTEXT_ID - COMPONENT_MAP(_component,src ,"out_DECOD_ADDRESS" ,dest, "in_IFETCH_"+toString(num_context)+"_ADDRESS" ); - if (_param->_have_port_inst_ifetch_ptr) - COMPONENT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR" ,dest, "in_IFETCH_"+toString(num_context)+"_INST_IFETCH_PTR" ); - COMPONENT_MAP(_component,src ,"out_DECOD_BRANCH_STATE" ,dest, "in_IFETCH_"+toString(num_context)+"_BRANCH_STATE" ); - if (_param->_have_port_depth) - COMPONENT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest, "in_IFETCH_"+toString(num_context)+"_BRANCH_UPDATE_PREDICTION_ID"); - COMPONENT_MAP(_component,src ,"out_DECOD_EXCEPTION" ,dest, "in_IFETCH_"+toString(num_context)+"_EXCEPTION" ); - for (uint32_t j=0; j<_param->_nb_inst_fetch [i];++j) { @@ -471,4 +463,19 @@ COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j)+ "_INSTRUCTION", dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_INSTRUCTION"); + + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_ADDRESS", + dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_ADDRESS"); +// if (_param->_have_port_inst_ifetch_ptr) +// COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_INST_IFETCH_PTR", +// dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_INST_IFETCH_PTR"); + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_BRANCH_STATE", + dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_BRANCH_STATE"); + if (_param->_have_port_depth) + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_BRANCH_UPDATE_PREDICTION_ID", + dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID"); + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_EXCEPTION", + dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_EXCEPTION"); + + } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp (revision 136) @@ -24,8 +24,10 @@ morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), // ifetch_unit - uint32_t * size_ifetch_queue , - uint32_t * nb_inst_fetch , - bool ** instruction_implemeted , - uint32_t * link_context_to_decod_unit , + uint32_t * size_ifetch_queue ,//[nb_context] + ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * ifetch_queue_scheme ,//[nb_context] + uint32_t * nb_inst_fetch ,//[nb_context] + bool ** instruction_implemeted ,//[nb_context] + uint32_t * link_context_to_decod_unit ,//[nb_context] // decod_unit uint32_t * size_decod_queue ,//[nb_decod_unit] @@ -74,4 +76,5 @@ _translate_num_context_to_num_thread = translate_num_context_to_num_thread ; _size_ifetch_queue = size_ifetch_queue ; + _ifetch_queue_scheme = ifetch_queue_scheme ; _nb_inst_fetch = nb_inst_fetch ; _instruction_implemeted = instruction_implemeted ; @@ -125,7 +128,8 @@ { _param_ifetch_unit [i] = new behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters - (_size_ifetch_queue [i] , - _nb_inst_fetch [i] , - log2(_upt_size_queue[i]) , + (_size_ifetch_queue [i] , + _ifetch_queue_scheme[i] , + _nb_inst_fetch [i] , + log2(_upt_size_queue[i]) , size_instruction_address ); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 136) @@ -159,4 +159,5 @@ //public : SC_IN (Toperation_t ) ** in_COMMIT_OPERATION ;//[nb_inst_commit] //public : SC_IN (Ttype_t ) ** in_COMMIT_TYPE ;//[nb_inst_commit] + public : SC_IN (Tcontrol_t ) ** in_COMMIT_CANCEL ;//[nb_inst_commit] public : SC_IN (Tspecial_data_t ) ** in_COMMIT_FLAGS ;//[nb_inst_commit] public : SC_IN (Texception_t ) ** in_COMMIT_EXCEPTION ;//[nb_inst_commit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 136) @@ -156,4 +156,5 @@ // ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_IN ( in_COMMIT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 136) @@ -104,4 +104,5 @@ // DELETE1_SIGNAL( in_COMMIT_OPERATION ,_param->_nb_inst_commit,_param->_size_operation ); // DELETE1_SIGNAL( in_COMMIT_TYPE ,_param->_nb_inst_commit,_param->_size_type ); + DELETE1_SIGNAL( in_COMMIT_CANCEL ,_param->_nb_inst_commit,1 ); DELETE1_SIGNAL( in_COMMIT_FLAGS ,_param->_nb_inst_commit,_param->_size_general_data ); DELETE1_SIGNAL( in_COMMIT_EXCEPTION ,_param->_nb_inst_commit,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 136) @@ -426,4 +426,5 @@ Ttype_t type = entry->type; Tcontrol_t no_sequence = PORT_READ(in_COMMIT_NO_SEQUENCE [x]); + // Tcontrol_t cancel = PORT_READ(in_COMMIT_CANCEL [x]); #if 0 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h (revision 136) @@ -126,4 +126,5 @@ public : SC_OUT(Toperation_t ) ** out_ISSUE_OUT_OPERATION ;//[nb_inst_issue] public : SC_OUT(Ttype_t ) ** out_ISSUE_OUT_TYPE ;//[nb_inst_issue] + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_OUT_CANCEL ;//[nb_inst_issue] public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE;//[nb_inst_issue] public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_OUT_STORE_QUEUE_PTR_READ ;//[nb_inst_issue] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h (revision 136) @@ -21,5 +21,5 @@ { ISSUE_QUEUE_SCHEME_IN_ORDER // Each instruction is issue in of order -// ,ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER // Each bundle is issue in order. In bundle, an instruction is issue out of order +// ,ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER // Each bundle is issue in order. In bundle, an instruction is issue out of order ,ISSUE_QUEUE_SCHEME_OUT_OF_ORDER // Each instruction is issue out of order } Tissue_queue_scheme_t; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp (revision 136) @@ -130,4 +130,5 @@ ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp (revision 136) @@ -83,4 +83,5 @@ DELETE1_SIGNAL(out_ISSUE_OUT_OPERATION ,_param->_nb_inst_issue,_param->_size_operation ); DELETE1_SIGNAL(out_ISSUE_OUT_TYPE ,_param->_nb_inst_issue,_param->_size_type ); + DELETE1_SIGNAL(out_ISSUE_OUT_CANCEL ,_param->_nb_inst_issue,1); DELETE1_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); DELETE1_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp (revision 136) @@ -57,4 +57,5 @@ PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_CANCEL [index], 0 ); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [index], entry->_store_queue_ptr_read ); @@ -132,4 +133,5 @@ PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_CANCEL [index], 0 ); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [index], entry->_store_queue_ptr_read ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp (revision 136) @@ -126,4 +126,5 @@ PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_CANCEL [i], 0 ); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [i], entry->_store_queue_ptr_read ); @@ -189,4 +190,5 @@ PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); + PORT_WRITE(out_ISSUE_OUT_CANCEL [i], 0 ); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [i], entry->_store_queue_ptr_read ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp (revision 136) @@ -43,5 +43,5 @@ if (// (_queue_scheme == ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER) or (_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER )) - test.warning(toString(_("Can have deadlock with the queue scheme \"%s\".\n"),toString(_queue_scheme).c_str())); + test.error(toString(_("Can have deadlock with the queue scheme \"%s\".\n"),toString(_queue_scheme).c_str())); if (not is_multiple(_size_queue, _nb_bank)) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h (revision 136) @@ -53,5 +53,5 @@ public : Stat * _stat; - private : counter_t * _stat_nb_inst_issue_stall_by_registerfile; +//private : counter_t * _stat_nb_inst_issue_stall_by_registerfile; //private : counter_t * _stat_nb_inst_issue_stall_by_rename_unit ; private : counter_t * _stat_nb_inst_issue_stall_by_commit_unit ; @@ -73,10 +73,10 @@ // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[sum_inst_insert] - public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[sum_inst_insert] - public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[sum_inst_insert] - public : SC_OUT(Tgeneral_address_t ) ** out_INSERT_RD_NUM_REG ;//[sum_inst_insert] - public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[sum_inst_insert] - public : SC_OUT(Tspecial_address_t ) ** out_INSERT_RE_NUM_REG ;//[sum_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[sum_inst_insert] +// public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[sum_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[sum_inst_insert] +// public : SC_OUT(Tgeneral_address_t ) ** out_INSERT_RD_NUM_REG ;//[sum_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[sum_inst_insert] +// public : SC_OUT(Tspecial_address_t ) ** out_INSERT_RE_NUM_REG ;//[sum_inst_insert] public : SC_IN (Tcontrol_t ) *** in_INSERT_RENAME_UNIT_VAL ;//[nb_rename_unit][nb_inst_insert] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h (revision 136) @@ -50,5 +50,5 @@ //public : uint32_t _size_context_id ; public : uint32_t _size_rename_id ; - public : uint32_t _sum_inst_insert ; +//public : uint32_t _sum_inst_insert ; //public : uint32_t _sum_inst_retire ; public : uint32_t * _translate_front_end_id_to_rename_unit ;//[nb_front_end] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp (revision 136) @@ -119,8 +119,8 @@ sensitive << (*(in_NRESET)); { - uint32_t x=0; +// uint32_t x=0; for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) - sensitive << (*(in_INSERT_ACK [x++] )) + sensitive // << (*(in_INSERT_ACK [x++] )) << (*(in_INSERT_RENAME_UNIT_VAL [i][j])) << (*(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j])) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp (revision 136) @@ -67,16 +67,16 @@ // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - { - ALLOC1_INTERFACE_BEGIN("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert); - - ALLOC1_SIGNAL_OUT (out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t ,_param->_size_general_register); - ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_special_register); - - ALLOC1_INTERFACE_END(_param->_sum_inst_insert); - } +// { +// ALLOC1_INTERFACE_BEGIN("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert); + +// ALLOC1_SIGNAL_OUT (out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t ,_param->_size_general_register); +// ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_special_register); + +// ALLOC1_INTERFACE_END(_param->_sum_inst_insert); +// } { Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp (revision 136) @@ -31,10 +31,10 @@ DELETE2_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_front_end_id ); - DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); - DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); +// DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); +// DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_VAL ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp (revision 136) @@ -26,5 +26,5 @@ if (PORT_READ(in_NRESET)) { - uint32_t x=0; +// uint32_t x=0; for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) @@ -57,8 +57,8 @@ Tspecial_address_t special_address_msb = i << _param->_size_special_register; - PORT_WRITE(out_INSERT_RD_USE [x] ,WRITE_RD); - PORT_WRITE(out_INSERT_RD_NUM_REG [x] ,general_address_msb | NUM_REG_RD_PHY_NEW); - PORT_WRITE(out_INSERT_RE_USE [x] ,WRITE_RE); - PORT_WRITE(out_INSERT_RE_NUM_REG [x] ,special_address_msb | NUM_REG_RE_PHY_NEW); +// PORT_WRITE(out_INSERT_RD_USE [x] ,WRITE_RD); +// PORT_WRITE(out_INSERT_RD_NUM_REG [x] ,general_address_msb | NUM_REG_RD_PHY_NEW); +// PORT_WRITE(out_INSERT_RE_USE [x] ,WRITE_RE); +// PORT_WRITE(out_INSERT_RE_NUM_REG [x] ,special_address_msb | NUM_REG_RE_PHY_NEW); if (_param->_have_port_front_end_id) @@ -112,5 +112,5 @@ PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RE [i][j],special_address_msb | NUM_REG_RE_PHY_NEW); - x ++; +// x ++; } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp (revision 136) @@ -26,5 +26,5 @@ if (PORT_READ(in_NRESET)) { - uint32_t x=0; +// uint32_t x=0; for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) { @@ -33,5 +33,5 @@ for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) { - Tcontrol_t ack = PORT_READ(in_INSERT_ACK [x] ); +// Tcontrol_t ack = PORT_READ(in_INSERT_ACK [x] ); Tcontrol_t rename_unit_val = PORT_READ(in_INSERT_RENAME_UNIT_VAL [i][j]); Tcontrol_t rename_unit_no_execute = PORT_READ(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j]); @@ -41,33 +41,33 @@ // if not execute -> don't route to issue_queue - Tcontrol_t val = ( - rename_unit_val and - commit_unit_ack and - (rename_unit_no_execute or - issue_queue_ack)); +// Tcontrol_t val = ( +// rename_unit_val and +// commit_unit_ack and +// (rename_unit_no_execute or +// issue_queue_ack)); Tcontrol_t rename_unit_ack = ( - ack and +// ack and commit_unit_ack and (rename_unit_no_execute or issue_queue_ack)); Tcontrol_t commit_unit_val = ( - ack and +// ack and rename_unit_val and (rename_unit_no_execute or issue_queue_ack)); Tcontrol_t issue_queue_val = ( - ack and +// ack and rename_unit_val and commit_unit_ack and not rename_unit_no_execute); - PORT_WRITE(out_INSERT_VAL [x] ,val ); +// PORT_WRITE(out_INSERT_VAL [x] ,val ); PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],rename_unit_ack); PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],commit_unit_val); PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],issue_queue_val); - log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d] -> %d",i,j,x); - log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val ); - log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack ); + log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d]",i,j); +// log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val ); +// log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack ); log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_val (r) : %d",rename_unit_val ); log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_ack (w) : %d",rename_unit_ack ); @@ -78,5 +78,5 @@ log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_issue_queue_ack (r) : %d",issue_queue_ack ); - x ++; +// x ++; } } @@ -84,13 +84,13 @@ else { - uint32_t x=0; +// uint32_t x=0; for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) { - PORT_WRITE(out_INSERT_VAL [x] ,0); +// PORT_WRITE(out_INSERT_VAL [x] ,0); PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],0); PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],0); PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],0); - x ++; +// x ++; } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp (revision 136) @@ -27,5 +27,5 @@ param_statistics); - _stat_nb_inst_issue_stall_by_registerfile = _stat->create_variable("nb_inst_issue_stall_by_registerfile"); +// _stat_nb_inst_issue_stall_by_registerfile = _stat->create_variable("nb_inst_issue_stall_by_registerfile"); // _stat_nb_inst_issue_stall_by_rename_unit = _stat->create_variable("nb_inst_issue_stall_by_rename_unit" ); _stat_nb_inst_issue_stall_by_commit_unit = _stat->create_variable("nb_inst_issue_stall_by_commit_unit" ); @@ -33,7 +33,7 @@ // std::string nb_inst_issue_stall = "+ + nb_inst_issue_stall_by_registerfile nb_inst_issue_stall_by_rename_unit + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue"; - std::string nb_inst_issue_stall = "+ nb_inst_issue_stall_by_registerfile + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue"; + std::string nb_inst_issue_stall = "+ nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue"; - _stat->create_expr_percent ("percent_issue_stall_by_registerfile", "nb_inst_issue_stall_by_registerfile", nb_inst_issue_stall, _("Percent of instruction stalled by RegisterFile")); +// _stat->create_expr_percent ("percent_issue_stall_by_registerfile", "nb_inst_issue_stall_by_registerfile", nb_inst_issue_stall, _("Percent of instruction stalled by RegisterFile")); // _stat->create_expr_percent ("percent_issue_stall_by_rename_unit" , "nb_inst_issue_stall_by_rename_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Rename_Unit") ); _stat->create_expr_percent ("percent_issue_stall_by_commit_unit" , "nb_inst_issue_stall_by_commit_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Commit_Unit") ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp (revision 136) @@ -26,5 +26,5 @@ if (usage_is_set(_usage,USE_STATISTICS)) { - uint32_t x=0; +// uint32_t x=0; for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) @@ -32,6 +32,6 @@ if (PORT_READ(in_INSERT_RENAME_UNIT_VAL [i][j])) { - if (PORT_READ(in_INSERT_ACK [x]) == 0) - (*_stat_nb_inst_issue_stall_by_registerfile) ++; +// if (PORT_READ(in_INSERT_ACK [x]) == 0) +// (*_stat_nb_inst_issue_stall_by_registerfile) ++; if (PORT_READ(in_INSERT_COMMIT_UNIT_ACK [i][j]) == 0) (*_stat_nb_inst_issue_stall_by_commit_unit ) ++; @@ -39,5 +39,5 @@ (*_stat_nb_inst_issue_stall_by_issue_queue ) ++; } - x++; +// x++; } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp (revision 136) @@ -53,12 +53,12 @@ // _rename_unit_size_context_id = rename_unit_size_context_id ; _size_rename_id = log2(_nb_rename_unit) ; - _sum_inst_insert = 0; +// _sum_inst_insert = 0; // _sum_inst_retire = 0; - for (uint32_t i=0; i<_nb_rename_unit; ++i) - { - _sum_inst_insert += _nb_inst_insert[i]; +// for (uint32_t i=0; i<_nb_rename_unit; ++i) +// { +// _sum_inst_insert += _nb_inst_insert[i]; // _sum_inst_retire += _nb_inst_retire[i]; - } +// } ALLOC1(_translate_front_end_id_to_rename_unit,uint32_t,_nb_front_end); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h (revision 136) @@ -77,4 +77,5 @@ //public : SC_IN (Toperation_t ) *** in_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_inst_execute] //public : SC_IN (Ttype_t ) *** in_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_inst_execute] + public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_inst_execute] public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_inst_execute] public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] @@ -92,4 +93,5 @@ //public : SC_OUT(Toperation_t ) ** out_COMMIT_OPERATION ;//[nb_inst_commit] //public : SC_OUT(Ttype_t ) ** out_COMMIT_TYPE ;//[nb_inst_commit] + public : SC_OUT(Tcontrol_t ) ** out_COMMIT_CANCEL ;//[nb_inst_commit] public : SC_OUT(Tspecial_data_t ) ** out_COMMIT_FLAGS ;//[nb_inst_commit] public : SC_OUT(Texception_t ) ** out_COMMIT_EXCEPTION ;//[nb_inst_commit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp (revision 136) @@ -153,4 +153,5 @@ // << (*(in_EXECUTE_LOOP_OPERATION [i][j])) // << (*(in_EXECUTE_LOOP_TYPE [i][j])) + << (*(in_EXECUTE_LOOP_CANCEL [i][j])) << (*(in_EXECUTE_LOOP_FLAGS [i][j])) << (*(in_EXECUTE_LOOP_EXCEPTION [i][j])) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp (revision 136) @@ -67,4 +67,5 @@ // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"type" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); + _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CANCEL ,"cancel" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); @@ -88,4 +89,5 @@ // ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); // ALLOC1_SIGNAL_OUT(out_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); + ALLOC1_SIGNAL_OUT(out_COMMIT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data); ALLOC1_SIGNAL_OUT(out_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp (revision 136) @@ -35,4 +35,5 @@ // DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation ); // DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type ); + DELETE2_SIGNAL( in_EXECUTE_LOOP_CANCEL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1 ); DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data); DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception ); @@ -49,4 +50,5 @@ // DELETE1_SIGNAL(out_COMMIT_OPERATION ,_param->_nb_inst_commit,_param->_size_operation ); // DELETE1_SIGNAL(out_COMMIT_TYPE ,_param->_nb_inst_commit,_param->_size_type ); + DELETE1_SIGNAL(out_COMMIT_CANCEL ,_param->_nb_inst_commit,1 ); DELETE1_SIGNAL(out_COMMIT_FLAGS ,_param->_nb_inst_commit,_param->_size_special_data); DELETE1_SIGNAL(out_COMMIT_EXCEPTION ,_param->_nb_inst_commit,_param->_size_exception ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp (revision 136) @@ -111,4 +111,5 @@ //PORT_WRITE(out_COMMIT_OPERATION [i], PORT_READ(in_EXECUTE_LOOP_OPERATION [x][y])); //PORT_WRITE(out_COMMIT_TYPE [i], PORT_READ(in_EXECUTE_LOOP_TYPE [x][y])); + PORT_WRITE(out_COMMIT_CANCEL [i], PORT_READ(in_EXECUTE_LOOP_CANCEL [x][y])); PORT_WRITE(out_COMMIT_FLAGS [i], PORT_READ(in_EXECUTE_LOOP_FLAGS [x][y])); PORT_WRITE(out_COMMIT_EXCEPTION [i], exception); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 136) @@ -106,4 +106,5 @@ public : SC_OUT(Ttype_t ) ** out_ISSUE_TYPE ;//[nb_inst_issue] public : SC_OUT(Toperation_t ) ** out_ISSUE_OPERATION ;//[nb_inst_issue] + public : SC_OUT(Tcontrol_t ) ** out_ISSUE_CANCEL ;//[nb_inst_issue] public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_STORE_QUEUE_PTR_WRITE ;//[nb_inst_issue] public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_STORE_QUEUE_PTR_READ ;//[nb_inst_issue] @@ -131,4 +132,5 @@ //public : SC_IN (Ttype_t ) *** in_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_inst_execute] //public : SC_IN (Toperation_t ) *** in_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_inst_execute] + public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_inst_execute] public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_inst_execute] public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] @@ -137,11 +139,11 @@ public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_inst_execute] - // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert] - public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert] - public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[nb_inst_insert] - public : SC_OUT(Tgeneral_address_t) ** out_INSERT_RD_NUM_REG ;//[nb_inst_insert] - public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[nb_inst_insert] - public : SC_OUT(Tspecial_address_t) ** out_INSERT_RE_NUM_REG ;//[nb_inst_insert] +// // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert] +// public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[nb_inst_insert] +// public : SC_OUT(Tgeneral_address_t) ** out_INSERT_RD_NUM_REG ;//[nb_inst_insert] +// public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[nb_inst_insert] +// public : SC_OUT(Tspecial_address_t) ** out_INSERT_RE_NUM_REG ;//[nb_inst_insert] // // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 136) @@ -101,4 +101,5 @@ ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ); + ALLOC1_SIGNAL_OUT (out_ISSUE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); @@ -132,4 +133,5 @@ // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); + _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); @@ -141,17 +143,17 @@ } - // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - { - ALLOC1_INTERFACE_BEGIN("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert); - - ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL); - ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK); - ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register ); - ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register ); - - ALLOC1_INTERFACE_END(_param->_sum_inst_insert); - } +// // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// ALLOC1_INTERFACE_BEGIN("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert); + +// ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL); +// ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK); +// ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register ); + +// ALLOC1_INTERFACE_END(_param->_sum_inst_insert); +// } // // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -937,4 +939,6 @@ // COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE" , // dest,"out_COMMIT_"+toString(i)+"_TYPE" ); + COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_CANCEL" , + dest,"out_COMMIT_"+toString(i)+"_CANCEL" ); COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS" , dest,"out_COMMIT_"+toString(i)+"_FLAGS" ); @@ -1311,4 +1315,6 @@ PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION" , dest,"out_ISSUE_" +toString(i)+"_OPERATION" ); + PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CANCEL" , + dest,"out_ISSUE_" +toString(i)+"_CANCEL" ); PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE", dest,"out_ISSUE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE"); @@ -1391,4 +1397,6 @@ // PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" , // dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" ); + PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" , + dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" , dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ); @@ -1412,4 +1420,5 @@ ////out_COMMIT_OPERATION - component_commit_unit ////out_COMMIT_TYPE - component_commit_unit + // out_COMMIT_CANCEL - component_commit_unit // out_COMMIT_FLAGS - component_commit_unit // out_COMMIT_EXCEPTION - component_commit_unit @@ -1601,24 +1610,24 @@ // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - for (uint32_t i=0; i<_param->_sum_inst_insert; i++) - { - dest = _name; -#ifdef POSITION - _component->interface_map (src ,"insert_"+toString(i), - dest,"insert_"+toString(i)); -#endif - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" , - dest,"out_INSERT_"+toString(i)+"_VAL" ); - PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" , - dest, "in_INSERT_"+toString(i)+"_ACK" ); - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" , - dest,"out_INSERT_"+toString(i)+"_RD_USE" ); - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG", - dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG"); - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" , - dest,"out_INSERT_"+toString(i)+"_RE_USE" ); - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG", - dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG"); - } +// for (uint32_t i=0; i<_param->_sum_inst_insert; i++) +// { +// dest = _name; +// #ifdef POSITION +// _component->interface_map (src ,"insert_"+toString(i), +// dest,"insert_"+toString(i)); +// #endif +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" , +// dest,"out_INSERT_"+toString(i)+"_VAL" ); +// PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" , +// dest, "in_INSERT_"+toString(i)+"_ACK" ); +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" , +// dest,"out_INSERT_"+toString(i)+"_RD_USE" ); +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG", +// dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG"); +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" , +// dest,"out_INSERT_"+toString(i)+"_RE_USE" ); +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG", +// dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG"); +// } // in_INSERT_RENAME_UNIT_VAL - component_rename_unit Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 136) @@ -64,4 +64,5 @@ DELETE1_SIGNAL(out_ISSUE_TYPE ,_param->_nb_inst_issue,_param->_size_type ); DELETE1_SIGNAL(out_ISSUE_OPERATION ,_param->_nb_inst_issue,_param->_size_operation ); + DELETE1_SIGNAL(out_ISSUE_CANCEL ,_param->_nb_inst_issue,1 ); DELETE1_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_WRITE ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); DELETE1_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); @@ -88,4 +89,5 @@ // DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type ); // DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation ); + DELETE2_SIGNAL( in_EXECUTE_LOOP_CANCEL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1 ); DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data ); DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception ); @@ -94,10 +96,10 @@ DELETE2_SIGNAL( in_EXECUTE_LOOP_DATA ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data ); - DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_special_register ); +// DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register ); +// DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); +// DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_special_register ); // DELETE1_SIGNAL(out_RETIRE_VAL ,_param->_sum_inst_retire,1 ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 136) @@ -42,4 +42,6 @@ public : uint32_t _nb_thread ; public : uint32_t * _size_ifetch_queue ;//[nb_thread] + public : multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * _ifetch_queue_scheme ;//[nb_thread] public : uint32_t * _nb_inst_fetch ;//[nb_thread] public : bool ** _implement_group ;//[nb_thread][NB_GROUP] @@ -217,4 +219,6 @@ // translate for front_end public : uint32_t ** _front_end_size_ifetch_queue ;//[nb_front_end][nb_context] + public : multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + ** _front_end_ifetch_queue_scheme ;//[nb_front_end][nb_context] public : uint32_t ** _front_end_nb_inst_fetch ;//[nb_front_end][nb_context] public : bool *** _front_end_instruction_implemeted ;//[nb_front_end][nb_context][nb_instruction] @@ -241,5 +245,5 @@ public : uint32_t ** _ooo_engine_nb_inst_decod ;//[nb_ooo_engine][ooo_engine_nb_front_end] public : uint32_t ** _ooo_engine_nb_inst_insert ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] - public : uint32_t * _ooo_engine_nb_inst_insert_rob ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] +//public : uint32_t * _ooo_engine_nb_inst_insert_rob ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] public : uint32_t ** _ooo_engine_nb_inst_retire ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] public : uint32_t ** _ooo_engine_nb_inst_execute ;//[nb_ooo_engine][ooo_engine_nb_execute_loop] @@ -294,5 +298,5 @@ public : uint32_t ** _execute_loop_nb_general_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] public : uint32_t ** _execute_loop_nb_special_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] - public : uint32_t ** _execute_loop_nb_inst_insert_rob ;//[nb_execute_loop][execute_loop_nb_ooo_engine] +//public : uint32_t ** _execute_loop_nb_inst_insert_rob ;//[nb_execute_loop][execute_loop_nb_ooo_engine] public : uint32_t ** _execute_loop_nb_inst_retire_rob ;//[nb_execute_loop][execute_loop_nb_ooo_engine] public : uint32_t ** _execute_loop_nb_execute_unit_port ;//[nb_execute_loop][nb_execute_unit] @@ -361,4 +365,6 @@ uint32_t nb_thread , uint32_t * size_ifetch_queue ,//[nb_thread] + multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * ifetch_queue_scheme ,//[nb_thread] uint32_t * nb_inst_fetch ,//[nb_thread] bool ** implement_group ,//[nb_thread][NB_GROUP] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 136) @@ -730,4 +730,6 @@ COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_OPERATION" , dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_OPERATION" ); + COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_CANCEL" , + dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_STORE_QUEUE_PTR_WRITE", dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); @@ -793,4 +795,6 @@ // COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_OPERATION" , // dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_OPERATION" ); + COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_CANCEL" , + dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_CANCEL" ); COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_FLAGS" , dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_FLAGS" ); @@ -806,26 +810,26 @@ } - // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - for (uint32_t j=0; j<_param->_ooo_engine_nb_inst_insert_rob [i]; ++j) - { - dest = _name+"_glue"; -#ifdef POSITION - _component->interface_map (src ,"insert_" +toString(j), - dest,"insert_ooo_engine_"+toString(i)+"_"+toString(j)); -#endif +// // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// for (uint32_t j=0; j<_param->_ooo_engine_nb_inst_insert_rob [i]; ++j) +// { +// dest = _name+"_glue"; +// #ifdef POSITION +// _component->interface_map (src ,"insert_" +toString(j), +// dest,"insert_ooo_engine_"+toString(i)+"_"+toString(j)); +// #endif - COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_VAL" , - dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_VAL" ); - COMPONENT_MAP(_component,src , "in_INSERT_" +toString(j)+"_ACK" , - dest,"out_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_ACK" ); - COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_USE" , - dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_USE" ); - COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_NUM_REG", - dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); - COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_USE" , - dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_USE" ); - COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_NUM_REG", - dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); - } +// COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_VAL" , +// dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_VAL" ); +// COMPONENT_MAP(_component,src , "in_INSERT_" +toString(j)+"_ACK" , +// dest,"out_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_ACK" ); +// COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_USE" , +// dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_USE" ); +// COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_NUM_REG", +// dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); +// COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_USE" , +// dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_USE" ); +// COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_NUM_REG", +// dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); +// } } @@ -878,4 +882,6 @@ COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_TYPE" , dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ); + COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_CANCEL" , + dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_STORE_QUEUE_PTR_WRITE", dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); @@ -942,4 +948,6 @@ // COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_TYPE" , // dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ); + COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_CANCEL" , + dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_FLAGS" , dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ); @@ -954,27 +962,27 @@ } - // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) - for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert_rob[i][j]; ++k) - { - dest = _name+"_glue"; -#ifdef POSITION - _component->interface_map (src ,"insert_rob_" +toString(j)+"_"+toString(k), - dest,"insert_execute_loop_"+toString(i)+"_"+toString(j)+"_"+toString(k)); -#endif - - COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_VAL" , - dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL" ); - COMPONENT_MAP(_component,src ,"out_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_ACK" , - dest, "in_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_ACK" ); - COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_USE" , - dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_USE" ); - COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_NUM_REG", - dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_NUM_REG"); - COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_USE" , - dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_USE" ); - COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_NUM_REG", - dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_NUM_REG"); - } +// // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) +// for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert_rob[i][j]; ++k) +// { +// dest = _name+"_glue"; +// #ifdef POSITION +// _component->interface_map (src ,"insert_rob_" +toString(j)+"_"+toString(k), +// dest,"insert_execute_loop_"+toString(i)+"_"+toString(j)+"_"+toString(k)); +// #endif + +// COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_VAL" , +// dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL" ); +// COMPONENT_MAP(_component,src ,"out_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_ACK" , +// dest, "in_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_ACK" ); +// COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_USE" , +// dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_USE" ); +// COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_NUM_REG", +// dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_NUM_REG"); +// COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_USE" , +// dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_USE" ); +// COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_NUM_REG", +// dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_NUM_REG"); +// } // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 136) @@ -79,4 +79,6 @@ uint32_t nb_thread , uint32_t * size_ifetch_queue ,//[nb_thread] + multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + * ifetch_queue_scheme ,//[nb_thread] uint32_t * nb_inst_fetch ,//[nb_thread] bool ** implement_group ,//[nb_thread][NB_GROUP] @@ -238,4 +240,5 @@ _nb_thread = nb_thread ; _size_ifetch_queue = size_ifetch_queue ; + _ifetch_queue_scheme = ifetch_queue_scheme ; _nb_inst_fetch = nb_inst_fetch ; _implement_group = implement_group ; @@ -452,4 +455,6 @@ // translate for front_end ALLOC2(_front_end_size_ifetch_queue ,uint32_t ,_nb_front_end,_nb_context[it1]); + ALLOC2(_front_end_ifetch_queue_scheme ,multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t + ,_nb_front_end,_nb_context[it1]); ALLOC2(_front_end_nb_inst_fetch ,uint32_t ,_nb_front_end,_nb_context[it1]); ALLOC2(_front_end_link_decod_unit_with_context ,uint32_t ,_nb_front_end,_nb_context[it1]); @@ -463,9 +468,10 @@ uint32_t num_thread = _link_thread_with_context[i][j]; - _front_end_size_ifetch_queue [i][j] = _size_ifetch_queue [num_thread]; - _front_end_nb_inst_fetch [i][j] = _nb_inst_fetch [num_thread]; - _front_end_ras_size_queue [i][j] = _ras_size_queue [num_thread]; - _front_end_upt_size_queue [i][j] = _upt_size_queue [num_thread]; - _front_end_ufpt_size_queue [i][j] = _ufpt_size_queue [num_thread]; + _front_end_size_ifetch_queue [i][j] = _size_ifetch_queue [num_thread]; + _front_end_ifetch_queue_scheme [i][j] = _ifetch_queue_scheme [num_thread]; + _front_end_nb_inst_fetch [i][j] = _nb_inst_fetch [num_thread]; + _front_end_ras_size_queue [i][j] = _ras_size_queue [num_thread]; + _front_end_upt_size_queue [i][j] = _upt_size_queue [num_thread]; + _front_end_ufpt_size_queue [i][j] = _ufpt_size_queue [num_thread]; uint32_t num_decod_bloc = _link_decod_bloc_with_thread [num_thread]; @@ -987,5 +993,5 @@ ALLOC2(_ooo_engine_nb_inst_insert ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); - ALLOC1(_ooo_engine_nb_inst_insert_rob ,uint32_t ,_nb_ooo_engine); +// ALLOC1(_ooo_engine_nb_inst_insert_rob ,uint32_t ,_nb_ooo_engine); ALLOC2(_ooo_engine_nb_inst_retire ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); ALLOC2(_ooo_engine_rename_select_priority ,Tpriority_t ,_nb_ooo_engine,_nb_rename_unit[it1]); @@ -1001,5 +1007,5 @@ { log_printf(TRACE,Core,FUNCTION,_("OOO_Engine [%d] - nb_rename_unit %d"),i,_nb_rename_unit[i]); - _ooo_engine_nb_inst_insert_rob [i] = 0; +// _ooo_engine_nb_inst_insert_rob [i] = 0; for (uint32_t j=0; j<_nb_rename_unit[i]; ++j) @@ -1010,5 +1016,5 @@ _ooo_engine_nb_inst_insert [i][j] = _nb_inst_insert [num_rename_bloc]; - _ooo_engine_nb_inst_insert_rob [i] += _nb_inst_insert [num_rename_bloc]; +// _ooo_engine_nb_inst_insert_rob [i] += _nb_inst_insert [num_rename_bloc]; _ooo_engine_nb_inst_retire [i][j] = _nb_inst_retire [num_rename_bloc]; _ooo_engine_rename_select_priority [i][j] = _rename_select_priority [num_rename_bloc]; @@ -1578,6 +1584,6 @@ ALLOC2(_execute_loop_nb_general_register ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); ALLOC2(_execute_loop_nb_special_register ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); - ALLOC2(_execute_loop_nb_inst_insert_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); - ALLOC2(_execute_loop_nb_inst_retire_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// ALLOC2(_execute_loop_nb_inst_insert_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// ALLOC2(_execute_loop_nb_inst_retire_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); for (uint32_t i=0; i<_nb_execute_loop; ++i) @@ -1603,15 +1609,15 @@ - uint32_t insert = 0; - uint32_t retire = 0; +// uint32_t insert = 0; +// uint32_t retire = 0; +// +// for (uint32_t k=0; k<_nb_rename_unit[num_ooo_engine]; ++k) +// { +// insert = _ooo_engine_nb_inst_insert [num_ooo_engine][k]; +// retire = _ooo_engine_nb_inst_retire [num_ooo_engine][k]; +// } - for (uint32_t k=0; k<_nb_rename_unit[num_ooo_engine]; ++k) - { - insert = _ooo_engine_nb_inst_insert [num_ooo_engine][k]; - retire = _ooo_engine_nb_inst_retire [num_ooo_engine][k]; - } - - _execute_loop_nb_inst_insert_rob [i][j] = insert; - _execute_loop_nb_inst_retire_rob [i][j] = retire; +// _execute_loop_nb_inst_insert_rob [i][j] = insert; +// _execute_loop_nb_inst_retire_rob [i][j] = retire; } @@ -1942,4 +1948,5 @@ _get_custom_information , _front_end_size_ifetch_queue [i], + _front_end_ifetch_queue_scheme [i], _front_end_nb_inst_fetch [i], _front_end_instruction_implemeted [i], @@ -2083,6 +2090,6 @@ _execute_loop_nb_general_register [i], _execute_loop_nb_special_register [i], - _execute_loop_nb_inst_insert_rob [i], - _execute_loop_nb_inst_retire_rob [i], +// _execute_loop_nb_inst_insert_rob [i], +// _execute_loop_nb_inst_retire_rob [i], _execution_unit_to_write_unit_priority [i], @@ -2149,5 +2156,5 @@ _front_end_nb_inst_branch_complete ,//[nb_front_end] _nb_inst_branch_complete ,//[nb_ooo_engine] - _ooo_engine_nb_inst_insert_rob ,//[nb_ooo_engine] +// _ooo_engine_nb_inst_insert_rob ,//[nb_ooo_engine] _nb_inst_reexecute ,//[nb_ooo_engine] _nb_inst_issue_queue ,//[nb_ooo_engine] @@ -2223,6 +2230,6 @@ DELETE4(_execute_loop_read_unit_to_execution_unit_table_routing ,_nb_execute_loop,_nb_read_unit[it1],_nb_execute_unit[it1],_execute_loop_nb_execute_unit_port[it1][it2]); DELETE2(_execute_loop_nb_execute_unit_port ,_nb_execute_loop,_nb_execute_unit[it1]); - DELETE2(_execute_loop_nb_inst_retire_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); - DELETE2(_execute_loop_nb_inst_insert_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// DELETE2(_execute_loop_nb_inst_retire_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); +// DELETE2(_execute_loop_nb_inst_insert_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); DELETE2(_execute_loop_nb_special_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); DELETE2(_execute_loop_nb_general_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); @@ -2277,5 +2284,5 @@ DELETE2(_ooo_engine_rename_select_priority ,_nb_ooo_engine,_nb_rename_unit[it1]); DELETE2(_ooo_engine_nb_inst_retire ,_nb_ooo_engine,_nb_rename_unit[it1]); - DELETE1(_ooo_engine_nb_inst_insert_rob ,_nb_ooo_engine); +// DELETE1(_ooo_engine_nb_inst_insert_rob ,_nb_ooo_engine); DELETE2(_ooo_engine_nb_inst_insert ,_nb_ooo_engine,_nb_rename_unit[it1]); DELETE2(_ooo_engine_link_rename_unit_with_front_end ,_nb_ooo_engine,_ooo_engine_nb_front_end[it1]); @@ -2303,4 +2310,5 @@ DELETE2(_front_end_link_decod_unit_with_context ,_nb_front_end,_nb_context[it1]); DELETE2(_front_end_nb_inst_fetch ,_nb_front_end,_nb_context[it1]); + DELETE2(_front_end_ifetch_queue_scheme ,_nb_front_end,_nb_ifetch_unit[it1]); DELETE2(_front_end_size_ifetch_queue ,_nb_front_end,_nb_context[it1]); DELETE1(_list_load_store_unit_with_execute_unit ,_nb_execute_loop); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 136) @@ -40,4 +40,6 @@ str+= toString(MSG_INFORMATION)+" * THREAD ["+toString(i)+"]\n"; str+= toString(MSG_INFORMATION)+" * size_ifetch_queue : "+toString(_size_ifetch_queue [i])+"\n"; + str+= toString(MSG_INFORMATION)+" * ifetch_queue_scheme : "+toString + (_ifetch_queue_scheme[i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_inst_fetch : "+toString(_nb_inst_fetch [i])+"\n"; str+= toString(MSG_INFORMATION)+" * ras_size_queue : "+toString(_ras_size_queue [i])+"\n"; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 136) @@ -10,9 +10,9 @@ #define MORPHEO_MAJOR_VERSION "0" #define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "135" +#define MORPHEO_REVISION "136" #define MORPHEO_CODENAME "Castor" -#define MORPHEO_DATE_DAY "17" -#define MORPHEO_DATE_MONTH "07" +#define MORPHEO_DATE_DAY "20" +#define MORPHEO_DATE_MONTH "10" #define MORPHEO_DATE_YEAR "2009" Index: trunk/IPs/systemC/processor/Morpheo/Common/include/ErrorMorpheo.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/include/ErrorMorpheo.h (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Common/include/ErrorMorpheo.h (revision 136) @@ -34,9 +34,10 @@ { #ifdef DEBUG - _msg = toString(_("\n%s at line %d, in file %s"),MSG_ERROR,line,file.c_str()); - _msg = toString(_("\n%s <%s> %s"),MSG_ERROR,funcname.c_str(),msg.c_str()); + _msg = toString(_("%s at line %d, in file %s"),MSG_ERROR,line,file.c_str()); + _msg = toString(_("%s <%s> %s"),MSG_ERROR,funcname.c_str(),msg.c_str()); #else - _msg = toString(_("\n%s %s"),MSG_ERROR,msg.c_str()); + _msg = toString(_("%s %s"),MSG_ERROR,msg.c_str()); #endif + msg("%s",_msg.c_str()); } public : ~ErrorMorpheo (void) throw() {} Index: trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp (revision 136) @@ -39,4 +39,5 @@ log_file_generate = have_file; +#if 0 if (have_file) { @@ -63,4 +64,5 @@ } else +#endif { log_stream = NULL; Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg (revision 136) @@ -0,0 +1,180 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg (revision 136) @@ -0,0 +1,180 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_03.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_03.cfg (revision 136) @@ -0,0 +1,193 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg (revision 136) @@ -0,0 +1,229 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg (revision 136) @@ -0,0 +1,180 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg (revision 136) @@ -0,0 +1,190 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg (revision 136) @@ -0,0 +1,209 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg (revision 136) @@ -0,0 +1,199 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg (revision 136) @@ -0,0 +1,233 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg (revision 136) @@ -0,0 +1,255 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg (revision 136) @@ -0,0 +1,180 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg (revision 136) @@ -0,0 +1,212 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg (revision 136) @@ -0,0 +1,236 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg (revision 136) @@ -0,0 +1,255 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg (revision 136) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg (revision 136) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x11.cfg (revision 136) +++ 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trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg (revision 135) +++ (revision ) @@ -1,439 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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(revision ) @@ -1,185 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg (revision 135) +++ (revision ) @@ -1,185 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg (revision 135) +++ (revision ) @@ -1,195 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg (revision 135) +++ (revision ) @@ -1,216 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_6.cfg (revision 135) +++ (revision ) @@ -1,236 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x4_w4_1.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x4_w4_1.cfg (revision 135) +++ (revision ) @@ -1,351 +1,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 136) @@ -23,5 +23,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 136) @@ -16,4 +16,5 @@ + @@ -48,5 +49,5 @@ - + @@ -93,5 +94,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 136) @@ -17,5 +17,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg (revision 136) @@ -5,4 +5,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 136) @@ -4,9 +4,9 @@ - + - + @@ -20,5 +20,5 @@ - + @@ -26,11 +26,11 @@ - - - + + + - + - + @@ -108,7 +108,7 @@ - - - + + + Index: trunk/IPs/systemC/processor/Morpheo/Script/execute.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/execute.sh (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/Script/execute.sh (revision 136) @@ -137,7 +137,8 @@ if test ! -z "${COMMAND[${CPT}]}"; then local NUM=$(printf %.${NB_DIGIT}d ${CPT}); + local MAX=$((${NB_COMMAND}-1)); # echo " * {"$(my_date)"} <${ID}> execute command [${NUM}] : ${COMMAND[${CPT}]}"; - echo " * {"$(my_date)"} <${ID}> command [${NUM}/${NB_COMMAND}] : execute"; + echo " * {"$(my_date)"} <${ID}> command [${NUM}/${MAX}] : execute"; local PATH_CURRENT=${PWD}; @@ -155,5 +156,5 @@ ./${OUTPUT_FILE_CMD} &> ${OUTPUT_FILE_OUT}; cd ${PATH_CURRENT} &> /dev/null; - echo " * {"$(my_date)"} <${ID}> command [${NUM}/${NB_COMMAND}] : done"; + echo " * {"$(my_date)"} <${ID}> command [${NUM}/${MAX}] : done"; fi; done; Index: trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp (revision 135) +++ trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp (revision 136) @@ -48,4 +48,5 @@ param->_nb_thread , param->_size_ifetch_queue , + param->_ifetch_queue_scheme , param->_nb_inst_fetch , param->_implement_group ,