Index: /trunk/IPs/systemC/Environment/Makefile =================================================================== --- /trunk/IPs/systemC/Environment/Makefile (revision 136) +++ /trunk/IPs/systemC/Environment/Makefile (revision 137) @@ -1,8 +1,8 @@ -ifeq ($(origin MORPHEO_TMP), undefined) - $(error "variable MORPHEO_TMP is undefined"); +ifeq ($(origin MORPHEO_PREFIX), undefined) + $(error "variable MORPHEO_PREFIX is undefined"); endif #-----[ Directory ]---------------------------------------- -DIR_LIB = $(DIR_TMP)/lib +DIR_LIB = $(MORPHEO_PREFIX)/lib DIR_ENVIRONMENT = . DIR_CACHE = Cache Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration_header.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration_header.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration_header.cpp (revision 137) @@ -7,5 +7,5 @@ #include "Behavioural/Configuration/include/Configuration.h" -#include "Behavioural/include/Version.h" +#include "Common/include/Environment.h" namespace morpheo { @@ -18,4 +18,6 @@ { log_begin(Configuration,FUNCTION); + + environment(); std::string str = ""; @@ -52,6 +54,6 @@ str += toString(MSG_INFORMATION)+"\n"; str += toString(MSG_INFORMATION)+_(" * Multiple ORganization of a Processor with HEterogeneous and Open architecture\n"); - str += toString(MSG_INFORMATION)+_(" * Version : ")+toString(MORPHEO_HEADER)+"\n"; - str += toString(MSG_INFORMATION)+_(" * Last change : ")+toString(MORPHEO_DATE )+"\n"; + str += toString(MSG_INFORMATION)+_(" * Version : ")+MORPHEO_HEADER+"\n"; + str += toString(MSG_INFORMATION)+_(" * Last change : ")+MORPHEO_DATE +"\n"; str += toString(MSG_INFORMATION)+_(" * E-mail support : mathieu.rosiere@lip6.fr\n" ); str += toString(MSG_INFORMATION)+_(" * Original author(s) : Mathieu Rosière\n" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromXMLLight.cpp (revision 137) @@ -27,4 +27,7 @@ XMLLightVector vect = xml->getNodes(); + log_printf(TRACE,Configuration,FUNCTION," * id : %s",id.c_str()); + log_printf(TRACE,Configuration,FUNCTION," * size : %d",vect.size()); + for (uint32_t i=0; igetName(); -// log_printf(TRACE,Configuration,FUNCTION," * child_name : %s",child_name.c_str()); + log_printf(TRACE,Configuration,FUNCTION," * child_name : %s",child_name.c_str()); //-------------------------------------------- @@ -47,5 +50,5 @@ attribute_t value = getAttribute(child,attributes,"value"); -// log_printf(TRACE,Configuration,FUNCTION," * parameter \"%s\" = %s",value_name.c_str(), value.c_str()); + log_printf(TRACE,Configuration,FUNCTION," * parameter \"%s\" = %s",value_name.c_str(), value.c_str()); testAttributesEmpty(child,attributes); @@ -75,5 +78,5 @@ attribute_t value_name = getAttribute(child,attributes,"name"); -// log_printf(TRACE,Configuration,FUNCTION," * link \"%s\"",value_name.c_str()); + log_printf(TRACE,Configuration,FUNCTION," * link \"%s\"",value_name.c_str()); // Test, must have src or dest (or twice) @@ -118,5 +121,5 @@ if (child_name == "timing") { -// log_printf(TRACE,Configuration,FUNCTION," * timing"); + log_printf(TRACE,Configuration,FUNCTION," * timing"); // Notation : @@ -196,5 +199,5 @@ else { -// log_printf(TRACE,Configuration,FUNCTION," * component"); + log_printf(TRACE,Configuration,FUNCTION," * component"); testSingleton (child,false); @@ -229,5 +232,5 @@ attribute_t value_id = value_ids.substr(index_min, index_max); -// log_printf(TRACE,Configuration,FUNCTION," * component \"%s\" - %s",value_type.c_str(), value_id.c_str()); + log_printf(TRACE,Configuration,FUNCTION," * component \"%s\" - %s",value_type.c_str(), value_id.c_str()); index_begin = index_end; @@ -238,6 +241,6 @@ value_id); -// log_printf(TRACE,Configuration,FUNCTION,"%s.%s",value_type.c_str(),value_id.c_str()); -// log_printf(TRACE,Configuration,FUNCTION," * %d",((*list_components)[value_type]).size()); + // log_printf(TRACE,Configuration,FUNCTION,"%s.%s",value_type.c_str(),value_id.c_str()); + // log_printf(TRACE,Configuration,FUNCTION," * %d",((*list_components)[value_type]).size()); // Test if this id is previously used Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp (revision 137) @@ -370,15 +370,12 @@ vhdl->set_body (1,std_logic_cst(1,0)+"when others;"); -#ifdef SYSTEMC_VHDL_COMPATIBILITY vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <="); vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); +#ifdef SYSTEMC_VHDL_COMPATIBILITY vhdl->set_body (1,"sig_A_OR_B("+toString(_param->_size_instruction_address-1)+" downto 0) when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+","); vhdl->set_body (1,std_logic_cst(_param->_size_instruction_address,0)+" when others;"); #else - vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); - vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <="); - vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); - vhdl->set_body (1,"sig_A_OR_B when others;"); + vhdl->set_body (1,"sig_A_OR_B ("+toString(_param->_size_instruction_address-1)+" downto 0) when others;"); // vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <= sig_ADDR_BRANCH;"); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp (revision 137) @@ -140,10 +140,10 @@ vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_DATA "+std_logic_range(_param->_size_general_data )+" <= internal_EXECUTE_QUEUE_OUT_DATA ;"); - vhdl->set_debug ("in_CLOCK = 'U'","GLOP1: Clock = 'U'"); - vhdl->set_debug ("in_CLOCK = 'X'","GLOP2: Clock = 'X'"); - vhdl->set_debug ("in_CLOCK = 'Z'","GLOP3: Clock = 'Z'"); - vhdl->set_debug ("in_CLOCK = 'W'","GLOP4: Clock = 'W'"); - vhdl->set_debug ("in_CLOCK = '1'","KANE : Clock = '1'"); - vhdl->set_debug ("in_CLOCK = '0'","SETH : Clock = '0'"); +// vhdl->set_debug ("in_CLOCK = 'U'","GLOP1: Clock = 'U'"); +// vhdl->set_debug ("in_CLOCK = 'X'","GLOP2: Clock = 'X'"); +// vhdl->set_debug ("in_CLOCK = 'Z'","GLOP3: Clock = 'Z'"); +// vhdl->set_debug ("in_CLOCK = 'W'","GLOP4: Clock = 'W'"); +// vhdl->set_debug ("in_CLOCK = '1'","KANE : Clock = '1'"); +// vhdl->set_debug ("in_CLOCK = '0'","SETH : Clock = '0'"); log_printf(FUNC,Execute_queue,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp (revision 137) @@ -24,6 +24,6 @@ log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin"); - vhdl->set_body("out_CONST_0 <= '0';"); - vhdl->set_body("out_CONST_1 <= '1';"); + // vhdl->set_body("out_CONST_0 <= '0';"); + // vhdl->set_body("out_CONST_1 <= '1';"); //----------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h (revision 137) @@ -36,5 +36,8 @@ // Tdepth_t _depth ; - // set by decod + // set by decod +#ifdef STATISTICS + uint32_t _opcod ; +#endif Ttype_t _type ; Toperation_t _operation ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/src/Instruction.cpp (revision 137) @@ -215,12 +215,76 @@ switch (opcod) { - case OPCOD_L_CUST1 : {inst->_type = instruction_information(INSTRUCTION_L_CUST1)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST1)._operation; break;} - case OPCOD_L_CUST2 : {inst->_type = instruction_information(INSTRUCTION_L_CUST2)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST2)._operation; break;} - case OPCOD_L_CUST3 : {inst->_type = instruction_information(INSTRUCTION_L_CUST3)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST3)._operation; break;} - case OPCOD_L_CUST4 : {inst->_type = instruction_information(INSTRUCTION_L_CUST4)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST4)._operation; break;} - case OPCOD_L_CUST5 : {inst->_type = instruction_information(INSTRUCTION_L_CUST5)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST5)._operation; break;} - case OPCOD_L_CUST6 : {inst->_type = instruction_information(INSTRUCTION_L_CUST6)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST6)._operation; break;} - case OPCOD_L_CUST7 : {inst->_type = instruction_information(INSTRUCTION_L_CUST7)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST7)._operation; break;} - case OPCOD_L_CUST8 : {inst->_type = instruction_information(INSTRUCTION_L_CUST8)._type; inst->_operation = instruction_information(INSTRUCTION_L_CUST8)._operation; break;} + case OPCOD_L_CUST1 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST1; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST1)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST1)._operation; + break; + } + case OPCOD_L_CUST2 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST2; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST2)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST2)._operation; + break; + } + case OPCOD_L_CUST3 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST3; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST3)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST3)._operation; + break; + } + case OPCOD_L_CUST4 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST4; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST4)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST4)._operation; + break; + } + case OPCOD_L_CUST5 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST5; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST5)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST5)._operation; + break; + } + case OPCOD_L_CUST6 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST6; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST6)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST6)._operation; + break; + } + case OPCOD_L_CUST7 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST7; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST7)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST7)._operation; + break; + } + case OPCOD_L_CUST8 : + { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CUST8; +#endif + inst->_type = instruction_information(INSTRUCTION_L_CUST8)._type; + inst->_operation = instruction_information(INSTRUCTION_L_CUST8)._operation; + break; + } default : {throw ERRORMORPHEO("instruction_l_custom",_("Invalid Custom Opcod."));} @@ -240,6 +304,22 @@ switch (opcod) { -// case OPCOD_LF_CUST1_D : {inst->_type = instruction_information(INSTRUCTION_LF_CUST1_D)._type; inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_D)._operation; break;} -// case OPCOD_LF_CUST1_S : {inst->_type = instruction_information(INSTRUCTION_LF_CUST1_S)._type; inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_S)._operation; break;} +// case OPCOD_LF_CUST1_D : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LF_CUST1_D; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LF_CUST1_D)._type; +// inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_D)._operation; +// break; +// } +// case OPCOD_LF_CUST1_S : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LF_CUST1_S; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LF_CUST1_S)._type; +// inst->_operation = instruction_information(INSTRUCTION_LF_CUST1_S)._operation; +// break; +// } default : {throw ERRORMORPHEO("instruction_lf_custom",_("Invalid Custom Opcod."));} } @@ -258,8 +338,40 @@ switch (opcod) { -// case OPCOD_LV_CUST1 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST1)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST1)._operation; break;} -// case OPCOD_LV_CUST2 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST2)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST2)._operation; break;} -// case OPCOD_LV_CUST3 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST3)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST3)._operation; break;} -// case OPCOD_LV_CUST4 : {inst->_type = instruction_information(INSTRUCTION_LV_CUST4)._type; inst->_operation = instruction_information(INSTRUCTION_LV_CUST4)._operation; break;} +// case OPCOD_LV_CUST1 : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LV_CUST1; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LV_CUST1)._type; +// inst->_operation = instruction_information(INSTRUCTION_LV_CUST1)._operation; +// break; +// } +// case OPCOD_LV_CUST2 : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LV_CUST2; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LV_CUST2)._type; +// inst->_operation = instruction_information(INSTRUCTION_LV_CUST2)._operation; +// break; +// } +// case OPCOD_LV_CUST3 : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LV_CUST3; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LV_CUST3)._type; +// inst->_operation = instruction_information(INSTRUCTION_LV_CUST3)._operation; +// break; +// } +// case OPCOD_LV_CUST4 : +// { +// #ifdef STATISTICS +// inst->_opcod = INSTRUCTION_LV_CUST4; +// #endif +// inst->_type = instruction_information(INSTRUCTION_LV_CUST4)._type; +// inst->_operation = instruction_information(INSTRUCTION_LV_CUST4)._operation; +// break; +// } default : {throw ERRORMORPHEO("instruction_lv_custom",_("Invalid Custom Opcod."));} } @@ -324,4 +436,7 @@ { log_printf(TRACE,Decod,"instruction_l_add"," * instruction : l.add"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ADD; +#endif inst->_type = instruction_information(INSTRUCTION_L_ADD)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ADD)._operation; //OPERATION_ALU_L_ADD; @@ -352,4 +467,7 @@ log_printf(TRACE,Decod,"instruction_l_addc"," * instruction : l.addc"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ADDC; +#endif inst->_type = instruction_information(INSTRUCTION_L_ADDC)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ADDC)._operation; //OPERATION_ALU_L_ADD; @@ -380,4 +498,7 @@ log_printf(TRACE,Decod,"instruction_l_addi"," * instruction : l.addi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ADDI; +#endif inst->_type = instruction_information(INSTRUCTION_L_ADDI)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ADDI)._operation; //OPERATION_ALU_L_ADD; @@ -408,4 +529,7 @@ log_printf(TRACE,Decod,"instruction_l_addic"," * instruction : l.addic"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ADDIC; +#endif inst->_type = instruction_information(INSTRUCTION_L_ADDIC)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ADDIC)._operation; //OPERATION_ALU_L_ADD; @@ -436,4 +560,7 @@ log_printf(TRACE,Decod,"instruction_l_and"," * instruction : l.and"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_AND; +#endif inst->_type = instruction_information(INSTRUCTION_L_AND)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_AND)._operation; //OPERATION_ALU_L_AND; @@ -464,4 +591,7 @@ log_printf(TRACE,Decod,"instruction_l_andi"," * instruction : l.andi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ANDI; +#endif inst->_type = instruction_information(INSTRUCTION_L_ANDI)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ANDI)._operation; //OPERATION_ALU_L_AND; @@ -495,4 +625,7 @@ ); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_BF; +#endif inst->_type = instruction_information(INSTRUCTION_L_BF)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_BF)._operation; //OPERATION_BRANCH_L_TEST_F; @@ -527,4 +660,7 @@ ); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_BNF; +#endif inst->_type = instruction_information(INSTRUCTION_L_BNF)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_BNF)._operation; //OPERATION_BRANCH_L_TEST_NF; @@ -555,4 +691,7 @@ log_printf(TRACE,Decod,"instruction_l_cmov"," * instruction : l.cmov"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CMOV; +#endif inst->_type = instruction_information(INSTRUCTION_L_CMOV)._type ; //TYPE_MOVE; inst->_operation = instruction_information(INSTRUCTION_L_CMOV)._operation; //OPERATION_MOVE_L_CMOV; @@ -589,4 +728,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_CSYNC; +#endif inst->_type = instruction_information(INSTRUCTION_L_CSYNC)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_CSYNC)._operation; //OPERATION_SPECIAL_L_CSYNC; @@ -627,4 +769,7 @@ log_printf(TRACE,Decod,"instruction_l_div"," * instruction : l.div"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_DIV; +#endif inst->_type = instruction_information(INSTRUCTION_L_DIV)._type ; //TYPE_DIV; inst->_operation = instruction_information(INSTRUCTION_L_DIV)._operation; //OPERATION_DIV_L_DIV; @@ -655,4 +800,7 @@ log_printf(TRACE,Decod,"instruction_l_divu"," * instruction : l.divu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_DIVU; +#endif inst->_type = instruction_information(INSTRUCTION_L_DIVU)._type ; //TYPE_DIV; inst->_operation = instruction_information(INSTRUCTION_L_DIVU)._operation; //OPERATION_DIV_L_DIVU; @@ -683,4 +831,7 @@ log_printf(TRACE,Decod,"instruction_l_extbs"," * instruction : l.extbs"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTBS; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTBS)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTBS)._operation; //OPERATION_EXTEND_L_EXTEND_S; @@ -711,4 +862,7 @@ log_printf(TRACE,Decod,"instruction_l_extbz"," * instruction : l.extbz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTBZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTBZ)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTBZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z; @@ -739,4 +893,7 @@ log_printf(TRACE,Decod,"instruction_l_exths"," * instruction : l.exths"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTHS; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTHS)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTHS)._operation; //OPERATION_EXTEND_L_EXTEND_S; @@ -767,4 +924,7 @@ log_printf(TRACE,Decod,"instruction_l_exthz"," * instruction : l.exthz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTHZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTHZ)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTHZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z; @@ -795,4 +955,7 @@ log_printf(TRACE,Decod,"instruction_l_extws"," * instruction : l.extws"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTWS; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTWS)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTWS)._operation; //OPERATION_EXTEND_L_EXTEND_S; @@ -823,4 +986,7 @@ log_printf(TRACE,Decod,"instruction_l_extwz"," * instruction : l.extwz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_EXTWZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_EXTWZ)._type ; //TYPE_EXTEND; inst->_operation = instruction_information(INSTRUCTION_L_EXTWZ)._operation; //OPERATION_EXTEND_L_EXTEND_Z; @@ -851,4 +1017,7 @@ log_printf(TRACE,Decod,"instruction_l_ff1"," * instruction : l.ff1"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_FF1; +#endif inst->_type = instruction_information(INSTRUCTION_L_FF1)._type ; //TYPE_FIND; inst->_operation = instruction_information(INSTRUCTION_L_FF1)._operation; //OPERATION_FIND_L_FF1; @@ -879,4 +1048,7 @@ log_printf(TRACE,Decod,"instruction_l_fl1"," * instruction : l.fl1"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_FL1; +#endif inst->_type = instruction_information(INSTRUCTION_L_FL1)._type ; //TYPE_FIND; inst->_operation = instruction_information(INSTRUCTION_L_FL1)._operation; //OPERATION_FIND_L_FL1; @@ -907,4 +1079,7 @@ log_printf(TRACE,Decod,"instruction_l_j"," * instruction : l.j"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_J; +#endif inst->_type = instruction_information(INSTRUCTION_L_J)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_J)._operation; //OPERATION_BRANCH_NONE; @@ -936,4 +1111,7 @@ log_printf(TRACE,Decod,"instruction_l_jal"," * instruction : l.jal"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_JAL; +#endif inst->_type = instruction_information(INSTRUCTION_L_JAL)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_JAL)._operation; //OPERATION_BRANCH_L_JALR; @@ -973,4 +1151,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_JALR; +#endif inst->_type = instruction_information(INSTRUCTION_L_JALR)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_JALR)._operation; //OPERATION_BRANCH_L_JALR; @@ -1003,4 +1184,7 @@ log_printf(TRACE,Decod,"instruction_l_jr"," * instruction : l.jr"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_JR; +#endif inst->_type = instruction_information(INSTRUCTION_L_JR)._type ; //TYPE_BRANCH; inst->_operation = instruction_information(INSTRUCTION_L_JR)._operation; //OPERATION_BRANCH_L_JALR; @@ -1031,4 +1215,7 @@ log_printf(TRACE,Decod,"instruction_l_lbs"," * instruction : l.lbs"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LBS; +#endif inst->_type = instruction_information(INSTRUCTION_L_LBS)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LBS)._operation; //OPERATION_MEMORY_LOAD_8_S; @@ -1059,4 +1246,7 @@ log_printf(TRACE,Decod,"instruction_l_lbz"," * instruction : l.lbz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LBZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_LBZ)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LBZ)._operation; //OPERATION_MEMORY_LOAD_8_Z; @@ -1087,4 +1277,7 @@ log_printf(TRACE,Decod,"instruction_l_ld"," * instruction : l.ld"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LD; +#endif inst->_type = instruction_information(INSTRUCTION_L_LD)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LD)._operation; //OPERATION_MEMORY_LOAD_64_S; @@ -1115,4 +1308,7 @@ log_printf(TRACE,Decod,"instruction_l_lhs"," * instruction : l.lhs"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LHS; +#endif inst->_type = instruction_information(INSTRUCTION_L_LHS)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LHS)._operation; //OPERATION_MEMORY_LOAD_16_S; @@ -1143,4 +1339,7 @@ log_printf(TRACE,Decod,"instruction_l_lhz"," * instruction : l.lhz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LHZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_LHZ)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LHZ)._operation; //OPERATION_MEMORY_LOAD_16_Z; @@ -1171,4 +1370,7 @@ log_printf(TRACE,Decod,"instruction_l_lws"," * instruction : l.lws"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LWS; +#endif inst->_type = instruction_information(INSTRUCTION_L_LWS)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LWS)._operation; //OPERATION_MEMORY_LOAD_32_S; @@ -1199,4 +1401,7 @@ log_printf(TRACE,Decod,"instruction_l_lwz"," * instruction : l.lwz"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_LWZ; +#endif inst->_type = instruction_information(INSTRUCTION_L_LWZ)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_LWZ)._operation; //OPERATION_MEMORY_LOAD_32_Z; @@ -1227,4 +1432,7 @@ log_printf(TRACE,Decod,"instruction_l_mac"," * instruction : l.mac"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MAC; +#endif inst->_type = instruction_information(INSTRUCTION_L_MAC)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MAC)._operation; //OPERATION_SPECIAL_L_MAC; @@ -1255,4 +1463,7 @@ log_printf(TRACE,Decod,"instruction_l_maci"," * instruction : l.maci"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MACI; +#endif inst->_type = instruction_information(INSTRUCTION_L_MACI)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MACI)._operation; //OPERATION_SPECIAL_L_MAC; @@ -1290,4 +1501,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MACRC; +#endif inst->_type = instruction_information(INSTRUCTION_L_MACRC)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MACRC)._operation; //OPERATION_SPECIAL_L_MACRC; @@ -1319,4 +1533,7 @@ log_printf(TRACE,Decod,"instruction_l_mfspr"," * instruction : l.mfspr"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MFSPR; +#endif inst->_type = instruction_information(INSTRUCTION_L_MFSPR)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MFSPR)._operation; //OPERATION_SPECIAL_L_MFSPR; @@ -1347,4 +1564,7 @@ log_printf(TRACE,Decod,"instruction_l_movhi"," * instruction : l.movhi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MOVHI; +#endif inst->_type = instruction_information(INSTRUCTION_L_MOVHI)._type ; //TYPE_MOVE; inst->_operation = instruction_information(INSTRUCTION_L_MOVHI)._operation; //OPERATION_MOVE_L_MOVHI; @@ -1375,4 +1595,7 @@ log_printf(TRACE,Decod,"instruction_l_msb"," * instruction : l.msb"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MSB; +#endif inst->_type = instruction_information(INSTRUCTION_L_MSB)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MSB)._operation; //OPERATION_SPECIAL_L_MSB; @@ -1409,4 +1632,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MSYNC; +#endif inst->_type = instruction_information(INSTRUCTION_L_MSYNC)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MSYNC)._operation; //OPERATION_SPECIAL_L_MSYNC; @@ -1438,4 +1664,7 @@ log_printf(TRACE,Decod,"instruction_l_mtspr"," * instruction : l.mtspr"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MTSPR; +#endif inst->_type = instruction_information(INSTRUCTION_L_MTSPR)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_MTSPR)._operation; //OPERATION_SPECIAL_L_MTSPR; @@ -1467,4 +1696,7 @@ log_printf(TRACE,Decod,"instruction_l_mul"," * instruction : l.mul"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MUL; +#endif inst->_type = instruction_information(INSTRUCTION_L_MUL)._type ; //TYPE_MUL; inst->_operation = instruction_information(INSTRUCTION_L_MUL)._operation; //OPERATION_MUL_L_MUL; @@ -1495,4 +1727,7 @@ log_printf(TRACE,Decod,"instruction_l_muli"," * instruction : l.muli"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MULI; +#endif inst->_type = instruction_information(INSTRUCTION_L_MULI)._type ; //TYPE_MUL; inst->_operation = instruction_information(INSTRUCTION_L_MULI)._operation; //OPERATION_MUL_L_MUL; @@ -1523,4 +1758,7 @@ log_printf(TRACE,Decod,"instruction_l_mulu"," * instruction : l.mulu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_MULU; +#endif inst->_type = instruction_information(INSTRUCTION_L_MULU)._type ; //TYPE_MUL; inst->_operation = instruction_information(INSTRUCTION_L_MULU)._operation; //OPERATION_MUL_L_MULU; @@ -1551,4 +1789,7 @@ log_printf(TRACE,Decod,"instruction_l_nop"," * instruction : l.nop"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_NOP; +#endif inst->_type = instruction_information(INSTRUCTION_L_NOP)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_NOP)._operation; //OPERATION_SPECIAL_L_NOP; @@ -1581,4 +1822,7 @@ log_printf(TRACE,Decod,"instruction_l_or"," * instruction : l.or"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_OR; +#endif inst->_type = instruction_information(INSTRUCTION_L_OR)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_OR)._operation; //OPERATION_ALU_L_OR; @@ -1609,4 +1853,7 @@ log_printf(TRACE,Decod,"instruction_l_ori"," * instruction : l.ori"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ORI; +#endif inst->_type = instruction_information(INSTRUCTION_L_ORI)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_ORI)._operation; //OPERATION_ALU_L_OR; @@ -1643,4 +1890,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_PSYNC; +#endif inst->_type = instruction_information(INSTRUCTION_L_PSYNC)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_PSYNC)._operation; //OPERATION_SPECIAL_L_PSYNC; @@ -1672,4 +1922,7 @@ log_printf(TRACE,Decod,"instruction_l_rfe"," * instruction : l.rfe"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_RFE; +#endif inst->_type = instruction_information(INSTRUCTION_L_RFE)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_RFE)._operation; //OPERATION_SPECIAL_L_RFE; @@ -1700,4 +1953,7 @@ log_printf(TRACE,Decod,"instruction_l_ror"," * instruction : l.ror"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_ROR; +#endif inst->_type = instruction_information(INSTRUCTION_L_ROR)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_ROR)._operation; //OPERATION_SHIFT_L_ROR; @@ -1728,4 +1984,7 @@ log_printf(TRACE,Decod,"instruction_l_rori"," * instruction : l.rori"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_RORI; +#endif inst->_type = instruction_information(INSTRUCTION_L_RORI)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_RORI)._operation; //OPERATION_SHIFT_L_ROR; @@ -1756,4 +2015,7 @@ log_printf(TRACE,Decod,"instruction_l_sb"," * instruction : l.sb"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SB; +#endif inst->_type = instruction_information(INSTRUCTION_L_SB)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_SB)._operation; //OPERATION_MEMORY_STORE_8; @@ -1785,4 +2047,7 @@ log_printf(TRACE,Decod,"instruction_l_sb"," * instruction : l.sb"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SD; +#endif inst->_type = instruction_information(INSTRUCTION_L_SD)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_SD)._operation; //OPERATION_MEMORY_STORE_64; @@ -1814,4 +2079,7 @@ log_printf(TRACE,Decod,"instruction_l_sfeq"," * instruction : l.sfeq"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFEQ; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFEQ)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFEQ)._operation; //OPERATION_TEST_L_SFEQ; @@ -1842,4 +2110,7 @@ log_printf(TRACE,Decod,"instruction_l_sfeqi"," * instruction : l.sfeqi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFEQI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFEQI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFEQI)._operation; //OPERATION_TEST_L_SFEQ; @@ -1870,4 +2141,7 @@ log_printf(TRACE,Decod,"instruction_l_sfges"," * instruction : l.sfges"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGES; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGES)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGES)._operation; //OPERATION_TEST_L_SFGES; @@ -1898,4 +2172,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgesi"," * instruction : l.sfgesi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGESI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGESI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGESI)._operation; //OPERATION_TEST_L_SFGES; @@ -1926,4 +2203,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgeu"," * instruction : l.sfgeu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGEU; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGEU)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGEU)._operation; //OPERATION_TEST_L_SFGEU; @@ -1954,4 +2234,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgeui"," * instruction : l.sfgeui"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGEUI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGEUI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGEUI)._operation; //OPERATION_TEST_L_SFGEU; @@ -1982,4 +2265,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgts"," * instruction : l.sfgts"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGTS; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGTS)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGTS)._operation; //OPERATION_TEST_L_SFGTS; @@ -2010,4 +2296,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgtsi"," * instruction : l.sfgtsi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGTSI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGTSI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGTSI)._operation; //OPERATION_TEST_L_SFGTS; @@ -2038,4 +2327,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgtu"," * instruction : l.sfgtu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGTU; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGTU)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGTU)._operation; //OPERATION_TEST_L_SFGTU; @@ -2066,4 +2358,7 @@ log_printf(TRACE,Decod,"instruction_l_sfgtui"," * instruction : l.sfgtui"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFGTUI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFGTUI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFGTUI)._operation; //OPERATION_TEST_L_SFGTU; @@ -2094,4 +2389,7 @@ log_printf(TRACE,Decod,"instruction_l_sfles"," * instruction : l.sfles"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLES; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLES)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLES)._operation; //OPERATION_TEST_L_SFLES; @@ -2122,4 +2420,7 @@ log_printf(TRACE,Decod,"instruction_l_sflesi"," * instruction : l.sflesi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLESI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLESI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLESI)._operation; //OPERATION_TEST_L_SFLES; @@ -2150,4 +2451,7 @@ log_printf(TRACE,Decod,"instruction_l_sfleu"," * instruction : l.sfleu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLEU; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLEU)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLEU)._operation; //OPERATION_TEST_L_SFLEU; @@ -2178,4 +2482,7 @@ log_printf(TRACE,Decod,"instruction_l_sfleui"," * instruction : l.sfleui"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLEUI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLEUI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLEUI)._operation; //OPERATION_TEST_L_SFLEU; @@ -2206,4 +2513,7 @@ log_printf(TRACE,Decod,"instruction_l_sflts"," * instruction : l.sflts"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLTS; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLTS)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLTS)._operation; //OPERATION_TEST_L_SFLTS; @@ -2234,4 +2544,7 @@ log_printf(TRACE,Decod,"instruction_l_sfltsi"," * instruction : l.sfltsi"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLTSI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLTSI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLTSI)._operation; //OPERATION_TEST_L_SFLTS; @@ -2262,4 +2575,7 @@ log_printf(TRACE,Decod,"instruction_l_sfltu"," * instruction : l.sfltu"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLTU; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLTU)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLTU)._operation; //OPERATION_TEST_L_SFLTU; @@ -2290,4 +2606,7 @@ log_printf(TRACE,Decod,"instruction_l_sfltui"," * instruction : l.sfltui"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFLTUI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFLTUI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFLTUI)._operation; //OPERATION_TEST_L_SFLTU; @@ -2318,4 +2637,7 @@ log_printf(TRACE,Decod,"instruction_l_sfne"," * instruction : l.sfne"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFNE; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFNE)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFNE)._operation; //OPERATION_TEST_L_SFNE; @@ -2346,4 +2668,7 @@ log_printf(TRACE,Decod,"instruction_l_sfnei"," * instruction : l.sfnei"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SFNEI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SFNEI)._type ; //TYPE_TEST; inst->_operation = instruction_information(INSTRUCTION_L_SFNEI)._operation; //OPERATION_TEST_L_SFNE; @@ -2374,4 +2699,7 @@ log_printf(TRACE,Decod,"instruction_l_sh"," * instruction : l.sh"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SH; +#endif inst->_type = instruction_information(INSTRUCTION_L_SH)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_SH)._operation; //OPERATION_MEMORY_STORE_16; @@ -2403,4 +2731,7 @@ log_printf(TRACE,Decod,"instruction_l_sll"," * instruction : l.sll"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SLL; +#endif inst->_type = instruction_information(INSTRUCTION_L_SLL)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SLL)._operation; //OPERATION_SHIFT_L_SLL; @@ -2431,4 +2762,7 @@ log_printf(TRACE,Decod,"instruction_l_slli"," * instruction : l.slli"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SLLI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SLLI)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SLLI)._operation; //OPERATION_SHIFT_L_SLL; @@ -2459,4 +2793,7 @@ log_printf(TRACE,Decod,"instruction_l_sra"," * instruction : l.sra"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SRA; +#endif inst->_type = instruction_information(INSTRUCTION_L_SRA)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SRA)._operation; //OPERATION_SHIFT_L_SRA; @@ -2487,4 +2824,7 @@ log_printf(TRACE,Decod,"instruction_l_srai"," * instruction : l.srai"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SRAI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SRAI)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SRAI)._operation; //OPERATION_SHIFT_L_SRA; @@ -2515,4 +2855,7 @@ log_printf(TRACE,Decod,"instruction_l_srl"," * instruction : l.srl"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SRL; +#endif inst->_type = instruction_information(INSTRUCTION_L_SRL)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SRL)._operation; //OPERATION_SHIFT_L_SRL; @@ -2543,4 +2886,7 @@ log_printf(TRACE,Decod,"instruction_l_srli"," * instruction : l.srli"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SRLI; +#endif inst->_type = instruction_information(INSTRUCTION_L_SRLI)._type ; //TYPE_SHIFT; inst->_operation = instruction_information(INSTRUCTION_L_SRLI)._operation; //OPERATION_SHIFT_L_SRL; @@ -2571,4 +2917,7 @@ log_printf(TRACE,Decod,"instruction_l_sub"," * instruction : l.sub"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SUB; +#endif inst->_type = instruction_information(INSTRUCTION_L_SUB)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_SUB)._operation; //OPERATION_ALU_L_SUB; @@ -2599,4 +2948,7 @@ log_printf(TRACE,Decod,"instruction_l_sw"," * instruction : l.sw"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SW; +#endif inst->_type = instruction_information(INSTRUCTION_L_SW)._type ; //TYPE_MEMORY; inst->_operation = instruction_information(INSTRUCTION_L_SW)._operation; //OPERATION_MEMORY_STORE_32; @@ -2634,4 +2986,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_SYS; +#endif inst->_type = instruction_information(INSTRUCTION_L_SYS)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_SYS)._operation; //OPERATION_SPECIAL_L_SYS; @@ -2678,4 +3033,7 @@ else { +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_TRAP; +#endif inst->_type = instruction_information(INSTRUCTION_L_TRAP)._type ; //TYPE_SPECIAL; inst->_operation = instruction_information(INSTRUCTION_L_TRAP)._operation; //OPERATION_SPECIAL_L_TRAP; @@ -2707,4 +3065,7 @@ log_printf(TRACE,Decod,"instruction_l_xor"," * instruction : l.xor"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_XOR; +#endif inst->_type = instruction_information(INSTRUCTION_L_XOR)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_XOR)._operation; //OPERATION_ALU_L_XOR; @@ -2735,4 +3096,7 @@ log_printf(TRACE,Decod,"instruction_l_xori"," * instruction : l.xori"); +#ifdef STATISTICS + inst->_opcod = INSTRUCTION_L_XORI; +#endif inst->_type = instruction_information(INSTRUCTION_L_XORI)._type ; //TYPE_ALU; inst->_operation = instruction_information(INSTRUCTION_L_XORI)._operation; //OPERATION_ALU_L_XOR; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 137) @@ -84,4 +84,7 @@ public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ;//[nb_inst_decod] public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ;//[nb_inst_decod] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_DECOD_INSTRUCTION ;//[nb_inst_decod] +#endif public : SC_OUT(Ttype_t ) ** out_DECOD_TYPE ;//[nb_inst_decod] public : SC_OUT(Toperation_t ) ** out_DECOD_OPERATION ;//[nb_inst_decod] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 137) @@ -83,4 +83,7 @@ ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,uint32_t ,32 ); +#endif ALLOC1_SIGNAL_OUT(out_DECOD_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 137) @@ -44,4 +44,7 @@ DELETE1_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod,_param->_size_context_id ); DELETE1_SIGNAL(out_DECOD_DEPTH ,_param->_nb_inst_decod,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_inst_decod,32 ); +#endif DELETE1_SIGNAL(out_DECOD_TYPE ,_param->_nb_inst_decod,_param->_size_type ); DELETE1_SIGNAL(out_DECOD_OPERATION ,_param->_nb_inst_decod,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 137) @@ -107,4 +107,7 @@ _decod_instruction->_address_next = addr+1; _decod_instruction->_is_delay_slot = internal_CONTEXT_IS_DELAY_SLOT [x]; +#ifdef STATISTICS + _decod_instruction->_opcod = -1; // not necessary +#endif _decod_instruction->_type = 0; // not necessary _decod_instruction->_operation = 0; // not necessary @@ -174,4 +177,7 @@ if (_param->_have_port_depth) PORT_WRITE(out_DECOD_DEPTH [i], depth); +#ifdef STATISTICS + PORT_WRITE(out_DECOD_INSTRUCTION [i], _decod_instruction->_opcod ); +#endif PORT_WRITE(out_DECOD_TYPE [i], type); PORT_WRITE(out_DECOD_OPERATION [i], _decod_instruction->_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp (revision 137) @@ -36,5 +36,5 @@ for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ - vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION WHEN in_IFETCH_0_"+toString(i)+"_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_VAL <= internal_DECOD_"+toString(i)+"_VAL; "); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_TYPE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE; "); @@ -53,5 +53,5 @@ vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE; "); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE; "); - vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); + vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION WHEN in_IFETCH_0_"+toString(i)+"_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE; "); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT; "); @@ -59,16 +59,16 @@ vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); #endif - vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS <= in_IFETCH_0_ADDRESS + "+std_logic_cst(_param->_size_instruction_address,i)+" ;"); + vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS <= in_IFETCH_0_"+toString(i)+"_ADDRESS + "+std_logic_cst(_param->_size_instruction_address,i)+" ;"); vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); - vhdl->set_body(0,"internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + '1'; "); + vhdl->set_body(0,"internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + '1'; "); vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION; "); vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION; "); vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); - vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_STATE <= in_IFETCH_0_BRANCH_STATE; "); + vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_STATE <= in_IFETCH_0_"+toString(i)+"_BRANCH_STATE; "); vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_VAL <= internal_PREDICT_"+toString(i)+"_VAL; "); - if(_param->_have_port_depth) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID <= in_IFETCH_0_BRANCH_UPDATE_PREDICTION_ID; "); - if(_param->_have_port_inst_ifetch_ptr) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN in_IFETCH_0_INST_IFETCH_PTR = "+std_logic_cst(_param->_size_inst_ifetch_ptr,i)+" ELSE '0'; "); + if(_param->_have_port_depth) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID <= in_IFETCH_0_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID; "); + if(_param->_have_port_inst_ifetch_ptr) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN in_IFETCH_0_"+toString(i)+"_INST_IFETCH_PTR = "+std_logic_cst(_param->_size_inst_ifetch_ptr,i)+" ELSE '0'; "); else vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0' ; "); } @@ -88,5 +88,5 @@ vhdl->set_body(0,"out_CONTEXT_EVENT_VAL <= internal_CONTEXT_EVENT_VAL; "); - vhdl->set_body(0,"out_CONTEXT_EVENT_TYPE <= internal_DECOD_INSTRUCTION_0_EVENT_TYPE WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); + vhdl->set_body(0,"out_CONTEXT_EVENT_TYPE <= internal_DECOD_INSTRUCTION_0_EVENT_TYPE WHEN in_IFETCH_0_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS <= internal_DECOD_INSTRUCTION_0_ADDRESS; "); vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS_EPCR <= internal_DECOD_INSTRUCTION_0_ADDRESS_NEXT; "); @@ -226,5 +226,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); @@ -252,5 +252,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); @@ -266,5 +266,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); @@ -280,5 +280,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); @@ -294,5 +294,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); @@ -308,5 +308,5 @@ extend_signal = ""; for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; - vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); + vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp (revision 137) @@ -47,7 +47,5 @@ vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE ",1); vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT ",1); -#ifdef DEBUG vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS ",_param->_size_instruction_address); -#endif vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT ",_param->_size_instruction_address); vhdl->set_signal ("internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT ",_param->_size_instruction_address); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 137) @@ -75,4 +75,7 @@ public : SC_IN (Tcontext_t ) ** in_DECOD_IN_CONTEXT_ID ;//[nb_inst_decod] public : SC_IN (Tdepth_t ) ** in_DECOD_IN_DEPTH ;//[nb_inst_decod] +#ifdef STATISTICS + public : SC_IN (uint32_t ) ** in_DECOD_IN_INSTRUCTION ;//[nb_inst_decod] +#endif public : SC_IN (Ttype_t ) ** in_DECOD_IN_TYPE ;//[nb_inst_decod] public : SC_IN (Toperation_t ) ** in_DECOD_IN_OPERATION ;//[nb_inst_decod] @@ -103,4 +106,7 @@ public : SC_OUT(Tcontext_t ) ** out_DECOD_OUT_CONTEXT_ID ;//[nb_inst_decod] public : SC_OUT(Tdepth_t ) ** out_DECOD_OUT_DEPTH ;//[nb_inst_decod] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_DECOD_OUT_INSTRUCTION ;//[nb_inst_decod] +#endif public : SC_OUT(Ttype_t ) ** out_DECOD_OUT_TYPE ;//[nb_inst_decod] public : SC_OUT(Toperation_t ) ** out_DECOD_OUT_OPERATION ;//[nb_inst_decod] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 137) @@ -33,4 +33,7 @@ public : Tcontext_t * _context_id ; public : Tdepth_t * _depth ; +#ifdef STATISTICS + public : uint32_t * _instruction ; +#endif public : Ttype_t * _type ; public : Toperation_t * _operation ; @@ -62,4 +65,7 @@ ALLOC1(_context_id ,Tcontext_t ,_nb_inst); ALLOC1(_depth ,Tdepth_t ,_nb_inst); +#ifdef STATISTICS + ALLOC1(_instruction ,uint32_t ,_nb_inst); +#endif ALLOC1(_type ,Ttype_t ,_nb_inst); ALLOC1(_operation ,Toperation_t ,_nb_inst); @@ -94,4 +100,7 @@ DELETE1(_context_id ,_nb_inst); DELETE1(_depth ,_nb_inst); +#ifdef STATISTICS + DELETE1(_instruction ,_nb_inst); +#endif DELETE1(_type ,_nb_inst); DELETE1(_operation ,_nb_inst); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 137) @@ -63,4 +63,7 @@ ALLOC1_SIGNAL_IN ( in_DECOD_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_IN ( in_DECOD_IN_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_IN ( in_DECOD_IN_INSTRUCTION ,"instruction" ,uint32_t ,32 ); +#endif ALLOC1_SIGNAL_IN ( in_DECOD_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_IN ( in_DECOD_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); @@ -97,4 +100,7 @@ ALLOC1_SIGNAL_OUT(out_DECOD_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_DECOD_OUT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT(out_DECOD_OUT_INSTRUCTION ,"instruction" ,uint32_t ,32 ); +#endif ALLOC1_SIGNAL_OUT(out_DECOD_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_DECOD_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 137) @@ -33,4 +33,7 @@ DELETE1_SIGNAL( in_DECOD_IN_CONTEXT_ID ,_param->_nb_inst_decod,_param->_size_context_id ); DELETE1_SIGNAL( in_DECOD_IN_DEPTH ,_param->_nb_inst_decod,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL( in_DECOD_IN_INSTRUCTION ,_param->_nb_inst_decod,32); +#endif DELETE1_SIGNAL( in_DECOD_IN_TYPE ,_param->_nb_inst_decod,_param->_size_type ); DELETE1_SIGNAL( in_DECOD_IN_OPERATION ,_param->_nb_inst_decod,_param->_size_operation ); @@ -60,4 +63,7 @@ DELETE1_SIGNAL(out_DECOD_OUT_CONTEXT_ID ,_param->_nb_inst_decod,_param->_size_context_id ); DELETE1_SIGNAL(out_DECOD_OUT_DEPTH ,_param->_nb_inst_decod,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_DECOD_OUT_INSTRUCTION ,_param->_nb_inst_decod,32); +#endif DELETE1_SIGNAL(out_DECOD_OUT_TYPE ,_param->_nb_inst_decod,_param->_size_type ); DELETE1_SIGNAL(out_DECOD_OUT_OPERATION ,_param->_nb_inst_decod,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 137) @@ -55,4 +55,7 @@ if (_param->_have_port_depth) PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE[num_bank].front()->_depth [0]); +#ifdef STATISTICS + PORT_WRITE(out_DECOD_OUT_INSTRUCTION [i],reg_QUEUE[num_bank].front()->_instruction [0]); +#endif PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE[num_bank].front()->_type [0]); PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE[num_bank].front()->_operation [0]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 137) @@ -74,4 +74,7 @@ entry->_context_id [0] = context; entry->_depth [0] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; +#ifdef STATISTICS + entry->_instruction [0] = PORT_READ(in_DECOD_IN_INSTRUCTION [i]); +#endif entry->_type [0] = PORT_READ(in_DECOD_IN_TYPE [i]); entry->_operation [0] = PORT_READ(in_DECOD_IN_OPERATION [i]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 137) @@ -55,4 +55,7 @@ if (_param->_have_port_depth) PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE->front()->_depth [index]); +#ifdef STATISTICS + PORT_WRITE(out_DECOD_OUT_INSTRUCTION [i],reg_QUEUE->front()->_instruction [index]); +#endif PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE->front()->_type [index]); PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE->front()->_operation [index]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 137) @@ -77,4 +77,7 @@ entry->_context_id [i] = context; entry->_depth [i] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; +#ifdef STATISTICS + entry->_instruction [i] = PORT_READ(in_DECOD_IN_INSTRUCTION [i]); +#endif entry->_type [i] = PORT_READ(in_DECOD_IN_TYPE [i]); entry->_operation [i] = PORT_READ(in_DECOD_IN_OPERATION [i]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp (revision 137) @@ -42,32 +42,4 @@ test(); - _size_internal_queue = - (1 + // _val - _size_context_id + // _context_id - _size_depth + // _depth - _size_type + // _type - _size_operation + // _operation - 1 + // _no_execute - 1 + // _is_delay_slot -#ifdef DEBUG - _size_instruction_address + // _address -#endif - _size_instruction_address + // _address_next - 1 + // _has_immediat - _size_general_data + // _immediat - 1 + // _read_ra - _size_general_register_logic + // _num_reg_ra - 1 + // _read_rb - _size_general_register_logic + // _num_reg_rb - 1 + // _read_rc - _size_special_register_logic + // _num_reg_rc - 1 + // _write_rd - _size_general_register_logic + // _num_reg_rd - 1 + // _write_re - _size_special_register_logic + // _num_reg_re - _size_exception_use + // _exception_use - _size_exception_decod // _exception - ) * _nb_inst_decod; - if (is_toplevel) { @@ -111,4 +83,32 @@ log_begin(Decod_queue,FUNCTION); + _size_internal_queue = + (1 + // _val + _size_context_id + // _context_id + _size_depth + // _depth + _size_type + // _type + _size_operation + // _operation + 1 + // _no_execute + 1 + // _is_delay_slot +#ifdef DEBUG + _size_instruction_address + // _address +#endif + _size_instruction_address + // _address_next + 1 + // _has_immediat + _size_general_data + // _immediat + 1 + // _read_ra + _size_general_register_logic + // _num_reg_ra + 1 + // _read_rb + _size_general_register_logic + // _num_reg_rb + 1 + // _read_rc + _size_special_register_logic + // _num_reg_rc + 1 + // _write_rd + _size_general_register_logic + // _num_reg_rd + 1 + // _write_re + _size_special_register_logic + // _num_reg_re + _size_exception_use + // _exception_use + _size_exception_decod // _exception + ) * _nb_inst_decod; + log_end(Decod_queue,FUNCTION); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 137) @@ -83,4 +83,7 @@ public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ;//[nb_inst_decod] public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ;//[nb_inst_decod] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_DECOD_INSTRUCTION ;//[nb_inst_decod] +#endif public : SC_OUT(Ttype_t ) ** out_DECOD_TYPE ;//[nb_inst_decod] public : SC_OUT(Toperation_t ) ** out_DECOD_OPERATION ;//[nb_inst_decod] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 137) @@ -80,4 +80,7 @@ ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,uint32_t ,32); +#endif ALLOC1_SIGNAL_OUT(out_DECOD_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); @@ -293,4 +296,8 @@ COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_DEPTH" , dest, "in_DECOD_IN_"+toString(i)+"_DEPTH" ); +#ifdef STATISTICS + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_INSTRUCTION" , + dest, "in_DECOD_IN_"+toString(i)+"_INSTRUCTION" ); +#endif COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_TYPE" , dest, "in_DECOD_IN_"+toString(i)+"_TYPE" ); @@ -483,4 +490,8 @@ PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_DEPTH" , dest,"out_DECOD_" +toString(i)+"_DEPTH" ); +#ifdef STATISTICS + PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_INSTRUCTION" , + dest,"out_DECOD_" +toString(i)+"_INSTRUCTION" ); +#endif PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_TYPE" , dest,"out_DECOD_" +toString(i)+"_TYPE" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 137) @@ -43,4 +43,7 @@ DELETE1_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod,_param->_size_context_id ); DELETE1_SIGNAL(out_DECOD_DEPTH ,_param->_nb_inst_decod,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_inst_decod,32); +#endif DELETE1_SIGNAL(out_DECOD_TYPE ,_param->_nb_inst_decod,_param->_size_type ); DELETE1_SIGNAL(out_DECOD_OPERATION ,_param->_nb_inst_decod,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp (revision 137) @@ -243,5 +243,5 @@ vhdl->set_body (3,"reg_ADDRESS <= var_ADDRESS;"); if(_param->_have_port_inst_ifetch_ptr) - // vhdl->set_body (3,"reg_INST_IFETCH_PTR ("+reg_ptr_write+") <= var_INST_IFETCH_PTR;"); + //vhdl->set_body (3,"reg_INST_IFETCH_PTR ("+reg_ptr_write+") <= var_INST_IFETCH_PTR;"); vhdl->set_body (3,"reg_INST_IFETCH_PTR <= var_INST_IFETCH_PTR;"); // vhdl->set_body (3,"reg_BRANCH_STATE ("+reg_ptr_write+") <= var_BRANCH_STATE;"); @@ -288,5 +288,11 @@ vhdl->set_body (1,"out_ADDRESS_ACK <= internal_ADDRESS_ACK;"); if (_param->_have_port_ifetch_queue_ptr) { - vhdl->set_body (1,"out_ADDRESS_IFETCH_QUEUE_ID <= reg_PTR_WRITE;"); + uint32_t diff_size = _param->_size_ifetch_queue_ptr - log2(_param->_size_queue); + std::string complete_size = ""; + + if (diff_size > 0) + complete_size = std_logic_cst(diff_size,0)+" &"; + + vhdl->set_body (1,"out_ADDRESS_IFETCH_QUEUE_ID <= "+complete_size+" reg_PTR_WRITE;"); } } @@ -303,12 +309,15 @@ vhdl->set_body(0,"out_DECOD_"+toString(j)+"_VAL <= internal_DECOD_"+toString(j)+"_VAL;"); vhdl->set_body(0,"out_DECOD_"+toString(j)+"_INSTRUCTION <= reg_DATA("+reg_ptr_read+")("+toString(j)+") ;"); + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_ADDRESS <= reg_ADDRESS("+reg_ptr_read+")+"+std_logic_cst(_param->_size_instruction,j)+";"); + if (_param->_have_port_inst_ifetch_ptr) + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_BRANCH_STATE <= reg_BRANCH_STATE("+reg_ptr_read+") when reg_INST_IFETCH_PTR("+reg_ptr_read+") = "+std_logic_cst(_param->_size_inst_ifetch_ptr,j)+" else "+std_logic_cst(_param->_size_branch_state,BRANCH_STATE_NONE)+";"); + else + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_BRANCH_STATE <= reg_BRANCH_STATE("+reg_ptr_read+");"); + + if (_param->_have_port_depth) + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID <= reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_read+");"); + vhdl->set_body(0,"out_DECOD_"+toString(j)+"_EXCEPTION <= reg_EXCEPTION("+reg_ptr_read+");"); + } - vhdl->set_body(0,"out_DECOD_ADDRESS <= reg_ADDRESS("+reg_ptr_read+");"); - if (_param->_have_port_inst_ifetch_ptr) - vhdl->set_body(0,"out_DECOD_INST_IFETCH_PTR <= reg_INST_IFETCH_PTR("+reg_ptr_read+");"); - vhdl->set_body(0,"out_DECOD_BRANCH_STATE <= reg_BRANCH_STATE("+reg_ptr_read+");"); - if (_param->_have_port_depth) - vhdl->set_body(0,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID <= reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_read+");"); - vhdl->set_body(0,"out_DECOD_EXCEPTION <= reg_EXCEPTION("+reg_ptr_read+");"); } vhdl->set_body(0,""); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp (revision 137) @@ -62,5 +62,5 @@ vhdl->set_type ("Tenable ","array ("+toString(_param->_size_queue-1)+" downto 0) of Tcase_enable"); vhdl->set_signal ("reg_INSTRUCTION_ENABLE ", "Tenable"); - vhdl->set_type ("Tadress ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_instruction)); + vhdl->set_type ("Tadress ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_instruction_address)); vhdl->set_signal ("reg_ADDRESS ", "Tadress"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h (revision 137) @@ -90,4 +90,7 @@ public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ;//[sum_inst_decod] public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ;//[sum_inst_decod] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_DECOD_INSTRUCTION ;//[sum_inst_decod] +#endif public : SC_OUT(Ttype_t ) ** out_DECOD_TYPE ;//[sum_inst_decod] public : SC_OUT(Toperation_t ) ** out_DECOD_OPERATION ;//[sum_inst_decod] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 137) @@ -98,4 +98,7 @@ ALLOC1_SIGNAL_OUT (out_DECOD_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT (out_DECOD_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT (out_DECOD_INSTRUCTION ,"INSTRUCTION" ,uint32_t ,32); +#endif ALLOC1_SIGNAL_OUT (out_DECOD_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT (out_DECOD_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ); @@ -700,15 +703,16 @@ for (uint32_t j=0; j<_param->_decod_unit_nb_context[i]; ++j) - { - dest = _name+"_glue"; -#ifdef POSITION - _component->interface_map (src ,"ifetch_"+toString(j), - dest,"ifetch_"+toString(i)+"_"+toString(j)); -#endif - - if (_param->_have_port_context_id) - COMPONENT_MAP(_component,src , "in_IFETCH_"+toString(j) +"_CONTEXT_ID", - dest,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_DECOD_UNIT_CONTEXT_ID"); - } + for (uint32_t k=0; k<_param->_nb_inst_fetch [j];++k) + { + dest = _name+"_glue"; +#ifdef POSITION + _component->interface_map (src ,"ifetch_"+toString(j)+"_"+toString(k), + dest,"ifetch_"+toString(i)+"_"+toString(j)); +#endif + + if (_param->_have_port_context_id) + COMPONENT_MAP(_component,src , "in_IFETCH_"+toString(j)+"_"+toString(k)+"_CONTEXT_ID", + dest,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_DECOD_UNIT_CONTEXT_ID"); + } // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -729,4 +733,8 @@ PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_DEPTH" , dest,"out_DECOD_"+toString(x)+"_DEPTH" ); +#ifdef STATISTICS + PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_INSTRUCTION" , + dest,"out_DECOD_"+toString(x)+"_INSTRUCTION" ); +#endif PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_TYPE" , dest,"out_DECOD_"+toString(x)+"_TYPE" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp (revision 137) @@ -45,4 +45,7 @@ DELETE1_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_sum_inst_decod,_param->_size_context_id ); DELETE1_SIGNAL(out_DECOD_DEPTH ,_param->_sum_inst_decod,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_sum_inst_decod,32); +#endif DELETE1_SIGNAL(out_DECOD_TYPE ,_param->_sum_inst_decod,_param->_size_type ); DELETE1_SIGNAL(out_DECOD_OPERATION ,_param->_sum_inst_decod,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 137) @@ -61,4 +61,5 @@ public : counter_t ** _stat_nb_inst_retire_ok ;//[nb_thread] public : counter_t ** _stat_nb_inst_retire_ko ;//[nb_thread] + public : counter_t ** _stat_nb_inst_instruction ;//[nb_instruction] public : counter_t ** _stat_nb_inst_type ;//[nb_type] public : counter_t ** _stat_bank_nb_inst ;//[nb_bank] @@ -87,4 +88,7 @@ //public : SC_IN (Tcontext_t ) *** in_INSERT_RENAME_UNIT_ID ;//[nb_rename_unit][nb_inst_insert] public : SC_IN (Tdepth_t ) *** in_INSERT_DEPTH ;//[nb_rename_unit][nb_inst_insert] +#ifdef STATISTICS + public : SC_IN (uint32_t ) *** in_INSERT_INSTRUCTION ;//[nb_rename_unit][nb_inst_insert] +#endif public : SC_IN (Ttype_t ) *** in_INSERT_TYPE ;//[nb_rename_unit][nb_inst_insert] public : SC_IN (Toperation_t ) *** in_INSERT_OPERATION ;//[nb_rename_unit][nb_inst_insert] @@ -104,5 +108,7 @@ public : SC_IN (Tgeneral_address_t ) *** in_INSERT_NUM_REG_RA_LOG ;//[nb_rename_unit][nb_inst_insert] public : SC_IN (Tgeneral_address_t ) *** in_INSERT_NUM_REG_RA_PHY ;//[nb_rename_unit][nb_inst_insert] +#endif public : SC_IN (Tcontrol_t ) *** in_INSERT_READ_RB ;//[nb_rename_unit][nb_inst_insert] +#ifdef DEBUG public : SC_IN (Tgeneral_address_t ) *** in_INSERT_NUM_REG_RB_LOG ;//[nb_rename_unit][nb_inst_insert] public : SC_IN (Tgeneral_address_t ) *** in_INSERT_NUM_REG_RB_PHY ;//[nb_rename_unit][nb_inst_insert] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 137) @@ -85,4 +85,7 @@ public : uint32_t rename_unit_id ; public : Tdepth_t depth ; +#ifdef STATISTICS + public : uint32_t instruction ; +#endif public : Ttype_t type ; public : Toperation_t operation ; @@ -97,5 +100,7 @@ public : Tgeneral_address_t num_reg_ra_log ; public : Tgeneral_address_t num_reg_ra_phy ; +#endif public : Tcontrol_t read_rb ; +#ifdef DEBUG public : Tgeneral_address_t num_reg_rb_log ; public : Tgeneral_address_t num_reg_rb_phy ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 137) @@ -66,4 +66,7 @@ // _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_ID ,"rename_unit_id" ,Tcontext_t ,_param->_size_rename_unit_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#ifdef STATISTICS + _ALLOC2_SIGNAL_IN ( in_INSERT_INSTRUCTION ,"instruction" ,uint32_t ,32 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#endif _ALLOC2_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); @@ -76,5 +79,5 @@ _ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS_NEXT ,"address_next" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); - _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE ,"exception_use" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); + _ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE ,"exception_use" ,Texception_t ,_param->_size_exception_use ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); @@ -83,5 +86,7 @@ _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#endif _ALLOC2_SIGNAL_IN ( in_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#ifdef DEBUG _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 137) @@ -35,4 +35,7 @@ // DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_ID ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_rename_unit_id ); DELETE2_SIGNAL( in_INSERT_DEPTH ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_depth ); +#ifdef STATISTICS + DELETE2_SIGNAL( in_INSERT_INSTRUCTION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],32); +#endif DELETE2_SIGNAL( in_INSERT_TYPE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type ); DELETE2_SIGNAL( in_INSERT_OPERATION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation ); @@ -52,5 +55,7 @@ DELETE2_SIGNAL( in_INSERT_NUM_REG_RA_LOG ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register_logic); DELETE2_SIGNAL( in_INSERT_NUM_REG_RA_PHY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register ); +#endif DELETE2_SIGNAL( in_INSERT_READ_RB ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); +#ifdef DEBUG DELETE2_SIGNAL( in_INSERT_NUM_REG_RB_LOG ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register_logic); DELETE2_SIGNAL( in_INSERT_NUM_REG_RB_PHY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp (revision 137) @@ -52,7 +52,8 @@ _stat_nb_inst_retire_ok = new counter_t * [_param->_nb_thread]; _stat_nb_inst_retire_ko = new counter_t * [_param->_nb_thread]; + _stat_nb_inst_instruction = new counter_t * [NB_INSTRUCTION]; _stat_nb_inst_type = new counter_t * [_param->_nb_type]; _stat_bank_nb_inst = new counter_t * [_param->_nb_bank]; - + { std::string sum_nb_inst_insert = "0"; @@ -129,5 +130,5 @@ for (uint32_t i=0; i<_param->_nb_type; i++) - if (is_type_valid(i)) + if (is_type_valid(i)) { _stat_nb_inst_type [i] = _stat->create_variable("nb_inst_type_"+toString(i)); @@ -139,8 +140,26 @@ if (is_type_valid(i)) { - std::string name = toString(static_cast(i)).c_str(); -// _stat->create_expr_average_by_cycle("average_inst_type_"+toString(name), "nb_inst_type_"+toString(i), "", toString(_("Average instruction retire ok by cycle (type %s)"),name.c_str())); - _stat->create_expr_percent ("percent_inst_type_"+toString(name), "nb_inst_type_"+toString(i), sum_nb_inst_type, toString(_("Percent instruction retire ok by cycle (type %s)"),name.c_str())); - } + std::string name = toString(static_cast(i)); + + _stat->create_expr_percent ("percent_type_"+toString(name), "nb_inst_type_"+toString(i), sum_nb_inst_type, toString(_("Percent instruction retire ok by cycle (type %s)"),name.c_str())); + } + } + + { + std::string sum_nb_inst_instruction = "0"; + + for (uint32_t i=0; icreate_variable("nb_inst_instruction_"+toString(i)); + + sum_nb_inst_instruction = "+ nb_inst_instruction_"+toString(i) + " " +sum_nb_inst_instruction; + } + + for (uint32_t i=0; icreate_expr_percent ("percent_instruction_"+toString(name), "nb_inst_instruction_"+toString(i), sum_nb_inst_instruction, toString(_("Percent instruction retire ok by cycle (instruction %s)"),name.c_str())); + } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp (revision 137) @@ -31,4 +31,5 @@ delete [] _stat_nb_inst_retire_ok; delete [] _stat_nb_inst_retire_ko; + delete [] _stat_nb_inst_instruction; delete [] _stat_nb_inst_type; delete [] _stat_bank_nb_inst; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 137) @@ -252,4 +252,7 @@ entry->rename_unit_id = x; entry->depth = (_param->_have_port_depth)?PORT_READ(in_INSERT_DEPTH [x][y]):0; +#ifdef STATISTICS + entry->instruction = PORT_READ(in_INSERT_INSTRUCTION [x][y]); +#endif entry->type = type; entry->operation = operation; @@ -266,5 +269,7 @@ entry->num_reg_ra_log = PORT_READ(in_INSERT_NUM_REG_RA_LOG [x][y]); entry->num_reg_ra_phy = PORT_READ(in_INSERT_NUM_REG_RA_PHY [x][y]); +#endif entry->read_rb = PORT_READ(in_INSERT_READ_RB [x][y]); +#ifdef DEBUG entry->num_reg_rb_log = PORT_READ(in_INSERT_NUM_REG_RB_LOG [x][y]); entry->num_reg_rb_phy = PORT_READ(in_INSERT_NUM_REG_RB_PHY [x][y]); @@ -287,6 +292,4 @@ #ifdef DEBUG entry->address = PORT_READ(in_INSERT_ADDRESS [x][y]); -#else - entry->address = 0; // not necessary #endif entry->address_next = PORT_READ(in_INSERT_ADDRESS_NEXT [x][y]); @@ -823,6 +826,9 @@ if (retire_ok) { - (*_stat_nb_inst_retire_ok [num_thread]) ++; - (*_stat_nb_inst_type [type] ) ++; + uint32_t instruction = entry->instruction; + + (*_stat_nb_inst_retire_ok [num_thread] ) ++; + (*_stat_nb_inst_instruction [instruction]) ++; + (*_stat_nb_inst_type [type] ) ++; } else @@ -1048,9 +1054,9 @@ // Read information rob_state_t state = entry->state; - Tdepth_t depth = entry->depth; - - Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[front_end_id][context_id]):0; - Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0; - Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]); +// Tdepth_t depth = entry->depth; + +// Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[front_end_id][context_id]):0; +// Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0; +// Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]); // is a valid instruction ? @@ -1088,8 +1094,8 @@ log_printf(TRACE,Commit_unit,FUNCTION," * is_valid : %d ((depth == depth_min) and not flush)",is_valid); - log_printf(TRACE,Commit_unit,FUNCTION," * depth : %d",depth ); - log_printf(TRACE,Commit_unit,FUNCTION," * depth_min : %d",depth_min); - log_printf(TRACE,Commit_unit,FUNCTION," * depth_max : %d",depth_max); - log_printf(TRACE,Commit_unit,FUNCTION," * depth_full : %d",depth_full); +// log_printf(TRACE,Commit_unit,FUNCTION," * depth : %d",depth ); +// log_printf(TRACE,Commit_unit,FUNCTION," * depth_min : %d",depth_min); +// log_printf(TRACE,Commit_unit,FUNCTION," * depth_max : %d",depth_max); +// log_printf(TRACE,Commit_unit,FUNCTION," * depth_full : %d",depth_full); log_printf(TRACE,Commit_unit,FUNCTION," * speculative : %d",speculative); log_printf(TRACE,Commit_unit,FUNCTION," * flush : %d",flush); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h (revision 137) @@ -119,5 +119,7 @@ public : SC_OUT(Tcontrol_t ) *** out_INSERT_COMMIT_UNIT_READ_RA ;//[nb_rename_unit][nb_inst_insert] public : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY ;//[nb_rename_unit][nb_inst_insert] +#endif public : SC_OUT(Tcontrol_t ) *** out_INSERT_COMMIT_UNIT_READ_RB ;//[nb_rename_unit][nb_inst_insert] +#ifdef DEBUG public : SC_OUT(Tgeneral_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY ;//[nb_rename_unit][nb_inst_insert] public : SC_OUT(Tcontrol_t ) *** out_INSERT_COMMIT_UNIT_READ_RC ;//[nb_rename_unit][nb_inst_insert] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp (revision 137) @@ -122,5 +122,7 @@ _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RA ,"COMMIT_UNIT_READ_RA" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY ,"COMMIT_UNIT_NUM_REG_RA_PHY" ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#endif _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RB ,"COMMIT_UNIT_READ_RB" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); +#ifdef DEBUG _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY ,"COMMIT_UNIT_NUM_REG_RB_PHY" ,Tgeneral_address_t ,_param->_size_general_register,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); _ALLOC2_SIGNAL_OUT(out_INSERT_COMMIT_UNIT_READ_RC ,"COMMIT_UNIT_READ_RC" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp (revision 137) @@ -77,5 +77,7 @@ DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register); +#endif DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RB ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); +#ifdef DEBUG DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_general_register); DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RC ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp (revision 137) @@ -76,5 +76,7 @@ PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RA [i][j],READ_RA ); PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY [i][j],NUM_REG_RA_PHY ); +#endif PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RB [i][j],READ_RB ); +#ifdef DEBUG PORT_WRITE(out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY [i][j],NUM_REG_RB_PHY ); PORT_WRITE(out_INSERT_COMMIT_UNIT_READ_RC [i][j],READ_RC ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/include/Dependency_checking_unit.h (revision 137) @@ -87,8 +87,8 @@ // ~~~~~[ Interface "rename_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -// public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_VAL ;//[nb_inst_insert] -// public : SC_IN (Tcontrol_t ) ** in_RENAME_OUT_ACK ;//[nb_inst_insert] - public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_FRONT_END_ID ;//[nb_inst_insert] - public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_CONTEXT_ID ;//[nb_inst_insert] +//public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_VAL ;//[nb_inst_insert] +//public : SC_IN (Tcontrol_t ) ** in_RENAME_OUT_ACK ;//[nb_inst_insert] +//public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_FRONT_END_ID ;//[nb_inst_insert] +//public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_CONTEXT_ID ;//[nb_inst_insert] public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_READ_RA ;//[nb_inst_insert] #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_allocation.cpp (revision 137) @@ -91,6 +91,6 @@ // ALLOC1_VALACK_OUT(out_RENAME_OUT_VAL ,VAL); // ALLOC1_VALACK_IN ( in_RENAME_OUT_ACK ,ACK); - ALLOC1_SIGNAL_OUT(out_RENAME_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); - ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); +// ALLOC1_SIGNAL_OUT(out_RENAME_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); +// ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_RENAME_OUT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_deallocation.cpp (revision 137) @@ -54,6 +54,6 @@ // DELETE1_SIGNAL(out_RENAME_OUT_VAL ,_param->_nb_inst_insert,1); // DELETE1_SIGNAL( in_RENAME_OUT_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_RENAME_OUT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); - DELETE1_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); +// DELETE1_SIGNAL(out_RENAME_OUT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); +// DELETE1_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); DELETE1_SIGNAL(out_RENAME_OUT_READ_RA ,_param->_nb_inst_insert,1 ); #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp (revision 137) @@ -197,8 +197,8 @@ // PORT_WRITE(out_RENAME_OUT_VAL [i], val [i]); // PORT_WRITE(out_RENAME_IN_ACK [i], ack [i]); - if (_param->_have_port_front_end_id) - PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i], front_end_id [i]); - if (_param->_have_port_context_id) - PORT_WRITE(out_RENAME_OUT_CONTEXT_ID [i], context_id [i]); +// if (_param->_have_port_front_end_id) +// PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i], front_end_id [i]); +// if (_param->_have_port_context_id) +// PORT_WRITE(out_RENAME_OUT_CONTEXT_ID [i], context_id [i]); PORT_WRITE(out_RENAME_OUT_READ_RA [i], read_ra [i]); #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp (revision 137) @@ -120,4 +120,5 @@ #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true) + if (0) { uint32_t limit = 4; @@ -175,5 +176,5 @@ #ifdef DEBUG_TEST - if (1) + if (0) for (uint32_t i=0; i<_param->_nb_bank; ++i) { Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 137) @@ -86,6 +86,6 @@ public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert] public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert] - public : SC_OUT(Tcontext_t ) ** out_INSERT_FRONT_END_ID ;//[nb_inst_insert] - public : SC_OUT(Tcontext_t ) ** out_INSERT_CONTEXT_ID ;//[nb_inst_insert] +//public : SC_OUT(Tcontext_t ) ** out_INSERT_FRONT_END_ID ;//[nb_inst_insert] +//public : SC_OUT(Tcontext_t ) ** out_INSERT_CONTEXT_ID ;//[nb_inst_insert] public : SC_OUT(Tcontrol_t ) ** out_INSERT_READ_RA ;//[nb_inst_insert] #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 137) @@ -84,6 +84,6 @@ ALLOC1_VALACK_OUT(out_INSERT_VAL ,VAL); ALLOC1_VALACK_IN ( in_INSERT_ACK ,ACK); - ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); - ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); +// ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); +// ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); #ifdef DEBUG @@ -575,10 +575,10 @@ #endif - if (_param->_have_port_front_end_id) - PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_FRONT_END_ID" , - dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ); - if (_param->_have_port_context_id) - PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_CONTEXT_ID" , - dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); +// if (_param->_have_port_front_end_id) +// PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_FRONT_END_ID" , +// dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ); +// if (_param->_have_port_context_id) +// PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_CONTEXT_ID" , +// dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); #ifdef DEBUG PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NUM_REG_RA_LOG" , Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 137) @@ -46,6 +46,6 @@ DELETE1_SIGNAL(out_INSERT_VAL ,_param->_nb_inst_insert,1); DELETE1_SIGNAL( in_INSERT_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); - DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); +// DELETE1_SIGNAL(out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); +// DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); DELETE1_SIGNAL(out_INSERT_READ_RA ,_param->_nb_inst_insert,1 ); #ifdef DEBUG Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 137) @@ -72,4 +72,7 @@ public : SC_IN (Tcontext_t ) *** in_RENAME_IN_CONTEXT_ID ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tdepth_t ) *** in_RENAME_IN_DEPTH ;//[nb_front_end][nb_inst_decod] +#ifdef STATISTICS + public : SC_IN (uint32_t ) *** in_RENAME_IN_INSTRUCTION ;//[nb_front_end][nb_inst_decod] +#endif public : SC_IN (Ttype_t ) *** in_RENAME_IN_TYPE ;//[nb_front_end][nb_inst_decod] public : SC_IN (Toperation_t ) *** in_RENAME_IN_OPERATION ;//[nb_front_end][nb_inst_decod] @@ -103,4 +106,7 @@ public : SC_OUT(Tcontext_t ) ** out_RENAME_OUT_CONTEXT_ID ;//[nb_inst_rename] public : SC_OUT(Tdepth_t ) ** out_RENAME_OUT_DEPTH ;//[nb_inst_rename] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_RENAME_OUT_INSTRUCTION ;//[nb_inst_rename] +#endif public : SC_OUT(Ttype_t ) ** out_RENAME_OUT_TYPE ;//[nb_inst_rename] public : SC_OUT(Toperation_t ) ** out_RENAME_OUT_OPERATION ;//[nb_inst_rename] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 137) @@ -65,4 +65,7 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_inst_decod[it1]); +#ifdef STATISTICS + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_INSTRUCTION ,"instruction" ,uint32_t ,32 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); +#endif _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_front_end, _param->_nb_inst_decod[it1]); @@ -102,4 +105,7 @@ ALLOC1_SIGNAL_OUT(out_RENAME_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_RENAME_OUT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_INSTRUCTION ,"instruction" ,uint32_t ,32); +#endif ALLOC1_SIGNAL_OUT(out_RENAME_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_RENAME_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp (revision 137) @@ -34,4 +34,7 @@ DELETE2_SIGNAL( in_RENAME_IN_CONTEXT_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id ); DELETE2_SIGNAL( in_RENAME_IN_DEPTH ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth ); +#ifdef STATISTICS + DELETE2_SIGNAL( in_RENAME_IN_INSTRUCTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],32); +#endif DELETE2_SIGNAL( in_RENAME_IN_TYPE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type ); DELETE2_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); @@ -64,6 +67,9 @@ DELETE1_SIGNAL(out_RENAME_OUT_CONTEXT_ID ,_param->_nb_inst_rename,_param->_size_context_id ); DELETE1_SIGNAL(out_RENAME_OUT_DEPTH ,_param->_nb_inst_rename,_param->_size_depth ); - DELETE1_SIGNAL(out_RENAME_OUT_TYPE ,_param->_nb_inst_rename,_param->_size_type ); - DELETE1_SIGNAL(out_RENAME_OUT_OPERATION ,_param->_nb_inst_rename,_param->_size_operation ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_RENAME_OUT_INSTRUCTION ,_param->_nb_inst_rename,32); +#endif + DELETE1_SIGNAL(out_RENAME_OUT_TYPE ,_param->_nb_inst_rename,_param->_size_type ); + DELETE1_SIGNAL(out_RENAME_OUT_OPERATION ,_param->_nb_inst_rename,_param->_size_operation ); DELETE1_SIGNAL(out_RENAME_OUT_NO_EXECUTE ,_param->_nb_inst_rename,1 ); DELETE1_SIGNAL(out_RENAME_OUT_LAST_EVENT ,_param->_nb_inst_rename,1 ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 137) @@ -103,4 +103,7 @@ if (_param->_have_port_depth) PORT_WRITE(out_RENAME_OUT_DEPTH [i],PORT_READ(in_RENAME_IN_DEPTH [x][y])); +#ifdef STATISTICS + PORT_WRITE(out_RENAME_OUT_INSTRUCTION [i],PORT_READ(in_RENAME_IN_INSTRUCTION [x][y])); +#endif PORT_WRITE(out_RENAME_OUT_TYPE [i],PORT_READ(in_RENAME_IN_TYPE [x][y])); PORT_WRITE(out_RENAME_OUT_OPERATION [i],PORT_READ(in_RENAME_IN_OPERATION [x][y])); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h (revision 137) @@ -74,4 +74,7 @@ public : SC_IN (Tcontext_t ) *** in_RENAME_IN_CONTEXT_ID ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tdepth_t ) *** in_RENAME_IN_DEPTH ;//[nb_front_end][nb_inst_decod] +#ifdef STATISTICS + public : SC_IN (uint32_t ) *** in_RENAME_IN_INSTRUCTION ;//[nb_front_end][nb_inst_decod] +#endif public : SC_IN (Ttype_t ) *** in_RENAME_IN_TYPE ;//[nb_front_end][nb_inst_decod] public : SC_IN (Toperation_t ) *** in_RENAME_IN_OPERATION ;//[nb_front_end][nb_inst_decod] @@ -105,4 +108,7 @@ public : SC_OUT(Tcontext_t ) ** out_INSERT_CONTEXT_ID ;//[nb_inst_insert] public : SC_OUT(Tdepth_t ) ** out_INSERT_DEPTH ;//[nb_inst_insert] +#ifdef STATISTICS + public : SC_OUT(uint32_t ) ** out_INSERT_INSTRUCTION ;//[nb_inst_insert] +#endif public : SC_OUT(Ttype_t ) ** out_INSERT_TYPE ;//[nb_inst_insert] public : SC_OUT(Toperation_t ) ** out_INSERT_OPERATION ;//[nb_inst_insert] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp (revision 137) @@ -65,4 +65,7 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_inst_decod[it1]); +#ifdef STATISTICS + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_INSTRUCTION ,"instruction" ,uint32_t ,32 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); +#endif _ALLOC2_SIGNAL_IN ( in_RENAME_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_front_end, _param->_nb_inst_decod[it1]); @@ -102,4 +105,7 @@ ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); ALLOC1_SIGNAL_OUT(out_INSERT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ); +#ifdef STATISTICS + ALLOC1_SIGNAL_OUT(out_INSERT_INSTRUCTION ,"instruction" ,uint32_t ,32); +#endif ALLOC1_SIGNAL_OUT(out_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); @@ -333,4 +339,8 @@ PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH" , dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH" ); +#ifdef STATISTICS + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_INSTRUCTION" , + dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_INSTRUCTION" ); +#endif PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_TYPE" , dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_TYPE" ); @@ -395,4 +405,8 @@ PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH" , dest,"out_INSERT_" +toString(i)+"_DEPTH" ); +#ifdef STATISTICS + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_INSTRUCTION" , + dest,"out_INSERT_" +toString(i)+"_INSTRUCTION" ); +#endif #ifdef DEBUG PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_ADDRESS" , @@ -552,10 +566,10 @@ PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" , dest, "in_INSERT_"+toString(i)+"_ACK" ); - if (_param->_have_port_front_end_id) - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FRONT_END_ID" , - dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ); - if (_param->_have_port_context_id) - PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_CONTEXT_ID" , - dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); +// if (_param->_have_port_front_end_id) +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_FRONT_END_ID" , +// dest,"out_INSERT_"+toString(i)+"_FRONT_END_ID" ); +// if (_param->_have_port_context_id) +// PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_CONTEXT_ID" , +// dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_READ_RA" , dest,"out_INSERT_"+toString(i)+"_READ_RA" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp (revision 137) @@ -33,4 +33,7 @@ DELETE2_SIGNAL( in_RENAME_IN_CONTEXT_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id ); DELETE2_SIGNAL( in_RENAME_IN_DEPTH ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth ); +#ifdef STATISTICS + DELETE2_SIGNAL( in_RENAME_IN_INSTRUCTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],32); +#endif DELETE2_SIGNAL( in_RENAME_IN_TYPE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type ); DELETE2_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); @@ -63,4 +66,7 @@ DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); DELETE1_SIGNAL(out_INSERT_DEPTH ,_param->_nb_inst_insert,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL(out_INSERT_INSTRUCTION ,_param->_nb_inst_insert,32); +#endif DELETE1_SIGNAL(out_INSERT_TYPE ,_param->_nb_inst_insert,_param->_size_type ); DELETE1_SIGNAL(out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 137) @@ -73,4 +73,7 @@ public : SC_IN (Tcontext_t ) *** in_RENAME_CONTEXT_ID ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tdepth_t ) *** in_RENAME_DEPTH ;//[nb_front_end][nb_inst_decod] +#ifdef STATISTICS + public : SC_IN (uint32_t ) *** in_RENAME_INSTRUCTION ;//[nb_front_end][nb_inst_decod] +#endif public : SC_IN (Ttype_t ) *** in_RENAME_TYPE ;//[nb_front_end][nb_inst_decod] public : SC_IN (Toperation_t ) *** in_RENAME_OPERATION ;//[nb_front_end][nb_inst_decod] Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 137) @@ -62,4 +62,7 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); +#ifdef STATISTICS + _ALLOC2_SIGNAL_IN ( in_RENAME_INSTRUCTION ,"INSTRUCTION" ,uint32_t ,32 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); +#endif _ALLOC2_SIGNAL_IN ( in_RENAME_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); @@ -441,4 +444,8 @@ PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_TYPE" , dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_TYPE" ); +#ifdef STATISTICS + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_INSTRUCTION" , + dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_INSTRUCTION" ); +#endif PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_OPERATION" , dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_OPERATION" ); @@ -514,4 +521,8 @@ #endif +#ifdef STATISTICS + COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_INSTRUCTION" , + dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_INSTRUCTION" ); +#endif if (_param->_have_port_depth) COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_DEPTH" , @@ -798,6 +809,8 @@ COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA_PHY" , dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RA_PHY" ); +#endif COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RB" , dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RB" ); +#ifdef DEBUG COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB_PHY" , dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RB_PHY" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 137) @@ -32,4 +32,7 @@ DELETE2_SIGNAL( in_RENAME_CONTEXT_ID ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_context_id ); DELETE2_SIGNAL( in_RENAME_DEPTH ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_depth ); +#ifdef STATISTICS + DELETE2_SIGNAL( in_RENAME_INSTRUCTION ,_param->_nb_front_end,_param->_nb_inst_decod[it1],32); +#endif DELETE2_SIGNAL( in_RENAME_TYPE ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_type ); DELETE2_SIGNAL( in_RENAME_OPERATION ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_operation ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 137) @@ -462,4 +462,8 @@ COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_DEPTH" , dest,"out_DECOD_" +toString(k)+"_DEPTH" ); +#ifdef STATISTICS + COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_INSTRUCTION" , + dest,"out_DECOD_" +toString(k)+"_INSTRUCTION" ); +#endif COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_TYPE" , dest,"out_DECOD_" +toString(k)+"_TYPE" ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Parameters.h (revision 137) @@ -22,7 +22,7 @@ { //-----[ fields ]------------------------------------------------------------ - public : const uint32_t _size_data; - public : const uint32_t _nb_port ; - public : const uint32_t _data_max ; + public : uint32_t _size_data; + public : uint32_t _nb_port ; + public : uint32_t _data_max ; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters.cpp (revision 137) @@ -16,10 +16,12 @@ Parameters::Parameters (uint32_t size_data, uint32_t nb_port ): - behavioural::Parameters("Counter"), - _size_data(size_data), - _nb_port (nb_port ), - _data_max ((1<0)), - _have_port_ptr_read (have_port_ptr_read and (log2(size_queue)>0)), - _size_ptr (log2(size_queue)), - _have_port_ptr (have_port_ptr_write or have_port_ptr_read) + behavioural::Parameters("Queue") { log_printf(FUNC,Queue,FUNCTION,"Begin"); + + _size_queue = size_queue; + _size_data = size_data ; + _nb_port_slot = nb_port_slot; + _have_port_ptr_write = have_port_ptr_write and (log2(size_queue)>0); + _have_port_ptr_read = have_port_ptr_read and (log2(size_queue)>0); + + _size_ptr = log2(size_queue); + _have_port_ptr = have_port_ptr_write or have_port_ptr_read; + test(); log_printf(FUNC,Queue,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info (revision 137) @@ -0,0 +1,11 @@ + +# RegisterFile_Monolithic_0 +target_dep all RegisterFile_Monolithic_0.ngc +target_dep RegisterFile_Monolithic_0.ngc RegisterFile_Monolithic_0.prj +target_dep RegisterFile_Monolithic_0.prj RegisterFile_Monolithic_0_Pack.vhdl RegisterFile_Monolithic_0.vhdl + +# RegisterFile_Monolithic_1 +target_dep all RegisterFile_Monolithic_1.ngc +target_dep RegisterFile_Monolithic_1.ngc RegisterFile_Monolithic_1.prj +target_dep RegisterFile_Monolithic_1.prj RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h (revision 137) @@ -21,13 +21,14 @@ class Parameters : public morpheo::behavioural::Parameters { - public : const uint32_t _nb_port_read ; - public : const uint32_t _nb_port_write; - public : const uint32_t _nb_port_read_write; - public : const uint32_t _nb_word ; - public : const uint32_t _size_word ; - public : const uint32_t _size_address ; - public : const bool _have_port_address; - public : const bool _have_init_value; - public : const std::string _init_value; + public : uint32_t _nb_port_read ; + public : uint32_t _nb_port_write; + public : uint32_t _nb_port_read_write; + public : uint32_t _nb_word ; + public : uint32_t _size_word ; + public : std::string _init_value ; + + public : uint32_t _size_address ; + public : bool _have_port_address; + public : bool _have_init_value; public : Parameters (uint32_t nb_port_read , Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters.cpp (revision 137) @@ -7,4 +7,5 @@ #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h" +#include "Common/include/Log2.h" namespace morpheo { @@ -20,15 +21,17 @@ uint32_t size_word , std::string init_value - ) : - _nb_port_read (nb_port_read ), - _nb_port_write (nb_port_write), - _nb_port_read_write(nb_port_read_write), - _nb_word (nb_word ), - _size_word (size_word ), - _size_address (static_cast(log2(_nb_word))), - _have_port_address (_size_address != 0), - _have_init_value (init_value != ""), - _init_value (init_value) + ) { + _nb_port_read = nb_port_read ; + _nb_port_write = nb_port_write; + _nb_port_read_write = nb_port_read_write; + _nb_word = nb_word ; + _size_word = size_word ; + _init_value = init_value ; + + _size_address = log2(_nb_word); + _have_port_address = _size_address != 0; + _have_init_value = init_value != ""; + test(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_1r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_1r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_1r_1w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +16 16 *2 # nb_bank +1 1 *2 # nb_port_read_by_bank +1 1 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_2r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_2r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/16x_2r_1w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +16 16 *2 # nb_bank +2 2 *2 # nb_port_read_by_bank +1 1 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_10r_5w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_10r_5w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_10r_5w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +2 2 *2 # nb_bank +10 10 *2 # nb_port_read_by_bank +5 5 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_6r_3w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_6r_3w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_6r_3w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +2 2 *2 # nb_bank +6 6 *2 # nb_port_read_by_bank +3 3 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_8r_4w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_8r_4w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/2x_8r_4w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +2 2 *2 # nb_bank +8 8 *2 # nb_port_read_by_bank +4 4 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/32x_1r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/32x_1r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/32x_1r_1w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +32 32 *2 # nb_bank +1 1 *2 # nb_port_read_by_bank +1 1 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_4r_2w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_4r_2w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_4r_2w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +4 4 *2 # nb_bank +4 4 *2 # nb_port_read_by_bank +2 2 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_6r_3w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_6r_3w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_6r_3w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +4 4 *2 # nb_bank +6 6 *2 # nb_port_read_by_bank +3 3 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_8r_4w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_8r_4w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/4x_8r_4w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +4 4 *2 # nb_bank +8 8 *2 # nb_port_read_by_bank +4 4 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_2r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_2r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_2r_1w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +8 8 *2 # nb_bank +2 2 *2 # nb_port_read_by_bank +1 1 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_4r_2w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_4r_2w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/8x_4r_2w.cfg (revision 137) @@ -0,0 +1,9 @@ +RegisterFile_Multi_Banked +12 12 *2 # nb_port_read +6 6 *2 # nb_port_write +256 256 +1 # nb_word +32 32 *2 # size_word +8 8 *2 # nb_bank +4 4 *2 # nb_port_read_by_bank +2 2 *2 # nb_port_write_by_bank +0 0 +1 # crossbar Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info (revision 137) @@ -0,0 +1,56 @@ + +# RegisterFile_Multi_Banked_00 +target_dep all RegisterFile_Multi_Banked_00.ngc +target_dep RegisterFile_Multi_Banked_00.ngc RegisterFile_Multi_Banked_00.prj +target_dep RegisterFile_Multi_Banked_00.prj RegisterFile_Multi_Banked_00_bank_Pack.vhdl RegisterFile_Multi_Banked_00_bank.vhdl RegisterFile_Multi_Banked_00_Pack.vhdl RegisterFile_Multi_Banked_00_select_12_ports_Pack.vhdl RegisterFile_Multi_Banked_00_select_12_ports.vhdl RegisterFile_Multi_Banked_00_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_00_select_6_ports.vhdl RegisterFile_Multi_Banked_00.vhdl + +# RegisterFile_Multi_Banked_01 +target_dep all RegisterFile_Multi_Banked_01.ngc +target_dep RegisterFile_Multi_Banked_01.ngc RegisterFile_Multi_Banked_01.prj +target_dep RegisterFile_Multi_Banked_01.prj RegisterFile_Multi_Banked_01_bank_Pack.vhdl RegisterFile_Multi_Banked_01_bank.vhdl RegisterFile_Multi_Banked_01_Pack.vhdl RegisterFile_Multi_Banked_01_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_01_select_6_ports.vhdl RegisterFile_Multi_Banked_01.vhdl + +# RegisterFile_Multi_Banked_02 +target_dep all RegisterFile_Multi_Banked_02.ngc +target_dep RegisterFile_Multi_Banked_02.ngc RegisterFile_Multi_Banked_02.prj +target_dep RegisterFile_Multi_Banked_02.prj RegisterFile_Multi_Banked_02_bank_Pack.vhdl RegisterFile_Multi_Banked_02_bank.vhdl RegisterFile_Multi_Banked_02_Pack.vhdl RegisterFile_Multi_Banked_02_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_02_select_1_ports.vhdl RegisterFile_Multi_Banked_02_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_02_select_2_ports.vhdl RegisterFile_Multi_Banked_02.vhdl + +# RegisterFile_Multi_Banked_03 +target_dep all RegisterFile_Multi_Banked_03.ngc +target_dep RegisterFile_Multi_Banked_03.ngc RegisterFile_Multi_Banked_03.prj +target_dep RegisterFile_Multi_Banked_03.prj RegisterFile_Multi_Banked_03_bank_Pack.vhdl RegisterFile_Multi_Banked_03_bank.vhdl RegisterFile_Multi_Banked_03_Pack.vhdl RegisterFile_Multi_Banked_03_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_03_select_2_ports.vhdl RegisterFile_Multi_Banked_03.vhdl + +# RegisterFile_Multi_Banked_04 +target_dep all RegisterFile_Multi_Banked_04.ngc +target_dep RegisterFile_Multi_Banked_04.ngc RegisterFile_Multi_Banked_04.prj +target_dep RegisterFile_Multi_Banked_04.prj RegisterFile_Multi_Banked_04_bank_Pack.vhdl RegisterFile_Multi_Banked_04_bank.vhdl RegisterFile_Multi_Banked_04_Pack.vhdl RegisterFile_Multi_Banked_04_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_04_select_1_ports.vhdl RegisterFile_Multi_Banked_04_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_04_select_2_ports.vhdl RegisterFile_Multi_Banked_04.vhdl + +# RegisterFile_Multi_Banked_05 +target_dep all RegisterFile_Multi_Banked_05.ngc +target_dep RegisterFile_Multi_Banked_05.ngc RegisterFile_Multi_Banked_05.prj +target_dep RegisterFile_Multi_Banked_05.prj RegisterFile_Multi_Banked_05_bank_Pack.vhdl RegisterFile_Multi_Banked_05_bank.vhdl RegisterFile_Multi_Banked_05_Pack.vhdl RegisterFile_Multi_Banked_05_select_12_ports_Pack.vhdl RegisterFile_Multi_Banked_05_select_12_ports.vhdl RegisterFile_Multi_Banked_05_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_05_select_6_ports.vhdl RegisterFile_Multi_Banked_05.vhdl + +# RegisterFile_Multi_Banked_06 +target_dep all RegisterFile_Multi_Banked_06.ngc +target_dep RegisterFile_Multi_Banked_06.ngc RegisterFile_Multi_Banked_06.prj +target_dep RegisterFile_Multi_Banked_06.prj RegisterFile_Multi_Banked_06_bank_Pack.vhdl RegisterFile_Multi_Banked_06_bank.vhdl RegisterFile_Multi_Banked_06_Pack.vhdl RegisterFile_Multi_Banked_06_select_3_ports_Pack.vhdl RegisterFile_Multi_Banked_06_select_3_ports.vhdl RegisterFile_Multi_Banked_06.vhdl + +# RegisterFile_Multi_Banked_07 +target_dep all RegisterFile_Multi_Banked_07.ngc +target_dep RegisterFile_Multi_Banked_07.ngc RegisterFile_Multi_Banked_07.prj +target_dep RegisterFile_Multi_Banked_07.prj RegisterFile_Multi_Banked_07_bank_Pack.vhdl RegisterFile_Multi_Banked_07_bank.vhdl RegisterFile_Multi_Banked_07_Pack.vhdl RegisterFile_Multi_Banked_07_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_07_select_2_ports.vhdl RegisterFile_Multi_Banked_07.vhdl + +# RegisterFile_Multi_Banked_08 +target_dep all RegisterFile_Multi_Banked_08.ngc +target_dep RegisterFile_Multi_Banked_08.ngc RegisterFile_Multi_Banked_08.prj +target_dep RegisterFile_Multi_Banked_08.prj RegisterFile_Multi_Banked_08_bank_Pack.vhdl RegisterFile_Multi_Banked_08_bank.vhdl RegisterFile_Multi_Banked_08_Pack.vhdl RegisterFile_Multi_Banked_08_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_08_select_1_ports.vhdl RegisterFile_Multi_Banked_08_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_08_select_2_ports.vhdl RegisterFile_Multi_Banked_08.vhdl + +# RegisterFile_Multi_Banked_09 +target_dep all RegisterFile_Multi_Banked_09.ngc +target_dep RegisterFile_Multi_Banked_09.ngc RegisterFile_Multi_Banked_09.prj +target_dep RegisterFile_Multi_Banked_09.prj RegisterFile_Multi_Banked_09_bank_Pack.vhdl RegisterFile_Multi_Banked_09_bank.vhdl RegisterFile_Multi_Banked_09_Pack.vhdl RegisterFile_Multi_Banked_09_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_09_select_6_ports.vhdl RegisterFile_Multi_Banked_09.vhdl + +# RegisterFile_Multi_Banked_10 +target_dep all RegisterFile_Multi_Banked_10.ngc +target_dep RegisterFile_Multi_Banked_10.ngc RegisterFile_Multi_Banked_10.prj +target_dep RegisterFile_Multi_Banked_10.prj RegisterFile_Multi_Banked_10_bank_Pack.vhdl RegisterFile_Multi_Banked_10_bank.vhdl RegisterFile_Multi_Banked_10_Pack.vhdl RegisterFile_Multi_Banked_10_select_3_ports_Pack.vhdl RegisterFile_Multi_Banked_10_select_3_ports.vhdl RegisterFile_Multi_Banked_10.vhdl + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h (revision 137) @@ -24,33 +24,33 @@ { //-----[ fields ]------------------------------------------------------------ - public : const uint32_t _nb_port_read ; // Global read port - public : const uint32_t _nb_port_write ; // Global write port - public : const uint32_t _nb_word ; - public : const uint32_t _size_word ; - public : const uint32_t _nb_bank ; // Number of bank (All bank is identical) - public : const uint32_t _nb_port_read_by_bank ; // Local read port - public : const uint32_t _nb_port_write_by_bank; // Local write port - public : const Tcrossbar_t _crossbar ; - public : const bool _have_init_value; - public : const std::string _init_value; + public : uint32_t _nb_port_read ; // Global read port + public : uint32_t _nb_port_write ; // Global write port + public : uint32_t _nb_word ; + public : uint32_t _size_word ; + public : uint32_t _nb_bank ; // Number of bank (All bank is identical) + public : uint32_t _nb_port_read_by_bank ; // Local read port + public : uint32_t _nb_port_write_by_bank; // Local write port + public : Tcrossbar_t _crossbar ; + public : std::string _init_value ; - public : const uint32_t _size_address ; - public : const uint32_t _size_address_by_bank ; + public : uint32_t _size_address ; + public : uint32_t _size_address_by_bank ; - public : const uint32_t _bank_shift ; - public : const Taddress_t _bank_mask ; - public : const uint32_t _num_reg_shift ; - public : const Taddress_t _num_reg_mask ; + public : uint32_t _bank_shift ; + public : Taddress_t _bank_mask ; + public : uint32_t _num_reg_shift ; + public : Taddress_t _num_reg_mask ; - public : const uint32_t _nb_word_by_bank ; + public : uint32_t _nb_word_by_bank ; - public : const bool _have_port_address ; - public : const bool _have_bank_port_address; + public : bool _have_port_address ; + public : bool _have_bank_port_address; + public : bool _have_init_value ; // A lot of table to the partial crossbar - public : uint32_t * _link_port_read_to_bank_read ; -//public : uint32_t * _link_port_read_to_num_bank ; - public : uint32_t * _link_port_write_to_bank_write; -//public : uint32_t * _link_port_write_to_num_bank ; + public : uint32_t * _link_port_read_to_bank_read ; +//public : uint32_t * _link_port_read_to_num_bank ; + public : uint32_t * _link_port_write_to_bank_write; +//public : uint32_t * _link_port_write_to_num_bank ; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h (revision 137) @@ -48,4 +48,9 @@ #ifdef STATISTICS public : Stat * _stat; + + private : counter_t * _stat_nb_read; + private : counter_t * _stat_nb_write; + private : counter_t * _stat_nb_conflict_on_read; + private : counter_t * _stat_nb_conflict_on_write; #endif @@ -80,4 +85,9 @@ private : Taddress_t * internal_WRITE_BANK; private : Taddress_t * internal_WRITE_NUM_REG; + +#ifdef STATISTICS + private : bool * internal_READ_VAL; +//private : Taddress_t * internal_READ_BANK; +#endif // function pointer Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp (revision 137) @@ -8,4 +8,5 @@ #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h" #include "Common/include/BitManipulation.h" +#include "Common/include/Log2.h" namespace morpheo { @@ -25,30 +26,32 @@ Tcrossbar_t crossbar , std::string init_value - ): - _nb_port_read (nb_port_read ), - _nb_port_write (nb_port_write ), - _nb_word (nb_word ), - _size_word (size_word ), - _nb_bank (nb_bank ), - _nb_port_read_by_bank (nb_port_read_by_bank ), - _nb_port_write_by_bank (nb_port_write_by_bank), - _crossbar (crossbar ), - _have_init_value (init_value != "" ), - _init_value (init_value ), - _size_address (static_cast(ceil(log2(_nb_word)))), - _size_address_by_bank (_size_address - static_cast(ceil(log2(_nb_bank)))), + ) + { + log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin"); + + _nb_port_read = nb_port_read ; + _nb_port_write = nb_port_write ; + _nb_word = nb_word ; + _size_word = size_word ; + _nb_bank = nb_bank ; + _nb_port_read_by_bank = nb_port_read_by_bank ; + _nb_port_write_by_bank = nb_port_write_by_bank; + _crossbar = crossbar ; + _init_value = init_value ; + + _size_address = log2(_nb_word); + _size_address_by_bank = _size_address - log2(_nb_bank); // Address : [....................] [size_address-1:0] // Bank : [....] [size_address-1:size_address-1-log2(nb_bank)] // num_reg : ]...............] [size_address-2-log2(nb_bank):0] - _bank_shift (_size_address_by_bank), - _bank_mask (gen_mask(static_cast(ceil(log2(_nb_bank))))), - _num_reg_shift (0), - _num_reg_mask (gen_mask(_size_address_by_bank)), - _nb_word_by_bank (_nb_word / _nb_bank), - _have_port_address (_size_address != 0), - _have_bank_port_address(_size_address_by_bank != 0) - { - log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin"); + _bank_shift = _size_address_by_bank; + _bank_mask = gen_mask(log2(_nb_bank)); + _num_reg_shift = 0; + _num_reg_mask = gen_mask(_size_address_by_bank); + _nb_word_by_bank = _nb_word / _nb_bank; + _have_port_address = _size_address != 0; + _have_bank_port_address = _size_address_by_bank != 0; + _have_init_value = init_value != "" ; if (_crossbar == PARTIAL_CROSSBAR) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp (revision 137) @@ -77,4 +77,8 @@ ALLOC1(internal_WRITE_BANK ,Taddress_t,_param->_nb_port_write); ALLOC1(internal_WRITE_NUM_REG,Taddress_t,_param->_nb_port_write); + +#ifdef STATISTICS + ALLOC1(internal_READ_VAL ,bool ,_param->_nb_port_read); +#endif } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_deallocation.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_deallocation.cpp (revision 137) @@ -40,4 +40,9 @@ DELETE1(internal_WRITE_BANK ,_param->_nb_port_write); DELETE1(internal_WRITE_NUM_REG ,_param->_nb_port_write); + +#ifdef STATISTICS + DELETE1(internal_READ_VAL ,_param->_nb_port_read); +#endif + } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp (revision 137) @@ -38,4 +38,8 @@ bool ack = false; +#ifdef STATISTICS + internal_READ_VAL [i] = false; +#endif + log_printf(TRACE,RegisterFile_Multi_Banked,FUNCTION," * read [%d] : %d",i,val); @@ -72,4 +76,7 @@ log_printf(TRACE,RegisterFile_Multi_Banked,FUNCTION," * data : %d",data); +#ifdef STATISTICS + internal_READ_VAL [i] = true; +#endif PORT_WRITE(out_READ_DATA [i], data); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp (revision 137) @@ -37,4 +37,8 @@ bool ack = false; +#ifdef STATISTICS + internal_READ_VAL [i] = false; +#endif + log_printf(TRACE,RegisterFile_Multi_Banked,FUNCTION," * read [%d] : %d",i,val); @@ -73,4 +77,8 @@ log_printf(TRACE,RegisterFile_Multi_Banked,FUNCTION," * data : %d",data); +#ifdef STATISTICS + internal_READ_VAL [i] = true; +#endif + PORT_WRITE(out_READ_DATA [i], data); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_statistics_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_statistics_declaration.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_statistics_declaration.cpp (revision 137) @@ -24,4 +24,20 @@ "RegisterFile_Multi_Banked", param_statistics); + +// _stat_nb_read = _stat->create_variable("nb_read" ); +// _stat_nb_write = _stat->create_variable("nb_write"); +// _stat_nb_conflict_on_read = _stat->create_variable("nb_conflict_on_read" ); +// _stat_nb_conflict_on_write = _stat->create_variable("nb_conflict_on_write"); + + _stat_nb_read = _stat->create_counter("nb_read" ,"",""); + _stat_nb_write = _stat->create_counter("nb_write" ,"",""); + _stat_nb_conflict_on_read = _stat->create_counter("nb_conflict_on_read" ,"",""); + _stat_nb_conflict_on_write = _stat->create_counter("nb_conflict_on_write","",""); + + _stat->create_expr_average_by_cycle("average_read" , "nb_read" , "", _("Average read by cycle" )); + _stat->create_expr_average_by_cycle("average_write", "nb_write", "", _("Average write by cycle")); + + _stat->create_expr_percent ("percent_conflict_on_read" , "nb_conflict_on_read" , "+ nb_read nb_conflict_on_read" , _("Percent conflit on read port" )); + _stat->create_expr_percent ("percent_conflict_on_write", "nb_conflict_on_write", "+ nb_write nb_conflict_on_write", _("Percent conflit on write port")); log_printf(FUNC,RegisterFile_Multi_Banked,FUNCTION,"End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp (revision 137) @@ -51,5 +51,29 @@ reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]] = data; } + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + if (PORT_READ(in_WRITE_VAL [i])) + { + if (internal_WRITE_VAL [i] == 1) + (*_stat_nb_write) ++; + else + (*_stat_nb_conflict_on_write) ++; + } +#endif } + +#ifdef STATISTICS + if (usage_is_set(_usage,USE_STATISTICS)) + for (uint32_t i=0; i<_param->_nb_port_read; i++) + if (PORT_READ(in_READ_VAL [i])) + { + if (internal_READ_VAL [i] == 1) + (*_stat_nb_read) ++; + else + (*_stat_nb_conflict_on_read) ++; + } +#endif + } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp (revision 137) @@ -88,6 +88,6 @@ std::string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; - vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); - vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); + vhdl->set_body("\t"+separator+" in_"+toString(k)+"_VAL \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); + vhdl->set_body("\t,out_"+toString(k)+"_ACK \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); } vhdl->set_body(");"); @@ -107,6 +107,6 @@ std::string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; - vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); - vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); + vhdl->set_body("\t"+separator+" in_"+toString(k)+"_VAL \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); + vhdl->set_body("\t,out_"+toString(k)+"_ACK \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); } vhdl->set_body(");"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/mkf.info (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/mkf.info (revision 137) @@ -0,0 +1,6 @@ + +# RegisterFile_0 +target_dep all RegisterFile_0.ngc +target_dep RegisterFile_0.ngc RegisterFile_0.prj +target_dep RegisterFile_0.prj RegisterFile_0_Pack.vhdl RegisterFile_0.vhdl + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp (revision 137) @@ -26,5 +26,5 @@ Tusage_t _usage = USE_ALL; -// _usage = usage_unset(_usage,USE_SYSTEMC ); + _usage = usage_unset(_usage,USE_SYSTEMC ); // _usage = usage_unset(_usage,USE_VHDL ); // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h (revision 137) @@ -26,11 +26,11 @@ { //-----[ fields ]------------------------------------------------------------ - public : const Tinstance_t _instance; - public : const uint32_t _nb_port_read ; - public : const uint32_t _nb_port_write; - public : const uint32_t _nb_word ; - public : const uint32_t _size_word ; - public : const uint32_t _size_address ; - public : const bool _have_port_address; + public : Tinstance_t _instance; + public : uint32_t _nb_port_read ; + public : uint32_t _nb_port_write; + public : uint32_t _nb_word ; + public : uint32_t _size_word ; + public : uint32_t _size_address ; + public : bool _have_port_address; public : morpheo::behavioural::generic::registerfile::registerfile_monolithic ::Parameters * _param_registerfile_monolithic; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters.cpp (revision 137) @@ -14,14 +14,15 @@ - Parameters::Parameters (morpheo::behavioural::generic::registerfile::registerfile_monolithic ::Parameters * param) : - _instance (instance_RegisterFile_Monolithic), - _nb_port_read (param->_nb_port_read ), - _nb_port_write (param->_nb_port_write), - _nb_word (param->_nb_word ), - _size_word (param->_size_word ), - _size_address (param->_size_address ), - _have_port_address (param->_have_port_address) + Parameters::Parameters (morpheo::behavioural::generic::registerfile::registerfile_monolithic ::Parameters * param) { log_printf(FUNC,RegisterFile,"Parameters","Begin"); + + _instance = instance_RegisterFile_Monolithic; + _nb_port_read = param->_nb_port_read ; + _nb_port_write = param->_nb_port_write; + _nb_word = param->_nb_word ; + _size_word = param->_size_word ; + _size_address = param->_size_address ; + _have_port_address = param->_have_port_address; _param_registerfile_monolithic = param; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h (revision 137) @@ -22,8 +22,9 @@ { //-----[ fields ]------------------------------------------------------------ - public : const uint32_t _nb_entity ; - public : const bool _encoding_one_hot; - public : const bool _encoding_compact; - public : const uint32_t _size_entity; + public : uint32_t _nb_entity ; + public : bool _encoding_one_hot; + public : bool _encoding_compact; + + public : uint32_t _size_entity; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters.cpp (revision 137) @@ -7,4 +7,5 @@ #include "Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h" +#include "Common/include/Log2.h" namespace morpheo { @@ -17,11 +18,13 @@ Parameters::Parameters (uint32_t nb_entity , bool encoding_one_hot, - bool encoding_compact): - _nb_entity (nb_entity ), - _encoding_one_hot (encoding_one_hot), - _encoding_compact (encoding_compact), - _size_entity (static_cast (ceil(log2(nb_entity)))) + bool encoding_compact) { log_printf(FUNC,Select_Priority_Fixed,"Parameters","Begin"); + + _nb_entity = nb_entity ; + _encoding_one_hot = encoding_one_hot; + _encoding_compact = encoding_compact; + _size_entity = log2(nb_entity); + test(); log_printf(FUNC,Select_Priority_Fixed,"Parameters","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_vhdl_body.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_vhdl_body.cpp (revision 137) @@ -24,5 +24,5 @@ for (uint32_t i=0; i<_param->_nb_entity; i++) { - vhdl->set_body("\t"+std_logic_conv(_param->_size_entity+1,i)+" when in_VAL_"+toString(i)+"='1' else"); + vhdl->set_body("\t"+std_logic_conv(_param->_size_entity+1,i)+" when in_"+toString(i)+"_VAL='1' else"); } vhdl->set_body("\t"+std_logic_conv(_param->_size_entity+1,1<<_param->_size_entity)+";"); @@ -32,5 +32,5 @@ { for (uint32_t i=0; i<_param->_nb_entity; i++) - vhdl->set_body("out_ACK_"+toString(i)+" <= '1' when internal_entity"+std_logic_range(_param->_size_entity+1)+" = "+std_logic_conv(_param->_size_entity+1,i)+" else '0';"); + vhdl->set_body("out_"+toString(i)+"_ACK <= '1' when internal_entity"+std_logic_range(_param->_size_entity+1)+" = "+std_logic_conv(_param->_size_entity+1,i)+" else '0';"); vhdl->set_body (""); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/include/Parameters.h (revision 137) @@ -21,32 +21,32 @@ { //-----[ fields ]------------------------------------------------------------ - public : const uint32_t _size_data ; - public : const uint32_t _nb_port ; - public : const uint32_t _shift_value ; // 0 = external shifter's value - public : const rotate_t _rotate ; - public : const direction_t _direction ; - public : const carry_t _carry ; - public : const uint32_t _size_data_completion; - public : const bool _type_completion_bool; + public : uint32_t _size_data ; + public : uint32_t _nb_port ; + public : uint32_t _shift_value ; // 0 = external shifter's value + public : rotate_t _rotate ; + public : direction_t _direction ; + public : carry_t _carry ; + public : uint32_t _size_data_completion; + public : bool _type_completion_bool; - public : const uint32_t _size_shift ; + public : uint32_t _size_shift ; - public : const bool _internal_direction; - public : const bool _internal_type ; - public : const bool _internal_carry ; + public : bool _internal_direction; + public : bool _internal_type ; + public : bool _internal_carry ; - public : const bool _have_shift_logic_left ; - public : const bool _have_shift_logic_right ; - public : const bool _have_shift_logic ; - public : const bool _have_shift_arithmetic_left ; - public : const bool _have_shift_arithmetic_right ; - public : const bool _have_shift_arithmetic ; - public : const bool _have_shift ; - public : const bool _have_rotate_left ; - public : const bool _have_rotate_right ; - public : const bool _have_rotate ; + public : bool _have_shift_logic_left ; + public : bool _have_shift_logic_right ; + public : bool _have_shift_logic ; + public : bool _have_shift_arithmetic_left ; + public : bool _have_shift_arithmetic_right ; + public : bool _have_shift_arithmetic ; + public : bool _have_shift ; + public : bool _have_rotate_left ; + public : bool _have_rotate_right ; + public : bool _have_rotate ; - public : const bool _have_direction_left ; - public : const bool _have_direction_right ; + public : bool _have_direction_left ; + public : bool _have_direction_right ; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Parameters.cpp (revision 137) @@ -20,63 +20,64 @@ direction_t direction , carry_t carry , - bool type_completion_bool): - _size_data (size_data ), - _nb_port (nb_port ), - _shift_value (shift_value ), - _rotate (rotate ), - _direction (direction ), - _carry (carry ), - _size_data_completion ((carry != external_completion)?0:((_shift_value==0)?size_data:_shift_value)), - _type_completion_bool (type_completion_bool), + bool type_completion_bool) + { + _size_data = size_data ; + _nb_port = nb_port ; + _shift_value = shift_value ; + _rotate = rotate ; + _direction = direction ; + _carry = carry ; + _size_data_completion = (carry != external_completion)?0:((_shift_value==0)?size_data:_shift_value); + _type_completion_bool = type_completion_bool; - _size_shift (static_cast(ceil(log2(_size_data)))), + _size_shift = static_cast(ceil(log2(_size_data))); + + _internal_direction = (direction == internal_right_shift)?_right :_left ; + _internal_type = (rotate == internal_rotate )?_rotate:_shift ; + _internal_carry = (carry == internal_logic )?_logic :_arithmetic; - _internal_direction ((direction == internal_right_shift)?_right :_left ), - _internal_type ((rotate == internal_rotate )?_rotate:_shift ), - _internal_carry ((carry == internal_logic )?_logic :_arithmetic), + _have_shift_logic_left = ((rotate != internal_rotate) && + (((carry == external_carry ) || + (carry == external_completion) || + (carry == internal_logic )) && + ((direction == external_direction ) || + (direction == internal_left_shift)))); + _have_shift_logic_right = ((rotate != internal_rotate) && + (((carry == external_carry ) || + (carry == external_completion) || + (carry == internal_logic )) && + ((direction == external_direction ) || + (direction == internal_right_shift)))); + _have_shift_logic = _have_shift_logic_left || _have_shift_logic_right; - _have_shift_logic_left ((rotate != internal_rotate) && - (((carry == external_carry ) || - (carry == external_completion) || - (carry == internal_logic )) && - ((direction == external_direction ) || - (direction == internal_left_shift)))), - _have_shift_logic_right ((rotate != internal_rotate) && - (((carry == external_carry ) || - (carry == external_completion) || - (carry == internal_logic )) && - ((direction == external_direction ) || - (direction == internal_right_shift)))), - _have_shift_logic (_have_shift_logic_left || _have_shift_logic_right), + _have_shift_arithmetic_left = ((rotate != internal_rotate) && + (((carry == external_carry ) || + (carry == internal_arithmetic )) && + ((direction == external_direction ) || + (direction == internal_left_shift)))); + _have_shift_arithmetic_right = ((rotate != internal_rotate) && + (((carry == external_carry ) || + (carry == internal_arithmetic )) && + ((direction == external_direction ) || + (direction == internal_right_shift)))); + _have_shift_arithmetic = _have_shift_arithmetic_left || _have_shift_arithmetic_right; - _have_shift_arithmetic_left ((rotate != internal_rotate) && - (((carry == external_carry ) || - (carry == internal_arithmetic )) && - ((direction == external_direction ) || - (direction == internal_left_shift)))), - _have_shift_arithmetic_right ((rotate != internal_rotate) && - (((carry == external_carry ) || - (carry == internal_arithmetic )) && - ((direction == external_direction ) || - (direction == internal_right_shift)))), - _have_shift_arithmetic (_have_shift_arithmetic_left || _have_shift_arithmetic_right), + _have_shift = _have_shift_logic || _have_shift_arithmetic; - _have_shift (_have_shift_logic || _have_shift_arithmetic), + _have_rotate_left = ((rotate != without_rotate) && + ((direction == external_direction ) || + (direction == internal_left_shift))); + _have_rotate_right = ((rotate != without_rotate) && + ((direction == external_direction ) || + (direction == internal_right_shift))); + _have_rotate = _have_rotate_left || _have_rotate_right; + + _have_direction_left = (_have_shift_logic_left || + _have_shift_arithmetic_left || + _have_rotate_left ); + _have_direction_right = (_have_shift_logic_right || + _have_shift_arithmetic_right || + _have_rotate_right ); - _have_rotate_left ((rotate != without_rotate) && - ((direction == external_direction ) || - (direction == internal_left_shift))), - _have_rotate_right ((rotate != without_rotate) && - ((direction == external_direction ) || - (direction == internal_right_shift))), - _have_rotate ( _have_rotate_left || _have_rotate_right), - - _have_direction_left (_have_shift_logic_left || - _have_shift_arithmetic_left || - _have_rotate_left ), - _have_direction_right (_have_shift_logic_right || - _have_shift_arithmetic_right || - _have_rotate_right ) - { test(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h (revision 137) @@ -22,10 +22,10 @@ { //-----[ fields ]------------------------------------------------------------ - public : const uint32_t _nb_entity ; // number of entity - public : const uint32_t _nb_access ; // number of port to select an entity -//public : const uint32_t _nb_update ; // number of port to update the internal entity - public : const uint32_t _size_table; // Size of victim_pseudo_lru's table - public : const bool _table_global; - public : const uint32_t _size_address; + public : uint32_t _nb_entity ; // number of entity + public : uint32_t _nb_access ; // number of port to select an entity +//public : uint32_t _nb_update ; // number of port to update the internal entity + public : uint32_t _size_table; // Size of victim_pseudo_lru's table + public : bool _table_global; + public : uint32_t _size_address; //-----[ methods ]----------------------------------------------------------- Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp (revision 137) @@ -19,12 +19,14 @@ // uint32_t nb_update , uint32_t size_table, - bool table_global): - _nb_entity (nb_entity ), - _nb_access (nb_access ), -// _nb_update (nb_update ), - _size_table ((table_global == true)?1:size_table), - _table_global (table_global), - _size_address (size_table) + bool table_global) { + _nb_entity = nb_entity; + _nb_access = nb_access; +// _nb_update = nb_update; + _size_table = (table_global == true)?1:size_table; + _table_global = table_global; + + _size_address = size_table; + test(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 137) @@ -235,4 +235,5 @@ generated_by_systemcass \ semantic.cache \ + gmon.out \ core*; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 137) @@ -41,7 +41,12 @@ vhdl_testbench : $(DIR_WORK) @\ - declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*_Testbench.vhdl)); \ - declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ - if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) -k $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; + $(LS) $(DIR_VHDL)/*_Testbench.vhdl &> /dev/null; \ + if $(TEST) $$? -eq 0; then \ + declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*_Testbench.vhdl)); \ + declare -a log_files=($${vhdl_files[*]/%.vhdl/.vhdl.log}); \ + if $(TEST) $${#log_files[*]} -ne 0; then \ + $(MAKE) -k $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; \ + fi; \ + fi; vhdl_entity : $(DIR_WORK) @@ -71,7 +76,12 @@ sim : vhdl @\ - declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*_Testbench.vhdl)); \ - declare -a log_files=($${vhdl_files[*]/%.vhdl/.sim.log}); \ - if $(TEST) $${#log_files[*]} -ne 0; then $(MAKE) -k $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; fi; + $(LS) $(DIR_VHDL)/*_Testbench.vhdl &> /dev/null; \ + if $(TEST) $$? -eq 0; then \ + declare -a vhdl_files=($$($(LS) $(DIR_VHDL)/*_Testbench.vhdl)); \ + declare -a log_files=($${vhdl_files[*]/%.vhdl/.sim.log}); \ + if $(TEST) $${#log_files[*]} -ne 0; then \ + $(MAKE) -k $${log_files[*]/#$(DIR_VHDL)/$(DIR_LOG)}; \ + fi; \ + fi; fpga : sim Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 137) @@ -3,30 +3,25 @@ # -all: _Generic/Queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest +all: _Generic/Queue/SelfTest _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest _Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest _Generic/Queue/SelfTest: - gmake all -C Generic/Queue/SelfTest + make all -C Generic/Queue/SelfTest -_Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest: - gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest +_Generic/RegisterFile/RegisterFile_Monolithic/SelfTest: + make all -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest -_Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest: - gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest - -_Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest: - gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest +_Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest: + make all -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest clean: - gmake clean -C Generic/Queue/SelfTest - gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest - gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest - gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest + make clean -C Generic/Queue/SelfTest + make clean -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest + make clean -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest re: clean all install: - gmake install -C Generic/Queue/SelfTest - gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest - gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest - gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest + make install -C Generic/Queue/SelfTest + make install -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest + make install -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 137) @@ -337,5 +337,5 @@ for (uint32_t it1=0; it1set_interface( name+separator+toString(it1), direction, localisation, str); \ + interface [it1] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1), direction, localisation, str); \ } \ } @@ -351,5 +351,5 @@ for (uint32_t it1=0; it1set_interface( name+separator+toString(it1)); \ + interface [it1] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1)); \ } \ } @@ -559,5 +559,5 @@ for (uint32_t it2=0; it2set_interface( name+separator+toString(it1)+separator+toString(it2), direction, localisation, str); \ + interface [it1][it2] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1)+separator+toString(it2), direction, localisation, str); \ } \ } \ @@ -579,5 +579,5 @@ for (uint32_t it2=0; it2set_interface( name+separator+toString(it1)+separator+toString(it2)); \ + interface [it1][it2] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1)+separator+toString(it2)); \ } \ } \ @@ -849,5 +849,5 @@ for (uint32_t it3=0; it3set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3), direction, localisation, str); \ + interface [it1][it2][it3] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1)+separator+toString(it2)+separator+toString(it3), direction, localisation, str); \ } \ } \ @@ -875,5 +875,5 @@ for (uint32_t it3=0; it3set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3)); \ + interface [it1][it2][it3] = _interfaces->set_interface(((toString(name)!="")?(name+separator):"")+toString(it1)+separator+toString(it2)+separator+toString(it3)); \ } \ } \ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h (revision 137) @@ -1138,4 +1138,229 @@ // }; + inline std::string toString_instruction(const uint32_t& x) + { + switch (x) + { + // ORBIS + case morpheo::behavioural::INSTRUCTION_L_ADD : return "l.add"; + case morpheo::behavioural::INSTRUCTION_L_ADDC : return "l.addc"; + case morpheo::behavioural::INSTRUCTION_L_ADDI : return "l.addi"; + case morpheo::behavioural::INSTRUCTION_L_ADDIC : return "l.addic"; + case morpheo::behavioural::INSTRUCTION_L_AND : return "l.and"; + case morpheo::behavioural::INSTRUCTION_L_ANDI : return "l.andi"; + case morpheo::behavioural::INSTRUCTION_L_BF : return "l.bf"; + case morpheo::behavioural::INSTRUCTION_L_BNF : return "l.bnf"; + case morpheo::behavioural::INSTRUCTION_L_CMOV : return "l.cmov"; + case morpheo::behavioural::INSTRUCTION_L_CSYNC : return "l.csync"; + case morpheo::behavioural::INSTRUCTION_L_CUST1 : return "l.cust1"; + case morpheo::behavioural::INSTRUCTION_L_CUST2 : return "l.cust2"; + case morpheo::behavioural::INSTRUCTION_L_CUST3 : return "l.cust3"; + case morpheo::behavioural::INSTRUCTION_L_CUST4 : return "l.cust4"; + case morpheo::behavioural::INSTRUCTION_L_CUST5 : return "l.cust5"; + case morpheo::behavioural::INSTRUCTION_L_CUST6 : return "l.cust6"; + case morpheo::behavioural::INSTRUCTION_L_CUST7 : return "l.cust7"; + case morpheo::behavioural::INSTRUCTION_L_CUST8 : return "l.cust8"; + case morpheo::behavioural::INSTRUCTION_L_DIV : return "l.div"; + case morpheo::behavioural::INSTRUCTION_L_DIVU : return "l.divu"; + case morpheo::behavioural::INSTRUCTION_L_EXTBS : return "l.extbs"; + case morpheo::behavioural::INSTRUCTION_L_EXTBZ : return "l.extbz"; + case morpheo::behavioural::INSTRUCTION_L_EXTHS : return "l.exths"; + case morpheo::behavioural::INSTRUCTION_L_EXTHZ : return "l.exthz"; + case morpheo::behavioural::INSTRUCTION_L_EXTWS : return "l.extws"; + case morpheo::behavioural::INSTRUCTION_L_EXTWZ : return "l.extwz"; + case morpheo::behavioural::INSTRUCTION_L_FF1 : return "l.ff1"; + case morpheo::behavioural::INSTRUCTION_L_FL1 : return "l.fl1"; + case morpheo::behavioural::INSTRUCTION_L_J : return "l.j"; + case morpheo::behavioural::INSTRUCTION_L_JAL : return "l.jal"; + case morpheo::behavioural::INSTRUCTION_L_JALR : return "l.jalr"; + case morpheo::behavioural::INSTRUCTION_L_JR : return "l.jr"; + case morpheo::behavioural::INSTRUCTION_L_LBS : return "l.lbs"; + case morpheo::behavioural::INSTRUCTION_L_LBZ : return "l.lbz"; + case morpheo::behavioural::INSTRUCTION_L_LD : return "l.ld"; + case morpheo::behavioural::INSTRUCTION_L_LHS : return "l.lhs"; + case morpheo::behavioural::INSTRUCTION_L_LHZ : return "l.lhz"; + case morpheo::behavioural::INSTRUCTION_L_LWS : return "l.lws"; + case morpheo::behavioural::INSTRUCTION_L_LWZ : return "l.lwz"; + case morpheo::behavioural::INSTRUCTION_L_MAC : return "l.mac"; + case morpheo::behavioural::INSTRUCTION_L_MACI : return "l.maci"; + case morpheo::behavioural::INSTRUCTION_L_MACRC : return "l.macrc"; + case morpheo::behavioural::INSTRUCTION_L_MFSPR : return "l.mfspr"; + case morpheo::behavioural::INSTRUCTION_L_MOVHI : return "l.movhi"; + case morpheo::behavioural::INSTRUCTION_L_MSB : return "l.msb"; + case morpheo::behavioural::INSTRUCTION_L_MSYNC : return "l.msync"; + case morpheo::behavioural::INSTRUCTION_L_MTSPR : return "l.mtspr"; + case morpheo::behavioural::INSTRUCTION_L_MUL : return "l.mul"; + case morpheo::behavioural::INSTRUCTION_L_MULI : return "l.muli"; + case morpheo::behavioural::INSTRUCTION_L_MULU : return "l.mulu"; + case morpheo::behavioural::INSTRUCTION_L_NOP : return "l.nop"; + case morpheo::behavioural::INSTRUCTION_L_OR : return "l.or"; + case morpheo::behavioural::INSTRUCTION_L_ORI : return "l.ori"; + case morpheo::behavioural::INSTRUCTION_L_PSYNC : return "l.psync"; + case morpheo::behavioural::INSTRUCTION_L_RFE : return "l.rfe"; + case morpheo::behavioural::INSTRUCTION_L_ROR : return "l.ror"; + case morpheo::behavioural::INSTRUCTION_L_RORI : return "l.rori"; + case morpheo::behavioural::INSTRUCTION_L_SB : return "l.sb"; + case morpheo::behavioural::INSTRUCTION_L_SD : return "l.sd"; + case morpheo::behavioural::INSTRUCTION_L_SFEQ : return "l.sfeq"; + case morpheo::behavioural::INSTRUCTION_L_SFEQI : return "l.sfeqi"; + case morpheo::behavioural::INSTRUCTION_L_SFGES : return "l.sfges"; + case morpheo::behavioural::INSTRUCTION_L_SFGESI : return "l.sfgesi"; + case morpheo::behavioural::INSTRUCTION_L_SFGEU : return "l.sfgeu"; + case morpheo::behavioural::INSTRUCTION_L_SFGEUI : return "l.sfgeui"; + case morpheo::behavioural::INSTRUCTION_L_SFGTS : return "l.sfgts"; + case morpheo::behavioural::INSTRUCTION_L_SFGTSI : return "l.sfgtsi"; + case morpheo::behavioural::INSTRUCTION_L_SFGTU : return "l.sfgtu"; + case morpheo::behavioural::INSTRUCTION_L_SFGTUI : return "l.sfgtui"; + case morpheo::behavioural::INSTRUCTION_L_SFLES : return "l.sfles"; + case morpheo::behavioural::INSTRUCTION_L_SFLESI : return "l.sflesi"; + case morpheo::behavioural::INSTRUCTION_L_SFLEU : return "l.sfleu"; + case morpheo::behavioural::INSTRUCTION_L_SFLEUI : return "l.sfleui"; + case morpheo::behavioural::INSTRUCTION_L_SFLTS : return "l.sflts"; + case morpheo::behavioural::INSTRUCTION_L_SFLTSI : return "l.sfltsi"; + case morpheo::behavioural::INSTRUCTION_L_SFLTU : return "l.sfltu"; + case morpheo::behavioural::INSTRUCTION_L_SFLTUI : return "l.sfltui"; + case morpheo::behavioural::INSTRUCTION_L_SFNE : return "l.sfne"; + case morpheo::behavioural::INSTRUCTION_L_SFNEI : return "l.sfnei"; + case morpheo::behavioural::INSTRUCTION_L_SH : return "l.sh"; + case morpheo::behavioural::INSTRUCTION_L_SLL : return "l.sll"; + case morpheo::behavioural::INSTRUCTION_L_SLLI : return "l.slli"; + case morpheo::behavioural::INSTRUCTION_L_SRA : return "l.sra"; + case morpheo::behavioural::INSTRUCTION_L_SRAI : return "l.srai"; + case morpheo::behavioural::INSTRUCTION_L_SRL : return "l.srl"; + case morpheo::behavioural::INSTRUCTION_L_SRLI : return "l.srli"; + case morpheo::behavioural::INSTRUCTION_L_SUB : return "l.sub"; + case morpheo::behavioural::INSTRUCTION_L_SW : return "l.sw"; + case morpheo::behavioural::INSTRUCTION_L_SYS : return "l.sys"; + case morpheo::behavioural::INSTRUCTION_L_TRAP : return "l.trap"; + case morpheo::behavioural::INSTRUCTION_L_XOR : return "l.xor"; + case morpheo::behavioural::INSTRUCTION_L_XORI : return "l.xori"; + // ORFPX + case morpheo::behavioural::INSTRUCTION_LF_ADD_D : return "lf.add_d"; + case morpheo::behavioural::INSTRUCTION_LF_ADD_S : return "lf.add_s"; + case morpheo::behavioural::INSTRUCTION_LF_CUST1_D : return "lf.cust1_d"; + case morpheo::behavioural::INSTRUCTION_LF_CUST1_S : return "lf.cust1_s"; + case morpheo::behavioural::INSTRUCTION_LF_DIV_D : return "lf.div_d"; + case morpheo::behavioural::INSTRUCTION_LF_DIV_S : return "lf.div_s"; + case morpheo::behavioural::INSTRUCTION_LF_FTOI_D : return "lf.ftoi_d"; + case morpheo::behavioural::INSTRUCTION_LF_FTOI_S : return "lf.ftoi_s"; + case morpheo::behavioural::INSTRUCTION_LF_ITOF_D : return "lf.itof_d"; + case morpheo::behavioural::INSTRUCTION_LF_ITOF_S : return "lf.itof_s"; + case morpheo::behavioural::INSTRUCTION_LF_MADD_D : return "lf.madd_d"; + case morpheo::behavioural::INSTRUCTION_LF_MADD_S : return "lf.madd_s"; + case morpheo::behavioural::INSTRUCTION_LF_MUL_D : return "lf.mul_d"; + case morpheo::behavioural::INSTRUCTION_LF_MUL_S : return "lf.mul_s"; + case morpheo::behavioural::INSTRUCTION_LF_REM_D : return "lf.rem_d"; + case morpheo::behavioural::INSTRUCTION_LF_REM_S : return "lf.rem_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFEQ_D : return "lf.sfeq_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFEQ_S : return "lf.sfeq_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFGE_D : return "lf.sfge_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFGE_S : return "lf.sfge_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFGT_D : return "lf.sfgt_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFGT_S : return "lf.sfgt_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFLE_D : return "lf.sfle_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFLE_S : return "lf.sfle_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFLT_D : return "lf.sflt_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFLT_S : return "lf.sflt_s"; + case morpheo::behavioural::INSTRUCTION_LF_SFNE_D : return "lf.sfne_d"; + case morpheo::behavioural::INSTRUCTION_LF_SFNE_S : return "lf.sfne_s"; + case morpheo::behavioural::INSTRUCTION_LF_SUB_D : return "lf.sub_d"; + case morpheo::behavioural::INSTRUCTION_LF_SUB_S : return "lf.sub_s"; + // ORVDX + case morpheo::behavioural::INSTRUCTION_LV_ADD_B : return "lv.add_b"; + case morpheo::behavioural::INSTRUCTION_LV_ADD_H : return "lv.add_h"; + case morpheo::behavioural::INSTRUCTION_LV_ADDS_B : return "lv.adds_b"; + case morpheo::behavioural::INSTRUCTION_LV_ADDS_H : return "lv.adds_h"; + case morpheo::behavioural::INSTRUCTION_LV_ADDU_B : return "lv.addu_b"; + case morpheo::behavioural::INSTRUCTION_LV_ADDU_H : return "lv.addu_h"; + case morpheo::behavioural::INSTRUCTION_LV_ADDUS_B : return "lv.addus_b"; + case morpheo::behavioural::INSTRUCTION_LV_ADDUS_H : return "lv.addus_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_EQ_B : return "lv.all_eq_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_EQ_H : return "lv.all_eq_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_GE_B : return "lv.all_ge_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_GE_H : return "lv.all_ge_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_GT_B : return "lv.all_gt_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_GT_H : return "lv.all_gt_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_LE_B : return "lv.all_le_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_LE_H : return "lv.all_le_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_LT_B : return "lv.all_lt_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_LT_H : return "lv.all_lt_h"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_NE_B : return "lv.all_ne_b"; + case morpheo::behavioural::INSTRUCTION_LV_ALL_NE_H : return "lv.all_ne_h"; + case morpheo::behavioural::INSTRUCTION_LV_AND : return "lv.and"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_EQ_B : return "lv.any_eq_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_EQ_H : return "lv.any_eq_h"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_GE_B : return "lv.any_ge_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_GE_H : return "lv.any_ge_h"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_GT_B : return "lv.any_gt_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_GT_H : return "lv.any_gt_h"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_LE_B : return "lv.any_le_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_LE_H : return "lv.any_le_h"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_LT_B : return "lv.any_lt_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_LT_H : return "lv.any_lt_h"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_NE_B : return "lv.any_ne_b"; + case morpheo::behavioural::INSTRUCTION_LV_ANY_NE_H : return "lv.any_ne_h"; + case morpheo::behavioural::INSTRUCTION_LV_AVG_B : return "lv.avg_b"; + case morpheo::behavioural::INSTRUCTION_LV_AVG_H : return "lv.avg_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_EQ_B : return "lv.cmp_eq_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_EQ_H : return "lv.cmp_eq_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_GE_B : return "lv.cmp_ge_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_GE_H : return "lv.cmp_ge_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_GT_B : return "lv.cmp_gt_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_GT_H : return "lv.cmp_gt_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_LE_B : return "lv.cmp_le_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_LE_H : return "lv.cmp_le_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_LT_B : return "lv.cmp_lt_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_LT_H : return "lv.cmp_lt_h"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_NE_B : return "lv.cmp_ne_b"; + case morpheo::behavioural::INSTRUCTION_LV_CMP_NE_H : return "lv.cmp_ne_h"; + case morpheo::behavioural::INSTRUCTION_LV_CUST1 : return "lv.cust1"; + case morpheo::behavioural::INSTRUCTION_LV_CUST2 : return "lv.cust2"; + case morpheo::behavioural::INSTRUCTION_LV_CUST3 : return "lv.cust3"; + case morpheo::behavioural::INSTRUCTION_LV_CUST4 : return "lv.cust4"; + case morpheo::behavioural::INSTRUCTION_LV_MADDS_H : return "lv.madds_h"; + case morpheo::behavioural::INSTRUCTION_LV_MAX_B : return "lv.max_b"; + case morpheo::behavioural::INSTRUCTION_LV_MAX_H : return "lv.max_h"; + case morpheo::behavioural::INSTRUCTION_LV_MERGE_B : return "lv.merge_b"; + case morpheo::behavioural::INSTRUCTION_LV_MERGE_H : return "lv.merge_h"; + case morpheo::behavioural::INSTRUCTION_LV_MIN_B : return "lv.min_b"; + case morpheo::behavioural::INSTRUCTION_LV_MIN_H : return "lv.min_h"; + case morpheo::behavioural::INSTRUCTION_LV_MSUBS_H : return "lv.msubs_h"; + case morpheo::behavioural::INSTRUCTION_LV_MULS_H : return "lv.muls_h"; + case morpheo::behavioural::INSTRUCTION_LV_NAND : return "lv.nand"; + case morpheo::behavioural::INSTRUCTION_LV_NOR : return "lv.nor"; + case morpheo::behavioural::INSTRUCTION_LV_OR : return "lv.or"; + case morpheo::behavioural::INSTRUCTION_LV_PACK_B : return "lv.pack_b"; + case morpheo::behavioural::INSTRUCTION_LV_PACK_H : return "lv.pack_h"; + case morpheo::behavioural::INSTRUCTION_LV_PACKS_B : return "lv.packs_b"; + case morpheo::behavioural::INSTRUCTION_LV_PACKS_H : return "lv.packs_h"; + case morpheo::behavioural::INSTRUCTION_LV_PACKUS_B : return "lv.packus_b"; + case morpheo::behavioural::INSTRUCTION_LV_PACKUS_H : return "lv.packus_h"; + case morpheo::behavioural::INSTRUCTION_LV_PERM_N : return "lv.perm_n"; + case morpheo::behavioural::INSTRUCTION_LV_RL_B : return "lv.rl_b"; + case morpheo::behavioural::INSTRUCTION_LV_RL_H : return "lv.rl_h"; + case morpheo::behavioural::INSTRUCTION_LV_SLL : return "lv.sll"; + case morpheo::behavioural::INSTRUCTION_LV_SLL_B : return "lv.sll_b"; + case morpheo::behavioural::INSTRUCTION_LV_SLL_H : return "lv.sll_h"; + case morpheo::behavioural::INSTRUCTION_LV_SRA_B : return "lv.sra_b"; + case morpheo::behavioural::INSTRUCTION_LV_SRA_H : return "lv.sra_h"; + case morpheo::behavioural::INSTRUCTION_LV_SRL : return "lv.srl"; + case morpheo::behavioural::INSTRUCTION_LV_SRL_B : return "lv.srl_b"; + case morpheo::behavioural::INSTRUCTION_LV_SRL_H : return "lv.srl_h"; + case morpheo::behavioural::INSTRUCTION_LV_SUB_B : return "lv.sub_b"; + case morpheo::behavioural::INSTRUCTION_LV_SUB_H : return "lv.sub_h"; + case morpheo::behavioural::INSTRUCTION_LV_SUBS_B : return "lv.subs_b"; + case morpheo::behavioural::INSTRUCTION_LV_SUBS_H : return "lv.subs_h"; + case morpheo::behavioural::INSTRUCTION_LV_SUBU_B : return "lv.subu_b"; + case morpheo::behavioural::INSTRUCTION_LV_SUBU_H : return "lv.subu_h"; + case morpheo::behavioural::INSTRUCTION_LV_SUBUS_B : return "lv.subus_b"; + case morpheo::behavioural::INSTRUCTION_LV_SUBUS_H : return "lv.subus_h"; + case morpheo::behavioural::INSTRUCTION_LV_UNPACK_B : return "lv.unpack_b"; + case morpheo::behavioural::INSTRUCTION_LV_UNPACK_H : return "lv.unpack_h"; + case morpheo::behavioural::INSTRUCTION_LV_XOR : return "lv.xor"; + + default : return ""; + } + }; + }; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_signal.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_signal.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_signal.h (revision 137) @@ -11,30 +11,58 @@ # ifdef DEBUG_SIGNAL -#include -#include "Common/include/Message.h" +#include +#include +#include namespace morpheo { namespace behavioural { - extern std::set _debug_signal; + class debug_signal + { + private : std::map _signal; + private : std::list _signal_access; + + public : void add (void * signal, + std::string name); + public : void write (void * signal); + public : void end_cycle (void); + public : void print (void); + }; -# define DEBUG_SIGNAL_ADD(signal) \ + extern debug_signal _debug_signal; + +# define DEBUG_SIGNAL_ADD(signal,name) \ do \ { \ - morpheo::behavioural::_debug_signal.insert(static_cast( signal)); \ + morpheo::behavioural::_debug_signal.add(signal,name); \ } while(0) + + // Test if signal is previously define -# define DEBUG_SIGNAL_ACCESS(signal) \ +# define DEBUG_SIGNAL_WRITE(signal) \ do \ { \ - if (morpheo::behavioural::_debug_signal.find(static_cast(signal)) == morpheo::behavioural::_debug_signal.end()) \ - msgError("At file %s, in line %d, invalid signal.\n",__FILE__,__LINE__); \ + morpheo::behavioural::_debug_signal.write(signal); \ } while(0) + +# define DEBUG_SIGNAL_END_CYCLE() \ + do \ + { \ + morpheo::behavioural::_debug_signal.end_cycle(); \ + } while (0) + +# define DEBUG_SIGNAL_PRINT() \ + do \ + { \ + morpheo::behavioural::_debug_signal.print(); \ + } while (0) }; // end namespace behavioural }; // end namespace morpheo # else -# define DEBUG_SIGNAL_ADD(signal) do {} while (0) -# define DEBUG_SIGNAL_ACCESS(signal) do {} while (0) +# define DEBUG_SIGNAL_ADD(signal,name) do {} while (0) +# define DEBUG_SIGNAL_WRITE(signal) do {} while (0) +# define DEBUG_SIGNAL_END_CYCLE() do {} while (0) +# define DEBUG_SIGNAL_PRINT() do {} while (0) # endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 137) @@ -161,5 +161,5 @@ _sc_signal_map = sc_signal; - DEBUG_SIGNAL_ADD(sc_signal); + DEBUG_SIGNAL_ADD(sc_signal,_name); if (typeid(T) == typeid(bool )) Index: unk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h (revision 136) +++ (revision ) @@ -1,39 +1,0 @@ -#ifndef morpheo_behavioural_Version_h -#define morpheo_behavioural_Version_h - -/* - * $Id$ - */ - -#include "Common/include/ToString.h" - -#define MORPHEO_MAJOR_VERSION "0" -#define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "136" -#define MORPHEO_CODENAME "Castor" - -#define MORPHEO_DATE_DAY "20" -#define MORPHEO_DATE_MONTH "10" -#define MORPHEO_DATE_YEAR "2009" - -#define MORPHEO_VERSION morpheo::toString(MORPHEO_MAJOR_VERSION)+"."+morpheo::toString(MORPHEO_MINOR_VERSION)+"."+morpheo::toString(MORPHEO_REVISION) -#define MORPHEO_HEADER morpheo::toString(MORPHEO_VERSION)+" - "+morpheo::toString(MORPHEO_CODENAME) -#define MORPHEO_DATE morpheo::toString(MORPHEO_DATE_YEAR)+"/"+morpheo::toString(MORPHEO_DATE_MONTH)+"/"+morpheo::toString(MORPHEO_DATE_DAY) - -/* - [ Change Log ] - | - +-[ Major Version 0 ] - | - | SystemC Only - | - +-[ Minor Version 1 ] - Castor - | | - | | Second Architecture, change the load_store_unit and implement exception - | - +-[ Minor Version 0 ] - | | - | | First Architecture, not in this svn -*/ - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h.sed =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h.sed (revision 136) +++ (revision ) @@ -1,39 +1,0 @@ -#ifndef morpheo_behavioural_Version_h -#define morpheo_behavioural_Version_h - -/* - * $Id$ - */ - -#include "Common/include/ToString.h" - -#define MORPHEO_MAJOR_VERSION "0" -#define MORPHEO_MINOR_VERSION "2" -#define MORPHEO_REVISION "@REVISION" -#define MORPHEO_CODENAME "Castor" - -#define MORPHEO_DATE_DAY "@DATE_DAY" -#define MORPHEO_DATE_MONTH "@DATE_MONTH" -#define MORPHEO_DATE_YEAR "@DATE_YEAR" - -#define MORPHEO_VERSION morpheo::toString(MORPHEO_MAJOR_VERSION)+"."+morpheo::toString(MORPHEO_MINOR_VERSION)+"."+morpheo::toString(MORPHEO_REVISION) -#define MORPHEO_HEADER morpheo::toString(MORPHEO_VERSION)+" - "+morpheo::toString(MORPHEO_CODENAME) -#define MORPHEO_DATE morpheo::toString(MORPHEO_DATE_YEAR)+"/"+morpheo::toString(MORPHEO_DATE_MONTH)+"/"+morpheo::toString(MORPHEO_DATE_DAY) - -/* - [ Change Log ] - | - +-[ Major Version 0 ] - | - | SystemC Only - | - +-[ Minor Version 1 ] - Castor - | | - | | Second Architecture, change the load_store_unit and implement exception - | - +-[ Minor Version 0 ] - | | - | | First Architecture, not in this svn -*/ - -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 137) @@ -16,19 +16,19 @@ # build src directory content target_dep all Generic/Queue/SelfTest -#target_dep all Generic/RegisterFile/RegisterFile_Monolithic/SelfTest -#target_dep all Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest + target_dep all Generic/RegisterFile/RegisterFile_Monolithic/SelfTest + target_dep all Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest #target_dep all Generic/Select/Select_Priority_Fixed/SelfTest - target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest - target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest - target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest - target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest - target_dep all Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest +#target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest +#target_dep all Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest +#target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest +#target_dep all Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest +#target_dep all Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest - target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest - target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest - target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest +#target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest +#target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest +#target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 137) @@ -3,10 +3,10 @@ * $Id$ * - * [ Description ] + * [ Description ] * */ #include "Behavioural/include/Component.h" -#include "Behavioural/include/Version.h" +#include "Common/include/Environment.h" namespace morpheo { @@ -19,4 +19,6 @@ { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + + environment (); XML xml (_entity->get_name()); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Debug_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Debug_signal.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Debug_signal.cpp (revision 137) @@ -8,9 +8,42 @@ #include "Behavioural/include/Debug_signal.h" +#include "Common/include/Message.h" namespace morpheo { namespace behavioural { - std::set _debug_signal; + debug_signal _debug_signal; + + void debug_signal::add (void * signal, + std::string name) + { + _signal[signal] = name; + } + + void debug_signal::write (void * signal) + { + std::map ::iterator it=_signal.find(signal); + if (it != _signal.end()) + _signal_access.push_back(it->second); + +// else +// msgError("At file %s, in line %d, invalid signal.\n",__FILE__,__LINE__); + } + + void debug_signal::end_cycle (void) + { + _signal_access.clear(); + } + + void debug_signal::print (void) + { + msg("List of access signal\n"); + for (std::list::iterator it = _signal_access.begin(); + it != _signal_access.end(); + ++ it) + { + msg(" * %s\n",(*it).c_str()); + } + } }; // end namespace behavioural Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp (revision 137) @@ -1,5 +1,4 @@ #ifdef STATISTICS #include "Behavioural/include/Stat.h" -#include "Behavioural/include/Version.h" #include "Common/include/Environment.h" #include "Common/include/Systemc.h" @@ -11,4 +10,5 @@ { directory(); + environment(); std::string body = print(1); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp (revision 137) @@ -9,5 +9,5 @@ #include "Behavioural/include/Vhdl.h" -#include "Behavioural/include/Version.h" +#include "Common/include/Environment.h" #include #include @@ -25,4 +25,6 @@ std::string text; + + environment(); time_t current_time; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp (revision 137) @@ -7,5 +7,5 @@ #include "Behavioural/include/XML.h" -#include "Behavioural/include/Version.h" +#include "Common/include/Environment.h" namespace morpheo { @@ -17,4 +17,6 @@ { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + + environment (); time_t current_time; Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/Environment.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/Environment.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/Environment.h (revision 137) @@ -48,4 +48,7 @@ extern std::string MORPHEO_HOME; extern std::string MORPHEO_TOPLEVEL; + extern std::string MORPHEO_VERSION; + extern std::string MORPHEO_HEADER; + extern std::string MORPHEO_DATE; void environment (void); Index: /trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h (revision 137) @@ -42,6 +42,6 @@ # define SC_OUT(type) sc_out -# define PORT_READ(sig) sig->read() -# define PORT_WRITE(sig,val) do {DEBUG_SIGNAL_ACCESS(sig); sig->write(val);} while(0) +# define PORT_READ(sig) sig->read() +# define PORT_WRITE(sig,val) do {DEBUG_SIGNAL_WRITE(sig); sig->write(val);} while(0) //#define INTERNAL_READ(sig) (*sig) //#define INTERNAL_WRITE(sig,val) (*sig) = val Index: /trunk/IPs/systemC/processor/Morpheo/Common/src/Environment.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Common/src/Environment.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Common/src/Environment.cpp (revision 137) @@ -17,4 +17,7 @@ std::string MORPHEO_HOME; std::string MORPHEO_TOPLEVEL; +std::string MORPHEO_VERSION; +std::string MORPHEO_HEADER; +std::string MORPHEO_DATE; #undef FUNCTION @@ -25,19 +28,42 @@ { { - char * toplevel = getenv("MORPHEO_TOPLEVEL"); + char * TOPLEVEL = getenv("MORPHEO_TOPLEVEL"); - if (toplevel == NULL) + if (TOPLEVEL == NULL) throw ERRORMORPHEO(FUNCTION,_("Error morpheo environment is not positioned.\n")); - MORPHEO_TOPLEVEL = toplevel; + MORPHEO_TOPLEVEL = TOPLEVEL; } { - char * home = getenv("MORPHEO_HOME"); + char * HOME = getenv("MORPHEO_HOME"); - if (home == NULL) + if (HOME == NULL) throw ERRORMORPHEO(FUNCTION,_("Error morpheo environment is not positioned.\n")); - MORPHEO_HOME = home; + MORPHEO_HOME = HOME; + } + + { + char * MAJOR_VERSION = getenv("MORPHEO_MAJOR_VERSION"); + char * MINOR_VERSION = getenv("MORPHEO_MINOR_VERSION"); + char * REVISION = getenv("MORPHEO_REVISION"); + char * CODENAME = getenv("MORPHEO_CODENAME"); + char * DATE_DAY = getenv("MORPHEO_DATE_DAY"); + char * DATE_MONTH = getenv("MORPHEO_DATE_MONTH"); + char * DATE_YEAR = getenv("MORPHEO_DATE_YEAR"); + + if ((MAJOR_VERSION == NULL) or + (MINOR_VERSION == NULL) or + (REVISION == NULL) or + (CODENAME == NULL) or + (DATE_DAY == NULL) or + (DATE_MONTH == NULL) or + (DATE_YEAR == NULL)) + throw ERRORMORPHEO(FUNCTION,_("Error morpheo environment is not positioned.\n")); + + MORPHEO_VERSION = toString(MAJOR_VERSION)+"."+toString(MINOR_VERSION)+"."+toString(REVISION); + MORPHEO_HEADER = MORPHEO_VERSION+" - "+toString(CODENAME); + MORPHEO_DATE = toString(DATE_YEAR)+"/"+toString(DATE_MONTH)+"/"+toString(DATE_DAY); } Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg (revision 137) @@ -0,0 +1,318 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg (revision 137) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg (revision 137) @@ -0,0 +1,346 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg (revision 137) @@ -3,5 +3,5 @@ - + @@ -75,5 +75,5 @@ - + @@ -174,4 +174,5 @@ + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg (revision 137) @@ -3,5 +3,5 @@ - + @@ -15,5 +15,5 @@ - + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 137) @@ -20,5 +20,5 @@ - + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 137) @@ -54,8 +54,8 @@ - - + + - + @@ -110,5 +110,5 @@ - + Index: /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 137) @@ -4,5 +4,5 @@ - + @@ -111,3 +111,5 @@ + + Index: /trunk/IPs/systemC/processor/Morpheo/Files/debug.sim =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 137) @@ -111,4 +111,5 @@ + Index: /trunk/IPs/systemC/processor/Morpheo/Script/version.sh =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Script/version.sh (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/Script/version.sh (revision 137) @@ -4,8 +4,5 @@ # $Id$ #----------------------------------------------------------- - -file_sed_src="${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h.sed"; -file_sed_dest="${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h"; -file_sed_script="/tmp/file_sed_script"; +file_version="${MORPHEO_TOPLEVEL}/Version"; #-----[ usage ]--------------------------------------------- @@ -47,4 +44,8 @@ # +1 because is the next revision + major_version=0; + minor_version=2; + codename="Castor"; + revision=$(($(export LC_ALL=C; svnversion | tr -d [:alpha:] | cut -d : -f 2) + 1)); date_day=$(date +%d); @@ -52,13 +53,6 @@ date_year=$(date +%Y); - echo "s/\"@REVISION\"/\"${revision}\"/" > ${file_sed_script}; - echo "s/\"@DATE_DAY\"/\"${date_day}\"/" >> ${file_sed_script}; - echo "s/\"@DATE_MONTH\"/\"${date_month}\"/" >> ${file_sed_script}; - echo "s/\"@DATE_YEAR\"/\"${date_year}\"/" >> ${file_sed_script}; - - sed -f ${file_sed_script} ${file_sed_src} &> ${file_sed_dest}; - - rm ${file_sed_script}; - + echo "${major_version} ${minor_version} ${revision} ${codename} ${date_day} ${date_month} ${date_year}" > ${file_version}; + svn commit; Index: /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_end_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_end_cycle.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_end_cycle.cpp (revision 137) @@ -19,4 +19,6 @@ log_begin(Morpheo,FUNCTION); + DEBUG_SIGNAL_END_CYCLE(); + #ifdef STATISTICS if (usage_is_set(_usage,USE_STATISTICS)) Index: /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_signal_handler.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_signal_handler.cpp (revision 136) +++ /trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_signal_handler.cpp (revision 137) @@ -21,4 +21,6 @@ case SIGALRM : { + DEBUG_SIGNAL_PRINT(); + throw ERRORMORPHEO(FUNCTION,_("Signal Alarm : can have a combinatory loop.\n")); break; Index: /trunk/Makefile.flags =================================================================== --- /trunk/Makefile.flags (revision 136) +++ /trunk/Makefile.flags (revision 137) @@ -20,15 +20,15 @@ #-----[ Flags ]-------------------------------------------- MORPHEO_FLAGS = -DSYSTEMC \ - -DDEBUG=DEBUG_TRACE \ -DVHDL \ -DSTATISTICS -# -DTRANSLATION \ -# -DDEBUG_SIGNAL \ +# -DPRINT_COLOR \ +# -DDEBUG=DEBUG_NONE \ +# -DDEBUG_MEMORY_LEAK \ +# -DDEBUG_SIGNAL \ # -DVHDL_TESTBENCH \ # -DVHDL_TESTBENCH_ASSERT \ -# -DPRINT_COLOR \ +# -DTRANSLATION \ # -DPOSITION \ -# -DDEBUG_MEMORY_LEAK \ # Flags : Index: /trunk/Makefile.tools =================================================================== --- /trunk/Makefile.tools (revision 136) +++ /trunk/Makefile.tools (revision 137) @@ -66,5 +66,6 @@ -Wall \ -Wunused \ - -m32 + -m32 \ + -pg CXX = export LANG=C; $(CC_PREFIX) g++ CXX_FLAGS = $(CC_FLAGS_COMMON) Index: /trunk/Platforms/Test/Makefile =================================================================== --- /trunk/Platforms/Test/Makefile (revision 136) +++ /trunk/Platforms/Test/Makefile (revision 137) @@ -52,4 +52,5 @@ PATH_BIN = $(MORPHEO_PREFIX)/bin PATH_LOG = $(MORPHEO_TMP)/log +PATH_GMON = $(MORPHEO_TMP)/gmon PATH_DATA = ./data PATH_LOGS = $(patsubst $(PATH_DATA)/%,$(PATH_LOG)/%,$(wildcard $(PATH_DATA)/*)) @@ -193,5 +194,5 @@ -$(PATH_LOG)/%.log : $(PATH_DATA)/%.cfg $(EXEC) $(PATH_LOGS) +$(PATH_LOG)/%.log : $(PATH_DATA)/%.cfg $(EXEC) $(PATH_LOGS) $(PATH_GMON) @\ file=$$($(BASENAME) $<); \ @@ -199,5 +200,11 @@ log=$@; \ $(ECHO) "Run : $*"; \ - $(EXEC_PREFIX) $(EXEC) $(EXEC_PARAMS) $${data} &> $$log; \ + \ + file_gmon=$$($(BASENAME) $*); \ + dir_gmon=$$($(DIRNAME) $*); \ + $(MKDIR) $(PATH_GMON)/$$dir_gmon; \ + export GMON_OUT_PREFIX=$(PATH_GMON)/$$dir_gmon/$$file_gmon;\ + \ + $(EXEC_PREFIX) $(EXEC) $(EXEC_PARAMS) $${data} &> $$log;\ $(GREP) -q "Test OK" $$log; \ declare -i test_ok=$$?; \ @@ -233,5 +240,5 @@ $(CXX) $(PLATFORMS_CXX_FLAGS) -c -o $@ $<; -$(PATH_OBJ) $(PATH_BIN) $(PATH_LOGS) : +$(PATH_OBJ) $(PATH_BIN) $(PATH_LOGS) $(PATH_GMON) : @\ $(ECHO) "Create directory : $@";\ @@ -243,6 +250,9 @@ @\ $(ECHO) "Delete temporary files in directory $(PWD)";\ - $(RM) $(OBJECTS) $(EXEC) $(LOGS) \ - *~ $(PATH_SRC)/*~ $(PATH_INC)/*~ $(PATH_DATA)/*/*~ *.res *.txt\ + $(RM) $(OBJECTS);\ + $(RM) $(EXEC);\ + $(RM) $(PATH_LOGS); \ + $(RM) $(PATH_GMON); \ + $(RM) *~ $(PATH_SRC)/*~ $(PATH_INC)/*~ $(PATH_DATA)/*/*~ *.res *.txt\ *core* \ tty* \ @@ -257,5 +267,5 @@ $(ECHO) "Delete generated files in directory $(PWD)";\ $(RM) $(PATH_OBJ) $(PATH_BIN) $(PATH_LOG) $(SCRIPT);\ - $(MAKE) --directory=$(PATH_SOFT) --makefile=Makefile clean_all; \ + $(MAKE) --directory=$(PATH_SOFT) --makefile=Makefile clean_all; \ $(MAKE) --directory=$(ENVIRONMENT_DIR) --makefile=Makefile clean_all; \ $(MAKE) --directory=$(MORPHEO_DIR) --makefile=Makefile clean_all; Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_1r_1w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_1r_1w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_1r_1w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_2r_1w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_2r_1w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_16x_2r_1w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_1x_12r_6w.cfg.save =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_1x_12r_6w.cfg.save (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_1x_12r_6w.cfg.save (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_10r_5w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_10r_5w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_10r_5w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_6r_3w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_6r_3w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_6r_3w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_8r_4w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_8r_4w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_2x_8r_4w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_32x_1r_1w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_32x_1r_1w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_32x_1r_1w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_32x_1r_1w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_4r_2w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_4r_2w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_4r_2w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_4r_2w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_6r_3w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_6r_3w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_6r_3w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_6r_3w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_8r_4w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_8r_4w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_4x_8r_4w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_8r_4w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_2r_1w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_2r_1w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_2r_1w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_2r_1w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_4r_2w.cfg =================================================================== --- /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_4r_2w.cfg (revision 137) +++ /trunk/Platforms/Test/data/Dhrystone-regfile/Dhrystone-x01_w04_02-regfile_8x_4r_2w.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_4r_2w.cfg +${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w01_04-Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w02_04-Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: unk/Platforms/Test/data/Simulation/x01_w04_02-O0.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-O0.cfg (revision 136) +++ (revision ) @@ -1,8 +1,0 @@ -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg -${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/soft_O0.x -0 -0 -4096 -2 Index: unk/Platforms/Test/data/Simulation/x01_w04_02-O1.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-O1.cfg (revision 136) +++ (revision ) @@ -1,8 +1,0 @@ -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg -${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/soft_O1.x -0 -0 -4096 -2 Index: unk/Platforms/Test/data/Simulation/x01_w04_02-O2.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-O2.cfg (revision 136) +++ (revision ) @@ -1,8 +1,0 @@ -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg -${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/soft_O2.x -0 -0 -4096 -2 Index: unk/Platforms/Test/data/Simulation/x01_w04_02-O3.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-O3.cfg (revision 136) +++ (revision ) @@ -1,8 +1,0 @@ -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg -${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/soft_O3.x -0 -0 -4096 -2 Index: unk/Platforms/Test/data/Simulation/x01_w04_02-Os.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Os.cfg (revision 136) +++ (revision ) @@ -1,8 +1,0 @@ -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen -${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg -${MORPHEO_TOPLEVEL}/Softwares/Dhrystone/soft_Os.x -0 -0 -4096 -2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w04_02-Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/Simulation/x01_w08_02-Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_01/Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_01/Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_01/Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x000.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x000.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x000.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x000/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x001.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x001.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x001.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x001/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x002.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x002.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x002.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x002/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x003.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x003.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x003.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x003/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x004.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x004.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x004.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x004/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x005.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x005.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x005.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x005/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/data/x02_w04_02/Test_x006.cfg =================================================================== --- /trunk/Platforms/Test/data/x02_w04_02/Test_x006.cfg (revision 137) +++ /trunk/Platforms/Test/data/x02_w04_02/Test_x006.cfg (revision 137) @@ -0,0 +1,8 @@ +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.sim +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen +${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg +${MORPHEO_TOPLEVEL}/Softwares/Test/Test_x006/bin/soft.x +0 +0 +4096 +2 Index: /trunk/Platforms/Test/script/copy_test.sh =================================================================== --- /trunk/Platforms/Test/script/copy_test.sh (revision 136) +++ /trunk/Platforms/Test/script/copy_test.sh (revision 137) @@ -7,25 +7,34 @@ } -if test ${#} -eq 2; then - name_src=${1}; - name_dest=${2}; -elif test ${#} -eq 1; then - name_src="x1_w1_0"; - name_dest=${1}; -else - usage ${*}; -fi; +function copy_test () +{ + # Test usage + if test ${#} -eq 2; then + name_src=${1}; + name_dest=${2}; + elif test ${#} -eq 1; then + name_src="x1_w1_0"; + name_dest=${1}; + else + usage ${*}; + fi; + + # Test directory source + if test ! -d ${name_src}; then + echo "${name_src} is an invalid directory"; + exit; + fi; + + # Test directoru dest : if don't exist, create it + if test ! -d ${name_dest}; then + mkdir ${name_dest}; + fi; + + # Copy and sed + for i in ${name_src}/*; do + sed s/Instance_${name_src}/Instance_${name_dest}/ ${i} > tmp; + mv tmp ${name_dest}/$(basename ${i}); + done +} -if test ! -d ${name_src}; then - echo "${name_src} is an invalid directory"; - exit; -fi; - -if test ! -d ${name_dest}; then - mkdir ${name_dest}; -fi; - -for i in ${name_src}/*; do - sed s/Instance_${name_src}/Instance_${name_dest}/ ${i} > tmp; - mv tmp ${name_dest}/$(basename ${i}); -done +copy_test ${*} Index: /trunk/Platforms/Test/script/genTest.sh =================================================================== --- /trunk/Platforms/Test/script/genTest.sh (revision 137) +++ /trunk/Platforms/Test/script/genTest.sh (revision 137) @@ -0,0 +1,76 @@ +#!/bin/bash + +function genFile_name() +{ + bank=$1; + read=$2; + write=$3; + file_out="-regfile_${bank}x_${read}r_${write}w"; + + echo "${file_out}"; +} + +function genFile_cfg() +{ + file_in=$1; + file_out=$2; + ext=$3; + bank=$4; + read=$5; + write=$6; + + sed s/@name/${file_out}/ ${file_in}.${ext} | + sed s/@bank/${bank}/ | + sed s/@read/${read}/ | + sed s/@write/${write}/ > ${file_out}.${ext}; +} + +function genFile_sim() +{ + file_in=$1; + file_out=$2; + ext=$3; + file=$4; + sed s/@file/${file}/ ${file_in}.${ext} > ${file_out}.${ext}; +} + +function genTest() +{ + file_cfg="Instance_x01_w04_02" + file_sim="Dhrystone-x01_w04_02" + ext="cfg" + banks=( 1 + 2 2 2 + 4 4 4 + 8 8 8 + 16 16 + 32); + reads=( 12 # bank : 1 + 10 8 6 # bank : 2 + 8 6 4 # bank : 3 + 4 2 1 # bank : 6 + 2 1 # bank : 12 + 1); # bank : 48 + writes=(6 # bank : 1 + 5 4 3 # bank : 2 + 4 3 2 # bank : 3 + 2 1 1 # bank : 6 + 1 1 # bank : 12 + 1); # bank : 48 + nb_cfg=${#banks[*]}; + + while test $nb_cfg -ge 1; do + nb_cfg=$(($nb_cfg-1)); + + bank=${banks[$nb_cfg]}; + read=${reads[$nb_cfg]}; + write=${writes[$nb_cfg]}; + + postfix=$(genFile_name $bank $read $write); + echo ${file_cfg}${postfix}; + genFile_cfg $file_cfg ${file_cfg}${postfix} $ext $bank $read $write; + genFile_sim $file_sim ${file_sim}${postfix} $ext ${file_cfg}${postfix}.${ext}; + done; +} + +genTest ${*}; Index: /trunk/Platforms/Test/script/script1.sh =================================================================== --- /trunk/Platforms/Test/script/script1.sh (revision 136) +++ /trunk/Platforms/Test/script/script1.sh (revision 137) @@ -1,4 +1,2 @@ - - prefix=$2; suffix=$1; Index: /trunk/Softwares/Basic_test/Makefile =================================================================== --- /trunk/Softwares/Basic_test/Makefile (revision 136) +++ /trunk/Softwares/Basic_test/Makefile (revision 137) @@ -15,7 +15,7 @@ DIR_LDSCRIPT = ../Common/ldscript/ -INCDIR = -I$(DIR_INC) -I$(DIR_COMMON_INC) $(NEWLIB_INCDIR) -LIBDIR = $(NEWLIB_LIBDIR) -LIBNAME = $(NEWLIB_LIBNAME) +INCDIR = -I$(DIR_INC) -I$(DIR_COMMON_INC) $($(OS)_INCDIR) +LIBDIR = $($(OS)_LIBDIR) +LIBNAME = $($(OS)_LIBNAME) #-----[ Files ]------------------------------------------------------------------- Index: /trunk/Softwares/Dhrystone/Makefile =================================================================== --- /trunk/Softwares/Dhrystone/Makefile (revision 136) +++ /trunk/Softwares/Dhrystone/Makefile (revision 137) @@ -17,14 +17,14 @@ DIR_SYS = $(DIR_SRC)/sys DIR_INC = $(DIR_SRC)/include -DIR_LDSCRIPT = $(NEWLIB)/lib/ +DIR_LDSCRIPT = $($(OS)_DIR_LDSCRIPT) -INCDIR = $(NEWLIB_INCDIR) -I$(DIR_INC) -LIBDIR = $(NEWLIB_LIBDIR) -LIBNAME = $(NEWLIB_LIBNAME) +INCDIR = $($(OS)_INCDIR) -I$(DIR_INC) +LIBDIR = $($(OS)_LIBDIR) +LIBNAME = $($(OS)_LIBNAME) FLAGS = -DDHRYSTONE_NB_RUNS=$(DHRYSTONE_NB_RUNS) #-----[ Files ]------------------------------------------------------------------- -OBJECTS = $(NEWLIB)/lib/*.o \ +OBJECTS = $($(OS)_OBJECTS) \ $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s)) \ $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s)) \ Index: /trunk/Softwares/Makefile.Software =================================================================== --- /trunk/Softwares/Makefile.Software (revision 136) +++ /trunk/Softwares/Makefile.Software (revision 137) @@ -13,5 +13,8 @@ endif +include $(MORPHEO_TOPLEVEL)/Softwares/Makefile.defs + #-----[ Directory ]--------------------------------------------------------------- + DIR_OBJ = obj DIR_BIN = bin @@ -19,17 +22,35 @@ EXE = soft -DIR_COMMON = $(MORPHEO_TOPLEVEL)/Softwares/Common -DIR_COMMON_C = $(DIR_COMMON)/src/c -DIR_COMMON_ASM = $(DIR_COMMON)/src/asm -DIR_COMMON_SYS = $(DIR_COMMON)/src/sys -DIR_COMMON_INC = $(DIR_COMMON)/include +DIR_COMMON = $(MORPHEO_TOPLEVEL)/Softwares/Common +DIR_COMMON_C = $(DIR_COMMON)/src/c +DIR_COMMON_ASM = $(DIR_COMMON)/src/asm +DIR_COMMON_SYS = $(DIR_COMMON)/src/sys +DIR_COMMON_INC = $(DIR_COMMON)/include -OBJECTS_COMMON = $(patsubst $(DIR_COMMON_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_SYS)/*.s)) \ - $(patsubst $(DIR_COMMON_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_ASM)/*.s)) \ - $(patsubst $(DIR_COMMON_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_C)/*.c)) +OBJECTS_COMMON = $(patsubst $(DIR_COMMON_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_SYS)/*.s))\ + $(patsubst $(DIR_COMMON_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_ASM)/*.s))\ + $(patsubst $(DIR_COMMON_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_COMMON_C)/*.c)) #-----[ To the compilation ]------------------------------------------------------ -OPTIMIZE = -O3 -std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float + +#~~~~~[ OS : Newlib ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +NEWLIB_DIR_LDSCRIPT = $(NEWLIB)/lib/ +#NEWLIB_INCDIR +#NEWLIB_LIBDIR +#NEWLIB_LIBNAME +NEWLIB_OBJECTS = $(NEWLIB)/lib/*.o + +#~~~~~[ OS : UNIX ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +UNIX_DIR_LDSCRIPT = +UNIX_INCDIR = +UNIX_LIBDIR = +UNIX_LIBNAME = -lm +UNIX_OBJECTS = + + +#~~~~~[ TARGET : MORPHEO ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +MORPHEO_OPTIMIZE = -O3 -std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float #Option : @@ -48,17 +69,33 @@ # Tools -OR32_CC = $(OR1K_BIN)/or32-elf-gcc -OR32_AS = $(OR1K_BIN)/or32-elf-as -OR32_LD = $(OR1K_BIN)/or32-elf-ld -OR32_OBJDUMP = $(OR1K_BIN)/or32-elf-objdump -OR32_NM = $(OR1K_BIN)/or32-elf-nm +MORPHEO_CC = $(OR1K_BIN)/or32-elf-gcc +MORPHEO_AS = $(OR1K_BIN)/or32-elf-as +MORPHEO_LD = $(OR1K_BIN)/or32-elf-ld +MORPHEO_OBJDUMP = $(OR1K_BIN)/or32-elf-objdump +MORPHEO_NM = $(OR1K_BIN)/or32-elf-nm # Tools's option -OR32_CC_OPT = -Wall $(INCDIR) $(OPTIMIZE) -Wlong-long -DMorpheo $(FLAGS) +MORPHEO_CC_OPT = -Wall $(INCDIR) $(MORPHEO_OPTIMIZE) -Wlong-long -DMorpheo $(FLAGS) # -DHAVE_LIBC -OR32_AS_OPT = -OR32_LD_OPT = -T$(DIR_LDSCRIPT)/or32.ld $(LIBDIR) $(LIBNAME) $(OR1K_LIBDIR) $(OR1K_LIBNAME) -OR32_OBJDUMP_OPT = -D -OR32_NM_OPT = -n +MORPHEO_AS_OPT = +MORPHEO_LD_OPT = -T$(DIR_LDSCRIPT)/or32.ld $(LIBDIR) $(LIBNAME) $(OR1K_LIBDIR) $(OR1K_LIBNAME) +MORPHEO_OBJDUMP_OPT = -D +MORPHEO_NM_OPT = -n + +#~~~~~[ TARGET : x86 ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +x86_OPTIMIZE = -O3 -std=c99 + +x86_CC = gcc +x86_AS = as +x86_LD = gcc +x86_OBJDUMP = objdump +x86_NM = nm + +x86_CC_OPT = -Wall $(INCDIR) $(x86_OPTIMIZE) -Wlong-long -DUNIX $(FLAGS) -g3 +x86_AS_OPT = +x86_LD_OPT = $(LIBDIR) $(LIBNAME) -g3 +x86_OBJDUMP_OPT = -D +x86_NM_OPT = -n #-----[ Rules ]------------------------------------------------------------------- @@ -77,9 +114,9 @@ $(MAKE) $(OBJECTS); \ $(ECHO) "Linkage : $*.x"; \ - $(OR32_LD) -o $@ $(OBJECTS) $(OR32_LD_OPT); \ + $($(TARGET)_LD) -o $@ $(OBJECTS) $($(TARGET)_LD_OPT); \ $(ECHO) "List symbols : $*.x.nm"; \ - $(OR32_NM) $(OR32_NM_OPT) $@ > $@.nm; \ + $($(TARGET)_NM) $($(TARGET)_NM_OPT) $@ > $@.nm; \ $(ECHO) "Display info : $*.x.txt"; \ - $(OR32_OBJDUMP) $(OR32_OBJDUMP_OPT) $@ > $@.txt;\ + $($(TARGET)_OBJDUMP) $($(TARGET)_OBJDUMP_OPT) $@ > $@.txt;\ echo $($(GREP) "l.jal 0" $@.txt); @@ -87,12 +124,12 @@ @\ $(ECHO) "Compilation : $*.s"; \ - $(OR32_CC) $(OR32_CC_OPT) -o $@ -c $^ ; -# $(OR32_CC) $(OR32_CC_OPT) -S -o $@.s -c $^ ; + $($(TARGET)_CC) $($(TARGET)_CC_OPT) -o $@ -c $^ ; +# $($(TARGET)_CC) $($(TARGET)_CC_OPT) -S -o $@.s -c $^ ; $(DIR_OBJ)/%.o : %.c @\ $(ECHO) "Compilation : $*.c"; \ - $(OR32_CC) $(OR32_CC_OPT) -o $@ -c $^ ; -# $(OR32_CC) $(OR32_CC_OPT) -S -o $@.s -c $^ ; + $($(TARGET)_CC) $($(TARGET)_CC_OPT) -o $@ -c $^ ; +# $($(TARGET)_CC) $($(TARGET)_CC_OPT) -S -o $@.s -c $^ ; $(DIR_BIN) $(DIR_OBJ) : Index: /trunk/Softwares/Makefile.defs =================================================================== --- /trunk/Softwares/Makefile.defs (revision 137) +++ /trunk/Softwares/Makefile.defs (revision 137) @@ -0,0 +1,13 @@ +# +# $Id$ +# +# [ Description ] +# +# Makefile +# + +OS = NEWLIB +TARGET = MORPHEO + +#OS = UNIX +#TARGET = x86 Index: /trunk/Softwares/MiBench/Makefile =================================================================== --- /trunk/Softwares/MiBench/Makefile (revision 136) +++ /trunk/Softwares/MiBench/Makefile (revision 137) @@ -17,9 +17,9 @@ DIR_SYS = $(DIR_SRC)/sys DIR_INC = $(DIR_SRC)/include -DIR_LDSCRIPT = $(NEWLIB)/lib/ +DIR_LDSCRIPT = $($(OS)_DIR_LDSCRIPT) -INCDIR = $(NEWLIB_INCDIR) -I$(DIR_INC) -LIBDIR = $(NEWLIB_LIBDIR) -LIBNAME = $(NEWLIB_LIBNAME) +INCDIR = $($(OS)_INCDIR) -I$(DIR_INC) +LIBDIR = $($(OS)_LIBDIR) +LIBNAME = $($(OS)_LIBNAME) MIBENCH_DATA_PATH = $(MORPHEO_TOPLEVEL)/Softwares/MiBench/data @@ -28,5 +28,5 @@ #-----[ Files ]------------------------------------------------------------------- -OBJECTS = $(NEWLIB)/lib/*.o \ +OBJECTS = $($(OS)_OBJECTS) \ $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s)) \ $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s)) \ Index: /trunk/Softwares/MiBench/Makefile.defs =================================================================== --- /trunk/Softwares/MiBench/Makefile.defs (revision 136) +++ /trunk/Softwares/MiBench/Makefile.defs (revision 137) @@ -10,14 +10,18 @@ BENCHS = \ - automative.basicmath\ - automative.bitcount \ - automative.qsort \ - automative.susan \ - network.dijkstra \ - office.stringsearch \ - security.sha \ + automative.basicmath \ + automative.bitcount \ + automative.qsort \ + automative.susan \ + automative.susan_edges \ + automative.susan_corners \ + automative.susan_smoothing \ + network.dijkstra \ + office.stringsearch \ + security.sha \ + all \ none -BENCHS_TYPE = -DMIBENCH_LARGE +BENCHS_TYPE = -DMIBENCH_SMALL # MIBENCH_SMALL Index: /trunk/Softwares/MiBench/src/c/benchmark.c =================================================================== --- /trunk/Softwares/MiBench/src/c/benchmark.c (revision 136) +++ /trunk/Softwares/MiBench/src/c/benchmark.c (revision 137) @@ -148,4 +148,5 @@ free(argv[i]); free(argv); + free(filename); } #endif @@ -175,4 +176,5 @@ free(argv[i]); free(argv); + free(filename); } #endif @@ -193,8 +195,8 @@ //======================================================================================= -// [ run_automative_susan ] -//======================================================================================= -#ifdef MIBENCH_SMALL -void main_susan_small (void) +// [ run_automative_susan_egdes ] +//======================================================================================= +#ifdef MIBENCH_SMALL +void main_susan_edges_small (void) { int argc = 4; @@ -205,4 +207,6 @@ char * filename_input = (char *) malloc(strlen(MIBENCH_DATA_PATH)+strlen(_filename_input)); strcpy(filename_input,MIBENCH_DATA_PATH); strcat(filename_input,_filename_input); + char * filename_output = "output_small.edges.pgm"; + char * option = "-e"; argv = (char **)malloc ((argc) * sizeof(char *)); @@ -214,7 +218,4 @@ argv[1] = memcpy(argv[1],filename_input ,strlen(filename_input )); - char * filename_output = "output_small.smoothing.pgm"; - char * option = "-s"; - argv[2] = (char *) malloc (strlen(filename_output)); argv[2] = memcpy(argv[2],filename_output,strlen(filename_output)); @@ -225,43 +226,13 @@ main_susan(argc, argv); - for (int i=2; i