Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h (revision 139) @@ -53,4 +53,5 @@ public : uint32_t * _nb_general_register ;//[nb_rename_bloc] public : uint32_t * _nb_special_register ;//[nb_rename_bloc] + public : Trat_scheme_t * _rat_scheme ;//[nb_rename_bloc] public : uint32_t * _nb_reg_free ;//[nb_rename_bloc] public : uint32_t * _nb_rename_unit_bank ;//[nb_rename_bloc] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp (revision 139) @@ -161,4 +161,5 @@ DELETE1(_param->_nb_rename_unit_bank ,_param->_nb_rename_bloc); DELETE1(_param->_nb_reg_free ,_param->_nb_rename_bloc); + DELETE1(_param->_rat_scheme ,_param->_nb_rename_bloc); DELETE1(_param->_nb_special_register ,_param->_nb_rename_bloc); DELETE1(_param->_nb_general_register ,_param->_nb_rename_bloc); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp (revision 139) @@ -115,4 +115,5 @@ ALLOC1(_param->_nb_general_register ,uint32_t ,_param->_nb_rename_bloc); ALLOC1(_param->_nb_special_register ,uint32_t ,_param->_nb_rename_bloc); + ALLOC1(_param->_rat_scheme ,Trat_scheme_t ,_param->_nb_rename_bloc); ALLOC1(_param->_nb_reg_free ,uint32_t ,_param->_nb_rename_bloc); ALLOC1(_param->_nb_rename_unit_bank ,uint32_t ,_param->_nb_rename_bloc); @@ -130,8 +131,9 @@ _param->_nb_general_register [i] = fromString (getParam("nb_general_register" , "rename_bloc",toString(i).c_str(),"")); _param->_nb_special_register [i] = fromString (getParam("nb_special_register" , "rename_bloc",toString(i).c_str(),"")); + _param->_rat_scheme [i] = fromString (getParam("rat_scheme" , "rename_bloc",toString(i).c_str(),"")); _param->_nb_reg_free [i] = fromString (getParam("nb_reg_free" , "rename_bloc",toString(i).c_str(),"")); _param->_nb_rename_unit_bank [i] = fromString (getParam("nb_rename_unit_bank" , "rename_bloc",toString(i).c_str(),"")); -// _param->_size_read_counter [i] = fromString (getParam("size_read_counter" , "rename_bloc",toString(i).c_str(),"")); - } +// _param->_size_read_counter [i] = fromString (getParam("size_read_counter" , "rename_bloc",toString(i).c_str(),"")); + } //----------------------------------------------------- Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h (revision 139) @@ -91,4 +91,5 @@ public : SC_OUT(Tcontrol_t ) ** out_DECOD_NO_EXECUTE ;//[nb_inst_decod] public : SC_OUT(Tcontrol_t ) ** out_DECOD_IS_DELAY_SLOT ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_SAVE_RAT ;//[nb_inst_decod] #ifdef DEBUG public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_ADDRESS ;//[nb_inst_decod] @@ -145,7 +146,9 @@ private : Tgeneral_data_t * reg_CONTEXT_ADDRESS_PREVIOUS ; //[nb_context] private : Tcontrol_t * reg_CONTEXT_IS_DELAY_SLOT ; //[nb_context] +//private : Tcontrol_t * reg_CONTEXT_SAVE_RAT ; //[nb_context] private : Tcontrol_t * internal_CONTEXT_HAVE_TRANSACTION; //[nb_context] private : Tgeneral_data_t * internal_CONTEXT_ADDRESS_PREVIOUS; //[nb_context] private : Tcontrol_t * internal_CONTEXT_IS_DELAY_SLOT ; //[nb_context] +//private : Tcontrol_t * internal_CONTEXT_SAVE_RAT ; //[nb_context] private : Tcontrol_t * internal_DECOD_VAL ; //[nb_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp (revision 139) @@ -90,4 +90,5 @@ ALLOC1_SIGNAL_OUT(out_DECOD_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); @@ -165,8 +166,10 @@ ALLOC1(reg_CONTEXT_ADDRESS_PREVIOUS ,Tgeneral_data_t,_param->_nb_context); ALLOC1(reg_CONTEXT_IS_DELAY_SLOT ,Tcontrol_t ,_param->_nb_context); +// ALLOC1(reg_CONTEXT_SAVE_RAT ,Tcontrol_t ,_param->_nb_context); ALLOC1(internal_CONTEXT_HAVE_TRANSACTION ,Tcontrol_t ,_param->_nb_context); ALLOC1(internal_CONTEXT_ADDRESS_PREVIOUS ,Tgeneral_data_t,_param->_nb_context); ALLOC1(internal_CONTEXT_IS_DELAY_SLOT ,Tcontrol_t ,_param->_nb_context); +// ALLOC1(internal_CONTEXT_SAVE_RAT ,Tcontrol_t ,_param->_nb_context); #ifdef STATISTICS Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp (revision 139) @@ -51,4 +51,5 @@ DELETE1_SIGNAL(out_DECOD_NO_EXECUTE ,_param->_nb_inst_decod,1 ); DELETE1_SIGNAL(out_DECOD_IS_DELAY_SLOT,_param->_nb_inst_decod,1 ); + DELETE1_SIGNAL(out_DECOD_SAVE_RAT ,_param->_nb_inst_decod,1 ); #ifdef DEBUG DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); @@ -99,7 +100,10 @@ DELETE1(reg_CONTEXT_ADDRESS_PREVIOUS ,_param->_nb_context); DELETE1(reg_CONTEXT_IS_DELAY_SLOT ,_param->_nb_context); +// DELETE1(reg_CONTEXT_SAVE_RAT ,_param->_nb_context); + DELETE1(internal_CONTEXT_HAVE_TRANSACTION ,_param->_nb_context); DELETE1(internal_CONTEXT_ADDRESS_PREVIOUS ,_param->_nb_context); DELETE1(internal_CONTEXT_IS_DELAY_SLOT ,_param->_nb_context); +// DELETE1(internal_CONTEXT_SAVE_RAT ,_param->_nb_context); #ifdef STATISTICS Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp (revision 139) @@ -59,4 +59,5 @@ internal_CONTEXT_ADDRESS_PREVIOUS [i] = reg_CONTEXT_ADDRESS_PREVIOUS [i]; internal_CONTEXT_IS_DELAY_SLOT [i] = reg_CONTEXT_IS_DELAY_SLOT [i]; +// internal_CONTEXT_SAVE_RAT [i] = reg_CONTEXT_SAVE_RAT [i]; can_continue [i] = PORT_READ(in_CONTEXT_DECOD_ENABLE [i]); @@ -169,4 +170,6 @@ // Depth current. If have decod a branch and i can continue : depth = depth_next Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_CONTEXT_DEPTH [x]):0; + // Tcontrol_t save_rat = internal_CONTEXT_SAVE_RAT [x]; + Tcontrol_t no_execute = _decod_instruction->_no_execute; if ((_param->_nb_branch_speculated[x] > 0) and have_decod_branch [x]) @@ -182,6 +185,8 @@ PORT_WRITE(out_DECOD_TYPE [i], type); PORT_WRITE(out_DECOD_OPERATION [i], _decod_instruction->_operation ); - PORT_WRITE(out_DECOD_NO_EXECUTE [i], _decod_instruction->_no_execute ); + PORT_WRITE(out_DECOD_NO_EXECUTE [i], no_execute); PORT_WRITE(out_DECOD_IS_DELAY_SLOT [i], _decod_instruction->_is_delay_slot ); + // PORT_WRITE(out_DECOD_SAVE_RAT [i], save_rat); + PORT_WRITE(out_DECOD_SAVE_RAT [i], ((type == TYPE_BRANCH) and not no_execute)); #ifdef DEBUG PORT_WRITE(out_DECOD_ADDRESS [i], addr); @@ -288,4 +293,5 @@ internal_CONTEXT_ADDRESS_PREVIOUS [x] = addr; internal_CONTEXT_IS_DELAY_SLOT [x] = (type == TYPE_BRANCH); // next is a delay slot if current have branch type + // internal_CONTEXT_SAVE_RAT [x] = ((type == TYPE_BRANCH) and not no_execute); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_transition.cpp (revision 139) @@ -32,4 +32,5 @@ reg_CONTEXT_ADDRESS_PREVIOUS [i] = 0xfc; // 0x100-4. (0x100 : reset address) reg_CONTEXT_IS_DELAY_SLOT [i] = 0; + // reg_CONTEXT_SAVE_RAT [i] = 0; } } @@ -44,4 +45,5 @@ reg_CONTEXT_ADDRESS_PREVIOUS [i] = internal_CONTEXT_ADDRESS_PREVIOUS [i]; reg_CONTEXT_IS_DELAY_SLOT [i] = internal_CONTEXT_IS_DELAY_SLOT [i]; + // reg_CONTEXT_SAVE_RAT [i] = internal_CONTEXT_SAVE_RAT [i]; } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h (revision 139) @@ -82,4 +82,5 @@ public : SC_IN (Tcontrol_t ) ** in_DECOD_IN_NO_EXECUTE ;//[nb_inst_decod] public : SC_IN (Tcontrol_t ) ** in_DECOD_IN_IS_DELAY_SLOT ;//[nb_inst_decod] + public : SC_IN (Tcontrol_t ) ** in_DECOD_IN_SAVE_RAT ;//[nb_inst_decod] #ifdef DEBUG public : SC_IN (Tgeneral_data_t ) ** in_DECOD_IN_ADDRESS ;//[nb_inst_decod] @@ -115,4 +116,5 @@ public : SC_OUT(Tcontrol_t ) ** out_DECOD_OUT_LAST_EVENT ;//[nb_inst_decod] public : SC_OUT(Tcontrol_t ) ** out_DECOD_OUT_IS_DELAY_SLOT ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_OUT_SAVE_RAT ;//[nb_inst_decod] #ifdef DEBUG public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_OUT_ADDRESS ;//[nb_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Types.h (revision 139) @@ -40,4 +40,5 @@ public : Tcontrol_t * _no_execute ; public : Tcontrol_t * _is_delay_slot ; + public : Tcontrol_t * _save_rat ; #ifdef DEBUG public : Tgeneral_data_t * _address ; @@ -72,4 +73,5 @@ ALLOC1(_no_execute ,Tcontrol_t ,_nb_inst); ALLOC1(_is_delay_slot ,Tcontrol_t ,_nb_inst); + ALLOC1(_save_rat ,Tcontrol_t ,_nb_inst); #ifdef DEBUG ALLOC1(_address ,Tgeneral_data_t ,_nb_inst); @@ -107,4 +109,5 @@ DELETE1(_no_execute ,_nb_inst); DELETE1(_is_delay_slot ,_nb_inst); + DELETE1(_save_rat ,_nb_inst); #ifdef DEBUG DELETE1(_address ,_nb_inst); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp (revision 139) @@ -70,4 +70,5 @@ ALLOC1_SIGNAL_IN ( in_DECOD_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_IN ( in_DECOD_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_DECOD_IN_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_IN ( in_DECOD_IN_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); @@ -109,4 +110,5 @@ ALLOC1_SIGNAL_OUT(out_DECOD_OUT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_DECOD_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_OUT_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_OUT(out_DECOD_OUT_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp (revision 139) @@ -40,4 +40,5 @@ DELETE1_SIGNAL( in_DECOD_IN_NO_EXECUTE ,_param->_nb_inst_decod,1 ); DELETE1_SIGNAL( in_DECOD_IN_IS_DELAY_SLOT ,_param->_nb_inst_decod,1 ); + DELETE1_SIGNAL( in_DECOD_IN_SAVE_RAT ,_param->_nb_inst_decod,1 ); #ifdef DEBUG DELETE1_SIGNAL( in_DECOD_IN_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); @@ -72,4 +73,5 @@ DELETE1_SIGNAL(out_DECOD_OUT_LAST_EVENT ,_param->_nb_inst_decod,1 ); DELETE1_SIGNAL(out_DECOD_OUT_IS_DELAY_SLOT ,_param->_nb_inst_decod,1 ); + DELETE1_SIGNAL(out_DECOD_OUT_SAVE_RAT ,_param->_nb_inst_decod,1 ); #ifdef DEBUG DELETE1_SIGNAL(out_DECOD_OUT_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMoore.cpp (revision 139) @@ -64,4 +64,5 @@ PORT_WRITE(out_DECOD_OUT_LAST_EVENT [i],0); PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE[num_bank].front()->_is_delay_slot [0]); + PORT_WRITE(out_DECOD_OUT_SAVE_RAT [i],reg_QUEUE[num_bank].front()->_save_rat [0]); #ifdef DEBUG PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE[num_bank].front()->_address [0]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp (revision 139) @@ -81,4 +81,5 @@ entry->_no_execute [0] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); entry->_is_delay_slot [0] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); + entry->_save_rat [0] = PORT_READ(in_DECOD_IN_SAVE_RAT [i]); #ifdef DEBUG entry->_address [0] = PORT_READ(in_DECOD_IN_ADDRESS [i]); @@ -186,5 +187,5 @@ it++) { - log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.3d %.2d, %.2d %.3d %.1d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" ,i ,x @@ -195,4 +196,5 @@ ,(*it)->_no_execute [0] ,(*it)->_is_delay_slot [0] + ,(*it)->_save_rat [0] ,(*it)->_address [0] ,(*it)->_address [0]<<2 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMoore.cpp (revision 139) @@ -64,4 +64,5 @@ PORT_WRITE(out_DECOD_OUT_LAST_EVENT [i],0); PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE->front()->_is_delay_slot [index]); + PORT_WRITE(out_DECOD_OUT_SAVE_RAT [i],reg_QUEUE->front()->_save_rat [index]); #ifdef DEBUG PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE->front()->_address [index]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp (revision 139) @@ -84,4 +84,5 @@ entry->_no_execute [i] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); entry->_is_delay_slot [i] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); + entry->_save_rat [i] = PORT_READ(in_DECOD_IN_SAVE_RAT [i]); #ifdef DEBUG entry->_address [i] = PORT_READ(in_DECOD_IN_ADDRESS [i]); @@ -196,5 +197,5 @@ { if ((*it)->_val [i]) - log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" + log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" ,x ,i @@ -206,4 +207,5 @@ ,(*it)->_no_execute [i] ,(*it)->_is_delay_slot [i] + ,(*it)->_save_rat [i] ,(*it)->_address [i] ,(*it)->_address [i]<<2 Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h (revision 139) @@ -92,4 +92,5 @@ public : SC_OUT(Tcontrol_t ) ** out_DECOD_LAST_EVENT ;//[nb_inst_decod] public : SC_OUT(Tcontrol_t ) ** out_DECOD_IS_DELAY_SLOT ;//[nb_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_SAVE_RAT ;//[nb_inst_decod] #ifdef DEBUG public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_ADDRESS ;//[nb_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp (revision 139) @@ -89,4 +89,5 @@ ALLOC1_SIGNAL_OUT(out_DECOD_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_DECOD_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); @@ -308,4 +309,6 @@ COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT", dest, "in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT"); + COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_SAVE_RAT" , + dest, "in_DECOD_IN_"+toString(i)+"_SAVE_RAT" ); #ifdef DEBUG COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_ADDRESS" , @@ -454,4 +457,5 @@ // in_DECOD_IN_NO_EXECUTE - component decod // in_DECOD_IN_IS_DELAY_SLOT - component decod + // in_DECOD_IN_SAVE_RAT - component decod // in_DECOD_IN_ADDRESS - component decod // in_DECOD_IN_ADDRESS_NEXT - component decod @@ -506,4 +510,6 @@ PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT", dest,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT"); + PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_SAVE_RAT" , + dest,"out_DECOD_" +toString(i)+"_SAVE_RAT" ); #ifdef DEBUG PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS" , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp (revision 139) @@ -52,4 +52,5 @@ DELETE1_SIGNAL(out_DECOD_LAST_EVENT ,_param->_nb_inst_decod,1 ); DELETE1_SIGNAL(out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod,1 ); + DELETE1_SIGNAL(out_DECOD_SAVE_RAT ,_param->_nb_inst_decod,1 ); #ifdef DEBUG DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Front_end.h (revision 139) @@ -99,4 +99,5 @@ public : SC_OUT(Tcontrol_t ) ** out_DECOD_LAST_EVENT ;//[sum_inst_decod] public : SC_OUT(Tcontrol_t ) ** out_DECOD_IS_DELAY_SLOT ;//[sum_inst_decod] + public : SC_OUT(Tcontrol_t ) ** out_DECOD_SAVE_RAT ;//[sum_inst_decod] #ifdef DEBUG public : SC_OUT(Tgeneral_data_t ) ** out_DECOD_ADDRESS ;//[sum_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp (revision 139) @@ -107,4 +107,5 @@ ALLOC1_SIGNAL_OUT (out_DECOD_LAST_EVENT ,"LAST_EVENT" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT (out_DECOD_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT (out_DECOD_SAVE_RAT ,"SAVE_RAT" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_OUT (out_DECOD_ADDRESS ,"ADDRESS" ,Tgeneral_data_t ,_param->_size_instruction_address ); @@ -749,4 +750,6 @@ PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_IS_DELAY_SLOT", dest,"out_DECOD_"+toString(x)+"_IS_DELAY_SLOT"); + PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_SAVE_RAT" , + dest,"out_DECOD_"+toString(x)+"_SAVE_RAT" ); #ifdef DEBUG PORT_MAP(_component,src ,"out_DECOD_"+toString(j)+"_ADDRESS" , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp (revision 139) @@ -54,4 +54,5 @@ DELETE1_SIGNAL(out_DECOD_LAST_EVENT ,_param->_sum_inst_decod,1 ); DELETE1_SIGNAL(out_DECOD_IS_DELAY_SLOT ,_param->_sum_inst_decod,1 ); + DELETE1_SIGNAL(out_DECOD_SAVE_RAT ,_param->_sum_inst_decod,1 ); #ifdef DEBUG DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_sum_inst_decod,_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h (revision 139) @@ -150,4 +150,7 @@ public : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RE_PHY_OLD ;//[nb_rename_unit][nb_inst_retire] public : SC_OUT(Tspecial_address_t ) *** out_RETIRE_NUM_REG_RE_PHY_NEW ;//[nb_rename_unit][nb_inst_retire] + public : SC_OUT(Tcontrol_t ) *** out_RETIRE_RESTORE ;//[nb_rename_unit][nb_inst_retire] + public : SC_OUT(Tcontrol_t ) *** out_RETIRE_RESTORE_RD_PHY_OLD ;//[nb_rename_unit][nb_inst_retire] + public : SC_OUT(Tcontrol_t ) *** out_RETIRE_RESTORE_RE_PHY_OLD ;//[nb_rename_unit][nb_inst_retire] // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -157,5 +160,7 @@ //public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context] public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_STOP ;//[nb_front_end][nb_context] - + public : SC_OUT(Tevent_type_t ) *** out_RETIRE_EVENT_TYPE ;//[nb_front_end][nb_context] + public : SC_OUT(Tdepth_t ) *** out_RETIRE_EVENT_DEPTH ;//[nb_front_end][nb_context] + // ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ public : SC_IN (Tcontrol_t ) ** in_COMMIT_VAL ;//[nb_inst_commit] @@ -260,10 +265,12 @@ private : Tcommit_event_state_t ** reg_EVENT_STATE ;//[nb_front_end][nb_context] + private : Tevent_type_t ** reg_EVENT_TYPE ;//[nb_front_end][nb_context] //private : bool ** reg_EVENT_FLUSH ;//[nb_front_end][nb_context] //private : bool ** reg_EVENT_STOP ;//[nb_front_end][nb_context] - private : uint32_t ** reg_EVENT_NUM_BANK ;//[nb_front_end][nb_context] - private : uint32_t ** reg_EVENT_NUM_PTR ;//[nb_front_end][nb_context] +//private : uint32_t ** reg_EVENT_NUM_BANK ;//[nb_front_end][nb_context] +//private : uint32_t ** reg_EVENT_NUM_PTR ;//[nb_front_end][nb_context] //private : bool ** reg_EVENT_CAN_RESTART ;//[nb_front_end][nb_context] private : uint32_t ** reg_EVENT_PACKET ;//[nb_front_end][nb_context] + private : Tdepth_t ** reg_EVENT_DEPTH ;//[nb_front_end][nb_context] private : uint32_t ** reg_EVENT_NB_INST ;//[nb_front_end][nb_context] private : bool ** reg_EVENT_LAST ;//[nb_front_end][nb_context] @@ -279,4 +286,7 @@ private : Taddress_t ** reg_PC_CURRENT_IS_DS_TAKE ;//[nb_front_end][nb_context] private : Taddress_t ** reg_PC_NEXT ;//[nb_front_end][nb_context] + + private : bool *** rat_gpr_update_table ;//[nb_front_end][nb_context][nb_general_register_logic] + private : bool *** rat_spr_update_table ;//[nb_front_end][nb_context][nb_special_register_logic] // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -292,8 +302,11 @@ private : entry_t * ** internal_BANK_COMMIT_ENTRY ;//[nb_bank][nb_bank_access_commit] - private : uint32_t internal_BANK_RETIRE_HEAD ; - private : Tcontrol_t * internal_BANK_RETIRE_VAL ;//[nb_bank] - private : uint32_t * internal_BANK_RETIRE_NUM_RENAME_UNIT ;//[nb_bank] - private : uint32_t * internal_BANK_RETIRE_NUM_INST ;//[nb_bank] + private : uint32_t internal_BANK_RETIRE_HEAD ; + private : Tcontrol_t * internal_BANK_RETIRE_VAL ;//[nb_bank] + private : uint32_t * internal_BANK_RETIRE_NUM_RENAME_UNIT ;//[nb_bank] + private : uint32_t * internal_BANK_RETIRE_NUM_INST ;//[nb_bank] +//private : Tcontrol_t * internal_BANK_RETIRE_RESTORE ;//[nb_bank] + private : Tcontrol_t * internal_BANK_RETIRE_RESTORE_RD_PHY_OLD;//[nb_bank] + private : Tcontrol_t * internal_BANK_RETIRE_RESTORE_RE_PHY_OLD;//[nb_bank] private : Tcontrol_t * internal_REEXECUTE_VAL ;//[nb_inst_reexecute] @@ -309,4 +322,7 @@ private : Tcontrol_t ** internal_RETIRE_EVENT_VAL ;//[nb_front_end][nb_context] + + private : bool *** internal_rat_gpr_update_table;//[nb_front_end][nb_context][nb_general_register_logic] + private : bool *** internal_rat_spr_update_table;//[nb_front_end][nb_context][nb_special_register_logic] #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h (revision 139) @@ -41,11 +41,12 @@ //public : uint32_t _size_general_register ; //public : uint32_t _size_special_register ; + public : Trat_scheme_t * _rat_scheme ;//[nb_front_end] public : Tpriority_t _priority ; public : Tload_balancing_t _load_balancing ; public : uint32_t _nb_rename_unit_select ; public : uint32_t _nb_thread ; - public : uint32_t ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context] + public : uint32_t ** _translate_num_context_to_num_thread;//[nb_front_end][nb_context] public : const uint32_t _nb_bank_access_commit ; - + public : uint32_t _max_nb_context ; public : uint32_t _max_nb_inst_insert ; @@ -96,4 +97,5 @@ uint32_t size_general_register , uint32_t size_special_register , + Trat_scheme_t * rat_scheme ,//[nb_front_end] Tpriority_t priority , Tload_balancing_t load_balancing , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h (revision 139) @@ -71,4 +71,5 @@ #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:EVENT_STATE_NO_EVENT)) +#define rob_state_to_event_type(x) ((x==ROB_END_BRANCH_MISS)?EVENT_TYPE_BRANCH_MISS_SPECULATION:((x==ROB_END_LOAD_MISS)?EVENT_TYPE_LOAD_MISS_SPECULATION:((x==ROB_END_EXCEPTION)?EVENT_TYPE_EXCEPTION:EVENT_TYPE_NONE))) // #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT))) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp (revision 139) @@ -120,10 +120,10 @@ _ALLOC2_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); _ALLOC2_SIGNAL_OUT(out_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); +// _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); _ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); @@ -134,4 +134,7 @@ _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); _ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); + _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE ,"RESTORE" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); + _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE_RD_PHY_OLD ,"RESTORE_RD_PHY_OLD" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); + _ALLOC2_SIGNAL_OUT(out_RETIRE_RESTORE_RE_PHY_OLD ,"RESTORE_RE_PHY_OLD" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); ALLOC2_INTERFACE_END(_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); @@ -142,9 +145,11 @@ ALLOC2_INTERFACE_BEGIN("retire_event",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_front_end,_param->_nb_context[it1]); - _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end,_param->_nb_context[it1]); - _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end,_param->_nb_context[it1]); - _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state ,_param->_nb_front_end,_param->_nb_context[it1]); -// _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); - _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); + _ALLOC2_VALACK_OUT (out_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end,_param->_nb_context[it1]); + _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end,_param->_nb_context[it1]); + _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state,_param->_nb_front_end,_param->_nb_context[it1]); +// _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); + _ALLOC2_SIGNAL_OUT (out_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); + _ALLOC2_SIGNAL_OUT_COND(out_RETIRE_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type ,_param->_nb_front_end,_param->_nb_context[it1],_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); + _ALLOC2_SIGNAL_OUT_COND(out_RETIRE_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_context[it1],_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]); @@ -306,7 +311,10 @@ ALLOC2(internal_BANK_COMMIT_ENTRY ,entry_t * ,_param->_nb_bank,_param->_nb_bank_access_commit); - ALLOC1(internal_BANK_RETIRE_VAL ,Tcontrol_t,_param->_nb_bank); - ALLOC1(internal_BANK_RETIRE_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank); - ALLOC1(internal_BANK_RETIRE_NUM_INST ,uint32_t ,_param->_nb_bank); + ALLOC1(internal_BANK_RETIRE_VAL ,Tcontrol_t,_param->_nb_bank); + ALLOC1(internal_BANK_RETIRE_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank); + ALLOC1(internal_BANK_RETIRE_NUM_INST ,uint32_t ,_param->_nb_bank); +// ALLOC1(internal_BANK_RETIRE_RESTORE ,Tcontrol_t,_param->_nb_bank); + ALLOC1(internal_BANK_RETIRE_RESTORE_RD_PHY_OLD,Tcontrol_t,_param->_nb_bank); + ALLOC1(internal_BANK_RETIRE_RESTORE_RE_PHY_OLD,Tcontrol_t,_param->_nb_bank); ALLOC1(internal_REEXECUTE_VAL ,Tcontrol_t,_param->_nb_inst_reexecute); @@ -318,4 +326,8 @@ ALLOC2(internal_EVENT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); ALLOC2(internal_RETIRE_EVENT_VAL ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); + + ALLOC3(internal_rat_gpr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + ALLOC3(internal_rat_spr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -329,10 +341,12 @@ ALLOC2(reg_EVENT_STATE ,Tcommit_event_state_t,_param->_nb_front_end,_param->_nb_context [it1]); + ALLOC2(reg_EVENT_TYPE ,Tevent_type_t ,_param->_nb_front_end,_param->_nb_context [it1]); // ALLOC2(reg_EVENT_FLUSH ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); // ALLOC2(reg_EVENT_STOP ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); - ALLOC2(reg_EVENT_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); - ALLOC2(reg_EVENT_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); +// ALLOC2(reg_EVENT_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); +// ALLOC2(reg_EVENT_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); // ALLOC2(reg_EVENT_CAN_RESTART ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); ALLOC2(reg_EVENT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); + ALLOC2(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_front_end,_param->_nb_context [it1]); ALLOC2(reg_EVENT_NB_INST ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); ALLOC2(reg_EVENT_LAST ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); @@ -348,4 +362,7 @@ ALLOC2(reg_PC_CURRENT_IS_DS_TAKE,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); ALLOC2(reg_PC_NEXT ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); + + ALLOC3(rat_gpr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_general_register_logic); + ALLOC3(rat_spr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_special_register_logic); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp (revision 139) @@ -96,10 +96,15 @@ DELETE2_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_OLD ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register ); DELETE2_SIGNAL(out_RETIRE_NUM_REG_RE_PHY_NEW ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],_param->_size_special_register ); - - DELETE2_SIGNAL(out_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_event_state); -// DELETE2_SIGNAL(out_RETIRE_EVENT_FLUSH ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL(out_RETIRE_RESTORE ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1); + DELETE2_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1); + DELETE2_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1],1); + + DELETE2_SIGNAL (out_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_event_state); +// DELETE2_SIGNAL (out_RETIRE_EVENT_FLUSH ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL_COND(out_RETIRE_EVENT_TYPE ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_event_type,_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); + DELETE2_SIGNAL_COND(out_RETIRE_EVENT_DEPTH ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth ,_param->_rat_scheme[it1] == RAT_DEPTH_SAVE); DELETE1_SIGNAL( in_COMMIT_VAL ,_param->_nb_inst_commit,1 ); @@ -187,7 +192,10 @@ DELETE2(internal_BANK_COMMIT_ENTRY ,_param->_nb_bank,_param->_nb_bank_access_commit); - DELETE1(internal_BANK_RETIRE_VAL ,_param->_nb_bank); - DELETE1(internal_BANK_RETIRE_NUM_RENAME_UNIT ,_param->_nb_bank); - DELETE1(internal_BANK_RETIRE_NUM_INST ,_param->_nb_bank); + DELETE1(internal_BANK_RETIRE_VAL ,_param->_nb_bank); + DELETE1(internal_BANK_RETIRE_NUM_RENAME_UNIT ,_param->_nb_bank); + DELETE1(internal_BANK_RETIRE_NUM_INST ,_param->_nb_bank); +// DELETE1(internal_BANK_RETIRE_RESTORE ,_param->_nb_bank); + DELETE1(internal_BANK_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_bank); + DELETE1(internal_BANK_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_bank); DELETE1(internal_REEXECUTE_VAL ,_param->_nb_inst_reexecute); @@ -200,4 +208,7 @@ DELETE2(internal_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1]); + + DELETE3(internal_rat_gpr_update_table ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + DELETE3(internal_rat_spr_update_table ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -217,10 +228,12 @@ DELETE2(reg_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context [it1]); + DELETE2(reg_EVENT_TYPE ,_param->_nb_front_end,_param->_nb_context [it1]); // DELETE2(reg_EVENT_FLUSH ,_param->_nb_front_end,_param->_nb_context [it1]); // DELETE2(reg_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context [it1]); - DELETE2(reg_EVENT_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); - DELETE2(reg_EVENT_NUM_PTR ,_param->_nb_front_end,_param->_nb_context [it1]); +// DELETE2(reg_EVENT_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); +// DELETE2(reg_EVENT_NUM_PTR ,_param->_nb_front_end,_param->_nb_context [it1]); // DELETE2(reg_EVENT_CAN_RESTART ,_param->_nb_front_end,_param->_nb_context [it1]); DELETE2(reg_EVENT_PACKET ,_param->_nb_front_end,_param->_nb_context [it1]); + DELETE2(reg_EVENT_DEPTH ,_param->_nb_front_end,_param->_nb_context [it1]); DELETE2(reg_EVENT_NB_INST ,_param->_nb_front_end,_param->_nb_context [it1]); DELETE2(reg_EVENT_LAST ,_param->_nb_front_end,_param->_nb_context [it1]); @@ -236,4 +249,7 @@ DELETE2(reg_PC_CURRENT_IS_DS_TAKE,_param->_nb_front_end,_param->_nb_context [it1]); DELETE2(reg_PC_NEXT ,_param->_nb_front_end,_param->_nb_context [it1]); + + DELETE3(rat_gpr_update_table ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_general_register_logic); + DELETE3(rat_spr_update_table ,_param->_nb_front_end,_param->_nb_context [it1],_param->_nb_special_register_logic); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp (revision 139) @@ -60,4 +60,21 @@ spr_write_sr_cy [i][j] = 0; // not necessary spr_write_sr_ov [i][j] = 0; // not necessary + + // Init internal update table + + // Test if an event occure + // bool event = (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) != EVENT_STATE_NO_EVENT); + bool reset_update_table = (commit_event_state_to_event_state(reg_EVENT_STATE[i][j]) == EVENT_STATE_EVENT); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * reset_update_table : %d",reset_update_table); + + // not event -> update_table == 1 -> always update + // event -> update_table and not reset + for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k) + internal_rat_gpr_update_table [i][j][k] = // not event or + (not reset_update_table and rat_gpr_update_table [i][j][k]); + for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k) + internal_rat_spr_update_table [i][j][k] = // not event or + (not reset_update_table and rat_spr_update_table [i][j][k]); } @@ -116,5 +133,7 @@ ) { + Tcontrol_t write_rd = entry->write_rd; Tcontrol_t write_re = entry->write_re; + Tgeneral_address_t num_reg_rd_log = entry->num_reg_rd_log; Tspecial_address_t num_reg_re_log = entry->num_reg_re_log; @@ -172,6 +191,32 @@ } - internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x; - internal_BANK_RETIRE_NUM_INST [num_bank] = y; + // Restore Old Register + Tcontrol_t retire_restore = (commit_event_state_to_event_state(reg_EVENT_STATE[front_end_id][context_id]) != EVENT_STATE_NO_EVENT); + + // Test if event -> need restore ? + if (retire_restore) + { + log_printf(TRACE,Commit_unit,FUNCTION," * Restore"); + + // Test and update update table + if (write_rd) + { + internal_BANK_RETIRE_RESTORE_RD_PHY_OLD [num_bank] = (internal_rat_gpr_update_table[front_end_id][context_id][num_reg_rd_log] == 0); + + internal_rat_gpr_update_table[front_end_id][context_id][num_reg_rd_log] = 1; + } + if (write_re) + { + internal_BANK_RETIRE_RESTORE_RE_PHY_OLD [num_bank] = (internal_rat_spr_update_table[front_end_id][context_id][num_reg_re_log] == 0); + + internal_rat_spr_update_table[front_end_id][context_id][num_reg_re_log] = 1; + } + + log_printf(TRACE,Commit_unit,FUNCTION," * restore_rd_phy_old : %d",internal_BANK_RETIRE_RESTORE_RD_PHY_OLD [num_bank]); + log_printf(TRACE,Commit_unit,FUNCTION," * restore_re_phy_old : %d",internal_BANK_RETIRE_RESTORE_RE_PHY_OLD [num_bank]); + } + + internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x; + internal_BANK_RETIRE_NUM_INST [num_bank] = y; if (_param->_have_port_front_end_id) @@ -199,4 +244,7 @@ PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD [x][y], entry->num_reg_re_phy_old ); PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW [x][y], entry->num_reg_re_phy_new ); + PORT_WRITE(out_RETIRE_RESTORE [x][y],retire_restore); + PORT_WRITE(out_RETIRE_RESTORE_RD_PHY_OLD [x][y],internal_BANK_RETIRE_RESTORE_RD_PHY_OLD [num_bank]); + PORT_WRITE(out_RETIRE_RESTORE_RE_PHY_OLD [x][y],internal_BANK_RETIRE_RESTORE_RE_PHY_OLD [num_bank]); // Event -> rob must be manage this event Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp (revision 139) @@ -331,4 +331,10 @@ PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], ((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_NOT_YET_EVENT) or reg_EVENT_NEXT_STOP [i][j])); + if (_param->_rat_scheme[i] == RAT_DEPTH_SAVE) + { + PORT_WRITE(out_RETIRE_EVENT_TYPE [i][j], reg_EVENT_TYPE [i][j]); + if (_param->_have_port_depth) + PORT_WRITE(out_RETIRE_EVENT_DEPTH [i][j], reg_EVENT_DEPTH [i][j]); + } } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp (revision 139) @@ -54,8 +54,9 @@ // reg_EVENT_FLUSH [i][j] = false; // reg_EVENT_STOP [i][j] = false; - reg_EVENT_NUM_BANK [i][j] = 0; // not necessary - reg_EVENT_NUM_PTR [i][j] = 0; // not necessary - //reg_EVENT_CAN_RESTART [i][j] = 0; // not necessary +// reg_EVENT_NUM_BANK [i][j] = 0; // not necessary +// reg_EVENT_NUM_PTR [i][j] = 0; // not necessary +// reg_EVENT_CAN_RESTART [i][j] = 0; // not necessary reg_EVENT_PACKET [i][j] = 0; // not necessary + reg_EVENT_DEPTH [i][j] = 0; // not necessary reg_EVENT_NB_INST [i][j] = 0; reg_EVENT_LAST [i][j] = false; @@ -72,4 +73,14 @@ reg_PC_NEXT [i][j] = (0x100+4)>>2; } + + // Resert RAT_UPDATE_TABLE + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) + rat_gpr_update_table [i][j][k] = false; // not necessary + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr_update_table [i][j][k] = false; // not necessary + } // Reset priority algorithm @@ -114,4 +125,10 @@ // else reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END; + + // Reset update_table + for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) + rat_gpr_update_table [i][j][k] = false; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr_update_table [i][j][k] = false; } @@ -180,8 +197,11 @@ else { + uint32_t next_packet = reg_EVENT_NEXT_PACKET [i][j]; + reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT; reg_EVENT_NEXT_STOP [i][j] = false; - reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j]; + reg_EVENT_PACKET [i][j] = next_packet; +// reg_EVENT_DEPTH [i][j] = _rob[next_packet].depth; reg_EVENT_NB_INST [i][j] = reg_NB_INST_COMMIT_ALL [i][j]; //reg_EVENT_STOP [i][j] = true; @@ -596,4 +616,5 @@ reg_EVENT_STATE [front_end_id][context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; +// reg_EVENT_DEPTH [front_end_id][context_id] = _rob[packet].depth; reg_EVENT_NB_INST [front_end_id][context_id] = reg_NB_INST_COMMIT_ALL [front_end_id][context_id]; @@ -697,9 +718,7 @@ #endif - #ifdef STATISTICS - if (usage_is_set(_usage,USE_STATISTICS)) - (*_stat_nb_inst_retire [x]) ++; - + if (usage_is_set(_usage,USE_STATISTICS)) + (*_stat_nb_inst_retire [x]) ++; #endif @@ -709,4 +728,14 @@ entry->state_old = entry->state; entry->state = ROB_END; + + + // Update RAT_UPDATE_TABLE + Tcontext_t front_end_id = entry->front_end_id; + Tcontext_t context_id = entry->context_id ; + + if (entry->write_rd and internal_BANK_RETIRE_RESTORE_RD_PHY_OLD [num_bank]) + rat_gpr_update_table [front_end_id][context_id][entry->num_reg_rd_log] = true; + if (entry->write_re and internal_BANK_RETIRE_RESTORE_RE_PHY_OLD [num_bank]) + rat_spr_update_table [front_end_id][context_id][entry->num_reg_re_log] = true; } } @@ -771,9 +800,11 @@ { reg_EVENT_STATE [front_end_id][context_id] = COMMIT_EVENT_STATE_EVENT; + reg_EVENT_TYPE [front_end_id][context_id] = rob_state_to_event_type(state); // reg_EVENT_STOP [front_end_id][context_id] = false; // instruction flow can continue reg_EVENT_LAST [front_end_id][context_id] = false; // it the head ! reg_EVENT_PACKET [front_end_id][context_id] = packet_id; - + reg_EVENT_DEPTH [front_end_id][context_id] = entry->depth; + // // If event is an load_miss, many instruction can be inserted. // // -> new last instruction @@ -947,6 +978,6 @@ // In all case, stop instruction flow reg_EVENT_STATE [entry->front_end_id][entry->context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; +// reg_EVENT_DEPTH [entry->front_end_id][entry->context_id] = _rob[packet]._depth; reg_EVENT_NB_INST [entry->front_end_id][entry->context_id] = reg_NB_INST_COMMIT_ALL [entry->front_end_id][entry->context_id]; - // reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true; @@ -1283,4 +1314,5 @@ // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT : %d (bank %d, ptr %d)",((reg_EVENT_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_NUM_BANK [i][j]), reg_EVENT_NUM_BANK [i][j],reg_EVENT_NUM_PTR [i][j]); // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_CAN_RESTART : %d",reg_EVENT_CAN_RESTART [i][j]); + log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_DEPTH : %d - type %s",reg_EVENT_DEPTH [i][j],toString(reg_EVENT_TYPE [i][j]).c_str()); log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d - packet %d - ptr %d (bank %d, ptr %d)",reg_EVENT_LAST [i][j],reg_EVENT_PACKET[i][j],((reg_EVENT_LAST_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [i][j]), reg_EVENT_LAST_NUM_BANK [i][j],reg_EVENT_LAST_NUM_PTR [i][j]); log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT : stop : %d - packet : %d",reg_EVENT_NEXT_STOP [i][j],reg_EVENT_NEXT_PACKET[i][j]); @@ -1370,4 +1402,25 @@ } + log_printf(TRACE,Commit_unit,FUNCTION," * Dump RAT Update Table"); + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + { + std::string str = ""; + for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) + str+=toString("%.1d ",rat_gpr_update_table[i][j][k]); + + log_printf(TRACE,Commit_unit,FUNCTION," * GPR [%d][%d] %s",i,j,str.c_str()); + } + + { + std::string str = ""; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + str+=toString("%.1d ",rat_spr_update_table[i][j][k]); + + log_printf(TRACE,Commit_unit,FUNCTION," * GPR [%d][%d] %s",i,j,str.c_str()); + } + } + log_printf(TRACE,Commit_unit,FUNCTION," * nb_write_rd : %d",nb_write_rd); log_printf(TRACE,Commit_unit,FUNCTION," * nb_write_re : %d",nb_write_re); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp (revision 139) @@ -22,15 +22,15 @@ #define FUNCTION "Commit_unit::Parameters" Parameters::Parameters (uint32_t nb_front_end , - uint32_t * nb_context , - uint32_t nb_rename_unit , - uint32_t size_queue , - uint32_t nb_bank , - Tretire_ooo_scheme_t retire_ooo_scheme , - uint32_t * nb_inst_insert , - uint32_t * nb_inst_retire , - uint32_t nb_inst_commit , - uint32_t nb_inst_reexecute , - uint32_t nb_inst_branch_complete , - uint32_t ** nb_branch_speculated , + uint32_t * nb_context ,//[nb_front_end] + uint32_t nb_rename_unit , + uint32_t size_queue , + uint32_t nb_bank , + Tretire_ooo_scheme_t retire_ooo_scheme , + uint32_t * nb_inst_insert ,//[nb_rename_unit] + uint32_t * nb_inst_retire ,//[nb_rename_unit] + uint32_t nb_inst_commit , + uint32_t nb_inst_reexecute , + uint32_t nb_inst_branch_complete , + uint32_t ** nb_branch_speculated ,//[nb_front_end][nb_context] uint32_t size_nb_inst_decod , uint32_t size_general_data , @@ -39,9 +39,10 @@ uint32_t size_general_register , uint32_t size_special_register , + Trat_scheme_t * rat_scheme ,//[nb_front_end] Tpriority_t priority , Tload_balancing_t load_balancing , uint32_t nb_rename_unit_select , uint32_t nb_thread , - uint32_t ** translate_num_context_to_num_thread, + uint32_t ** translate_num_context_to_num_thread,//[nb_front_end][nb_context] bool is_toplevel): _nb_bank_access_commit (1 ) @@ -61,4 +62,5 @@ _nb_inst_branch_complete = nb_inst_branch_complete ; _nb_branch_speculated = nb_branch_speculated ; + _rat_scheme = rat_scheme ; _priority = priority ; _load_balancing = load_balancing ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h (revision 139) @@ -11,4 +11,5 @@ #include "Common/include/Debug.h" #include "Behavioural/include/Parameters.h" +#include "Behavioural/include/Types.h" namespace morpheo { @@ -25,27 +26,32 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_front_end ; - public : uint32_t * _nb_context ;//[nb_front_end] - public : uint32_t _nb_general_register ; - public : uint32_t _nb_special_register ; - public : uint32_t _nb_inst_insert ; - public : uint32_t _nb_inst_retire ; - -//public : uint32_t _size_front_end_id ; -//public : uint32_t _size_context_id ; -//public : uint32_t _size_general_register ; -//public : uint32_t _size_special_register ; -// -//public : uint32_t _have_port_context_id ; -//public : uint32_t _have_port_front_end_id; + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : Trat_scheme_t _rat_scheme ; + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + public : uint32_t ** _nb_branch_speculated ;//[nb_front_end][nb_context] + + public : uint32_t _max_nb_context ; +//public : uint32_t _size_front_end_id ; +//public : uint32_t _size_context_id ; +//public : uint32_t _size_general_register ; +//public : uint32_t _size_special_register ; +// +//public : uint32_t _have_port_context_id ; +//public : uint32_t _have_port_front_end_id; //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t nb_front_end , - uint32_t * nb_context , - uint32_t nb_general_register, - uint32_t nb_special_register, - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - bool is_toplevel=false + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context ,//[nb_front_end] + uint32_t nb_general_register , + uint32_t nb_special_register , + Trat_scheme_t rat_scheme , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t ** nb_branch_speculated,//[nb_front_end][nb_context] + bool is_toplevel=false ); // public : Parameters (Parameters & param) ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h (revision 139) @@ -68,4 +68,6 @@ public : SC_IN (Tcontext_t ) ** in_RENAME_FRONT_END_ID ;//[nb_inst_insert] public : SC_IN (Tcontext_t ) ** in_RENAME_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tdepth_t ) ** in_RENAME_DEPTH ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_SAVE_RAT ;//[nb_inst_insert] public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RA_LOG ;//[nb_inst_insert] public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RB_LOG ;//[nb_inst_insert] @@ -102,7 +104,5 @@ public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_PHY_NEW;//[nb_inst_retire] public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire] - public : SC_OUT(Tcontrol_t ) ** out_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] - public : SC_OUT(Tcontrol_t ) ** out_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire] - public : SC_OUT(Tcontrol_t ) ** out_RETIRE_RESTORE ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE ;//[nb_inst_retire] // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -110,31 +110,33 @@ public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_ACK ;//[nb_front_end][nb_context] public : SC_IN (Tevent_state_t ) *** in_RETIRE_EVENT_STATE ;//[nb_front_end][nb_context] + public : SC_IN (Tevent_type_t ) *** in_RETIRE_EVENT_TYPE ;//[nb_front_end][nb_context] + public : SC_IN (Tdepth_t ) *** in_RETIRE_EVENT_DEPTH ;//[nb_front_end][nb_context] // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - private : Tgeneral_address_t *** rat_gpr_not_speculative; //[nb_front_end][nb_context][nb_general_register_logic] - private : Tgeneral_address_t *** rat_gpr_speculative; //[nb_front_end][nb_context][nb_general_register_logic] - private : bool *** rat_gpr_speculative_valid; //[nb_front_end][nb_context][nb_general_register_logic] - private : bool *** rat_gpr_update_table; //[nb_front_end][nb_context][nb_general_register_logic] - - private : Tspecial_address_t *** rat_spr_not_speculative; //[nb_front_end][nb_context][nb_special_register_logic] - private : Tspecial_address_t *** rat_spr_speculative; //[nb_front_end][nb_context][nb_special_register_logic] - private : bool *** rat_spr_speculative_valid; //[nb_front_end][nb_context][nb_special_register_logic] - private : bool *** rat_spr_update_table; //[nb_front_end][nb_context][nb_special_register_logic] + private : Tgeneral_address_t *** rat_gpr_not_speculative; //[nb_front_end][nb_context] [nb_general_register_logic] + private : Tgeneral_address_t *** rat_gpr_speculative; //[nb_front_end][nb_context] [nb_general_register_logic] + private : bool *** rat_gpr_speculative_valid; //[nb_front_end][nb_context] [nb_general_register_logic] + private : Tgeneral_address_t **** rat_gpr_save; //[nb_front_end][nb_context][nb_branch_speculated][nb_general_register_logic] + + private : Tspecial_address_t *** rat_spr_not_speculative; //[nb_front_end][nb_context] [nb_special_register_logic] + private : Tspecial_address_t *** rat_spr_speculative; //[nb_front_end][nb_context] [nb_special_register_logic] + private : bool *** rat_spr_speculative_valid; //[nb_front_end][nb_context] [nb_special_register_logic] + private : Tspecial_address_t **** rat_spr_save; //[nb_front_end][nb_context][nb_branch_speculated][nb_special_register_logic] + + private : Tdepth_t ** rat_depth; //[nb_front_end][nb_context] // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ private : Tcontrol_t * internal_RENAME_ACK; //[nb_inst_insert] + private : Tcontrol_t * internal_RENAME_SAVE; //[nb_inst_insert] private : Tcontrol_t * internal_INSERT_ACK; //[nb_inst_insert] private : Tcontrol_t * internal_RETIRE_ACK; //[nb_inst_retire] private : Tcontrol_t ** internal_RETIRE_EVENT_ACK ;//[nb_front_end][nb_context] - private : bool *** internal_rat_gpr_update_table;//[nb_front_end][nb_context][nb_general_register_logic] - private : bool *** internal_rat_spr_update_table;//[nb_front_end][nb_context][nb_special_register_logic] - - private : Tcontrol_t * internal_RETIRE_RESTORE ;//[nb_inst_retire] - private : Tcontrol_t * internal_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] - private : Tcontrol_t * internal_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire] - + // function pointer + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::*function_constant ) (void); + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::*function_transition ) (void); + public : void (morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::*function_genMealy_rename) (void); #endif @@ -169,8 +171,19 @@ #ifdef SYSTEMC - public : void constant (void); - public : void transition (void); - public : void genMealy_rename (void); - public : void genMealy_retire (void); + public : void constant (void); + public : void transition (void); + public : void genMealy_rename (void); + + // public : void function_no_save_constant (void); + // public : void function_no_save_transition (void); + // public : void function_no_save_genMealy_rename (void); + + public : void function_one_save_constant (void); + public : void function_one_save_transition (void); + public : void function_one_save_genMealy_rename (void); + + public : void function_depth_save_constant (void); + public : void function_depth_save_transition (void); + public : void function_depth_save_genMealy_rename (void); #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp (revision 139) @@ -20,20 +20,26 @@ #undef FUNCTION #define FUNCTION "Register_Address_Translation_unit::Parameters" - Parameters::Parameters (uint32_t nb_front_end , - uint32_t * nb_context , - uint32_t nb_general_register, - uint32_t nb_special_register, - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - bool is_toplevel) + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context ,//[nb_front_end] + uint32_t nb_general_register , + uint32_t nb_special_register , + Trat_scheme_t rat_scheme , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t ** nb_branch_speculated,//[nb_front_end][nb_context] + bool is_toplevel) { log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); - _nb_front_end = nb_front_end ; - _nb_context = nb_context ; - _nb_general_register = nb_general_register; - _nb_special_register = nb_special_register; - _nb_inst_insert = nb_inst_insert ; - _nb_inst_retire = nb_inst_retire ; + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_general_register = nb_general_register ; + _nb_special_register = nb_special_register ; + _rat_scheme = rat_scheme ; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + _nb_branch_speculated = nb_branch_speculated; + + _max_nb_context = max(_nb_context, _nb_front_end); test(); @@ -41,12 +47,14 @@ if (is_toplevel) { - _size_front_end_id = log2(nb_front_end ); - _size_context_id = log2(max(nb_context, nb_front_end)); - _size_general_register = log2(nb_general_register); - _size_special_register = log2(nb_special_register); + _size_front_end_id = log2(_nb_front_end ); + _size_context_id = log2(_max_nb_context ); + _size_general_register = log2(_nb_general_register); + _size_special_register = log2(_nb_special_register); + _size_depth = log2(max(_nb_branch_speculated,_nb_front_end,_nb_context)); _have_port_front_end_id = _size_front_end_id>0; _have_port_context_id = _size_context_id >0; - + _have_port_depth = _size_depth >0; + copy(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_msg_error.cpp (revision 139) @@ -10,5 +10,5 @@ #include -namespace morpheo { +namespace morpheo { namespace behavioural { namespace core { @@ -27,4 +27,18 @@ Parameters_test test ("Register_Address_Translation_unit"); + switch(_rat_scheme) + { + case RAT_NO_SAVE : + { + test.error(toString(_("The Register Address Translation scheme \"%s\" is not yet implemented.\n"),toString(_rat_scheme).c_str())); + } + default : + // case RAT_ONE_SAVE : + // case RAT_DEPTH_SAVE : + { + break; + } + } + return test; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters_print.cpp (revision 139) @@ -28,9 +28,10 @@ xml.balise_open("register_address_translation_unit"); - xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); - xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); - xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); - xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); - xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("rat_scheme "); xml.attribut("value",toString(_rat_scheme )); xml.singleton_end(); + xml.singleton_begin("nb_general_register "); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register "); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); for (uint32_t i=0;i<_nb_front_end; i++) @@ -40,5 +41,16 @@ xml. attribut("id" ,toString(i)); xml. balise_open_end(); - xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + + for (uint32_t j=0;j<_nb_context[i]; j++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(j)); + xml. balise_open_end(); + xml. singleton_begin("nb_branch_speculated"); xml.attribut("value",toString(_nb_branch_speculated[i][j])); xml.singleton_end(); + xml. balise_close(); + } + xml. balise_close(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp (revision 139) @@ -75,4 +75,40 @@ if (usage_is_set(_usage,USE_SYSTEMC)) { + // Function pointer + switch (_param->_rat_scheme) + { + case RAT_NO_SAVE : + { + // function_constant = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_no_save_constant ; + // function_transition = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_no_save_transition ; + // function_genMealy_rename = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_no_save_genMealy_rename; + + break; + } + + case RAT_ONE_SAVE : + { + function_constant = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_one_save_constant ; + function_transition = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_one_save_transition ; + function_genMealy_rename = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_one_save_genMealy_rename; + + break; + } + + case RAT_DEPTH_SAVE : + { + function_constant = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_depth_save_constant ; + function_transition = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_depth_save_transition ; + function_genMealy_rename = &morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Register_Address_Translation_unit::function_depth_save_genMealy_rename; + + break; + } + + default : + { + break; + } + } + #ifdef SYSTEMCASS_SPECIFIC constant(); @@ -118,4 +154,7 @@ << (*(in_RENAME_NUM_REG_RD_LOG [i])) << (*(in_RENAME_NUM_REG_RE_LOG [i])); + + if (_param->_rat_scheme == RAT_DEPTH_SAVE) + sensitive << (*(in_RENAME_SAVE_RAT [i])); } for (uint32_t i=0; i<_param->_nb_front_end; ++i) @@ -124,33 +163,4 @@ << (*(in_RETIRE_EVENT_STATE [i][j])); -# ifdef SYSTEMCASS_SPECIFIC - // List dependency information -# endif - - log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Method - genMealy_retire"); - - SC_METHOD (genMealy_retire); - dont_initialize (); - sensitive << (*(in_CLOCK)).neg() // need internal register - << (*(in_NRESET)); - - for (uint32_t i=0; i<_param->_nb_inst_retire; ++i) - { - if (param->_have_port_front_end_id) - sensitive << (*(in_RETIRE_FRONT_END_ID [i])); - if (param->_have_port_context_id) - sensitive << (*(in_RETIRE_CONTEXT_ID [i])); - - sensitive << (*(in_RETIRE_WRITE_RD [i])) - << (*(in_RETIRE_WRITE_RE [i])) - << (*(in_RETIRE_NUM_REG_RD_LOG [i])) - << (*(in_RETIRE_NUM_REG_RE_LOG [i])); - } - - for (uint32_t i=0; i<_param->_nb_front_end; ++i) - for (uint32_t j=0; j<_param->_nb_context[i]; ++j) - sensitive << (*(in_RETIRE_EVENT_VAL [i][j])) - << (*(in_RETIRE_EVENT_STATE [i][j])); - # ifdef SYSTEMCASS_SPECIFIC // List dependency information Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp (revision 139) @@ -61,18 +61,20 @@ ALLOC1_INTERFACE_BEGIN("rename",IN,EAST,_("Input to rename source logical register"), _param->_nb_inst_insert); - ALLOC1_VALACK_IN ( in_RENAME_VAL , VAL); - ALLOC1_VALACK_OUT(out_RENAME_ACK , ACK); - ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); - ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); - ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); - ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); - ALLOC1_SIGNAL_OUT(out_RENAME_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); + ALLOC1_VALACK_IN ( in_RENAME_VAL , VAL); + ALLOC1_VALACK_OUT (out_RENAME_ACK , ACK); + ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN_COND ( in_RENAME_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + ALLOC1_SIGNAL_IN ( in_RENAME_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_OUT (out_RENAME_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT (out_RENAME_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT (out_RENAME_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_OUT (out_RENAME_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); + ALLOC1_SIGNAL_OUT (out_RENAME_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); ALLOC1_INTERFACE_END(_param->_nb_inst_insert); @@ -111,7 +113,5 @@ ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register); ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register); - ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RD_PHY_OLD,"restore_rd_phy_old",Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE_RE_PHY_OLD,"restore_re_phy_old",Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_RETIRE_RESTORE ,"restore" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE ,"restore" ,Tcontrol_t ,1); ALLOC1_INTERFACE_END(_param->_nb_inst_retire); @@ -122,7 +122,9 @@ ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_OUT (out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); @@ -132,24 +134,37 @@ { ALLOC1(internal_RENAME_ACK ,Tcontrol_t,_param->_nb_inst_insert); + ALLOC1(internal_RENAME_SAVE ,Tcontrol_t,_param->_nb_inst_insert); ALLOC1(internal_INSERT_ACK ,Tcontrol_t,_param->_nb_inst_insert); ALLOC1(internal_RETIRE_ACK ,Tcontrol_t,_param->_nb_inst_retire); ALLOC2(internal_RETIRE_EVENT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]); - ALLOC3(rat_gpr_not_speculative ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); ALLOC3(rat_gpr_speculative ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - ALLOC3(rat_gpr_speculative_valid,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - ALLOC3(rat_gpr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + ALLOC3(rat_spr_speculative ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + + switch(_param->_rat_scheme) + { + case RAT_NO_SAVE : + { + break; + } + case RAT_ONE_SAVE : + { + ALLOC3(rat_gpr_not_speculative ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + ALLOC3(rat_gpr_speculative_valid,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + + ALLOC3(rat_spr_not_speculative ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + ALLOC3(rat_spr_speculative_valid,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + + break; + } + case RAT_DEPTH_SAVE : + { + ALLOC4(rat_gpr_save ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic); + ALLOC4(rat_spr_save ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic); + ALLOC2(rat_depth ,Tdepth_t ,_param->_nb_front_end,_param->_nb_context[it1]); - ALLOC3(rat_spr_not_speculative ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - ALLOC3(rat_spr_speculative ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - ALLOC3(rat_spr_speculative_valid,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - ALLOC3(rat_spr_update_table ,bool ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - - ALLOC3(internal_rat_gpr_update_table,bool, _param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - ALLOC3(internal_rat_spr_update_table,bool, _param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - - ALLOC1(internal_RETIRE_RESTORE ,Tcontrol_t,_param->_nb_inst_retire); - ALLOC1(internal_RETIRE_RESTORE_RD_PHY_OLD,Tcontrol_t,_param->_nb_inst_retire); - ALLOC1(internal_RETIRE_RESTORE_RE_PHY_OLD,Tcontrol_t,_param->_nb_inst_retire); + break; + } + } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_constant.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_constant.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_constant.cpp (revision 139) @@ -26,28 +26,5 @@ log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); - // Constant : accepted already transaction - for (uint32_t i=0; i<_param->_nb_inst_insert; i++) - { - internal_RENAME_ACK [i] = 1; - internal_INSERT_ACK [i] = 1; - - PORT_WRITE(out_RENAME_ACK[i],internal_RENAME_ACK [i]); - PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]); - } - - for (uint32_t i=0; i<_param->_nb_inst_retire; i++) - { - internal_RETIRE_ACK [i] = 1; - - PORT_WRITE(out_RETIRE_ACK[i],internal_RETIRE_ACK [i]); - } - - for (uint32_t i=0; i<_param->_nb_front_end; ++i) - for (uint32_t j=0; j<_param->_nb_context[i]; ++j) - { - internal_RETIRE_EVENT_ACK [i][j] = 1; - - PORT_WRITE(out_RETIRE_EVENT_ACK[i][j],internal_RETIRE_EVENT_ACK [i][j]); - } + (this->*function_constant) (); log_end(Register_Address_Translation_unit,FUNCTION); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp (revision 139) @@ -30,69 +30,84 @@ delete in_NRESET; - DELETE1_SIGNAL( in_RENAME_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_RENAME_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); - DELETE1_SIGNAL( in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL(out_RENAME_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register); - DELETE1_SIGNAL(out_RENAME_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register); - DELETE1_SIGNAL(out_RENAME_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register); - DELETE1_SIGNAL(out_RENAME_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register); - DELETE1_SIGNAL(out_RENAME_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register); - - DELETE1_SIGNAL( in_INSERT_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_ACK ,_param->_nb_inst_insert,1); -// DELETE1_SIGNAL( in_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); -// DELETE1_SIGNAL( in_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); - DELETE1_SIGNAL( in_INSERT_WRITE_RD ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_WRITE_RE ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY,_param->_nb_inst_insert,_param->_size_general_register); - DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY,_param->_nb_inst_insert,_param->_size_special_register); - - DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id); - DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); - DELETE1_SIGNAL( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register); - DELETE1_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_RESTORE ,_param->_nb_inst_retire,1); - - DELETE2_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); + DELETE1_SIGNAL ( in_RENAME_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_RENAME_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); + DELETE1_SIGNAL ( in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); + DELETE1_SIGNAL_COND( in_RENAME_DEPTH ,_param->_nb_inst_insert,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE1_SIGNAL ( in_RENAME_SAVE_RAT ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL (out_RENAME_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register); + DELETE1_SIGNAL (out_RENAME_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register); + DELETE1_SIGNAL (out_RENAME_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register); + DELETE1_SIGNAL (out_RENAME_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register); + DELETE1_SIGNAL (out_RENAME_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register); + + DELETE1_SIGNAL ( in_INSERT_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_INSERT_ACK ,_param->_nb_inst_insert,1); +// DELETE1_SIGNAL ( in_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); +// DELETE1_SIGNAL ( in_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); + DELETE1_SIGNAL ( in_INSERT_WRITE_RD ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_WRITE_RE ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_INSERT_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_INSERT_NUM_REG_RD_PHY,_param->_nb_inst_insert,_param->_size_general_register); + DELETE1_SIGNAL ( in_INSERT_NUM_REG_RE_PHY,_param->_nb_inst_insert,_param->_size_special_register); + + DELETE1_SIGNAL ( in_RETIRE_VAL ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL (out_RETIRE_ACK ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id); + DELETE1_SIGNAL ( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register); + DELETE1_SIGNAL ( in_RETIRE_RESTORE ,_param->_nb_inst_retire,1); + + DELETE2_SIGNAL ( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_TYPE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_type,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_DEPTH ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth ,_param->_rat_scheme == RAT_DEPTH_SAVE); DELETE1(internal_RENAME_ACK ,_param->_nb_inst_insert); + DELETE1(internal_RENAME_SAVE ,_param->_nb_inst_insert); DELETE1(internal_INSERT_ACK ,_param->_nb_inst_insert); DELETE1(internal_RETIRE_ACK ,_param->_nb_inst_retire); DELETE2(internal_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1]); - DELETE3(rat_gpr_not_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); DELETE3(rat_gpr_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - DELETE3(rat_gpr_speculative_valid ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - DELETE3(rat_gpr_update_table ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + DELETE3(rat_spr_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - DELETE3(rat_spr_not_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - DELETE3(rat_spr_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - DELETE3(rat_spr_speculative_valid ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - DELETE3(rat_spr_update_table ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + switch(_param->_rat_scheme) + { + case RAT_NO_SAVE : + { + break; + } + case RAT_ONE_SAVE : + { + DELETE3(rat_gpr_not_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + DELETE3(rat_gpr_speculative_valid ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); + + DELETE3(rat_spr_not_speculative ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + DELETE3(rat_spr_speculative_valid ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); + + break; + } + case RAT_DEPTH_SAVE : + { + DELETE4(rat_gpr_save ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic); + DELETE4(rat_spr_save ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic); + DELETE2(rat_depth ,_param->_nb_front_end,_param->_nb_context[it1]); - DELETE3(internal_rat_gpr_update_table,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic); - DELETE3(internal_rat_spr_update_table,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic); - - DELETE1(internal_RETIRE_RESTORE ,_param->_nb_inst_retire); - DELETE1(internal_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire); - DELETE1(internal_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire); + break; + } + } } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp (revision 139) @@ -0,0 +1,63 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_depth_save_constant" + void Register_Address_Translation_unit::function_depth_save_constant (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + // Constant : accepted already transaction + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + internal_INSERT_ACK [i] = 1; + + PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + internal_RETIRE_ACK [i] = 1; + + PORT_WRITE(out_RETIRE_ACK[i],internal_RETIRE_ACK [i]); + } + + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + internal_RETIRE_EVENT_ACK [i][j] = 1; + + PORT_WRITE(out_RETIRE_EVENT_ACK[i][j],internal_RETIRE_EVENT_ACK [i][j]); + } + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp (revision 139) @@ -0,0 +1,104 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_depth_save_genMealy_rename" + void Register_Address_Translation_unit::function_depth_save_genMealy_rename (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) != 0) + { + bool have_branch_previous = false; + bool can_continue [_param->_nb_front_end][_param->_max_nb_context]; + + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + can_continue [i][j] = true; + + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RENAME [%d]",i); + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + // bool have_event = (PORT_READ(in_RETIRE_EVENT_VAL [front_end_id][context_id]) and // always ack + // (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) == EVENT_STATE_EVENT)); + + bool have_branch_current = PORT_READ(in_RENAME_SAVE_RAT [i]); + + // one branch per cycle + can_continue[front_end_id][context_id] &= not (have_branch_current and have_branch_previous); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id); + // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * have_event : %d",have_event); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * have_branch_previous : %d",have_branch_previous); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * have_branch_current : %d",have_branch_current ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * can_continue : %d",can_continue[front_end_id][context_id]); + + Tgeneral_address_t num_reg_ra_log = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register; + Tgeneral_address_t num_reg_rb_log = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register; + Tspecial_address_t num_reg_rc_log = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register; + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register; + Tspecial_address_t num_reg_re_log = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register; + + Tgeneral_address_t num_reg_ra_phy = rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log]; + Tgeneral_address_t num_reg_rb_phy = rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log]; + Tspecial_address_t num_reg_rc_phy = rat_spr_speculative[front_end_id][context_id][num_reg_rc_log]; + Tgeneral_address_t num_reg_rd_phy_old= rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log]; + Tspecial_address_t num_reg_re_phy_old= rat_spr_speculative[front_end_id][context_id][num_reg_re_log]; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_ra : %d -> %d",num_reg_ra_log,num_reg_ra_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rb : %d -> %d",num_reg_rb_log,num_reg_rb_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rc : %d -> %d",num_reg_rc_log,num_reg_rc_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re : %d -> %d",num_reg_re_log,num_reg_re_phy_old); + + internal_RENAME_ACK [i] = can_continue[front_end_id][context_id]; + PORT_WRITE(out_RENAME_ACK [i],internal_RENAME_ACK [i]); + PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], num_reg_ra_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], num_reg_rb_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], num_reg_rc_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old); + PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old); + + internal_RENAME_SAVE [i] = have_branch_current; + + // save info to the next instruction + have_branch_previous |= have_branch_current; + } + } + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp (revision 139) @@ -0,0 +1,325 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_depth_save_transition" + void Register_Address_Translation_unit::function_depth_save_transition (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + uint32_t gpr = 1; + uint32_t spr = 0; + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + rat_depth [i][j] = 0; + rat_gpr_speculative [i][j][0] = 0; + + for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) + rat_gpr_speculative [i][j][k] = gpr++; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr_speculative [i][j][k] = spr++; // not necessary + } + } + else + { + // Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0) + + // ===================================================== + // ====[ RETIRE_EVENT ]================================= + // ===================================================== + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + if (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and internal_RETIRE_EVENT_ACK [i][j]) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RETIRE_EVENT [%d][%d]",i,j); + + // Test if event have just occure + if (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT) + { + switch (PORT_READ(in_RETIRE_EVENT_TYPE [i][j])) + { + case EVENT_TYPE_BRANCH_MISS_SPECULATION : + case EVENT_TYPE_LOAD_MISS_SPECULATION : + { + // Miss speculation (branch or load) + // Restore contexte and update depth + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * MISS_SPECULATION : Restore RAT"); + + Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_RETIRE_EVENT_DEPTH [i][j]):0; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * depth : %d",depth); + + // restore GPR + for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++) + rat_gpr_speculative [i][j][num_gpr] = rat_gpr_save [i][j][depth][num_gpr]; + + // restore SPR + for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++) + rat_spr_speculative [i][j][num_spr] = rat_spr_save [i][j][depth][num_spr]; + + // update rat_depth + rat_depth[i][j] = depth; + + break; + } + // case EVENT_TYPE_EXCEPTION : + // case EVENT_TYPE_SPR_ACCESS : + // case EVENT_TYPE_MSYNC : + // case EVENT_TYPE_PSYNC : + // case EVENT_TYPE_CSYNC : + default : + { + // nothing + break; + } + } + + } + } + + // ===================================================== + // ====[ INSERT ]======================================= + // ===================================================== + // First : interface insert + // this instruction is speculative !!! + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + // Test transaction + if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * INSERT [%d]",i); + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + Tcontrol_t save = internal_RENAME_SAVE [i]; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context : %d",context_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * save : %d",save); + + // Test if write and modifie RAT (RD and RE) + + Tcontrol_t write_rd = PORT_READ(in_INSERT_WRITE_RD [i]); + Tcontrol_t write_re = PORT_READ(in_INSERT_WRITE_RE [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); + if (write_rd == 1) + { + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_INSERT_NUM_REG_RD_LOG [i]); + Tgeneral_address_t num_reg_rd_phy = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy : %d",num_reg_rd_phy); + + rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy; + } + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); + if (write_re == 1) + { + Tspecial_address_t num_reg_re_log = PORT_READ(in_INSERT_NUM_REG_RE_LOG [i]); + Tspecial_address_t num_reg_re_phy = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy : %d",num_reg_re_phy); + + rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy; + } + + if (save) + { + // Need save RAT + + Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_RENAME_DEPTH [i]):0; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * depth old - new : %d",depth); + +// #ifdef DEBUG_TEST +// if (depth != ((depth_old+1)%_param->_nb_branch_speculated[front_end_id][context_id])) +// throw ERRORMORPHEO(FUNCTION,toString(_("Rename : Invalid depth (old : %d, new : %d).\n"),depth_old,depth)); +// #endif + + // save GPR + for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++) + rat_gpr_save [front_end_id][context_id][depth][num_gpr] = rat_gpr_speculative [front_end_id][context_id][num_gpr]; + + // save SPR + for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++) + rat_spr_save [front_end_id][context_id][depth][num_spr] = rat_spr_speculative [front_end_id][context_id][num_spr]; + + // update rat_depth with new depth + rat_depth[front_end_id][context_id] = depth; + } + } + + // ===================================================== + // ====[ RETIRE ]======================================= + // ===================================================== + // Second : interface retire + // (because if an event on the same thread : the instruction is already renamed) + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RETIRE [%d]",i); + + // if no event : no effect, because the RAT content the most recently register + // but if they have a event (exception or miss speculation), the rat must restore the oldest value + // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register + // the retire interface became of the Re Order Buffer, also is in program sequence ! + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; + Tcontrol_t write_rd = PORT_READ(in_RETIRE_WRITE_RD [i]); + Tcontrol_t write_re = PORT_READ(in_RETIRE_WRITE_RE [i]); + Tcontrol_t restore = PORT_READ(in_RETIRE_RESTORE [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore : %d",restore ); + + // Test if write and have not a previous update + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); + if (write_rd == 1) + { + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log ); + + if (not restore) + { + Tgeneral_address_t num_reg_rd_phy_new = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy_new : %d",num_reg_rd_phy_new); + + // rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new; + } + } + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); + if (write_re == 1) + { + Tspecial_address_t num_reg_re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log ); + + if (not restore) + { + Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy_new : %d",num_reg_re_phy_new); + + // rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new; + } + } + + } + } + +#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true) + { + uint32_t limit = 4; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Dump RAT (Register_Address_Translation_unit)"); + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end[%d].context[%d] - rat_depth : %d",i,j,rat_depth[i][j]); + + for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit) + { + std::string str = ""; + for (uint32_t x=0; x= _param->_nb_general_register_logic) + break; + else + str+=toString("GPR[%.4d] - %.5d | ",index,rat_gpr_speculative [i][j][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + + for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l) + for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit) + { + std::string str = ""; + for (uint32_t x=0; x= _param->_nb_general_register_logic) + break; + else + str+=toString("GPR_%d[%.4d] - %.5d | ",l,index,rat_gpr_save [i][j][l][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + + for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit) + { + std::string str = ""; + + for (uint32_t x=0; x= _param->_nb_special_register_logic) + break; + else + str+=toString("SPR[%.4d] - %.5d | ",index,rat_spr_speculative [i][j][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + + for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l) + for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit) + { + std::string str = ""; + for (uint32_t x=0; x= _param->_nb_special_register_logic) + break; + else + str+=toString("SPR_%d[%.4d] - %.5d | ",l,index,rat_spr_save [i][j][l][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + + } + } +#endif + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_constant.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_constant.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_constant.cpp (revision 139) @@ -0,0 +1,65 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_one_save_constant" + void Register_Address_Translation_unit::function_one_save_constant (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + // Constant : accepted already transaction + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + { + internal_INSERT_ACK [i] = 1; + internal_RENAME_ACK [i] = 1; + + PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]); + PORT_WRITE(out_RENAME_ACK[i],internal_RENAME_ACK [i]); + } + + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + { + internal_RETIRE_ACK [i] = 1; + + PORT_WRITE(out_RETIRE_ACK[i],internal_RETIRE_ACK [i]); + } + + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + internal_RETIRE_EVENT_ACK [i][j] = 1; + + PORT_WRITE(out_RETIRE_EVENT_ACK[i][j],internal_RETIRE_EVENT_ACK [i][j]); + } + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp (revision 139) @@ -0,0 +1,85 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_one_save_genMealy_rename" + void Register_Address_Translation_unit::function_one_save_genMealy_rename (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) != 0) + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RENAME [%d]",i); + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + bool have_event = (PORT_READ(in_RETIRE_EVENT_VAL [front_end_id][context_id]) and // always ack + (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) == EVENT_STATE_EVENT)); + + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * have_event : %d",have_event); + + Tgeneral_address_t num_reg_ra_log = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register; + Tgeneral_address_t num_reg_rb_log = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register; + Tspecial_address_t num_reg_rc_log = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register; + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register; + Tspecial_address_t num_reg_re_log = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register; + + // if rat_speculative is valid, + // then read rat_speculative have the most valid alias register + // else, they have an previous event, the rat_not_speculative have the valid register + + Tgeneral_address_t num_reg_ra_phy = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_ra_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_ra_log]; + Tgeneral_address_t num_reg_rb_phy = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rb_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rb_log]; + Tspecial_address_t num_reg_rc_phy = (rat_spr_speculative_valid[front_end_id][context_id][num_reg_rc_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_rc_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_rc_log]; + Tgeneral_address_t num_reg_rd_phy_old= (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rd_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rd_log]; + Tspecial_address_t num_reg_re_phy_old= (rat_spr_speculative_valid[front_end_id][context_id][num_reg_re_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_re_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_re_log]; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_ra : %d -> %d",num_reg_ra_log,num_reg_ra_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rb : %d -> %d",num_reg_rb_log,num_reg_rb_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rc : %d -> %d",num_reg_rc_log,num_reg_rc_phy ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re : %d -> %d",num_reg_re_log,num_reg_re_phy_old); + + PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], num_reg_ra_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], num_reg_rb_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], num_reg_rc_phy ); + PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old); + PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old); + } + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp (revision 139) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp (revision 139) @@ -0,0 +1,274 @@ +#ifdef SYSTEMC +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" + +namespace morpheo { +namespace behavioural { +namespace core { +namespace multi_ooo_engine { +namespace ooo_engine { +namespace rename_unit { +namespace register_translation_unit { +namespace register_address_translation_unit { + + +#undef FUNCTION +#define FUNCTION "Register_Address_Translation_unit::function_one_save_transition" + void Register_Address_Translation_unit::function_one_save_transition (void) + { + log_begin(Register_Address_Translation_unit,FUNCTION); + log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); + + if (PORT_READ(in_NRESET) == 0) + { + uint32_t gpr = 1; + uint32_t spr = 0; + + for (uint32_t i=0; i<_param->_nb_front_end; i++) + for (uint32_t j=0; j<_param->_nb_context[i]; j++) + { + rat_gpr_not_speculative [i][j][0] = 0; + rat_gpr_speculative_valid [i][j][0] = false; + rat_gpr_speculative [i][j][0] = 0 ; // not necessary + + for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) + { + rat_gpr_not_speculative [i][j][k] = gpr++; + rat_gpr_speculative_valid [i][j][k] = false; + rat_gpr_speculative [i][j][k] = 0 ; // not necessary + } + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + { + rat_spr_not_speculative [i][j][k] = spr++; + rat_spr_speculative_valid [i][j][k] = false; + rat_spr_speculative [i][j][k] = 0 ; // not necessary + } + } + } + else + { + // Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0) + + // ===================================================== + // ====[ RETIRE_EVENT ]================================= + // ===================================================== + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + if (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and internal_RETIRE_EVENT_ACK [i][j]) + // Test if event have just occure + if (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Reset Update Table"); + + // Reset validity table + for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) + rat_gpr_speculative_valid [i][j][k] = false; + for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) + rat_spr_speculative_valid [i][j][k] = false; + } + + // ===================================================== + // ====[ INSERT ]======================================= + // ===================================================== + // First : interface insert + // this instruction is speculative !!! + for (uint32_t i=0; i<_param->_nb_inst_insert; i++) + // Test transaction + if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * INSERT [%d]",i); + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; + Tcontrol_t write_rd = PORT_READ(in_INSERT_WRITE_RD [i]); + Tcontrol_t write_re = PORT_READ(in_INSERT_WRITE_RE [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context : %d",context_id); + + // Test if write and modifie RAT + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); + if (write_rd == 1) + { + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_INSERT_NUM_REG_RD_LOG [i]); + Tgeneral_address_t num_reg_rd_phy = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy : %d",num_reg_rd_phy); + + rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy; + rat_gpr_speculative_valid [front_end_id][context_id][num_reg_rd_log] = true; + } + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); + if (write_re == 1) + { + Tspecial_address_t num_reg_re_log = PORT_READ(in_INSERT_NUM_REG_RE_LOG [i]); + Tspecial_address_t num_reg_re_phy = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy : %d",num_reg_re_phy); + + rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy; + rat_spr_speculative_valid [front_end_id][context_id][num_reg_re_log] = true; + } + } + + // ===================================================== + // ====[ RETIRE ]======================================= + // ===================================================== + // Second : interface retire + // (because if an event on the same thread : the instruction is already renamed) + for (uint32_t i=0; i<_param->_nb_inst_retire; i++) + if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RETIRE [%d]",i); + + // if no event : no effect, because the RAT content the most recently register + // but if they have a event (exception or miss speculation), the rat must restore the oldest value + // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register + // the retire interface became of the Re Order Buffer, also is in program sequence ! + + Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; + Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; + Tcontrol_t write_rd = PORT_READ(in_RETIRE_WRITE_RD [i]); + Tcontrol_t write_re = PORT_READ(in_RETIRE_WRITE_RE [i]); + Tcontrol_t restore = PORT_READ(in_RETIRE_RESTORE [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore : %d",restore ); + + // Test if write and have not a previous update + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); + if (write_rd == 1) + { + Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log ); + + if (not restore) + { + Tgeneral_address_t num_reg_rd_phy_new = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy_new : %d",num_reg_rd_phy_new); + + rat_gpr_not_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new; + } + } + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); + if (write_re == 1) + { + Tspecial_address_t num_reg_re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log ); + + if (not restore) + { + Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]); + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy_new : %d",num_reg_re_phy_new); + + rat_spr_not_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new; + } + } + + } + } + +#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true) + { + uint32_t limit = 4; + + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Dump RAT (Register_Address_Translation_unit)"); + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end[%d].context[%d]",i,j); + + for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit) + { + std::string str = ""; + for (uint32_t x=0; x= _param->_nb_general_register_logic) + break; + else + str+=toString("GPR[%.4d] - %.1d %.5d (%.5d) | ",index,rat_gpr_speculative_valid [i][j][index],rat_gpr_speculative [i][j][index],rat_gpr_not_speculative [i][j][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + + for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit) + { + std::string str = ""; + + for (uint32_t x=0; x= _param->_nb_special_register_logic) + break; + else + str+=toString("SPR[%.4d] - %.1d %.5d (%.5d) | ",index,rat_spr_speculative_valid [i][j][index],rat_spr_speculative [i][j][index],rat_spr_not_speculative [i][j][index]); + } + log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); + } + } + } +#endif + +#ifdef DEBUG_TEST +# if 1 + { + for (uint32_t i=0; i<_param->_nb_front_end; ++i) + for (uint32_t j=0; j<_param->_nb_context[i]; ++j) + { + for (uint32_t x=0; x<_param->_nb_general_register_logic; ++x) + for (uint32_t y=x+1; y<_param->_nb_general_register_logic; ++y) + { + if (rat_gpr_speculative_valid [i][j][x] and + rat_gpr_speculative_valid [i][j][y] and + (rat_gpr_speculative[i][j][x] == rat_gpr_speculative[i][j][y])) + throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_speculative[%d][%d][%d] == rat_gpr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_speculative[i][j][x])); + if (rat_gpr_not_speculative[i][j][x] == rat_gpr_not_speculative[i][j][y]) + throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_not_speculative[%d][%d][%d] == rat_gpr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_not_speculative[i][j][x])); + + } + for (uint32_t x=0; x<_param->_nb_special_register_logic; ++x) + for (uint32_t y=x+1; y<_param->_nb_special_register_logic; ++y) + { + if(rat_spr_speculative_valid [i][j][x] and + rat_spr_speculative_valid [i][j][y] and + (rat_spr_speculative[i][j][x] == rat_spr_speculative[i][j][y])) + throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_speculative[%d][%d][%d] == rat_spr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_speculative[i][j][x])); + if (rat_spr_not_speculative[i][j][x] == rat_spr_not_speculative[i][j][y]) + throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_not_speculative[%d][%d][%d] == rat_spr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_not_speculative[i][j][x])); + + } + } + + } +# endif +#endif + + log_end(Register_Address_Translation_unit,FUNCTION); + }; + +}; // end namespace register_address_translation_unit +}; // end namespace register_translation_unit +}; // end namespace rename_unit +}; // end namespace ooo_engine +}; // end namespace multi_ooo_engine +}; // end namespace core + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp (revision 138) +++ (revision ) @@ -1,85 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_ooo_engine { -namespace ooo_engine { -namespace rename_unit { -namespace register_translation_unit { -namespace register_address_translation_unit { - - -#undef FUNCTION -#define FUNCTION "Register_Address_Translation_unit::genMealy_rename" - void Register_Address_Translation_unit::genMealy_rename (void) - { - log_begin(Register_Address_Translation_unit,FUNCTION); - log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); - - if (PORT_READ(in_NRESET) != 0) - for (uint32_t i=0; i<_param->_nb_inst_insert; i++) - if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RENAME [%d]",i); - - Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; - Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; - bool have_event = (PORT_READ(in_RETIRE_EVENT_VAL [front_end_id][context_id]) and // always ack - (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) == EVENT_STATE_EVENT)); - - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * have_event : %d",have_event); - - Tgeneral_address_t num_reg_ra_log = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register; - Tgeneral_address_t num_reg_rb_log = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register; - Tspecial_address_t num_reg_rc_log = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register; - Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register; - Tspecial_address_t num_reg_re_log = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register; - - // if rat_speculative is valid, - // then read rat_speculative have the most valid alias register - // else, they have an previous event, the rat_not_speculative have the valid register - - Tgeneral_address_t num_reg_ra_phy = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_ra_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_ra_log]; - Tgeneral_address_t num_reg_rb_phy = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rb_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rb_log]; - Tspecial_address_t num_reg_rc_phy = (rat_spr_speculative_valid[front_end_id][context_id][num_reg_rc_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_rc_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_rc_log]; - Tgeneral_address_t num_reg_rd_phy_old= (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rd_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rd_log]; - Tspecial_address_t num_reg_re_phy_old= (rat_spr_speculative_valid[front_end_id][context_id][num_reg_re_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_re_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_re_log]; - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_ra : %d -> %d",num_reg_ra_log,num_reg_ra_phy ); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rb : %d -> %d",num_reg_rb_log,num_reg_rb_phy ); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rc : %d -> %d",num_reg_rc_log,num_reg_rc_phy ); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re : %d -> %d",num_reg_re_log,num_reg_re_phy_old); - - PORT_WRITE(out_RENAME_NUM_REG_RA_PHY [i], num_reg_ra_phy ); - PORT_WRITE(out_RENAME_NUM_REG_RB_PHY [i], num_reg_rb_phy ); - PORT_WRITE(out_RENAME_NUM_REG_RC_PHY [i], num_reg_rc_phy ); - PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old); - PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old); - } - - log_end(Register_Address_Translation_unit,FUNCTION); - }; - -}; // end namespace register_address_translation_unit -}; // end namespace register_translation_unit -}; // end namespace rename_unit -}; // end namespace ooo_engine -}; // end namespace multi_ooo_engine -}; // end namespace core - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_retire.cpp (revision 138) +++ (revision ) @@ -1,122 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_ooo_engine { -namespace ooo_engine { -namespace rename_unit { -namespace register_translation_unit { -namespace register_address_translation_unit { - - -#undef FUNCTION -#define FUNCTION "Register_Address_Translation_unit::genMealy_retire" - void Register_Address_Translation_unit::genMealy_retire (void) - { - log_begin(Register_Address_Translation_unit,FUNCTION); - log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); - - if (PORT_READ(in_NRESET) != 0) - { - // Init internal update table - for (uint32_t i=0; i<_param->_nb_front_end; i++) - for (uint32_t j=0; j<_param->_nb_context[i]; j++) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * init [%d][%d]",i,j); - - // An event occure - // bool event = (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) != EVENT_STATE_NO_EVENT); - bool reset_update_table = (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and // always ack - (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT)); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * reset_update_table : %d",reset_update_table); - - // not event -> update_table == 1 -> always update - // event -> update_table and not reset - for (uint32_t k=0; k<_param->_nb_general_register_logic; ++k) - internal_rat_gpr_update_table [i][j][k] = // not event or - (not reset_update_table and rat_gpr_update_table [i][j][k]); - for (uint32_t k=0; k<_param->_nb_special_register_logic; ++k) - internal_rat_spr_update_table [i][j][k] = // not event or - (not reset_update_table and rat_spr_update_table [i][j][k]); - } - - // RETIRE is in order -> also don't need test if an instruction is valid - for (uint32_t i=0; i<_param->_nb_inst_retire; i++) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * inst_retire [%d]",i); - - // init -> need't restore old value - Tcontrol_t retire_restore_rd_phy_old = false; - Tcontrol_t retire_restore_re_phy_old = false; - - Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; - Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; - Tcontrol_t retire_restore = (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) != EVENT_STATE_NO_EVENT); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore : %d",retire_restore); - - // Test if event -> need restore ? - if (retire_restore) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Have event"); - - // Test and update update table - if (PORT_READ(in_RETIRE_WRITE_RD [i])) - { - Tgeneral_address_t rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); - retire_restore_rd_phy_old = (internal_rat_gpr_update_table[front_end_id][context_id][rd_log] == 0); - -// log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd"); -// log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * rd_log : %d",rd_log); -// log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * rat_gpr_update : %d",internal_rat_gpr_update_table[front_end_id][context_id][rd_log]); - - internal_rat_gpr_update_table[front_end_id][context_id][rd_log] = 1; - } - if (PORT_READ(in_RETIRE_WRITE_RE [i])) - { -// log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re"); - - Tgeneral_address_t re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); - retire_restore_re_phy_old = (internal_rat_spr_update_table[front_end_id][context_id][re_log] == 0); - internal_rat_spr_update_table[front_end_id][context_id][re_log] = 1; - } - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore_rd_phy_old : %d",retire_restore_rd_phy_old); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore_re_phy_old : %d",retire_restore_re_phy_old); - } - - internal_RETIRE_RESTORE [i] = retire_restore; - internal_RETIRE_RESTORE_RD_PHY_OLD [i] = retire_restore_rd_phy_old; - internal_RETIRE_RESTORE_RE_PHY_OLD [i] = retire_restore_re_phy_old; - - PORT_WRITE(out_RETIRE_RESTORE [i], internal_RETIRE_RESTORE [i]); - PORT_WRITE(out_RETIRE_RESTORE_RD_PHY_OLD[i], internal_RETIRE_RESTORE_RD_PHY_OLD [i]); - PORT_WRITE(out_RETIRE_RESTORE_RE_PHY_OLD[i], internal_RETIRE_RESTORE_RE_PHY_OLD [i]); - } - } - - log_end(Register_Address_Translation_unit,FUNCTION); - }; - -}; // end namespace register_address_translation_unit -}; // end namespace register_translation_unit -}; // end namespace rename_unit -}; // end namespace ooo_engine -}; // end namespace multi_ooo_engine -}; // end namespace core - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp (revision 138) +++ (revision ) @@ -1,299 +1,0 @@ -#ifdef SYSTEMC -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h" - -namespace morpheo { -namespace behavioural { -namespace core { -namespace multi_ooo_engine { -namespace ooo_engine { -namespace rename_unit { -namespace register_translation_unit { -namespace register_address_translation_unit { - - -#undef FUNCTION -#define FUNCTION "Register_Address_Translation_unit::transition" - void Register_Address_Translation_unit::transition (void) - { - log_begin(Register_Address_Translation_unit,FUNCTION); - log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str()); - - if (PORT_READ(in_NRESET) == 0) - { - uint32_t gpr = 1; - uint32_t spr = 0; - - for (uint32_t i=0; i<_param->_nb_front_end; i++) - for (uint32_t j=0; j<_param->_nb_context[i]; j++) - { - rat_gpr_not_speculative [i][j][0] = 0; - rat_gpr_speculative_valid [i][j][0] = false; - rat_gpr_speculative [i][j][0] = 0 ; // not necessary - rat_gpr_update_table [i][j][0] = false; // not necessary - - for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) - { - rat_gpr_not_speculative [i][j][k] = gpr++; - rat_gpr_speculative_valid [i][j][k] = false; - rat_gpr_speculative [i][j][k] = 0 ; // not necessary - rat_gpr_update_table [i][j][k] = false; // not necessary - } - for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) - { - rat_spr_not_speculative [i][j][k] = spr++; - rat_spr_speculative_valid [i][j][k] = false; - rat_spr_speculative [i][j][k] = 0 ; // not necessary - rat_spr_update_table [i][j][k] = false; // not necessary - } - } - } - else - { - // Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0) - - // ===================================================== - // ====[ RETIRE_EVENT ]================================= - // ===================================================== - for (uint32_t i=0; i<_param->_nb_front_end; ++i) - for (uint32_t j=0; j<_param->_nb_context[i]; ++j) - if (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and internal_RETIRE_EVENT_ACK [i][j]) - // Test if event have just occure - if (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Reset Update Table"); - - // Reset update_table and validity table - for (uint32_t k=0; k<_param->_nb_general_register_logic; k++) - { - rat_gpr_update_table [i][j][k] = false; - rat_gpr_speculative_valid [i][j][k] = false; - } - for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) - { - rat_spr_update_table [i][j][k] = false; - rat_spr_speculative_valid [i][j][k] = false; - } - } - - // ===================================================== - // ====[ INSERT ]======================================= - // ===================================================== - // First : interface insert - // this instruction is speculative !!! - for (uint32_t i=0; i<_param->_nb_inst_insert; i++) - // Test transaction - if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i]) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * INSERT [%d]",i); - - Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0; - Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_CONTEXT_ID [i]):0; - Tcontrol_t write_rd = PORT_READ(in_INSERT_WRITE_RD [i]); - Tcontrol_t write_re = PORT_READ(in_INSERT_WRITE_RE [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end : %d",front_end_id); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context : %d",context_id); - - // Test if write and modifie RAT - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); - if (write_rd == 1) - { - Tgeneral_address_t num_reg_rd_log = PORT_READ(in_INSERT_NUM_REG_RD_LOG [i]); - Tgeneral_address_t num_reg_rd_phy = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy : %d",num_reg_rd_phy); - - rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy; - rat_gpr_speculative_valid [front_end_id][context_id][num_reg_rd_log] = true; - } - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); - if (write_re == 1) - { - Tspecial_address_t num_reg_re_log = PORT_READ(in_INSERT_NUM_REG_RE_LOG [i]); - Tspecial_address_t num_reg_re_phy = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy : %d",num_reg_re_phy); - - rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy; - rat_spr_speculative_valid [front_end_id][context_id][num_reg_re_log] = true; - } - } - - // ===================================================== - // ====[ RETIRE ]======================================= - // ===================================================== - // Second : interface retire - // (because if an event on the same thread : the instruction is already renamed) - for (uint32_t i=0; i<_param->_nb_inst_retire; i++) - if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i]) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RETIRE [%d]",i); - - // if no event : no effect, because the RAT content the most recently register - // but if they have a event (exception or miss speculation), the rat must restore the oldest value - // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register - // the retire interface became of the Re Order Buffer, also is in program sequence ! - - Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0; - Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RETIRE_CONTEXT_ID [i]):0; - Tcontrol_t write_rd = PORT_READ(in_RETIRE_WRITE_RD [i]); - Tcontrol_t write_re = PORT_READ(in_RETIRE_WRITE_RE [i]); - Tcontrol_t restore = internal_RETIRE_RESTORE [i]; - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end_id : %d",front_end_id); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * context_id : %d",context_id ); - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore : %d",restore ); - - // Test if write and have not a previous update - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_rd : %d",write_rd); - if (PORT_READ(in_RETIRE_WRITE_RD [i]) == 1) - { - Tgeneral_address_t num_reg_rd_log = PORT_READ(in_RETIRE_NUM_REG_RD_LOG [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_log : %d",num_reg_rd_log ); - - if (not restore) - { - Tgeneral_address_t num_reg_rd_phy_new = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_rd_phy_new : %d",num_reg_rd_phy_new); - - rat_gpr_not_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new; - } - - Tcontrol_t restore_rd = internal_RETIRE_RESTORE_RD_PHY_OLD [i]; - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore_rd : %d",restore_rd ); - - if (restore_rd) - rat_gpr_update_table [front_end_id][context_id][num_reg_rd_log] = true; - } - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * write_re : %d",write_re); - if (PORT_READ(in_RETIRE_WRITE_RE [i]) == 1) - { - Tspecial_address_t num_reg_re_log = PORT_READ(in_RETIRE_NUM_REG_RE_LOG [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_log : %d",num_reg_re_log ); - - if (not restore) - { - Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]); - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * num_reg_re_phy_new : %d",num_reg_re_phy_new); - - rat_spr_not_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new; - } - - Tcontrol_t restore_re = internal_RETIRE_RESTORE_RE_PHY_OLD [i]; - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * restore_re : %d",restore_re ); - - if (restore_re) - rat_spr_update_table [front_end_id][context_id][num_reg_re_log] = true; - } - - } - } - -#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true) - { - uint32_t limit = 4; - - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * Dump RAT (Register_Address_Translation_unit)"); - for (uint32_t i=0; i<_param->_nb_front_end; ++i) - for (uint32_t j=0; j<_param->_nb_context[i]; ++j) - { - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * front_end[%d].context[%d]",i,j); - - for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit) - { - std::string str = ""; - for (uint32_t x=0; x= _param->_nb_general_register_logic) - break; - else - str+=toString("GPR[%.4d] - %.1d %.5d (%.5d) %.1d | ",index,rat_gpr_speculative_valid [i][j][index],rat_gpr_speculative [i][j][index],rat_gpr_not_speculative [i][j][index],rat_gpr_update_table[i][j][index]); - } - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); - } - - for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit) - { - std::string str = ""; - - for (uint32_t x=0; x= _param->_nb_special_register_logic) - break; - else - str+=toString("SPR[%.4d] - %.1d %.5d (%.5d) %.1d | ",index,rat_spr_speculative_valid [i][j][index],rat_spr_speculative [i][j][index],rat_spr_not_speculative [i][j][index],rat_spr_update_table[i][j][index]); - } - log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * %s",str.c_str()); - } - } - } -#endif - -#ifdef DEBUG_TEST -# if 1 - { - for (uint32_t i=0; i<_param->_nb_front_end; ++i) - for (uint32_t j=0; j<_param->_nb_context[i]; ++j) - { - for (uint32_t x=0; x<_param->_nb_general_register_logic; ++x) - for (uint32_t y=x+1; y<_param->_nb_general_register_logic; ++y) - { - if (rat_gpr_speculative_valid [i][j][x] and - rat_gpr_speculative_valid [i][j][y] and - (rat_gpr_speculative[i][j][x] == rat_gpr_speculative[i][j][y])) - throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_speculative[%d][%d][%d] == rat_gpr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_speculative[i][j][x])); - if (rat_gpr_not_speculative[i][j][x] == rat_gpr_not_speculative[i][j][y]) - throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_not_speculative[%d][%d][%d] == rat_gpr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_not_speculative[i][j][x])); - - } - for (uint32_t x=0; x<_param->_nb_special_register_logic; ++x) - for (uint32_t y=x+1; y<_param->_nb_special_register_logic; ++y) - { - if(rat_spr_speculative_valid [i][j][x] and - rat_spr_speculative_valid [i][j][y] and - (rat_spr_speculative[i][j][x] == rat_spr_speculative[i][j][y])) - throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_speculative[%d][%d][%d] == rat_spr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_speculative[i][j][x])); - if (rat_spr_not_speculative[i][j][x] == rat_spr_not_speculative[i][j][y]) - throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_not_speculative[%d][%d][%d] == rat_spr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_not_speculative[i][j][x])); - - } - } - - } -# endif -#endif - -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - end_cycle (); -#endif - - log_end(Register_Address_Translation_unit,FUNCTION); - }; - -}; // end namespace register_address_translation_unit -}; // end namespace register_translation_unit -}; // end namespace rename_unit -}; // end namespace ooo_engine -}; // end namespace multi_ooo_engine -}; // end namespace core - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp (revision 139) @@ -94,14 +94,36 @@ log_printf(TRACE,Stat_List_unit,FUNCTION," * nb_spr_free : stat_list %d - free_list %d - free %d, link %d (%d), use %d (%d)",stat_list_nb_spr_free,free_list_nb_spr_free,nb_spr_free,nb_spr_link,stat_list_nb_spr_link,nb_spr_use,stat_list_nb_spr_use); - if (free_list_nb_gpr_free != stat_list_nb_gpr_free) - throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list.\n"),stat_list_nb_gpr_free,free_list_nb_gpr_free)); - if (free_list_nb_spr_free != stat_list_nb_spr_free) - throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list.\n"),stat_list_nb_spr_free,free_list_nb_spr_free)); - - if (PORT_READ(in_INFO_ROB_EMPTY) and (nb_gpr_free != _nb_gpr_free)) - throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d general registers free or can_free and must be %d registers."),nb_gpr_free,_nb_gpr_free)); - - if (PORT_READ(in_INFO_ROB_EMPTY) and (nb_spr_free != _nb_spr_free)) - throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d special registers free or can_free and must be %d registers."),nb_spr_free,_nb_spr_free)); + bool error_nb_gpr_free = (free_list_nb_gpr_free != stat_list_nb_gpr_free); + bool error_nb_spr_free = (free_list_nb_spr_free != stat_list_nb_spr_free); + bool error_rob_nb_gpr_free = (PORT_READ(in_INFO_ROB_EMPTY) and (nb_gpr_free != _nb_gpr_free)); + bool error_rob_nb_spr_free = (PORT_READ(in_INFO_ROB_EMPTY) and (nb_spr_free != _nb_spr_free)); + + std::string list_gpr_not_free; + std::string list_spr_not_free; + + + if (error_nb_gpr_free or + error_rob_nb_gpr_free) + for (uint32_t i=0; i<_param->_nb_bank; i++) + for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) + if (not gpr_stat_list [i][j]._is_free) + list_gpr_not_free+=toString((i<<_param->_shift_gpr)|j)+" "; + + if (error_nb_spr_free or + error_rob_nb_spr_free) + for (uint32_t i=0; i<_param->_nb_bank; i++) + for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) + if (not spr_stat_list [i][j]._is_free) + list_spr_not_free+=toString((i<<_param->_shift_spr)|j)+" "; + + if (error_nb_gpr_free) + throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list. (GPR not free : %s)\n"),stat_list_nb_gpr_free,free_list_nb_gpr_free,list_gpr_not_free.c_str())); + if (error_nb_spr_free) + throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list. (SPR not free : %s)\n"),stat_list_nb_spr_free,free_list_nb_spr_free,list_spr_not_free.c_str())); + if (error_rob_nb_gpr_free) + throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d general registers free or can_free and must be %d registers. (GPR not free : %s)"),nb_gpr_free,_nb_gpr_free,list_gpr_not_free.c_str())); + + if (error_rob_nb_spr_free) + throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d special registers free or can_free and must be %d registers. (SPR not free : %s)"),nb_spr_free,_nb_spr_free,list_gpr_not_free.c_str())); } #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Parameters.h (revision 139) @@ -30,21 +30,23 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_front_end ; - public : uint32_t * _nb_context ;//[nb_front_end] - public : uint32_t _nb_general_register ; - public : uint32_t _nb_special_register ; - public : uint32_t _nb_inst_insert ; - public : uint32_t _nb_inst_retire ; - public : uint32_t _nb_reg_free ; - public : uint32_t _nb_bank ; -//public : uint32_t _size_read_counter ; - -//public : uint32_t _size_front_end_id ; -//public : uint32_t _size_context_id ; -//public : uint32_t _size_general_register ; -//public : uint32_t _size_special_register ; - -//public : uint32_t _have_port_context_id ; -//public : uint32_t _have_port_front_end_id; + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_general_register ; + public : uint32_t _nb_special_register ; + public : Trat_scheme_t _rat_scheme ; + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; + public : uint32_t _nb_reg_free ; + public : uint32_t _nb_bank ; +//public : uint32_t _size_read_counter ; + public : uint32_t ** _nb_branch_speculated ;//[nb_front_end][nb_context] + +//public : uint32_t _size_front_end_id ; +//public : uint32_t _size_context_id ; +//public : uint32_t _size_general_register ; +//public : uint32_t _size_special_register ; + +//public : uint32_t _have_port_context_id ; +//public : uint32_t _have_port_front_end_id; public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit:: Parameters * _param_dependency_checking_unit; @@ -54,14 +56,16 @@ public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_translation_unit_glue:: Parameters * _param_register_translation_unit_glue; //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t nb_front_end , - uint32_t * nb_context , - uint32_t nb_general_register , - uint32_t nb_special_register , - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - uint32_t nb_reg_free , - uint32_t nb_bank , -// uint32_t size_read_counter , - bool is_toplevel=false); + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , + uint32_t nb_general_register , + uint32_t nb_special_register , + Trat_scheme_t rat_scheme ,//[nb_front_end] + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , +// uint32_t size_read_counter , + uint32_t ** nb_branch_speculated,//[nb_front_end][nb_context] + bool is_toplevel=false); // public : Parameters (Parameters & param) ; public : ~Parameters () ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h (revision 139) @@ -72,4 +72,6 @@ public : SC_IN (Tcontext_t ) ** in_RENAME_FRONT_END_ID ;//[nb_inst_insert] public : SC_IN (Tcontext_t ) ** in_RENAME_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tdepth_t ) ** in_RENAME_DEPTH ;//[nb_inst_insert] + public : SC_IN (Tcontrol_t ) ** in_RENAME_SAVE_RAT ;//[nb_inst_insert] public : SC_IN (Tcontrol_t ) ** in_RENAME_READ_RA ;//[nb_inst_insert] public : SC_IN (Tgeneral_address_t) ** in_RENAME_NUM_REG_RA_LOG ;//[nb_inst_insert] @@ -117,10 +119,10 @@ public : SC_IN (Tcontext_t ) ** in_RETIRE_FRONT_END_ID ;//[nb_inst_retire] public : SC_IN (Tcontext_t ) ** in_RETIRE_CONTEXT_ID ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] -// public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] -// public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] -// public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] +//public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] +//public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] +//public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_LOG ;//[nb_inst_retire] @@ -131,4 +133,7 @@ public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire] public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire] // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -136,4 +141,6 @@ public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_ACK ;//[nb_front_end][nb_context] public : SC_IN (Tevent_state_t ) *** in_RETIRE_EVENT_STATE ;//[nb_front_end][nb_context] + public : SC_IN (Tevent_type_t ) *** in_RETIRE_EVENT_TYPE ;//[nb_front_end][nb_context] + public : SC_IN (Tdepth_t ) *** in_RETIRE_EVENT_DEPTH ;//[nb_front_end][nb_context] // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp (revision 139) @@ -20,26 +20,30 @@ #undef FUNCTION #define FUNCTION "Register_translation_unit::Parameters" - Parameters::Parameters (uint32_t nb_front_end , - uint32_t * nb_context , - uint32_t nb_general_register , - uint32_t nb_special_register , - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - uint32_t nb_reg_free , - uint32_t nb_bank , -// uint32_t size_read_counter , - bool is_toplevel) + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context ,//[nb_front_end] + uint32_t nb_general_register , + uint32_t nb_special_register , + Trat_scheme_t rat_scheme , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t nb_reg_free , + uint32_t nb_bank , +// uint32_t size_read_counter , + uint32_t ** nb_branch_speculated,//[nb_front_end][nb_context] + bool is_toplevel) { log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); - _nb_front_end = nb_front_end ; - _nb_context = nb_context ; - _nb_general_register = nb_general_register; - _nb_special_register = nb_special_register; - _nb_inst_insert = nb_inst_insert ; - _nb_inst_retire = nb_inst_retire ; - _nb_reg_free = nb_reg_free ; - _nb_bank = nb_bank ; -// _size_read_counter = size_read_counter ; + _nb_front_end = nb_front_end ; + _nb_context = nb_context ; + _nb_general_register = nb_general_register ; + _nb_special_register = nb_special_register ; + _rat_scheme = rat_scheme ; + _nb_inst_insert = nb_inst_insert ; + _nb_inst_retire = nb_inst_retire ; + _nb_reg_free = nb_reg_free ; + _nb_bank = nb_bank ; +// _size_read_counter = size_read_counter ; + _nb_branch_speculated = nb_branch_speculated; uint32_t size_general_register = log2(nb_general_register); @@ -68,10 +72,12 @@ _param_register_address_translation_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::register_address_translation_unit::Parameters - (_nb_front_end , - _nb_context , - _nb_general_register, - _nb_special_register, - _nb_inst_insert , - _nb_inst_retire ); + (_nb_front_end , + _nb_context , + _nb_general_register , + _nb_special_register , + _rat_scheme , + _nb_inst_insert , + _nb_inst_retire , + _nb_branch_speculated); _param_stat_list_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters @@ -99,5 +105,5 @@ _size_front_end_id = log2(nb_front_end ); _size_context_id = log2(max_nb_context ); - + _size_depth = log2(max(_nb_branch_speculated,_nb_front_end,_nb_context)); _size_general_register = size_general_register; _size_special_register = size_special_register; @@ -105,4 +111,5 @@ _have_port_front_end_id = _size_front_end_id>0; _have_port_context_id = _size_context_id >0; + _have_port_depth = _size_depth >0; copy(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters_print.cpp (revision 139) @@ -27,12 +27,13 @@ xml.balise_open("register_translation_unit"); - xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); - xml.singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); - xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); - xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); - xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); - xml.singleton_begin("nb_reg_free "); xml.attribut("value",toString(_nb_reg_free )); xml.singleton_end(); - xml.singleton_begin("nb_bank "); xml.attribut("value",toString(_nb_bank )); xml.singleton_end(); -// xml.singleton_begin("size_read_counter "); xml.attribut("value",toString(_size_read_counter )); xml.singleton_end(); + xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); + xml.singleton_begin("nb_general_register "); xml.attribut("value",toString(_nb_general_register)); xml.singleton_end(); + xml.singleton_begin("nb_special_register "); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); + xml.singleton_begin("rat_scheme "); xml.attribut("value",toString(_rat_scheme )); xml.singleton_end(); + xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); + xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); + xml.singleton_begin("nb_reg_free "); xml.attribut("value",toString(_nb_reg_free )); xml.singleton_end(); + xml.singleton_begin("nb_bank "); xml.attribut("value",toString(_nb_bank )); xml.singleton_end(); +// xml.singleton_begin("size_read_counter "); xml.attribut("value",toString(_size_read_counter )); xml.singleton_end(); for (uint32_t i=0;i<_nb_front_end; i++) { @@ -41,5 +42,16 @@ xml. attribut("id" ,toString(i)); xml. balise_open_end(); - xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + xml. singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context [i] )); xml.singleton_end(); + + for (uint32_t j=0;j<_nb_context[i]; j++) + { + xml. balise_open_begin("component"); + xml. attribut("type","context"); + xml. attribut("id" ,toString(j)); + xml. balise_open_end(); + xml. singleton_begin("nb_branch_speculated"); xml.attribut("value",toString(_nb_branch_speculated[i][j])); xml.singleton_end(); + xml. balise_close(); + } + xml. balise_close(); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp (revision 139) @@ -60,18 +60,20 @@ ALLOC1_INTERFACE_BEGIN("rename", IN, EAST, _("Instruction with logical register"), _param->_nb_inst_insert); - ALLOC1_VALACK_IN ( in_RENAME_VAL ,VAL); - ALLOC1_VALACK_OUT(out_RENAME_ACK ,ACK); - ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); - ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); - ALLOC1_SIGNAL_IN ( in_RENAME_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG,"num_reg_ra_log",Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG,"num_reg_rb_log",Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG,"num_reg_rc_log",Tspecial_address_t,_param->_size_special_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG,"num_reg_rd_log",Tgeneral_address_t,_param->_size_general_register_logic); - ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); - ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_VALACK_IN ( in_RENAME_VAL ,VAL); + ALLOC1_VALACK_OUT (out_RENAME_ACK ,ACK); + ALLOC1_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); + ALLOC1_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); + ALLOC1_SIGNAL_IN_COND ( in_RENAME_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_rat_scheme == RAT_DEPTH_SAVE); + ALLOC1_SIGNAL_IN ( in_RENAME_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RA_LOG,"num_reg_ra_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RB_LOG,"num_reg_rb_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RC_LOG,"num_reg_rc_log",Tspecial_address_t,_param->_size_special_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RD_LOG,"num_reg_rd_log",Tgeneral_address_t,_param->_size_general_register_logic); + ALLOC1_SIGNAL_IN ( in_RENAME_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RENAME_NUM_REG_RE_LOG,"num_reg_re_log",Tspecial_address_t,_param->_size_special_register_logic); ALLOC1_INTERFACE_END(_param->_nb_inst_insert); @@ -135,4 +137,7 @@ ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register ); ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE ,"restore" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RD_PHY_OLD,"restore_rd_phy_old",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RE_PHY_OLD,"restore_re_phy_old",Tcontrol_t ,1 ); ALLOC1_INTERFACE_END(_param->_nb_inst_retire); @@ -143,7 +148,9 @@ ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_OUT (out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); @@ -295,4 +302,9 @@ PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_CONTEXT_ID" , dest, "in_RENAME_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_DEPTH" , + dest, "in_RENAME_"+toString(i)+"_DEPTH" ); + PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_SAVE_RAT" , + dest, "in_RENAME_"+toString(i)+"_SAVE_RAT" ); PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" , dest, "in_RENAME_"+toString(i)+"_NUM_REG_RA_LOG" ); @@ -376,4 +388,6 @@ PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW", dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE" , + dest, "in_RETIRE_"+toString(i)+"_RESTORE" ); dest = _name+"_register_translation_unit_glue"; @@ -383,11 +397,11 @@ dest, "in_RETIRE_"+toString(i)+"_RAT_ACK" ); - dest = _name+"_stat_list_unit"; - COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD", - dest, "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"); - COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD", - dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"); - COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE" , - dest, "in_RETIRE_"+toString(i)+"_RESTORE" ); + // dest = _name+"_stat_list_unit"; + // COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD", + // dest, "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"); + // COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD", + // dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"); + // COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RESTORE" , + // dest, "in_RETIRE_"+toString(i)+"_RESTORE" ); } @@ -407,4 +421,12 @@ PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE", dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE"); + if (_param->_rat_scheme == RAT_DEPTH_SAVE) + { + PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_TYPE" , + dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_TYPE" ); + if (_param->_have_port_depth) + PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_DEPTH", + dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_DEPTH"); + } } } @@ -717,8 +739,10 @@ PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW", dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); - - // in_RETIRE_RESTORE_RD_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RD_PHY_OLD - // in_RETIRE_RESTORE_RE_PHY_OLD - register_address_translation_unit.out_RETIRE_RESTORE_RE_PHY_OLD - // in_RETIRE_RESTORE - register_address_translation_unit.out_RETIRE_RESTORE + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE", + dest, "in_RETIRE_"+toString(i)+"_RESTORE"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"); dest = _name+"_register_translation_unit_glue"; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp (revision 139) @@ -29,72 +29,79 @@ delete in_NRESET; - DELETE1_SIGNAL( in_RENAME_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_RENAME_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); - DELETE1_SIGNAL( in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); - DELETE1_SIGNAL( in_RENAME_READ_RA ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RA_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_READ_RB ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RB_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_READ_RC ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RC_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_RENAME_WRITE_RD ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RENAME_WRITE_RE ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_RENAME_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RENAME_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_RENAME_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); + DELETE1_SIGNAL ( in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); + DELETE1_SIGNAL_COND( in_RENAME_DEPTH ,_param->_nb_inst_insert,_param->_size_depth ,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE1_SIGNAL ( in_RENAME_SAVE_RAT ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_READ_RA ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RA_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_READ_RB ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RB_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_READ_RC ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RC_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RENAME_WRITE_RD ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RD_LOG,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RENAME_WRITE_RE ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_RENAME_NUM_REG_RE_LOG,_param->_nb_inst_insert,_param->_size_special_register_logic); + + DELETE1_SIGNAL (out_INSERT_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_ACK ,_param->_nb_inst_insert,1); +// DELETE1_SIGNAL (out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); +// DELETE1_SIGNAL (out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); + DELETE1_SIGNAL (out_INSERT_READ_RA ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_READ_RB ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_READ_RC ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); + DELETE1_SIGNAL (out_INSERT_WRITE_RD ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_WRITE_RE ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register ); + + DELETE1_SIGNAL ( in_RETIRE_VAL ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL (out_RETIRE_ACK ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id ); + DELETE1_SIGNAL ( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RA ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RB ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RC ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire,_param->_size_general_register ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register ); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_RESTORE ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_RESTORE_RD_PHY_OLD ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_RESTORE_RE_PHY_OLD ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_INSERT_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_ACK ,_param->_nb_inst_insert,1); -// DELETE1_SIGNAL(out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); -// DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); - DELETE1_SIGNAL(out_INSERT_READ_RA ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_READ_RB ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_READ_RC ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); - DELETE1_SIGNAL(out_INSERT_WRITE_RD ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_WRITE_RE ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register ); - - DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id ); - DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); -// DELETE1_SIGNAL( in_RETIRE_READ_RA ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); -// DELETE1_SIGNAL( in_RETIRE_READ_RB ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); -// DELETE1_SIGNAL( in_RETIRE_READ_RC ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire,_param->_size_special_register ); - DELETE1_SIGNAL( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire,_param->_size_general_register ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire,_param->_size_general_register ); - DELETE1_SIGNAL( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire,_param->_size_special_register ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire,_param->_size_special_register ); - - DELETE2_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); + DELETE2_SIGNAL ( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_TYPE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_type,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_DEPTH ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth ,_param->_rat_scheme == RAT_DEPTH_SAVE); #ifdef DEBUG_TEST - DELETE0_SIGNAL( in_INFO_ROB_EMPTY ,1); + DELETE0_SIGNAL ( in_INFO_ROB_EMPTY ,1); #endif } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h (revision 139) @@ -81,4 +81,5 @@ public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_LAST_EVENT ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_SAVE_RAT ;//[nb_front_end][nb_inst_decod] #ifdef DEBUG public : SC_IN (Taddress_t ) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod] @@ -114,4 +115,5 @@ public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_LAST_EVENT ;//[nb_inst_rename] public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename] + public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_SAVE_RAT ;//[nb_inst_rename] #ifdef DEBUG public : SC_OUT(Taddress_t ) ** out_RENAME_OUT_ADDRESS ;//[nb_inst_rename] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp (revision 139) @@ -101,4 +101,5 @@ << (*(in_RENAME_IN_LAST_EVENT [i][j])) << (*(in_RENAME_IN_IS_DELAY_SLOT [i][j])) + << (*(in_RENAME_IN_SAVE_RAT [i][j])) #ifdef DEBUG << (*(in_RENAME_IN_ADDRESS [i][j])) @@ -176,4 +177,6 @@ (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_VAL [i][j])); (*(out_RENAME_OUT_IS_DELAY_SLOT [x])) (*(in_RENAME_IN_IS_DELAY_SLOT [i][j])); + (*(out_RENAME_OUT_SAVE_RAT [x])) (*(in_RENAME_IN_VAL [i][j])); + (*(out_RENAME_OUT_SAVE_RAT [x])) (*(in_RENAME_IN_SAVE_RAT [i][j])); #ifdef DEBUG (*(out_RENAME_OUT_ADDRESS [x])) (*(in_RENAME_IN_VAL [i][j])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp (revision 139) @@ -74,4 +74,5 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_IN_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); #ifdef DEBUG _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address , _param->_nb_front_end, _param->_nb_inst_decod[it1]); @@ -113,4 +114,5 @@ ALLOC1_SIGNAL_OUT(out_RENAME_OUT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); + ALLOC1_SIGNAL_OUT(out_RENAME_OUT_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 ); #ifdef DEBUG ALLOC1_SIGNAL_OUT(out_RENAME_OUT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp (revision 139) @@ -111,4 +111,5 @@ PORT_WRITE(out_RENAME_OUT_LAST_EVENT [i],PORT_READ(in_RENAME_IN_LAST_EVENT [x][y])); PORT_WRITE(out_RENAME_OUT_IS_DELAY_SLOT[i],PORT_READ(in_RENAME_IN_IS_DELAY_SLOT [x][y])); + PORT_WRITE(out_RENAME_OUT_SAVE_RAT [i],PORT_READ(in_RENAME_IN_SAVE_RAT [x][y])); #ifdef DEBUG PORT_WRITE(out_RENAME_OUT_ADDRESS [i],PORT_READ(in_RENAME_IN_ADDRESS [x][y])); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h (revision 139) @@ -11,4 +11,5 @@ #include "Behavioural/include/Parameters.h" #include "Common/include/Debug.h" +#include "Behavioural/include/Types.h" namespace morpheo { @@ -24,10 +25,11 @@ { //-----[ fields ]------------------------------------------------------------ - public : uint32_t _nb_front_end ; - public : uint32_t * _nb_context ;//[nb_front_end] - public : uint32_t _nb_inst_insert ; - public : uint32_t _nb_inst_retire ; -//public : uint32_t _size_general_data ; -//public : uint32_t _size_special_register ; + public : uint32_t _nb_front_end ; + public : uint32_t * _nb_context ;//[nb_front_end] + public : uint32_t _nb_inst_insert ; + public : uint32_t _nb_inst_retire ; +//public : uint32_t _size_general_data ; +//public : uint32_t _size_special_register ; + public : Trat_scheme_t _rat_scheme ; //public : uint32_t _size_front_end_id ; @@ -38,13 +40,14 @@ //-----[ methods ]----------------------------------------------------------- - public : Parameters (uint32_t nb_front_end , - uint32_t * nb_context , -// uint32_t size_front_end_id , -// uint32_t size_context_id , - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - uint32_t size_general_data , - uint32_t size_special_register, - bool is_toplevel=false + public : Parameters (uint32_t nb_front_end , + uint32_t * nb_context , +// uint32_t size_front_end_id , +// uint32_t size_context_id , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t size_general_data , + uint32_t size_special_register, + Trat_scheme_t rat_scheme , + bool is_toplevel=false ); // public : Parameters (Parameters & param) ; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h (revision 139) @@ -12,5 +12,4 @@ #include "systemc.h" #endif - #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Parameters.h" @@ -69,4 +68,5 @@ public : SC_OUT(Tcontext_t ) ** out_INSERT_FRONT_END_ID ;//[nb_inst_insert] public : SC_OUT(Tcontext_t ) ** out_INSERT_CONTEXT_ID ;//[nb_inst_insert] + public : SC_OUT(Tdepth_t ) ** out_INSERT_DEPTH ;//[nb_inst_insert] public : SC_OUT(Ttype_t ) ** out_INSERT_TYPE ;//[nb_inst_insert] public : SC_OUT(Toperation_t ) ** out_INSERT_OPERATION ;//[nb_inst_insert] @@ -81,4 +81,5 @@ public : SC_IN (Tcontext_t ) ** in_INSERT_RENAME_SELECT_FRONT_END_ID ;//[nb_inst_insert] public : SC_IN (Tcontext_t ) ** in_INSERT_RENAME_SELECT_CONTEXT_ID ;//[nb_inst_insert] + public : SC_IN (Tdepth_t ) ** in_INSERT_RENAME_SELECT_DEPTH ;//[nb_inst_insert] public : SC_IN (Ttype_t ) ** in_INSERT_RENAME_SELECT_TYPE ;//[nb_inst_insert] public : SC_IN (Toperation_t ) ** in_INSERT_RENAME_SELECT_OPERATION ;//[nb_inst_insert] @@ -92,4 +93,5 @@ public : SC_OUT(Tcontext_t ) ** out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID ;//[nb_inst_insert] public : SC_OUT(Tcontext_t ) ** out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID ;//[nb_inst_insert] + public : SC_OUT(Tdepth_t ) ** out_INSERT_REGISTER_TRANSLATION_DEPTH ;//[nb_inst_insert] public : SC_IN (Tspecial_address_t) ** in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Parameters.cpp (revision 139) @@ -19,13 +19,14 @@ #undef FUNCTION #define FUNCTION "Rename_unit_Glue::Parameters" - Parameters::Parameters (uint32_t nb_front_end , - uint32_t * nb_context , -// uint32_t size_front_end_id , -// uint32_t size_context_id , - uint32_t nb_inst_insert , - uint32_t nb_inst_retire , - uint32_t size_general_data , - uint32_t size_special_register , - bool is_toplevel + Parameters::Parameters (uint32_t nb_front_end , + uint32_t * nb_context , +// uint32_t size_front_end_id , +// uint32_t size_context_id , + uint32_t nb_inst_insert , + uint32_t nb_inst_retire , + uint32_t size_general_data , + uint32_t size_special_register , + Trat_scheme_t rat_scheme , + bool is_toplevel ) { @@ -36,4 +37,5 @@ _nb_inst_insert = nb_inst_insert; _nb_inst_retire = nb_inst_retire; + _rat_scheme = rat_scheme ; test(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp (revision 139) @@ -163,4 +163,6 @@ if (_param->_have_port_context_id) sensitive << (*(in_INSERT_RENAME_SELECT_CONTEXT_ID [i])); + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + sensitive << (*(in_INSERT_RENAME_SELECT_DEPTH [i])); sensitive << (*(in_INSERT_RENAME_SELECT_TYPE [i])) << (*(in_INSERT_RENAME_SELECT_OPERATION [i])) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp (revision 139) @@ -61,38 +61,41 @@ ALLOC1_INTERFACE_BEGIN("insert",OUT,NORTH,_("Insert interface"),_param->_nb_inst_insert); -// ALLOC1_SIGNAL_OUT(out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1); -// ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_INSERT_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); - ALLOC1_SIGNAL_OUT(out_INSERT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); - ALLOC1_SIGNAL_OUT(out_INSERT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); - ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); - ALLOC1_SIGNAL_OUT(out_INSERT_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); -// ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION_USE ,"EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use); - ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception); - ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW ,"NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register); - ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1); - - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_VAL ,"RENAME_SELECT_VAL" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_INSERT_RENAME_SELECT_ACK ,"RENAME_SELECT_ACK" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_FRONT_END_ID ,"RENAME_SELECT_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_CONTEXT_ID ,"RENAME_SELECT_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_TYPE ,"RENAME_SELECT_TYPE" ,Ttype_t ,_param->_size_type); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_OPERATION ,"RENAME_SELECT_OPERATION" ,Toperation_t ,_param->_size_operation); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_IMMEDIAT ,"RENAME_SELECT_IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); -// ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,"RENAME_SELECT_EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION ,"RENAME_SELECT_EXCEPTION" ,Texception_t ,_param->_size_exception); - ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_NO_EXECUTE ,"RENAME_SELECT_NO_EXECUTE" ,Tcontrol_t ,1); - - ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_VAL ,"REGISTER_TRANSLATION_VAL" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_ACK ,"REGISTER_TRANSLATION_ACK" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID ,"REGISTER_TRANSLATION_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); - ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID ,"REGISTER_TRANSLATION_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); - ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,"REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_size_special_register); - ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL ,"LOAD_STORE_QUEUE_POINTER_VAL" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_IN ( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK ,"LOAD_STORE_QUEUE_POINTER_ACK" ,Tcontrol_t ,1); - ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID ,"LOAD_STORE_QUEUE_POINTER_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); - ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID ,"LOAD_STORE_QUEUE_POINTER_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); - ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE ,"LOAD_STORE_QUEUE_POINTER_TYPE" ,Ttype_t ,_param->_size_type); - ALLOC1_SIGNAL_OUT(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION ,"LOAD_STORE_QUEUE_POINTER_OPERATION" ,Toperation_t ,_param->_size_operation); +// ALLOC1_SIGNAL_OUT (out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1); +// ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT (out_INSERT_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_OUT (out_INSERT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT_COND(out_INSERT_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + ALLOC1_SIGNAL_OUT (out_INSERT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_OUT (out_INSERT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); + ALLOC1_SIGNAL_OUT (out_INSERT_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); +// ALLOC1_SIGNAL_OUT (out_INSERT_EXCEPTION_USE ,"EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use); + ALLOC1_SIGNAL_OUT (out_INSERT_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception); + ALLOC1_SIGNAL_OUT (out_INSERT_NUM_REG_RE_PHY_NEW ,"NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_OUT (out_INSERT_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1); + + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_VAL ,"RENAME_SELECT_VAL" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT (out_INSERT_RENAME_SELECT_ACK ,"RENAME_SELECT_ACK" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_FRONT_END_ID ,"RENAME_SELECT_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_CONTEXT_ID ,"RENAME_SELECT_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_IN_COND ( in_INSERT_RENAME_SELECT_DEPTH ,"RENAME_SELECT_DEPTH" ,Tdepth_t ,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_TYPE ,"RENAME_SELECT_TYPE" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_OPERATION ,"RENAME_SELECT_OPERATION" ,Toperation_t ,_param->_size_operation); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_IMMEDIAT ,"RENAME_SELECT_IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); +// ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,"RENAME_SELECT_EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION ,"RENAME_SELECT_EXCEPTION" ,Texception_t ,_param->_size_exception); + ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_NO_EXECUTE ,"RENAME_SELECT_NO_EXECUTE" ,Tcontrol_t ,1); + + ALLOC1_SIGNAL_OUT (out_INSERT_REGISTER_TRANSLATION_VAL ,"REGISTER_TRANSLATION_VAL" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_ACK ,"REGISTER_TRANSLATION_ACK" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT (out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID ,"REGISTER_TRANSLATION_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_OUT (out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID ,"REGISTER_TRANSLATION_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT_COND(out_INSERT_REGISTER_TRANSLATION_DEPTH ,"REGISTER_TRANSLATION_DEPTH" ,Tdepth_t ,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,"REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_size_special_register); + ALLOC1_SIGNAL_OUT (out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL ,"LOAD_STORE_QUEUE_POINTER_VAL" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_IN ( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK ,"LOAD_STORE_QUEUE_POINTER_ACK" ,Tcontrol_t ,1); + ALLOC1_SIGNAL_OUT (out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID ,"LOAD_STORE_QUEUE_POINTER_FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id); + ALLOC1_SIGNAL_OUT (out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID ,"LOAD_STORE_QUEUE_POINTER_CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); + ALLOC1_SIGNAL_OUT (out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE ,"LOAD_STORE_QUEUE_POINTER_TYPE" ,Ttype_t ,_param->_size_type); + ALLOC1_SIGNAL_OUT (out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION ,"LOAD_STORE_QUEUE_POINTER_OPERATION" ,Toperation_t ,_param->_size_operation); ALLOC1_INTERFACE_END(_param->_nb_inst_insert); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp (revision 139) @@ -29,56 +29,59 @@ delete in_NRESET; -// DELETE1_SIGNAL(out_INSERT_VAL ,_param->_nb_inst_insert,1); -// DELETE1_SIGNAL( in_INSERT_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); - DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); - DELETE1_SIGNAL(out_INSERT_TYPE ,_param->_nb_inst_insert,_param->_size_type); - DELETE1_SIGNAL(out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); - DELETE1_SIGNAL(out_INSERT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data); -// DELETE1_SIGNAL(out_INSERT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use); - DELETE1_SIGNAL(out_INSERT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register); - DELETE1_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1); - - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_RENAME_SELECT_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_TYPE ,_param->_nb_inst_insert,_param->_size_type); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data); -// DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); - DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE ,_param->_nb_inst_insert,1); - - DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); - DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); - DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register); - DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_inst_insert,1); - DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); - DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); - DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE ,_param->_nb_inst_insert,_param->_size_type); - DELETE1_SIGNAL(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); - - DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_inst_retire,1); -// DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE ,_param->_nb_inst_retire,_param->_size_type); -// DELETE1_SIGNAL(out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION ,_param->_nb_inst_retire,_param->_size_operation); - DELETE1_SIGNAL(out_RETIRE_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_retire,1); - DELETE1_SIGNAL( in_RETIRE_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_retire,1); - - DELETE2_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_REGISTER_TRANSLATION_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_REGISTER_TRANSLATION_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); - - DELETE2_SIGNAL( in_SPR_READ_SR ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr); +// DELETE1_SIGNAL (out_INSERT_VAL ,_param->_nb_inst_insert,1); +// DELETE1_SIGNAL ( in_INSERT_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); + DELETE1_SIGNAL (out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); + DELETE1_SIGNAL_COND(out_INSERT_DEPTH ,_param->_nb_inst_insert,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE1_SIGNAL (out_INSERT_TYPE ,_param->_nb_inst_insert,_param->_size_type); + DELETE1_SIGNAL (out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); + DELETE1_SIGNAL (out_INSERT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data); +// DELETE1_SIGNAL (out_INSERT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use); + DELETE1_SIGNAL (out_INSERT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register); + DELETE1_SIGNAL (out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1); + + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_INSERT_RENAME_SELECT_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); + DELETE1_SIGNAL_COND( in_INSERT_RENAME_SELECT_DEPTH ,_param->_nb_inst_insert,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_TYPE ,_param->_nb_inst_insert,_param->_size_type); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data); +// DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); + DELETE1_SIGNAL ( in_INSERT_RENAME_SELECT_NO_EXECUTE ,_param->_nb_inst_insert,1); + + DELETE1_SIGNAL (out_INSERT_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_INSERT_REGISTER_TRANSLATION_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); + DELETE1_SIGNAL (out_INSERT_REGISTER_TRANSLATION_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); + DELETE1_SIGNAL_COND(out_INSERT_REGISTER_TRANSLATION_DEPTH ,_param->_nb_inst_insert,_param->_size_depth,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE1_SIGNAL ( in_INSERT_REGISTER_TRANSLATION_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register); + DELETE1_SIGNAL (out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL ( in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_inst_insert,1); + DELETE1_SIGNAL (out_INSERT_LOAD_STORE_QUEUE_POINTER_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id); + DELETE1_SIGNAL (out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id); + DELETE1_SIGNAL (out_INSERT_LOAD_STORE_QUEUE_POINTER_TYPE ,_param->_nb_inst_insert,_param->_size_type); + DELETE1_SIGNAL (out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION ,_param->_nb_inst_insert,_param->_size_operation); + + DELETE1_SIGNAL ( in_RETIRE_VAL ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL (out_RETIRE_ACK ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL (out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_inst_retire,1); +// DELETE1_SIGNAL (out_RETIRE_LOAD_STORE_QUEUE_POINTER_TYPE ,_param->_nb_inst_retire,_param->_size_type); +// DELETE1_SIGNAL (out_RETIRE_LOAD_STORE_QUEUE_POINTER_OPERATION ,_param->_nb_inst_retire,_param->_size_operation); + DELETE1_SIGNAL (out_RETIRE_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_retire,1); + + DELETE2_SIGNAL ( in_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_LOAD_STORE_QUEUE_POINTER_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_LOAD_STORE_QUEUE_POINTER_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_REGISTER_TRANSLATION_VAL ,_param->_nb_front_end,_param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_REGISTER_TRANSLATION_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); + + DELETE2_SIGNAL ( in_SPR_READ_SR ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_spr); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp (revision 139) @@ -32,4 +32,5 @@ Tcontext_t FRONT_END_ID = (_param->_have_port_front_end_id)?PORT_READ(in_INSERT_RENAME_SELECT_FRONT_END_ID [i]):0; Tcontext_t CONTEXT_ID = (_param->_have_port_context_id )?PORT_READ(in_INSERT_RENAME_SELECT_CONTEXT_ID [i]):0; + Tdepth_t DEPTH = ((_param->_rat_scheme == RAT_DEPTH_SAVE) and _param->_have_port_depth)?PORT_READ(in_INSERT_RENAME_SELECT_DEPTH [i]):0; Ttype_t TYPE = PORT_READ(in_INSERT_RENAME_SELECT_TYPE [i]); Toperation_t OPERATION = PORT_READ(in_INSERT_RENAME_SELECT_OPERATION [i]); @@ -97,4 +98,9 @@ PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_CONTEXT_ID [i],CONTEXT_ID ); } + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + { + PORT_WRITE(out_INSERT_DEPTH [i],DEPTH ); + PORT_WRITE(out_INSERT_REGISTER_TRANSLATION_DEPTH [i],DEPTH ); + } PORT_WRITE(out_INSERT_TYPE [i],TYPE ); PORT_WRITE(out_INSERT_OPERATION [i],OPERATION ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h (revision 139) @@ -45,8 +45,10 @@ public : uint32_t _nb_general_register ; public : uint32_t _nb_special_register ; + public : Trat_scheme_t _rat_scheme ; public : uint32_t _nb_reg_free ; public : uint32_t _nb_bank ; -// public : uint32_t _size_read_counter ; - +//public : uint32_t _size_read_counter ; + public : uint32_t ** _nb_branch_speculated ;//[nb_front_end][nb_context] + //public : uint32_t _size_front_end_id ; //public : uint32_t _size_context_id ; @@ -85,7 +87,9 @@ uint32_t nb_general_register , uint32_t nb_special_register , + Trat_scheme_t rat_scheme , uint32_t nb_reg_free , uint32_t nb_bank , // uint32_t size_read_counter , + uint32_t ** nb_branch_speculated ,//[nb_front_end][nb_context] bool is_toplevel=false ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h (revision 139) @@ -83,4 +83,5 @@ public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_LAST_EVENT ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_SAVE_RAT ;//[nb_front_end][nb_inst_decod] #ifdef DEBUG public : SC_IN (Taddress_t ) *** in_RENAME_IN_ADDRESS ;//[nb_front_end][nb_inst_decod] @@ -163,10 +164,10 @@ public : SC_IN (Tlsq_ptr_t ) ** in_RETIRE_STORE_QUEUE_PTR_WRITE;//[nb_inst_retire] public : SC_IN (Tlsq_ptr_t ) ** in_RETIRE_LOAD_QUEUE_PTR_WRITE ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] -// public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] -// public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] -// public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] -// public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] +//public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] +//public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] +//public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] +//public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RD_LOG ;//[nb_inst_retire] @@ -177,4 +178,7 @@ public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_OLD ;//[nb_inst_retire] public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RE_PHY_NEW ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE_RD_PHY_OLD ;//[nb_inst_retire] + public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE_RE_PHY_OLD ;//[nb_inst_retire] // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -184,4 +188,6 @@ //public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context] public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_STOP ;//[nb_front_end][nb_context] + public : SC_IN (Tevent_type_t ) *** in_RETIRE_EVENT_TYPE ;//[nb_front_end][nb_context] + public : SC_IN (Tdepth_t ) *** in_RETIRE_EVENT_DEPTH ;//[nb_front_end][nb_context] // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp (revision 139) @@ -36,7 +36,9 @@ uint32_t nb_general_register , uint32_t nb_special_register , + Trat_scheme_t rat_scheme , uint32_t nb_reg_free , uint32_t nb_bank , // uint32_t size_read_counter , + uint32_t ** nb_branch_speculated ,//[nb_front_end][nb_context] bool is_toplevel) { @@ -59,8 +61,10 @@ _nb_general_register = nb_general_register ; _nb_special_register = nb_special_register ; + _rat_scheme = rat_scheme ; _nb_reg_free = nb_reg_free ; _nb_bank = nb_bank ; -// _size_read_counter = size_read_counter ; - +// _size_read_counter = size_read_counter ; + _nb_branch_speculated = nb_branch_speculated ; + uint32_t size_special_register = log2(_nb_special_register); @@ -88,9 +92,11 @@ _nb_general_register , _nb_special_register , + _rat_scheme , _nb_inst_insert , _nb_inst_retire , _nb_reg_free , - _nb_bank // , -// _size_read_counter + _nb_bank , +// _size_read_counter , + _nb_branch_speculated ); @@ -117,5 +123,6 @@ _nb_inst_retire , _size_general_data , - _size_special_register + _size_special_register, + _rat_scheme ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters_print.cpp (revision 139) @@ -58,4 +58,5 @@ xml.singleton_begin("link_load_store_unit_with_thread "); xml.attribut("value",toString(_link_load_store_unit_with_thread [i][j])); xml.singleton_end(); + xml.singleton_begin("nb_branch_speculated "); xml.attribut("value",toString(_nb_branch_speculated [i][j])); xml.singleton_end(); xml. balise_close(); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp (revision 139) @@ -74,4 +74,5 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_IN_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_IN_SAVE_RAT ,"save_rat" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); #ifdef DEBUG _ALLOC2_SIGNAL_IN ( in_RENAME_IN_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address , _param->_nb_front_end, _param->_nb_inst_decod[it1]); @@ -166,10 +167,10 @@ ALLOC1_SIGNAL_IN ( in_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); ALLOC1_SIGNAL_IN ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); -// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ); +// ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ); ALLOC1_SIGNAL_IN ( in_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic); @@ -180,4 +181,7 @@ ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ); ALLOC1_SIGNAL_IN ( in_RETIRE_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE ,"restore" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RD_PHY_OLD ,"restore_rd_phy_old" ,Tcontrol_t ,1 ); + ALLOC1_SIGNAL_IN ( in_RETIRE_RESTORE_RE_PHY_OLD ,"restore_re_phy_old" ,Tcontrol_t ,1 ); ALLOC1_INTERFACE_END(_param->_nb_inst_retire); @@ -188,9 +192,11 @@ ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); -// _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); - _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_VALACK_OUT (out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); +// _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); + _ALLOC2_SIGNAL_IN_COND ( in_RETIRE_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth , _param->_nb_front_end, _param->_nb_context[it1],_param->_rat_scheme == RAT_DEPTH_SAVE); ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); @@ -337,6 +343,8 @@ dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ); if (_param->_have_port_depth) + { PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH" , dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_DEPTH" ); + } #ifdef STATISTICS PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_INSTRUCTION" , @@ -355,4 +363,6 @@ PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT", dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT"); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_SAVE_RAT" , + dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_SAVE_RAT" ); #ifdef DEBUG PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_ADDRESS" , @@ -400,9 +410,10 @@ #endif + if (_param->_have_port_depth and (_param->_rat_scheme != RAT_DEPTH_SAVE)) + PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH", + dest,"out_INSERT_" +toString(i)+"_DEPTH"); PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_IS_DELAY_SLOT", dest,"out_INSERT_" +toString(i)+"_IS_DELAY_SLOT"); - if (_param->_have_port_depth) - PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_DEPTH" , - dest,"out_INSERT_" +toString(i)+"_DEPTH" ); + #ifdef STATISTICS PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_INSTRUCTION" , @@ -429,4 +440,6 @@ #endif + COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_SAVE_RAT" , + dest, "in_RENAME_" +toString(i)+"_SAVE_RAT" ); COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_READ_RA" , dest, "in_RENAME_" +toString(i)+"_READ_RA" ); @@ -467,4 +480,7 @@ COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+ "_CONTEXT_ID" , dest, "in_INSERT_" +toString(i)+"_RENAME_SELECT_CONTEXT_ID" ); + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+ "_DEPTH" , + dest, "in_INSERT_" +toString(i)+"_RENAME_SELECT_DEPTH" ); COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+ "_TYPE" , dest, "in_INSERT_" +toString(i)+"_RENAME_SELECT_TYPE" ); @@ -540,5 +556,9 @@ COMPONENT_MAP(_component,src , "in_RENAME_"+toString(i)+ "_CONTEXT_ID" , dest,"out_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_CONTEXT_ID" ); - + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + COMPONENT_MAP(_component,src , "in_RENAME_"+toString(i)+ "_DEPTH" , + dest,"out_INSERT_"+toString(i)+"_REGISTER_TRANSLATION_DEPTH" ); + + // in_RENAME_SAVE_RAS - rename_select // in_RENAME_READ_RA - rename_select // in_RENAME_NUM_REG_RA_LOG - rename_select @@ -662,4 +682,10 @@ PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW", dest, "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE" , + dest, "in_RETIRE_"+toString(i)+"_RESTORE" ); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD"); + PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD", + dest, "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD"); dest = _name+"_glue"; @@ -696,4 +722,13 @@ PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE", dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE"); + if (_param->_rat_scheme == RAT_DEPTH_SAVE) + { + PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_TYPE" , + dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_TYPE" ); + if (_param->_have_port_depth) + PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_DEPTH", + dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_DEPTH"); + } + } @@ -871,4 +906,7 @@ PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_CONTEXT_ID" , dest,"out_INSERT_"+toString(i)+"_CONTEXT_ID" ); + if (_param->_have_port_depth and (_param->_rat_scheme == RAT_DEPTH_SAVE)) + PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_DEPTH" , + dest,"out_INSERT_"+toString(i)+"_DEPTH" ); PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_TYPE" , dest,"out_INSERT_"+toString(i)+"_TYPE" ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp (revision 139) @@ -28,121 +28,127 @@ delete in_NRESET; - DELETE2_SIGNAL( in_RENAME_IN_VAL ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL(out_RENAME_IN_ACK ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_FRONT_END_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_front_end_id ); - DELETE2_SIGNAL( in_RENAME_IN_CONTEXT_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id ); - DELETE2_SIGNAL( in_RENAME_IN_DEPTH ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth ); -#ifdef STATISTICS - DELETE2_SIGNAL( in_RENAME_IN_INSTRUCTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],32); -#endif - DELETE2_SIGNAL( in_RENAME_IN_TYPE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type ); - DELETE2_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); - DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); -// DELETE2_SIGNAL( in_RENAME_IN_HAVE_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); -#ifdef DEBUG - DELETE2_SIGNAL( in_RENAME_IN_ADDRESS ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address ); -#endif - DELETE2_SIGNAL( in_RENAME_IN_ADDRESS_NEXT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address ); - DELETE2_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data ); - DELETE2_SIGNAL( in_RENAME_IN_READ_RA ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RA ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); - DELETE2_SIGNAL( in_RENAME_IN_READ_RB ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RB ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); - DELETE2_SIGNAL( in_RENAME_IN_READ_RC ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RC ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic); - DELETE2_SIGNAL( in_RENAME_IN_WRITE_RD ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RD ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); - DELETE2_SIGNAL( in_RENAME_IN_WRITE_RE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); - DELETE2_SIGNAL( in_RENAME_IN_NUM_REG_RE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic); - DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception_use ); - DELETE2_SIGNAL( in_RENAME_IN_EXCEPTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception ); + DELETE2_SIGNAL ( in_RENAME_IN_VAL ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL (out_RENAME_IN_ACK ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_FRONT_END_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_front_end_id ); + DELETE2_SIGNAL ( in_RENAME_IN_CONTEXT_ID ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_context_id ); + DELETE2_SIGNAL ( in_RENAME_IN_DEPTH ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_depth ); +#ifdef STATISTICS + DELETE2_SIGNAL ( in_RENAME_IN_INSTRUCTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],32); +#endif + DELETE2_SIGNAL ( in_RENAME_IN_TYPE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_type ); + DELETE2_SIGNAL ( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); + DELETE2_SIGNAL ( in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); +// DELETE2_SIGNAL ( in_RENAME_IN_HAVE_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_SAVE_RAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); +#ifdef DEBUG + DELETE2_SIGNAL ( in_RENAME_IN_ADDRESS ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address ); +#endif + DELETE2_SIGNAL ( in_RENAME_IN_ADDRESS_NEXT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_instruction_address ); + DELETE2_SIGNAL ( in_RENAME_IN_HAS_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_data ); + DELETE2_SIGNAL ( in_RENAME_IN_READ_RA ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_NUM_REG_RA ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); + DELETE2_SIGNAL ( in_RENAME_IN_READ_RB ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_NUM_REG_RB ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); + DELETE2_SIGNAL ( in_RENAME_IN_READ_RC ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_NUM_REG_RC ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic); + DELETE2_SIGNAL ( in_RENAME_IN_WRITE_RD ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_NUM_REG_RD ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_general_register_logic); + DELETE2_SIGNAL ( in_RENAME_IN_WRITE_RE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL ( in_RENAME_IN_NUM_REG_RE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_special_register_logic); + DELETE2_SIGNAL ( in_RENAME_IN_EXCEPTION_USE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception_use ); + DELETE2_SIGNAL ( in_RENAME_IN_EXCEPTION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_exception ); + + DELETE1_SIGNAL (out_INSERT_VAL ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL ( in_INSERT_ACK ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); + DELETE1_SIGNAL (out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); + DELETE1_SIGNAL (out_INSERT_DEPTH ,_param->_nb_inst_insert,_param->_size_depth ); +#ifdef STATISTICS + DELETE1_SIGNAL (out_INSERT_INSTRUCTION ,_param->_nb_inst_insert,32); +#endif + DELETE1_SIGNAL (out_INSERT_TYPE ,_param->_nb_inst_insert,_param->_size_type ); + DELETE1_SIGNAL (out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation ); + DELETE1_SIGNAL (out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_LAST_EVENT ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_IS_DELAY_SLOT ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_ADDRESS ,_param->_nb_inst_insert,_param->_size_instruction_address ); +#endif + DELETE1_SIGNAL (out_INSERT_ADDRESS_NEXT ,_param->_nb_inst_insert,_param->_size_instruction_address ); + DELETE1_SIGNAL (out_INSERT_HAS_IMMEDIAT ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data ); + DELETE1_SIGNAL (out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert,_param->_size_store_queue_ptr ); + DELETE1_SIGNAL (out_INSERT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_insert,_param->_size_store_queue_ptr ); + DELETE1_SIGNAL (out_INSERT_STORE_QUEUE_EMPTY ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert,_param->_size_load_queue_ptr ); + DELETE1_SIGNAL (out_INSERT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use ); + DELETE1_SIGNAL (out_INSERT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception ); + DELETE1_SIGNAL (out_INSERT_READ_RA ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_READ_RB ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_READ_RC ,_param->_nb_inst_insert,1 ); +#ifdef DEBUG + DELETE1_SIGNAL (out_INSERT_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); +#endif + DELETE1_SIGNAL (out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); + DELETE1_SIGNAL (out_INSERT_WRITE_RD ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); + DELETE1_SIGNAL (out_INSERT_WRITE_RE ,_param->_nb_inst_insert,1 ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert,_param->_size_special_register ); + DELETE1_SIGNAL (out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); + + DELETE1_SIGNAL ( in_RETIRE_VAL ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL (out_RETIRE_ACK ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id ); + DELETE1_SIGNAL ( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); +// DELETE1_SIGNAL ( in_RETIRE_TYPE ,_param->_nb_inst_retire,_param->_size_type ); +// DELETE1_SIGNAL ( in_RETIRE_OPERATION ,_param->_nb_inst_retire,_param->_size_operation ); + DELETE1_SIGNAL ( in_RETIRE_USE_STORE_QUEUE ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_USE_LOAD_QUEUE ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr ); + DELETE1_SIGNAL ( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire,_param->_size_load_queue_ptr ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RA ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RB ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); +// DELETE1_SIGNAL ( in_RETIRE_READ_RC ,_param->_nb_inst_retire,1 ); +// DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_retire,_param->_size_general_register ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_retire,_param->_size_general_register ); + DELETE1_SIGNAL ( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1 ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_retire,_param->_size_special_register ); + DELETE1_SIGNAL ( in_RETIRE_RESTORE ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_RESTORE_RD_PHY_OLD ,_param->_nb_inst_retire,1); + DELETE1_SIGNAL ( in_RETIRE_RESTORE_RE_PHY_OLD ,_param->_nb_inst_retire,1); + + DELETE2_SIGNAL ( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL (out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); +// DELETE2_SIGNAL ( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL ( in_RETIRE_EVENT_STOP ,_param->_nb_front_end, _param->_nb_context[it1],1); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_TYPE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_type,_param->_rat_scheme == RAT_DEPTH_SAVE); + DELETE2_SIGNAL_COND( in_RETIRE_EVENT_DEPTH ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth ,_param->_rat_scheme == RAT_DEPTH_SAVE); - DELETE1_SIGNAL(out_INSERT_VAL ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL( in_INSERT_ACK ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_FRONT_END_ID ,_param->_nb_inst_insert,_param->_size_front_end_id ); - DELETE1_SIGNAL(out_INSERT_CONTEXT_ID ,_param->_nb_inst_insert,_param->_size_context_id ); - DELETE1_SIGNAL(out_INSERT_DEPTH ,_param->_nb_inst_insert,_param->_size_depth ); -#ifdef STATISTICS - DELETE1_SIGNAL(out_INSERT_INSTRUCTION ,_param->_nb_inst_insert,32); -#endif - DELETE1_SIGNAL(out_INSERT_TYPE ,_param->_nb_inst_insert,_param->_size_type ); - DELETE1_SIGNAL(out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation ); - DELETE1_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_LAST_EVENT ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_IS_DELAY_SLOT ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_ADDRESS ,_param->_nb_inst_insert,_param->_size_instruction_address ); -#endif - DELETE1_SIGNAL(out_INSERT_ADDRESS_NEXT ,_param->_nb_inst_insert,_param->_size_instruction_address ); - DELETE1_SIGNAL(out_INSERT_HAS_IMMEDIAT ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_IMMEDIAT ,_param->_nb_inst_insert,_param->_size_general_data ); - DELETE1_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert,_param->_size_store_queue_ptr ); - DELETE1_SIGNAL(out_INSERT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_insert,_param->_size_store_queue_ptr ); - DELETE1_SIGNAL(out_INSERT_STORE_QUEUE_EMPTY ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert,_param->_size_load_queue_ptr ); - DELETE1_SIGNAL(out_INSERT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use ); - DELETE1_SIGNAL(out_INSERT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception ); - DELETE1_SIGNAL(out_INSERT_READ_RA ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_READ_RB ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_READ_RC ,_param->_nb_inst_insert,1 ); -#ifdef DEBUG - DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); -#endif - DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); - DELETE1_SIGNAL(out_INSERT_WRITE_RD ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); - DELETE1_SIGNAL(out_INSERT_WRITE_RE ,_param->_nb_inst_insert,1 ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert,_param->_size_special_register ); - DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); - - DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire,_param->_size_front_end_id ); - DELETE1_SIGNAL( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire,_param->_size_context_id ); -// DELETE1_SIGNAL( in_RETIRE_TYPE ,_param->_nb_inst_retire,_param->_size_type ); -// DELETE1_SIGNAL( in_RETIRE_OPERATION ,_param->_nb_inst_retire,_param->_size_operation ); - DELETE1_SIGNAL( in_RETIRE_USE_STORE_QUEUE ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_USE_LOAD_QUEUE ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr ); - DELETE1_SIGNAL( in_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire,_param->_size_load_queue_ptr ); -// DELETE1_SIGNAL( in_RETIRE_READ_RA ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); -// DELETE1_SIGNAL( in_RETIRE_READ_RB ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire,_param->_size_general_register ); -// DELETE1_SIGNAL( in_RETIRE_READ_RC ,_param->_nb_inst_retire,1 ); -// DELETE1_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire,_param->_size_special_register ); - DELETE1_SIGNAL( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire,_param->_size_general_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_retire,_param->_size_general_register ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_retire,_param->_size_general_register ); - DELETE1_SIGNAL( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire,1 ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire,_param->_size_special_register_logic); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_retire,_param->_size_special_register ); - DELETE1_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_retire,_param->_size_special_register ); - - DELETE2_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); -// DELETE2_SIGNAL( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1); - DELETE2_SIGNAL( in_RETIRE_EVENT_STOP ,_param->_nb_front_end, _param->_nb_context[it1],1); - - DELETE2_SIGNAL(in_SPR_READ_SR ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr); + DELETE2_SIGNAL (in_SPR_READ_SR ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr); #ifdef DEBUG_TEST - DELETE0_SIGNAL( in_INFO_ROB_EMPTY ,1); + DELETE0_SIGNAL ( in_INFO_ROB_EMPTY ,1); #endif } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h (revision 139) @@ -82,4 +82,5 @@ public : SC_IN (Tcontrol_t ) *** in_RENAME_LAST_EVENT ;//[nb_front_end][nb_inst_decod] public : SC_IN (Tcontrol_t ) *** in_RENAME_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] + public : SC_IN (Tcontrol_t ) *** in_RENAME_SAVE_RAT ;//[nb_front_end][nb_inst_decod] #ifdef DEBUG public : SC_IN (Taddress_t ) *** in_RENAME_ADDRESS ;//[nb_front_end][nb_inst_decod] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h (revision 139) @@ -64,6 +64,6 @@ public : Tpriority_t _issue_priority ; public : Tload_balancing_t _issue_load_balancing ; -// public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] -// public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] +//public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] +//public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] // Reexecute public : uint32_t _size_reexecute_queue ; @@ -74,7 +74,8 @@ public : uint32_t * _nb_general_register ;//[nb_rename_unit] public : uint32_t * _nb_special_register ;//[nb_rename_unit] + public : Trat_scheme_t * _rat_scheme ;//[nb_rename_unit] public : uint32_t * _nb_reg_free ;//[nb_rename_unit] public : uint32_t * _nb_rename_unit_bank ;//[nb_rename_unit] -// public : uint32_t * _size_read_counter ;//[nb_rename_unit] +//public : uint32_t * _size_read_counter ;//[nb_rename_unit] public : uint32_t * _nb_load_store_queue ;//[nb_rename_unit] public : uint32_t ** _size_store_queue ;//[nb_rename_unit][nb_load_store_queue] @@ -94,6 +95,8 @@ public : uint32_t ** _rename_unit_nb_inst_decod ;//[nb_rename_unit][nb_front_end] public : uint32_t *** _rename_unit_link_load_store_unit_with_thread ;//[nb_rename_unit][nb_front_end][nb_context] + public : uint32_t *** _rename_unit_nb_branch_speculated ;//[nb_rename_unit][nb_front_end][nb_context] public : uint32_t * _rename_unit_size_front_end_id ;//[nb_rename_unit] public : uint32_t * _rename_unit_size_context_id ;//[nb_rename_unit] + public : Trat_scheme_t * _commit_unit_rat_scheme ;//[nb_front_end] public : uint32_t _max_nb_context ; public : uint32_t _max_branch_speculated ; @@ -171,4 +174,5 @@ uint32_t * nb_general_register ,//[nb_rename_unit] uint32_t * nb_special_register ,//[nb_rename_unit] + Trat_scheme_t * rat_scheme ,//[nb_rename_unit] uint32_t * nb_reg_free ,//[nb_rename_unit] uint32_t * nb_rename_unit_bank ,//[nb_rename_unit] Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp (revision 139) @@ -1,2 +1,3 @@ + /* * $Id$ @@ -71,4 +72,5 @@ _ALLOC2_SIGNAL_IN ( in_RENAME_LAST_EVENT ,"LAST_EVENT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); + _ALLOC2_SIGNAL_IN ( in_RENAME_SAVE_RAT ,"SAVE_RAT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); #ifdef DEBUG _ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); @@ -458,4 +460,6 @@ PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT", dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT"); + PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_SAVE_RAT" , + dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_SAVE_RAT" ); #ifdef DEBUG PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS" , @@ -530,6 +534,6 @@ COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_IS_DELAY_SLOT" , dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" ); -// COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_HAVE_EVENT" , -// dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_HAVE_EVENT" ); +// COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_HAVE_EVENT" , +// dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_HAVE_EVENT" ); COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_LAST_EVENT" , dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_LAST_EVENT" ); @@ -682,4 +686,10 @@ COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_LOG" , dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG" ); + COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_RESTORE" , + dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RESTORE" ); + COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_RESTORE_RD_PHY_OLD" , + dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RESTORE_RD_PHY_OLD" ); + COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_RESTORE_RE_PHY_OLD" , + dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RESTORE_RE_PHY_OLD" ); } @@ -705,8 +715,15 @@ COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE", dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE"); -// COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_FLUSH", -// dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_FLUSH"); +// COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_FLUSH", +// dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_FLUSH"); COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STOP", dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STOP"); + if (_param->_rat_scheme[i] == RAT_DEPTH_SAVE) + { + COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_TYPE", + dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_TYPE"); + COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_DEPTH", + dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_DEPTH"); + } } x++; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp (revision 139) @@ -41,4 +41,5 @@ DELETE2_SIGNAL( in_RENAME_LAST_EVENT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); DELETE2_SIGNAL( in_RENAME_IS_DELAY_SLOT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); + DELETE2_SIGNAL( in_RENAME_SAVE_RAT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); #ifdef DEBUG DELETE2_SIGNAL( in_RENAME_ADDRESS ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_instruction_address ); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp (revision 139) @@ -8,4 +8,5 @@ #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h" #include "Common/include/Max.h" +#include "Behavioural/include/Allocation.h" namespace morpheo { @@ -61,4 +62,5 @@ uint32_t * nb_general_register ,//[nb_rename_unit] uint32_t * nb_special_register ,//[nb_rename_unit] + Trat_scheme_t * rat_scheme ,//[nb_rename_unit] uint32_t * nb_reg_free ,//[nb_rename_unit] uint32_t * nb_rename_unit_bank ,//[nb_rename_unit] @@ -108,6 +110,6 @@ _issue_priority = issue_priority ; _issue_load_balancing = issue_load_balancing ; -// _table_routing = table_routing ; -// _table_issue_type = table_issue_type ; +// _table_routing = table_routing ; +// _table_issue_type = table_issue_type ; _size_reexecute_queue = size_reexecute_queue ; _rename_select_priority = rename_select_priority ; @@ -116,7 +118,8 @@ _nb_general_register = nb_general_register ; _nb_special_register = nb_special_register ; + _rat_scheme = rat_scheme ; _nb_reg_free = nb_reg_free ; _nb_rename_unit_bank = nb_rename_unit_bank ; -// _size_read_counter = size_read_counter ; +// _size_read_counter = size_read_counter ; _nb_load_store_queue = nb_load_store_queue ; _size_store_queue = size_store_queue ; @@ -147,4 +150,5 @@ _rename_unit_nb_inst_decod = new uint32_t * [_nb_rename_unit]; _rename_unit_link_load_store_unit_with_thread = new uint32_t ** [_nb_rename_unit]; + _rename_unit_nb_branch_speculated = new uint32_t ** [_nb_rename_unit]; for (uint32_t i=0; i<_nb_rename_unit; i++) @@ -156,4 +160,5 @@ _rename_unit_nb_inst_decod [i] = new uint32_t [x]; _rename_unit_link_load_store_unit_with_thread [i] = new uint32_t * [x]; + _rename_unit_nb_branch_speculated [i] = new uint32_t * [x]; // Scan front_end list @@ -164,7 +169,11 @@ _rename_unit_nb_inst_decod [i][j] = _nb_inst_decod [*it]; _rename_unit_link_load_store_unit_with_thread [i][j] = new uint32_t [_nb_context [*it]]; - + _rename_unit_nb_branch_speculated [i][j] = new uint32_t [_nb_context [*it]]; + for (uint32_t k=0; k<_nb_context [*it]; k++) - _rename_unit_link_load_store_unit_with_thread [i][j][k] = _link_load_store_unit_with_thread [*it][k]; + { + _rename_unit_link_load_store_unit_with_thread [i][j][k] = _link_load_store_unit_with_thread [*it][k]; + _rename_unit_nb_branch_speculated [i][j][k] = _nb_branch_speculated [*it][k]; + } ++it; @@ -188,4 +197,9 @@ } } + + ALLOC1(_commit_unit_rat_scheme,Trat_scheme_t,_nb_front_end); + + for (uint32_t num_front_end=0; num_front_end<_nb_front_end; ++num_front_end) + _commit_unit_rat_scheme [num_front_end] = rat_scheme [_link_rename_unit_with_front_end [num_front_end]]; _max_nb_context = max(_nb_context,_nb_front_end); @@ -242,8 +256,9 @@ _nb_general_register [i], _nb_special_register [i], + _rat_scheme [i], _nb_reg_free [i], - _nb_rename_unit_bank [i]// , -// _size_read_counter [i] - + _nb_rename_unit_bank [i], +// _size_read_counter [i] + _rename_unit_nb_branch_speculated [i] ); @@ -268,4 +283,5 @@ size_general_register , size_special_register , + _commit_unit_rat_scheme , _issue_priority , _issue_load_balancing , @@ -396,6 +412,8 @@ { for (uint32_t j=0; j<_nb_front_end; j++) + delete [] _rename_unit_nb_branch_speculated [i][j]; + delete [] _rename_unit_nb_branch_speculated [i]; + for (uint32_t j=0; j<_nb_front_end; j++) delete [] _rename_unit_link_load_store_unit_with_thread [i][j]; - delete [] _rename_unit_link_load_store_unit_with_thread [i]; delete [] _rename_unit_nb_inst_decod [i]; @@ -403,4 +421,5 @@ } + delete [] _rename_unit_nb_branch_speculated ; delete [] _rename_unit_link_load_store_unit_with_thread; delete [] _rename_unit_nb_inst_decod ; @@ -410,4 +429,6 @@ delete [] _rename_unit_size_context_id ; delete [] _link_front_end_with_rename_unit ; + + DELETE1(_commit_unit_rat_scheme,_nb_front_end); for (uint32_t i=0; i<_nb_rename_unit; i++) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp (revision 139) @@ -76,4 +76,6 @@ str+= toString(MSG_INFORMATION)+" * nb_special_register ["+toString(i)+"] : "+toString(_nb_special_register [i])+"\n";//[nb_rename_unit] for (uint32_t i=0; i<_nb_rename_unit; ++i) + str+= toString(MSG_INFORMATION)+" * rat_scheme ["+toString(i)+"] : "+toString(_rat_scheme [i])+"\n";//[nb_rename_unit] + for (uint32_t i=0; i<_nb_rename_unit; ++i) str+= toString(MSG_INFORMATION)+" * nb_reg_free ["+toString(i)+"] : "+toString(_nb_reg_free [i])+"\n";//[nb_rename_unit] for (uint32_t i=0; i<_nb_rename_unit; ++i) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h (revision 139) @@ -68,4 +68,5 @@ public : uint32_t * _nb_general_register ;//[nb_rename_bloc] public : uint32_t * _nb_special_register ;//[nb_rename_bloc] + public : Trat_scheme_t * _rat_scheme ;//[nb_rename_bloc] public : uint32_t * _nb_reg_free ;//[nb_rename_bloc] public : uint32_t * _nb_rename_unit_bank ;//[nb_rename_bloc] @@ -261,4 +262,5 @@ public : uint32_t ** _ooo_engine_nb_general_register ;//[nb_ooo_engine][nb_rename_unit] public : uint32_t ** _ooo_engine_nb_special_register ;//[nb_ooo_engine][nb_rename_unit] + public : Trat_scheme_t ** _ooo_engine_rat_scheme ;//[nb_ooo_engine][nb_rename_unit] public : uint32_t ** _ooo_engine_nb_reg_free ;//[nb_ooo_engine][nb_rename_unit] public : uint32_t ** _ooo_engine_nb_rename_unit_bank ;//[nb_ooo_engine][nb_rename_unit] @@ -405,7 +407,8 @@ uint32_t * nb_general_register ,//[nb_rename_bloc] uint32_t * nb_special_register ,//[nb_rename_bloc] + Trat_scheme_t * rat_scheme ,//[nb_rename_bloc] uint32_t * nb_reg_free ,//[nb_rename_bloc] uint32_t * nb_rename_unit_bank ,//[nb_rename_bloc] -// uint32_t * size_read_counter ,//[nb_rename_bloc] +//uint32_t * size_read_counter ,//[nb_rename_bloc] // Read bloc Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp (revision 139) @@ -298,4 +298,5 @@ // out_DECOD_NO_EXECUTE - ooo_engine. in_RENAME_NO_EXECUTE // out_DECOD_IS_DELAY_SLOT - ooo_engine. in_RENAME_IS_DELAY_SLOT + // out_DECOD_SAVE_RAT - ooo_engine. in_RENAME_SAVE_RAT // out_DECOD_ADDRESS - ooo_engine. in_RENAME_ADDRESS // out_DECOD_ADDRESS_NEXT - ooo_engine. in_RENAME_ADDRESS_NEXT @@ -478,4 +479,6 @@ COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT", dest,"out_DECOD_" +toString(k)+"_IS_DELAY_SLOT"); + COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_SAVE_RAT" , + dest,"out_DECOD_" +toString(k)+"_SAVE_RAT" ); #ifdef DEBUG COMPONENT_MAP(_component,src , "in_RENAME_"+toString(j)+"_"+toString(k)+"_ADDRESS" , Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp (revision 139) @@ -117,4 +117,5 @@ uint32_t * nb_general_register ,//[nb_rename_bloc] uint32_t * nb_special_register ,//[nb_rename_bloc] + Trat_scheme_t * rat_scheme ,//[nb_rename_bloc] uint32_t * nb_reg_free ,//[nb_rename_bloc] uint32_t * nb_rename_unit_bank ,//[nb_rename_bloc] @@ -281,7 +282,8 @@ _nb_general_register = nb_general_register ; _nb_special_register = nb_special_register ; + _rat_scheme = rat_scheme ; _nb_reg_free = nb_reg_free ; _nb_rename_unit_bank = nb_rename_unit_bank ; -// _size_read_counter = size_read_counter ; +// _size_read_counter = size_read_counter ; _nb_read_bloc = nb_read_bloc ; @@ -1059,4 +1061,5 @@ ALLOC2(_ooo_engine_nb_general_register ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); ALLOC2(_ooo_engine_nb_special_register ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); + ALLOC2(_ooo_engine_rat_scheme ,Trat_scheme_t ,_nb_ooo_engine,_nb_rename_unit[it1]); ALLOC2(_ooo_engine_nb_reg_free ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); ALLOC2(_ooo_engine_nb_rename_unit_bank ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); @@ -1082,4 +1085,5 @@ _ooo_engine_nb_general_register [i][j] = _nb_general_register [num_rename_bloc]; _ooo_engine_nb_special_register [i][j] = _nb_special_register [num_rename_bloc]; + _ooo_engine_rat_scheme [i][j] = _rat_scheme [num_rename_bloc]; _ooo_engine_nb_reg_free [i][j] = _nb_reg_free [num_rename_bloc]; _ooo_engine_nb_rename_unit_bank [i][j] = _nb_rename_unit_bank [num_rename_bloc]; @@ -2155,6 +2159,6 @@ _issue_priority [i], _issue_load_balancing [i], -// _ooo_engine_table_routing [i], -// _ooo_engine_table_issue_type [i], +// _ooo_engine_table_routing [i], +// _ooo_engine_table_issue_type [i], _size_reexecute_queue [i], _ooo_engine_rename_select_priority [i], @@ -2163,4 +2167,5 @@ _ooo_engine_nb_general_register [i], _ooo_engine_nb_special_register [i], + _ooo_engine_rat_scheme [i], _ooo_engine_nb_reg_free [i], _ooo_engine_nb_rename_unit_bank [i], @@ -2430,4 +2435,5 @@ DELETE2(_ooo_engine_nb_rename_unit_bank ,_nb_ooo_engine,_nb_rename_unit[it1]); DELETE2(_ooo_engine_nb_reg_free ,_nb_ooo_engine,_nb_rename_unit[it1]); + DELETE2(_ooo_engine_rat_scheme ,_nb_ooo_engine,_nb_rename_unit[it1]); DELETE2(_ooo_engine_nb_special_register ,_nb_ooo_engine,_nb_rename_unit[it1]); DELETE2(_ooo_engine_nb_general_register ,_nb_ooo_engine,_nb_rename_unit[it1]); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp (revision 139) @@ -81,4 +81,5 @@ str+= toString(MSG_INFORMATION)+" * nb_general_register : "+toString(_nb_general_register [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_special_register : "+toString(_nb_special_register [i])+"\n"; + str+= toString(MSG_INFORMATION)+" * rat_scheme : "+toString(_rat_scheme [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_reg_free : "+toString(_nb_reg_free [i])+"\n"; str+= toString(MSG_INFORMATION)+" * nb_rename_unit_bank : "+toString(_nb_rename_unit_bank [i])+"\n"; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info (revision 139) @@ -5,7 +5,2 @@ target_dep RegisterFile_Monolithic_0.prj RegisterFile_Monolithic_0_Pack.vhdl RegisterFile_Monolithic_0.vhdl -# RegisterFile_Monolithic_1 -target_dep all RegisterFile_Monolithic_1.ngc -target_dep RegisterFile_Monolithic_1.ngc RegisterFile_Monolithic_1.prj -target_dep RegisterFile_Monolithic_1.prj RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl - Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/mkf.info (revision 139) @@ -1,61 +1,11 @@ -# RegisterFile_Multi_Banked_00 -target_dep all RegisterFile_Multi_Banked_00.ngc -target_dep RegisterFile_Multi_Banked_00.ngc RegisterFile_Multi_Banked_00.prj -target_dep RegisterFile_Multi_Banked_00.prj RegisterFile_Multi_Banked_00_bank_Pack.vhdl RegisterFile_Multi_Banked_00_bank.vhdl RegisterFile_Multi_Banked_00_Pack.vhdl RegisterFile_Multi_Banked_00_select_3_ports_Pack.vhdl RegisterFile_Multi_Banked_00_select_3_ports.vhdl RegisterFile_Multi_Banked_00.vhdl +# RegisterFile_Multi_Banked_0 +target_dep all RegisterFile_Multi_Banked_0.ngc +target_dep RegisterFile_Multi_Banked_0.ngc RegisterFile_Multi_Banked_0.prj +target_dep RegisterFile_Multi_Banked_0.prj RegisterFile_Multi_Banked_0_bank_Pack.vhdl RegisterFile_Multi_Banked_0_bank.vhdl RegisterFile_Multi_Banked_0_Pack.vhdl RegisterFile_Multi_Banked_0_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_0_select_1_ports.vhdl RegisterFile_Multi_Banked_0_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_0_select_2_ports.vhdl RegisterFile_Multi_Banked_0.vhdl -# RegisterFile_Multi_Banked_01 -target_dep all RegisterFile_Multi_Banked_01.ngc -target_dep RegisterFile_Multi_Banked_01.ngc RegisterFile_Multi_Banked_01.prj -target_dep RegisterFile_Multi_Banked_01.prj RegisterFile_Multi_Banked_01_bank_Pack.vhdl RegisterFile_Multi_Banked_01_bank.vhdl RegisterFile_Multi_Banked_01_Pack.vhdl RegisterFile_Multi_Banked_01_select_3_ports_Pack.vhdl RegisterFile_Multi_Banked_01_select_3_ports.vhdl RegisterFile_Multi_Banked_01.vhdl +# RegisterFile_Multi_Banked_1 +target_dep all RegisterFile_Multi_Banked_1.ngc +target_dep RegisterFile_Multi_Banked_1.ngc RegisterFile_Multi_Banked_1.prj +target_dep RegisterFile_Multi_Banked_1.prj RegisterFile_Multi_Banked_1_bank_Pack.vhdl RegisterFile_Multi_Banked_1_bank.vhdl RegisterFile_Multi_Banked_1_Pack.vhdl RegisterFile_Multi_Banked_1_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_1_select_1_ports.vhdl RegisterFile_Multi_Banked_1_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_1_select_2_ports.vhdl RegisterFile_Multi_Banked_1.vhdl -# RegisterFile_Multi_Banked_02 -target_dep all RegisterFile_Multi_Banked_02.ngc -target_dep RegisterFile_Multi_Banked_02.ngc RegisterFile_Multi_Banked_02.prj -target_dep RegisterFile_Multi_Banked_02.prj RegisterFile_Multi_Banked_02_bank_Pack.vhdl RegisterFile_Multi_Banked_02_bank.vhdl RegisterFile_Multi_Banked_02_Pack.vhdl RegisterFile_Multi_Banked_02_select_4_ports_Pack.vhdl RegisterFile_Multi_Banked_02_select_4_ports.vhdl RegisterFile_Multi_Banked_02.vhdl - -# RegisterFile_Multi_Banked_03 -target_dep all RegisterFile_Multi_Banked_03.ngc -target_dep RegisterFile_Multi_Banked_03.ngc RegisterFile_Multi_Banked_03.prj -target_dep RegisterFile_Multi_Banked_03.prj RegisterFile_Multi_Banked_03_bank_Pack.vhdl RegisterFile_Multi_Banked_03_bank.vhdl RegisterFile_Multi_Banked_03_Pack.vhdl RegisterFile_Multi_Banked_03_select_4_ports_Pack.vhdl RegisterFile_Multi_Banked_03_select_4_ports.vhdl RegisterFile_Multi_Banked_03.vhdl - -# RegisterFile_Multi_Banked_04 -target_dep all RegisterFile_Multi_Banked_04.ngc -target_dep RegisterFile_Multi_Banked_04.ngc RegisterFile_Multi_Banked_04.prj -target_dep RegisterFile_Multi_Banked_04.prj RegisterFile_Multi_Banked_04_bank_Pack.vhdl RegisterFile_Multi_Banked_04_bank.vhdl RegisterFile_Multi_Banked_04_Pack.vhdl RegisterFile_Multi_Banked_04_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_04_select_6_ports.vhdl RegisterFile_Multi_Banked_04.vhdl - -# RegisterFile_Multi_Banked_05 -target_dep all RegisterFile_Multi_Banked_05.ngc -target_dep RegisterFile_Multi_Banked_05.ngc RegisterFile_Multi_Banked_05.prj -target_dep RegisterFile_Multi_Banked_05.prj RegisterFile_Multi_Banked_05_bank_Pack.vhdl RegisterFile_Multi_Banked_05_bank.vhdl RegisterFile_Multi_Banked_05_Pack.vhdl RegisterFile_Multi_Banked_05_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_05_select_2_ports.vhdl RegisterFile_Multi_Banked_05.vhdl - -# RegisterFile_Multi_Banked_06 -target_dep all RegisterFile_Multi_Banked_06.ngc -target_dep RegisterFile_Multi_Banked_06.ngc RegisterFile_Multi_Banked_06.prj -target_dep RegisterFile_Multi_Banked_06.prj RegisterFile_Multi_Banked_06_bank_Pack.vhdl RegisterFile_Multi_Banked_06_bank.vhdl RegisterFile_Multi_Banked_06_Pack.vhdl RegisterFile_Multi_Banked_06_select_6_ports_Pack.vhdl RegisterFile_Multi_Banked_06_select_6_ports.vhdl RegisterFile_Multi_Banked_06.vhdl - -# RegisterFile_Multi_Banked_07 -target_dep all RegisterFile_Multi_Banked_07.ngc -target_dep RegisterFile_Multi_Banked_07.ngc RegisterFile_Multi_Banked_07.prj -target_dep RegisterFile_Multi_Banked_07.prj RegisterFile_Multi_Banked_07_bank_Pack.vhdl RegisterFile_Multi_Banked_07_bank.vhdl RegisterFile_Multi_Banked_07_Pack.vhdl RegisterFile_Multi_Banked_07_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_07_select_1_ports.vhdl RegisterFile_Multi_Banked_07_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_07_select_2_ports.vhdl RegisterFile_Multi_Banked_07.vhdl - -# RegisterFile_Multi_Banked_08 -target_dep all RegisterFile_Multi_Banked_08.ngc -target_dep RegisterFile_Multi_Banked_08.ngc RegisterFile_Multi_Banked_08.prj -target_dep RegisterFile_Multi_Banked_08.prj RegisterFile_Multi_Banked_08_bank_Pack.vhdl RegisterFile_Multi_Banked_08_bank.vhdl RegisterFile_Multi_Banked_08_Pack.vhdl RegisterFile_Multi_Banked_08_select_11_ports_Pack.vhdl RegisterFile_Multi_Banked_08_select_11_ports.vhdl RegisterFile_Multi_Banked_08_select_22_ports_Pack.vhdl RegisterFile_Multi_Banked_08_select_22_ports.vhdl RegisterFile_Multi_Banked_08.vhdl - -# RegisterFile_Multi_Banked_09 -target_dep all RegisterFile_Multi_Banked_09.ngc -target_dep RegisterFile_Multi_Banked_09.ngc RegisterFile_Multi_Banked_09.prj -target_dep RegisterFile_Multi_Banked_09.prj RegisterFile_Multi_Banked_09_bank_Pack.vhdl RegisterFile_Multi_Banked_09_bank.vhdl RegisterFile_Multi_Banked_09_Pack.vhdl RegisterFile_Multi_Banked_09_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_09_select_2_ports.vhdl RegisterFile_Multi_Banked_09_select_3_ports_Pack.vhdl RegisterFile_Multi_Banked_09_select_3_ports.vhdl RegisterFile_Multi_Banked_09_select_4_ports_Pack.vhdl RegisterFile_Multi_Banked_09_select_4_ports.vhdl RegisterFile_Multi_Banked_09.vhdl - -# RegisterFile_Multi_Banked_10 -target_dep all RegisterFile_Multi_Banked_10.ngc -target_dep RegisterFile_Multi_Banked_10.ngc RegisterFile_Multi_Banked_10.prj -target_dep RegisterFile_Multi_Banked_10.prj RegisterFile_Multi_Banked_10_bank_Pack.vhdl RegisterFile_Multi_Banked_10_bank.vhdl RegisterFile_Multi_Banked_10_Pack.vhdl RegisterFile_Multi_Banked_10_select_11_ports_Pack.vhdl RegisterFile_Multi_Banked_10_select_11_ports.vhdl RegisterFile_Multi_Banked_10.vhdl - -# RegisterFile_Multi_Banked_11 -target_dep all RegisterFile_Multi_Banked_11.ngc -target_dep RegisterFile_Multi_Banked_11.ngc RegisterFile_Multi_Banked_11.prj -target_dep RegisterFile_Multi_Banked_11.prj RegisterFile_Multi_Banked_11_bank_Pack.vhdl RegisterFile_Multi_Banked_11_bank.vhdl RegisterFile_Multi_Banked_11_Pack.vhdl RegisterFile_Multi_Banked_11_select_1_ports_Pack.vhdl RegisterFile_Multi_Banked_11_select_1_ports.vhdl RegisterFile_Multi_Banked_11_select_2_ports_Pack.vhdl RegisterFile_Multi_Banked_11_select_2_ports.vhdl RegisterFile_Multi_Banked_11.vhdl - Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h (revision 139) @@ -413,5 +413,5 @@ } while (0) -#define ALLOC1_SIGNAL_IN( sig, name, type, size) \ +#define ALLOC1_SIGNAL_IN_COND( sig, name, type, size, cond) \ do \ { \ @@ -419,16 +419,19 @@ for (uint32_t it1=0; it1 0) \ - { \ - sig [it1] = interface[it1]->set_signal_in (name, size); \ - } \ - else \ - { \ - PRINT_SIZE_NUL(_component,interface[it1],name); \ - } \ - } \ - } while (0) - -#define ALLOC1_SIGNAL_OUT(sig, name, type, size) \ + if (cond) \ + { \ + if (size > 0) \ + { \ + sig [it1] = interface[it1]->set_signal_in (name, size); \ + } \ + else \ + { \ + PRINT_SIZE_NUL(_component,interface[it1],name); \ + } \ + } \ + } \ + } while (0) + +#define ALLOC1_SIGNAL_OUT_COND(sig, name, type, size, cond) \ do \ { \ @@ -436,27 +439,38 @@ for (uint32_t it1=0; it1 0) \ - { \ - sig [it1] = interface[it1]->set_signal_out (name, size); \ - } \ - else \ - { \ - PRINT_SIZE_NUL(_component,interface[it1],name); \ - } \ - } \ - } while (0) - -#define DELETE1_SIGNAL(sig, x1, size) \ - do \ - { \ - for (uint32_t it1=0; it1 0) \ - { \ - delete sig[it1]; \ + if (cond) \ + { \ + if (size > 0) \ + { \ + sig [it1] = interface[it1]->set_signal_out (name, size); \ + } \ + else \ + { \ + PRINT_SIZE_NUL(_component,interface[it1],name); \ + } \ + } \ + } \ + } while (0) + +#define ALLOC1_SIGNAL_IN( sig, name, type, size) ALLOC1_SIGNAL_IN_COND( sig, name, type, size,true) +#define ALLOC1_SIGNAL_OUT(sig, name, type, size) ALLOC1_SIGNAL_OUT_COND(sig, name, type, size,true) + +#define DELETE1_SIGNAL_COND(sig, x1, size, cond) \ + do \ + { \ + for (uint32_t it1=0; it1 0) \ + { \ + delete sig[it1]; \ + } \ } \ } \ delete [] sig; \ } while (0) + +#define DELETE1_SIGNAL(sig, x1, size) DELETE1_SIGNAL_COND(sig, x1, size, true) #define ALLOC1_FOREIGN_SIGNAL_IN(sig, interface, name, type, size,x1) \ @@ -661,5 +675,5 @@ } while (0) -#define _ALLOC2_SIGNAL_IN( sig, name, type, size, x1, x2) \ +#define _ALLOC2_SIGNAL_IN_COND( sig, name, type, size, x1, x2, cond) \ do \ { \ @@ -670,17 +684,20 @@ for (uint32_t it2=0; it2 0) \ - { \ - sig [it1][it2] = interface[it1][it2]->set_signal_in (name, size); \ - } \ - else \ - { \ - PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ - } \ - } \ - } \ - } while (0) - -#define _ALLOC2_SIGNAL_OUT( sig, name, type, size, x1, x2) \ + if (cond) \ + { \ + if (size > 0) \ + { \ + sig [it1][it2] = interface[it1][it2]->set_signal_in (name, size); \ + } \ + else \ + { \ + PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ + } \ + } \ + } \ + } \ + } while (0) + +#define _ALLOC2_SIGNAL_OUT_COND( sig, name, type, size, x1, x2, cond) \ do \ { \ @@ -691,33 +708,42 @@ for (uint32_t it2=0; it2 0) \ - { \ - sig [it1][it2] = interface[it1][it2]->set_signal_out (name, size); \ - } \ - else \ - { \ - PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ - } \ - } \ - } \ - } while (0) - -#define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2) -#define ALLOC2_VAL_ACK_OUT(sig, name, type ) _ALLOC2_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2) -#define ALLOC2_VALACK_IN( sig, type ) _ALLOC2_VALACK_IN( sig, type , iterator_1, iterator_2) -#define ALLOC2_VALACK_OUT( sig, type ) _ALLOC2_VALACK_OUT( sig, type , iterator_1, iterator_2) -#define ALLOC2_SIGNAL_IN( sig, name, type, size) _ALLOC2_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2) -#define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) - -#define DELETE2_SIGNAL(sig, x1,x2, size) \ - do \ - { \ - for (uint32_t it1=0; it1 0) \ - { \ - delete sig[it1][it2]; \ + if (cond) \ + { \ + if (size > 0) \ + { \ + sig [it1][it2] = interface[it1][it2]->set_signal_out (name, size); \ + } \ + else \ + { \ + PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ + } \ + } \ + } \ + } \ + } while (0) + +#define _ALLOC2_SIGNAL_IN( sig, name, type, size, x1, x2) _ALLOC2_SIGNAL_IN_COND( sig, name, type, size, x1, x2,true) +#define _ALLOC2_SIGNAL_OUT(sig, name, type, size, x1, x2) _ALLOC2_SIGNAL_OUT_COND(sig, name, type, size, x1, x2,true) + +#define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2) +#define ALLOC2_VAL_ACK_OUT(sig, name, type ) _ALLOC2_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2) +#define ALLOC2_VALACK_IN( sig, type ) _ALLOC2_VALACK_IN( sig, type , iterator_1, iterator_2) +#define ALLOC2_VALACK_OUT( sig, type ) _ALLOC2_VALACK_OUT( sig, type , iterator_1, iterator_2) +#define ALLOC2_SIGNAL_IN( sig, name, type, size) _ALLOC2_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2) +#define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) + +#define DELETE2_SIGNAL_COND(sig, x1,x2, size, cond) \ + do \ + { \ + for (uint32_t it1=0; it1 0) \ + { \ + delete sig[it1][it2]; \ + } \ } \ } \ @@ -726,4 +752,6 @@ delete [] sig; \ } while (0) + +#define DELETE2_SIGNAL(sig, x1,x2, size) DELETE2_SIGNAL_COND(sig, x1,x2, size,true) #define ALLOC2_FOREIGN_SIGNAL_IN( sig, interface, name, type, size, x1, x2) \ Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 139) @@ -131,5 +131,5 @@ public : bool test_map (bool recursive=true); - private : bool test_map (uint32_t depth, bool recursive); +//private : bool test_map (bool recursive); public : void * get_sc_signal (std::string component, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 139) @@ -79,6 +79,6 @@ #endif - public : bool test_map (uint32_t depth,bool top_level, bool is_behavioural); -// public : bool test_equi (uint32_t depth); + public : bool test_map (bool top_level, bool is_behavioural); +//public : bool test_equi (uint32_t depth); #ifdef POSITION Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 139) @@ -248,5 +248,7 @@ #endif - public : bool test_map (uint32_t depth, bool top_level, bool is_behavioural); + public : bool test_map (std::string name_interfaces, + bool top_level, + bool is_behavioural); //public : bool test_equi (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 139) @@ -80,6 +80,6 @@ #endif - public : bool test_map (uint32_t depth, bool top_level, bool is_behavioural); -// public : bool test_equi (uint32_t depth); + public : bool test_map (bool top_level, bool is_behavioural); +//public : bool test_equi (uint32_t depth); public : friend std::ostream& operator<< (std::ostream& output_stream, Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 139) @@ -96,5 +96,7 @@ public : bool presence_testbench (void); - public : bool test_map (uint32_t depth, bool top_level, bool is_behavioural); + public : bool test_map (std::string name_interface, + bool top_level, + bool is_behavioural); //public : bool test_equi (uint32_t depth); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h (revision 139) @@ -37,5 +37,5 @@ typedef struct { - bool each_cycle; +// bool each_cycle; counter_t * variable; Stat_binary_tree * expression; @@ -54,5 +54,6 @@ private: std::map * _list_operand; // Liste chaîné des expressions - private: std::list * _list_expr; + private: std::list * _list_expr_per_cycle; + private: std::list * _list_expr_per_period; // List chaîné des "counters" (seulement pour la désallocation) private: std::list * _list_counters; Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h (revision 139) @@ -120,4 +120,11 @@ } Tmanage_event_t; + typedef enum + { + RAT_NO_SAVE , // Rat without save + RAT_ONE_SAVE , // Rat with one save + RAT_DEPTH_SAVE // RAT with multiple save (depth) + } Trat_scheme_t; + //--------------------------------------------------[ instruction ]----- class instruction_t @@ -307,4 +314,32 @@ }; + template<> inline std::string toString(const morpheo::behavioural::Trat_scheme_t& x) + { + switch (x) + { + case morpheo::behavioural::RAT_NO_SAVE : return "rat_no_save" ; break; + case morpheo::behavioural::RAT_ONE_SAVE : return "rat_one_save" ; break; + case morpheo::behavioural::RAT_DEPTH_SAVE : return "rat_depth_save"; break; + default : return "" ; break; + } + }; + + template<> inline morpheo::behavioural::Trat_scheme_t fromString(const std::string& x) + { + if ((x.compare(toString(static_cast(morpheo::behavioural::RAT_NO_SAVE ))) == 0) or + (x.compare(toString( morpheo::behavioural::RAT_NO_SAVE )) == 0)) + return morpheo::behavioural::RAT_NO_SAVE; + + if ((x.compare(toString(static_cast(morpheo::behavioural::RAT_ONE_SAVE ))) == 0) or + (x.compare(toString( morpheo::behavioural::RAT_ONE_SAVE )) == 0)) + return morpheo::behavioural::RAT_ONE_SAVE; + + if ((x.compare(toString(static_cast(morpheo::behavioural::RAT_DEPTH_SAVE))) == 0) or + (x.compare(toString( morpheo::behavioural::RAT_DEPTH_SAVE )) == 0)) + return morpheo::behavioural::RAT_DEPTH_SAVE; + + throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); + }; + }; // end namespace morpheo #endif Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp (revision 139) @@ -14,32 +14,32 @@ #undef FUNCTION #define FUNCTION "Component::test_map" + // bool Component::test_map (bool recursive) + // { + // log_printf(INFO,Behavioural,FUNCTION, "Test port map and interface."); + // return test_map (0, recursive); + // } + bool Component::test_map (bool recursive) - { - log_printf(INFO,Behavioural,FUNCTION, "Test port map and interface."); - return test_map (0, recursive); - } - - bool Component::test_map (uint32_t depth, bool recursive) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - std::string tab = morpheo::tab(depth); + // std::string tab = morpheo::tab(depth); std::string name = _entity->get_name(); bool test_ok = true; bool is_behavioural = _list_component->empty (); - if (is_behavioural) - { - log_printf(INFO,Interface,FUNCTION, "%s* Component \"%s\" is a behavioural description",tab.c_str(),name.c_str()); - } - else - { - log_printf(INFO,Interface,FUNCTION, "%s* Component \"%s\" is a structural description",tab.c_str(),name.c_str()); - } + // if (is_behavioural) + // { + // log_printf(INFO,Interface,FUNCTION, "%s* Component \"%s\" is a behavioural description",tab.c_str(),name.c_str()); + // } + // else + // { + // log_printf(INFO,Interface,FUNCTION, "%s* Component \"%s\" is a structural description",tab.c_str(),name.c_str()); + // } // log_printf(INFO,Behavioural,FUNCTION, "%s* Test port I/O",tab.c_str()); - test_ok &= _entity->test_map(depth+1,true,is_behavioural); + test_ok &= _entity->test_map(true,is_behavioural); // log_printf(INFO,Behavioural,FUNCTION, "%s* Test all internal component",tab.c_str()); @@ -50,9 +50,9 @@ if (((*i)->_instance & INSTANCE_COMPONENT) != 0) { - test_ok &= (*i)->_entity->test_map(depth+1,false,is_behavioural); + test_ok &= (*i)->_entity->test_map(false,is_behavioural); if (recursive) try { - test_ok &= (*i)->_component->test_map(depth+1,recursive); + test_ok &= (*i)->_component->test_map(recursive); } catch (morpheo::ErrorMorpheo & error) Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp (revision 139) @@ -15,20 +15,13 @@ #undef FUNCTION #define FUNCTION "Entity::test_map" - bool Entity::test_map (uint32_t depth, bool top_level, bool is_behavioural) + bool Entity::test_map (bool top_level, bool is_behavioural) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - std::string tab=morpheo::tab(depth); + // std::string tab=morpheo::tab(depth); - log_printf(INFO,Interface,FUNCTION,"%s* Entity \"%s\"",tab.c_str(),_name.c_str()); + // log_printf(INFO,Interface,FUNCTION,"%s* Entity \"%s\"",tab.c_str(),_name.c_str()); - bool _return = _interfaces->test_map(depth+1,top_level, is_behavioural); - -#ifndef DEBUG - if (_return == false) - { - std::cerr << "In entity \"" << _name << "\" (type : \"" << _type << "\"), a lot of port is not connected !" << std::endl; - } -#endif + bool _return = _interfaces->test_map(top_level, is_behavioural); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp (revision 139) @@ -14,17 +14,17 @@ #undef FUNCTION #define FUNCTION "Interface::test_map" - bool Interface::test_map (uint32_t depth, bool top_level, bool is_behavioural) + bool Interface::test_map (std::string name_interfaces, bool top_level, bool is_behavioural) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - std::string tab = morpheo::tab(depth); + // std::string tab = morpheo::tab(depth); bool _return = true; - log_printf(INFO,Interface,FUNCTION, "%s* Interface \"%s\"",tab.c_str(),_name.c_str()); + // log_printf(INFO,Interface,FUNCTION, "%s* Interface \"%s\"",tab.c_str(),_name.c_str()); for (std::list::iterator i = _list_signal->begin(); i != _list_signal->end(); ++i) - _return &= (*i)->test_map(depth+1,top_level, is_behavioural); + _return &= (*i)->test_map(name_interfaces+"."+_name,top_level, is_behavioural); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp (revision 139) @@ -14,18 +14,18 @@ #undef FUNCTION #define FUNCTION "Interfaces::test_map" - bool Interfaces::test_map (uint32_t depth, bool top_level, bool is_behavioural) + bool Interfaces::test_map (bool top_level, bool is_behavioural) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); - std::string tab = morpheo::tab(depth); + // std::string tab = morpheo::tab(depth); bool _return = true; - log_printf(INFO,Interface,FUNCTION, "%s* Interfaces \"%s\"",tab.c_str(),_name.c_str()); + // log_printf(INFO,Interface,FUNCTION, "%s* Interfaces \"%s\"",tab.c_str(),_name.c_str()); for (std::list::iterator i = _list_interface->begin(); i != _list_interface->end(); ++i) - _return &= (*i)->test_map(depth+1, top_level, is_behavioural); + _return &= (*i)->test_map(_name, top_level, is_behavioural); log_printf(FUNC,Behavioural,FUNCTION,"End"); Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp (revision 139) @@ -14,10 +14,11 @@ #undef FUNCTION #define FUNCTION "Signal::test_map" - bool Signal::test_map (uint32_t depth, bool top_level, bool is_behavioural) + bool Signal::test_map (std::string name_interface,bool top_level, bool is_behavioural) { log_printf(FUNC,Behavioural,FUNCTION,"Begin"); + std::string signame = name_interface+"."+_name; std::string str = ""; - std::string tab = morpheo::tab(depth); +// std::string tab = morpheo::tab(depth); bool _return = true; @@ -49,5 +50,5 @@ _return = false; - str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + str = "Signal \""+signame+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; } break; @@ -58,5 +59,5 @@ { _return = false; - str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + str = "Signal \""+signame+"\" is not mapped with an input port top-level's interface or a output port component's interface."; } break; @@ -68,5 +69,5 @@ _return = false; - str = "Internal signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + str = "Internal signal \""+signame+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; } @@ -78,5 +79,5 @@ _return = false; - str += "Internal signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + str += "Internal signal \""+signame+"\" is not mapped with an input port top-level's interface or a output port component's interface."; } @@ -101,5 +102,5 @@ _return = false; - str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + str = "Signal \""+signame+"\" is not mapped with an input port top-level's interface or a output port component's interface."; } break; @@ -111,5 +112,5 @@ _return = false; - str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + str = "Signal \""+signame+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; } break; @@ -121,5 +122,5 @@ _return = false; - str = "Internal signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; + str = "Internal signal \""+signame+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; } @@ -131,5 +132,5 @@ _return = false; - str += "Internal signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; + str += "Internal signal \""+signame+"\" is not mapped with an input port top-level's interface or a output port component's interface."; } @@ -143,13 +144,9 @@ if (_return == false) { -#ifndef DEBUG - std::cerr << str << std::endl; -#else - log_printf(INFO,Interface,FUNCTION, "%s* %s",tab.c_str(),str.c_str()); -#endif + msgError("%s\n",str.c_str()); } else { -// log_printf(INFO,Interface,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),_name.c_str()); +// log_printf(INFO,Interface,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),signame.c_str()); } @@ -181,5 +178,5 @@ // else // { -// // log_printf(INFO,Behavioural,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),_name.c_str()); +// // log_printf(INFO,Behavioural,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),signame.c_str()); // } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp (revision 139) @@ -5,6 +5,6 @@ namespace behavioural { - Stat::Stat (std::string name_instance, - std::string name_component, + Stat::Stat (std::string name_instance, + std::string name_component, Parameters_Statistics * param): _name_instance (name_instance), @@ -16,18 +16,19 @@ _generate_file = true; - _list_operand = new std::map; - _list_expr = new std::list; - _list_stat = new std::list; - _list_counters = new std::list; + _list_operand = new std::map; + _list_expr_per_cycle = new std::list; + _list_expr_per_period = new std::list; + _list_stat = new std::list; + _list_counters = new std::list; - _cycle = create_variable("cycle"); -// _cycle = create_counter("cycle","",""); - *_cycle = 0; // for the first period + _cycle = create_variable("cycle"); +// _cycle = create_counter("cycle","",""); + *_cycle = 0; // for the first period } Stat::Stat (std::string name_instance, std::string name_component, - cycle_t nb_cycle_before_begin, - cycle_t period): + cycle_t nb_cycle_before_begin, + cycle_t period): _name_instance (name_instance), _name_component (name_component), @@ -38,12 +39,13 @@ _generate_file = true; - _list_operand = new std::map; - _list_expr = new std::list; - _list_stat = new std::list; - _list_counters = new std::list; + _list_operand = new std::map; + _list_expr_per_cycle = new std::list; + _list_expr_per_period = new std::list; + _list_stat = new std::list; + _list_counters = new std::list; - _cycle = create_variable("cycle"); -// _cycle = create_counter("cycle","",""); - *_cycle = 0; // for the first period + _cycle = create_variable("cycle"); +// _cycle = create_counter("cycle","",""); + *_cycle = 0; // for the first period } @@ -63,11 +65,19 @@ // parcourir la liste et desallouer les arbres - for (std::list::iterator i=_list_expr->begin(); - i!= _list_expr->end(); + for (std::list::iterator i=_list_expr_per_cycle->begin(); + i!= _list_expr_per_cycle->end(); ++i) { delete i->expression; } - delete _list_expr; + delete _list_expr_per_cycle; + + for (std::list::iterator i=_list_expr_per_period->begin(); + i!= _list_expr_per_period->end(); + ++i) + { + delete i->expression; + } + delete _list_expr_per_period; // parcourir la liste et desallouer les arbres Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp (revision 139) @@ -18,7 +18,10 @@ expression.variable = (*_list_operand) [varname].counter; expression.expression = string2tree(expr); - expression.each_cycle = each_cycle; +// expression.each_cycle = each_cycle; - _list_expr->push_back(expression); + if (each_cycle) + _list_expr_per_cycle ->push_back(expression); + else + _list_expr_per_period->push_back(expression); } Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_eval_exprs.cpp =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_eval_exprs.cpp (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_eval_exprs.cpp (revision 139) @@ -7,11 +7,14 @@ { // parcourir la liste et desallouer les counters - for (std::list::iterator i=_list_expr->begin(); - i!= _list_expr->end(); + for (std::list::iterator i=_list_expr_per_cycle->begin(); + i!= _list_expr_per_cycle->end(); ++i) - { - if (i->each_cycle == only_each_cycle) - eval_expr (*i); - } + eval_expr (*i); + + if (not only_each_cycle) + for (std::list::iterator i=_list_expr_per_period->begin(); + i!= _list_expr_per_period->end(); + ++i) + eval_expr (*i); } }; Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_00.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_05.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_06.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w01_07.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_05.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_06.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_07.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_07.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_07.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w02_08.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x2.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x2.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x2.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x3.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x3.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x5.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x5.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x5.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x6.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x6.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_2x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x3.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x3.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x3.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x5.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x5.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x5.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x6.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x6.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_3x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x5.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x5.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x5.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x6.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x6.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_4x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x5.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x5.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x5.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x6.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x6.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_5x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x6.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x6.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x6.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_6x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x7.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x7.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x7.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_7x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x10.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x10.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x10.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x11.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x11.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x11.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x12.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x12.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x12.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x13.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x13.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x13.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x14.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x14.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x14.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x15.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x15.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x15.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x9.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x9.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-depth_8x9.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_1r_1w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_16x_2r_1w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_1x_12r_6w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_10r_5w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_6r_3w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_2x_8r_4w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_32x_1r_1w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_32x_1r_1w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_32x_1r_1w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_4r_2w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_4r_2w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_4r_2w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_6r_3w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_6r_3w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_6r_3w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_8r_4w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_8r_4w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_4x_8r_4w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_2r_1w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_2r_1w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_2r_1w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_4r_2w.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_4r_2w.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-regfile_8x_4r_2w.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x128.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x128.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x128.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x32.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x32.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x32.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x64.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x64.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x64.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_128x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_16x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x128.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x128.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x128.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x256.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x256.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x256.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x32.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x32.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x32.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x64.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x64.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x64.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_256x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x32.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x32.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x32.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_32x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_4x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_4x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_4x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x16.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x16.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x16.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x32.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x32.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x32.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x64.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x64.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x64.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_64x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x4.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x4.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x4.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x8.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x8.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02-rob_8x8.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_05.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_05.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x01_w08_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_00.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_00.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_00.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_05.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_05.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_06.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_06.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w01_06.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x02_w04_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w04_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_02.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_02.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_02.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_03.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_03.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_03.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_04.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_04.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_04.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_05.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_05.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_05.cfg (revision 139) @@ -33,4 +33,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim (revision 139) @@ -22,4 +22,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen (revision 139) @@ -39,4 +39,5 @@ + Index: trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim (revision 139) @@ -20,5 +20,5 @@ - + Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg (revision 139) @@ -1,18 +1,5 @@ - - - - - - - - - - - - - - + @@ -21,5 +8,5 @@ - + @@ -46,4 +33,5 @@ + @@ -152,5 +140,5 @@ - + @@ -192,4 +180,17 @@ + + + + + + + + + + + + + @@ -231,4 +232,5 @@ + @@ -244,5 +246,4 @@ - Index: trunk/IPs/systemC/processor/Morpheo/Files/debug.sim =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Files/debug.sim (revision 139) @@ -20,5 +20,5 @@ - + @@ -28,5 +28,5 @@ - + @@ -69,8 +69,8 @@ - + - + @@ -81,7 +81,7 @@ - + - + Index: trunk/IPs/systemC/processor/Morpheo/Script/add_param.sh =================================================================== --- trunk/IPs/systemC/processor/Morpheo/Script/add_param.sh (revision 138) +++ trunk/IPs/systemC/processor/Morpheo/Script/add_param.sh (revision 139) @@ -23,14 +23,8 @@ # sed s/\\\\n\ \ \ \ \\\\n\ \ \ \ \\\\n\ \ \ \ \\\\n\ \ \ \ \ -# -# -# - - + sed s/\\\\n\ \ \ \ \_nb_general_register , param->_nb_special_register , + param->_rat_scheme , param->_nb_reg_free , param->_nb_rename_unit_bank , -// param->_size_read_counter , +// param->_size_read_counter , param->_nb_read_bloc ,