Changeset 141 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit

Timestamp:

Aug 2, 2010, 8:56:05 PM (14 years ago)

Author:

rosiere

Message:

Add statistics in stage IFETCH, DECODE and COMMIT (insert, retire and commit)

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue

Files:

• include/Ifetch_queue.h (modified) (1 diff)
• src/Ifetch_queue_function_full_assoc_transition.cpp (modified) (3 diffs)
• src/Ifetch_queue_function_no_assoc_transition.cpp (modified) (3 diffs)
• src/Ifetch_queue_statistics_allocation.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h

@@ -55 +55 @@
   private   : counter_t                      * _sum_use_queue_error_wait_rsp;
 
-  private   : counter_t                      * _sum_inst_enable;
   private   : counter_t                      * _sum_transaction_address;
 
-  private   : counter_t                      * _average_occupation_bundle;
+  private   : counters_t                     * _stat_nb_inst_fetch;
+    
 #endif
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp

@@ -51 +51 @@
         // =====[ ADDRESS ]==========================================
         // ==========================================================
+#ifdef STATISTICS
+        uint32_t stat_nb_inst_fetch=0;
+#endif
+
         if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK)
           {
@@ -70 +74 @@
                 Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]);
 #ifdef STATISTICS
-                if (usage_is_set(_usage,USE_STATISTICS))
-                  (*_sum_inst_enable) += enable;
+                stat_nb_inst_fetch+=enable;
 #endif
                 _queue[reg_PTR_WRITE]->_instruction_enable [i]      = enable;
@@ -83 +86 @@
             reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue;
           }
+
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          (*_stat_nb_inst_fetch)+=stat_nb_inst_fetch;
+#endif
+
 
         // ==========================================================

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp

@@ -51 +51 @@
         // =====[ ADDRESS ]==========================================
         // ==========================================================
+#ifdef STATISTICS
+        uint32_t stat_nb_inst_fetch=0;
+#endif
+
         if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK)
           {
@@ -70 +74 @@
                 Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]);
 #ifdef STATISTICS
-                if (usage_is_set(_usage,USE_STATISTICS))
-                  (*_sum_inst_enable) += enable;
+                 stat_nb_inst_fetch += enable;
 #endif
                 _queue[reg_PTR_WRITE]->_instruction_enable [i]      = enable;
@@ -83 +86 @@
             reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue;
           }
+#ifdef STATISTICS
+        if (usage_is_set(_usage,USE_STATISTICS))
+          (*_stat_nb_inst_fetch) += stat_nb_inst_fetch;
+#endif
 
         // ==========================================================

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_allocation.cpp

@@ -34 +34 @@
     _sum_use_queue_have_rsp       = _stat->create_variable("sum_use_queue_have_rsp");
     _sum_use_queue_error_wait_rsp = _stat->create_variable("sum_use_queue_error_wait_rsp");
-    _sum_inst_enable              = _stat->create_variable("sum_inst_enable");
 
-    _average_occupation_bundle    = _stat->create_counter ("average_occupation_bundle", "", "Occupation average of instruction's bundle.");
-
-    _stat->create_expr                 ("average_occupation_bundle" ,"/ sum_inst_enable sum_transaction_address");
-    _stat->create_expr_percent         ("percent_occupation_bundle" ,"average_occupation_bundle", toString(_param->_nb_instruction),"Percent of instruction's bundle occupation.");
     _stat->create_expr                 ("sum_use_queue"             ,"+ + sum_use_queue_wait_rsp sum_use_queue_have_rsp sum_use_queue_error_wait_rsp");
     _stat->create_expr_average_by_cycle("average_use_queue"               ,"sum_use_queue"               ,"","Average occupation of ifetch queue");
@@ -48 +43 @@
 
     _stat->create_expr_average         ("average_miss_icache"             ,"+ sum_use_queue_wait_rsp sum_use_queue_error_wait_rsp", "sum_transaction_address", "", "Average Miss Instruction Cache");
+
+    _stat_nb_inst_fetch     = _stat->create_counters("nb_inst_fetch",_param->_nb_instruction,"",
+                                                     _("Number bundle with %d instruction(s)."),
+                                                     _("Percent of bundle with %d instruction(s)."),
+                                                     _("Average instruction in a bundle.")
+                                                     );
 
     log_printf(FUNC,Ifetch_queue,FUNCTION,"End");