Index: trunk/Softwares/Test/Test_010/src/sys/crt0.s
===================================================================
--- trunk/Softwares/Test/Test_010/src/sys/crt0.s	(revision 139)
+++ trunk/Softwares/Test/Test_010/src/sys/crt0.s	(revision 141)
@@ -37,22 +37,37 @@
 _start:
         /*
-             A (r1)     B (r2)     - D (r3 wait)CY OV (SR = r6, mask SR = r5)
-                                       (r4)                (r7)
-          1) 0x00000000 0x00000000 - 0x00000000 0  0
-          2) 0x14011959 0x25071959 - 0x390832b2 0  0
-          3) 0xebfee6a7 0xdaf8e6a7 - 0xc6f7cd4e 1  0
-          4) 0xebfee6a7 0x25071959 - 0x11060001 1  0
-          5) 0x14011959 0xdaf8e6a7 - 0xeefa0001 0  0
-          6) 0x87654321 0xabcdef01 - 0x33333222 1  1
-          7) 0x789abcde 0x08765432 - 0x81111111 0  1
-          */
+             A (r1)     B (r2)     CY - D (r3 wait)CY OV (SR = r6, mask SR = r5)
+                                          (r4)                (r7)
+          1) 0x00000000 0x00000000 0  - 0x00000000 0  0
+             0x00000000 0x00000000 1  - 0x00000001 0  0
+          2) 0x14011959 0x25071959 0  - 0x390832b2 0  0
+             0x14011959 0x25071959 1  - 0x390832b3 0  0
+          3) 0xebfee6a7 0xdaf8e6a7 0  - 0xc6f7cd4e 1  0
+             0xebfee6a7 0xdaf8e6a7 1  - 0xc6f7cd4f 1  0
+          4) 0xebfee6a7 0x25071959 0  - 0x11060000 1  0
+             0xebfee6a7 0x25071959 1  - 0x11060001 1  0
+          5) 0x14011959 0xdaf8e6a7 0  - 0xeefa0000 0  0
+             0x14011959 0xdaf8e6a7 1  - 0xeefa0001 0  0
+          6) 0x87654321 0xabcdef01 0  - 0x33333222 1  1
+             0x87654321 0xabcdef01 1  - 0x33333223 1  1
+          7) 0x789abcde 0x08765432 0  - 0x81111110 0  1
+             0x789abcde 0x08765432 1  - 0x81111111 0  1
+          8) 0xffffffff 0x00000000 0  - 0xffffffff 0  0
+             0xffffffff 0x00000000 1  - 0x00000000 1  0
+          9) 0x7fffffff 0x00000000 0  - 0x7fffffff 0  0
+             0x7fffffff 0x00000000 1  - 0x80000000 0  1
+
+        */
 
         /* Mask to read OV (SR[11]), CY (SR[10]) and not F (SR[9]) */
 	l.movhi r5,     hi(0x00000c00)
 	l.ori   r5, r5, lo(0x00000c00)
+	l.movhi r8,     hi(0x80000000)
+	l.ori   r8, r8, lo(0x80000000)
         
         /**********/
         /* Test 1 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0x00000000) /* RA */
 	l.ori   r1, r1, lo(0x00000000)
@@ -79,7 +94,29 @@
         l.nop
 
+        l.add   r0,r8,r8               /* set carry */
+	l.movhi r3,     hi(0x00000001) /* RD wait */
+	l.ori   r3, r3, lo(0x00000001)
+	l.movhi r6,     hi(0x00000000) /* SR wait */
+	l.ori   r6, r6, lo(0x00000000)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+        
         /**********/
         /* Test 2 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0x14011959) /* RA */
 	l.ori   r1, r1, lo(0x14011959)
@@ -106,7 +143,29 @@
         l.nop
 
+        l.add   r0,r8,r8               /* set carry */
+	l.movhi r3,     hi(0x390832b3) /* RD wait */
+	l.ori   r3, r3, lo(0x390832b3)
+	l.movhi r6,     hi(0x00000000) /* SR wait */
+	l.ori   r6, r6, lo(0x00000000)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+        
         /**********/
         /* Test 3 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0xebfee6a7) /* RA */
 	l.ori   r1, r1, lo(0xebfee6a7)
@@ -133,11 +192,54 @@
         l.nop
 
+        l.add   r0,r8,r8               /* set carry */
+	l.movhi r3,     hi(0xc6f7cd4f) /* RD wait */
+	l.ori   r3, r3, lo(0xc6f7cd4f)
+	l.movhi r6,     hi(0x00000400) /* SR wait */
+	l.ori   r6, r6, lo(0x00000400)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+        
         /**********/
         /* Test 4 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0xebfee6a7) /* RA */
 	l.ori   r1, r1, lo(0xebfee6a7)
 	l.movhi r2,     hi(0x25071959) /* RB */
 	l.ori   r2, r2, lo(0x25071959)
+	l.movhi r3,     hi(0x11060000) /* RD wait */
+	l.ori   r3, r3, lo(0x11060000)
+	l.movhi r6,     hi(0x00000400) /* SR wait */
+	l.ori   r6, r6, lo(0x00000400)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        l.add   r0,r8,r8               /* set carry */
 	l.movhi r3,     hi(0x11060001) /* RD wait */
 	l.ori   r3, r3, lo(0x11060001)
@@ -159,12 +261,34 @@
         l.bnf   _end_ko
         l.nop
-
+        
         /**********/
         /* Test 5 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0x14011959) /* RA */
 	l.ori   r1, r1, lo(0x14011959)
 	l.movhi r2,     hi(0xdaf8e6a7) /* RB */
 	l.ori   r2, r2, lo(0xdaf8e6a7)
+	l.movhi r3,     hi(0xeefa0000) /* RD wait */
+	l.ori   r3, r3, lo(0xeefa0000)
+	l.movhi r6,     hi(0x00000000) /* SR wait */
+	l.ori   r6, r6, lo(0x00000000)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        l.add   r0,r8,r8               /* set carry */
 	l.movhi r3,     hi(0xeefa0001) /* RD wait */
 	l.ori   r3, r3, lo(0xeefa0001)
@@ -186,8 +310,9 @@
         l.bnf   _end_ko
         l.nop
-
+        
         /**********/
         /* Test 6 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0x87654321) /* RA */
 	l.ori   r1, r1, lo(0x87654321)
@@ -214,11 +339,54 @@
         l.nop
 
+        l.add   r0,r8,r8               /* set carry */
+	l.movhi r3,     hi(0x33333223) /* RD wait */
+	l.ori   r3, r3, lo(0x33333223)
+	l.movhi r6,     hi(0x00000c00) /* SR wait */
+	l.ori   r6, r6, lo(0x00000c00)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
         /**********/
         /* Test 7 */
         /**********/
+        l.add   r0,r0,r0               /* unset carry */
 	l.movhi r1,     hi(0x789abcde) /* RA */
 	l.ori   r1, r1, lo(0x789abcde)
 	l.movhi r2,     hi(0x08765432) /* RB */
 	l.ori   r2, r2, lo(0x08765432)
+	l.movhi r3,     hi(0x81111110) /* RD wait */
+	l.ori   r3, r3, lo(0x81111110)
+	l.movhi r6,     hi(0x00000800) /* SR wait */
+	l.ori   r6, r6, lo(0x00000800)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        l.add   r0,r8,r8               /* unset carry */
 	l.movhi r3,     hi(0x81111111) /* RD wait */
 	l.ori   r3, r3, lo(0x81111111)
@@ -242,4 +410,102 @@
         
         /**********/
+        /* Test 8 */
+        /**********/
+        l.add   r0,r0,r0               /* unset carry */
+	l.movhi r1,     hi(0xffffffff) /* RA */
+	l.ori   r1, r1, lo(0xffffffff)
+	l.movhi r2,     hi(0x00000000) /* RB */
+	l.ori   r2, r2, lo(0x00000000)
+	l.movhi r3,     hi(0xffffffff) /* RD wait */
+	l.ori   r3, r3, lo(0xffffffff)
+	l.movhi r6,     hi(0x00000000) /* SR wait */
+	l.ori   r6, r6, lo(0x00000000)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        l.add   r0,r8,r8               /* unset carry */
+	l.movhi r3,     hi(0x00000000) /* RD wait */
+	l.ori   r3, r3, lo(0x00000000)
+	l.movhi r6,     hi(0x00000400) /* SR wait */
+	l.ori   r6, r6, lo(0x00000400)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+        
+        /**********/
+        /* Test 9 */
+        /**********/
+        l.add   r0,r0,r0               /* unset carry */
+	l.movhi r1,     hi(0x7fffffff) /* RA */
+	l.ori   r1, r1, lo(0x7fffffff)
+	l.movhi r2,     hi(0x00000000) /* RB */
+	l.ori   r2, r2, lo(0x00000000)
+	l.movhi r3,     hi(0x7fffffff) /* RD wait */
+	l.ori   r3, r3, lo(0x7fffffff)
+	l.movhi r6,     hi(0x00000000) /* SR wait */
+	l.ori   r6, r6, lo(0x00000000)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        l.add   r0,r8,r8               /* unset carry */
+	l.movhi r3,     hi(0x80000000) /* RD wait */
+	l.ori   r3, r3, lo(0x80000000)
+	l.movhi r6,     hi(0x00000800) /* SR wait */
+	l.ori   r6, r6, lo(0x00000800)
+        
+        l.addc   r4, r1, r2
+
+        /* Test flag */
+        l.mfspr r7, r0, 17
+        l.and   r7, r7, r5
+
+        l.sfeq  r6, r7
+        l.bnf   _end_ko
+        l.nop
+
+        /* Test result */
+        l.sfeq  r3, r4
+        l.bnf   _end_ko
+        l.nop
+
+        /**********/
         /* End */
         /**********/
