Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/config_min.cfg	(revision 142)
+++ 	(revision )
@@ -1,5 +1,0 @@
-Ifetch_queue
-1	1 	*2	# _size_queue                   
-1	1	*2	# _nb_instruction               
-1	1	*2	# _size_branch_update_prediction
-32	32	*2	# _size_general_data            
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration.cfg	(revision 142)
+++ 	(revision )
@@ -1,5 +1,0 @@
-Ifetch_queue
-8	16	*2	# _size_queue                   
-1	8	*2	# _nb_instruction               
-1	1	*2	# _size_branch_update_prediction
-32	32	*2	# _size_general_data            
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/config_min.gen
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/config_min.gen	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/config_min.gen	(revision 145)
@@ -0,0 +1,5 @@
+Ifetch_queue
+1	1 	*2	# _size_queue                   
+1	1	*2	# _nb_instruction               
+1	1	*2	# _size_branch_update_prediction
+32	32	*2	# _size_general_data            
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/configuration.gen
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/configuration.gen	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/configuration/configuration.gen	(revision 145)
@@ -0,0 +1,5 @@
+Ifetch_queue
+8	16	*2	# _size_queue                   
+1	8	*2	# _nb_instruction               
+1	1	*2	# _size_branch_update_prediction
+32	32	*2	# _size_general_data            
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp	(revision 142)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_full_assoc_transition.cpp	(revision 145)
@@ -205,17 +205,20 @@
 	for (uint32_t i=0; i<_param->_size_queue; i++)
 	  {
+            uint32_t index=(i+reg_PTR_READ)%_param->_size_queue;
+
             log_printf(TRACE,Ifetch_queue,FUNCTION,"    * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s",
-                       i, 
-                       _queue [i]->_address,
-                       _queue [i]->_address<<2,
-                       _queue [i]->_inst_ifetch_ptr,
-                       _queue [i]->_branch_state,
-                       _queue [i]->_branch_update_prediction_id,
-                       _queue [i]->_exception,
-                       toString(_queue [i]->_state).c_str()
+                       index, 
+                       _queue [index]->_address,
+                       _queue [index]->_address<<2,
+                       _queue [index]->_inst_ifetch_ptr,
+                       _queue [index]->_branch_state,
+                       _queue [index]->_branch_update_prediction_id,
+                       _queue [index]->_exception,
+                       toString(_queue [index]->_state).c_str()
                        );
 	    
-	    for (uint32_t j=0; j<_param->_nb_instruction; j++)
-	      log_printf(TRACE,Ifetch_queue,FUNCTION,"      * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]);
+            if (_queue [index]->_state != IFETCH_QUEUE_STATE_EMPTY)
+              for (uint32_t j=0; j<_param->_nb_instruction; j++)
+                log_printf(TRACE,Ifetch_queue,FUNCTION,"      * %d 0x%.8x (0x%.8x)", _queue [index]->_instruction_enable[j], _queue [index]->_instruction[j],(_queue [index]->_address+j)<<2);
 	  }
 #endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp	(revision 142)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_function_no_assoc_transition.cpp	(revision 145)
@@ -173,17 +173,19 @@
 	for (uint32_t i=0; i<_param->_size_queue; i++)
 	  {
+            uint32_t index=(i+reg_PTR_READ)%_param->_size_queue;
             log_printf(TRACE,Ifetch_queue,FUNCTION,"    * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s",
-                       i, 
-                       _queue [i]->_address,
-                       _queue [i]->_address<<2,
-                       _queue [i]->_inst_ifetch_ptr,
-                       _queue [i]->_branch_state,
-                       _queue [i]->_branch_update_prediction_id,
-                       _queue [i]->_exception,
-                       toString(_queue [i]->_state).c_str()
+                       index, 
+                       _queue [index]->_address,
+                       _queue [index]->_address<<2,
+                       _queue [index]->_inst_ifetch_ptr,
+                       _queue [index]->_branch_state,
+                       _queue [index]->_branch_update_prediction_id,
+                       _queue [index]->_exception,
+                       toString(_queue [index]->_state).c_str()
                        );
 	    
-	    for (uint32_t j=0; j<_param->_nb_instruction; j++)
-	      log_printf(TRACE,Ifetch_queue,FUNCTION,"      * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]);
+            if (_queue [index]->_state != IFETCH_QUEUE_STATE_EMPTY)
+              for (uint32_t j=0; j<_param->_nb_instruction; j++)
+                log_printf(TRACE,Ifetch_queue,FUNCTION,"      * %d 0x%.8x (0x%.8x)", _queue [index]->_instruction_enable[j], _queue [index]->_instruction[j],(_queue [index]->_address+j)<<2);
 	  }
 #endif
