Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_mono_front_end.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_mono_front_end.cfg	(revision 144)
+++ 	(revision )
@@ -1,7 +1,0 @@
-Register_Address_Translation_unit
-1	1	+1	# nb_front_end          
-1	1	+1	# nb_context            [0] [nb_front_end]
-4 	4 	*2	# nb_general_register   
-4 	4 	*2	# nb_special_register   
-4	4	+1	# nb_inst_insert
-4	4	+1	# nb_inst_retire
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_multi_front_end.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/config_multi_front_end.cfg	(revision 144)
+++ 	(revision )
@@ -1,10 +1,0 @@
-Register_Address_Translation_unit
-4	4	+1	# nb_front_end          
-1	1	+1	# nb_context            [0] [nb_front_end]
-2	2	+1	# nb_context            [1] [nb_front_end]
-1	1	+1	# nb_context            [2] [nb_front_end]
-4	4	+1	# nb_context            [3] [nb_front_end]
-64	64	*2	# nb_general_register   
-16	16	*2	# nb_special_register   
-4	4	+1	# nb_inst_insert
-4	4	+1	# nb_inst_retire
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_mono_front_end.gen
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_mono_front_end.gen	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_mono_front_end.gen	(revision 145)
@@ -0,0 +1,7 @@
+Register_Address_Translation_unit
+1	1	+1	# nb_front_end          
+1	1	+1	# nb_context            [0] [nb_front_end]
+4 	4 	*2	# nb_general_register   
+4 	4 	*2	# nb_special_register   
+4	4	+1	# nb_inst_insert
+4	4	+1	# nb_inst_retire
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_multi_front_end.gen
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_multi_front_end.gen	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/configuration/config_multi_front_end.gen	(revision 145)
@@ -0,0 +1,10 @@
+Register_Address_Translation_unit
+4	4	+1	# nb_front_end          
+1	1	+1	# nb_context            [0] [nb_front_end]
+2	2	+1	# nb_context            [1] [nb_front_end]
+1	1	+1	# nb_context            [2] [nb_front_end]
+4	4	+1	# nb_context            [3] [nb_front_end]
+64	64	*2	# nb_general_register   
+16	16	*2	# nb_special_register   
+4	4	+1	# nb_inst_insert
+4	4	+1	# nb_inst_retire
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Parameters.h	(revision 145)
@@ -36,4 +36,5 @@
     
   public : uint32_t         _max_nb_context        ;
+  public : uint32_t         _max_nb_branch_speculated;
 //public : uint32_t         _size_front_end_id     ;
 //public : uint32_t         _size_context_id       ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h	(revision 145)
@@ -107,28 +107,32 @@
 
     // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_EVENT_VAL            ;//[nb_front_end][nb_context]
-  public    : SC_OUT(Tcontrol_t        )  *** out_RETIRE_EVENT_ACK            ;//[nb_front_end][nb_context]
-  public    : SC_IN (Tevent_state_t    )  ***  in_RETIRE_EVENT_STATE          ;//[nb_front_end][nb_context]
-  public    : SC_IN (Tevent_type_t     )  ***  in_RETIRE_EVENT_TYPE           ;//[nb_front_end][nb_context]
-  public    : SC_IN (Tdepth_t          )  ***  in_RETIRE_EVENT_DEPTH          ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_RETIRE_EVENT_VAL         ;//[nb_front_end][nb_context]
+  public    : SC_OUT(Tcontrol_t        )  *** out_RETIRE_EVENT_ACK         ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tevent_state_t    )  ***  in_RETIRE_EVENT_STATE       ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tevent_type_t     )  ***  in_RETIRE_EVENT_TYPE        ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tdepth_t          )  ***  in_RETIRE_EVENT_DEPTH       ;//[nb_front_end][nb_context]
+
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  public    : SC_IN (Tdepth_t          )  ***  in_DEPTH_MIN                   ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tdepth_t          )  ***  in_DEPTH_MAX                   ;//[nb_front_end][nb_context]
+  public    : SC_IN (Tcontrol_t        )  ***  in_DEPTH_FULL                  ;//[nb_front_end][nb_context]
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
 
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
-  private   : Tgeneral_address_t          *** rat_gpr_not_speculative;      //[nb_front_end][nb_context]                      [nb_general_register_logic]
-  private   : Tgeneral_address_t          *** rat_gpr_speculative;          //[nb_front_end][nb_context]                      [nb_general_register_logic]
-  private   : bool                        *** rat_gpr_speculative_valid;    //[nb_front_end][nb_context]                      [nb_general_register_logic]
-  private   : Tgeneral_address_t         **** rat_gpr_save;                 //[nb_front_end][nb_context][nb_branch_speculated][nb_general_register_logic]
-
-  private   : Tspecial_address_t          *** rat_spr_not_speculative;      //[nb_front_end][nb_context]                      [nb_special_register_logic]
-  private   : Tspecial_address_t          *** rat_spr_speculative;          //[nb_front_end][nb_context]                      [nb_special_register_logic]
-  private   : bool                        *** rat_spr_speculative_valid;    //[nb_front_end][nb_context]                      [nb_special_register_logic]
-  private   : Tspecial_address_t         **** rat_spr_save;                 //[nb_front_end][nb_context][nb_branch_speculated][nb_special_register_logic]
-
-  private   : Tdepth_t                     ** rat_depth;                    //[nb_front_end][nb_context]
+                                                                            //                                                                            NO ONE DEPTH
+  private   : Tgeneral_address_t          *** RAT_GPR_NOT_SPECULATIVE;      //[nb_front_end][nb_context]                      [nb_general_register_logic] X  X   X
+  private   : Tgeneral_address_t         **** RAT_GPR_SPECULATIVE;          //[nb_front_end][nb_context][nb_branch_speculated][nb_general_register_logic]    X   X
+  private   : bool                       **** RAT_GPR_SPECULATIVE_VALID;    //[nb_front_end][nb_context][nb_branch_speculated][nb_general_register_logic]    X   X
+
+  private   : Tspecial_address_t          *** RAT_SPR_NOT_SPECULATIVE;      //[nb_front_end][nb_context]                      [nb_special_register_logic] X  X   X
+  private   : Tspecial_address_t         **** RAT_SPR_SPECULATIVE;          //[nb_front_end][nb_context][nb_branch_speculated][nb_special_register_logic]    X   X
+  private   : bool                       **** RAT_SPR_SPECULATIVE_VALID;    //[nb_front_end][nb_context][nb_branch_speculated][nb_special_register_logic]    X   X
+
+  private   : bool                        *** reg_RAT_USE;                  //[nb_front_end][nb_context][nb_branch_speculated]                                   X
+  private   : bool                         ** reg_SAVE_RAT;                 //[nb_front_end][nb_context]                                                         X
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   private   : Tcontrol_t                    * internal_RENAME_ACK;          //[nb_inst_insert]
-  private   : Tcontrol_t                    * internal_RENAME_SAVE;         //[nb_inst_insert]
   private   : Tcontrol_t                    * internal_INSERT_ACK;          //[nb_inst_insert]
   private   : Tcontrol_t                    * internal_RETIRE_ACK;          //[nb_inst_retire]
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Parameters.cpp	(revision 145)
@@ -41,5 +41,6 @@
     _nb_branch_speculated   = nb_branch_speculated;
 
-    _max_nb_context         = max<uint32_t>(_nb_context, _nb_front_end);
+    _max_nb_context          = max<uint32_t>(_nb_context, _nb_front_end);
+    _max_nb_branch_speculated= max<uint32_t>(_nb_branch_speculated, _nb_front_end, _nb_context);
 
     test();
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp	(revision 145)
@@ -160,6 +160,12 @@
         for (uint32_t i=0; i<_param->_nb_front_end; ++i)
           for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
-            sensitive << (*(in_RETIRE_EVENT_VAL   [i][j]))
-                      << (*(in_RETIRE_EVENT_STATE [i][j]));
+            {
+              sensitive << (*(in_RETIRE_EVENT_VAL   [i][j]))
+                        << (*(in_RETIRE_EVENT_STATE [i][j]))
+                        << (*(in_DEPTH_FULL         [i][j]));
+              if (_param->_have_port_depth)
+              sensitive << (*(in_DEPTH_MIN          [i][j]))
+                        << (*(in_DEPTH_MAX          [i][j]));
+            }
 
 # ifdef SYSTEMCASS_SPECIFIC
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_allocation.cpp	(revision 145)
@@ -131,14 +131,24 @@
     }
 
+    // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      ALLOC2_INTERFACE_BEGIN("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
+
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MIN                    ,"MIN"               ,Tdepth_t         ,_param->_size_depth       ,_param->_nb_front_end,_param->_nb_context[it1]);
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_MAX                    ,"MAX"               ,Tdepth_t         ,_param->_size_depth       ,_param->_nb_front_end,_param->_nb_context[it1]); 
+      _ALLOC2_SIGNAL_IN ( in_DEPTH_FULL                   ,"FULL"              ,Tcontrol_t       ,1                         ,_param->_nb_front_end,_param->_nb_context[it1]); 
+
+      ALLOC2_INTERFACE_END(_param->_nb_front_end,_param->_nb_context[it1]);
+    }
+
     if (usage_is_set(_usage,USE_SYSTEMC))
       {
     ALLOC1(internal_RENAME_ACK       ,Tcontrol_t,_param->_nb_inst_insert);
-    ALLOC1(internal_RENAME_SAVE      ,Tcontrol_t,_param->_nb_inst_insert);
     ALLOC1(internal_INSERT_ACK       ,Tcontrol_t,_param->_nb_inst_insert);
     ALLOC1(internal_RETIRE_ACK       ,Tcontrol_t,_param->_nb_inst_retire);
     ALLOC2(internal_RETIRE_EVENT_ACK ,Tcontrol_t,_param->_nb_front_end,_param->_nb_context[it1]);
 
-    ALLOC3(rat_gpr_speculative      ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-    ALLOC3(rat_spr_speculative      ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+    ALLOC3(RAT_GPR_NOT_SPECULATIVE  ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+    ALLOC3(RAT_SPR_NOT_SPECULATIVE  ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
 
     switch(_param->_rat_scheme)
@@ -150,9 +160,9 @@
       case RAT_ONE_SAVE   :
         {
-          ALLOC3(rat_gpr_not_speculative  ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-          ALLOC3(rat_gpr_speculative_valid,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-
-          ALLOC3(rat_spr_not_speculative  ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
-          ALLOC3(rat_spr_speculative_valid,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+          ALLOC4(RAT_GPR_SPECULATIVE      ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_general_register_logic);
+          ALLOC4(RAT_SPR_SPECULATIVE      ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_special_register_logic);
+
+          ALLOC4(RAT_GPR_SPECULATIVE_VALID,bool              ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_general_register_logic);
+          ALLOC4(RAT_SPR_SPECULATIVE_VALID,bool              ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_special_register_logic);
           
           break;
@@ -160,8 +170,13 @@
       case RAT_DEPTH_SAVE :
         {
-          ALLOC4(rat_gpr_save             ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
-          ALLOC4(rat_spr_save             ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
-          ALLOC2(rat_depth                ,Tdepth_t          ,_param->_nb_front_end,_param->_nb_context[it1]);
-    
+          ALLOC4(RAT_GPR_SPECULATIVE      ,Tgeneral_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
+          ALLOC4(RAT_SPR_SPECULATIVE      ,Tspecial_address_t,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
+
+          ALLOC4(RAT_GPR_SPECULATIVE_VALID,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
+          ALLOC4(RAT_SPR_SPECULATIVE_VALID,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
+    
+          ALLOC3(reg_RAT_USE              ,bool              ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2]);
+          ALLOC2(reg_SAVE_RAT             ,bool              ,_param->_nb_front_end,_param->_nb_context[it1]);
+
           break;
         }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_deallocation.cpp	(revision 145)
@@ -76,13 +76,15 @@
         DELETE2_SIGNAL_COND( in_RETIRE_EVENT_DEPTH          ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_depth     ,_param->_rat_scheme == RAT_DEPTH_SAVE);
 
+        DELETE2_SIGNAL     ( in_DEPTH_MIN                   ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth);
+        DELETE2_SIGNAL     ( in_DEPTH_MAX                   ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_depth);
+        DELETE2_SIGNAL     ( in_DEPTH_FULL                  ,_param->_nb_front_end,_param->_nb_context[it1],1                  );
+
         DELETE1(internal_RENAME_ACK                    ,_param->_nb_inst_insert);
-        DELETE1(internal_RENAME_SAVE                   ,_param->_nb_inst_insert);
-        DELETE1(internal_INSERT_ACK                    ,_param->_nb_inst_insert);
         DELETE1(internal_RETIRE_ACK                    ,_param->_nb_inst_retire);
         DELETE2(internal_RETIRE_EVENT_ACK              ,_param->_nb_front_end,_param->_nb_context[it1]);
 
-        DELETE3(rat_gpr_speculative          ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-        DELETE3(rat_spr_speculative          ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
-
+        DELETE3(RAT_GPR_NOT_SPECULATIVE      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
+        DELETE3(RAT_SPR_NOT_SPECULATIVE      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+        
         switch(_param->_rat_scheme)
           {
@@ -93,9 +95,9 @@
           case RAT_ONE_SAVE   :
             {
-              DELETE3(rat_gpr_not_speculative      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-              DELETE3(rat_gpr_speculative_valid    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_general_register_logic);
-              
-              DELETE3(rat_spr_not_speculative      ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
-              DELETE3(rat_spr_speculative_valid    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_special_register_logic);
+              DELETE4(RAT_GPR_SPECULATIVE          ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_general_register_logic);
+              DELETE4(RAT_SPR_SPECULATIVE          ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_special_register_logic);
+
+              DELETE4(RAT_GPR_SPECULATIVE_VALID    ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_general_register_logic);
+              DELETE4(RAT_SPR_SPECULATIVE_VALID    ,_param->_nb_front_end,_param->_nb_context[it1],1,_param->_nb_special_register_logic);
               
               break;
@@ -103,7 +105,12 @@
           case RAT_DEPTH_SAVE :
             {
-              DELETE4(rat_gpr_save                 ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
-              DELETE4(rat_spr_save                 ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
-              DELETE2(rat_depth                    ,_param->_nb_front_end,_param->_nb_context[it1]);
+              DELETE4(RAT_GPR_SPECULATIVE          ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
+              DELETE4(RAT_SPR_SPECULATIVE          ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
+
+              DELETE4(RAT_GPR_SPECULATIVE_VALID    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_general_register_logic);
+              DELETE4(RAT_SPR_SPECULATIVE_VALID    ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2],_param->_nb_special_register_logic);
+
+              DELETE3(reg_RAT_USE                  ,_param->_nb_front_end,_param->_nb_context[it1],_param->_nb_branch_speculated[it1][it2]);
+              DELETE2(reg_SAVE_RAT                 ,_param->_nb_front_end,_param->_nb_context[it1]);
 
               break;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_constant.cpp	(revision 145)
@@ -30,6 +30,8 @@
       {
         internal_INSERT_ACK [i] = 1;
+        internal_RENAME_ACK [i] = 1;
         
         PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]);
+        PORT_WRITE(out_RENAME_ACK[i],internal_RENAME_ACK [i]);
       }
     
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp	(revision 145)
@@ -28,66 +28,140 @@
     if (PORT_READ(in_NRESET) != 0)
       {
-        bool     have_branch_previous = false;
-        bool     can_continue [_param->_nb_front_end][_param->_max_nb_context];
+        bool rat_gpr_speculative_valid [_param->_nb_front_end][_param->_max_nb_context][_param->_max_nb_branch_speculated][_param->_nb_general_register_logic];
+        bool rat_spr_speculative_valid [_param->_nb_front_end][_param->_max_nb_context][_param->_max_nb_branch_speculated][_param->_nb_special_register_logic];
+        // bool reg_save_rat              [_param->_nb_front_end][_param->_max_nb_context];
 
         for (uint32_t i=0; i<_param->_nb_front_end; ++i)
           for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
-            can_continue [i][j] = true;
+            {
+              // reg_save_rat [i][j] = reg_SAVE_RAT [i][j];
+              for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+                {
+                  for (uint32_t l=0; l<_param->_nb_general_register_logic; ++l)
+                    rat_gpr_speculative_valid [i][j][k][l] = RAT_GPR_SPECULATIVE_VALID [i][j][k][l];
+                  for (uint32_t l=0; l<_param->_nb_special_register_logic; ++l)
+                    rat_spr_speculative_valid [i][j][k][l] = RAT_SPR_SPECULATIVE_VALID [i][j][k][l];
+                }
+            }
 
         for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
-          if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access
-            {
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RENAME [%d]",i);
-              
-              Tcontext_t front_end_id        = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
-              Tcontext_t context_id          = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
-              // bool       have_event          = (PORT_READ(in_RETIRE_EVENT_VAL [front_end_id][context_id]) and // always ack
-              //                                   (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) == EVENT_STATE_EVENT));
-              
-              bool       have_branch_current = PORT_READ(in_RENAME_SAVE_RAT [i]);
+          {
+            if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access
+              {
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RENAME [%d]",i);
+                
+                Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
+                Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
+                
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id       : %d",front_end_id);
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id         : %d",context_id);
 
-              // one branch per cycle
-              can_continue[front_end_id][context_id] &= not (have_branch_current and have_branch_previous);
+                Tdepth_t   depth_min    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[front_end_id][context_id]):0;
+                Tdepth_t   depth_max    = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[front_end_id][context_id]):0;
+                Tcontrol_t depth_full   = PORT_READ(in_DEPTH_FULL [front_end_id][context_id]);
 
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id         : %d",front_end_id);
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id           : %d",context_id);
-           // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_event           : %d",have_event);
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_branch_previous : %d",have_branch_previous);
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_branch_current  : %d",have_branch_current );
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * can_continue         : %d",can_continue[front_end_id][context_id]);
-              
-              Tgeneral_address_t num_reg_ra_log    = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register;
-              Tgeneral_address_t num_reg_rb_log    = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register;
-              Tspecial_address_t num_reg_rc_log    = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register;
-              Tgeneral_address_t num_reg_rd_log    = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register;
-              Tspecial_address_t num_reg_re_log    = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register;
-              
-              Tgeneral_address_t num_reg_ra_phy    = rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log];
-              Tgeneral_address_t num_reg_rb_phy    = rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log];
-              Tspecial_address_t num_reg_rc_phy    = rat_spr_speculative[front_end_id][context_id][num_reg_rc_log];
-              Tgeneral_address_t num_reg_rd_phy_old= rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log];
-              Tspecial_address_t num_reg_re_phy_old= rat_spr_speculative[front_end_id][context_id][num_reg_re_log];
-              
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_ra           : %d -> %d",num_reg_ra_log,num_reg_ra_phy    );
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rb           : %d -> %d",num_reg_rb_log,num_reg_rb_phy    );
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rc           : %d -> %d",num_reg_rc_log,num_reg_rc_phy    );
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd           : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old);
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re           : %d -> %d",num_reg_re_log,num_reg_re_phy_old);
-              
-              internal_RENAME_ACK [i] = can_continue[front_end_id][context_id];
-              PORT_WRITE(out_RENAME_ACK                [i],internal_RENAME_ACK [i]);
-              PORT_WRITE(out_RENAME_NUM_REG_RA_PHY     [i], num_reg_ra_phy    );
-              PORT_WRITE(out_RENAME_NUM_REG_RB_PHY     [i], num_reg_rb_phy    );
-              PORT_WRITE(out_RENAME_NUM_REG_RC_PHY     [i], num_reg_rc_phy    );
-              PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old);
-              PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old);
+                Tdepth_t   depth        = (_param->_have_port_depth       )?PORT_READ(in_RENAME_DEPTH        [i]):0;
+                // Tcontrol_t save_rat     = PORT_READ(in_RENAME_SAVE_RAT [i]);
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * depth/min/max/full : %d - [%d:%d] - %d",depth,depth_min,depth_max,depth_full);
+                // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save_rat (new)     : %d",save_rat);
+                // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save_rat (old)     : %d",reg_save_rat [front_end_id][context_id]);
+                
+                // if (reg_save_rat [front_end_id][context_id])
+                //   {
+                //     for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_general_register_logic; num_reg_log++)
+                //       rat_gpr_speculative_valid [front_end_id][context_id][depth][num_reg_log] = false;
+                //     for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_special_register_logic; num_reg_log++)
+                //       rat_spr_speculative_valid [front_end_id][context_id][depth][num_reg_log] = false;
+                //   }
+                
+                // reg_save_rat[front_end_id][context_id] = save_rat;
+                
+                Tgeneral_address_t num_reg_ra_log    = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register;
+                Tgeneral_address_t num_reg_rb_log    = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register;
+                Tspecial_address_t num_reg_rc_log    = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register;
+                Tgeneral_address_t num_reg_rd_log    = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register;
+                Tspecial_address_t num_reg_re_log    = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register;
+                
+                Tgeneral_address_t num_reg_ra_phy    ;
+                Tgeneral_address_t num_reg_rb_phy    ;
+                Tspecial_address_t num_reg_rc_phy    ;
+                Tgeneral_address_t num_reg_rd_phy_old;
+                Tspecial_address_t num_reg_re_phy_old;
+                        
+                bool find_ra = false;
+                bool find_rb = false;
+                bool find_rc = false;
+                bool find_rd = false;
+                bool find_re = false;
+                
+                for (uint32_t num_branch=0; num_branch<_param->_nb_branch_speculated[front_end_id][context_id]; ++num_branch)
+                  {
+                    uint32_t index = (depth-num_branch)%_param->_nb_branch_speculated[front_end_id][context_id];
 
-              internal_RENAME_SAVE [i] = have_branch_current;
+                    if (not find_ra and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_ra_log])
+                      {
+                        find_ra            = true;
+                        num_reg_ra_phy     = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_ra_log];
+                      }
+                    
+                    if (not find_rb and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_rb_log])
+                      {
+                        find_rb            = true;
+                        num_reg_rb_phy     = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rb_log];
+                      }
+                    
+                    if (not find_rc and rat_spr_speculative_valid [front_end_id][context_id][index][num_reg_rc_log])
+                      {
+                        find_rc            = true;
+                        num_reg_rc_phy     = RAT_SPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rc_log];
+                      }
+                    
+                    if (not find_rd and rat_gpr_speculative_valid [front_end_id][context_id][index][num_reg_rd_log])
+                      {
+                        find_rd            = true;
+                        num_reg_rd_phy_old = RAT_GPR_SPECULATIVE[front_end_id][context_id][index][num_reg_rd_log];
+                      }
+                    
+                    if (not find_re and rat_spr_speculative_valid [front_end_id][context_id][index][num_reg_re_log])
+                      {
+                        find_re            = true;
+                        num_reg_re_phy_old = RAT_SPR_SPECULATIVE[front_end_id][context_id][index][num_reg_re_log];
+                      }
 
-              // save info to the next instruction
-              have_branch_previous |= have_branch_current;
-            }
+                    // if index == depth_min, stop because depth_min is the not speculative.
+                    // if (index == depth_min)
+                    //   break;
+                  }
+                
+                if (not find_ra)
+                  num_reg_ra_phy     = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_ra_log];
+                if (not find_rb)
+                  num_reg_rb_phy     = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rb_log];
+                if (not find_rc)
+                  num_reg_rc_phy     = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rc_log];
+                if (not find_rd)
+                  num_reg_rd_phy_old = RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rd_log];
+                if (not find_re)
+                  num_reg_re_phy_old = RAT_SPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_re_log];
+                
+                // if rat_SPECULATIVE is valid, 
+                // then read rat_SPECULATIVE have the most valid alias register
+                // else, they have an previous event, the rat_NOT_SPECULATIVE have the valid register
+                
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_ra         : %d -> %d",num_reg_ra_log,num_reg_ra_phy    );
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rb         : %d -> %d",num_reg_rb_log,num_reg_rb_phy    );
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rc         : %d -> %d",num_reg_rc_log,num_reg_rc_phy    );
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd         : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old);
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re         : %d -> %d",num_reg_re_log,num_reg_re_phy_old);
+                
+                PORT_WRITE(out_RENAME_NUM_REG_RA_PHY     [i], num_reg_ra_phy    );
+                PORT_WRITE(out_RENAME_NUM_REG_RB_PHY     [i], num_reg_rb_phy    );
+                PORT_WRITE(out_RENAME_NUM_REG_RC_PHY     [i], num_reg_rc_phy    );
+                PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old);
+                PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old);
+              }
+          }
       }
-    
+
     log_end(Register_Address_Translation_unit,FUNCTION);
   };
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_depth_save_transition.cpp	(revision 145)
@@ -34,11 +34,30 @@
 	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
 	    {
-              rat_depth                 [i][j]    = 0;
-              rat_gpr_speculative       [i][j][0] = 0;
+	      RAT_GPR_NOT_SPECULATIVE   [i][j][0]    = 0;
+              RAT_GPR_SPECULATIVE_VALID [i][j][0][0] = false;
+              RAT_GPR_SPECULATIVE       [i][j][0][0] = 0    ; // not necessary
 
 	      for (uint32_t k=1; k<_param->_nb_general_register_logic; k++)
-                rat_gpr_speculative        [i][j][k] = gpr++;
+                {
+                  RAT_GPR_NOT_SPECULATIVE    [i][j][k]    = gpr++;
+                  for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
+                    {
+                      RAT_GPR_SPECULATIVE_VALID  [i][j][l][k] = false;
+                      RAT_GPR_SPECULATIVE        [i][j][l][k] = 0    ; // not necessary
+                    }
+                }
 	      for (uint32_t k=0; k<_param->_nb_special_register_logic; k++)
-                rat_spr_speculative        [i][j][k] = spr++; // not necessary
+                {
+                  RAT_SPR_NOT_SPECULATIVE    [i][j][k]    = spr++;
+                  for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
+                    {
+                      RAT_SPR_SPECULATIVE_VALID  [i][j][l][k] = false;
+                      RAT_SPR_SPECULATIVE        [i][j][l][k] = 0    ; // not necessary
+                    }
+                }
+
+              for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+                reg_RAT_USE [i][j][k] = false;
+              reg_SAVE_RAT [i][j] = false;
 	    }
       }
@@ -46,4 +65,9 @@
       {
 	// Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0)
+        bool free_rat [_param->_nb_front_end][_param->_max_nb_context][_param->_max_nb_branch_speculated];
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+            for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+              free_rat [i][j][k] = false;
 
 	// =====================================================
@@ -55,48 +79,60 @@
               {
                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RETIRE_EVENT [%d][%d]",i,j);
+
+                // Test if event have just occure
+                //   * if exception -> reset valid table (rat_NOT_SPECULATIVE have the good value)
                 
-                // Test if event have just occure
                 if (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT)
-                  {
-                    switch (PORT_READ(in_RETIRE_EVENT_TYPE [i][j]))
+                  switch (PORT_READ(in_RETIRE_EVENT_TYPE [i][j]))
+                    {
+                    case EVENT_TYPE_BRANCH_MISS_SPECULATION :
                       {
-                      case EVENT_TYPE_BRANCH_MISS_SPECULATION :
-                      case EVENT_TYPE_LOAD_MISS_SPECULATION   :
-                        {
-                          // Miss speculation (branch or load)
-                          // Restore contexte and update depth
-
-                          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * MISS_SPECULATION : Restore RAT");
-
-                          Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_RETIRE_EVENT_DEPTH [i][j]):0;
-
-                          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth : %d",depth);
-                          
-                          // restore GPR
-                          for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++)
-                            rat_gpr_speculative [i][j][num_gpr] = rat_gpr_save [i][j][depth][num_gpr];
-                          
-                          // restore SPR
-                          for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++)
-                            rat_spr_speculative [i][j][num_spr] = rat_spr_save [i][j][depth][num_spr];
-                          
-                          // update rat_depth
-                          rat_depth[i][j] = depth;
-                          
-                          break;
-                        }
-                        // case EVENT_TYPE_EXCEPTION               :
-                        // case EVENT_TYPE_SPR_ACCESS              :
-                        // case EVENT_TYPE_MSYNC                   :
-                        // case EVENT_TYPE_PSYNC                   :
-                        // case EVENT_TYPE_CSYNC                   :
-                      default :
-                        {
-                          // nothing
-                          break;
-                        }
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * BRANCH_MISS_SPECULATION - Reset Update Table");
+
+                        reg_SAVE_RAT [i][j] = true;
+                        
+                        Tdepth_t   depth      = (_param->_have_port_depth)?PORT_READ(in_RETIRE_EVENT_DEPTH[i][j]):0;
+                        Tdepth_t   depth_min  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[i][j]):0;
+                        Tdepth_t   depth_max  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[i][j]):0;
+                        Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL [i][j]);
+                        
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth      : %d",depth);
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth_min  : %d",depth_min);
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth_max  : %d",depth_max);
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth_full : %d",depth_full);
+
+                        Tdepth_t   it        = depth_min;
+                        
+                        for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+                          {
+                            it = (it-1)%_param->_nb_branch_speculated[i][j];
+
+                            if (it == depth)
+                              break;
+                            
+                            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"        * flush    : %d",it);
+                            
+                            free_rat[i][j][it] = true;
+                          }
+                        
+                        break;
                       }
-                  
-                  }
+                    case EVENT_TYPE_EXCEPTION :
+                      {
+                        log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * EXCEPTION - Reset Update Table");
+                        
+                        reg_SAVE_RAT [i][j] = true;
+
+                        // Reset validity table
+                        for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+                          free_rat [i][j][k] = true;
+                        
+                        break;
+                      }
+                    default :
+                      {
+                        break;
+                      }
+                    }
               }
 
@@ -114,15 +150,36 @@
 	      Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
 	      Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
-              Tcontrol_t save         = internal_RENAME_SAVE [i];
+              Tcontrol_t write_rd     = PORT_READ(in_INSERT_WRITE_RD [i]);
+              Tcontrol_t write_re     = PORT_READ(in_INSERT_WRITE_RE [i]);
+              Tdepth_t   depth        = (_param->_have_port_depth       )?PORT_READ(in_RENAME_DEPTH        [i]):0;
+              Tcontrol_t save_rat     = reg_SAVE_RAT[front_end_id][context_id];
+              // TODO SAVE_RAT
 
               log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end          : %d",front_end_id);
               log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context            : %d",context_id);
-              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save               : %d",save);
-
-	      // Test if write and modifie RAT (RD and RE)
-
-              Tcontrol_t write_rd     = PORT_READ(in_INSERT_WRITE_RD [i]);
-              Tcontrol_t write_re     = PORT_READ(in_INSERT_WRITE_RE [i]);
-
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * depth              : %d",depth);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save_rat (old)     : %d",save_rat);
+
+              if (save_rat)
+                {
+// #ifdef DEBUG_TEST
+//                   if (reg_RAT_USE[front_end_id][context_id][depth])
+//                     throw ERRORMORPHEO(FUNCTION,toString(_("Invalid RAT and need save_rat (%d).\n"),depth));
+// #endif
+                  reg_RAT_USE[front_end_id][context_id][depth] = true;
+                  
+                  // new branch, new RAT
+                  for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_general_register_logic; num_reg_log++)
+                    RAT_GPR_SPECULATIVE_VALID [front_end_id][context_id][depth][num_reg_log] = false;
+                  for (uint32_t num_reg_log=0; num_reg_log<_param->_nb_special_register_logic; num_reg_log++)
+                    RAT_SPR_SPECULATIVE_VALID [front_end_id][context_id][depth][num_reg_log] = false;
+                }
+
+              save_rat = PORT_READ(in_RENAME_SAVE_RAT [i]);
+              reg_SAVE_RAT[front_end_id][context_id] = save_rat;
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save_rat (new)     : %d",save_rat);
+	      
+	      // Test if write and modifie RAT
               log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_rd           : %d",write_rd);
 	      if (write_rd == 1)
@@ -134,5 +191,6 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy     : %d",num_reg_rd_phy);
 
-                  rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy;
+                  RAT_GPR_SPECULATIVE       [front_end_id][context_id][depth][num_reg_rd_log] = num_reg_rd_phy;
+                  RAT_GPR_SPECULATIVE_VALID [front_end_id][context_id][depth][num_reg_rd_log] = true;
                 }
 
@@ -146,30 +204,6 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy     : %d",num_reg_re_phy);
 
-                  rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy;
-                }
-
-              if (save)
-                {
-                  // Need save RAT
-
-                  Tdepth_t depth = (_param->_have_port_depth       )?PORT_READ(in_RENAME_DEPTH        [i]):0;
-
-                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth old - new  : %d",depth);
-
-// #ifdef DEBUG_TEST
-//                   if (depth != ((depth_old+1)%_param->_nb_branch_speculated[front_end_id][context_id]))
-//                     throw ERRORMORPHEO(FUNCTION,toString(_("Rename : Invalid depth (old : %d, new : %d).\n"),depth_old,depth));
-// #endif
-
-                  // save GPR
-                  for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++)
-                    rat_gpr_save [front_end_id][context_id][depth][num_gpr] = rat_gpr_speculative [front_end_id][context_id][num_gpr];
-
-                  // save SPR
-                  for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++)
-                    rat_spr_save [front_end_id][context_id][depth][num_spr] = rat_spr_speculative [front_end_id][context_id][num_spr];
-
-                  // update rat_depth with new depth
-                  rat_depth[front_end_id][context_id] = depth;
+                  RAT_SPR_SPECULATIVE       [front_end_id][context_id][depth][num_reg_re_log] = num_reg_re_phy;
+                  RAT_SPR_SPECULATIVE_VALID [front_end_id][context_id][depth][num_reg_re_log] = true;
                 }
 	    }
@@ -179,19 +213,13 @@
 	// =====================================================
 	// Second : interface retire
-	//  (because if an event on the same thread : the instruction is already renamed)
-	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
-	  if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i])
-	    {
+	// if event AND event is exception, restore rat_NOT_SPECULATIVE
+
+        for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+          if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i])
+            {
               log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RETIRE [%d]",i);
 
-	      // if no event : no effect, because the RAT content the most recently register
-	      // but if they have a event (exception or miss speculation), the rat must restore the oldest value
-	      // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register
-	      // the retire interface became of the Re Order Buffer, also is in program sequence !
-
-#ifdef DEBUG
               Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0;
               Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RETIRE_CONTEXT_ID   [i]):0;
-#endif
               Tcontrol_t write_rd     = PORT_READ(in_RETIRE_WRITE_RD [i]);
               Tcontrol_t write_re     = PORT_READ(in_RETIRE_WRITE_RE [i]);
@@ -206,7 +234,5 @@
               if (write_rd == 1)
                 {
-#ifdef DEBUG
                   Tgeneral_address_t num_reg_rd_log     = PORT_READ(in_RETIRE_NUM_REG_RD_LOG     [i]);
-#endif
 
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_log     : %d",num_reg_rd_log    );
@@ -214,10 +240,9 @@
                   if (not restore)
                     {
-#ifdef DEBUG
                   Tgeneral_address_t num_reg_rd_phy_new = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]);
-#endif
+
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy_new : %d",num_reg_rd_phy_new);
 
-                  // rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
+                  RAT_GPR_NOT_SPECULATIVE [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
                     }
                 }
@@ -226,23 +251,81 @@
               if (write_re == 1)
                 {
-#ifdef DEBUG
                   Tspecial_address_t num_reg_re_log     = PORT_READ(in_RETIRE_NUM_REG_RE_LOG     [i]);
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_log     : %d",num_reg_re_log    );
+
+                  if (not restore)
+                    {
+                  Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]);
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy_new : %d",num_reg_re_phy_new);
+
+                  RAT_SPR_NOT_SPECULATIVE [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
+                    }
+                }
+            }
+
+	// =====================================================
+	// ====[ DEPTH ]========================================
+	// =====================================================
+#if 1
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+            {
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * DEPTH[%d][%d]",i,j);
+
+              Tdepth_t   depth_min  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN[i][j]):0;
+              Tdepth_t   depth_max  = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX[i][j]):0;
+              Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL [i][j]);
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * depth_min  : %d",depth_min);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * depth_max  : %d",depth_max);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * depth_full : %d",depth_full);
+              
+              if (not depth_full)
+                {
+                  Tdepth_t depth     = depth_max;
+
+                  for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+                    {
+                      if (depth == depth_min)
+                        break;
+
+                      if (reg_RAT_USE[i][j][depth])
+                        {
+                          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * flush    : %d",depth);
+                  
+                          free_rat [i][j][depth] = true;
+                          // reg_RAT_USE[i][j][depth] = false;
+
+                          // for (uint32_t l=0; l<_param->_nb_general_register_logic; l++)
+                          //   RAT_GPR_SPECULATIVE_VALID  [i][j][depth][l] = false;
+                          // for (uint32_t l=0; l<_param->_nb_special_register_logic; l++)
+                          //   RAT_SPR_SPECULATIVE_VALID  [i][j][depth][l] = false;
+                        }
+
+                      depth = (depth+1)%_param->_nb_branch_speculated[i][j];
+                    }
+                }
+            }
 #endif
-
-                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_log     : %d",num_reg_re_log    );
-
-                  if (not restore)
-                    {
-#ifdef DEBUG
-                  Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]);
-#endif
-
-                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy_new : %d",num_reg_re_phy_new);
-
-                  // rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
-                    }
-                }
-
-	    }
+	// =====================================================
+	// ====[ FREE RAT ]=====================================
+	// =====================================================
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+            for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+              if (free_rat[i][j][k])
+                {
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * Free RAT : [%d][%d][%d]",i,j,k);
+                  
+                  reg_RAT_USE[i][j][k] = false;
+                  
+                  for (uint32_t l=0; l<_param->_nb_general_register_logic; l++)
+                    RAT_GPR_SPECULATIVE_VALID  [i][j][k][l] = false;
+                  for (uint32_t l=0; l<_param->_nb_special_register_logic; l++)
+                    RAT_SPR_SPECULATIVE_VALID  [i][j][k][l] = false;
+                }
+
       }
 
@@ -255,36 +338,40 @@
         for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
           {
-            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end[%d].context[%d] - rat_depth : %d",i,j,rat_depth[i][j]);
-          
-            for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit)
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end[%d].context[%d] - SAVE_RAT : %d",i,j,reg_SAVE_RAT[i][j]);
+              
+            for (uint32_t l=0; l<_param->_nb_general_register_logic; l+=limit)
               {
                 std::string str = "";
                 for (uint32_t x=0; x<limit; x++)
                   {
-                    uint32_t index = k+x;
+                    uint32_t index = l+x;
                     if (index >= _param->_nb_general_register_logic)
                       break;
                     else
-                      str+=toString("GPR[%.4d] - %.5d | ",index,rat_gpr_speculative [i][j][index]);
+                      str+=toString("GPR[%.4d]       -   %.5d | ",index,RAT_GPR_NOT_SPECULATIVE [i][j][index]);
                   }
                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
               }
 
-            for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
-              for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit)
-                {
-                  std::string str = "";
-                  for (uint32_t x=0; x<limit; x++)
-                    {
-                      uint32_t index = k+x;
-                      if (index >= _param->_nb_general_register_logic)
-                        break;
-                      else
-                        str+=toString("GPR_%d[%.4d] - %.5d | ",l,index,rat_gpr_save [i][j][l][index]);
-                    }
-                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
-                }
-            
-            for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit)
+            for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+              {
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * GPR      [%.4d] - USE : %d",k,reg_RAT_USE [i][j][k]);
+
+                for (uint32_t l=0; l<_param->_nb_general_register_logic; l+=limit)
+                  {
+                    std::string str = "";
+                    for (uint32_t x=0; x<limit; x++)
+                      {
+                        uint32_t index = l+x;
+                        if (index >= _param->_nb_general_register_logic)
+                          break;
+                        else
+                          str+=toString("GPR[%.4d][%.4d] - %.1d %.5d | ",index,k,RAT_GPR_SPECULATIVE_VALID [i][j][k][index],RAT_GPR_SPECULATIVE [i][j][k][index]);
+                      }
+                    log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+                  }
+              }
+
+            for (uint32_t l=0; l<_param->_nb_special_register_logic; l+=limit)
               {
                 std::string str = "";
@@ -292,28 +379,33 @@
                 for (uint32_t x=0; x<limit; x++)
                   {
-                    uint32_t index = k+x;
+                    uint32_t index = l+x;
                     if (index >= _param->_nb_special_register_logic)
                       break;
                     else
-                      str+=toString("SPR[%.4d] - %.5d | ",index,rat_spr_speculative [i][j][index]);
+                      str+=toString("SPR[%.4d]       -   %.5d | ",index,RAT_SPR_NOT_SPECULATIVE [i][j][index]);
                   }
                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
               }
 
-            for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
-              for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit)
-                {
-                  std::string str = "";
-                  for (uint32_t x=0; x<limit; x++)
-                    {
-                      uint32_t index = k+x;
-                      if (index >= _param->_nb_special_register_logic)
-                        break;
-                      else
-                        str+=toString("SPR_%d[%.4d] - %.5d | ",l,index,rat_spr_save [i][j][l][index]);
-                    }
-                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
-                }
-
+      
+            for (uint32_t k=0; k<_param->_nb_branch_speculated[i][j]; ++k)
+              {
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * SPR      [%.4d] - USE : %d",k,reg_RAT_USE [i][j][k]);
+                
+                for (uint32_t l=0; l<_param->_nb_special_register_logic; l+=limit)
+                  {
+                    std::string str = "";
+                    
+                    for (uint32_t x=0; x<limit; x++)
+                      {
+                        uint32_t index = l+x;
+                        if (index >= _param->_nb_special_register_logic)
+                          break;
+                        else
+                          str+=toString("SPR[%.4d][%.4d] - %.1d %.5d | ",index,k,RAT_SPR_SPECULATIVE_VALID [i][j][k][index],RAT_SPR_SPECULATIVE [i][j][k][index]);
+                      }
+                    log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+                  }
+              }
           }
     }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_genMealy_rename.cpp	(revision 145)
@@ -52,9 +52,9 @@
         // else, they have an previous event, the rat_not_speculative have the valid register
 
-        Tgeneral_address_t num_reg_ra_phy    = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_ra_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_ra_log];
-        Tgeneral_address_t num_reg_rb_phy    = (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rb_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rb_log];
-        Tspecial_address_t num_reg_rc_phy    = (rat_spr_speculative_valid[front_end_id][context_id][num_reg_rc_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_rc_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_rc_log];
-        Tgeneral_address_t num_reg_rd_phy_old= (rat_gpr_speculative_valid[front_end_id][context_id][num_reg_rd_log] and not have_event)?rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log]:rat_gpr_not_speculative[front_end_id][context_id][num_reg_rd_log];
-        Tspecial_address_t num_reg_re_phy_old= (rat_spr_speculative_valid[front_end_id][context_id][num_reg_re_log] and not have_event)?rat_spr_speculative[front_end_id][context_id][num_reg_re_log]:rat_spr_not_speculative[front_end_id][context_id][num_reg_re_log];
+        Tgeneral_address_t num_reg_ra_phy    = (RAT_GPR_SPECULATIVE_VALID[front_end_id][context_id][0][num_reg_ra_log] and not have_event)?RAT_GPR_SPECULATIVE[front_end_id][context_id][0][num_reg_ra_log]:RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_ra_log];
+        Tgeneral_address_t num_reg_rb_phy    = (RAT_GPR_SPECULATIVE_VALID[front_end_id][context_id][0][num_reg_rb_log] and not have_event)?RAT_GPR_SPECULATIVE[front_end_id][context_id][0][num_reg_rb_log]:RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rb_log];
+        Tspecial_address_t num_reg_rc_phy    = (RAT_SPR_SPECULATIVE_VALID[front_end_id][context_id][0][num_reg_rc_log] and not have_event)?RAT_SPR_SPECULATIVE[front_end_id][context_id][0][num_reg_rc_log]:RAT_SPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rc_log];
+        Tgeneral_address_t num_reg_rd_phy_old= (RAT_GPR_SPECULATIVE_VALID[front_end_id][context_id][0][num_reg_rd_log] and not have_event)?RAT_GPR_SPECULATIVE[front_end_id][context_id][0][num_reg_rd_log]:RAT_GPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_rd_log];
+        Tspecial_address_t num_reg_re_phy_old= (RAT_SPR_SPECULATIVE_VALID[front_end_id][context_id][0][num_reg_re_log] and not have_event)?RAT_SPR_SPECULATIVE[front_end_id][context_id][0][num_reg_re_log]:RAT_SPR_NOT_SPECULATIVE[front_end_id][context_id][num_reg_re_log];
 
         log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_ra         : %d -> %d",num_reg_ra_log,num_reg_ra_phy    );
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp	(revision 144)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_function_one_save_transition.cpp	(revision 145)
@@ -34,19 +34,19 @@
 	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
 	    {
-	      rat_gpr_not_speculative   [i][j][0] = 0;
-              rat_gpr_speculative_valid [i][j][0] = false;
-              rat_gpr_speculative       [i][j][0] = 0    ; // not necessary
+	      RAT_GPR_NOT_SPECULATIVE   [i][j][0]    = 0;
+              RAT_GPR_SPECULATIVE_VALID [i][j][0][0] = false;
+              RAT_GPR_SPECULATIVE       [i][j][0][0] = 0    ; // not necessary
 
 	      for (uint32_t k=1; k<_param->_nb_general_register_logic; k++)
                 {
-                  rat_gpr_not_speculative    [i][j][k] = gpr++;
-                  rat_gpr_speculative_valid  [i][j][k] = false;
-                  rat_gpr_speculative        [i][j][k] = 0    ; // not necessary
+                  RAT_GPR_NOT_SPECULATIVE    [i][j][k]    = gpr++;
+                  RAT_GPR_SPECULATIVE_VALID  [i][j][0][k] = false;
+                  RAT_GPR_SPECULATIVE        [i][j][0][k] = 0    ; // not necessary
                 }
 	      for (uint32_t k=0; k<_param->_nb_special_register_logic; k++)
                 {
-                  rat_spr_not_speculative    [i][j][k] = spr++;
-                  rat_spr_speculative_valid  [i][j][k] = false;
-                  rat_spr_speculative        [i][j][k] = 0    ; // not necessary
+                  RAT_SPR_NOT_SPECULATIVE    [i][j][k]    = spr++;
+                  RAT_SPR_SPECULATIVE_VALID  [i][j][0][k] = false;
+                  RAT_SPR_SPECULATIVE        [i][j][0][k] = 0    ; // not necessary
                 }
 	    }
@@ -69,7 +69,7 @@
                   // Reset validity table
                   for (uint32_t k=0; k<_param->_nb_general_register_logic; k++)
-                    rat_gpr_speculative_valid [i][j][k] = false;
+                    RAT_GPR_SPECULATIVE_VALID [i][j][0][k] = false;
                   for (uint32_t k=0; k<_param->_nb_special_register_logic; k++)
-                    rat_spr_speculative_valid [i][j][k] = false;
+                    RAT_SPR_SPECULATIVE_VALID [i][j][0][k] = false;
                 }
 
@@ -103,6 +103,6 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy     : %d",num_reg_rd_phy);
 
-                  rat_gpr_speculative       [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy;
-                  rat_gpr_speculative_valid [front_end_id][context_id][num_reg_rd_log] = true;
+                  RAT_GPR_SPECULATIVE       [front_end_id][context_id][0][num_reg_rd_log] = num_reg_rd_phy;
+                  RAT_GPR_SPECULATIVE_VALID [front_end_id][context_id][0][num_reg_rd_log] = true;
                 }
 
@@ -116,6 +116,6 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy     : %d",num_reg_re_phy);
 
-                  rat_spr_speculative       [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy;
-                  rat_spr_speculative_valid [front_end_id][context_id][num_reg_re_log] = true;
+                  RAT_SPR_SPECULATIVE       [front_end_id][context_id][0][num_reg_re_log] = num_reg_re_phy;
+                  RAT_SPR_SPECULATIVE_VALID [front_end_id][context_id][0][num_reg_re_log] = true;
                 }
 	    }
@@ -160,5 +160,5 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy_new : %d",num_reg_rd_phy_new);
 
-                  rat_gpr_not_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
+                  RAT_GPR_NOT_SPECULATIVE [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
                     }
                 }
@@ -177,5 +177,5 @@
                   log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy_new : %d",num_reg_re_phy_new);
 
-                  rat_spr_not_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
+                  RAT_SPR_NOT_SPECULATIVE [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
                     }
                 }
@@ -203,5 +203,5 @@
                       break;
                     else
-                      str+=toString("GPR[%.4d] - %.1d %.5d (%.5d) | ",index,rat_gpr_speculative_valid [i][j][index],rat_gpr_speculative [i][j][index],rat_gpr_not_speculative [i][j][index]);
+                      str+=toString("GPR[%.4d] - %.1d %.5d (%.5d) | ",index,RAT_GPR_SPECULATIVE_VALID [i][j][0][index],RAT_GPR_SPECULATIVE [i][j][0][index],RAT_GPR_NOT_SPECULATIVE [i][j][index]);
                   }
                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
@@ -218,5 +218,5 @@
                       break;
                     else
-                      str+=toString("SPR[%.4d] - %.1d %.5d (%.5d) | ",index,rat_spr_speculative_valid [i][j][index],rat_spr_speculative [i][j][index],rat_spr_not_speculative [i][j][index]);
+                      str+=toString("SPR[%.4d] - %.1d %.5d (%.5d) | ",index,RAT_SPR_SPECULATIVE_VALID [i][j][0][index],RAT_SPR_SPECULATIVE [i][j][0][index],RAT_SPR_NOT_SPECULATIVE [i][j][index]);
                   }
                 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
@@ -235,10 +235,10 @@
               for (uint32_t y=x+1; y<_param->_nb_general_register_logic; ++y)
                 {
-                  if (rat_gpr_speculative_valid [i][j][x] and
-                      rat_gpr_speculative_valid [i][j][y] and
-                      (rat_gpr_speculative[i][j][x] == rat_gpr_speculative[i][j][y]))
-                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_speculative[%d][%d][%d] == rat_gpr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_speculative[i][j][x]));
-                  if (rat_gpr_not_speculative[i][j][x] == rat_gpr_not_speculative[i][j][y])
-                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_gpr_not_speculative[%d][%d][%d] == rat_gpr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_gpr_not_speculative[i][j][x]));
+                  if (RAT_GPR_SPECULATIVE_VALID [i][j][0][x] and
+                      RAT_GPR_SPECULATIVE_VALID [i][j][0][y] and
+                      (RAT_GPR_SPECULATIVE[i][j][0][x] == RAT_GPR_SPECULATIVE[i][j][0][y]))
+                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, RAT_GPR_SPECULATIVE[%d][%d][0][%d] == RAT_GPR_SPECULATIVE[%d][%d][0][%d] == %d"),i,j,x,i,j,y,RAT_GPR_SPECULATIVE[i][j][0][x]));
+                  if (RAT_GPR_NOT_SPECULATIVE[i][j][x] == RAT_GPR_NOT_SPECULATIVE[i][j][y])
+                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, RAT_GPR_NOT_SPECULATIVE[%d][%d][%d] == RAT_GPR_NOT_SPECULATIVE[%d][%d][%d] == %d"),i,j,x,i,j,y,RAT_GPR_NOT_SPECULATIVE[i][j][x]));
                   
                 }
@@ -246,10 +246,10 @@
               for (uint32_t y=x+1; y<_param->_nb_special_register_logic; ++y)
                 {
-                  if(rat_spr_speculative_valid [i][j][x] and
-                     rat_spr_speculative_valid [i][j][y] and
-                     (rat_spr_speculative[i][j][x] == rat_spr_speculative[i][j][y]))
-                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_speculative[%d][%d][%d] == rat_spr_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_speculative[i][j][x]));
-                  if (rat_spr_not_speculative[i][j][x] == rat_spr_not_speculative[i][j][y])
-                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, rat_spr_not_speculative[%d][%d][%d] == rat_spr_not_speculative[%d][%d][%d] == %d"),i,j,x,i,j,y,rat_spr_not_speculative[i][j][x]));
+                  if(RAT_SPR_SPECULATIVE_VALID [i][j][0][x] and
+                     RAT_SPR_SPECULATIVE_VALID [i][j][0][y] and
+                     (RAT_SPR_SPECULATIVE[i][j][0][x] == RAT_SPR_SPECULATIVE[i][j][0][y]))
+                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, RAT_SPR_SPECULATIVE[%d][%d][0][%d] == RAT_SPR_SPECULATIVE[%d][%d][0][%d] == %d"),i,j,x,i,j,y,RAT_SPR_SPECULATIVE[i][j][0][x]));
+                  if (RAT_SPR_NOT_SPECULATIVE[i][j][x] == RAT_SPR_NOT_SPECULATIVE[i][j][y])
+                    throw ERRORMORPHEO (FUNCTION,toString(_("In RAT, RAT_SPR_NOT_SPECULATIVE[%d][%d][%d] == RAT_SPR_NOT_SPECULATIVE[%d][%d][%d] == %d"),i,j,x,i,j,y,RAT_SPR_NOT_SPECULATIVE[i][j][x]));
                   
                 }
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_constant.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_constant.cpp	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_constant.cpp	(revision 145)
@@ -0,0 +1,63 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_address_translation_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::function_depth_save_constant"
+  void Register_Address_Translation_unit::function_depth_save_constant (void)
+  {
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
+
+    // Constant : accepted already transaction
+    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+        internal_INSERT_ACK [i] = 1;
+        
+        PORT_WRITE(out_INSERT_ACK[i],internal_INSERT_ACK [i]);
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
+        internal_RETIRE_ACK [i] = 1;
+        
+        PORT_WRITE(out_RETIRE_ACK[i],internal_RETIRE_ACK [i]);
+      }
+    
+    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+        {
+          internal_RETIRE_EVENT_ACK [i][j] = 1;
+          
+          PORT_WRITE(out_RETIRE_EVENT_ACK[i][j],internal_RETIRE_EVENT_ACK [i][j]);
+        }
+    
+    log_end(Register_Address_Translation_unit,FUNCTION);
+  };
+
+}; // end namespace register_address_translation_unit
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_genMealy_rename.cpp	(revision 145)
@@ -0,0 +1,104 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_address_translation_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::function_depth_save_genMealy_rename"
+  void Register_Address_Translation_unit::function_depth_save_genMealy_rename (void)
+  {
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
+
+    if (PORT_READ(in_NRESET) != 0)
+      {
+        bool     have_branch_previous = false;
+        bool     can_continue [_param->_nb_front_end][_param->_max_nb_context];
+
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+            can_continue [i][j] = true;
+
+        for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+          if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access
+            {
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RENAME [%d]",i);
+              
+              Tcontext_t front_end_id        = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
+              Tcontext_t context_id          = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
+              // bool       have_event          = (PORT_READ(in_RETIRE_EVENT_VAL [front_end_id][context_id]) and // always ack
+              //                                   (PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]) == EVENT_STATE_EVENT));
+              
+              bool       have_branch_current = PORT_READ(in_RENAME_SAVE_RAT [i]);
+
+              // one branch per cycle
+              can_continue[front_end_id][context_id] &= not (have_branch_current and have_branch_previous);
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id         : %d",front_end_id);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id           : %d",context_id);
+           // log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_event           : %d",have_event);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_branch_previous : %d",have_branch_previous);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * have_branch_current  : %d",have_branch_current );
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * can_continue         : %d",can_continue[front_end_id][context_id]);
+              
+              Tgeneral_address_t num_reg_ra_log    = PORT_READ(in_RENAME_NUM_REG_RA_LOG [i]); //%_param->_nb_general_register;
+              Tgeneral_address_t num_reg_rb_log    = PORT_READ(in_RENAME_NUM_REG_RB_LOG [i]); //%_param->_nb_general_register;
+              Tspecial_address_t num_reg_rc_log    = PORT_READ(in_RENAME_NUM_REG_RC_LOG [i]); //%_param->_nb_special_register;
+              Tgeneral_address_t num_reg_rd_log    = PORT_READ(in_RENAME_NUM_REG_RD_LOG [i]); //%_param->_nb_general_register;
+              Tspecial_address_t num_reg_re_log    = PORT_READ(in_RENAME_NUM_REG_RE_LOG [i]); //%_param->_nb_special_register;
+              
+              Tgeneral_address_t num_reg_ra_phy    = rat_gpr_speculative[front_end_id][context_id][num_reg_ra_log];
+              Tgeneral_address_t num_reg_rb_phy    = rat_gpr_speculative[front_end_id][context_id][num_reg_rb_log];
+              Tspecial_address_t num_reg_rc_phy    = rat_spr_speculative[front_end_id][context_id][num_reg_rc_log];
+              Tgeneral_address_t num_reg_rd_phy_old= rat_gpr_speculative[front_end_id][context_id][num_reg_rd_log];
+              Tspecial_address_t num_reg_re_phy_old= rat_spr_speculative[front_end_id][context_id][num_reg_re_log];
+              
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_ra           : %d -> %d",num_reg_ra_log,num_reg_ra_phy    );
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rb           : %d -> %d",num_reg_rb_log,num_reg_rb_phy    );
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rc           : %d -> %d",num_reg_rc_log,num_reg_rc_phy    );
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd           : %d -> %d",num_reg_rd_log,num_reg_rd_phy_old);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re           : %d -> %d",num_reg_re_log,num_reg_re_phy_old);
+              
+              internal_RENAME_ACK [i] = can_continue[front_end_id][context_id];
+              PORT_WRITE(out_RENAME_ACK                [i],internal_RENAME_ACK [i]);
+              PORT_WRITE(out_RENAME_NUM_REG_RA_PHY     [i], num_reg_ra_phy    );
+              PORT_WRITE(out_RENAME_NUM_REG_RB_PHY     [i], num_reg_rb_phy    );
+              PORT_WRITE(out_RENAME_NUM_REG_RC_PHY     [i], num_reg_rc_phy    );
+              PORT_WRITE(out_RENAME_NUM_REG_RD_PHY_OLD [i], num_reg_rd_phy_old);
+              PORT_WRITE(out_RENAME_NUM_REG_RE_PHY_OLD [i], num_reg_re_phy_old);
+
+              internal_RENAME_SAVE [i] = have_branch_current;
+
+              // save info to the next instruction
+              have_branch_previous |= have_branch_current;
+            }
+      }
+    
+    log_end(Register_Address_Translation_unit,FUNCTION);
+  };
+
+}; // end namespace register_address_translation_unit
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_transition.cpp	(revision 145)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/old/Register_Address_Translation_unit_function_depth_save_transition.cpp	(revision 145)
@@ -0,0 +1,334 @@
+#ifdef SYSTEMC
+/*
+ * $Id$
+ *
+ * [ Description ]
+ * 
+ */
+
+#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/include/Register_Address_Translation_unit.h"
+
+namespace morpheo                    {
+namespace behavioural {
+namespace core {
+namespace multi_ooo_engine {
+namespace ooo_engine {
+namespace rename_unit {
+namespace register_translation_unit {
+namespace register_address_translation_unit {
+
+
+#undef  FUNCTION
+#define FUNCTION "Register_Address_Translation_unit::function_depth_save_transition"
+  void Register_Address_Translation_unit::function_depth_save_transition (void)
+  {
+    log_begin(Register_Address_Translation_unit,FUNCTION);
+    log_function(Register_Address_Translation_unit,FUNCTION,_name.c_str());
+
+    if (PORT_READ(in_NRESET) == 0)
+      {
+	uint32_t gpr = 1;
+	uint32_t spr = 0;
+
+	for (uint32_t i=0; i<_param->_nb_front_end; i++)
+	  for (uint32_t j=0; j<_param->_nb_context[i]; j++)
+	    {
+              rat_depth                 [i][j]    = 0;
+              rat_gpr_speculative       [i][j][0] = 0;
+
+	      for (uint32_t k=1; k<_param->_nb_general_register_logic; k++)
+                rat_gpr_speculative        [i][j][k] = gpr++;
+	      for (uint32_t k=0; k<_param->_nb_special_register_logic; k++)
+                rat_spr_speculative        [i][j][k] = spr++; // not necessary
+	    }
+      }
+    else
+      {
+	// Note : GPR[0] is never write (in decod's stage : write_rd = 0 when num_reg_rd_log == 0)
+
+	// =====================================================
+	// ====[ RETIRE_EVENT ]=================================
+	// =====================================================
+        for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+          for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+            if (PORT_READ(in_RETIRE_EVENT_VAL [i][j]) and internal_RETIRE_EVENT_ACK [i][j])
+              {
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RETIRE_EVENT [%d][%d]",i,j);
+                
+                // Test if event have just occure
+                if (PORT_READ(in_RETIRE_EVENT_STATE [i][j]) == EVENT_STATE_EVENT)
+                  {
+                    switch (PORT_READ(in_RETIRE_EVENT_TYPE [i][j]))
+                      {
+                      case EVENT_TYPE_BRANCH_MISS_SPECULATION :
+                      case EVENT_TYPE_LOAD_MISS_SPECULATION   :
+                        {
+                          // Miss speculation (branch or load)
+                          // Restore contexte and update depth
+
+                          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * MISS_SPECULATION : Restore RAT");
+
+                          Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_RETIRE_EVENT_DEPTH [i][j]):0;
+
+                          log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth : %d",depth);
+                          
+                          // restore GPR
+                          for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++)
+                            rat_gpr_speculative [i][j][num_gpr] = rat_gpr_save [i][j][depth][num_gpr];
+                          
+                          // restore SPR
+                          for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++)
+                            rat_spr_speculative [i][j][num_spr] = rat_spr_save [i][j][depth][num_spr];
+                          
+                          // update rat_depth
+                          rat_depth[i][j] = depth;
+                          
+                          break;
+                        }
+                        // case EVENT_TYPE_EXCEPTION               :
+                        // case EVENT_TYPE_SPR_ACCESS              :
+                        // case EVENT_TYPE_MSYNC                   :
+                        // case EVENT_TYPE_PSYNC                   :
+                        // case EVENT_TYPE_CSYNC                   :
+                      default :
+                        {
+                          // nothing
+                          break;
+                        }
+                      }
+                  
+                  }
+              }
+
+	// =====================================================
+	// ====[ INSERT ]=======================================
+	// =====================================================
+	// First : interface insert
+        // this instruction is speculative !!!
+	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+	  // Test transaction
+	  if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK  [i])
+	    {
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * INSERT [%d]",i);
+
+	      Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_FRONT_END_ID [i]):0;
+	      Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_CONTEXT_ID   [i]):0;
+              Tcontrol_t save         = internal_RENAME_SAVE [i];
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end          : %d",front_end_id);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context            : %d",context_id);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * save               : %d",save);
+
+	      // Test if write and modifie RAT (RD and RE)
+
+              Tcontrol_t write_rd     = PORT_READ(in_INSERT_WRITE_RD [i]);
+              Tcontrol_t write_re     = PORT_READ(in_INSERT_WRITE_RE [i]);
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_rd           : %d",write_rd);
+	      if (write_rd == 1)
+                {
+                  Tgeneral_address_t num_reg_rd_log = PORT_READ(in_INSERT_NUM_REG_RD_LOG [i]);
+                  Tgeneral_address_t num_reg_rd_phy = PORT_READ(in_INSERT_NUM_REG_RD_PHY [i]);
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_log     : %d",num_reg_rd_log);
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy     : %d",num_reg_rd_phy);
+
+                  rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy;
+                }
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_re           : %d",write_re);
+	      if (write_re == 1)
+                {
+                  Tspecial_address_t num_reg_re_log = PORT_READ(in_INSERT_NUM_REG_RE_LOG [i]);
+                  Tspecial_address_t num_reg_re_phy = PORT_READ(in_INSERT_NUM_REG_RE_PHY [i]);
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_log     : %d",num_reg_re_log);
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy     : %d",num_reg_re_phy);
+
+                  rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy;
+                }
+
+              if (save)
+                {
+                  // Need save RAT
+
+                  Tdepth_t depth = (_param->_have_port_depth       )?PORT_READ(in_RENAME_DEPTH        [i]):0;
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * depth old - new  : %d",depth);
+
+// #ifdef DEBUG_TEST
+//                   if (depth != ((depth_old+1)%_param->_nb_branch_speculated[front_end_id][context_id]))
+//                     throw ERRORMORPHEO(FUNCTION,toString(_("Rename : Invalid depth (old : %d, new : %d).\n"),depth_old,depth));
+// #endif
+
+                  // save GPR
+                  for (uint32_t num_gpr=0; num_gpr<_param->_nb_general_register_logic; num_gpr++)
+                    rat_gpr_save [front_end_id][context_id][depth][num_gpr] = rat_gpr_speculative [front_end_id][context_id][num_gpr];
+
+                  // save SPR
+                  for (uint32_t num_spr=0; num_spr<_param->_nb_special_register_logic; num_spr++)
+                    rat_spr_save [front_end_id][context_id][depth][num_spr] = rat_spr_speculative [front_end_id][context_id][num_spr];
+
+                  // update rat_depth with new depth
+                  rat_depth[front_end_id][context_id] = depth;
+                }
+	    }
+
+	// =====================================================
+	// ====[ RETIRE ]=======================================
+	// =====================================================
+	// Second : interface retire
+	//  (because if an event on the same thread : the instruction is already renamed)
+	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+	  if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i])
+	    {
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * RETIRE [%d]",i);
+
+	      // if no event : no effect, because the RAT content the most recently register
+	      // but if they have a event (exception or miss speculation), the rat must restore the oldest value
+	      // To restore the oldest valid value, we use the rat_update_table. if the bit is unset, also they have none update on this register
+	      // the retire interface became of the Re Order Buffer, also is in program sequence !
+
+#ifdef DEBUG
+              Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RETIRE_FRONT_END_ID [i]):0;
+              Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RETIRE_CONTEXT_ID   [i]):0;
+#endif
+              Tcontrol_t write_rd     = PORT_READ(in_RETIRE_WRITE_RD [i]);
+              Tcontrol_t write_re     = PORT_READ(in_RETIRE_WRITE_RE [i]);
+              Tcontrol_t restore      = PORT_READ(in_RETIRE_RESTORE  [i]);
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end_id       : %d",front_end_id);
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * context_id         : %d",context_id  );
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * restore            : %d",restore     );
+
+              // Test if write and have not a previous update
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_rd           : %d",write_rd);
+              if (write_rd == 1)
+                {
+#ifdef DEBUG
+                  Tgeneral_address_t num_reg_rd_log     = PORT_READ(in_RETIRE_NUM_REG_RD_LOG     [i]);
+#endif
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_log     : %d",num_reg_rd_log    );
+
+                  if (not restore)
+                    {
+#ifdef DEBUG
+                  Tgeneral_address_t num_reg_rd_phy_new = PORT_READ(in_RETIRE_NUM_REG_RD_PHY_NEW [i]);
+#endif
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_rd_phy_new : %d",num_reg_rd_phy_new);
+
+                  // rat_gpr_speculative [front_end_id][context_id][num_reg_rd_log] = num_reg_rd_phy_new;
+                    }
+                }
+
+              log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * write_re           : %d",write_re);
+              if (write_re == 1)
+                {
+#ifdef DEBUG
+                  Tspecial_address_t num_reg_re_log     = PORT_READ(in_RETIRE_NUM_REG_RE_LOG     [i]);
+#endif
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_log     : %d",num_reg_re_log    );
+
+                  if (not restore)
+                    {
+#ifdef DEBUG
+                  Tspecial_address_t num_reg_re_phy_new = PORT_READ(in_RETIRE_NUM_REG_RE_PHY_NEW [i]);
+#endif
+
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * num_reg_re_phy_new : %d",num_reg_re_phy_new);
+
+                  // rat_spr_speculative [front_end_id][context_id][num_reg_re_log] = num_reg_re_phy_new;
+                    }
+                }
+
+	    }
+      }
+
+#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Register_Address_Translation_unit == true)
+    {
+      uint32_t limit = 4;
+      
+      log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"  * Dump RAT (Register_Address_Translation_unit)");
+      for (uint32_t i=0; i<_param->_nb_front_end; ++i)
+        for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
+          {
+            log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"    * front_end[%d].context[%d] - rat_depth : %d",i,j,rat_depth[i][j]);
+          
+            for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit)
+              {
+                std::string str = "";
+                for (uint32_t x=0; x<limit; x++)
+                  {
+                    uint32_t index = k+x;
+                    if (index >= _param->_nb_general_register_logic)
+                      break;
+                    else
+                      str+=toString("GPR[%.4d] - %.5d | ",index,rat_gpr_speculative [i][j][index]);
+                  }
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+              }
+
+            for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
+              for (uint32_t k=0; k<_param->_nb_general_register_logic; k+=limit)
+                {
+                  std::string str = "";
+                  for (uint32_t x=0; x<limit; x++)
+                    {
+                      uint32_t index = k+x;
+                      if (index >= _param->_nb_general_register_logic)
+                        break;
+                      else
+                        str+=toString("GPR_%d[%.4d] - %.5d | ",l,index,rat_gpr_save [i][j][l][index]);
+                    }
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+                }
+            
+            for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit)
+              {
+                std::string str = "";
+                
+                for (uint32_t x=0; x<limit; x++)
+                  {
+                    uint32_t index = k+x;
+                    if (index >= _param->_nb_special_register_logic)
+                      break;
+                    else
+                      str+=toString("SPR[%.4d] - %.5d | ",index,rat_spr_speculative [i][j][index]);
+                  }
+                log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+              }
+
+            for (uint32_t l=0; l<_param->_nb_branch_speculated[i][j]; ++l)
+              for (uint32_t k=0; k<_param->_nb_special_register_logic; k+=limit)
+                {
+                  std::string str = "";
+                  for (uint32_t x=0; x<limit; x++)
+                    {
+                      uint32_t index = k+x;
+                      if (index >= _param->_nb_special_register_logic)
+                        break;
+                      else
+                        str+=toString("SPR_%d[%.4d] - %.5d | ",l,index,rat_spr_save [i][j][l][index]);
+                    }
+                  log_printf(TRACE,Register_Address_Translation_unit,FUNCTION,"      * %s",str.c_str());
+                }
+
+          }
+    }
+#endif
+
+    log_end(Register_Address_Translation_unit,FUNCTION);
+  };
+
+}; // end namespace register_address_translation_unit
+}; // end namespace register_translation_unit
+}; // end namespace rename_unit
+}; // end namespace ooo_engine
+}; // end namespace multi_ooo_engine
+}; // end namespace core
+
+}; // end namespace behavioural
+}; // end namespace morpheo              
+#endif
