Changeset 15 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src

Timestamp:

Apr 5, 2007, 4:17:30 PM (17 years ago)

Author:

rosiere

Message:

Interface normalisé
Début du banc de registres multi niveaux

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src

Files:

• Meta_Predictor_allocation.cpp (modified) (5 diffs)
• Meta_Predictor_deallocation.cpp (modified) (1 diff)
• Meta_Predictor_vhdl_body.cpp (modified) (3 diffs)
• Meta_Predictor_vhdl_port.cpp (modified) (1 diff)
• Meta_Predictor_vhdl_testbench_port.cpp (modified) (1 diff)
• Meta_Predictor_vhdl_testbench_transition.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_allocation.cpp

@@ -23 +23 @@
 
     in_CLOCK  = new SC_CLOCK           ("in_CLOCK");
+    in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");
 
      in_PREDICT_VAL                 = new SC_IN (Tcontrol_t)     * [_param._nb_prediction     ];
@@ -235 +236 @@
     
     // Instantiation
-    (*(component_Meta_Predictor_Glue->in_CLOCK))        (*(in_CLOCK));
-    
+#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
+    (*(component_Meta_Predictor_Glue->in_CLOCK ))        (*(in_CLOCK ));
+#endif
+   
         // Interface Predict
     for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -317 +320 @@
       
     // Instantiation
-    (*(component_Two_Level_Branch_Predictor_2->in_CLOCK))        (*(in_CLOCK));
+    (*(component_Two_Level_Branch_Predictor_2->in_CLOCK ))        (*(in_CLOCK ));
+    (*(component_Two_Level_Branch_Predictor_2->in_NRESET))        (*(in_NRESET));
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -363 +367 @@
       
     // Instantiation
-    (*(component_Two_Level_Branch_Predictor_1->in_CLOCK))        (*(in_CLOCK));
+    (*(component_Two_Level_Branch_Predictor_1->in_CLOCK ))        (*(in_CLOCK ));
+    (*(component_Two_Level_Branch_Predictor_1->in_NRESET))        (*(in_NRESET));
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -401 +406 @@
       
     // Instantiation
-    (*(component_Two_Level_Branch_Predictor_0->in_CLOCK))        (*(in_CLOCK));
+    (*(component_Two_Level_Branch_Predictor_0->in_CLOCK ))        (*(in_CLOCK ));
+    (*(component_Two_Level_Branch_Predictor_0->in_NRESET))        (*(in_NRESET));
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_deallocation.cpp

@@ -20 +20 @@
 
     delete in_CLOCK;
+    delete in_NRESET;
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_vhdl_body.cpp

@@ -105 +105 @@
     
     // Instantiation
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -146 +147 @@
     
     // Instantiation
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -179 +181 @@
     
     // Instantiation
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_vhdl_port.cpp

@@ -20 +20 @@
     log_printf(FUNC,Meta_Predictor,"vhdl_port","Begin");
 
-    vhdl.set_port (" in_CLOCK" , IN, 1);
+    vhdl.set_port (" in_CLOCK ", IN, 1);
+    vhdl.set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_vhdl_testbench_port.cpp

@@ -19 +19 @@
   {
     log_printf(FUNC,Meta_Predictor,"vhdl_testbench_port","Begin");
+
+    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_vhdl_testbench_transition.cpp

@@ -26 +26 @@
     // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
     // (because we have no control on the ordonnancer's policy)
+
+    _vhdl_testbench->add_input (PORT_READ( in_NRESET));
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)