Changeset 23 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src
- Timestamp:
- May 21, 2007, 12:01:51 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src
- Files:
-
- 3 edited
-
Parameters.cpp (modified) (3 diffs)
-
RegisterFile_Multi_Banked_Glue.cpp (modified) (2 diffs)
-
RegisterFile_Multi_Banked_Glue_genMealy_read_in.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/Parameters.cpp
r15 r23 31 31 _nb_port_write_by_bank (nb_port_write_by_bank), 32 32 _crossbar (crossbar ), 33 _shift_address ( static_cast<uint32_t>(ceil(log2(_nb_bank))))33 _shift_address (_size_address-static_cast<uint32_t>(ceil(log2(_nb_bank)))) 34 34 { 35 35 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"Parameters","Begin"); … … 39 39 // All port_src is connected with one port_dest on each bank 40 40 41 _link_port_read = new uint32_t [_nb_port_read ]; 42 for (uint32_t i=0; i<_nb_port_read ; i++) 43 _link_port_read [i] = i%_nb_port_read_by_bank; 41 _link_port_read_in_to_out = new uint32_t [_nb_port_read ]; 42 _link_port_read_in_to_select = new uint32_t [_nb_port_read ]; 43 _link_port_write_in_to_out = new uint32_t [_nb_port_write]; 44 _link_port_write_in_to_select = new uint32_t [_nb_port_write]; 45 uint32_t _nb_port_select_by_bank_read_port [_nb_port_read_by_bank ]; 46 uint32_t _nb_port_select_by_bank_write_port [_nb_port_write_by_bank]; 47 48 // init 49 for (uint32_t i=0; i<_nb_port_read_by_bank ;i++) 50 _nb_port_select_by_bank_read_port [i] = 0; 51 52 for (uint32_t i=0; i<_nb_port_read ;i++) 53 { 54 uint32_t x = i%_nb_port_read_by_bank; 55 _link_port_read_in_to_out [i] = x; 56 _link_port_read_in_to_select [i] = _nb_port_select_by_bank_read_port [x]; 57 _nb_port_select_by_bank_read_port [x] ++; 58 } 44 59 45 _link_port_write = new uint32_t [_nb_port_write]; 46 for (uint32_t i=0; i<_nb_port_write; i++) 47 _link_port_write [i] = i%_nb_port_write_by_bank; 60 // init 61 for (uint32_t i=0; i<_nb_port_write_by_bank ;i++) 62 _nb_port_select_by_bank_write_port [i] = 0; 63 64 for (uint32_t i=0; i<_nb_port_write ;i++) 65 { 66 uint32_t x = i%_nb_port_write_by_bank; 67 _link_port_write_in_to_out [i] = x; 68 _link_port_write_in_to_select [i] = _nb_port_select_by_bank_write_port [x]; 69 _nb_port_select_by_bank_write_port [x] ++; 70 } 48 71 } 49 72 // else : don't allocate 50 73 51 _nb_port_select_by_bank_read_port = new uint32_t [_nb_port_read_by_bank ];52 53 if (_crossbar == FULL_CROSSBAR)54 // All port_src is connected with all port_dest on each bank55 for (uint32_t i=0; i<_nb_port_read_by_bank ;i++)56 _nb_port_select_by_bank_read_port [i] = _nb_port_read;57 else58 // All port_src is connected with one port_dest on each bank59 {60 for (uint32_t i=0; i<_nb_port_read_by_bank ;i++)61 _nb_port_select_by_bank_read_port [i] = 0;62 63 for (uint32_t i=0; i<_nb_port_read ;i++)64 _nb_port_select_by_bank_read_port [_link_port_read [i]] ++;65 }66 67 _nb_port_select_by_bank_write_port = new uint32_t [_nb_port_write_by_bank];68 69 if (_crossbar == FULL_CROSSBAR)70 // All port_src is connected with all port_dest on each bank71 for (uint32_t i=0; i<_nb_port_write_by_bank ;i++)72 _nb_port_select_by_bank_write_port [i] = _nb_port_write;73 else74 // All port_src is connected with one port_dest on each bank75 {76 for (uint32_t i=0; i<_nb_port_write_by_bank ;i++)77 _nb_port_select_by_bank_write_port [i] = 0;78 79 for (uint32_t i=0; i<_nb_port_write ;i++)80 _nb_port_select_by_bank_write_port [_link_port_write[i]] ++;81 }82 83 74 test(); 84 75 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"Parameters","End"); … … 97 88 { 98 89 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"Parameters (copy)","Begin"); 99 100 _nb_port_select_by_bank_read_port = new uint32_t [_nb_port_read_by_bank ];101 for (uint32_t i=0; i<_nb_port_read_by_bank; i++)102 _nb_port_select_by_bank_read_port [i] = param._nb_port_select_by_bank_read_port [i];103 104 _nb_port_select_by_bank_write_port = new uint32_t [_nb_port_write_by_bank ];105 for (uint32_t i=0; i<_nb_port_write_by_bank; i++)106 _nb_port_select_by_bank_write_port[i] = param._nb_port_select_by_bank_write_port [i];107 108 90 test(); 109 91 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"Parameters (copy)","End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue.cpp
r15 r23 33 33 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Begin"); 34 34 35 #ifdef SYSTEMC 36 // write function pointer 37 if (_crossbar == PARTIAL_CROSSBAR) 38 { 39 link_port_read_in_to_out = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue::partial_crossbar_link_port_read_in_to_out ; 40 link_port_read_in_to_select = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue::partial_crossbar_link_port_read_in_to_select ; 41 link_port_write_in_to_out = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue::partial_crossbar_link_port_write_in_to_out ; 42 link_port_write_in_to_select = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue::partial_crossbar_link_port_write_in_to_select; 43 } 44 else 45 { 46 link_port_read_in_to_out = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue:: full_crossbar_link_port_read_in_to_out ; 47 link_port_read_in_to_select = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue:: full_crossbar_link_port_read_in_to_select ; 48 link_port_write_in_to_out = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue:: full_crossbar_link_port_write_in_to_out ; 49 link_port_write_in_to_select = &morpheo::behavioural::generic::registerfile::registerfile_multi_banked::registerfile_multi_banked_glue::RegisterFile_Multi_Banked_Glue:: full_crossbar_link_port_write_in_to_select; 50 } 51 #endif 52 35 53 #ifdef STATISTICS 36 54 log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Allocation of statistics"); … … 66 84 67 85 allocation (); 68 86 69 87 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 70 88 log_printf(INFO,RegisterFile_Multi_Banked_Glue,"RegisterFile_Multi_Banked_Glue","Method - transition"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue_genMealy_read_in.cpp
r15 r23 9 9 #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/include/RegisterFile_Multi_Banked_Glue.h" 10 10 11 namespace morpheo 11 namespace morpheo { 12 12 namespace behavioural { 13 13 namespace generic { … … 16 16 namespace registerfile_multi_banked_glue { 17 17 18 19 18 void RegisterFile_Multi_Banked_Glue::genMealy_read_in (void) 20 19 { 21 20 log_printf(FUNC,RegisterFile_Multi_Banked_Glue,"genMealy_read_in","Begin"); 22 21 23 for (uint32_t l=0; l<_param._nb_port_read; l++)22 for (uint32_t i=0; i<_param._nb_port_read; i++) 24 23 { 25 uint32_t num_bank = PORT_READ(in_READ_IN_ADDRESS [l])>>_param._shift_address;24 log_printf(ALL,RegisterFile_Multi_Banked_Glue,"genMealy_read_in","read_in [%d]",i); 26 25 26 uint32_t num_bank = PORT_READ(in_READ_IN_ADDRESS [i])>>_param._shift_address; 27 uint32_t num_port_out = *link_port_read_in_to_out (i,num_bank); 28 uint32_t num_port_select = *link_port_read_in_to_select (i,num_bank); 29 30 if (_param._crossbar == FULL_CROSSBAR) 31 { 32 // scearch in all possible destination the good 33 // if not found : num_port = 0 34 for (num_port = _param._nb_port_read_by_bank-1; num_port > 0; num_port --) 35 { 36 log_printf(ALL,RegisterFile_Multi_Banked_Glue,"genMealy_read_in","test read_out_port %d",num_port); 37 38 for (uint32_t j=0; j<_param._nb_port_select_by_bank_read_port [num_port]; j++) 39 { 40 log_printf(ALL,RegisterFile_Multi_Banked_Glue,"genMealy_read_in","test read_out_select %d",j); 41 if (PORT_READ(in_READ_SELECT_ACK [num_bank][num_port][j])==1) 42 goto end_FULL_CROSSBAR; 43 } 44 } 45 } 46 47 end_FULL_CROSSBAR : 48 49 log_printf(TRACE,RegisterFile_Multi_Banked_Glue,"genMealy_read_in","read_in [%d] address : %.8x - num_bank %d, num_port %d",i,static_cast<uint32_t>(PORT_READ(in_READ_IN_ADDRESS [i])),num_bank,num_port); 50 51 PORT_WRITE(out_READ_IN_ACK [i],PORT_READ(in_READ_SELECT_ACK [num_bank][num_port])); 52 PORT_WRITE(out_READ_IN_DATA [i],PORT_READ(in_READ_OUT_DATA [num_bank][num_port])); 27 53 // (*(out_READ_IN_ACK [l])) (*(in_READ_IN_ADDRESS [i][j])); 28 54 // (*(out_READ_IN_DATA [l])) (*(in_READ_IN_ADDRESS [i][j])); 29 30 // for (uint32_t i=0; i<_param._nb_bank; i++)31 // for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)32 // {33 // (*(out_READ_IN_ACK [l])) (*(in_READ_OUT_ACK [i][j]));34 // (*(out_READ_IN_DATA [l])) (*(in_READ_OUT_DATA [i][j]));35 // for (uint32_t k=0; k<_param._nb_port_select_by_bank_read_port[j]; k++)36 // {37 // (*(out_READ_IN_ACK [l])) (*(in_READ_SELECT_ACK [i][j][k]));38 // (*(out_READ_IN_DATA [l])) (*(in_READ_SELECT_ACK [i][j][k]));39 // }40 // }41 55 } 42 56
Note: See TracChangeset
for help on using the changeset viewer.
