Changes in trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-execute_loop.fig [17:23]
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trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-execute_loop.fig
r17 r23 1 #FIG 3.2 Produced by xfig version 3.2.5-alpha51 #FIG 3.2 2 2 Landscape 3 3 Center … … 13 13 4 1 0 50 -1 -1 10 0.0000 4 105 510 7920 6030 memory\001 14 14 4 1 0 50 -1 -1 10 0.0000 4 105 255 7920 5895 read\001 15 4 1 0 50 -1 -1 10 0.0000 4 1 20345 7920 6165 queue\00115 4 1 0 50 -1 -1 10 0.0000 4 105 345 7920 6165 queue\001 16 16 -6 17 17 6 10260 6390 10980 6840 … … 29 29 8280 6840 7560 6840 7560 6390 8280 6390 8280 6840 30 30 4 1 0 50 -1 -1 10 0.0000 4 105 255 7920 6570 read\001 31 4 1 0 50 -1 -1 10 0.0000 4 1 20345 7920 6750 queue\00131 4 1 0 50 -1 -1 10 0.0000 4 105 345 7920 6750 queue\001 32 32 -6 33 33 6 8640 6390 9360 6840 … … 36 36 4 1 0 50 -1 -1 10 0.0000 4 105 690 9000 6570 reservation\001 37 37 4 1 0 50 -1 -1 10 0.0000 4 105 435 9000 6750 station\001 38 -639 6 7380 7200 13860 792040 2 2 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 541 7380 7200 13860 7200 13860 7920 7380 7920 7380 720042 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 543 13680 7740 13680 7380 7560 7380 7560 7740 13680 774044 4 1 0 50 -1 -1 10 0.0000 4 135 480 10620 7605 register\00145 38 -6 46 39 2 2 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 … … 126 119 3 0 1.00 60.00 120.00 127 120 10620 5760 10620 5130 121 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 122 13680 7740 13680 7380 7560 7380 7560 7740 13680 7740 123 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 124 13680 8280 13680 7920 7560 7920 7560 8280 13680 8280 125 2 2 2 1 0 7 50 -1 -1 3.000 0 0 -1 0 0 5 126 7380 7200 13860 7200 13860 8460 7380 8460 7380 7200 127 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 128 3 0 1.00 60.00 120.00 129 12780 7335 12780 7920 130 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 131 3 0 1.00 60.00 120.00 132 8505 7380 8505 7920 133 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 134 3 0 1.00 60.00 120.00 135 8415 7380 8415 7920 136 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 1 2 137 3 0 1.00 60.00 120.00 138 3 0 1.00 60.00 120.00 139 7560 8100 7200 8100 128 140 4 1 0 50 -1 -1 10 1.5708 4 105 360 9945 6615 select\001 129 141 4 1 0 50 -1 -1 10 1.5708 4 105 360 11385 6300 select\001 130 4 1 0 50 -1 -1 10 0.0000 4 1 20345 12240 6435 queue\001142 4 1 0 50 -1 -1 10 0.0000 4 105 345 12240 6435 queue\001 131 143 4 1 0 50 -1 -1 10 0.0000 4 105 345 12240 6255 write\001 132 144 4 1 0 50 -1 -1 10 0.0000 4 90 465 13320 6255 execute\001 133 4 1 0 50 -1 -1 10 0.0000 4 1 20345 13320 6435 queue\001134 4 0 0 50 -1 -1 10 0.0000 4 1 50405 8820 5355 bypass\001145 4 1 0 50 -1 -1 10 0.0000 4 105 345 13320 6435 queue\001 146 4 0 0 50 -1 -1 10 0.0000 4 135 405 8820 5355 bypass\001 135 147 4 1 0 50 -1 -1 10 0.0000 4 105 420 10620 5085 Dcache\001 136 148 4 2 0 50 -1 -1 10 0.0000 4 90 465 13995 6660 execute\001 137 149 4 0 0 50 -1 -1 10 0.0000 4 75 435 7245 6345 rename\001 150 4 1 0 50 -1 -1 10 0.0000 4 135 480 10620 7605 register\001 151 4 1 0 50 -1 -1 10 0.0000 4 105 630 10620 8145 status list\001 152 4 0 0 50 -1 -1 10 0.0000 4 150 855 7290 8415 register_state\001
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