Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/SelfTest/src/test.cpp (revision 42) @@ -43,4 +43,5 @@ *********************************************************************/ sc_clock CLOCK ("clock", 1.0, 0.5); + sc_signal RESET; sc_signal DATA_IN [param._nb_port]; sc_signal ADDSUB [param._nb_port]; @@ -53,7 +54,6 @@ cout << "<" << name << "> Instanciation of _Counter" << endl; - #if defined(STATISTICS) or defined(VHDL_TESTBENCH) (*(_Counter->in_CLOCK)) (CLOCK); -#endif + (*(_Counter->in_NRESET)) (RESET); for (uint32_t i=0; ivhdl_testbench_label("Initialisation"); + + RESET.write(1); + cout << "{"+toString(static_cast(sc_simulation_time()))+"} Initialisation" << endl; - _Counter->vhdl_testbench_label("Loop of Test"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Loop of Test" << endl; for (uint32_t iteration=0; iterationvhdl_testbench_label("Iteration "+toString(iteration)); cout << "{" << static_cast(sc_simulation_time()) << "} Itération " << iteration << endl; for (uint32_t i=0; i port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (); - _vhdl_testbench->set_clock ("in_CLOCK",false); #endif @@ -53,6 +48,4 @@ #ifdef SYSTEMC - allocation (); - SC_METHOD (transition); dont_initialize (); @@ -85,10 +78,4 @@ #endif -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_allocation.cpp (revision 42) @@ -21,23 +21,53 @@ log_printf(FUNC,Counter,"allocation","Begin"); -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - in_CLOCK = new SC_CLOCK ("in_CLOCK"); + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Counter" +#ifdef POSITION + ,COMBINATORY #endif + ); + + _interfaces = entity->set_interfaces(); - in_COUNTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; - in_COUNTER_ADDSUB= new SC_IN (Tcontrol_t) * [_param._nb_port]; - out_COUNTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; - - for (uint32_t i=0; i<_param._nb_port; i++) - { - rename = " in_COUNTER_DATA_" +toString(i); - in_COUNTER_DATA [i] = new SC_IN (Tdata_t) (rename.c_str()); + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1,CLOCK_VHDL_NO); + in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_NO); + } - rename = " in_COUNTER_ADDSUB_"+toString(i); - in_COUNTER_ADDSUB[i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_COUNTER_DATA_" +toString(i); - out_COUNTER_DATA [i] = new SC_OUT(Tdata_t) (rename.c_str()); - } + // ~~~~~[ Interface : "counter" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + in_COUNTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; + in_COUNTER_ADDSUB= new SC_IN (Tcontrol_t) * [_param._nb_port]; + out_COUNTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; + + for (uint32_t i=0; i<_param._nb_port; i++) + { + Interface_fifo * interface = _interfaces->set_interface("counter_"+toString(i) +#ifdef POSITION + , IN + , SOUTH + , "Counter interface" +#endif + ); + + in_COUNTER_DATA [i] = interface->set_signal_in ("data" , _param._size_data); + in_COUNTER_ADDSUB [i] = interface->set_signal_in ("addsub", 1 ); + out_COUNTER_DATA [i] = interface->set_signal_out ("data" , _param._size_data); + } + } +#ifdef POSITION + _component->generate_file(); +#endif // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_deallocation.cpp (revision 42) @@ -19,19 +19,14 @@ log_printf(FUNC,Counter,"deallocation","Begin"); -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - delete in_CLOCK; -#endif + delete in_CLOCK; + delete in_NRESET; - for (uint32_t i=0; i<_param._nb_port; i++) - { - delete in_COUNTER_DATA [i]; - delete in_COUNTER_ADDSUB[i]; - delete out_COUNTER_DATA [i]; - } - delete in_COUNTER_DATA ; - delete in_COUNTER_ADDSUB; - delete out_COUNTER_DATA ; + delete [] in_COUNTER_DATA ; + delete [] in_COUNTER_ADDSUB; + delete [] out_COUNTER_DATA ; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + delete _component; log_printf(FUNC,Counter,"deallocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_genMealy.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_genMealy.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_genMealy.cpp (revision 42) @@ -1,4 +1,3 @@ #ifdef SYSTEMC -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) /* * $Id$ @@ -51,3 +50,2 @@ }; // end namespace morpheo #endif -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl.cpp (revision 42) @@ -19,7 +19,7 @@ { log_printf(FUNC,Counter,"vhdl","Begin"); - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_Pack"); vhdl_port (vhdl); @@ -27,5 +27,7 @@ vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; log_printf(FUNC,Counter,"vhdl","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_body.cpp (revision 42) @@ -14,9 +14,8 @@ namespace counter { - - void Counter::vhdl_body (Vhdl & vhdl) + void Counter::vhdl_body (Vhdl * & vhdl) { log_printf(FUNC,Counter,"vhdl_body","Begin"); - vhdl.set_body (""); + vhdl->set_body (""); for (uint32_t i=0; i<_param._nb_port; i++) @@ -26,23 +25,23 @@ if (_param._size_data > 1) { - counter_inc = "in_COUNTER_DATA_"+toString(i)+"+1"; - counter_dec = "in_COUNTER_DATA_"+toString(i)+"-1"; + counter_inc = "in_COUNTER_"+toString(i)+"_DATA+1"; + counter_dec = "in_COUNTER_"+toString(i)+"_DATA-1"; } else { - counter_inc = "in_COUNTER_DATA_"+toString(i)+"+1"; - counter_dec = "in_COUNTER_DATA_"+toString(i)+"-1"; + counter_inc = "in_COUNTER_"+toString(i)+"_DATA+1"; + counter_dec = "in_COUNTER_"+toString(i)+"_DATA-1"; } - vhdl.set_body ("out_COUNTER_DATA_"+toString(i)+" <="); + vhdl->set_body ("out_COUNTER_"+toString(i)+"_DATA <="); if (_param._size_data > 1) { - vhdl.set_body ("\tin_COUNTER_DATA_"+toString(i)+"+1 when in_COUNTER_ADDSUB_"+toString(i)+" = '1' and in_COUNTER_DATA_"+toString(i)+" < cst_max else"); - vhdl.set_body ("\tin_COUNTER_DATA_"+toString(i)+"-1 when in_COUNTER_ADDSUB_"+toString(i)+" = '0' and in_COUNTER_DATA_"+toString(i)+" > cst_min else"); - vhdl.set_body ("\tin_COUNTER_DATA_"+toString(i)+";"); + vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA+1 when in_COUNTER_"+toString(i)+"_ADDSUB = '1' and in_COUNTER_"+toString(i)+"_DATA < cst_max else"); + vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA-1 when in_COUNTER_"+toString(i)+"_ADDSUB = '0' and in_COUNTER_"+toString(i)+"_DATA > cst_min else"); + vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA;"); } else { - vhdl.set_body ("\tin_COUNTER_ADDSUB_"+toString(i)+";"); + vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_ADDSUB;"); } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_declaration.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_declaration.cpp (revision 42) @@ -15,5 +15,5 @@ - void Counter::vhdl_declaration (Vhdl & vhdl) + void Counter::vhdl_declaration (Vhdl * & vhdl) { log_printf(FUNC,Counter,"vhdl_declaration","Begin"); @@ -21,6 +21,6 @@ if (_param._size_data > 1) { - vhdl.set_constant ("cst_min",_param._size_data,std_logic_others(_param._size_data,0)); - vhdl.set_constant ("cst_max",_param._size_data,std_logic_others(_param._size_data,1)); + vhdl->set_constant ("cst_min",_param._size_data,std_logic_others(_param._size_data,0)); + vhdl->set_constant ("cst_max",_param._size_data,std_logic_others(_param._size_data,1)); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_port.cpp (revision 42) @@ -15,15 +15,10 @@ - void Counter::vhdl_port (Vhdl & vhdl) + void Counter::vhdl_port (Vhdl * & vhdl) { log_printf(FUNC,Counter,"vhdl_port","Begin"); - for (uint32_t i=0; i<_param._nb_port; i++) - { - vhdl.set_port (" in_COUNTER_DATA_" +toString(i), IN, _param._size_data); - vhdl.set_port (" in_COUNTER_ADDSUB_"+toString(i), IN, 1 ); - vhdl.set_port ("out_COUNTER_DATA_" +toString(i),OUT, _param._size_data); - } - + _interfaces->set_port(vhdl); + log_printf(FUNC,Counter,"vhdl_port","End"); }; Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_label.cpp (revision 41) +++ (revision ) @@ -1,27 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Generic/Counter/include/Counter.h" - -namespace morpheo { -namespace behavioural { -namespace generic { -namespace counter { - - - void Counter::vhdl_testbench_label (string label) - { -#ifdef VHDL_TESTBENCH - _vhdl_testbench->add_label(label); -#endif - }; - -}; // end namespace counter -}; // end namespace generic - -}; // end namespace behavioural -}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,35 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Generic/Counter/include/Counter.h" - -namespace morpheo { -namespace behavioural { -namespace generic { -namespace counter { - - - void Counter::vhdl_testbench_port () - { - log_printf(FUNC,Counter,"vhdl_testbench_port","Begin"); - for (uint32_t i=0; i<_param._nb_port; i++) - { - _vhdl_testbench->set_port (" in_COUNTER_DATA_" +toString(i), IN, _param._size_data); - _vhdl_testbench->set_port (" in_COUNTER_ADDSUB_"+toString(i), IN, 1); - _vhdl_testbench->set_port ("out_COUNTER_DATA_" +toString(i),OUT, _param._size_data); - } - - log_printf(FUNC,Counter,"vhdl_testbench_port","End"); - }; - -}; // end namespace counter -}; // end namespace generic - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_transition.cpp (revision 42) @@ -21,21 +21,5 @@ sc_start(0); - // In order with file Counter_vhdl_testbench_port.cpp - // Warning : if a output depend of a subcomponent, take directly the port of subcomponent - // (because we have no control on the ordonnancer's policy) - - for (uint32_t i=0; i<_param._nb_port; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_COUNTER_DATA [i])); - _vhdl_testbench->add_input (PORT_READ( in_COUNTER_ADDSUB[i])); - _vhdl_testbench->add_output(PORT_READ(out_COUNTER_DATA [i])); - } - - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - _vhdl_testbench->add_test(true); - - _vhdl_testbench->new_cycle (); // always at the end + _interfaces->testbench(); log_printf(FUNC,Counter,"vhdl_testbench_transition","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/Makefile.mkf =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/Makefile.mkf (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/Makefile.mkf (revision 42) @@ -0,0 +1,516 @@ +# +# Makefile generated by MKF configure script +# + +all: RegisterFile_Monolithic_0.ngc RegisterFile_Monolithic_10.ngc RegisterFile_Monolithic_11.ngc RegisterFile_Monolithic_12.ngc RegisterFile_Monolithic_13.ngc RegisterFile_Monolithic_14.ngc RegisterFile_Monolithic_15.ngc RegisterFile_Monolithic_16.ngc RegisterFile_Monolithic_17.ngc RegisterFile_Monolithic_18.ngc RegisterFile_Monolithic_19.ngc RegisterFile_Monolithic_1.ngc RegisterFile_Monolithic_20.ngc RegisterFile_Monolithic_21.ngc RegisterFile_Monolithic_22.ngc RegisterFile_Monolithic_23.ngc RegisterFile_Monolithic_24.ngc RegisterFile_Monolithic_25.ngc RegisterFile_Monolithic_26.ngc RegisterFile_Monolithic_27.ngc RegisterFile_Monolithic_28.ngc RegisterFile_Monolithic_29.ngc RegisterFile_Monolithic_2.ngc RegisterFile_Monolithic_30.ngc RegisterFile_Monolithic_31.ngc RegisterFile_Monolithic_32.ngc RegisterFile_Monolithic_33.ngc RegisterFile_Monolithic_34.ngc RegisterFile_Monolithic_35.ngc RegisterFile_Monolithic_3.ngc RegisterFile_Monolithic_4.ngc RegisterFile_Monolithic_5.ngc RegisterFile_Monolithic_6.ngc RegisterFile_Monolithic_7.ngc RegisterFile_Monolithic_8.ngc RegisterFile_Monolithic_9.ngc + +RegisterFile_Monolithic_0.ngc: RegisterFile_Monolithic_0.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_0 -ifn RegisterFile_Monolithic_0.prj -ofn RegisterFile_Monolithic_0.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_0.prj: RegisterFile_Monolithic_0_Pack.vhdl RegisterFile_Monolithic_0.vhdl + for i in RegisterFile_Monolithic_0_Pack.vhdl RegisterFile_Monolithic_0.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_0.prj + +RegisterFile_Monolithic_0_Pack.vhdl: + +RegisterFile_Monolithic_0.vhdl: + +RegisterFile_Monolithic_10.ngc: RegisterFile_Monolithic_10.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_10 -ifn RegisterFile_Monolithic_10.prj -ofn RegisterFile_Monolithic_10.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_10.prj: RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl + for i in RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_10.prj + +RegisterFile_Monolithic_10_Pack.vhdl: + +RegisterFile_Monolithic_10.vhdl: + +RegisterFile_Monolithic_11.ngc: RegisterFile_Monolithic_11.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_11 -ifn RegisterFile_Monolithic_11.prj -ofn RegisterFile_Monolithic_11.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_11.prj: RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl + for i in RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_11.prj + +RegisterFile_Monolithic_11_Pack.vhdl: + +RegisterFile_Monolithic_11.vhdl: + +RegisterFile_Monolithic_12.ngc: RegisterFile_Monolithic_12.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_12 -ifn RegisterFile_Monolithic_12.prj -ofn RegisterFile_Monolithic_12.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_12.prj: RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl + for i in RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_12.prj + +RegisterFile_Monolithic_12_Pack.vhdl: + +RegisterFile_Monolithic_12.vhdl: + +RegisterFile_Monolithic_13.ngc: RegisterFile_Monolithic_13.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_13 -ifn RegisterFile_Monolithic_13.prj -ofn RegisterFile_Monolithic_13.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_13.prj: RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl + for i in RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_13.prj + +RegisterFile_Monolithic_13_Pack.vhdl: + +RegisterFile_Monolithic_13.vhdl: + +RegisterFile_Monolithic_14.ngc: RegisterFile_Monolithic_14.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_14 -ifn RegisterFile_Monolithic_14.prj -ofn RegisterFile_Monolithic_14.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_14.prj: RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl + for i in RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_14.prj + +RegisterFile_Monolithic_14_Pack.vhdl: + +RegisterFile_Monolithic_14.vhdl: + +RegisterFile_Monolithic_15.ngc: RegisterFile_Monolithic_15.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_15 -ifn RegisterFile_Monolithic_15.prj -ofn RegisterFile_Monolithic_15.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_15.prj: RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl + for i in RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_15.prj + +RegisterFile_Monolithic_15_Pack.vhdl: + +RegisterFile_Monolithic_15.vhdl: + +RegisterFile_Monolithic_16.ngc: RegisterFile_Monolithic_16.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_16 -ifn RegisterFile_Monolithic_16.prj -ofn RegisterFile_Monolithic_16.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_16.prj: RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl + for i in RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_16.prj + +RegisterFile_Monolithic_16_Pack.vhdl: + +RegisterFile_Monolithic_16.vhdl: + +RegisterFile_Monolithic_17.ngc: RegisterFile_Monolithic_17.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_17 -ifn RegisterFile_Monolithic_17.prj -ofn RegisterFile_Monolithic_17.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_17.prj: RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl + for i in RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_17.prj + +RegisterFile_Monolithic_17_Pack.vhdl: + +RegisterFile_Monolithic_17.vhdl: + +RegisterFile_Monolithic_18.ngc: RegisterFile_Monolithic_18.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_18 -ifn RegisterFile_Monolithic_18.prj -ofn RegisterFile_Monolithic_18.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_18.prj: RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl + for i in RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_18.prj + +RegisterFile_Monolithic_18_Pack.vhdl: + +RegisterFile_Monolithic_18.vhdl: + +RegisterFile_Monolithic_19.ngc: RegisterFile_Monolithic_19.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_19 -ifn RegisterFile_Monolithic_19.prj -ofn RegisterFile_Monolithic_19.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_19.prj: RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl + for i in RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_19.prj + +RegisterFile_Monolithic_19_Pack.vhdl: + +RegisterFile_Monolithic_19.vhdl: + +RegisterFile_Monolithic_1.ngc: RegisterFile_Monolithic_1.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_1 -ifn RegisterFile_Monolithic_1.prj -ofn RegisterFile_Monolithic_1.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_1.prj: RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl + for i in RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_1.prj + +RegisterFile_Monolithic_1_Pack.vhdl: + +RegisterFile_Monolithic_1.vhdl: + +RegisterFile_Monolithic_20.ngc: RegisterFile_Monolithic_20.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_20 -ifn RegisterFile_Monolithic_20.prj -ofn RegisterFile_Monolithic_20.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_20.prj: RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl + for i in RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_20.prj + +RegisterFile_Monolithic_20_Pack.vhdl: + +RegisterFile_Monolithic_20.vhdl: + +RegisterFile_Monolithic_21.ngc: RegisterFile_Monolithic_21.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_21 -ifn RegisterFile_Monolithic_21.prj -ofn RegisterFile_Monolithic_21.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_21.prj: RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl + for i in RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_21.prj + +RegisterFile_Monolithic_21_Pack.vhdl: + +RegisterFile_Monolithic_21.vhdl: + +RegisterFile_Monolithic_22.ngc: RegisterFile_Monolithic_22.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_22 -ifn RegisterFile_Monolithic_22.prj -ofn RegisterFile_Monolithic_22.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_22.prj: RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl + for i in RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_22.prj + +RegisterFile_Monolithic_22_Pack.vhdl: + +RegisterFile_Monolithic_22.vhdl: + +RegisterFile_Monolithic_23.ngc: RegisterFile_Monolithic_23.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_23 -ifn RegisterFile_Monolithic_23.prj -ofn RegisterFile_Monolithic_23.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_23.prj: RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl + for i in RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_23.prj + +RegisterFile_Monolithic_23_Pack.vhdl: + +RegisterFile_Monolithic_23.vhdl: + +RegisterFile_Monolithic_24.ngc: RegisterFile_Monolithic_24.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_24 -ifn RegisterFile_Monolithic_24.prj -ofn RegisterFile_Monolithic_24.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_24.prj: RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl + for i in RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_24.prj + +RegisterFile_Monolithic_24_Pack.vhdl: + +RegisterFile_Monolithic_24.vhdl: + +RegisterFile_Monolithic_25.ngc: RegisterFile_Monolithic_25.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_25 -ifn RegisterFile_Monolithic_25.prj -ofn RegisterFile_Monolithic_25.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_25.prj: RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl + for i in RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_25.prj + +RegisterFile_Monolithic_25_Pack.vhdl: + +RegisterFile_Monolithic_25.vhdl: + +RegisterFile_Monolithic_26.ngc: RegisterFile_Monolithic_26.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_26 -ifn RegisterFile_Monolithic_26.prj -ofn RegisterFile_Monolithic_26.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_26.prj: RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl + for i in RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_26.prj + +RegisterFile_Monolithic_26_Pack.vhdl: + +RegisterFile_Monolithic_26.vhdl: + +RegisterFile_Monolithic_27.ngc: RegisterFile_Monolithic_27.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_27 -ifn RegisterFile_Monolithic_27.prj -ofn RegisterFile_Monolithic_27.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_27.prj: RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl + for i in RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_27.prj + +RegisterFile_Monolithic_27_Pack.vhdl: + +RegisterFile_Monolithic_27.vhdl: + +RegisterFile_Monolithic_28.ngc: RegisterFile_Monolithic_28.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_28 -ifn RegisterFile_Monolithic_28.prj -ofn RegisterFile_Monolithic_28.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_28.prj: RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl + for i in RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_28.prj + +RegisterFile_Monolithic_28_Pack.vhdl: + +RegisterFile_Monolithic_28.vhdl: + +RegisterFile_Monolithic_29.ngc: RegisterFile_Monolithic_29.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_29 -ifn RegisterFile_Monolithic_29.prj -ofn RegisterFile_Monolithic_29.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_29.prj: RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl + for i in RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_29.prj + +RegisterFile_Monolithic_29_Pack.vhdl: + +RegisterFile_Monolithic_29.vhdl: + +RegisterFile_Monolithic_2.ngc: RegisterFile_Monolithic_2.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_2 -ifn RegisterFile_Monolithic_2.prj -ofn RegisterFile_Monolithic_2.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_2.prj: RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl RegisterFile_Monolithic_2_Pack.vhdl RegisterFile_Monolithic_2.vhdl + for i in RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl RegisterFile_Monolithic_2_Pack.vhdl RegisterFile_Monolithic_2.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_2.prj + +RegisterFile_Monolithic_2_Pack.vhdl: + +RegisterFile_Monolithic_2.vhdl: + +RegisterFile_Monolithic_30.ngc: RegisterFile_Monolithic_30.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_30 -ifn RegisterFile_Monolithic_30.prj -ofn RegisterFile_Monolithic_30.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_30.prj: RegisterFile_Monolithic_30_Pack.vhdl RegisterFile_Monolithic_30.vhdl + for i in RegisterFile_Monolithic_30_Pack.vhdl RegisterFile_Monolithic_30.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_30.prj + +RegisterFile_Monolithic_30_Pack.vhdl: + +RegisterFile_Monolithic_30.vhdl: + +RegisterFile_Monolithic_31.ngc: RegisterFile_Monolithic_31.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_31 -ifn RegisterFile_Monolithic_31.prj -ofn RegisterFile_Monolithic_31.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_31.prj: RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl + for i in RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_31.prj + +RegisterFile_Monolithic_31_Pack.vhdl: + +RegisterFile_Monolithic_31.vhdl: + +RegisterFile_Monolithic_32.ngc: RegisterFile_Monolithic_32.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_32 -ifn RegisterFile_Monolithic_32.prj -ofn RegisterFile_Monolithic_32.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_32.prj: RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl + for i in RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_32.prj + +RegisterFile_Monolithic_32_Pack.vhdl: + +RegisterFile_Monolithic_32.vhdl: + +RegisterFile_Monolithic_33.ngc: RegisterFile_Monolithic_33.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_33 -ifn RegisterFile_Monolithic_33.prj -ofn RegisterFile_Monolithic_33.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_33.prj: RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl + for i in RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_33.prj + +RegisterFile_Monolithic_33_Pack.vhdl: + +RegisterFile_Monolithic_33.vhdl: + +RegisterFile_Monolithic_34.ngc: RegisterFile_Monolithic_34.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_34 -ifn RegisterFile_Monolithic_34.prj -ofn RegisterFile_Monolithic_34.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_34.prj: RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl + for i in RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_34.prj + +RegisterFile_Monolithic_34_Pack.vhdl: + +RegisterFile_Monolithic_34.vhdl: + +RegisterFile_Monolithic_35.ngc: RegisterFile_Monolithic_35.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_35 -ifn RegisterFile_Monolithic_35.prj -ofn RegisterFile_Monolithic_35.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_35.prj: RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl + for i in RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_35.prj + +RegisterFile_Monolithic_35_Pack.vhdl: + +RegisterFile_Monolithic_35.vhdl: + +RegisterFile_Monolithic_3.ngc: RegisterFile_Monolithic_3.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_3 -ifn RegisterFile_Monolithic_3.prj -ofn RegisterFile_Monolithic_3.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_3.prj: RegisterFile_Monolithic_30_Pack.vhdl RegisterFile_Monolithic_30.vhdl RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl RegisterFile_Monolithic_3_Pack.vhdl RegisterFile_Monolithic_3.vhdl + for i in RegisterFile_Monolithic_30_Pack.vhdl RegisterFile_Monolithic_30.vhdl RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl RegisterFile_Monolithic_3_Pack.vhdl RegisterFile_Monolithic_3.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_3.prj + +RegisterFile_Monolithic_3_Pack.vhdl: + +RegisterFile_Monolithic_3.vhdl: + +RegisterFile_Monolithic_4.ngc: RegisterFile_Monolithic_4.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_4 -ifn RegisterFile_Monolithic_4.prj -ofn RegisterFile_Monolithic_4.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_4.prj: RegisterFile_Monolithic_4_Pack.vhdl RegisterFile_Monolithic_4.vhdl + for i in RegisterFile_Monolithic_4_Pack.vhdl RegisterFile_Monolithic_4.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_4.prj + +RegisterFile_Monolithic_4_Pack.vhdl: + +RegisterFile_Monolithic_4.vhdl: + +RegisterFile_Monolithic_5.ngc: RegisterFile_Monolithic_5.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_5 -ifn RegisterFile_Monolithic_5.prj -ofn RegisterFile_Monolithic_5.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_5.prj: RegisterFile_Monolithic_5_Pack.vhdl RegisterFile_Monolithic_5.vhdl + for i in RegisterFile_Monolithic_5_Pack.vhdl RegisterFile_Monolithic_5.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_5.prj + +RegisterFile_Monolithic_5_Pack.vhdl: + +RegisterFile_Monolithic_5.vhdl: + +RegisterFile_Monolithic_6.ngc: RegisterFile_Monolithic_6.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_6 -ifn RegisterFile_Monolithic_6.prj -ofn RegisterFile_Monolithic_6.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_6.prj: RegisterFile_Monolithic_6_Pack.vhdl RegisterFile_Monolithic_6.vhdl + for i in RegisterFile_Monolithic_6_Pack.vhdl RegisterFile_Monolithic_6.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_6.prj + +RegisterFile_Monolithic_6_Pack.vhdl: + +RegisterFile_Monolithic_6.vhdl: + +RegisterFile_Monolithic_7.ngc: RegisterFile_Monolithic_7.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_7 -ifn RegisterFile_Monolithic_7.prj -ofn RegisterFile_Monolithic_7.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_7.prj: RegisterFile_Monolithic_7_Pack.vhdl RegisterFile_Monolithic_7.vhdl + for i in RegisterFile_Monolithic_7_Pack.vhdl RegisterFile_Monolithic_7.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_7.prj + +RegisterFile_Monolithic_7_Pack.vhdl: + +RegisterFile_Monolithic_7.vhdl: + +RegisterFile_Monolithic_8.ngc: RegisterFile_Monolithic_8.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_8 -ifn RegisterFile_Monolithic_8.prj -ofn RegisterFile_Monolithic_8.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_8.prj: RegisterFile_Monolithic_8_Pack.vhdl RegisterFile_Monolithic_8.vhdl + for i in RegisterFile_Monolithic_8_Pack.vhdl RegisterFile_Monolithic_8.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_8.prj + +RegisterFile_Monolithic_8_Pack.vhdl: + +RegisterFile_Monolithic_8.vhdl: + +RegisterFile_Monolithic_9.ngc: RegisterFile_Monolithic_9.prj + echo run -keep_hierarchy yes -iobuf no -top RegisterFile_Monolithic_9 -ifn RegisterFile_Monolithic_9.prj -ofn RegisterFile_Monolithic_9.ngc -p xc5vlx330t-2ff1738 -ifmt mixed | xst + +RegisterFile_Monolithic_9.prj: RegisterFile_Monolithic_9_Pack.vhdl RegisterFile_Monolithic_9.vhdl + for i in RegisterFile_Monolithic_9_Pack.vhdl RegisterFile_Monolithic_9.vhdl ; do echo "vhdl work $$i" ; done > RegisterFile_Monolithic_9.prj + +RegisterFile_Monolithic_9_Pack.vhdl: + +RegisterFile_Monolithic_9.vhdl: + +clean: + rm -f RegisterFile_Monolithic_0.ngc + rm -f RegisterFile_Monolithic_0.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_0.prj + rm -f RegisterFile_Monolithic_10.ngc + rm -f RegisterFile_Monolithic_10.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_10.prj + rm -f RegisterFile_Monolithic_11.ngc + rm -f RegisterFile_Monolithic_11.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_11.prj + rm -f RegisterFile_Monolithic_12.ngc + rm -f RegisterFile_Monolithic_12.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_12.prj + rm -f RegisterFile_Monolithic_13.ngc + rm -f RegisterFile_Monolithic_13.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_13.prj + rm -f RegisterFile_Monolithic_14.ngc + rm -f RegisterFile_Monolithic_14.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_14.prj + rm -f RegisterFile_Monolithic_15.ngc + rm -f RegisterFile_Monolithic_15.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_15.prj + rm -f RegisterFile_Monolithic_16.ngc + rm -f RegisterFile_Monolithic_16.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_16.prj + rm -f RegisterFile_Monolithic_17.ngc + rm -f RegisterFile_Monolithic_17.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_17.prj + rm -f RegisterFile_Monolithic_18.ngc + rm -f RegisterFile_Monolithic_18.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_18.prj + rm -f RegisterFile_Monolithic_19.ngc + rm -f RegisterFile_Monolithic_19.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_19.prj + rm -f RegisterFile_Monolithic_1.ngc + rm -f RegisterFile_Monolithic_1.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_1.prj + rm -f RegisterFile_Monolithic_20.ngc + rm -f RegisterFile_Monolithic_20.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_20.prj + rm -f RegisterFile_Monolithic_21.ngc + rm -f RegisterFile_Monolithic_21.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_21.prj + rm -f RegisterFile_Monolithic_22.ngc + rm -f RegisterFile_Monolithic_22.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_22.prj + rm -f RegisterFile_Monolithic_23.ngc + rm -f RegisterFile_Monolithic_23.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_23.prj + rm -f RegisterFile_Monolithic_24.ngc + rm -f RegisterFile_Monolithic_24.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_24.prj + rm -f RegisterFile_Monolithic_25.ngc + rm -f RegisterFile_Monolithic_25.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_25.prj + rm -f RegisterFile_Monolithic_26.ngc + rm -f RegisterFile_Monolithic_26.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_26.prj + rm -f RegisterFile_Monolithic_27.ngc + rm -f RegisterFile_Monolithic_27.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_27.prj + rm -f RegisterFile_Monolithic_28.ngc + rm -f RegisterFile_Monolithic_28.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_28.prj + rm -f RegisterFile_Monolithic_29.ngc + rm -f RegisterFile_Monolithic_29.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_29.prj + rm -f RegisterFile_Monolithic_2.ngc + rm -f RegisterFile_Monolithic_2.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_2.prj + rm -f RegisterFile_Monolithic_30.ngc + rm -f RegisterFile_Monolithic_30.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_30.prj + rm -f RegisterFile_Monolithic_31.ngc + rm -f RegisterFile_Monolithic_31.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_31.prj + rm -f RegisterFile_Monolithic_32.ngc + rm -f RegisterFile_Monolithic_32.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_32.prj + rm -f RegisterFile_Monolithic_33.ngc + rm -f RegisterFile_Monolithic_33.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_33.prj + rm -f RegisterFile_Monolithic_34.ngc + rm -f RegisterFile_Monolithic_34.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_34.prj + rm -f RegisterFile_Monolithic_35.ngc + rm -f RegisterFile_Monolithic_35.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_35.prj + rm -f RegisterFile_Monolithic_3.ngc + rm -f RegisterFile_Monolithic_3.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_3.prj + rm -f RegisterFile_Monolithic_4.ngc + rm -f RegisterFile_Monolithic_4.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_4.prj + rm -f RegisterFile_Monolithic_5.ngc + rm -f RegisterFile_Monolithic_5.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_5.prj + rm -f RegisterFile_Monolithic_6.ngc + rm -f RegisterFile_Monolithic_6.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_6.prj + rm -f RegisterFile_Monolithic_7.ngc + rm -f RegisterFile_Monolithic_7.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_7.prj + rm -f RegisterFile_Monolithic_8.ngc + rm -f RegisterFile_Monolithic_8.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_8.prj + rm -f RegisterFile_Monolithic_9.ngc + rm -f RegisterFile_Monolithic_9.lso + rm -f -r xst + rm -f RegisterFile_Monolithic_9.prj + +re: clean all + +install: + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp (revision 42) @@ -94,5 +94,9 @@ READ_VAL [i] .write (0); + NRESET.write(0); + sc_start(5); + + NRESET.write(1); cout << "<" << name << "> Write the RegisterFile (no read)" << endl; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h (revision 42) @@ -23,9 +23,5 @@ #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h" #endif -#ifdef POSITION -#include "Behavioural/include/Position.h" -#else -#include "Behavioural/include/Interfaces.h" -#endif +#include "Behavioural/include/Component.h" #ifdef VHDL #include "Behavioural/include/Vhdl.h" @@ -57,8 +53,5 @@ #endif -#ifdef POSITION - private : Position * _position; -#endif - + public : Component * _component; private : Interfaces * _interfaces; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp (revision 42) @@ -17,22 +17,28 @@ void RegisterFile_Monolithic::allocation (void) { + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"RegisterFile_Monolithic" #ifdef POSITION - _position = new Position (); - - Entity * entity = _position->set_entity (_name , - "RegisterFile_Monolithic", - REGISTER ); + ,REGISTER +#endif + ); _interfaces = entity->set_interfaces(); -#else - _interfaces = new Interfaces(); -#endif // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - Interface * interface_ = _interfaces->set_interface("", IN ,SOUTH, "Generalist interface"); - - in_CLOCK = interface_->set_signal_clk ("clock" ,1); - in_NRESET = interface_->set_signal_in ("nreset",1); - + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + ,SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_YES); + } // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -44,10 +50,16 @@ for (uint32_t i=0; i<_param._nb_port_read; i++) { - Interface_fifo * interface_read = _interfaces->set_interface("read_"+toString(i), IN ,WEST, "Interface Read"); + Interface_fifo * interface = _interfaces->set_interface("read_"+toString(i) +#ifdef POSITION + , IN + ,WEST + , "Interface Read" +#endif + ); - in_READ_VAL [i] = interface_read->set_signal_valack_in ("val" , VAL); - out_READ_ACK [i] = interface_read->set_signal_valack_out ("ack" , ACK); - in_READ_ADDRESS [i] = interface_read->set_signal_in ("address", static_cast(log2(_param._nb_word))); - out_READ_DATA [i] = interface_read->set_signal_out ("data" , _param._size_word); + in_READ_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_READ_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_READ_ADDRESS [i] = interface->set_signal_in ("address", static_cast(log2(_param._nb_word))); + out_READ_DATA [i] = interface->set_signal_out ("data" , _param._size_word); } @@ -61,10 +73,16 @@ for (uint32_t i=0; i<_param._nb_port_write; i++) { - Interface_fifo * interface_write = _interfaces->set_interface("write_"+toString(i), IN ,EAST, "Interface Write"); + Interface_fifo * interface = _interfaces->set_interface("write_"+toString(i) +#ifdef POSITION + , IN + ,EAST + , "Interface Write" +#endif + ); - in_WRITE_VAL [i] = interface_write->set_signal_valack_in ("val" , VAL); - out_WRITE_ACK [i] = interface_write->set_signal_valack_out ("ack" , ACK); - in_WRITE_ADDRESS [i] = interface_write->set_signal_in ("address", static_cast(log2(_param._nb_word))); - in_WRITE_DATA [i] = interface_write->set_signal_in ("data" , _param._size_word); + in_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_WRITE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_WRITE_ADDRESS [i] = interface->set_signal_in ("address", static_cast(log2(_param._nb_word))); + in_WRITE_DATA [i] = interface->set_signal_in ("data" , _param._size_word); } @@ -79,5 +97,5 @@ #ifdef POSITION - _position->generate_file(); + _component->generate_file(); #endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp (revision 42) @@ -17,4 +17,6 @@ void RegisterFile_Monolithic::deallocation (void) { + delete _component; + delete in_CLOCK; delete in_NRESET; @@ -33,10 +35,4 @@ // ----- Register delete [] reg_DATA; - -#ifdef POSITION - delete _position; -#else - delete _interfaces; -#endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Select_Priority_Fixed.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Select_Priority_Fixed.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Select_Priority_Fixed.h (revision 42) @@ -22,9 +22,5 @@ #include "Behavioural/Generic/Select/Select_Priority_Fixed/include/Statistics.h" #endif -#ifdef POSITION -#include "Behavioural/include/Position.h" -#else -#include "Behavioural/include/Interfaces.h" -#endif +#include "Behavioural/include/Component.h" #ifdef VHDL #include "Behavioural/include/Vhdl.h" @@ -58,8 +54,5 @@ #endif -#ifdef POSITION - private : Position * _position; -#endif - + private : Component * _component; private : Interfaces * _interfaces; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed.cpp (revision 42) @@ -71,5 +71,5 @@ sensitive << *(in_VAL [i]); -#ifdef SYSTEMCASS_SPECIFIC +# ifdef SYSTEMCASS_SPECIFIC // List dependency information @@ -85,5 +85,5 @@ } -#endif +# endif #endif log_printf(FUNC,Select_Priority_Fixed,"Select_Priority_Fixed","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_allocation.cpp (revision 42) @@ -19,22 +19,27 @@ log_printf(FUNC,Select_Priority_Fixed,"allocation","Begin"); + _component = new Component (); + + Entity * entity = _component->set_entity (_name #ifdef POSITION - _position = new Position (); - - Entity * entity = _position->set_entity (_name , - "Select_Priority_Fixed", - COMBINATORY ); + ,"Select_Priority_Fixed" + ,COMBINATORY +#endif + ); _interfaces = entity->set_interfaces(); -#else - _interfaces = new Interfaces(); -#endif // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - Interface_fifo * interface_ = _interfaces->set_interface("", IN ,WEST, "Generalist interface"); + Interface_fifo * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,WEST + ,"Generalist interface" +#endif + ); - in_CLOCK = interface_->set_signal_clk ("clock" ,1, CLOCK_VHDL_NO); - in_NRESET = interface_->set_signal_in ("nreset",1); + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_NO); + in_NRESET = interface->set_signal_in ("nreset",1); in_VAL = new SC_IN (Tcontrol_t) * [_param._nb_entity]; if (_param._encoding_one_hot) @@ -43,13 +48,13 @@ for (uint32_t i=0; i<_param._nb_entity; i++) { - in_VAL [i] = interface_->set_signal_in ("val_"+toString(i),1); + in_VAL [i] = interface->set_signal_in ("val_"+toString(i),1); if (_param._encoding_one_hot) - out_ACK [i] = interface_->set_signal_out ("ack_"+toString(i),1); + out_ACK [i] = interface->set_signal_out ("ack_"+toString(i),1); } if (_param._encoding_compact) { - out_ENTITY = interface_->set_signal_out ("entity" , _param._size_entity); - out_ENTITY_ACK = interface_->set_signal_out ("entity_ack", 1); + out_ENTITY = interface->set_signal_out ("entity" , _param._size_entity); + out_ENTITY_ACK = interface->set_signal_out ("entity_ack", 1); } @@ -57,5 +62,5 @@ #ifdef POSITION - _position->generate_file(); + _component->generate_file(); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_deallocation.cpp (revision 42) @@ -34,9 +34,6 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -#ifdef POSITION - delete _position; -#else - delete _interfaces; -#endif + delete _component; + log_printf(FUNC,Select_Priority_Fixed,"deallocation","End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/SelfTest/src/test.cpp (revision 42) @@ -44,4 +44,5 @@ *********************************************************************/ sc_clock CLOCK ("clock", 1.0, 0.5); + sc_signal NRESET("nreset"); sc_signal SHIFTER_DATA_IN [param._nb_port]; sc_signal SHIFTER_SHIFT [param._nb_port]; @@ -61,4 +62,5 @@ #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) (*(_Shifter->in_CLOCK)) (CLOCK); + (*(_Shifter->in_NRESET)) (NRESET); #endif for (uint32_t i=0; i port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (*_vhdl_testbench); - _vhdl_testbench->set_clock ("in_CLOCK",false); #endif @@ -48,6 +43,4 @@ #ifdef SYSTEMC - allocation (); - #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) SC_METHOD (transition); @@ -107,10 +100,4 @@ #endif -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_allocation.cpp (revision 42) @@ -17,69 +17,82 @@ void Shifter::allocation (void) { - string rename; + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Shifter" +#ifdef POSITION + ,COMBINATORY +#endif + ); + + _interfaces = entity->set_interfaces(); #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) - in_CLOCK = new SC_CLOCK ("SC_CLOCK"); + { + Interface_fifo * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" #endif - // Interface "shifter" - in_SHIFTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; - if (_param._shift_value == 0) - in_SHIFTER_SHIFT = new SC_IN (Tshift_t) * [_param._nb_port]; - if (_param._direction == external_direction) - in_SHIFTER_DIRECTION = new SC_IN (Tdirection_t) * [_param._nb_port]; - if (_param._rotate == external_rotate) - in_SHIFTER_TYPE = new SC_IN (Ttype_t) * [_param._nb_port]; - if (_param._carry == external_carry) - in_SHIFTER_CARRY = new SC_IN (Tcarry_t) * [_param._nb_port]; - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - in_SHIFTER_CARRY_IN = new SC_IN (Tcontrol_t) * [_param._nb_port]; - else - in_SHIFTER_COMPLETION= new SC_IN (Tdata_t) * [_param._nb_port]; - out_SHIFTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_NO); + in_NRESET = interface->set_signal_in ("nreset",1, RESET_VHDL_NO); + } +#endif - for (uint32_t i=0; i<_param._nb_port; i++) - { - rename = "in_SHIFTER_DATA[" + toString(i) + "]"; - in_SHIFTER_DATA [i] = new SC_IN (Tdata_t) (rename.c_str()); + { + // Interface "shifter" + in_SHIFTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; + if (_param._shift_value == 0) + in_SHIFTER_SHIFT = new SC_IN (Tshift_t) * [_param._nb_port]; + if (_param._direction == external_direction) + in_SHIFTER_DIRECTION = new SC_IN (Tdirection_t) * [_param._nb_port]; + if (_param._rotate == external_rotate) + in_SHIFTER_TYPE = new SC_IN (Ttype_t) * [_param._nb_port]; + if (_param._carry == external_carry) + in_SHIFTER_CARRY = new SC_IN (Tcarry_t) * [_param._nb_port]; + if (_param._carry == external_completion) + if (_param._type_completion_bool == true) + in_SHIFTER_CARRY_IN = new SC_IN (Tcontrol_t) * [_param._nb_port]; + else + in_SHIFTER_COMPLETION= new SC_IN (Tdata_t) * [_param._nb_port]; + out_SHIFTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; + + for (uint32_t i=0; i<_param._nb_port; i++) + { + Interface_fifo * interface = _interfaces->set_interface("shifter_"+toString(i) +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_SHIFTER_DATA [i] = interface->set_signal_in ("data" ,_param._size_data); + if (_param._shift_value == 0) + in_SHIFTER_SHIFT [i] = interface->set_signal_in ("shift" ,static_cast(ceil(log2(_param._size_data)))); + if (_param._direction == external_direction) + in_SHIFTER_DIRECTION [i] = interface->set_signal_in ("direction" ,1); + if (_param._rotate == external_rotate) + in_SHIFTER_TYPE [i] = interface->set_signal_in ("type" ,1); + if (_param._carry == external_carry) + in_SHIFTER_CARRY [i] = interface->set_signal_in ("carry" ,1); + if (_param._carry == external_completion) + if (_param._type_completion_bool == true) + in_SHIFTER_CARRY_IN [i] = interface->set_signal_in ("carry_in" ,1); + else + in_SHIFTER_COMPLETION [i] = interface->set_signal_in ("completion",_param._size_data_completion); + out_SHIFTER_DATA [i] = interface->set_signal_out ("data" ,_param._size_data); + } + } - if (_param._shift_value == 0) - { - rename = "in_SHIFTER_SHIFT[" + toString(i) + "]"; - in_SHIFTER_SHIFT [i] = new SC_IN (Tshift_t) (rename.c_str()); - } - if (_param._direction == external_direction) - { - rename = "in_SHIFTER_DIRECTION[" + toString(i) + "]"; - in_SHIFTER_DIRECTION [i] = new SC_IN (Tdirection_t) (rename.c_str()); - } - if (_param._rotate == external_rotate) - { - rename = "in_SHIFTER_TYPE[" + toString(i) + "]"; - in_SHIFTER_TYPE [i] = new SC_IN (Ttype_t) (rename.c_str()); - } - if (_param._carry == external_carry) - { - rename = "in_SHIFTER_CARRY[" + toString(i) + "]"; - in_SHIFTER_CARRY [i] = new SC_IN (Tcarry_t) (rename.c_str()); - } +#ifdef POSITION + _component->generate_file(); +#endif - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - { - rename = "in_SHIFTER_CARRY_IN[" + toString(i) + "]"; - in_SHIFTER_CARRY_IN [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - } - else - { - rename = "in_SHIFTER_COMPLETION[" + toString(i) + "]"; - in_SHIFTER_COMPLETION [i] = new SC_IN (Tdata_t) (rename.c_str()); - } - - rename = "out_SHIFTER_DATA[" + toString(i) + "]"; - out_SHIFTER_DATA [i] = new SC_OUT(Tdata_t) (rename.c_str()); - } }; - + }; // end namespace shifter }; // end namespace generic Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_deallocation.cpp (revision 42) @@ -18,42 +18,25 @@ { #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) - delete in_CLOCK; + delete in_CLOCK; #endif - // Interface "shifter" - for (uint32_t i=0; i<_param._nb_port; i++) - { - delete in_SHIFTER_DATA [i]; - if (_param._shift_value == 0) - delete in_SHIFTER_SHIFT [i]; - if (_param._direction == external_direction) - delete in_SHIFTER_DIRECTION [i]; - if (_param._rotate == external_rotate) - delete in_SHIFTER_TYPE [i]; - if (_param._carry == external_carry) - delete in_SHIFTER_CARRY [i]; - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - delete in_SHIFTER_CARRY_IN [i]; - else - delete in_SHIFTER_COMPLETION[i]; - delete out_SHIFTER_DATA [i]; - } + delete [] in_SHIFTER_DATA ; + if (_param._shift_value == 0) + delete [] in_SHIFTER_SHIFT ; + if (_param._direction == external_direction ) + delete [] in_SHIFTER_DIRECTION ; + if (_param._rotate == external_rotate ) + delete [] in_SHIFTER_TYPE ; + if (_param._carry == external_carry ) + delete [] in_SHIFTER_CARRY ; + if (_param._carry == external_completion) + if (_param._type_completion_bool == true) + delete [] in_SHIFTER_CARRY_IN ; + else + delete [] in_SHIFTER_COMPLETION; + delete [] out_SHIFTER_DATA ; - delete in_SHIFTER_DATA ; - if (_param._shift_value == 0) - delete in_SHIFTER_SHIFT ; - if (_param._direction == external_direction ) - delete in_SHIFTER_DIRECTION ; - if (_param._rotate == external_rotate ) - delete in_SHIFTER_TYPE ; - if (_param._carry == external_carry ) - delete in_SHIFTER_CARRY ; - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - delete in_SHIFTER_CARRY_IN ; - else - delete in_SHIFTER_COMPLETION; - delete out_SHIFTER_DATA ; + delete _component; + }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_transition.cpp (revision 42) @@ -23,5 +23,5 @@ #ifdef VHDL_TESTBENCH - vhdl_testbench_transition (*_vhdl_testbench); + vhdl_testbench_transition (); #endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl.cpp (revision 42) @@ -18,7 +18,7 @@ void Shifter::vhdl (void) { - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_Pack"); vhdl_port (vhdl); @@ -26,5 +26,7 @@ vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_body.cpp (revision 42) @@ -15,9 +15,9 @@ - void Shifter::vhdl_body (Vhdl & vhdl) + void Shifter::vhdl_body (Vhdl * & vhdl) { //uint32_t log2_size_data = static_cast(ceil(log2(_param._size_data))); - vhdl.set_body ("-- Compute all case of shift"); + vhdl->set_body ("-- Compute all case of shift"); for (uint32_t i=0; i<_param._nb_port; i++) @@ -25,26 +25,26 @@ //-----[ Shift logic Left ]-------------------------------------------- if (_param._have_shift_logic_left) - vhdl.set_body ("shift_logic_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") sll CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("shift_logic_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) sll CONV_INTEGER(shift_"+toString(i)+"));"); //-----[ Shift logic Right ]------------------------------------------- if (_param._have_shift_logic_right) - vhdl.set_body ("shift_logic_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") srl CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("shift_logic_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) srl CONV_INTEGER(shift_"+toString(i)+"));"); //-----[ Shift arithmetic Left ]--------------------------------------- if (_param._have_shift_arithmetic_left) - vhdl.set_body ("shift_arithmetic_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") sla CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("shift_arithmetic_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) sla CONV_INTEGER(shift_"+toString(i)+"));"); //-----[ Shift arithmetic Right ]-------------------------------------- if (_param._have_shift_arithmetic_right) - vhdl.set_body ("shift_arithmetic_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") sra CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("shift_arithmetic_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) sra CONV_INTEGER(shift_"+toString(i)+"));"); //-----[ Rotate Left ]------------------------------------------------- if (_param._have_rotate_left) - vhdl.set_body ("rotate_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") rol CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("rotate_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) rol CONV_INTEGER(shift_"+toString(i)+"));"); //-----[ Rotate Right ]------------------------------------------------ if (_param._have_rotate_right) - vhdl.set_body ("rotate_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_DATA_"+toString(i)+") ror CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("rotate_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(in_SHIFTER_"+toString(i)+"_DATA) ror CONV_INTEGER(shift_"+toString(i)+"));"); } if (_param._size_data_completion > 0) { - vhdl.set_body (""); - vhdl.set_body ("-- Mask"); + vhdl->set_body (""); + vhdl->set_body ("-- Mask"); for (uint32_t i=0; i<_param._nb_port; i++) @@ -53,34 +53,34 @@ if (_param._type_completion_bool == true) - print_shifter_completion = "in_SHIFTER_CARRY_IN"; + print_shifter_completion = "in_SHIFTER_"+toString(i)+"_CARRY_IN"; else - print_shifter_completion = "in_SHIFTER_COMPLETION"; + print_shifter_completion = "in_SHIFTER_"+toString(i)+"_COMPLETION"; if (_param._size_data == _param._size_data_completion) { - vhdl.set_body ("shifter_completion_left_"+toString(i)+" <= "+print_shifter_completion+"_"+toString(i)+";"); - vhdl.set_body ("shifter_completion_right_"+toString(i)+" <= "+print_shifter_completion+"_"+toString(i)+";"); + vhdl->set_body ("shifter_completion_left_"+toString(i)+" <= "+print_shifter_completion+";"); + vhdl->set_body ("shifter_completion_right_"+toString(i)+" <= "+print_shifter_completion+";"); } else { - vhdl.set_body ("shifter_completion_left_"+toString(i)+std_logic_range(_param._size_data-1,_param._size_data_completion)+" <= "+std_logic_others(_param._size_data-_param._size_data_completion,0)+";"); - vhdl.set_body ("shifter_completion_left_"+toString(i)+std_logic_range(_param._size_data_completion )+" <= "+print_shifter_completion+"_"+toString(i)+";"); - - vhdl.set_body ("shifter_completion_right_"+toString(i)+std_logic_range(_param._size_data-1,_param._size_data-_param._size_data_completion)+" <= "+print_shifter_completion+"_"+toString(i)+";"); - vhdl.set_body ("shifter_completion_right_"+toString(i)+std_logic_range(_param._size_data-_param._size_data_completion )+" <= "+std_logic_others(_param._size_data-_param._size_data_completion,0)+";"); - } - - vhdl.set_body ("mask_completion_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(cst_completion) sll CONV_INTEGER(shift_"+toString(i)+"));"); - vhdl.set_body ("mask_completion_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(cst_completion) srl CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("shifter_completion_left_"+toString(i)+std_logic_range(_param._size_data-1,_param._size_data_completion)+" <= "+std_logic_others(_param._size_data-_param._size_data_completion,0)+";"); + vhdl->set_body ("shifter_completion_left_"+toString(i)+std_logic_range(_param._size_data_completion )+" <= "+print_shifter_completion+";"); + + vhdl->set_body ("shifter_completion_right_"+toString(i)+std_logic_range(_param._size_data-1,_param._size_data-_param._size_data_completion)+" <= "+print_shifter_completion+";"); + vhdl->set_body ("shifter_completion_right_"+toString(i)+std_logic_range(_param._size_data-_param._size_data_completion )+" <= "+std_logic_others(_param._size_data-_param._size_data_completion,0)+";"); + } + + vhdl->set_body ("mask_completion_left_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(cst_completion) sll CONV_INTEGER(shift_"+toString(i)+"));"); + vhdl->set_body ("mask_completion_right_"+toString(i)+" <= TO_STDLOGICVECTOR(TO_BITVECTOR(cst_completion) srl CONV_INTEGER(shift_"+toString(i)+"));"); } } - vhdl.set_body (""); - vhdl.set_body ("-- Multiplexor"); + vhdl->set_body (""); + vhdl->set_body ("-- Multiplexor"); for (uint32_t i=0; i<_param._nb_port; i++) { - vhdl.set_body ("out_SHIFTER_DATA_"+toString(i)+" <="); + vhdl->set_body ("out_SHIFTER_"+toString(i)+"_DATA <="); string print_else = " "; @@ -95,11 +95,11 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_left "; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_shift "; + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_left "; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_shift "; print_and = " and "; } @@ -107,11 +107,11 @@ { have_when = true; - print_when += print_and+" in_SHIFTER_CARRY_"+toString(i)+" = cst_is_carry_arithmetic"; - } - - if (have_when) - print_when = "when " + print_when; - - vhdl.set_body ("\t"+print_else+" shift_arithmetic_left_"+toString(i)+" "+print_when); + print_when += print_and+" in_SHIFTER_"+toString(i)+"_CARRY = cst_is_carry_arithmetic"; + } + + if (have_when) + print_when = "when " + print_when; + + vhdl->set_body ("\t"+print_else+" shift_arithmetic_left_"+toString(i)+" "+print_when); print_else = "else"; } @@ -126,11 +126,11 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_right"; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_shift "; + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_right"; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_shift "; print_and = " and "; } @@ -138,11 +138,11 @@ { have_when = true; - print_when += print_and+" in_SHIFTER_CARRY_"+toString(i)+" = cst_is_carry_arithmetic"; - } - - if (have_when) - print_when = "when " + print_when; - - vhdl.set_body ("\t"+print_else+" shift_arithmetic_right_"+toString(i)+" "+print_when); + print_when += print_and+" in_SHIFTER_"+toString(i)+"_CARRY = cst_is_carry_arithmetic"; + } + + if (have_when) + print_when = "when " + print_when; + + vhdl->set_body ("\t"+print_else+" shift_arithmetic_right_"+toString(i)+" "+print_when); print_else = "else"; } @@ -157,11 +157,11 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_left "; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_shift "; + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_left "; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_shift "; print_and = " and "; } @@ -169,5 +169,5 @@ { have_when = true; - print_when += print_and+" in_SHIFTER_CARRY_"+toString(i)+" = cst_is_carry_logic "; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_CARRY = cst_is_carry_logic "; } @@ -182,5 +182,5 @@ print_expr_completion = "(shift_logic_left_"+toString(i)+" and mask_completion_left_"+toString(i)+" ) or ( shifter_completion_left_"+toString(i)+" and not mask_completion_left_"+toString(i)+" )"; - vhdl.set_body ("\t"+print_else+" "+print_expr_completion+" "+print_when); + vhdl->set_body ("\t"+print_else+" "+print_expr_completion+" "+print_when); print_else = "else"; } @@ -195,11 +195,11 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_right"; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_shift "; + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_right"; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_shift "; print_and = " and "; } @@ -207,5 +207,5 @@ { have_when = true; - print_when += print_and+" in_SHIFTER_CARRY_"+toString(i)+" = cst_is_carry_logic "; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_CARRY = cst_is_carry_logic "; } @@ -220,5 +220,5 @@ print_expr_completion = "(shift_logic_right_"+toString(i)+" and mask_completion_right_"+toString(i)+") or ( shifter_completion_right_"+toString(i)+" and not mask_completion_right_"+toString(i)+")"; - vhdl.set_body ("\t"+print_else+" "+print_expr_completion+" "+print_when); + vhdl->set_body ("\t"+print_else+" "+print_expr_completion+" "+print_when); print_else = "else"; } @@ -233,18 +233,18 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_left "; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_rotate"; - print_and = " and "; - } - - if (have_when) - print_when = "when " + print_when; - - vhdl.set_body ("\t"+print_else+" rotate_left_"+toString(i)+" "+print_when); + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_left "; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_rotate"; + print_and = " and "; + } + + if (have_when) + print_when = "when " + print_when; + + vhdl->set_body ("\t"+print_else+" rotate_left_"+toString(i)+" "+print_when); print_else = "else"; } @@ -259,21 +259,21 @@ { have_when = true; - print_when += " in_SHIFTER_DIRECTION_"+toString(i)+" = cst_is_direction_right"; - print_and = " and "; - } - if (_param._rotate == external_rotate) - { - have_when = true; - print_when += print_and+" in_SHIFTER_TYPE_"+toString(i)+" = cst_is_type_rotate"; - print_and = " and "; - } - - if (have_when) - print_when = "when " + print_when; - - vhdl.set_body ("\t"+print_else+" rotate_right_"+toString(i)+" "+print_when); - print_else = "else"; - } - vhdl.set_body (";"); + print_when += " in_SHIFTER_"+toString(i)+"_DIRECTION = cst_is_direction_right"; + print_and = " and "; + } + if (_param._rotate == external_rotate) + { + have_when = true; + print_when += print_and+" in_SHIFTER_"+toString(i)+"_TYPE = cst_is_type_rotate"; + print_and = " and "; + } + + if (have_when) + print_when = "when " + print_when; + + vhdl->set_body ("\t"+print_else+" rotate_right_"+toString(i)+" "+print_when); + print_else = "else"; + } + vhdl->set_body (";"); } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_declaration.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_declaration.cpp (revision 42) @@ -15,54 +15,54 @@ - void Shifter::vhdl_declaration (Vhdl & vhdl) + void Shifter::vhdl_declaration (Vhdl * & vhdl) { uint32_t log2_size_data = static_cast(ceil(log2(_param._size_data))); - vhdl.set_constant("cst_is_direction_left ",1,_left ); - vhdl.set_constant("cst_is_direction_right ",1,_right ); - vhdl.set_constant("cst_is_type_shift ",1,_shift ); - vhdl.set_constant("cst_is_type_rotate ",1,_rotate ); - vhdl.set_constant("cst_is_carry_arithmetic",1,_arithmetic); - vhdl.set_constant("cst_is_carry_logic ",1,_logic ); - vhdl.set_constant("cst_completion ",_param._size_data,"(others => '1')"); + vhdl->set_constant("cst_is_direction_left ",1,_left ); + vhdl->set_constant("cst_is_direction_right ",1,_right ); + vhdl->set_constant("cst_is_type_shift ",1,_shift ); + vhdl->set_constant("cst_is_type_rotate ",1,_rotate ); + vhdl->set_constant("cst_is_carry_arithmetic",1,_arithmetic); + vhdl->set_constant("cst_is_carry_logic ",1,_logic ); + vhdl->set_constant("cst_completion ",_param._size_data,"(others => '1')"); for (uint32_t i=0; i<_param._nb_port; i++) { if (_param._shift_value != 0) - vhdl.set_constant("shift_"+toString(i),log2_size_data, _param._shift_value); + vhdl->set_constant("shift_"+toString(i),log2_size_data, _param._shift_value); else - vhdl.set_alias ("shift_"+toString(i),std_logic(log2_size_data), "in_SHIFTER_SHIFT_"+toString(i),std_logic_range(log2_size_data)); + vhdl->set_alias ("shift_"+toString(i),std_logic(log2_size_data), "in_SHIFTER_"+toString(i)+"_SHIFT",std_logic_range(log2_size_data)); if (_param._size_data_completion > 0) { - vhdl.set_signal ("shifter_completion_left_"+toString(i)+" ",_param._size_data); - vhdl.set_signal ("shifter_completion_right_"+toString(i)+"",_param._size_data); - vhdl.set_signal ("mask_completion_left_"+toString(i)+" ",_param._size_data); - vhdl.set_signal ("mask_completion_right_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("shifter_completion_left_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("shifter_completion_right_"+toString(i)+"",_param._size_data); + vhdl->set_signal ("mask_completion_left_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("mask_completion_right_"+toString(i)+" ",_param._size_data); } //-----[ Shift logic Left ]-------------------------------------------- if (_param._have_shift_logic_left) - vhdl.set_signal ("shift_logic_left_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("shift_logic_left_"+toString(i)+" ",_param._size_data); //-----[ Shift logic Right ]------------------------------------------- if (_param._have_shift_logic_right) - vhdl.set_signal ("shift_logic_right_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("shift_logic_right_"+toString(i)+" ",_param._size_data); //-----[ Shift arithmetic Left ]--------------------------------------- if (_param._have_shift_arithmetic_left) - vhdl.set_signal ("shift_arithmetic_left_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("shift_arithmetic_left_"+toString(i)+" ",_param._size_data); //-----[ Shift arithmetic Right ]-------------------------------------- if (_param._have_shift_arithmetic_right) - vhdl.set_signal ("shift_arithmetic_right_"+toString(i)+"",_param._size_data); + vhdl->set_signal ("shift_arithmetic_right_"+toString(i)+"",_param._size_data); //-----[ Rotate Left ]------------------------------------------------- if (_param._have_rotate_left) - vhdl.set_signal ("rotate_left_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("rotate_left_"+toString(i)+" ",_param._size_data); //-----[ Rotate Right ]------------------------------------------------ if (_param._have_rotate_right) - vhdl.set_signal ("rotate_right_"+toString(i)+" ",_param._size_data); + vhdl->set_signal ("rotate_right_"+toString(i)+" ",_param._size_data); } }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_port.cpp (revision 42) @@ -15,25 +15,7 @@ - void Shifter::vhdl_port (Vhdl & vhdl) + void Shifter::vhdl_port (Vhdl * & vhdl) { - for (uint32_t i=0; i<_param._nb_port; i++) - { - vhdl.set_port (" in_SHIFTER_DATA_"+toString(i)+" ", IN, _param._size_data); - if (_param._shift_value == 0) - vhdl.set_port (" in_SHIFTER_SHIFT_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._size_data)))); - if (_param._direction == external_direction) - vhdl.set_port (" in_SHIFTER_DIRECTION_"+toString(i)+" ", IN, 1); - if (_param._rotate == external_rotate) - vhdl.set_port (" in_SHIFTER_TYPE_"+toString(i)+" ", IN, 1); - if (_param._carry == external_carry) - vhdl.set_port (" in_SHIFTER_CARRY_"+toString(i)+" ", IN, 1); - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - vhdl.set_port (" in_SHIFTER_CARRY_IN_"+toString(i)+" ", IN, 1); - else - vhdl.set_port (" in_SHIFTER_COMPLETION_"+toString(i)+"", IN, _param._size_data_completion); - - vhdl.set_port ("out_SHIFTER_DATA_"+toString(i)+" ",OUT, _param._size_data); - } + _interfaces->set_port(vhdl); }; }; // end namespace shifter Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,44 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Generic/Shifter/include/Shifter.h" - -namespace morpheo { -namespace behavioural { -namespace generic { -namespace shifter { - - - void Shifter::vhdl_testbench_port (Vhdl_Testbench & vhdl_testbench) - { - for (uint32_t i=0; i<_param._nb_port; i++) - { - vhdl_testbench.set_port (" in_SHIFTER_DATA_"+toString(i) , IN, _param._size_data); - if (_param._shift_value == 0) - vhdl_testbench.set_port (" in_SHIFTER_SHIFT_"+toString(i) , IN, static_cast(ceil(log2(_param._size_data)))); - if (_param._direction == external_direction) - vhdl_testbench.set_port (" in_SHIFTER_DIRECTION_"+toString(i) , IN, 1); - if (_param._rotate == external_rotate) - vhdl_testbench.set_port (" in_SHIFTER_TYPE_"+toString(i) , IN, 1); - if (_param._carry == external_carry) - vhdl_testbench.set_port (" in_SHIFTER_CARRY_"+toString(i) , IN, 1); - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - vhdl_testbench.set_port (" in_SHIFTER_CARRY_IN_"+toString(i) , IN, 1); - else - vhdl_testbench.set_port (" in_SHIFTER_COMPLETION_"+toString(i), IN, _param._size_data_completion); - vhdl_testbench.set_port ("out_SHIFTER_DATA_"+toString(i) ,OUT, _param._size_data); - } - }; - -}; // end namespace shifter -}; // end namespace generic - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Shifter/src/Shifter_vhdl_testbench_transition.cpp (revision 42) @@ -15,37 +15,9 @@ - void Shifter::vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench) + void Shifter::vhdl_testbench_transition (void) { -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif + sc_start(0); - // In order with file Shifter_vhdl_testbench_port.cpp - - for (uint32_t i=0; i<_param._nb_port; i++) - { - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_DATA [i])); - if (_param._shift_value == 0) - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_SHIFT [i])); - if (_param._direction == external_direction) - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_DIRECTION [i])); - if (_param._rotate == external_rotate) - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_TYPE [i])); - if (_param._carry == external_carry) - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_CARRY [i])); - if (_param._carry == external_completion) - if (_param._type_completion_bool == true) - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_CARRY_IN [i])); - else - vhdl_testbench.add_input (PORT_READ( in_SHIFTER_COMPLETION[i])); - vhdl_testbench.add_output (PORT_READ(out_SHIFTER_DATA [i])); - } - - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - vhdl_testbench.add_test(true); - - vhdl_testbench.new_cycle (); // always at the end + _interfaces->testbench(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg (revision 42) @@ -1,5 +1,5 @@ Victim_Pseudo_LRU -4 4 *2 # nb_entity -1 1 +2 # nb_access -1 1 +2 # nb_update -1 1 *2 # size_table +4 16 *2 # nb_entity +1 4 *2 # nb_access +1 4 *2 # nb_update +1 16 *2 # size_table Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h (revision 42) @@ -40,6 +40,8 @@ #include "Behavioural/include/Vhdl.h" #endif -#ifdef VHDL_TESTBENCH -#include "Behavioural/include/Vhdl_Testbench.h" +#ifdef POSITION +#include "Behavioural/include/Component.h" +#else +#include "Behavioural/include/Interfaces.h" #endif @@ -175,7 +177,8 @@ #endif -#ifdef VHDL_TESTBENCH - private : Vhdl_Testbench * _vhdl_testbench; -#endif +#ifdef POSITION + private : Component * _component; +#endif + private : Interfaces * _interfaces; #ifdef SYSTEMC @@ -237,13 +240,11 @@ #if VHDL public : void vhdl (void); - private : void vhdl_port (Vhdl & vhdl); - private : void vhdl_declaration (Vhdl & vhdl); - private : void vhdl_body (Vhdl & vhdl); + private : void vhdl_port (Vhdl * & vhdl); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); #endif #ifdef VHDL_TESTBENCH - private : void vhdl_testbench (Vhdl_Testbench & vhdl_testbench); - private : void vhdl_testbench_port (Vhdl_Testbench & vhdl_testbench); - private : void vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench); + private : void vhdl_testbench_transition (void); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp (revision 42) @@ -28,4 +28,9 @@ log_printf(FUNC,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Begin"); +#ifdef SYSTEMC + log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Allocation"); + allocation (); +#endif + #ifdef STATISTICS log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Allocation of statistics"); @@ -37,14 +42,4 @@ #endif -#ifdef VHDL_TESTBENCH - // Creation of a testbench - // -> port - // -> clock's signals - log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Creation of Testbench"); - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (*_vhdl_testbench); - _vhdl_testbench->set_clock ("in_CLOCK",true); -#endif - #ifdef VHDL // generate the vhdl @@ -54,7 +49,4 @@ #ifdef SYSTEMC - log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Allocation"); - allocation (); - log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","Definition of sc_method"); SC_METHOD (transition); @@ -100,10 +92,4 @@ #endif -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp (revision 42) @@ -17,60 +17,65 @@ void Victim_Pseudo_LRU::allocation (void) { - in_CLOCK = new SC_CLOCK ("in_CLOCK"); - in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET"); +#ifdef POSITION + _component = new Component (); - // -----[ Interface access ]------------------------------------------- - in_ACCESS_VAL = new SC_IN (Tcontrol_t) * [_param._nb_access]; - out_ACCESS_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_access]; - if (_param._size_table>1) - in_ACCESS_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_access]; - out_ACCESS_ENTITY = new SC_OUT(Tentity_t ) * [_param._nb_access]; + Entity * entity = _component->set_entity (_name , + "Select_Priority_Fixed", + COMBINATORY ); - for (uint32_t i=0; i<_param._nb_access; i++) - { - string rename; + _interfaces = entity->set_interfaces(); +#else + _interfaces = new Interfaces(); +#endif - rename = "in_ACCESS_VAL[" + toString(i) + "]"; - in_ACCESS_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface_fifo * interface = _interfaces->set_interface("", IN ,WEST, "Generalist interface"); + + in_CLOCK = interface->set_signal_clk ("clock" ,1); + in_NRESET = interface->set_signal_in ("nreset",1); + } - rename = "out_ACCESS_ACK[" + toString(i) + "]"; - out_ACCESS_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); + // ~~~~~[ Interface : "access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + in_ACCESS_VAL = new SC_IN (Tcontrol_t) * [_param._nb_access]; + out_ACCESS_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_access]; + if (_param._size_table>1) + in_ACCESS_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_access]; + out_ACCESS_ENTITY = new SC_OUT(Tentity_t ) * [_param._nb_access]; + + for (uint32_t i=0; i<_param._nb_access; i++) + { + Interface_fifo * interface = _interfaces->set_interface("access_"+toString(i), IN ,WEST, "Access"); - if (_param._size_table>1) - { - rename = "in_ACCESS_ADDRESS[" + toString(i) + "]"; - in_ACCESS_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - } - rename = "out_ACCESS_ENTITY[" + toString(i) + "]"; - out_ACCESS_ENTITY [i] = new SC_OUT(Tentity_t ) (rename.c_str()); - } + in_ACCESS_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_ACCESS_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + + if (_param._size_table>1) + in_ACCESS_ADDRESS [i] = interface->set_signal_in ("address",static_cast(log2(_param._size_table))); + out_ACCESS_ENTITY [i] = interface->set_signal_out ("entity" ,static_cast(log2(_param._nb_entity ))); + } + } - // -----[ Interface update ]------------------------------------------- - in_UPDATE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_update]; - out_UPDATE_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_update]; - if (_param._size_table>1) - in_UPDATE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_update]; - in_UPDATE_ENTITY = new SC_IN (Tentity_t ) * [_param._nb_update]; + // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + { + in_UPDATE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_update]; + out_UPDATE_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_update]; + if (_param._size_table>1) + in_UPDATE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_update]; + in_UPDATE_ENTITY = new SC_IN (Tentity_t ) * [_param._nb_update]; + + for (uint32_t i=0; i<_param._nb_update; i++) + { + Interface_fifo * interface = _interfaces->set_interface("update_"+toString(i), IN ,EAST, "Update"); - for (uint32_t i=0; i<_param._nb_update; i++) - { - string rename; - - rename = "in_UPDATE_VAL[" + toString(i) + "]"; - in_UPDATE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_UPDATE_ACK[" + toString(i) + "]";; - out_UPDATE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - if (_param._size_table>1) - { - rename = "in_UPDATE_ADDRESS[" + toString(i) + "]"; - in_UPDATE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - } - - rename = "in_UPDATE_ENTITY[" + toString(i) + "]"; - in_UPDATE_ENTITY [i] = new SC_IN (Tentity_t ) (rename.c_str()); - } - + in_UPDATE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_UPDATE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + if (_param._size_table>1) + in_UPDATE_ADDRESS [i] = interface->set_signal_in ("address",static_cast(log2(_param._size_table))); + in_UPDATE_ENTITY [i] = interface->set_signal_in ("entity" ,static_cast(log2(_param._nb_entity ))); + } + } // -----[ Register ]--------------------------------------------------- reg_TABLE = new entry_t * [_param._size_table]; @@ -81,4 +86,8 @@ // -----[ Internal ]--------------------------------------------------- internal_ACCESS_ENTITY = new Tentity_t [_param._nb_entity]; + +#ifdef POSITION + _component->generate_file(); +#endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp (revision 42) @@ -17,46 +17,31 @@ void Victim_Pseudo_LRU::deallocation (void) { - delete in_CLOCK; - delete in_NRESET; + delete in_CLOCK; + delete in_NRESET; // -----[ Interface access ]------------------------------------------- - for (uint32_t i=0; i<_param._nb_access; i++) - { - delete in_ACCESS_VAL [i]; - delete out_ACCESS_ACK [i]; - if (_param._size_table>1) - delete in_ACCESS_ADDRESS [i]; - delete out_ACCESS_ENTITY [i]; - } - - delete in_ACCESS_VAL ; - delete out_ACCESS_ACK ; + delete [] in_ACCESS_VAL ; + delete [] out_ACCESS_ACK ; if (_param._size_table>1) - delete in_ACCESS_ADDRESS; - delete out_ACCESS_ENTITY ; + delete [] in_ACCESS_ADDRESS; + delete [] out_ACCESS_ENTITY ; // -----[ Interface update ]------------------------------------------- - for (uint32_t i=0; i<_param._nb_update; i++) - { - delete in_UPDATE_VAL [i]; - delete out_UPDATE_ACK [i]; - if (_param._size_table>1) - delete in_UPDATE_ADDRESS [i]; - delete in_UPDATE_ENTITY [i]; - } - delete in_UPDATE_VAL ; - delete out_UPDATE_ACK ; + delete [] in_UPDATE_VAL ; + delete [] out_UPDATE_ACK ; if (_param._size_table>1) - delete in_UPDATE_ADDRESS; - delete in_UPDATE_ENTITY ; + delete [] in_UPDATE_ADDRESS; + delete [] in_UPDATE_ENTITY ; // -----[ Register ]--------------------------------------------------- - for (uint32_t i=0; i<_param._size_table; i++) - { - delete reg_TABLE [i]; - } - delete reg_TABLE; + delete [] reg_TABLE; // -----[ Internal ]--------------------------------------------------- - delete internal_ACCESS_ENTITY; + delete [] internal_ACCESS_ENTITY; + +#ifdef POSITION + delete _component; +#else + delete _interfaces; +#endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp (revision 42) @@ -67,5 +67,5 @@ #ifdef VHDL_TESTBENCH - vhdl_testbench_transition (*_vhdl_testbench); + vhdl_testbench_transition (); #endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl.cpp (revision 42) @@ -22,8 +22,8 @@ log_printf(TRACE,Victim_Pseudo_LRU,"vhdl","Construction of vhdl"); - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); log_printf(TRACE,Victim_Pseudo_LRU,"vhdl","Set library"); - vhdl.set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_Pack"); log_printf(TRACE,Victim_Pseudo_LRU,"vhdl","Set port"); @@ -34,5 +34,7 @@ vhdl_body (vhdl); log_printf(TRACE,Victim_Pseudo_LRU,"vhdl","Generate File"); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; log_printf(FUNC,Victim_Pseudo_LRU,"vhdl","End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp (revision 42) @@ -15,27 +15,27 @@ namespace victim_pseudo_lru { - void Victim_Pseudo_LRU::vhdl_body (Vhdl & vhdl) + void Victim_Pseudo_LRU::vhdl_body (Vhdl * & vhdl) { - vhdl.set_body (""); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body ("-- Access"); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body (""); - vhdl.set_body ("-- Tree of Pseudo-LRU - example to 8 entity"); - vhdl.set_body ("--"); - vhdl.set_body ("-- 4-5-6-7? "); - vhdl.set_body ("-- 0_______|_______1 "); - vhdl.set_body ("-- | | "); - vhdl.set_body ("-- 2-3? 6-7? "); - vhdl.set_body ("-- 0___|___1 0___|___1 "); - vhdl.set_body ("-- | | | | "); - vhdl.set_body ("-- 1? 3? 5? 7? "); - vhdl.set_body ("-- 0_|_1 0_|_1 0_|_1 0_|_1 "); - vhdl.set_body ("-- | | | | | | | | "); - vhdl.set_body ("-- Way Way Way Way Way Way Way Way "); - vhdl.set_body ("-- 0 1 2 3 4 5 6 7 "); - for (uint32_t i=0; i<_param._nb_access; i++) - { - vhdl.set_body (""); + vhdl->set_body (""); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body ("-- Access"); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body (""); + vhdl->set_body ("-- Tree of Pseudo-LRU - example to 8 entity"); + vhdl->set_body ("--"); + vhdl->set_body ("-- 4-5-6-7? "); + vhdl->set_body ("-- 0_______|_______1 "); + vhdl->set_body ("-- | | "); + vhdl->set_body ("-- 2-3? 6-7? "); + vhdl->set_body ("-- 0___|___1 0___|___1 "); + vhdl->set_body ("-- | | | | "); + vhdl->set_body ("-- 1? 3? 5? 7? "); + vhdl->set_body ("-- 0_|_1 0_|_1 0_|_1 0_|_1 "); + vhdl->set_body ("-- | | | | | | | | "); + vhdl->set_body ("-- Way Way Way Way Way Way Way Way "); + vhdl->set_body ("-- 0 1 2 3 4 5 6 7 "); + for (uint32_t i=0; i<_param._nb_access; i++) + { + vhdl->set_body (""); // Read the table @@ -43,14 +43,14 @@ if (_param._size_table>1) - access_address = "conv_integer(in_ACCESS_ADDRESS_"+toString(i)+")"; + access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; else access_address = "0"; - vhdl.set_body ("access_entry_"+toString(i)+" <= reg_TABLE ("+access_address+");"); - vhdl.set_body (""); + vhdl->set_body ("access_entry_"+toString(i)+" <= reg_TABLE ("+access_address+");"); + vhdl->set_body (""); for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) { - vhdl.set_body ("access_entity_"+toString(i)+"("+toString(j)+") <= "); + vhdl->set_body ("access_entity_"+toString(i)+"("+toString(j)+") <= "); uint32_t cpt=0; @@ -72,17 +72,17 @@ string print_else = (k==(1<set_body ("\t"+print_else+"access_entry_"+toString(i)+"("+toString(k)+") "+cond); cpt ++; } - vhdl.set_body ("\t;"); + vhdl->set_body ("\t;"); } } - vhdl.set_body (""); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body ("-- Update"); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body (""); - vhdl.set_body ("-- port access"); + vhdl->set_body (""); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body ("-- Update"); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body (""); + vhdl->set_body ("-- port access"); for (uint32_t i=0; i<_param._nb_access; i++) for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) @@ -107,15 +107,15 @@ } - vhdl.set_body ("access_next_entry_"+toString(i)+"("+toString(k)+") <="); - vhdl.set_body ("\tnot access_entity_"+toString(i)+"("+toString(j)+") "+cond); + vhdl->set_body ("access_next_entry_"+toString(i)+"("+toString(k)+") <="); + vhdl->set_body ("\tnot access_entity_"+toString(i)+"("+toString(j)+") "+cond); if (have_cond == true) - vhdl.set_body ("\telse access_entry_"+toString(i)+"("+toString(k)+")"); - vhdl.set_body ("\t;"); + vhdl->set_body ("\telse access_entry_"+toString(i)+"("+toString(k)+")"); + vhdl->set_body ("\t;"); cpt ++; } } - vhdl.set_body (""); - vhdl.set_body ("-- port update"); + vhdl->set_body (""); + vhdl->set_body ("-- port update"); for (uint32_t i=0; i<_param._nb_update; i++) for (int32_t j=static_cast(log2(_param._nb_entity)-1); j>=0; j--) @@ -137,9 +137,9 @@ else cond += " and"; - cond += " in_UPDATE_ENTITY_"+toString(i)+"("+toString(l)+")='"+toString((cpt>>(l-(j+1)))&1)+"'"; + cond += " in_UPDATE_"+toString(i)+"_ENTITY("+toString(l)+")='"+toString((cpt>>(l-(j+1)))&1)+"'"; } - vhdl.set_body ("update_next_entry_"+toString(i)+"("+toString(k)+") <="); - vhdl.set_body ("\tnot in_UPDATE_ENTITY_"+toString(i)+"("+toString(j)+") "+cond); + vhdl->set_body ("update_next_entry_"+toString(i)+"("+toString(k)+") <="); + vhdl->set_body ("\tnot in_UPDATE_"+toString(i)+"_ENTITY("+toString(j)+") "+cond); if (have_cond == true) { @@ -147,25 +147,25 @@ if (_param._size_table>1) - update_address = "conv_integer(in_UPDATE_ADDRESS_"+toString(i)+")"; + update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; else update_address = "0"; - vhdl.set_body ("\telse reg_TABLE ("+update_address+")("+toString(k)+")"); + vhdl->set_body ("\telse reg_TABLE ("+update_address+")("+toString(k)+")"); } - vhdl.set_body ("\t;"); + vhdl->set_body ("\t;"); cpt ++; } } - vhdl.set_body (""); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body ("-- Transition"); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body (""); - - vhdl.set_body ("reg_TABLE_write: process (in_CLOCK)"); - vhdl.set_body ("begin"); - vhdl.set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); - vhdl.set_body ("\t\t-- Access port"); + vhdl->set_body (""); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body ("-- Transition"); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body (""); + + vhdl->set_body ("reg_TABLE_write: process (in_CLOCK)"); + vhdl->set_body ("begin"); + vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); + vhdl->set_body ("\t\t-- Access port"); for (uint32_t i=0; i<_param._nb_access; i++) { @@ -173,14 +173,14 @@ if (_param._size_table>1) - access_address = "conv_integer(in_ACCESS_ADDRESS_"+toString(i)+")"; + access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; else access_address = "0"; - vhdl.set_body ("\t\tif (in_ACCESS_VAL_"+toString(i)+" = '1') then"); - vhdl.set_body ("\t\t\treg_TABLE ("+access_address+") <= access_next_entry_"+toString(i)+";"); - vhdl.set_body ("\t\tend if;"); - } - - vhdl.set_body ("\t\t-- Update port"); + vhdl->set_body ("\t\tif (in_ACCESS_"+toString(i)+"_VAL = '1') then"); + vhdl->set_body ("\t\t\treg_TABLE ("+access_address+") <= access_next_entry_"+toString(i)+";"); + vhdl->set_body ("\t\tend if;"); + } + + vhdl->set_body ("\t\t-- Update port"); for (uint32_t i=0; i<_param._nb_update; i++) { @@ -188,32 +188,32 @@ if (_param._size_table>1) - update_address = "conv_integer(in_UPDATE_ADDRESS_"+toString(i)+")"; + update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; else update_address = "0"; - vhdl.set_body ("\t\tif (in_UPDATE_VAL_"+toString(i)+" = '1') then"); - vhdl.set_body ("\t\t\treg_TABLE ("+update_address+") <= update_next_entry_"+toString(i)+";"); - vhdl.set_body ("\t\tend if;"); - } - - vhdl.set_body ("\tend if;"); - vhdl.set_body ("end process reg_TABLE_write;"); - - vhdl.set_body (""); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body ("-- Output"); - vhdl.set_body ("-----------------------------------------------------------------------------"); - vhdl.set_body (""); - vhdl.set_body ("-- Ack is always "); - vhdl.set_body (""); - for (uint32_t i=0; i<_param._nb_access; i++) - { - vhdl.set_body ("out_ACCESS_ACK_"+toString(i)+" <= '1';"); - vhdl.set_body ("out_ACCESS_ENTITY_"+toString(i)+" <= access_entity_"+toString(i)+" when in_ACCESS_VAL_"+toString(i)+" = '1' else (others => '0');"); - } - vhdl.set_body (""); + vhdl->set_body ("\t\tif (in_UPDATE_"+toString(i)+"_VAL = '1') then"); + vhdl->set_body ("\t\t\treg_TABLE ("+update_address+") <= update_next_entry_"+toString(i)+";"); + vhdl->set_body ("\t\tend if;"); + } + + vhdl->set_body ("\tend if;"); + vhdl->set_body ("end process reg_TABLE_write;"); + + vhdl->set_body (""); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body ("-- Output"); + vhdl->set_body ("-----------------------------------------------------------------------------"); + vhdl->set_body (""); + vhdl->set_body ("-- Ack is always "); + vhdl->set_body (""); + for (uint32_t i=0; i<_param._nb_access; i++) + { + vhdl->set_body ("out_ACCESS_"+toString(i)+"_ACK <= '1';"); + vhdl->set_body ("out_ACCESS_"+toString(i)+"_ENTITY <= access_entity_"+toString(i)+" when in_ACCESS_"+toString(i)+"_VAL = '1' else (others => '0');"); + } + vhdl->set_body (""); for (uint32_t i=0; i<_param._nb_update; i++) { - vhdl.set_body ("out_UPDATE_ACK_"+toString(i)+" <= '1';"); + vhdl->set_body ("out_UPDATE_"+toString(i)+"_ACK <= '1';"); } }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp (revision 42) @@ -16,20 +16,20 @@ - void Victim_Pseudo_LRU::vhdl_declaration (Vhdl & vhdl) + void Victim_Pseudo_LRU::vhdl_declaration (Vhdl * & vhdl) { - vhdl.set_type ("Ttable", "array (" + toString(_param._size_table-1) + " downto 0) of "+std_logic(_param._nb_entity-1)); + vhdl->set_type ("Ttable", "array (" + toString(_param._size_table-1) + " downto 0) of "+std_logic(_param._nb_entity-1)); - vhdl.set_signal ("reg_TABLE", "Ttable"); + vhdl->set_signal ("reg_TABLE", "Ttable"); for (uint32_t i=0; i<_param._nb_access; i++) { - vhdl.set_signal ("access_entry_"+toString(i)+" ",std_logic(_param._nb_entity-1)); - vhdl.set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); - vhdl.set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast(log2(_param._nb_entity)))); + vhdl->set_signal ("access_entry_"+toString(i)+" ",std_logic(_param._nb_entity-1)); + vhdl->set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); + vhdl->set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast(log2(_param._nb_entity)))); } for (uint32_t i=0; i<_param._nb_update; i++) { - vhdl.set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); + vhdl->set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param._nb_entity-1)); } }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_port.cpp (revision 42) @@ -16,26 +16,7 @@ - void Victim_Pseudo_LRU::vhdl_port (Vhdl & vhdl) + void Victim_Pseudo_LRU::vhdl_port (Vhdl * & vhdl) { - vhdl.set_port ("in_CLOCK ", IN, 1); - vhdl.set_port ("in_NRESET", IN, 1); - - for (uint32_t i = 0; i < _param._nb_access; i ++) - { - vhdl.set_port (" in_ACCESS_VAL_"+toString(i)+" ",IN ,std_logic(1)); - vhdl.set_port ("out_ACCESS_ACK_"+toString(i)+" ",OUT,std_logic(1)); - if (_param._size_table>1) - vhdl.set_port (" in_ACCESS_ADDRESS_"+toString(i)+" ",IN ,std_logic(static_cast(log2(_param._size_table)))); - vhdl.set_port ("out_ACCESS_ENTITY_"+toString(i)+" ",OUT,std_logic(static_cast(log2(_param._nb_entity)))); - } - - for (uint32_t i = 0; i < _param._nb_update; i ++) - { - vhdl.set_port (" in_UPDATE_VAL_"+toString(i)+" ",IN ,std_logic(1)); - vhdl.set_port ("out_UPDATE_ACK_"+toString(i)+" ",OUT,std_logic(1)); - if (_param._size_table>1) - vhdl.set_port (" in_UPDATE_ADDRESS_"+toString(i)+" ",IN ,std_logic(static_cast(log2(_param._size_table)))); - vhdl.set_port (" in_UPDATE_ENTITY_"+toString(i)+" ",IN ,std_logic(static_cast(log2(_param._nb_entity)))); - } + _interfaces->set_port(vhdl); }; Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,45 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" - -namespace morpheo { -namespace behavioural { -namespace generic { -namespace victim { -namespace victim_pseudo_lru { - - - void Victim_Pseudo_LRU::vhdl_testbench_port (Vhdl_Testbench & vhdl_testbench) - { - vhdl_testbench.set_port (" in_NRESET",IN ,1); - for (uint32_t i = 0; i < _param._nb_access; i ++) - { - vhdl_testbench.set_port (" in_ACCESS_VAL_"+toString(i)+" ",IN ,1); - vhdl_testbench.set_port ("out_ACCESS_ACK_"+toString(i)+" ",OUT,1); - if (_param._size_table>1) - vhdl_testbench.set_port (" in_ACCESS_ADDRESS_"+toString(i)+" ",IN ,static_cast(log2(_param._size_table))); - vhdl_testbench.set_port ("out_ACCESS_ENTITY_"+toString(i)+" ",OUT,static_cast(log2(_param._nb_entity))); - } - - for (uint32_t i = 0; i < _param._nb_update; i ++) - { - vhdl_testbench.set_port (" in_UPDATE_VAL_"+toString(i)+" ",IN ,1); - vhdl_testbench.set_port ("out_UPDATE_ACK_"+toString(i)+" ",OUT,1); - if (_param._size_table>1) - vhdl_testbench.set_port (" in_UPDATE_ADDRESS_"+toString(i)+" ",IN ,static_cast(log2(_param._size_table))); - vhdl_testbench.set_port (" in_UPDATE_ENTITY_"+toString(i)+" ",IN ,static_cast(log2(_param._nb_entity))); - } - }; - -}; // end namespace victim_pseudo_lru -}; // end namespace victim -}; // end namespace generic -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_testbench_transition.cpp (revision 42) @@ -16,32 +16,10 @@ - void Victim_Pseudo_LRU::vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench) + void Victim_Pseudo_LRU::vhdl_testbench_transition (void) { -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif - vhdl_testbench.add_input (PORT_READ(in_NRESET)); + // Evaluation before read the ouput signal + sc_start(0); - for (uint32_t i = 0; i < _param._nb_access; i ++) - { - vhdl_testbench.add_input (PORT_READ( in_ACCESS_VAL [i])); - vhdl_testbench.add_output (PORT_READ(out_ACCESS_ACK [i])); - if (_param._size_table>1) - vhdl_testbench.add_input (PORT_READ( in_ACCESS_ADDRESS [i])); - vhdl_testbench.add_output (PORT_READ(out_ACCESS_ENTITY [i])); - } - - for (uint32_t i = 0; i < _param._nb_update; i ++) - { - vhdl_testbench.add_input (PORT_READ( in_UPDATE_VAL [i])); - vhdl_testbench.add_output (PORT_READ(out_UPDATE_ACK [i])); - if (_param._size_table>1) - vhdl_testbench.add_input (PORT_READ( in_UPDATE_ADDRESS [i])); - vhdl_testbench.add_input (PORT_READ( in_UPDATE_ENTITY [i])); - } - - vhdl_testbench.add_test(true); - - vhdl_testbench.new_cycle (); // always at the end + _interfaces->testbench(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest (revision 42) @@ -96,7 +96,7 @@ $(DIR_LOG)/%.exec.log : $(DIR_CFG_GEN)/%.cfg $(DIR_BIN)/$(EXEC).x @$(ECHO) "Execute : $*" - @$(EXPORT) SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; $(VALGRIND) ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ - declare -i count=`$(GREP) -ch "Test KO" $@`; \ - if $(TEST) $$count -eq 0; \ + @$(EXPORT) SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ + declare -i count=`$(GREP) -ch "Test OK" $@`; \ + if $(TEST) $$count -ne 0; \ then echo " $* ... OK"; \ else echo " $* ... KO"; exit 1; \ @@ -119,7 +119,7 @@ @$(MKDIR) $@ -selftest_clean_all : library_clean config_clean +selftest_clean_all : library_clean -selftest_clean : +selftest_clean : config_clean @$(RM) $(DIR_LOG) \ $(DIR_CFG_USER)/*~ \ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis (revision 42) @@ -69,6 +69,6 @@ @$(ECHO) "VHDL's Simulation : $*" @$(MODELTECH_VSIM) "$(DIR_WORK).`$(BASENAME) $* |$(UPPERtoLOWER)`" &> $@ - declare -i count=`$(GREP) -ch "Test KO" $@`; \ - if $(TEST) $$count -eq 0; \ + declare -i count=`$(GREP) -ch "Test OK" $@`; \ + if $(TEST) $$count -ne 0; \ then echo " $* ... OK"; \ else echo " $* ... KO"; exit 1; \ Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags (revision 42) @@ -17,15 +17,18 @@ -DVHDL \ -DVHDL_TESTBENCH \ - -DCONFIGURATION \ - -DPOSITION \ - -DSTATISTICS \ + -DVHDL_TESTBENCH_ASSERT \ -DDEBUG=DEBUG_NONE +# -DCONFIGURATION \ +# -DSTATISTICS \ +# -DPOSITION \ + # Flags : -# DEBUG={level} - Print Debug Message -# SYSTEMC - To generate a systemc's model -# VHDL - To generate a vhdl's models -# VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model -# STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file -# POSITION - To generate a position's files (it's input of viewer) -# CONFIGURATION - To generate a configuration's file (it's input of viewer and generator) +# DEBUG={level} - Print Debug Message +# SYSTEMC - To generate a systemc's model +# VHDL - To generate a vhdl's models +# VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model +# VHDL_TESTBENCH_ASSERT (need SYSTEMC) - In the simulation, generate in testbench's file an serie of assert +# STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file +# POSITION - To generate a position's files (it's input of viewer) +# CONFIGURATION - To generate a configuration's file (it's input of viewer and generator) Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf (revision 42) @@ -3,5 +3,5 @@ # -all: _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest Generic/Select/Priority_Fixed/SelfTest +all: _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest Generic/Select/Priority_Fixed/SelfTest _Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest: @@ -10,6 +10,10 @@ Generic/Select/Priority_Fixed/SelfTest: +_Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest: + gmake all -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest + clean: gmake clean -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest + gmake clean -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest re: clean all @@ -17,3 +21,4 @@ install: gmake install -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest + gmake install -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h (revision 42) @@ -22,9 +22,5 @@ #include "Behavioural/@DIRECTORY/include/Statistics.h" #endif -#ifdef POSITION -#include "Behavioural/include/Position.h" -#else -#include "Behavioural/include/Interfaces.h" -#endif +#include "Behavioural/include/Component.h" #ifdef VHDL #include "Behavioural/include/Vhdl.h" @@ -55,8 +51,5 @@ #endif -#ifdef POSITION - private : Position * _position; -#endif - + public : Component * _component; private : Interfaces * _interfaces; @@ -107,5 +100,4 @@ #if VHDL public : void vhdl (void); - private : void vhdl_port (Vhdl & vhdl); private : void vhdl_declaration (Vhdl & vhdl); private : void vhdl_body (Vhdl & vhdl); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp (revision 42) @@ -19,22 +19,27 @@ log_printf(FUNC,@COMPONENT,"allocation","Begin"); + _component = new Component (); + + Entity * entity = _component->set_entity (_name #ifdef POSITION - _position = new Position (); - - Entity * entity = _position->set_entity (_name , - "@COMPONENT", - COMBINATORY ); + ,"@COMPONENT" + ,COMBINATORY +#endif + ); _interfaces = entity->set_interfaces(); -#else - _interfaces = new Interfaces(); -#endif // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - Interface * interface_ = _interfaces->set_interface("", IN ,WEST, "Generalist interface"); + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + ,IN + ,SOUTH, + "Generalist interface" +#endif + ); - in_CLOCK = interface_->set_signal_clk ("clock" ,1, PORT_VHDL_YES_TESTBENCH_NO); - in_NRESET = interface_->set_signal_in ("nreset",1); + in_CLOCK = interface->set_signal_clk ("clock" ,1, PORT_VHDL_YES_TESTBENCH_NO); + in_NRESET = interface->set_signal_in ("nreset",1); @@ -42,8 +47,8 @@ #ifdef POSITION - _position->generate_file(); + _component->generate_file(); #endif - log_printf(FUNC,@COMPONENT,"allocation","End"); + Log_printf(FUNC,@COMPONENT,"allocation","End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_deallocation.cpp (revision 42) @@ -24,9 +24,5 @@ // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -#ifdef POSITION - delete _position; -#else - delete _interfaces; -#endif + delete _component; log_printf(FUNC,@COMPONENT,"deallocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl.cpp (revision 42) @@ -20,7 +20,7 @@ Vhdl vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); - vhdl_port (vhdl); vhdl_declaration (vhdl); vhdl_body (vhdl); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_port.cpp (revision 42) @@ -13,12 +13,12 @@ @NAMESPACE_BEGIN - void @COMPONENT::vhdl_port (Vhdl & vhdl) - { - log_printf(FUNC,@COMPONENT,"vhdl_port","Begin"); +// void @COMPONENT::vhdl_port (Vhdl & vhdl) +// { +// log_printf(FUNC,@COMPONENT,"vhdl_port","Begin"); - _interfaces->set_port(vhdl); +// _interfaces->set_port(vhdl); - log_printf(FUNC,@COMPONENT,"vhdl_port","End"); - }; +// Log_printf(FUNC,@COMPONENT,"vhdl_port","End"); +// }; @NAMESPACE_END Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp (revision 42) @@ -96,5 +96,4 @@ - _Branch_History_Table->vhdl_testbench_label("Initialisation"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Initialisation" << endl; @@ -129,10 +128,8 @@ sc_start(0); - _Branch_History_Table->vhdl_testbench_label("Loop of Test"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Loop of Test" << endl; for (uint32_t iteration=0; iterationvhdl_testbench_label("Iteration "+toString(iteration)); num_port_branch_complete = rand() % param._nb_branch_complete; num_port_predict = rand() % param._nb_prediction ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h (revision 42) @@ -27,7 +27,5 @@ #include "Behavioural/include/Vhdl.h" #endif -#ifdef VHDL_TESTBENCH -#include "Behavioural/include/Vhdl_Testbench.h" -#endif +#include "Behavioural/include/Component.h" using namespace std; @@ -59,7 +57,6 @@ #endif -#ifdef VHDL_TESTBENCH - private : Vhdl_Testbench * _vhdl_testbench; -#endif + public : Component * _component; + private : Interfaces * _interfaces; #ifdef SYSTEMC @@ -83,5 +80,4 @@ // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - public : SC_SIGNAL(Thistory_t) ** signal_BRANCH_COMPLETE_HISTORY; #endif @@ -118,20 +114,17 @@ #endif -#if VHDL - public : void vhdl (void); - private : void vhdl_port (Vhdl & vhdl); - private : void vhdl_type (Vhdl & vhdl); - private : void vhdl_signal (Vhdl & vhdl); - private : void vhdl_body (Vhdl & vhdl); -#endif #ifdef STATISTICS public : string statistics (uint32_t depth); #endif - +#if VHDL + public : void vhdl (void); + private : void vhdl_port (Vhdl * & vhdl); + private : void vhdl_type (Vhdl * & vhdl); + private : void vhdl_signal (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); +#endif #ifdef VHDL_TESTBENCH - private : void vhdl_testbench_port (void); private : void vhdl_testbench_transition (void); #endif - public : void vhdl_testbench_label (string label); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp (revision 42) @@ -32,4 +32,9 @@ #endif { + +#ifdef SYSTEMC + allocation (); +#endif + #ifdef STATISTICS // Allocation of statistics @@ -39,13 +44,4 @@ #endif -#ifdef VHDL_TESTBENCH - // Creation of a testbench - // -> port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (); - _vhdl_testbench->set_clock ("in_CLOCK",true); -#endif - #ifdef VHDL // generate the vhdl @@ -53,7 +49,6 @@ #endif + #ifdef SYSTEMC - allocation (); - // // Constant // for (uint32_t i=0; i<_param._nb_prediction ; i++) @@ -77,10 +72,4 @@ Branch_History_Table::~Branch_History_Table (void) { -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp (revision 42) @@ -20,9 +20,30 @@ void Branch_History_Table::allocation (void) { - string rename; - - in_CLOCK = new SC_CLOCK ("in_CLOCK"); - in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET"); - + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Branch_History_Table" +#ifdef POSITION + ,MIXTE +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1); + in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction]; out_PREDICT_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_prediction]; @@ -32,71 +53,65 @@ for (uint32_t i=0; i<_param._nb_prediction; i++) { - rename = "in_PREDICT_VAL[" +toString(i)+"]"; - in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_PREDICT_ACK[" +toString(i)+"]"; - out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_PREDICT_ADDRESS["+toString(i)+"]"; - in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - - rename = "out_PREDICT_HISTORY["+toString(i)+"]"; - out_PREDICT_HISTORY [i] = new SC_OUT(Thistory_t) (rename.c_str()); - } - - in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; - out_BRANCH_COMPLETE_ACK = new SC_OUT (Tcontrol_t) * [_param._nb_branch_complete]; - in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; - in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; - in_BRANCH_COMPLETE_DIRECTION= new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; - signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete]; + Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) +#ifdef POSITION + , IN + , WEST + , "Interface Predict" +#endif + ); + + in_PREDICT_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_PREDICT_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_PREDICT_ADDRESS [i] = interface->set_signal_in ("address", static_cast(ceil(log2(_param._nb_shifter)))); + out_PREDICT_HISTORY [i] = interface->set_signal_out ("history", _param._size_shifter); + } + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; + out_BRANCH_COMPLETE_ACK = new SC_OUT (Tcontrol_t) * [_param._nb_branch_complete]; + in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; + in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; + in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - rename = "in_BRANCH_COMPLETE_VAL[" +toString(i)+"]"; - in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_BRANCH_COMPLETE_ACK[" +toString(i)+"]"; - out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_ADDRESS["+toString(i)+"]"; - in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; - in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_DIRECTION[" +toString(i)+"]"; - in_BRANCH_COMPLETE_DIRECTION[i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; - signal_BRANCH_COMPLETE_HISTORY [i] = new SC_SIGNAL (Thistory_t) (rename.c_str()); - + Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i) +#ifdef POSITION + , IN + , EAST + , "Interface branch complete" +#endif + ); + + in_BRANCH_COMPLETE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_BRANCH_COMPLETE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_BRANCH_COMPLETE_ADDRESS [i] = interface->set_signal_in ("address" , static_cast(ceil(log2(_param._nb_shifter)))); + in_BRANCH_COMPLETE_HISTORY [i] = interface->set_signal_in ("history" , _param._size_shifter); + in_BRANCH_COMPLETE_DIRECTION [i] = interface->set_signal_in ("direction", 1); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ string name_component; + // =====[ component_Shifter ]========================================= name_component = _name+"_Shifter"; - component_Shifter = new morpheo::behavioural::generic::shifter::Shifter (name_component.c_str(), + component_Shifter = new morpheo::behavioural::generic::shifter::Shifter (name_component.c_str() #ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_shifter) ); - - - // Instantiation -#if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) - (*(component_Shifter->in_CLOCK)) (*(in_CLOCK)); -#endif - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - (*(component_Shifter-> in_SHIFTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i])); - (*(component_Shifter-> in_SHIFTER_CARRY_IN [i])) (*( in_BRANCH_COMPLETE_DIRECTION[i])); - (*(component_Shifter->out_SHIFTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); - } - + ,_param_statistics +#endif + ,*(_param._param_shifter)); + + _component->set_component (component_Shifter->_component +#ifdef POSITION + , 25 + , 25 + , 10 + , 10 +#endif + ); + // =====[ component_RegisterFile ]==================================== @@ -105,27 +120,85 @@ component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(), #ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_registerfile)); + _param_statistics , +#endif + *(_param._param_registerfile)); + + _component->set_component (component_RegisterFile->_component +#ifdef POSITION + , 75 + , 75 + , 10 + , 10 +#endif + ); - // Instantiation - (*(component_RegisterFile->in_CLOCK )) (*(in_CLOCK )); - (*(component_RegisterFile->in_NRESET)) (*(in_NRESET)); + // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // =====[ component_RegisterFile - Instanciation ]==================== + +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","", + _name ,""); +#endif + + _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET"); for (uint32_t i=0; i<_param._nb_prediction; i++) { - (*(component_RegisterFile-> in_READ_VAL [i])) (*( in_PREDICT_VAL [i])); - (*(component_RegisterFile->out_READ_ACK [i])) (*(out_PREDICT_ACK [i])); - (*(component_RegisterFile-> in_READ_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); - (*(component_RegisterFile->out_READ_DATA [i])) (*(out_PREDICT_HISTORY [i])); +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","read_" +toString(i), + _name ,"predict_"+toString(i)); +#endif + + _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL" , _name, "in_PREDICT_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK" , _name,"out_PREDICT_"+toString(i)+"_ACK" ); + _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS"); + _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA" , _name,"out_PREDICT_"+toString(i)+"_HISTORY"); } for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - (*(component_RegisterFile-> in_WRITE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); - (*(component_RegisterFile->out_WRITE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); - (*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); - (*(component_RegisterFile-> in_WRITE_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); - } +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","write_" +toString(i), + _name+"_Shifter" ,"shifter_"+toString(i)); +#endif + + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK" , _name ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK" ); + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA" , _name+"_Shifter","out_SHIFTER_" +toString(i)+"_DATA"); + } + + // =====[ component_Shifter - Instanciation ]========================= + +#if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) + +#ifdef POSITION + _component->interface_map (_name+"_Shifter","", + _name ,""); +#endif + + _component->port_map(_name+"_Shifter", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_Shifter", "in_NRESET", _name,"in_NRESET"); + +#endif + + for (uint32_t i=0; i<_param._nb_branch_complete; i++) + { +#ifdef POSITION + _component->interface_map (_name+"_Shifter","shifter_"+toString(i), + _name ,"branch_complete_"+toString(i)); + +#endif + + _component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_DATA" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"); + _component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_CARRY_IN", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION"); + _component->port_map(_name+"_Shifter", "out_SHIFTER_"+toString(i)+"_DATA" , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"); + } + +#ifdef POSITION + _component->generate_file(); +#endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp (revision 42) @@ -19,37 +19,23 @@ void Branch_History_Table::deallocation (void) { - delete in_CLOCK; - delete in_NRESET; + delete in_CLOCK; + delete in_NRESET; - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - delete in_PREDICT_VAL [i]; - delete out_PREDICT_ACK [i]; - delete in_PREDICT_ADDRESS [i]; - delete out_PREDICT_HISTORY [i]; - } + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS; + delete [] out_PREDICT_HISTORY; - delete in_PREDICT_VAL ; - delete out_PREDICT_ACK ; - delete in_PREDICT_ADDRESS; - delete out_PREDICT_HISTORY; - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - delete in_BRANCH_COMPLETE_VAL [i]; - delete out_BRANCH_COMPLETE_ACK [i]; - delete in_BRANCH_COMPLETE_ADDRESS [i]; - delete in_BRANCH_COMPLETE_HISTORY [i]; - delete in_BRANCH_COMPLETE_DIRECTION[i]; - } - delete in_BRANCH_COMPLETE_VAL ; - delete out_BRANCH_COMPLETE_ACK ; - delete in_BRANCH_COMPLETE_ADDRESS; - delete in_BRANCH_COMPLETE_HISTORY; - delete in_BRANCH_COMPLETE_DIRECTION; + delete [] in_BRANCH_COMPLETE_VAL ; + delete [] out_BRANCH_COMPLETE_ACK ; + delete [] in_BRANCH_COMPLETE_ADDRESS; + delete [] in_BRANCH_COMPLETE_HISTORY; + delete [] in_BRANCH_COMPLETE_DIRECTION; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ delete component_Shifter; delete component_RegisterFile; + + delete _component; }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp (revision 42) @@ -21,9 +21,9 @@ void Branch_History_Table::vhdl (void) { - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); - vhdl.set_library_work (_name + "_RegisterFile_Pack"); - vhdl.set_library_work (_name + "_Shifter_Pack"); + vhdl->set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_RegisterFile_Pack"); + vhdl->set_library_work (_name + "_Shifter_Pack"); vhdl_port (vhdl); @@ -32,5 +32,7 @@ vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp (revision 42) @@ -18,12 +18,12 @@ - void Branch_History_Table::vhdl_body (Vhdl & vhdl) + void Branch_History_Table::vhdl_body (Vhdl * & vhdl) { -// vhdl.set_body ("-- Output : always at '1'"); +// vhdl->set_body ("-- Output : always at '1'"); // for (uint32_t i=0; i<_param._nb_branch_complete; i++) -// vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';"); +// vhdl->set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';"); // for (uint32_t i=0; i<_param._nb_prediction ; i++) -// vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';"); -// vhdl.set_body (""); +// vhdl->set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';"); +// vhdl->set_body (""); list list_port_map; @@ -31,31 +31,31 @@ for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_DATA_"+toString(i)+" "," in_BRANCH_COMPLETE_HISTORY_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_CARRY_IN_"+toString(i)+" "," in_BRANCH_COMPLETE_DIRECTION_"+toString(i) ); - vhdl.set_body_component_port_map (list_port_map,"out_SHIFTER_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); + vhdl->set_body_component_port_map (list_port_map," in_SHIFTER_"+toString(i)+"_DATA "," in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY" ); + vhdl->set_body_component_port_map (list_port_map," in_SHIFTER_"+toString(i)+"_CARRY_IN "," in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION"); + vhdl->set_body_component_port_map (list_port_map,"out_SHIFTER_"+toString(i)+"_DATA ","signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY" ); } - vhdl.set_body_component ("component_Shifter",_name+"_Shifter",list_port_map); + vhdl->set_body_component ("component_Shifter",_name+"_Shifter",list_port_map); list_port_map.clear(); - vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); - vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); + vhdl->set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); + vhdl->set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); for (uint32_t i=0; i<_param._nb_prediction; i++) { - vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+" ","out_PREDICT_ACK_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+" ","out_PREDICT_HISTORY_"+toString(i)); + vhdl->set_body_component_port_map (list_port_map," in_READ_"+toString(i)+"_VAL "," In_PREDICT_"+toString(i)+"_VAL"); + vhdl->set_body_component_port_map (list_port_map,"out_READ_"+toString(i)+"_ACK ","out_PREDICT_"+toString(i)+"_ACK"); + vhdl->set_body_component_port_map (list_port_map," in_READ_"+toString(i)+"_ADDRESS "," in_PREDICT_"+toString(i)+"_ADDRESS"); + vhdl->set_body_component_port_map (list_port_map,"out_READ_"+toString(i)+"_DATA ","out_PREDICT_"+toString(i)+"_HISTORY"); } for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)+""); - vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)+""); - vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+""," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); + vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_VAL "," in_BRANCH_COMPLETE_"+toString(i)+"_VAL"); + vhdl->set_body_component_port_map (list_port_map,"out_WRITE_"+toString(i)+"_ACK "," out_BRANCH_COMPLETE_"+toString(i)+"_ACK"); + vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_ADDRESS"," in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); + vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_DATA ","signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"); } - vhdl.set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map); + vhdl->set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp (revision 42) @@ -18,24 +18,7 @@ - void Branch_History_Table::vhdl_port (Vhdl & vhdl) + void Branch_History_Table::vhdl_port (Vhdl * & vhdl) { - vhdl.set_port (" in_CLOCK" , IN, 1); - vhdl.set_port (" in_NRESET", IN, 1); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_shifter)))); - vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter); - } - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_shifter)))); - vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter); - vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); - } + _interfaces->set_port(vhdl); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp (revision 42) @@ -17,8 +17,8 @@ namespace branch_history_table { - void Branch_History_Table::vhdl_signal (Vhdl & vhdl) + void Branch_History_Table::vhdl_signal (Vhdl * & vhdl) { for (uint32_t i=0; i<_param._nb_branch_complete; i++) - vhdl.set_signal ("signal_BRANCH_COMPLETE_HISTORY_"+toString(i), _param._size_shifter); + vhdl->set_signal ("signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY", _param._size_shifter); }; Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_label.cpp (revision 41) +++ (revision ) @@ -1,31 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace branch_history_table { - - void Branch_History_Table::vhdl_testbench_label (string label) - { -#ifdef VHDL_TESTBENCH - _vhdl_testbench->add_label(label); -#endif - }; - -}; // end namespace branch_history_table -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch -}; // end namespace behavioural -}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,47 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace branch_history_table { - - void Branch_History_Table::vhdl_testbench_port (void) - { - _vhdl_testbench->set_port (" in_NRESET", IN, 1); - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); - _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); - _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_shifter)))); - _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_shifter)))); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); - } - }; - -}; // end namespace branch_history_table -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp (revision 42) @@ -20,35 +20,7 @@ void Branch_History_Table::vhdl_testbench_transition (void) { - // In order with file Branch_History_Table_vhdl_testbench_port.cpp -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif + sc_start(0); - _vhdl_testbench->add_input (PORT_READ( in_NRESET)); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i])); - //_vhdl_testbench->add_output (PORT_READ(out_PREDICT_HISTORY [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i])); - } - - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - _vhdl_testbench->add_test(true); - - _vhdl_testbench->new_cycle (); // always at the end + _interfaces->testbench(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp (revision 42) @@ -18,5 +18,5 @@ - void Branch_History_Table::vhdl_type (Vhdl & vhdl) + void Branch_History_Table::vhdl_type (Vhdl * & vhdl) { }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg (revision 42) @@ -1,5 +1,5 @@ Pattern_History_Table -2 8 *2 # size_counter -2 64 *4 # nb_counter -1 2 +1 # nb_prediction -1 2 +1 # nb_branch_complete +8 8 *2 # size_counter +64 64 *4 # nb_counter +2 2 +1 # nb_prediction +2 2 +1 # nb_branch_complete Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info (revision 42) @@ -0,0 +1,6 @@ + +# Pattern_History_Table_0 +target_dep all Pattern_History_Table_0.ngc +target_dep Pattern_History_Table_0.ngc Pattern_History_Table_0.prj +target_dep Pattern_History_Table_0.prj Pattern_History_Table_0_Counter_Pack.vhdl Pattern_History_Table_0_Counter.vhdl Pattern_History_Table_0_Pack.vhdl Pattern_History_Table_0_RegisterFile_Pack.vhdl Pattern_History_Table_0_RegisterFile.vhdl Pattern_History_Table_0.vhdl + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp (revision 42) @@ -7,5 +7,5 @@ */ -#define NB_ITERATION 1024 +#define NB_ITERATION 512 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/include/test.h" @@ -93,5 +93,4 @@ sc_start(0); - _Pattern_History_Table->vhdl_testbench_label("Initialisation"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Initialisation" << endl; @@ -127,10 +126,8 @@ sc_start(0); - _Pattern_History_Table->vhdl_testbench_label("Loop of Test"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Loop of Test" << endl; for (uint32_t iteration=0; iterationvhdl_testbench_label("Iteration "+toString(iteration)); num_port_branch_complete = rand() % param._nb_branch_complete; num_port_predict = rand() % param._nb_prediction ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h (revision 42) @@ -29,7 +29,5 @@ #include "Behavioural/include/Vhdl.h" #endif -#ifdef VHDL_TESTBENCH -#include "Behavioural/include/Vhdl_Testbench.h" -#endif +#include "Behavioural/include/Component.h" using namespace std; @@ -62,7 +60,6 @@ #endif -#ifdef VHDL_TESTBENCH - private : Vhdl_Testbench * _vhdl_testbench; -#endif + public : Component * _component; + private : Interfaces * _interfaces; #ifdef SYSTEMC @@ -125,17 +122,12 @@ public : string statistics (uint32_t depth); #endif - #if VHDL public : void vhdl (void); - private : void vhdl_port (Vhdl & vhdl); - private : void vhdl_declaration (Vhdl & vhdl); - private : void vhdl_body (Vhdl & vhdl); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); #endif - #ifdef VHDL_TESTBENCH - private : void vhdl_testbench_port (void); private : void vhdl_testbench_transition (void); #endif - public : void vhdl_testbench_label (string label); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp (revision 42) @@ -33,5 +33,9 @@ { log_printf(FUNC,Pattern_History_Table,"Pattern_History_Table","Begin"); - + +#ifdef SYSTEMC + allocation (); +#endif + #ifdef STATISTICS // Allocation of statistics @@ -39,13 +43,4 @@ param_statistics , param); -#endif - -#ifdef VHDL_TESTBENCH - // Creation of a testbench - // -> port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (); - _vhdl_testbench->set_clock ("in_CLOCK",true); #endif @@ -56,6 +51,4 @@ #ifdef SYSTEMC - allocation (); - // // Constant // for (uint32_t i=0; i<_param._nb_prediction ; i++) @@ -82,10 +75,4 @@ log_printf(FUNC,Pattern_History_Table,"~Pattern_History_Table","Begin"); -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp (revision 42) @@ -20,11 +20,32 @@ void Pattern_History_Table::allocation (void) { - string rename; - log_printf(FUNC,Pattern_History_Table,"allocation","Begin"); - in_CLOCK = new SC_CLOCK ("in_CLOCK"); - in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET"); - + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Pattern_History_Table" +#ifdef POSITION + ,MIXTE +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1); + in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction]; out_PREDICT_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_prediction]; @@ -34,16 +55,19 @@ for (uint32_t i=0; i<_param._nb_prediction; i++) { - rename = "in_PREDICT_VAL[" +toString(i)+"]"; - in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_PREDICT_ACK[" +toString(i)+"]"; - out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_PREDICT_ADDRESS["+toString(i)+"]"; - in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - - rename = "out_PREDICT_HISTORY["+toString(i)+"]"; - out_PREDICT_HISTORY [i] = new SC_OUT(Thistory_t) (rename.c_str()); - } + Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) +#ifdef POSITION + , IN + , WEST + , "Interface Predict" +#endif + ); + + in_PREDICT_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_PREDICT_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_PREDICT_ADDRESS [i] = interface->set_signal_in ("address", static_cast(ceil(log2(_param._nb_counter)))); + out_PREDICT_HISTORY [i] = interface->set_signal_out ("history", _param._size_counter); + } + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; @@ -52,82 +76,131 @@ in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; - signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete]; for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - rename = "in_BRANCH_COMPLETE_VAL[" +toString(i)+"]"; - in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_BRANCH_COMPLETE_ACK[" +toString(i)+"]"; - out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_ADDRESS["+toString(i)+"]"; - in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; - in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_DIRECTION[" +toString(i)+"]"; - in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; - signal_BRANCH_COMPLETE_HISTORY [i] = new SC_SIGNAL (Thistory_t) (rename.c_str()); - - } - + Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i) +#ifdef POSITION + , IN + , EAST + , "Interface branch complete" +#endif + ); + + in_BRANCH_COMPLETE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_BRANCH_COMPLETE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_BRANCH_COMPLETE_ADDRESS [i] = interface->set_signal_in ("address" , static_cast(ceil(log2(_param._nb_counter)))); + in_BRANCH_COMPLETE_HISTORY [i] = interface->set_signal_in ("history" , _param._size_counter); + in_BRANCH_COMPLETE_DIRECTION [i] = interface->set_signal_in ("direction", 1); + } + // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ string name_component; + // =====[ component_Counter ]========================================= name_component = _name+"_Counter"; - component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str(), + component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str() #ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_counter) ); - - - // Instantiation + ,_param_statistics +#endif + ,*(_param._param_counter)); + + _component->set_component (component_Counter->_component +#ifdef POSITION + , 25 + , 25 + , 10 + , 10 +#endif + ); + + // =====[ component_RegisterFile ]==================================== + + name_component = _name+"_RegisterFile"; + + component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(), +#ifdef STATISTICS + _param_statistics , +#endif + *(_param._param_registerfile)); + + _component->set_component (component_RegisterFile->_component +#ifdef POSITION + , 75 + , 75 + , 10 + , 10 +#endif + ); + + // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // =====[ component_RegisterFile - Instanciation ]==================== + +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","", + _name ,""); +#endif + + _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET"); + + for (uint32_t i=0; i<_param._nb_prediction; i++) + { +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","read_" +toString(i), + _name ,"predict_"+toString(i)); +#endif + + _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL" , _name, "in_PREDICT_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK" , _name,"out_PREDICT_"+toString(i)+"_ACK" ); + _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS"); + _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA" , _name,"out_PREDICT_"+toString(i)+"_HISTORY"); + } + + for (uint32_t i=0; i<_param._nb_branch_complete; i++) + { +#ifdef POSITION + _component->interface_map (_name+"_RegisterFile","write_" +toString(i), + _name+"_Counter" ,"counter_"+toString(i)); +#endif + + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK" , _name ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK" ); + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); + _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA" , _name+"_Counter","out_COUNTER_" +toString(i)+"_DATA"); + } + + // =====[ component_Counter - Instanciation ]========================= + #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) - (*(component_Counter->in_CLOCK)) (*(in_CLOCK)); + +#ifdef POSITION + _component->interface_map (_name+"_Counter","", + _name ,""); +#endif + + _component->port_map(_name+"_Counter", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_Counter", "in_NRESET", _name,"in_NRESET"); + #endif for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - (*(component_Counter-> in_COUNTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i])); - (*(component_Counter-> in_COUNTER_ADDSUB [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); - (*(component_Counter->out_COUNTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); - } - - // =====[ component_RegisterFile ]==================================== - - name_component = _name+"_RegisterFile"; - - component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic (name_component.c_str(), -#ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_registerfile)); - - // Instantiation - (*(component_RegisterFile->in_CLOCK)) (*(in_CLOCK)); - (*(component_RegisterFile->in_NRESET)) (*(in_NRESET)); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - (*(component_RegisterFile-> in_READ_VAL [i])) (*( in_PREDICT_VAL [i])); - (*(component_RegisterFile->out_READ_ACK [i])) (*(out_PREDICT_ACK [i])); - (*(component_RegisterFile-> in_READ_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); - (*(component_RegisterFile->out_READ_DATA [i])) (*(out_PREDICT_HISTORY [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - (*(component_RegisterFile-> in_WRITE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); - (*(component_RegisterFile->out_WRITE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); - (*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); - (*(component_RegisterFile-> in_WRITE_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); - } +#ifdef POSITION + _component->interface_map (_name+"_Counter","counter_"+toString(i), + _name ,"branch_complete_"+toString(i)); + +#endif + + _component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_DATA" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"); + _component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_ADDSUB" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION"); + _component->port_map(_name+"_Counter", "out_COUNTER_"+toString(i)+"_DATA" , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"); + } + +#ifdef POSITION + _component->generate_file(); +#endif log_printf(FUNC,Pattern_History_Table,"allocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp (revision 42) @@ -22,37 +22,23 @@ log_printf(FUNC,Pattern_History_Table,"deallocation","Begin"); - delete in_CLOCK; - delete in_NRESET; + delete in_CLOCK; + delete in_NRESET; - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - delete in_PREDICT_VAL [i]; - delete out_PREDICT_ACK [i]; - delete in_PREDICT_ADDRESS [i]; - delete out_PREDICT_HISTORY [i]; - } + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS; + delete [] out_PREDICT_HISTORY; - delete in_PREDICT_VAL ; - delete out_PREDICT_ACK ; - delete in_PREDICT_ADDRESS; - delete out_PREDICT_HISTORY; - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - delete in_BRANCH_COMPLETE_VAL [i]; - delete out_BRANCH_COMPLETE_ACK [i]; - delete in_BRANCH_COMPLETE_ADDRESS [i]; - delete in_BRANCH_COMPLETE_HISTORY [i]; - delete in_BRANCH_COMPLETE_DIRECTION [i]; - } - delete in_BRANCH_COMPLETE_VAL ; - delete out_BRANCH_COMPLETE_ACK ; - delete in_BRANCH_COMPLETE_ADDRESS; - delete in_BRANCH_COMPLETE_HISTORY; - delete in_BRANCH_COMPLETE_DIRECTION; + delete [] in_BRANCH_COMPLETE_VAL ; + delete [] out_BRANCH_COMPLETE_ACK ; + delete [] in_BRANCH_COMPLETE_ADDRESS; + delete [] in_BRANCH_COMPLETE_HISTORY; + delete [] in_BRANCH_COMPLETE_DIRECTION; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ delete component_Counter; delete component_RegisterFile; + + delete _component; log_printf(FUNC,Pattern_History_Table,"deallocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp (revision 42) @@ -22,15 +22,16 @@ { log_printf(FUNC,Pattern_History_Table,"vhdl","Begin"); - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); - vhdl.set_library_work (_name + "_RegisterFile_Pack"); - vhdl.set_library_work (_name + "_Counter_Pack"); + _interfaces->set_port(vhdl); + _component->vhdl_instance(vhdl); - vhdl_port (vhdl); vhdl_declaration (vhdl); vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; + log_printf(FUNC,Pattern_History_Table,"vhdl","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp (revision 42) @@ -18,46 +18,14 @@ - void Pattern_History_Table::vhdl_body (Vhdl & vhdl) + void Pattern_History_Table::vhdl_body (Vhdl * & vhdl) { log_printf(FUNC,Pattern_History_Table,"vhdl_body","Begin"); -// vhdl.set_body ("-- Output : always at '1'"); +// vhdl->set_body ("-- Output : always at '1'"); // for (uint32_t i=0; i<_param._nb_branch_complete; i++) -// vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';"); +// vhdl->set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';"); // for (uint32_t i=0; i<_param._nb_prediction ; i++) -// vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';"); -// vhdl.set_body (""); - - list list_port_map; - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - vhdl.set_body_component_port_map (list_port_map," in_COUNTER_DATA_"+toString(i)+" "," in_BRANCH_COMPLETE_HISTORY_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_COUNTER_ADDSUB_"+toString(i)+" "," in_BRANCH_COMPLETE_DIRECTION_"+toString(i) ); - vhdl.set_body_component_port_map (list_port_map,"out_COUNTER_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); - } - vhdl.set_body_component ("component_Counter",_name+"_Counter",list_port_map); - - - list_port_map.clear(); - vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK "); - vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+" ","out_PREDICT_ACK_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+" ","out_PREDICT_HISTORY_"+toString(i)); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)+""); - vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)+""); - vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+""," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); - vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); - } - vhdl.set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map); +// vhdl->set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';"); +// vhdl->set_body (""); log_printf(FUNC,Pattern_History_Table,"vhdl_body","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp (revision 42) @@ -18,29 +18,12 @@ - void Pattern_History_Table::vhdl_port (Vhdl & vhdl) - { - log_printf(FUNC,Pattern_History_Table,"vhdl_port","Begin"); +// void Pattern_History_Table::vhdl_port (Vhdl * & vhdl) +// { +// log_printf(FUNC,Pattern_History_Table,"vhdl_port","Begin"); - vhdl.set_port (" in_CLOCK" , IN, 1); - vhdl.set_port (" in_NRESET", IN, 1); +// _interfaces->set_port(vhdl); - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_counter)))); - vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter); - } - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_counter)))); - vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter); - vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); - } - - log_printf(FUNC,Pattern_History_Table,"vhdl_port","End"); - }; +// log_printf(FUNC,Pattern_History_Table,"vhdl_port","End"); +// }; }; // end namespace pattern_history_table Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp (revision 42) @@ -18,10 +18,7 @@ - void Pattern_History_Table::vhdl_declaration (Vhdl & vhdl) + void Pattern_History_Table::vhdl_declaration (Vhdl * & vhdl) { log_printf(FUNC,Pattern_History_Table,"vhdl_declaration","Begin"); - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - vhdl.set_signal ("signal_BRANCH_COMPLETE_HISTORY_"+toString(i), _param._size_counter); log_printf(FUNC,Pattern_History_Table,"vhdl_declaration","End"); Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_label.cpp (revision 41) +++ (revision ) @@ -1,33 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace pattern_history_table { - - - void Pattern_History_Table::vhdl_testbench_label (string label) - { -#ifdef VHDL_TESTBENCH - _vhdl_testbench->add_label(label); -#endif - }; - -}; // end namespace pattern_history_table -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,54 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace pattern_history_table { - - - void Pattern_History_Table::vhdl_testbench_port () - { - log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_port","Begin"); - - _vhdl_testbench->set_port (" in_NRESET", IN, 1); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); - _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); - _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_counter)))); - _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast(ceil(log2(_param._nb_counter)))); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); - } - - log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_port","End"); - }; - -}; // end namespace pattern_history_table -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp (revision 42) @@ -22,38 +22,7 @@ log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","Begin"); -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif + sc_start(0); - // In order with file Pattern_History_Table_vhdl_testbench_port.cpp - // Warning : if a output depend of a subcomponent, take directly the port of subcomponent - // (because we have no control on the ordonnancer's policy) - - _vhdl_testbench->add_input (PORT_READ( in_NRESET)); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i])); - //_vhdl_testbench->add_output (PORT_READ(out_PREDICT_HISTORY [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); - _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i])); - } - - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - _vhdl_testbench->add_test(true); - - _vhdl_testbench->new_cycle (); // always at the end + _interfaces->testbench(); log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/SelfTest/src/test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/SelfTest/src/test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/SelfTest/src/test.cpp (revision 42) @@ -44,4 +44,5 @@ *********************************************************************/ sc_clock CLOCK ("clock", 1.0, 0.5); + sc_signal NRESET; sc_signal PREDICT_BHT_ACK [param._nb_prediction]; @@ -68,7 +69,6 @@ cout << "<" << name << "> Instanciation of _Two_Level_Branch_Predictor_Glue" << endl; -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) (*(_Two_Level_Branch_Predictor_Glue->in_CLOCK)) (CLOCK); -#endif + (*(_Two_Level_Branch_Predictor_Glue->in_NRESET)) (NRESET); for (uint32_t i=0; ivhdl_testbench_label("Initialisation"); + cout << "{"+toString(static_cast(sc_simulation_time()))+"} Initialisation" << endl; - - _Two_Level_Branch_Predictor_Glue->vhdl_testbench_label("Test ack"); + NRESET.write(1); + cout << "{"+toString(static_cast(sc_simulation_time()))+"} Test ack" << endl; for (uint32_t iteration=0; iterationvhdl_testbench_label("Iteration "+toString(iteration)); - // Branch History Table if (param._have_bht) @@ -191,11 +189,8 @@ - _Two_Level_Branch_Predictor_Glue->vhdl_testbench_label("Test address"); cout << "{"+toString(static_cast(sc_simulation_time()))+"} Test address" << endl; for (uint32_t iteration=0; iterationvhdl_testbench_label("Iteration "+toString(iteration)); - predict_address = rand()%(1< port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (); - _vhdl_testbench->set_clock ("in_CLOCK",false); -#endif - #ifdef VHDL // generate the vhdl @@ -56,6 +51,4 @@ #ifdef SYSTEMC - allocation (); - #if defined(STATISTICS) or defined(VHDL_TESTBENCH) SC_METHOD (transition); @@ -192,10 +185,4 @@ log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"~Two_Level_Branch_Predictor_Glue","Begin"); -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_allocation.cpp (revision 42) @@ -24,8 +24,30 @@ log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"allocation","Begin"); -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - in_CLOCK = new SC_CLOCK ("in_CLOCK"); + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Two_Level_Branch_Predictor_Glue" +#ifdef POSITION + ,COMBINATORY #endif + ); + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1,CLOCK_VHDL_NO); + in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_NO); + } + + // ~~~~~[ Interface : "Predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ if (_param._have_bht) { @@ -45,31 +67,29 @@ for (uint32_t i=0; i<_param._nb_prediction; i++) { + Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) +#ifdef POSITION + , IN + , WEST + , "Interface Predict" +#endif + ); + if (_param._have_bht) { - rename = " in_PREDICT_BHT_ACK_" +toString(i); - in_PREDICT_BHT_ACK [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_PREDICT_BHT_ADDRESS_"+toString(i); - out_PREDICT_BHT_ADDRESS [i] = new SC_OUT(Taddress_t) (rename.c_str()); + in_PREDICT_BHT_ACK [i] = interface->set_signal_in ("bht_ack" ,1); + out_PREDICT_BHT_ADDRESS [i] = interface->set_signal_out ("bht_address",_param._bht_size_address); } if (_param._have_pht) { - rename = " in_PREDICT_PHT_ACK_" +toString(i); - in_PREDICT_PHT_ACK [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_PREDICT_PHT_ADDRESS_"+toString(i); - out_PREDICT_PHT_ADDRESS [i] = new SC_OUT(Taddress_t) (rename.c_str()); + in_PREDICT_PHT_ACK [i] = interface->set_signal_in ("pht_ack" ,1); + out_PREDICT_PHT_ADDRESS [i] = interface->set_signal_out ("pht_address",_param._pht_size_address); } if (_param._have_bht and _param._have_pht) - { - rename = " in_PREDICT_BHT_HISTORY_"+toString(i); - in_PREDICT_BHT_HISTORY [i] = new SC_IN (Tbht_history_t) (rename.c_str()); - } - rename = "out_PREDICT_ACK_" +toString(i); - out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = " in_PREDICT_ADDRESS_" +toString(i); - in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); + in_PREDICT_BHT_HISTORY [i] = interface->set_signal_in ("bht_history",_param._bht_size_history); + out_PREDICT_ACK [i] = interface->set_signal_out ("ack" ,1); + in_PREDICT_ADDRESS [i] = interface->set_signal_in ("address" ,_param._size_address); } + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ if (_param._have_bht) @@ -91,33 +111,33 @@ for (uint32_t i=0; i<_param._nb_branch_complete; i++) { + Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i) +#ifdef POSITION + , IN + , EAST + , "Interface branch complete" +#endif + ); if (_param._have_bht) { - rename = " in_BRANCH_COMPLETE_BHT_ACK_" +toString(i); - in_BRANCH_COMPLETE_BHT_ACK [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i); - out_BRANCH_COMPLETE_BHT_ADDRESS [i] = new SC_OUT(Taddress_t) (rename.c_str()); + in_BRANCH_COMPLETE_BHT_ACK [i] = interface->set_signal_in ("bht_ack" ,1); + out_BRANCH_COMPLETE_BHT_ADDRESS [i] = interface->set_signal_out ("bht_address",_param._bht_size_address); } if (_param._have_pht) { - rename = " in_BRANCH_COMPLETE_PHT_ACK_" +toString(i); - in_BRANCH_COMPLETE_PHT_ACK [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i); - out_BRANCH_COMPLETE_PHT_ADDRESS [i] = new SC_OUT(Taddress_t) (rename.c_str()); + in_BRANCH_COMPLETE_PHT_ACK [i] = interface->set_signal_in ("pht_ack" ,1); + out_BRANCH_COMPLETE_PHT_ADDRESS [i] = interface->set_signal_out ("pht_address",_param._pht_size_address); } if (_param._have_bht and _param._have_pht) - { - rename = " in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i); - in_BRANCH_COMPLETE_BHT_HISTORY [i] = new SC_IN (Tbht_history_t) (rename.c_str()); - } - rename = "out_BRANCH_COMPLETE_ACK_" +toString(i); - out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = " in_BRANCH_COMPLETE_ADDRESS_" +toString(i); - in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); + in_BRANCH_COMPLETE_BHT_HISTORY [i] = interface->set_signal_in ("bht_history",_param._bht_size_history); + + out_BRANCH_COMPLETE_ACK [i] = interface->set_signal_out ("ack" ,1); + in_BRANCH_COMPLETE_ADDRESS [i] = interface->set_signal_in ("address" ,_param._size_address); } // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#ifdef POSITION + _component->generate_file(); +#endif log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"allocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_deallocation.cpp (revision 42) @@ -22,72 +22,40 @@ log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"deallocation","Begin"); - delete in_CLOCK; + delete in_CLOCK; + delete in_NRESET; - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - if (_param._have_bht) - { - delete in_PREDICT_BHT_ACK [i]; - delete out_PREDICT_BHT_ADDRESS [i]; - } - if (_param._have_pht) - { - delete in_PREDICT_PHT_ACK [i]; - delete out_PREDICT_PHT_ADDRESS [i]; - } - if (_param._have_bht and _param._have_pht) - delete in_PREDICT_BHT_HISTORY [i]; - delete out_PREDICT_ACK [i]; - delete in_PREDICT_ADDRESS [i]; - } if (_param._have_bht) { - delete in_PREDICT_BHT_ACK ; - delete out_PREDICT_BHT_ADDRESS; + delete [] in_PREDICT_BHT_ACK ; + delete [] out_PREDICT_BHT_ADDRESS; } if (_param._have_pht) { - delete in_PREDICT_PHT_ACK ; - delete out_PREDICT_PHT_ADDRESS; + delete [] in_PREDICT_PHT_ACK ; + delete [] out_PREDICT_PHT_ADDRESS; } if (_param._have_bht and _param._have_pht) - delete in_PREDICT_BHT_HISTORY; + delete [] in_PREDICT_BHT_HISTORY; - delete out_PREDICT_ACK ; - delete in_PREDICT_ADDRESS ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS ; - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - if (_param._have_bht) - { - delete in_BRANCH_COMPLETE_BHT_ACK [i]; - delete out_BRANCH_COMPLETE_BHT_ADDRESS [i]; - } - if (_param._have_pht) - { - delete in_BRANCH_COMPLETE_PHT_ACK [i]; - delete out_BRANCH_COMPLETE_PHT_ADDRESS [i]; - } - if (_param._have_bht and _param._have_pht) - delete in_BRANCH_COMPLETE_BHT_HISTORY [i]; - delete out_BRANCH_COMPLETE_ACK [i]; - delete in_BRANCH_COMPLETE_ADDRESS [i]; - } if (_param._have_bht) { - delete in_BRANCH_COMPLETE_BHT_ACK ; - delete out_BRANCH_COMPLETE_BHT_ADDRESS; + delete [] in_BRANCH_COMPLETE_BHT_ACK ; + delete [] out_BRANCH_COMPLETE_BHT_ADDRESS; } if (_param._have_pht) { - delete in_BRANCH_COMPLETE_PHT_ACK ; - delete out_BRANCH_COMPLETE_PHT_ADDRESS; + delete [] in_BRANCH_COMPLETE_PHT_ACK ; + delete [] out_BRANCH_COMPLETE_PHT_ADDRESS; } if (_param._have_bht and _param._have_pht) - delete in_BRANCH_COMPLETE_BHT_HISTORY; - delete out_BRANCH_COMPLETE_ACK ; - delete in_BRANCH_COMPLETE_ADDRESS ; + delete [] in_BRANCH_COMPLETE_BHT_HISTORY; + delete [] out_BRANCH_COMPLETE_ACK ; + delete [] in_BRANCH_COMPLETE_ADDRESS ; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + delete _component; log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"deallocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl.cpp (revision 42) @@ -22,7 +22,8 @@ { log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl","Begin"); - Vhdl vhdl (_name); + + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_Pack"); vhdl_port (vhdl); @@ -30,5 +31,8 @@ vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; + log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_body.cpp (revision 42) @@ -18,9 +18,9 @@ - void Two_Level_Branch_Predictor_Glue::vhdl_body (Vhdl & vhdl) + void Two_Level_Branch_Predictor_Glue::vhdl_body (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_body","Begin"); - vhdl.set_body ("-- ack output"); + vhdl->set_body ("-- ack output"); for (uint32_t i=0; i<_param._nb_prediction; i++) { @@ -28,14 +28,14 @@ if (_param._have_bht) - bht_ack = "in_PREDICT_BHT_ACK_"+toString(i); + bht_ack = "in_PREDICT_"+toString(i)+"_BHT_ACK"; else bht_ack = "'1'"; if (_param._have_pht) - pht_ack = "in_PREDICT_PHT_ACK_"+toString(i); + pht_ack = "in_PREDICT_"+toString(i)+"_PHT_ACK"; else pht_ack = "'1'"; - vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+" <= "+bht_ack+" and "+pht_ack+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_ACK <= "+bht_ack+" and "+pht_ack+";"); } @@ -45,18 +45,18 @@ if (_param._have_bht) - bht_ack = "in_BRANCH_COMPLETE_BHT_ACK_"+toString(i); + bht_ack = "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_ACK"; else bht_ack = "'1'"; if (_param._have_pht) - pht_ack = "in_BRANCH_COMPLETE_PHT_ACK_"+toString(i); + pht_ack = "in_BRANCH_COMPLETE_"+toString(i)+"_PHT_ACK"; else pht_ack = "'1'"; - vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= "+bht_ack+" and "+pht_ack+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_ACK <= "+bht_ack+" and "+pht_ack+";"); } - vhdl.set_body (""); - vhdl.set_body ("-- address output"); + vhdl->set_body (""); + vhdl->set_body ("-- address output"); for (uint32_t i=0; i<_param._nb_prediction; i++) @@ -64,5 +64,5 @@ // The address is higher than the address size of bht if (_param._have_bht) - vhdl.set_body ("out_PREDICT_BHT_ADDRESS_"+toString(i)+" <= in_PREDICT_ADDRESS_"+toString(i)+std_logic_range(_param._bht_size_address)+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_BHT_ADDRESS <= in_PREDICT_"+toString(i)+"_ADDRESS"+std_logic_range(_param._bht_size_address)+";"); if (_param._have_pht) @@ -93,5 +93,5 @@ { min = _param._pht_size_address_shift; - vhdl.set_body ("out_PREDICT_PHT_ADDRESS_"+toString(i)+std_logic_range(min) + " <= in_PREDICT_BHT_HISTORY_"+toString(i)+std_logic_range(min)+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(min) + " <= in_PREDICT_"+toString(i)+"_BHT_HISTORY"+std_logic_range(min)+";"); } @@ -99,13 +99,13 @@ { max = _param._bht_size_history; - vhdl.set_body ("out_PREDICT_PHT_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address-1,max) + " <= in_PREDICT_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address-1-_param._pht_size_address_shift, _param._pht_size_address_share)+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(_param._pht_size_address-1,max) + " <= in_PREDICT_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address-1-_param._pht_size_address_shift, _param._pht_size_address_share)+";"); } // intersection if (_param._pht_size_address_share > 0) - vhdl.set_body ("out_PREDICT_PHT_ADDRESS_"+toString(i)+std_logic_range(max-1,min) + " <= in_PREDICT_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address_share-1,0)+" xor in_PREDICT_BHT_HISTORY_"+toString(i)+std_logic_range(max-1,min)+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(max-1,min) + " <= in_PREDICT_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address_share-1,0)+" xor in_PREDICT_"+toString(i)+"_BHT_HISTORY"+std_logic_range(max-1,min)+";"); } else - vhdl.set_body ("out_PREDICT_PHT_ADDRESS_"+toString(i)+" <= in_PREDICT_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address)+";"); + vhdl->set_body ("out_PREDICT_"+toString(i)+"_PHT_ADDRESS <= in_PREDICT_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address)+";"); } } @@ -115,5 +115,5 @@ // The address is higher than the address size of bht if (_param._have_bht) - vhdl.set_body ("out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)+" <= in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+std_logic_range(_param._bht_size_address)+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_BHT_ADDRESS <= in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"+std_logic_range(_param._bht_size_address)+";"); if (_param._have_pht) @@ -129,5 +129,5 @@ { min = _param._pht_size_address_shift; - vhdl.set_body ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+std_logic_range(min) + " <= in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+std_logic_range(min)+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(min) + " <= in_BRANCH_COMPLETE_"+toString(i)+"_BHT_HISTORY"+std_logic_range(min)+";"); } @@ -135,13 +135,13 @@ { max = _param._bht_size_history; - vhdl.set_body ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address-1,max) + " <= in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address-1-_param._pht_size_address_shift, _param._pht_size_address_share)+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(_param._pht_size_address-1,max) + " <= in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address-1-_param._pht_size_address_shift, _param._pht_size_address_share)+";"); } // intersection if (_param._pht_size_address_share > 0) - vhdl.set_body ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+std_logic_range(max-1,min) + " <= in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address_share-1,0)+" xor in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+std_logic_range(max-1,min)+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS"+std_logic_range(max-1,min) + " <= in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address_share-1,0)+" xor in_BRANCH_COMPLETE_"+toString(i)+"_BHT_HISTORY"+std_logic_range(max-1,min)+";"); } else - vhdl.set_body ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+" <= in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+std_logic_range(_param._pht_size_address)+";"); + vhdl->set_body ("out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS <= in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"+std_logic_range(_param._pht_size_address)+";"); } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_declaration.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_declaration.cpp (revision 42) @@ -18,5 +18,5 @@ - void Two_Level_Branch_Predictor_Glue::vhdl_declaration (Vhdl & vhdl) + void Two_Level_Branch_Predictor_Glue::vhdl_declaration (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_declaration","Begin"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_port.cpp (revision 42) @@ -18,44 +18,9 @@ - void Two_Level_Branch_Predictor_Glue::vhdl_port (Vhdl & vhdl) + void Two_Level_Branch_Predictor_Glue::vhdl_port (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_port","Begin"); - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - if (_param._have_bht) - { - vhdl.set_port (" in_PREDICT_BHT_ACK_" +toString(i), IN, 1); - vhdl.set_port ("out_PREDICT_BHT_ADDRESS_"+toString(i),OUT,_param._bht_size_address); - } - if (_param._have_bht and _param._have_pht) - vhdl.set_port (" in_PREDICT_BHT_HISTORY_"+toString(i), IN,_param._bht_size_history); - if (_param._have_pht) - { - vhdl.set_port (" in_PREDICT_PHT_ACK_" +toString(i), IN, 1); - vhdl.set_port ("out_PREDICT_PHT_ADDRESS_"+toString(i),OUT,_param._pht_size_address); - } - - vhdl.set_port ("out_PREDICT_ACK_" +toString(i),OUT, 1); - vhdl.set_port (" in_PREDICT_ADDRESS_" +toString(i), IN,_param._size_address); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - if (_param._have_bht) - { - vhdl.set_port (" in_BRANCH_COMPLETE_BHT_ACK_" +toString(i), IN, 1); - vhdl.set_port ("out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i),OUT,_param._bht_size_address); - } - if (_param._have_bht and _param._have_pht) - vhdl.set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i), IN,_param._bht_size_history); - if (_param._have_pht) - { - vhdl.set_port (" in_BRANCH_COMPLETE_PHT_ACK_" +toString(i), IN, 1); - vhdl.set_port ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i),OUT,_param._pht_size_address); - } - vhdl.set_port ("out_BRANCH_COMPLETE_ACK_" +toString(i),OUT, 1); - vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_" +toString(i), IN,_param._size_address); - } + _interfaces->set_port(vhdl); log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_port","End"); Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_label.cpp (revision 41) +++ (revision ) @@ -1,33 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/include/Two_Level_Branch_Predictor_Glue.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace two_level_branch_predictor_glue { - - - void Two_Level_Branch_Predictor_Glue::vhdl_testbench_label (string label) - { -#ifdef VHDL_TESTBENCH - _vhdl_testbench->add_label(label); -#endif - }; - -}; // end namespace two_level_branch_predictor_glue -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,71 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/include/Two_Level_Branch_Predictor_Glue.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { -namespace two_level_branch_predictor_glue { - - - void Two_Level_Branch_Predictor_Glue::vhdl_testbench_port () - { - log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_testbench_port","Begin"); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - if (_param._have_bht) - { - _vhdl_testbench->set_port (" in_PREDICT_BHT_ACK_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_PREDICT_BHT_ADDRESS_"+toString(i),OUT,_param._bht_size_address); - } - if (_param._have_bht and _param._have_pht) - _vhdl_testbench->set_port (" in_PREDICT_BHT_HISTORY_"+toString(i), IN,_param._bht_size_history); - if (_param._have_pht) - { - _vhdl_testbench->set_port (" in_PREDICT_PHT_ACK_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_PREDICT_PHT_ADDRESS_"+toString(i),OUT,_param._pht_size_address); - } - _vhdl_testbench->set_port ("out_PREDICT_ACK_" +toString(i),OUT, 1); - _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_" +toString(i), IN,_param._size_address); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - if (_param._have_bht) - { - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_BHT_ACK_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i),OUT,_param._bht_size_address); - } - if (_param._have_bht and _param._have_pht) - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i), IN,_param._bht_size_history); - if (_param._have_pht) - { - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_PHT_ACK_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i),OUT,_param._pht_size_address); - } - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_" +toString(i),OUT, 1); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_" +toString(i), IN,_param._size_address); - } - - log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_testbench_port","End"); - }; - -}; // end namespace two_level_branch_predictor_glue -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_testbench_transition.cpp (revision 42) @@ -22,54 +22,7 @@ log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_testbench_transition","Begin"); -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif + sc_start(0); - // In order with file Two_Level_Branch_Predictor_Glue_vhdl_testbench_port.cpp - // Warning : if a output depend of a subcomponent, take directly the port of subcomponent - // (because we have no control on the ordonnancer's policy) - -// _vhdl_testbench->add_input (PORT_READ( in_NRESET)); - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - if (_param._have_bht) - { - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_BHT_ACK [i])); - _vhdl_testbench->add_output (PORT_READ(out_PREDICT_BHT_ADDRESS [i])); - } - if (_param._have_bht and _param._have_pht) - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_BHT_HISTORY [i])); - if (_param._have_pht) - { - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_PHT_ACK [i])); - _vhdl_testbench->add_output (PORT_READ(out_PREDICT_PHT_ADDRESS [i])); - } - _vhdl_testbench->add_output (PORT_READ(out_PREDICT_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - if (_param._have_bht) - { - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_ACK [i])); - _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_BHT_ADDRESS [i])); - } - if (_param._have_bht and _param._have_pht) - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY [i])); - if (_param._have_pht) - { - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_ACK [i])); - _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_PHT_ADDRESS [i])); - } - _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); - } - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - _vhdl_testbench->add_test(true); - - _vhdl_testbench->new_cycle (); // always at the end + _interfaces->testbench(); log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_testbench_transition","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h (revision 42) @@ -30,7 +30,5 @@ #include "Behavioural/include/Vhdl.h" #endif -#ifdef VHDL_TESTBENCH -#include "Behavioural/include/Vhdl_Testbench.h" -#endif +#include "Behavioural/include/Component.h" using namespace std; @@ -62,7 +60,6 @@ #endif -#ifdef VHDL_TESTBENCH - private : Vhdl_Testbench * _vhdl_testbench; -#endif + public : Component * _component; + private : Interfaces * _interfaces; #ifdef SYSTEMC @@ -138,14 +135,11 @@ #if VHDL public : void vhdl (void); - private : void vhdl_port (Vhdl & vhdl); - private : void vhdl_declaration (Vhdl & vhdl); - private : void vhdl_body (Vhdl & vhdl); + private : void vhdl_port (Vhdl * & vhdl); + private : void vhdl_declaration (Vhdl * & vhdl); + private : void vhdl_body (Vhdl * & vhdl); #endif - #ifdef VHDL_TESTBENCH - private : void vhdl_testbench_port (void); private : void vhdl_testbench_transition (void); #endif - public : void vhdl_testbench_label (string label); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor.cpp (revision 42) @@ -33,4 +33,8 @@ log_printf(FUNC,Two_Level_Branch_Predictor,"Two_Level_Branch_Predictor","Begin"); +#ifdef SYSTEMC + allocation (); +#endif + #ifdef STATISTICS // Allocation of statistics @@ -38,13 +42,4 @@ param_statistics , param); -#endif - -#ifdef VHDL_TESTBENCH - // Creation of a testbench - // -> port - // -> clock's signals - _vhdl_testbench = new Vhdl_Testbench (_name); - vhdl_testbench_port (); - _vhdl_testbench->set_clock ("in_CLOCK",true); #endif @@ -55,6 +50,4 @@ #ifdef SYSTEMC - allocation (); - #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) SC_METHOD (transition); @@ -79,10 +72,4 @@ log_printf(FUNC,Two_Level_Branch_Predictor,"~Two_Level_Branch_Predictor","Begin"); -#ifdef VHDL_TESTBENCH - // generate the test bench - _vhdl_testbench->generate_file(); - delete _vhdl_testbench; -#endif - #ifdef STATISTICS _stat->generate_file(statistics(0)); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp (revision 42) @@ -22,6 +22,30 @@ log_printf(FUNC,Two_Level_Branch_Predictor,"allocation","Begin"); - in_CLOCK = new SC_CLOCK ("in_CLOCK"); - in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET"); + _component = new Component (); + + Entity * entity = _component->set_entity (_name + ,"Two_Level_Branch_Predictor" +#ifdef POSITION + ,MIXTE +#endif + ); + + _interfaces = entity->set_interfaces(); + + // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + { + Interface * interface = _interfaces->set_interface("" +#ifdef POSITION + , IN + , SOUTH + , "Generalist interface" +#endif + ); + + in_CLOCK = interface->set_signal_clk ("clock" ,1); + in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_YES); + } + + // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction ]; @@ -32,56 +56,25 @@ if (_param._have_pht) out_PREDICT_PHT_HISTORY = new SC_OUT(Tpht_history_t) * [_param._nb_prediction ]; - if (_param._have_bht) - { - signal_PREDICT_BHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_prediction]; - signal_PREDICT_BHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_prediction]; - } - if (_param._have_pht) - { - signal_PREDICT_PHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_prediction]; - signal_PREDICT_PHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_prediction]; - } for (uint32_t i=0; i<_param._nb_prediction; i++) { - rename = "in_PREDICT_VAL_" +toString(i); - in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_PREDICT_ACK_" +toString(i); - out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_PREDICT_ADDRESS_" +toString(i); - in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - + Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) +#ifdef POSITION + , IN + , WEST + , "Interface Predict" +#endif + ); + + in_PREDICT_VAL [i] = interface->set_signal_valack_in ("val" , VAL); + out_PREDICT_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); + in_PREDICT_ADDRESS [i] = interface->set_signal_in ("address", _param._size_address); if (_param._have_bht) - { - rename = "out_PREDICT_BHT_HISTORY_"+toString(i); - out_PREDICT_BHT_HISTORY [i] = new SC_OUT(Tbht_history_t) (rename.c_str()); - } - + out_PREDICT_BHT_HISTORY [i] = interface->set_signal_out ("bht_history", _param._bht_size_shifter); if (_param._have_pht) - { - rename = "out_PREDICT_PHT_HISTORY_"+toString(i); - out_PREDICT_PHT_HISTORY [i] = new SC_OUT(Tpht_history_t) (rename.c_str()); - } - - if (_param._have_bht) - { - rename = "signal_PREDICT_BHT_ACK_" +toString(i); - signal_PREDICT_BHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); - - rename = "signal_PREDICT_BHT_ADDRESS_"+toString(i); - signal_PREDICT_BHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); - } - - if (_param._have_pht) - { - rename = "signal_PREDICT_PHT_ACK_" +toString(i); - signal_PREDICT_PHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); - - rename = "signal_PREDICT_PHT_ADDRESS_"+toString(i); - signal_PREDICT_PHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); - } - } + out_PREDICT_PHT_HISTORY [i] = interface->set_signal_out ("pht_history", _param._pht_size_counter); + } + + // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; @@ -93,54 +86,15 @@ in_BRANCH_COMPLETE_PHT_HISTORY = new SC_IN (Tpht_history_t) * [_param._nb_branch_complete]; in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; - if (_param._have_bht) - { - signal_BRANCH_COMPLETE_BHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_branch_complete]; - signal_BRANCH_COMPLETE_BHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_branch_complete]; - } - if (_param._have_pht) - { - signal_BRANCH_COMPLETE_PHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_branch_complete]; - signal_BRANCH_COMPLETE_PHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_branch_complete]; - } for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - rename = "in_BRANCH_COMPLETE_VAL_" +toString(i); - in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - - rename = "out_BRANCH_COMPLETE_ACK_" +toString(i); - out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); - - rename = "in_BRANCH_COMPLETE_ADDRESS_" +toString(i); - in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); - + in_BRANCH_COMPLETE_VAL [i] = new interface->set_signal_valack_in ("val" , VAL); + out_BRANCH_COMPLETE_ACK [i] = new interface->set_signal_valack_out ("ack" , ACK); + in_BRANCH_COMPLETE_ADDRESS [i] = new interface->set_signal_in ("address" , _param._size_address); if (_param._have_bht) - { - rename = "in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i); - in_BRANCH_COMPLETE_BHT_HISTORY [i] = new SC_IN (Tbht_history_t) (rename.c_str()); - } + in_BRANCH_COMPLETE_BHT_HISTORY [i] = new interface->set_signal_in ("bht_history", _param._bht_size_shifter); if (_param._have_pht) - { - rename = "in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i); - in_BRANCH_COMPLETE_PHT_HISTORY [i] = new SC_IN (Tpht_history_t) (rename.c_str()); - } - rename = "in_BRANCH_COMPLETE_DIRECTION_" +toString(i); - in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); - if (_param._have_bht) - { - rename = "signal_BRANCH_COMPLETE_BHT_ACK_" +toString(i); - signal_BRANCH_COMPLETE_BHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); - - rename = "signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i); - signal_BRANCH_COMPLETE_BHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); - } - if (_param._have_pht) - { - rename = "signal_BRANCH_COMPLETE_PHT_ACK_" +toString(i); - signal_BRANCH_COMPLETE_PHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); - - rename = "signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i); - signal_BRANCH_COMPLETE_PHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); - } + in_BRANCH_COMPLETE_PHT_HISTORY [i] = new interface->set_signal_in ("pht_history", _param._pht_size_counter); + in_BRANCH_COMPLETE_DIRECTION [i] = new interface->set_signal_in ("direction" , 1); } @@ -152,35 +106,21 @@ { name_component = _name+"_Branch_History_Table"; - - log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); - - component_Branch_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Branch_History_Table (name_component.c_str() , + + component_Branch_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Branch_History_Table (name_component.c_str() #ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_branch_history_table)); - - // Instantiation - (*(component_Branch_History_Table->in_CLOCK )) (*(in_CLOCK )); - (*(component_Branch_History_Table->in_NRESET)) (*(in_NRESET)); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - (*(component_Branch_History_Table-> in_PREDICT_VAL [i])) (*( in_PREDICT_VAL [i])); - (*(component_Branch_History_Table->out_PREDICT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); - (*(component_Branch_History_Table-> in_PREDICT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); - (*(component_Branch_History_Table->out_PREDICT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); - (*(component_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); - (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); - (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); - (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); - } - } - + ,_param_statistics +#endif + ,*(_param._param_counter)); + + _component->set_component (component_Branch_History_Table->_component +#ifdef POSITION + , 75 + , 25 + , 10 + , 10 +#endif + ); + } + // =====[ component_Pattern_History_Table ]=========================== if (_param._have_pht) @@ -188,68 +128,140 @@ name_component = _name+"_Pattern_History_Table"; - log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); - - component_Pattern_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table::Pattern_History_Table (name_component.c_str() , + component_Pattern_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table ::Pattern_History_Table (name_component.c_str() #ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_pattern_history_table)); - - // Instantiation - (*(component_Pattern_History_Table->in_CLOCK)) (*(in_CLOCK)); - (*(component_Pattern_History_Table->in_NRESET)) (*(in_NRESET)); - + ,_param_statistics +#endif + ,*(_param._param_counter)); + + _component->set_component (component_Pattern_History_Table->_component +#ifdef POSITION + , 75 + , 75 + , 10 + , 10 +#endif + ); + } + + // =====[ component_Two_Level_Branch_Predictor_Glue ]================= + + name_component = _name+"_Two_Level_Branch_Predictor_Glue"; + + component_Two_Level_Branch_Predictor_Glue = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::two_level_branch_predictor_glue::Two_Level_Branch_Predictor_Glue (name_component.c_str() +#ifdef STATISTICS + ,_param_statistics +#endif + ,*(_param._param_counter)); + + _component->set_component (component_Pattern_History_Table->_component +#ifdef POSITION + , 50 + , 75 + , 10 + , 10 +#endif + ); + + // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + // =====[ component_Branch_History_Table - Instanciation ]============ + if (_param._have_bht) + { +#ifdef POSITION + _component->interface_map (_name+"_Branch_History_Table","", + _name ,""); +#endif + + _component->port_map(_name+"_Branch_History_Table", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_Branch_History_Table", "in_NRESET", _name,"in_NRESET"); + for (uint32_t i=0; i<_param._nb_prediction; i++) { - (*(component_Pattern_History_Table-> in_PREDICT_VAL [i])) (*( in_PREDICT_VAL [i])); - (*(component_Pattern_History_Table->out_PREDICT_ACK [i])) (*(signal_PREDICT_PHT_ACK [i])); - (*(component_Pattern_History_Table-> in_PREDICT_ADDRESS [i])) (*(signal_PREDICT_PHT_ADDRESS [i])); - (*(component_Pattern_History_Table->out_PREDICT_HISTORY [i])) (*( out_PREDICT_PHT_HISTORY [i])); +#ifdef POSITION + _component->interface_map (_name+"_Branch_History_Table","predict_"+toString(i), + _name ,"predict_"+toString(i)); +#endif + _component->port_map(_name+"_Branch_History_Table", "in_PREDICT_"+toString(i)+"_VAL" , _name , "in_PREDICT_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_Branch_History_Table","out_PREDICT_"+toString(i)+"_ACK" , _name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_BHT_ACK" ); + _component->port_map(_name+"_Branch_History_Table", "in_PREDICT_"+toString(i)+"_ADDRESS", _name+"_Two_Level_Branch_Predictor_Glue","out_PREDICT_"+toString(i)+"_BHT_ADDRESS"); + _component->port_map(_name+"_Branch_History_Table","out_PREDICT_"+toString(i)+"_HISTORY", _name ,"out_PREDICT_"+toString(i)+"_BHT_HISTORY"); } for (uint32_t i=0; i<_param._nb_branch_complete; i++) { - (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); - (*(component_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); - (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); - (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_PHT_HISTORY [i])); - (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); - } - } - - // =====[ component_Two_Level_Branch_Predictor_Glue ]=========================== - name_component = _name+"_Two_Level_Branch_Predictor_Glue"; - - log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); - - component_Two_Level_Branch_Predictor_Glue = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::two_level_branch_predictor_glue::Two_Level_Branch_Predictor_Glue (name_component.c_str() , -#ifdef STATISTICS - _param_statistics , -#endif - *(_param._param_two_level_branch_predictor_glue)); - - // Instantiation -#if defined(STATISTICS) or defined(VHDL_TESTBENCH) - (*(component_Two_Level_Branch_Predictor_Glue->in_CLOCK)) (*(in_CLOCK)); -#endif - for (uint32_t i=0; i<_param._nb_prediction; i++) - { +#ifdef POSITION + _component->interface_map (_name+"_Branch_History_Table","branch_complete_"+toString(i), + _name ,"branch_complete_"+toString(i)); +#endif + _component->port_map(_name+"_Branch_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_Branch_History_Table","out_BRANCH_COMPLETE_"+toString(i)+"_ACK" , _name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_ACK" ); + _component->port_map(_name+"_Branch_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" , _name+"_Two_Level_Branch_Predictor_Glue","out_BRANCH_COMPLETE_"+toString(i)+"_BHT_ADDRESS" ); + _component->port_map(_name+"_Branch_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_HISTORY" ); + _component->port_map(_name+"_Branch_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION" ); + } + } + + // =====[ component_Pattern_History_Table - Instanciation ]=========== + if (_param._have_pht) + { +#ifdef POSITION + _component->interface_map (_name+"_Pattern_History_Table","", + _name ,""); +#endif + + _component->port_map(_name+"_Pattern_History_Table", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_Pattern_History_Table", "in_NRESET", _name,"in_NRESET"); + + for (uint32_t i=0; i<_param._nb_prediction; i++) + { +#ifdef POSITION + _component->interface_map (_name+"_Pattern_History_Table","predict_"+toString(i), + _name ,"predict_"+toString(i)); +#endif + _component->port_map(_name+"_Pattern_History_Table", "in_PREDICT_"+toString(i)+"_VAL" , _name , "in_PREDICT_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_Pattern_History_Table","out_PREDICT_"+toString(i)+"_ACK" , _name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_PHT_ACK" ); + _component->port_map(_name+"_Pattern_History_Table", "in_PREDICT_"+toString(i)+"_ADDRESS", _name+"_Two_Level_Branch_Predictor_Glue","out_PREDICT_"+toString(i)+"_PHT_ADDRESS"); + _component->port_map(_name+"_Pattern_History_Table","out_PREDICT_"+toString(i)+"_HISTORY", _name ,"out_PREDICT_"+toString(i)+"_PHT_HISTORY"); + } + + for (uint32_t i=0; i<_param._nb_branch_complete; i++) + { +#ifdef POSITION + _component->interface_map (_name+"_Pattern_History_Table","branch_complete_"+toString(i), + _name ,"branch_complete_"+toString(i)); +#endif + _component->port_map(_name+"_Pattern_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); + _component->port_map(_name+"_Pattern_History_Table","out_BRANCH_COMPLETE_"+toString(i)+"_ACK" , _name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_PHT_ACK" ); + _component->port_map(_name+"_Pattern_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" , _name+"_Two_Level_Branch_Predictor_Glue","out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS" ); + _component->port_map(_name+"_Pattern_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_PHT_HISTORY" ); + _component->port_map(_name+"_Pattern_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION" ); + } + } + + // =====[ component_Two_Level_Branch_Predictor_Glue - Instanciation ]= +#ifdef POSITION + _component->interface_map (_name+"_Two_Level_Branch_Predictor_Glue","", + _name ,""); +#endif + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_CLOCK" , _name,"in_CLOCK" ); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_NRESET", _name,"in_NRESET"); + + for (uint32_t i=0; i<_param._nb_prediction; i++) + { if (_param._have_bht) { - (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_BHT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); - } - if (_param._have_pht) - { - (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_PHT_ACK [i])) (*(signal_PREDICT_PHT_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_PHT_ADDRESS [i])) (*(signal_PREDICT_PHT_ADDRESS [i])); - } - if (_param._have_bht and _param._have_pht) - { - (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); - } - (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_ACK [i])) (*( out_PREDICT_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); - } + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_BHT_ACK" , _name+"_Branch_History_Table" , "out_PREDICT_"+toString(i)+"_BHT_ACK" ); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "out_PREDICT_"+toString(i)+"_BHT_ADDRESS", _name+"_Branch_History_Table" , "in_PREDICT_"+toString(i)+"_BHT_ADDRESS"); + } + if (_param._have_pht) + { + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_PHT_ACK" , _name+"_Pattern_History_Table", "out_PREDICT_"+toString(i)+"_PHT_ACK" ); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "out_PREDICT_"+toString(i)+"_PHT_ADDRESS", _name+"_Pattern_History_Table", "in_PREDICT_"+toString(i)+"_PHT_ADDRESS"); + } + if (_param._have_bht and _param._have_pht) + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_BHT_HISTORY" , _name , "in_PREDICT_"+toString(i)+"_BHT_HISTORY"); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue","out_PREDICT_"+toString(i)+"_ACK" , _name ,"out_PREDICT_"+toString(i)+"_ACK"); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_PREDICT_"+toString(i)+"_ADDRESS" , _name , "in_PREDICT_"+toString(i)+"_ADDRESS"); + } for (uint32_t i=0; i<_param._nb_branch_complete; i++) @@ -257,22 +269,314 @@ if (_param._have_bht) { - (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_BHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); - } - if (_param._have_pht) - { - (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_PHT_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_PHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); - } - if (_param._have_bht and _param._have_pht) - { - (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); - } - (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); - (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_ACK" , _name+"_Branch_History_Table" , "out_BRANCH_COMPLETE_"+toString(i)+"_BHT_ACK" ); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "out_BRANCH_COMPLETE_"+toString(i)+"_BHT_ADDRESS", _name+"_Branch_History_Table" , "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_ADDRESS"); + } + if (_param._have_pht) + { + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_PHT_ACK" , _name+"_Pattern_History_Table", "out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ACK" ); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "out_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS", _name+"_Pattern_History_Table", "in_BRANCH_COMPLETE_"+toString(i)+"_PHT_ADDRESS"); + } + if (_param._have_bht and _param._have_pht) + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_HISTORY" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_BHT_HISTORY"); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue","out_BRANCH_COMPLETE_"+toString(i)+"_ACK" , _name ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK"); + _component->port_map(_name+"_Two_Level_Branch_Predictor_Glue", "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); } +#ifdef POSITION + _component->generate_file(); +#endif + log_printf(FUNC,Two_Level_Branch_Predictor,"allocation","End"); }; + + + + + + + +// void Two_Level_Branch_Predictor::allocation (void) +// { +// string rename; + +// log_printf(FUNC,Two_Level_Branch_Predictor,"allocation","Begin"); + +// _component = new Component (); + +// Entity * entity = _component->set_entity (_name +// #ifdef POSITION +// ,"Two_Level_Branch_Predictor" +// ,MIXTE +// #endif +// ); + +// _interfaces = entity->set_interfaces(); + +// // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// { +// Interface * interface = _interfaces->set_interface("" +// #ifdef POSITION +// , IN +// , SOUTH +// , "Generalist interface" +// #endif +// ); + +// in_CLOCK = interface->set_signal_clk ("clock" ,1); +// in_NRESET = interface->set_signal_in ("nreset",1,RESET_VHDL_YES); +// } + +// // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +// in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction ]; +// out_PREDICT_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_prediction ]; +// in_PREDICT_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_prediction ]; +// if (_param._have_bht) +// out_PREDICT_BHT_HISTORY = new SC_OUT(Tbht_history_t) * [_param._nb_prediction ]; +// if (_param._have_pht) +// out_PREDICT_PHT_HISTORY = new SC_OUT(Tpht_history_t) * [_param._nb_prediction ]; +// // if (_param._have_bht) +// // { +// // signal_PREDICT_BHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_prediction]; +// // signal_PREDICT_BHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_prediction]; +// // } +// // if (_param._have_pht) +// // { +// // signal_PREDICT_PHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_prediction]; +// // signal_PREDICT_PHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_prediction]; +// // } + +// for (uint32_t i=0; i<_param._nb_prediction; i++) +// { +// rename = "in_PREDICT_VAL_" +toString(i); +// in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); + +// rename = "out_PREDICT_ACK_" +toString(i); +// out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); + +// rename = "in_PREDICT_ADDRESS_" +toString(i); +// in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); + +// if (_param._have_bht) +// { +// rename = "out_PREDICT_BHT_HISTORY_"+toString(i); +// out_PREDICT_BHT_HISTORY [i] = new SC_OUT(Tbht_history_t) (rename.c_str()); +// } + +// if (_param._have_pht) +// { +// rename = "out_PREDICT_PHT_HISTORY_"+toString(i); +// out_PREDICT_PHT_HISTORY [i] = new SC_OUT(Tpht_history_t) (rename.c_str()); +// } + +// // if (_param._have_bht) +// // { +// // rename = "signal_PREDICT_BHT_ACK_" +toString(i); +// // signal_PREDICT_BHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); + +// // rename = "signal_PREDICT_BHT_ADDRESS_"+toString(i); +// // signal_PREDICT_BHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); +// // } + +// // if (_param._have_pht) +// // { +// // rename = "signal_PREDICT_PHT_ACK_" +toString(i); +// // signal_PREDICT_PHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); + +// // rename = "signal_PREDICT_PHT_ADDRESS_"+toString(i); +// // signal_PREDICT_PHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); +// // } +// } + +// in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; +// out_BRANCH_COMPLETE_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_branch_complete]; +// in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; +// if (_param._have_bht) +// in_BRANCH_COMPLETE_BHT_HISTORY = new SC_IN (Tbht_history_t) * [_param._nb_branch_complete]; +// if (_param._have_pht) +// in_BRANCH_COMPLETE_PHT_HISTORY = new SC_IN (Tpht_history_t) * [_param._nb_branch_complete]; +// in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; +// // if (_param._have_bht) +// // { +// // signal_BRANCH_COMPLETE_BHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_branch_complete]; +// // signal_BRANCH_COMPLETE_BHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_branch_complete]; +// // } +// // if (_param._have_pht) +// // { +// // signal_BRANCH_COMPLETE_PHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_branch_complete]; +// // signal_BRANCH_COMPLETE_PHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_branch_complete]; +// // } + +// for (uint32_t i=0; i<_param._nb_branch_complete; i++) +// { +// rename = "in_BRANCH_COMPLETE_VAL_" +toString(i); +// in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); + +// rename = "out_BRANCH_COMPLETE_ACK_" +toString(i); +// out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); + +// rename = "in_BRANCH_COMPLETE_ADDRESS_" +toString(i); +// in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); + +// if (_param._have_bht) +// { +// rename = "in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i); +// in_BRANCH_COMPLETE_BHT_HISTORY [i] = new SC_IN (Tbht_history_t) (rename.c_str()); +// } +// if (_param._have_pht) +// { +// rename = "in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i); +// in_BRANCH_COMPLETE_PHT_HISTORY [i] = new SC_IN (Tpht_history_t) (rename.c_str()); +// } +// rename = "in_BRANCH_COMPLETE_DIRECTION_" +toString(i); +// in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); +// // if (_param._have_bht) +// // { +// // rename = "signal_BRANCH_COMPLETE_BHT_ACK_" +toString(i); +// // signal_BRANCH_COMPLETE_BHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); + +// // rename = "signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i); +// // signal_BRANCH_COMPLETE_BHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); +// // } +// // if (_param._have_pht) +// // { +// // rename = "signal_BRANCH_COMPLETE_PHT_ACK_" +toString(i); +// // signal_BRANCH_COMPLETE_PHT_ACK [i] = new SC_SIGNAL(Tcontrol_t) (rename.c_str()); + +// // rename = "signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i); +// // signal_BRANCH_COMPLETE_PHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); +// // } +// } + +// // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// string name_component; + +// // =====[ component_Branch_History_Table ]============================ +// if (_param._have_bht) +// { +// name_component = _name+"_Branch_History_Table"; + +// log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); + +// component_Branch_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Branch_History_Table (name_component.c_str() , +// #ifdef STATISTICS +// _param_statistics , +// #endif +// *(_param._param_branch_history_table)); + +// // Instantiation +// (*(component_Branch_History_Table->in_CLOCK )) (*(in_CLOCK )); +// (*(component_Branch_History_Table->in_NRESET)) (*(in_NRESET)); + +// for (uint32_t i=0; i<_param._nb_prediction; i++) +// { +// (*(component_Branch_History_Table-> in_PREDICT_VAL [i])) (*( in_PREDICT_VAL [i])); +// (*(component_Branch_History_Table->out_PREDICT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); +// (*(component_Branch_History_Table-> in_PREDICT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); +// (*(component_Branch_History_Table->out_PREDICT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); +// } + +// for (uint32_t i=0; i<_param._nb_branch_complete; i++) +// { +// (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); +// (*(component_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); +// (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); +// (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); +// (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); +// } +// } + +// // =====[ component_Pattern_History_Table ]=========================== +// if (_param._have_pht) +// { +// name_component = _name+"_Pattern_History_Table"; + +// log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); + +// component_Pattern_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table::Pattern_History_Table (name_component.c_str() , +// #ifdef STATISTICS +// _param_statistics , +// #endif +// *(_param._param_pattern_history_table)); + +// // Instantiation +// (*(component_Pattern_History_Table->in_CLOCK)) (*(in_CLOCK)); +// (*(component_Pattern_History_Table->in_NRESET)) (*(in_NRESET)); + +// for (uint32_t i=0; i<_param._nb_prediction; i++) +// { +// (*(component_Pattern_History_Table-> in_PREDICT_VAL [i])) (*( in_PREDICT_VAL [i])); +// (*(component_Pattern_History_Table->out_PREDICT_ACK [i])) (*(signal_PREDICT_PHT_ACK [i])); +// (*(component_Pattern_History_Table-> in_PREDICT_ADDRESS [i])) (*(signal_PREDICT_PHT_ADDRESS [i])); +// (*(component_Pattern_History_Table->out_PREDICT_HISTORY [i])) (*( out_PREDICT_PHT_HISTORY [i])); +// } + +// for (uint32_t i=0; i<_param._nb_branch_complete; i++) +// { +// (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); +// (*(component_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); +// (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); +// (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_PHT_HISTORY [i])); +// (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); +// } +// } + +// // =====[ component_Two_Level_Branch_Predictor_Glue ]=========================== +// name_component = _name+"_Two_Level_Branch_Predictor_Glue"; + +// log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); + +// component_Two_Level_Branch_Predictor_Glue = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::two_level_branch_predictor_glue::Two_Level_Branch_Predictor_Glue (name_component.c_str() , +// #ifdef STATISTICS +// _param_statistics , +// #endif +// *(_param._param_two_level_branch_predictor_glue)); + +// // Instantiation +// #if defined(STATISTICS) or defined(VHDL_TESTBENCH) +// (*(component_Two_Level_Branch_Predictor_Glue->in_CLOCK)) (*(in_CLOCK)); +// #endif +// for (uint32_t i=0; i<_param._nb_prediction; i++) +// { +// if (_param._have_bht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_BHT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); +// } +// if (_param._have_pht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_PHT_ACK [i])) (*(signal_PREDICT_PHT_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_PHT_ADDRESS [i])) (*(signal_PREDICT_PHT_ADDRESS [i])); +// } +// if (_param._have_bht and _param._have_pht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); +// } +// (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_ACK [i])) (*( out_PREDICT_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); +// } + +// for (uint32_t i=0; i<_param._nb_branch_complete; i++) +// { +// if (_param._have_bht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_BHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); +// } +// if (_param._have_pht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_PHT_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_PHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); +// } +// if (_param._have_bht and _param._have_pht) +// { +// (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); +// } +// (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); +// (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); +// } + +// log_printf(FUNC,Two_Level_Branch_Predictor,"allocation","End"); +// }; }; // end namespace two_level_branch_predictor Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp (revision 42) @@ -23,84 +23,20 @@ delete in_NRESET; - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - delete in_PREDICT_VAL [i]; - delete out_PREDICT_ACK [i]; - delete in_PREDICT_ADDRESS [i]; - if (_param._have_bht) - delete out_PREDICT_BHT_HISTORY [i]; - if (_param._have_pht) - delete out_PREDICT_PHT_HISTORY [i]; - if (_param._have_bht) - { - delete signal_PREDICT_BHT_ACK [i]; - delete signal_PREDICT_BHT_ADDRESS [i]; - } - if (_param._have_pht) - { - delete signal_PREDICT_PHT_ACK [i]; - delete signal_PREDICT_PHT_ADDRESS [i]; - } + delete [] in_PREDICT_VAL ; + delete [] out_PREDICT_ACK ; + delete [] in_PREDICT_ADDRESS ; + if (_param._have_bht) + delete [] out_PREDICT_BHT_HISTORY; + if (_param._have_pht) + delete [] out_PREDICT_PHT_HISTORY; - } - - delete in_PREDICT_VAL ; - delete out_PREDICT_ACK ; - delete in_PREDICT_ADDRESS ; + delete [] in_BRANCH_COMPLETE_VAL ; + delete [] out_BRANCH_COMPLETE_ACK ; + delete [] in_BRANCH_COMPLETE_ADDRESS ; if (_param._have_bht) - delete out_PREDICT_BHT_HISTORY; + delete [] in_BRANCH_COMPLETE_BHT_HISTORY; if (_param._have_pht) - delete out_PREDICT_PHT_HISTORY; - if (_param._have_bht) - { - delete signal_PREDICT_BHT_ACK ; - delete signal_PREDICT_BHT_ADDRESS; - } - if (_param._have_pht) - { - delete signal_PREDICT_PHT_ACK ; - delete signal_PREDICT_PHT_ADDRESS; - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - delete in_BRANCH_COMPLETE_VAL [i]; - delete out_BRANCH_COMPLETE_ACK [i]; - delete in_BRANCH_COMPLETE_ADDRESS [i]; - if (_param._have_bht) - delete in_BRANCH_COMPLETE_BHT_HISTORY [i]; - if (_param._have_pht) - delete in_BRANCH_COMPLETE_PHT_HISTORY [i]; - delete in_BRANCH_COMPLETE_DIRECTION [i]; - if (_param._have_bht) - { - delete signal_BRANCH_COMPLETE_BHT_ACK [i]; - delete signal_BRANCH_COMPLETE_BHT_ADDRESS [i]; - } - if (_param._have_pht) - { - delete signal_BRANCH_COMPLETE_PHT_ACK [i]; - delete signal_BRANCH_COMPLETE_PHT_ADDRESS [i]; - } - } - - delete in_BRANCH_COMPLETE_VAL ; - delete out_BRANCH_COMPLETE_ACK ; - delete in_BRANCH_COMPLETE_ADDRESS ; - if (_param._have_bht) - delete in_BRANCH_COMPLETE_BHT_HISTORY; - if (_param._have_pht) - delete in_BRANCH_COMPLETE_PHT_HISTORY; - delete in_BRANCH_COMPLETE_DIRECTION ; - if (_param._have_bht) - { - delete signal_BRANCH_COMPLETE_BHT_ACK ; - delete signal_BRANCH_COMPLETE_BHT_ADDRESS; - } - if (_param._have_pht) - { - delete signal_BRANCH_COMPLETE_PHT_ACK ; - delete signal_BRANCH_COMPLETE_PHT_ADDRESS; - } + delete [] in_BRANCH_COMPLETE_PHT_HISTORY; + delete [] in_BRANCH_COMPLETE_DIRECTION ; // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -111,4 +47,5 @@ delete component_Pattern_History_Table; delete component_Two_Level_Branch_Predictor_Glue; + delete _component; log_printf(FUNC,Two_Level_Branch_Predictor,"deallocation","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl.cpp (revision 42) @@ -21,12 +21,12 @@ { log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl","Begin"); - Vhdl vhdl (_name); + Vhdl * vhdl = new Vhdl (_name); - vhdl.set_library_work (_name + "_Pack"); + vhdl->set_library_work (_name + "_Pack"); if (_param._have_bht) - vhdl.set_library_work (_name + "_Branch_History_Table_Pack"); + vhdl->set_library_work (_name + "_Branch_History_Table_Pack"); if (_param._have_pht) - vhdl.set_library_work (_name + "_Pattern_History_Table_Pack"); - vhdl.set_library_work (_name + "_Two_Level_Branch_Predictor_Glue_Pack"); + vhdl->set_library_work (_name + "_Pattern_History_Table_Pack"); + vhdl->set_library_work (_name + "_Two_Level_Branch_Predictor_Glue_Pack"); vhdl_port (vhdl); @@ -34,5 +34,8 @@ vhdl_body (vhdl); - vhdl.generate_file(); + vhdl->generate_file(); + + delete vhdl; + log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp (revision 42) @@ -17,5 +17,5 @@ - void Two_Level_Branch_Predictor::vhdl_body (Vhdl & vhdl) + void Two_Level_Branch_Predictor::vhdl_body (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","Begin"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_declaration.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_declaration.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_declaration.cpp (revision 42) @@ -17,5 +17,5 @@ - void Two_Level_Branch_Predictor::vhdl_declaration (Vhdl & vhdl) + void Two_Level_Branch_Predictor::vhdl_declaration (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_declaration","Begin"); @@ -25,12 +25,12 @@ if (_param._have_bht) { - vhdl.set_signal ("signal_PREDICT_BHT_ACK_"+toString(i), 1); - vhdl.set_signal ("signal_PREDICT_BHT_ADDRESS_"+toString(i), _param._bht_size_address); - vhdl.set_signal ("signal_PREDICT_BHT_HISTORY_"+toString(i), _param._bht_size_shifter); + vhdl->set_signal ("signal_PREDICT_BHT_ACK_"+toString(i), 1); + vhdl->set_signal ("signal_PREDICT_BHT_ADDRESS_"+toString(i), _param._bht_size_address); + vhdl->set_signal ("signal_PREDICT_BHT_HISTORY_"+toString(i), _param._bht_size_shifter); } if (_param._have_pht) { - vhdl.set_signal ("signal_PREDICT_PHT_ACK_"+toString(i), 1); - vhdl.set_signal ("signal_PREDICT_PHT_ADDRESS_"+toString(i), _param._pht_size_address); + vhdl->set_signal ("signal_PREDICT_PHT_ACK_"+toString(i), 1); + vhdl->set_signal ("signal_PREDICT_PHT_ADDRESS_"+toString(i), _param._pht_size_address); } } @@ -40,11 +40,11 @@ if (_param._have_bht) { - vhdl.set_signal ("signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i), 1); - vhdl.set_signal ("signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i), _param._bht_size_address); + vhdl->set_signal ("signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i), 1); + vhdl->set_signal ("signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i), _param._bht_size_address); } if (_param._have_pht) { - vhdl.set_signal ("signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i), 1); - vhdl.set_signal ("signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i), _param._pht_size_address); + vhdl->set_signal ("signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i), 1); + vhdl->set_signal ("signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i), _param._pht_size_address); } } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_port.cpp (revision 42) @@ -16,33 +16,9 @@ namespace two_level_branch_predictor { - void Two_Level_Branch_Predictor::vhdl_port (Vhdl & vhdl) + void Two_Level_Branch_Predictor::vhdl_port (Vhdl * & vhdl) { log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_port","Begin"); - vhdl.set_port (" in_CLOCK ", IN, 1); - vhdl.set_port (" in_NRESET", IN, 1); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - vhdl.set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN,_param._size_address); - if (_param._have_bht) - vhdl.set_port ("out_PREDICT_BHT_HISTORY_"+toString(i)+" ",OUT,_param._bht_size_shifter); - if (_param._have_pht) - vhdl.set_port ("out_PREDICT_PHT_HISTORY_"+toString(i)+" ",OUT,_param._pht_size_counter); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); - vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); - vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN,_param._size_address); - if (_param._have_bht) - vhdl.set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+"", IN,_param._bht_size_shifter); - if (_param._have_pht) - vhdl.set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)+"", IN,_param._pht_size_counter); - vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+" ", IN, 1); - } + _interfaces->set_port(vhdl); log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_port","End"); Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_label.cpp (revision 41) +++ (revision ) @@ -1,31 +1,0 @@ -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { - - - void Two_Level_Branch_Predictor::vhdl_testbench_label (string label) - { -#ifdef VHDL_TESTBENCH - _vhdl_testbench->add_label(label); -#endif - }; - -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_port.cpp (revision 41) +++ (revision ) @@ -1,58 +1,0 @@ -#ifdef VHDL_TESTBENCH -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" - -namespace morpheo { -namespace behavioural { -namespace stage_1_ifetch { -namespace predictor { -namespace meta_predictor { -namespace two_level_branch_predictor { - - - void Two_Level_Branch_Predictor::vhdl_testbench_port () - { - log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_port","Begin"); - - _vhdl_testbench->set_port (" in_NRESET", IN, 1); - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->set_port (" in_PREDICT_VAL_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_PREDICT_ACK_" +toString(i),OUT, 1); - _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_" +toString(i), IN,_param._size_address); - if (_param._have_bht) - _vhdl_testbench->set_port ("out_PREDICT_BHT_HISTORY_"+toString(i),OUT,_param._bht_size_shifter); - if (_param._have_pht) - _vhdl_testbench->set_port ("out_PREDICT_PHT_HISTORY_"+toString(i),OUT,_param._pht_size_counter); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_" +toString(i), IN, 1); - _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_" +toString(i),OUT, 1); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_" +toString(i), IN,_param._size_address); - if (_param._have_bht) - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i), IN,_param._bht_size_shifter); - if (_param._have_pht) - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i), IN,_param._pht_size_counter); - _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_" +toString(i), IN, 1); - } - - log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_port","End"); - }; - -}; // end namespace two_level_branch_predictor -}; // end namespace meta_predictor -}; // end namespace predictor -}; // end namespace stage_1_ifetch - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp (revision 42) @@ -21,49 +21,7 @@ log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","Begin"); -#ifndef SYSTEMCASS_SPECIFIC - sc_cycle(0); -#endif + sc_start(0); - _vhdl_testbench->add_input (PORT_READ( in_NRESET)); - - // In order with file Two_Level_Branch_Predictor_vhdl_testbench_port.cpp - // Warning : if a output depend of a subcomponent, take directly the port of subcomponent - // (because we have no control on the ordonnancer's policy) - - for (uint32_t i=0; i<_param._nb_prediction; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); - _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue-> - out_PREDICT_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); - if (_param._have_bht) - _vhdl_testbench->add_output(PORT_READ(component_Branch_History_Table -> - component_RegisterFile -> - out_READ_DATA [i])); - if (_param._have_pht) - _vhdl_testbench->add_output(PORT_READ(component_Pattern_History_Table -> - component_RegisterFile -> - out_READ_DATA [i])); - } - - for (uint32_t i=0; i<_param._nb_branch_complete; i++) - { - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); - _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue-> - out_BRANCH_COMPLETE_ACK [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); - if (_param._have_bht) - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY [i])); - if (_param._have_pht) - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY [i])); - _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION [i])); - } - - // add_test : - // - True : the cycle must be compare with the output of systemC - // - False : no test - _vhdl_testbench->add_test(true); - - _vhdl_testbench->new_cycle (); // always at the end + _interfaces->testbench(); log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h (revision 42) @@ -0,0 +1,88 @@ +#ifndef morpheo_behavioural_Component_h +#define morpheo_behavioural_Component_h + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include +#include +#include +#include +#ifdef VHDL +#include "Behavioural/include/Vhdl.h" +#endif +//#include "Behavioural/include/Description.h" +#include "Behavioural/include/Entity.h" +#include "Include/ToString.h" +#include "Include/Debug.h" + +using namespace std; + +namespace morpheo { +namespace behavioural { + + class Component + { + // -----[ fields ]---------------------------------------------------- + private : Entity * _entity ; + private : list * _list_component; + + // -----[ methods ]--------------------------------------------------- + public : Component (void); + public : Component (const Component & component); + public : ~Component (); + + public : Entity * set_entity (string name + ,string type +#ifdef POSITION + ,schema_t schema +#endif + ); + private : string get_entity (void); + + public : void set_component (Component * component +#ifdef POSITION + ,uint32_t pos_x + ,uint32_t pos_y + ,uint32_t size_x + ,uint32_t size_y +#endif + ); + + private : string get_component (void); + + private : Entity * find_entity (string name); + private : Interface * find_interface (string name , + Entity * entity); + +#ifdef VHDL + public : void vhdl_instance (Vhdl * & vhdl); +#endif + + public : void port_map (string component_src , + string port_src , + string component_dest, + string port_dest ); + +#ifdef POSITION + public : void interface_map (string component_src , + string port_dest, + string component_dest, + string port_dest ); + + public : XML toXML (void); + + public : void generate_file (void); +#endif + public : friend ostream& operator<< (ostream& output_stream, + morpheo::behavioural::Component & x); + }; + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Direction.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Direction.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Direction.h (revision 42) @@ -7,6 +7,6 @@ namespace behavioural { -typedef enum { IN, OUT } direction_t; - //typedef enum { IN, OUT, INOUT } direction_t; +typedef enum {INTERNAL, IN, OUT } direction_t; +//typedef enum { IN, OUT, INOUT } direction_t; }; // end namespace behavioural @@ -16,7 +16,8 @@ switch (x) { - case morpheo::behavioural::IN : return "in" ; break; - case morpheo::behavioural::OUT : return "out" ; break; -// case morpheo::behavioural::INOUT : return "inout" ; break; + case morpheo::behavioural::INTERNAL : return "internal" ; break; + case morpheo::behavioural::IN : return "in" ; break; + case morpheo::behavioural::OUT : return "out" ; break; +// case morpheo::behavioural::INOUT : return "inout" ; break; default : return "" ; break; } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION #ifndef morpheo_behavioural_Entity_h #define morpheo_behavioural_Entity_h @@ -13,4 +12,5 @@ #include #include +//#include "Behavioural/include/Description.h" #include "Behavioural/include/Interfaces.h" #include "Behavioural/include/Schema.h" @@ -26,12 +26,13 @@ class Entity { - friend class Position; - friend class Interface; - // -----[ fields ]---------------------------------------------------- private : const string _name ; private : const string _type ; +#ifdef POSITION private : const schema_t _schema ; +#endif private : Interfaces * _interfaces ; + +#ifdef POSITION private : string _comment ; @@ -41,28 +42,42 @@ private : uint32_t _map_pos_x ; private : uint32_t _map_pos_y ; +#endif // -----[ methods ]--------------------------------------------------- - public : Entity (string name , - string type , - schema_t schema ); + public : Entity ( string name + ,string type +#ifdef POSITION + ,schema_t schema +#endif + ); public : Entity (const Entity & entity); public : ~Entity (); + public : string get_name (void); + public : string get_type (void); + +#ifdef POSITION public : void set_comment (string comment); private : string get_comment (void ); - +#endif public : Interfaces * set_interfaces (void); private : string get_interfaces (void); + public : Interfaces * get_interfaces_list(void); public : Interface * find_interface (string name); + public : Signal * find_signal (string name); + public : bool find_signal (Signal * signal); +#ifdef POSITION public : void mapping (uint32_t pos_x, uint32_t pos_y, uint32_t size_x , uint32_t size_y ); +#endif +#ifdef POSITION public : XML toXML (void); public : XML toXML_mapping (void); - +#endif public : friend ostream& operator<< (ostream& output_stream, morpheo::behavioural::Entity & x); @@ -73,3 +88,2 @@ #endif -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h (revision 42) @@ -10,2 +10,7 @@ # error "To have the vhdl's test bench, you must set flags VHDL" #endif + +#if (defined(VHDL_TESTBENCH_ASSERT) and not defined(VHDL_TESTBENCH)) +# error "To have an assert in vhdl's test bench, you must set flags VHDL_TESTBENCH" +#endif + Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h (revision 42) @@ -33,11 +33,11 @@ class Interface { - friend class Interfaces; - // -----[ fields ]---------------------------------------------------- protected : const string _name ; +#ifdef POSITION protected : const direction_t _direction ; protected : const localisation_t _localisation ; protected : string _comment ; +#endif protected : list * _list_signal ; @@ -54,17 +54,27 @@ // -----[ methods ]--------------------------------------------------- - public : Interface (string name , - direction_t direction , - localisation_t localisation); + public : Interface (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ); public : Interface (const Interface & interface); public : ~Interface (); + public : string get_name (); + +#ifdef POSITION public : void set_comment (string comment); protected : string get_comment (void ); +#endif protected : string signal_name (string name_interface, string name_signal , direction_t direction ); + + public : Signal * find_signal (string name); + public : bool find_signal (Signal * signal); protected : string get_signal (void); @@ -73,4 +83,5 @@ uint32_t size , presence_port_t presence_port = PORT_VHDL_YES_TESTBENCH_YES); + public : list * get_signal_list (void); #ifdef SYSTEMC @@ -85,10 +96,12 @@ throw ErrorMorpheo ("Signal \""+name+"\" is a clock, bad presence_port."); - Signal * sig = set_signal (name, IN , size, presence_port); - sc_in_clk * signal = new sc_in_clk (sig->_name.c_str()); + Signal * sig = set_signal (name, IN , size, presence_port); + sc_in_clk * port = new sc_in_clk (sig->_name.c_str()); + + sig->alloc (static_cast(port)); log_printf(FUNC,Behavioural,"set_signal_clk","End"); - return signal; + return port; }; @@ -104,9 +117,8 @@ throw ErrorMorpheo ("Signal \""+name+"\" is not a clock, bad presence_port."); - Signal * sig = set_signal (name, IN , size, presence_port); + Signal * sig = set_signal (name, IN , size, presence_port); sc_in * port = new sc_in (sig->_name.c_str()); -#ifdef VHDL_TESTBENCH + sig->alloc (static_cast(port)); -#endif log_printf(FUNC,Behavioural,"set_signal_in","End"); @@ -128,7 +140,6 @@ Signal * sig = set_signal (name, OUT , size, presence_port); sc_out * port = new sc_out (sig->_name.c_str()); -#ifdef VHDL_TESTBENCH + sig->alloc (static_cast(port)); -#endif log_printf(FUNC,Behavioural,"set_signal_out","End"); @@ -136,36 +147,53 @@ return port; }; + + public : template + sc_signal * set_signal_internal (string name, + uint32_t size) + { + log_printf(FUNC,Behavioural,"set_signal_internal","Begin"); + + Signal * sig = set_signal (name, INTERNAL , size, PORT_VHDL_NO_TESTBENCH_NO); + sc_signal * port = new sc_signal (sig->_name.c_str()); + + sig->alloc (static_cast(port)); + + log_printf(FUNC,Behavioural,"set_signal_internal","End"); + + return port; + }; + #endif #ifdef VHDL public : void set_port (Vhdl * & vhdl); -#ifdef VHDL_TESTBENCH +# ifdef VHDL_TESTBENCH public : void set_signal (Vhdl * & vhdl); public : void get_signal (list * & list_signal); -#endif +# endif #endif #ifdef VHDL_TESTBENCH public : uint32_t get_cycle (void); - public : string get_clock (void); + public : Signal * get_clock (void); + public : Signal * get_reset (void); public : void testbench (void); public : void testbench_cycle (void); public : void testbench_body (Vhdl * & vhdl , - string counter_name ); + string counter_name , + string reset_name ); public : string testbench_test (Vhdl * & vhdl , - string counter_name); + string counter_name, + string reset_name); public : string testbench_test_ok (Vhdl * & vhdl ); protected : string testbench_test_name (Vhdl * & vhdl); protected : string testbench_test_ok_name(Vhdl * & vhdl); - -#endif - -#ifdef POSITION - public : void port_map (void * entity, + protected : string testbench_test_transaction_name(Vhdl * & vhdl); +#endif + +#ifdef POSITION + public : void interface_map (void * entity, void * interface); -#endif - public : XML toXML (void); -#ifdef POSITION public : XML toXML_mapping (void); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface_fifo.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface_fifo.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface_fifo.h (revision 42) @@ -24,11 +24,13 @@ private : bool _test_exhaustive; private : list * _list_cycle ; - #endif // -----[ methods ]--------------------------------------------------- - public : Interface_fifo (string name , - direction_t direction , - localisation_t localisation); + public : Interface_fifo (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ); public : Interface_fifo (const Interface_fifo & interface_fifo); @@ -79,6 +81,9 @@ public : bool testbench_transaction(void); public : void testbench_cycle (void); - public : string testbench_test (Vhdl * & vhdl , - string counter_name); + public : string testbench_test (Vhdl * & vhdl , + string counter_name, + string reset_name ); + + public : string testbench_test_transaction (Vhdl * & vhdl); #endif }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h (revision 42) @@ -35,12 +35,18 @@ public : ~Interfaces (); - public : Interface_fifo * set_interface (string name , - direction_t direction , - localisation_t localisation); + public : Interface_fifo * set_interface (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ); +#ifdef POSITION public : Interface_fifo * set_interface (string name , direction_t direction , localisation_t localisation, string comment ); +#endif private : string get_interface (void); + public :list* get_interface_list (void); #ifdef VHDL @@ -53,16 +59,20 @@ #ifdef VHDL_TESTBENCH private : uint32_t get_cycle (void); - private : string get_clock (void); + private : Signal * get_clock (void); + private : Signal * get_reset (void); private : void testbench_generate_file (void); public : void testbench (void); private : string testbench_body (Vhdl * & vhdl , - string counter_name ); + string counter_name , + string reset_name ); #endif public : Interface_fifo * find_interface (string name); + public : Signal * find_signal (string name); + public : bool find_signal (Signal * signal); +#ifdef POSITION public : XML toXML (void); -#ifdef POSITION public : XML toXML_mapping (void); #endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Localisation.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Localisation.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Localisation.h (revision 42) @@ -1,2 +1,3 @@ +#ifdef POSITION #ifndef morpheo_behavioural_Localisation_h #define morpheo_behavioural_Localisation_h @@ -26,2 +27,3 @@ #endif +#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/include/Position.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Position.h (revision 41) +++ (revision ) @@ -1,69 +1,0 @@ -#ifdef POSITION -#ifndef morpheo_behavioural_Position_h -#define morpheo_behavioural_Position_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include -#include -#include -#include "Behavioural/include/Entity.h" -#include "Include/ToString.h" -#include "Include/Debug.h" - -using namespace std; - -namespace morpheo { -namespace behavioural { - - class Position - { - // -----[ fields ]---------------------------------------------------- - private : Entity * _entity ; - private : list * _list_component; - - // -----[ methods ]--------------------------------------------------- - public : Position (void); - public : Position (const Position & position); - public : ~Position (); - - public : Entity * set_entity (string name , - string type , - schema_t schema ); - private : string get_entity (void); - - public : void set_component (Position * position, - uint32_t pos_x , - uint32_t pos_y , - uint32_t size_x , - uint32_t size_y ); - - private : string get_component (void); - - public : void port_map (string component1, - string signal1 , - string component2, - string signal2 ); - - public : XML toXML (void); - - private : Entity * find_entity (string name); - private : Interface * find_interface (string name , - Entity * entity); - - public : void generate_file (void); - - public : friend ostream& operator<< (ostream& output_stream, - morpheo::behavioural::Position & x); - }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h (revision 42) @@ -44,5 +44,7 @@ PORT_VHDL_NO_TESTBENCH_NO , CLOCK_VHDL_YES , - CLOCK_VHDL_NO } presence_port_t; + CLOCK_VHDL_NO , + RESET_VHDL_YES , + RESET_VHDL_NO } presence_port_t; class Signal @@ -56,8 +58,12 @@ private : const presence_port_t _presence_port; + private : Signal * _signal ; + private : bool _is_allocate ; + private : void * _sc_signal ; + private : bool _is_map ; + private : void * _sc_signal_map; + private : type_info_t _type_info ; + #ifdef VHDL_TESTBENCH - private : void * _signal ; - private : type_info_t _type_info ; - private : list * _list_value ; #endif @@ -71,5 +77,15 @@ public : ~Signal (); -#ifdef VHDL_TESTBENCH + public : string get_name (void); + public : uint32_t get_size (void); + public : Signal * get_signal_link (void); + + public : bool presence_vhdl (void); + public : bool presence_testbench (void); + + public : void mapping (Signal * signal); + public : void link (Signal * signal); + +#ifdef SYSTEMC public :template T read (void) @@ -88,9 +104,9 @@ switch (_type_info) { - case BOOL : return (static_cast *>(_signal)->read()); - case UINT8_T : return (static_cast *>(_signal)->read()); - case UINT16_T : return (static_cast *>(_signal)->read()); - case UINT32_T : return (static_cast *>(_signal)->read()); - case UINT64_T : return (static_cast *>(_signal)->read()); + case BOOL : return (static_cast *>(_sc_signal_map)->read()); + case UINT8_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT16_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT32_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT64_T : return (static_cast *>(_sc_signal_map)->read()); default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); } @@ -102,9 +118,9 @@ switch (_type_info) { - case BOOL : return (static_cast *>(_signal)->read()); - case UINT8_T : return (static_cast *>(_signal)->read()); - case UINT16_T : return (static_cast *>(_signal)->read()); - case UINT32_T : return (static_cast *>(_signal)->read()); - case UINT64_T : return (static_cast *>(_signal)->read()); + case BOOL : return (static_cast *>(_sc_signal_map)->read()); + case UINT8_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT16_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT32_T : return (static_cast *>(_sc_signal_map)->read()); + case UINT64_T : return (static_cast *>(_sc_signal_map)->read()); default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); } @@ -117,5 +133,7 @@ throw (ErrorMorpheo ("Signal \""+_name+"\" : already allocate.")); - _signal = port; + _is_allocate = true; + _sc_signal = port; + _sc_signal_map = port; if (typeid(T) == typeid(bool )) @@ -136,16 +154,21 @@ _type_info = UNKNOW; } - - public : void testbench (void); - public : void testbench_body (Vhdl * & vhdl , - string counter_name ); - public : void testbench_test_ok(Vhdl * & vhdl ); -#endif +#endif + #ifdef VHDL public : void set_port (Vhdl * & vhdl); # ifdef VHDL_TESTBENCH - public : string get_clock (void); + public : Signal * get_clock (void); + public : Signal * get_reset (void); + public : uint32_t get_reset_cycle (bool active_low); + public : void set_signal (Vhdl * & vhdl); public : void get_name_vhdl (list * & list_signal); + + public : void testbench (void); + public : void testbench_body (Vhdl * & vhdl , + string counter_name , + string reset_name ); + public : void testbench_test_ok(Vhdl * & vhdl ); # endif #endif @@ -162,8 +185,12 @@ switch (x) { - case morpheo::behavioural::PORT_VHDL_YES_TESTBENCH_YES : return "Port is in VHDL's model and TestBench's model" ; break; - case morpheo::behavioural::PORT_VHDL_YES_TESTBENCH_NO : return "Port is in VHDL's model " ; break; - case morpheo::behavioural::PORT_VHDL_NO_TESTBENCH_YES : return "Port is in TestBench's model" ; break; - case morpheo::behavioural::PORT_VHDL_NO_TESTBENCH_NO : return "Port is in none model " ; break; + case morpheo::behavioural::PORT_VHDL_YES_TESTBENCH_YES : return "Port is in VHDL's model and TestBench's model" ; break; + case morpheo::behavioural::PORT_VHDL_YES_TESTBENCH_NO : return "Port is in VHDL's model " ; break; + case morpheo::behavioural::PORT_VHDL_NO_TESTBENCH_YES : return "Port is in TestBench's model" ; break; + case morpheo::behavioural::PORT_VHDL_NO_TESTBENCH_NO : return "Port is in none model " ; break; + case morpheo::behavioural::CLOCK_VHDL_YES : return "Clock is in VHDL's model " ; break; + case morpheo::behavioural::CLOCK_VHDL_NO : return "Clock is not in VHDL's model " ; break; + case morpheo::behavioural::RESET_VHDL_YES : return "Reset is in VHDL's model " ; break; + case morpheo::behavioural::RESET_VHDL_NO : return "Reset is not in VHDL's model " ; break; default : return ""; break; } Index: unk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl_Testbench.h =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl_Testbench.h (revision 41) +++ (revision ) @@ -1,103 +1,0 @@ -#ifdef VHDL_TESTBENCH - -#ifndef morpheo_behavioural_Vhdl_Testbench_h -#define morpheo_behavioural_Vhdl_Testbench_h - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Environnement.h" -#include "Behavioural/include/Vhdl.h" -#include "Include/ToString.h" -#include "Include/ToBase2.h" -#include -#include -#include - -using namespace std; - -namespace morpheo { -namespace behavioural { - - class Vhdl_Testbench - { - class label_t - { - public : const uint32_t _cycle; - public : const string _label; - - label_t (uint32_t cycle, - string label) : - _cycle (cycle), - _label (label) - {}; - }; - -// // -----[ fields ]---------------------------------------------------- -// private : const string _name ; -// private : const bool _exhaustive ; - -// private : string _clock_name ; -// private : uint32_t _num_cycle ; - -// private : uint32_t _size_input ; -// private : uint32_t _size_output; - -// private : list _list_input ; -// private : list _list_input_cycle; -// private : list _list_input_size ; - -// private : list _list_output; -// private : list _list_output_cycle; -// private : list _list_output_size ; - -// private : list _list_test; -// private : list _list_port; -// private : list _list_label; - -// private : list::iterator _num_input ; -// private : list::iterator _num_output; - -// private : Vhdl * _vhdl; - - // -----[ methods ]--------------------------------------------------- - public : Vhdl_Testbench (string name, - bool exhaustive=true){}; - public : ~Vhdl_Testbench (){}; - - public : void generate_file (void){}; - - public : void set_port (string name , - direction_t direction , - uint32_t size ){}; - public : void set_clock (string name , - bool model_have_clock){}; - public : void new_cycle (void){}; - - private : uint32_t get_input (void){return 0;}; - private : void set_input (void){}; - public : void add_input (uint32_t value ){}; - - private : uint32_t get_output (void){return 0;}; - private : void set_output (void){}; - public : void add_output (uint32_t value ){}; - - private : uint32_t get_test (void){return 0;}; - public : void add_test (bool must_test ){}; - - private : void get_label (void){}; - public : void add_label (string label ){}; - - private : void generate_process_clock (uint32_t counter ){}; - private : void generate_instance (void){}; - }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info (revision 42) @@ -25,5 +25,5 @@ #target_dep all Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/SelfTest #target_dep all Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest -#target_dep all Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest +target_dep all Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest #target_dep all Stage_5_Execute/Execution_cluster/Execution_group/Execution_unit/SelfTest Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component.cpp (revision 42) @@ -0,0 +1,38 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + Component::Component (void) + { + log_printf(FUNC,Behavioural,"Component","Begin"); + _list_component = new list; + log_printf(FUNC,Behavioural,"Component","End"); + }; + + Component::Component (const Component & component) + { + log_printf(FUNC,Behavioural,"Component (copy)","Begin"); + _entity = component._entity ; + _list_component = component._list_component; + log_printf(FUNC,Behavioural,"Component (copy)","End"); + }; + + Component::~Component () + { + log_printf(FUNC,Behavioural,"~Component","Begin"); + delete _entity; + delete _list_component; + log_printf(FUNC,Behavioural,"~Component","End"); + }; + + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_find_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_find_entity.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_find_entity.cpp (revision 42) @@ -0,0 +1,38 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + Entity * Component::find_entity (string name) + { + + if (_entity->get_name() == name) + return _entity; + else + if (_list_component->empty()== false) + { + list::iterator i = _list_component->begin(); + + while (i != _list_component->end()) + { + if ((*i)->get_name() == name) + { + return *i; + break; + } + ++i; + } + } + + return NULL; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_generate_file.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_generate_file.cpp (revision 42) @@ -0,0 +1,33 @@ +#ifdef POSITION +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + void Component::generate_file (void) + { + try + { + XML xml = toXML(); + + xml.filename_extension ("pos"); + + xml.generate_file("ISO-8859-1"); + + } + catch (ErrorMorpheo e) + { + throw (ErrorMorpheo ("Component \""+_entity->get_name()+"\" have a bad mapping : "+e.what())); + } + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_component.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_component.cpp (revision 42) @@ -0,0 +1,49 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + string Component::get_component (void) + { + uint32_t depth = 0; + string separator = "\n"; + bool last_separator = false; + + list::iterator i = _list_component->begin(); + bool empty = _list_component->empty(); + + string tab = string(depth,'\t'); + ostringstream text; + + if (not empty) + { + // First + if (i != _list_component->end()) + { + text << tab << **i; + ++i; + } + + while (i != _list_component->end()) + { + text << separator; + text << tab << **i; + ++i; + } + + if (last_separator) + text << separator; + } + + return text.str(); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_entity.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_get_entity.cpp (revision 42) @@ -0,0 +1,21 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + string Component::get_entity (void) + { + ostringstream text; + text << *(_entity); + return text.str(); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_interface_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_interface_map.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_interface_map.cpp (revision 42) @@ -0,0 +1,60 @@ +#ifdef POSITION +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + void Component::interface_map (string component_src , + string port_src , + string component_dest, + string port_dest ) + { + // First entity + Entity * entity_dest = find_entity(component_dest); + + string name_entity = _entity->get_name(); + + if (entity_dest == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with unknow component \""+component_dest+"\".")); + + bool is_top_level_dest = (name_entity == component_dest); + + Interface * interface_dest = entity_dest->find_interface(port_dest); + + if (interface_dest == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with component \""+component_dest+"\" and a unknow interface \""+port_dest+"\".")); + + // Second entity + Entity * entity_src = find_entity(component_src); + + if (entity_src == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with unknow component \""+component_src+"\".")); + + bool is_top_level_src = (name_entity == component_src); + + Interface * interface_src = entity_src->find_interface(port_src); + + if (interface_src == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with component \""+component_src+"\" and a unknow interface \""+port_src+"\".")); + + // all is ok - link + if (is_top_level_dest == false) + interface_dest->interface_map(static_cast(entity_src ), + static_cast(interface_src)); + + if (is_top_level_src == false) + interface_src->interface_map(static_cast(entity_dest ), + static_cast(interface_dest)); + + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp (revision 42) @@ -0,0 +1,48 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + void Component::port_map (string component_src , + string port_src , + string component_dest, + string port_dest ) + { + string name_entity = _entity->get_name(); + + // First entity + Entity * entity_dest = find_entity(component_dest); + + if (entity_dest == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with unknow component \""+component_dest+"\".")); + + Signal * signal_dest = entity_dest->find_signal (port_dest); + + if (signal_dest == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with component \""+component_dest+"\" and a unknow signal \""+port_dest+"\".")); + + // Second entity + Entity * entity_src = find_entity(component_src); + + if (entity_src == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with unknow component \""+component_src+"\".")); + + Signal * signal_src = entity_src->find_signal (port_src); + + if (signal_src == NULL) + throw (ErrorMorpheo ("Component \""+name_entity+"\", port map with component \""+component_src+"\" and a unknow signal \""+port_src+"\".")); + + // If all is ok, mapping + signal_src ->link (signal_dest); + signal_dest->mapping(signal_src ); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_print.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_print.cpp (revision 42) @@ -0,0 +1,23 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + + +namespace morpheo { +namespace behavioural { + + ostream& operator<< (ostream& output_stream, + morpheo::behavioural::Component & x) + { + output_stream << x.get_entity () << endl; + output_stream << x.get_component () << endl; + return output_stream; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp (revision 42) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + void Component::set_component (Component * component +#ifdef POSITION + ,uint32_t pos_x + ,uint32_t pos_y + ,uint32_t size_x + ,uint32_t size_y +#endif + ) + { + Entity * entity = component->_entity; + + _list_component->push_back(entity); + +#ifdef POSITION + entity->mapping( pos_x, pos_y, size_x, size_y); +#endif + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_entity.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_entity.cpp (revision 42) @@ -0,0 +1,32 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + Entity * Component::set_entity (string name + ,string type +#ifdef POSITION + ,schema_t schema +#endif + ) + { + Entity * entity = new Entity (name + ,type +#ifdef POSITION + ,schema +#endif + ); + _entity = entity; + + return entity; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_toXML.cpp (revision 42) @@ -0,0 +1,41 @@ +#ifdef POSITION +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + XML Component::toXML (void) + { + XML xml (_entity->get_name()); + + xml.balise_open ("description"); + xml. insert_XML (_entity->toXML()); + xml. balise_open ("architecture"); + + if (_list_component->empty()== false) + { + list::iterator i = _list_component->begin(); + + while (i != _list_component->end()) + { + xml.insert_XML ((*i)->toXML_mapping()); + ++i; + } + } + + xml. balise_close (); + xml.balise_close (); + + return xml; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_vhdl_instance.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_vhdl_instance.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_vhdl_instance.cpp (revision 42) @@ -0,0 +1,91 @@ +#ifdef VHDL +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Component.h" + +namespace morpheo { +namespace behavioural { + + void Component::vhdl_instance (Vhdl * & vhdl) + { + uint32_t cpt = 0; + map tab; + + vhdl->set_library_work (_entity->get_name() + "_Pack"); + + // for each entity + list * list_component = _list_component; + list::iterator i = list_component->begin(); + if (not list_component->empty()) + { + while (i != list_component->end()) + { + vhdl->set_library_work ((*i)->get_name() + "_Pack"); + + list list_port_map; + + // for each interface + list * list_interface = (*i)->get_interfaces_list()->get_interface_list(); + list::iterator j = list_interface->begin(); + if (not list_interface->empty()) + { + while (j != list_interface->end()) + { + // for each signal + list * list_signal = (*j)->get_signal_list(); + list::iterator k = list_signal->begin(); + if (not list_signal->empty()) + { + while (k != list_signal->end()) + { + // test if is connect with external interface or with an another component. + Signal * signal_src = (*k); + if (signal_src->presence_vhdl () == true) + { + Signal * signal_dest = (*k)->get_signal_link(); + string name_src = signal_src->get_name(); + string name_dest; + + if (_entity->find_signal(signal_dest) == false) + { + // find if signal is already link + map::iterator it = tab.find(signal_src); + if (tab.find(signal_src) == tab.end()) + { + // Create name + name_dest = "signal_"+toString(cpt++); + + tab [signal_src ] = name_dest; + tab [signal_dest] = name_dest; + + // Add a new signal + vhdl->set_signal (name_dest, signal_src->get_size()); + } + else + name_dest = (*it).second; + } + else + name_dest = signal_dest->get_name(); + + vhdl->set_body_component_port_map (list_port_map, name_src, name_dest); + } + ++k; + } + } + ++j; + } + } + vhdl->set_body_component ("instance_"+(*i)->get_name(),(*i)->get_name(),list_port_map); + ++i; + } + } + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -12,26 +11,37 @@ namespace behavioural { - Entity::Entity (string name , - string type , - schema_t schema): - _name (name ), - _type (type ), - _schema (schema ) + Entity::Entity ( string name + ,string type +#ifdef POSITION + ,schema_t schema +#endif + ): + _name (name ) + ,_type (type ) +#ifdef POSITION + ,_schema (schema ) +#endif { log_printf(FUNC,Behavioural,"Entity","Begin"); _interfaces = new Interfaces (name); +#ifdef POSITION _is_map = false; +#endif log_printf(FUNC,Behavioural,"Entity","End"); }; Entity::Entity (const Entity & entity): - _name (entity._name ), - _type (entity._type ), - _schema (entity._schema ) + _name (entity._name ) + ,_type (entity._type ) +#ifdef POSITION + ,_schema (entity._schema ) +#endif { log_printf(FUNC,Behavioural,"Entity (copy)","Begin"); + _interfaces = entity._interfaces; +#ifdef POSITION _is_map = entity._is_map ; - _interfaces = entity._interfaces; _comment = entity._comment ; +#endif log_printf(FUNC,Behavioural,"Entity (copy)","End"); }; @@ -43,7 +53,5 @@ log_printf(FUNC,Behavioural,"~Entity","End"); }; - }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_interface.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_interface.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -19,3 +18,2 @@ }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_signal.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_find_signal.cpp (revision 42) @@ -0,0 +1,24 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Entity.h" + +namespace morpheo { +namespace behavioural { + + Signal * Entity::find_signal (string name) + { + return _interfaces->find_signal(name); + }; + + bool Entity::find_signal (Signal * signal) + { + return _interfaces->find_signal(signal); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_interfaces.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_interfaces.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_interfaces.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -20,5 +19,10 @@ }; + Interfaces * Entity::get_interfaces_list (void) + { + return _interfaces; + }; + + }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_name.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_name.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_name.cpp (revision 42) @@ -0,0 +1,20 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Entity.h" + + +namespace morpheo { +namespace behavioural { + + string Entity::get_name (void) + { + return _name; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_type.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_type.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_get_type.cpp (revision 42) @@ -0,0 +1,20 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Entity.h" + + +namespace morpheo { +namespace behavioural { + + string Entity::get_type (void) + { + return _type; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_map.cpp (revision 41) +++ (revision ) @@ -1,33 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Entity.h" - - -namespace morpheo { -namespace behavioural { - - void Entity::mapping (uint32_t pos_x, - uint32_t pos_y, - uint32_t size_x , - uint32_t size_y ) - { - if (_is_map != false) - throw (ErrorMorpheo ("Entity \""+_name+"\" is already mapped")); - - _is_map = true; - - _map_size_x = size_x; - _map_size_y = size_y; - _map_pos_x = pos_x ; - _map_pos_y = pos_y ; - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_mapping.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_mapping.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_mapping.cpp (revision 42) @@ -0,0 +1,33 @@ +#ifdef POSITION +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Entity.h" + + +namespace morpheo { +namespace behavioural { + + void Entity::mapping (uint32_t pos_x, + uint32_t pos_y, + uint32_t size_x , + uint32_t size_y ) + { + if (_is_map != false) + throw (ErrorMorpheo ("Entity \""+_name+"\" is already mapped")); + + _is_map = true; + + _map_size_x = size_x; + _map_size_y = size_y; + _map_pos_x = pos_x ; + _map_pos_y = pos_y ; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_print.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_print.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -16,6 +15,10 @@ morpheo::behavioural::Entity & x) { +#ifdef POSITION output_stream << x._name + "\t"+x._type+"\t"+toString(x._schema) << endl; output_stream << x.get_comment() << endl; +#else + output_stream << x._name + "\t"+x._type<< endl; +#endif output_stream << x.get_interfaces() << endl; return output_stream; @@ -24,3 +27,2 @@ }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_set_interfaces.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_set_interfaces.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_set_interfaces.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -19,3 +18,2 @@ }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp (revision 42) @@ -11,17 +11,22 @@ namespace behavioural { - Interface::Interface (string name , - direction_t direction , - localisation_t localisation ): - _name (name ), - _direction (direction ), - _localisation (localisation) + Interface::Interface (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ): + _name (name ) +#ifdef POSITION + ,_direction (direction ) + ,_localisation (localisation) +#endif { log_printf(FUNC,Behavioural,"Interface","Begin"); - _comment = ""; _list_signal = new (list); #ifdef POSITION + _comment = ""; _is_map = false; _entity_map = NULL; @@ -37,12 +42,14 @@ Interface::Interface (const Interface & interface): - _name (interface._name ), - _direction (interface._direction ), - _localisation (interface._localisation) + _name (interface._name ) +#ifdef POSITION + ,_direction (interface._direction ) + ,_localisation (interface._localisation) +#endif { log_printf(FUNC,Behavioural,"Interface (copy)","Begin"); - _comment = interface._comment ; _list_signal = interface._list_signal; #ifdef POSITION + _comment = interface._comment ; _is_map = interface._is_map ; _entity_map = interface._entity_map ; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo.cpp (revision 42) @@ -11,10 +11,16 @@ namespace behavioural { - Interface_fifo::Interface_fifo (string name , - direction_t direction , - localisation_t localisation): - Interface (name , - direction , - localisation) + Interface_fifo::Interface_fifo (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ): + Interface (name +#ifdef POSITION + ,direction + ,localisation +#endif + ) { log_printf(FUNC,Behavioural,"Interface_fifo","Begin"); @@ -32,7 +38,10 @@ Interface_fifo::Interface_fifo (const Interface_fifo & interface_fifo) : - Interface (interface_fifo._name , - interface_fifo._direction , - interface_fifo._localisation) + Interface (interface_fifo._name +#ifdef POSITION + ,interface_fifo._direction + ,interface_fifo._localisation +#endif + ) { log_printf(FUNC,Behavioural,"Interface_fifo (copy)","Begin"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_get_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_get_cycle.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_get_cycle.cpp (revision 42) @@ -17,6 +17,9 @@ if (_test_exhaustive == true) return Interface::get_cycle(); - - return _list_cycle->back(); + + if (_list_cycle->empty() == true) + return 0; + else + return _list_cycle->back(); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp (revision 42) @@ -13,5 +13,6 @@ string Interface_fifo::testbench_test (Vhdl * & vhdl, - string counter_name) + string counter_name, + string reset_name ) { log_printf(FUNC,Behavioural,"testbench_test","Begin"); @@ -19,5 +20,5 @@ if (_test_exhaustive == true) - test_name = Interface::testbench_test(vhdl,counter_name); + test_name = Interface::testbench_test(vhdl,counter_name,reset_name); else { @@ -26,11 +27,15 @@ vhdl->set_body(""); - test_name = testbench_test_name (vhdl); - string test_name_ok = testbench_test_ok (vhdl); + test_name = testbench_test_name (vhdl); + string test_name_tmp = test_name+"_tmp"; + string test_name_ok = testbench_test_ok (vhdl); + string test_transaction = testbench_test_transaction (vhdl); + + vhdl->set_signal(test_name_tmp,1); if (_list_cycle->empty()== false) { vhdl->set_body ("with "+counter_name+" select"); - vhdl->set_body ("\t"+test_name+" <="); + vhdl->set_body ("\t"+test_name_tmp+" <="); list::iterator i = _list_cycle->begin(); @@ -38,9 +43,35 @@ while (i != _list_cycle->end()) { - vhdl->set_body ("\t"+test_name_ok+" when "+toString(*i)+","); + vhdl->set_body ("\t"+test_transaction+" and "+test_name_ok+" when "+toString(*i)+","); ++i; } - vhdl->set_body ("\t'1' when others;"); + vhdl->set_body ("\tnot "+test_transaction+" when others;"); } + else + vhdl->set_body (test_name_tmp+" <= not "+test_transaction+";"); + + vhdl->set_body(""); + vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";"); + +#ifdef VHDL_TESTBENCH_ASSERT + if (_list_cycle->empty()== false) + { + vhdl->set_body(""); + vhdl->set_body("-- Assert ..."); + vhdl->set_body(""); + + uint32_t j = 0; + list::iterator i = _list_cycle->begin(); + + while (i != _list_cycle->end()) + { + vhdl->set_body("assert not ( ("+counter_name+" = "+toString(*i)+")) report \"***** <"+_name+"> interface's test number "+toString(j)+" *****\" severity NOTE;"); + j++; + ++i; + } + + vhdl->set_body(""); + } +#endif } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test_transaction.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test_transaction.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test_transaction.cpp (revision 42) @@ -0,0 +1,56 @@ +#ifdef VHDL_TESTBENCH +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interface_fifo.h" + +namespace morpheo { +namespace behavioural { + + string Interface_fifo::testbench_test_transaction (Vhdl * & vhdl) + { + log_printf(FUNC,Behavioural,"testbench_test_transaction","Begin"); + + string name = testbench_test_transaction_name(vhdl); + + vhdl->set_body(name+" <= '1'"); + + // list "val" + if (_list_signal_val->empty()== false) + { + list::iterator i = _list_signal_val->begin(); + + while (i != _list_signal_val->end()) + { + vhdl->set_body("\tand "+(*i)->get_name()); + ++i; + } + } + + // list "ack" + if (_list_signal_ack->empty()== false) + { + list::iterator i = _list_signal_ack->begin(); + + while (i != _list_signal_ack->end()) + { + vhdl->set_body("\tand "+(*i)->get_name()); + ++i; + } + } + + vhdl->set_body("\t;"); + vhdl->set_body(""); + + log_printf(FUNC,Behavioural,"testbench_test_transaction","End"); + + return name; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_transaction.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_transaction.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_transaction.cpp (revision 42) @@ -1,2 +1,3 @@ +#ifdef VHDL_TESTBENCH /* * $Id$ @@ -48,2 +49,3 @@ }; // end namespace behavioural }; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_find_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_find_signal.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_find_signal.cpp (revision 42) @@ -0,0 +1,63 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interface.h" + + +namespace morpheo { +namespace behavioural { + + Signal * Interface::find_signal (string name) + { + log_printf(FUNC,Behavioural,"find_signal","Begin"); + + list::iterator i = _list_signal->begin(); + Signal * sig = NULL; + if (_list_signal->empty() == false) + { + while (i != _list_signal->end()) + { + if ((*i)->get_name() == name) + { + sig = (*i); + break; + } + ++i; + } + } + + log_printf(FUNC,Behavioural,"find_signal","End"); + + return sig; + }; + + bool Interface::find_signal (Signal * signal) + { + log_printf(FUNC,Behavioural,"find_signal","Begin"); + + bool find = false; + list::iterator i = _list_signal->begin(); + if (_list_signal->empty() == false) + { + while (i != _list_signal->end()) + { + if ( (*i) == signal) + { + find = true; + break; + } + ++i; + } + } + + log_printf(FUNC,Behavioural,"find_signal","End"); + + return find; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_clock.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_clock.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_clock.cpp (revision 42) @@ -13,7 +13,7 @@ namespace behavioural { - string Interface::get_clock (void) + Signal * Interface::get_clock (void) { - string clock = ""; + Signal * clock = NULL; if (not _list_signal->empty()) @@ -23,11 +23,11 @@ while (i != _list_signal->end()) { - string str = (*i)->get_clock (); + Signal * sig = (*i)->get_clock (); - if (str != "") + if (sig != NULL) { - if (clock != "") + if (clock != NULL) throw ErrorMorpheo (" : find too many clock."); - clock = str; + clock = sig; } ++i; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_comment.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_comment.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_comment.cpp (revision 42) @@ -1,2 +1,3 @@ +#ifdef POSITION /* * $Id$ @@ -22,2 +23,3 @@ }; // end namespace behavioural }; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_name.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_name.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_name.cpp (revision 42) @@ -0,0 +1,23 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interface.h" + + +namespace morpheo { +namespace behavioural { + + string Interface::get_name (void) + { + log_printf(FUNC,Behavioural,"get_name","Begin"); + string res = _name; + log_printf(FUNC,Behavioural,"get_name","End"); + return res; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_reset.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_reset.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_reset.cpp (revision 42) @@ -0,0 +1,42 @@ +#ifdef VHDL_TESTBENCH +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interface.h" + + +namespace morpheo { +namespace behavioural { + + Signal * Interface::get_reset (void) + { + Signal * reset = NULL; + + if (not _list_signal->empty()) + { + list::iterator i = _list_signal->begin(); + + while (i != _list_signal->end()) + { + Signal * sig = (*i)->get_reset (); + + if (sig != NULL) + { + if (reset != NULL) + throw ErrorMorpheo (" : find too many reset."); + reset = sig; + } + ++i; + } + } + + return reset; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_signal.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_get_signal.cpp (revision 42) @@ -69,4 +69,9 @@ #endif + list * Interface::get_signal_list (void) + { + return _list_signal; + } + }; // end namespace behavioural }; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_interface_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_interface_map.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_interface_map.cpp (revision 42) @@ -0,0 +1,29 @@ +#ifdef POSITION +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interface.h" + + +namespace morpheo { +namespace behavioural { + + void Interface::interface_map (void * entity, + void * interface) + { + log_printf(FUNC,Behavioural,"interface_map","Begin"); + + _is_map = true ; + _entity_map = entity ; + _interface_map = interface; + + log_printf(FUNC,Behavioural,"interface_map","End"); + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_port_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_port_map.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_port_map.cpp (revision 42) @@ -1,3 +1,2 @@ -#ifdef POSITION /* * $Id$ @@ -13,15 +12,16 @@ namespace behavioural { - void Interface::port_map (void * entity, - void * interface) - { - log_printf(FUNC,Behavioural,"port_map","Begin"); - _is_map = true ; - _entity_map = entity ; - _interface_map = interface; - log_printf(FUNC,Behavioural,"port_map","End"); - }; +// void Interface::port_map (void * entity, +// void * interface) +// { +// log_printf(FUNC,Behavioural,"port_map","Begin"); +// #ifdef POSITION +// _is_map = true ; +// _entity_map = entity ; +// _interface_map = interface; +// #endif +// log_printf(FUNC,Behavioural,"port_map","End"); +// }; }; // end namespace behavioural }; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_print.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_print.cpp (revision 42) @@ -16,6 +16,10 @@ { log_printf(FUNC,Behavioural,"operator<<","Begin"); +#ifdef POSITION output_stream << x._name + "\t"+toString(x._localisation)+"\t"+toString(x._direction) << endl; output_stream << x.get_comment() << endl; +#else + output_stream << x._name << endl; +#endif output_stream << x.get_signal () << endl; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_comment.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_comment.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_comment.cpp (revision 42) @@ -1,2 +1,3 @@ +#ifdef POSITION /* * $Id$ @@ -21,2 +22,3 @@ }; // end namespace behavioural }; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_signal.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_signal.cpp (revision 42) @@ -20,8 +20,5 @@ string signame = signal_name(_name, name, direction); - Signal * sig = new Signal (signame , - direction , - size , - presence_port); + Signal * sig = new Signal (signame, direction, size, presence_port); _list_signal->push_back (sig); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_body.cpp (revision 42) @@ -14,5 +14,6 @@ void Interface::testbench_body (Vhdl * & vhdl, - string counter_name) + string counter_name, + string reset_name ) { log_printf(FUNC,Behavioural,"testbench_body","Begin"); @@ -28,5 +29,5 @@ while (i != _list_signal->end()) { - (*i)->testbench_body(vhdl, counter_name); + (*i)->testbench_body(vhdl, counter_name, reset_name); ++i; } Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp (revision 42) @@ -14,5 +14,6 @@ string Interface::testbench_test (Vhdl * & vhdl, - string counter_name) + string counter_name, + string reset_name ) { log_printf(FUNC,Behavioural,"testbench_test","Begin"); @@ -25,5 +26,5 @@ string test_name_ok = testbench_test_ok (vhdl); - vhdl->set_body(test_name + " <= "+test_name_ok+";"); + vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";"); log_printf(FUNC,Behavioural,"testbench_test","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_name.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_name.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_name.cpp (revision 42) @@ -49,4 +49,22 @@ }; + string Interface::testbench_test_transaction_name (Vhdl * & vhdl) + { + log_printf(FUNC,Behavioural,"testbench_test_transaction_name","Begin"); + + string name; + + name = "interface_"; + if (_name != "") + name += _name + "_"; + name += "test_transaction"; + + vhdl->set_signal(name,1); + + log_printf(FUNC,Behavioural,"testbench_test_transaction_name","End"); + + return name; + }; + }; // end namespace behavioural }; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_ok.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_ok.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test_ok.cpp (revision 42) @@ -20,4 +20,5 @@ vhdl->set_body(test_name + " <= '1' when true"); + // set all condition if (_list_signal->empty()== false) @@ -31,5 +32,5 @@ } } - vhdl->set_body("else '0';"); + vhdl->set_body("\telse '0';"); vhdl->set_body(""); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_toXML.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_toXML.cpp (revision 42) @@ -1,2 +1,3 @@ +#ifdef POSITION /* * $Id$ @@ -43,5 +44,4 @@ }; -#ifdef POSITION XML Interface::toXML_mapping (void) { @@ -55,6 +55,6 @@ xml.singleton_begin ("port_map"); xml. attribut ("name" ,_name ); - xml. attribut ("component",(static_cast(_entity_map ))->_name); - xml. attribut ("port" ,(static_cast(_interface_map))->_name); + xml. attribut ("component",(static_cast(_entity_map ))->get_name()); + xml. attribut ("port" ,(static_cast(_interface_map))->get_name()); xml.singleton_end (); @@ -63,5 +63,5 @@ return xml; }; -#endif }; // end namespace behavioural }; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_interface.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_interface.cpp (revision 42) @@ -15,9 +15,9 @@ if (_list_interface->empty()== false) { - list::iterator i = _list_interface->begin(); + list::iterator i = _list_interface->begin(); while (i != _list_interface->end()) { - if ((*i)->_name == name) + if ((*i)->get_name() == name) return (*i); ++i; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_signal.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_find_signal.cpp (revision 42) @@ -0,0 +1,53 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interfaces.h" + +namespace morpheo { +namespace behavioural { + + Signal * Interfaces::find_signal (string name) + { + if (_list_interface->empty()== false) + { + list::iterator i = _list_interface->begin(); + + while (i != _list_interface->end()) + { + Signal * signal = (*i)->find_signal(name); + + // Warning : Name of signal is uniq + if (signal != NULL) + return signal; + + ++i; + } + } + + return NULL; + }; + + bool Interfaces::find_signal (Signal * signal) + { + if (_list_interface->empty()== false) + { + list::iterator i = _list_interface->begin(); + + while (i != _list_interface->end()) + { + if ((*i)->find_signal(signal) == true) + return true; + + ++i; + } + } + + return false; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_clock.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_clock.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_clock.cpp (revision 42) @@ -13,21 +13,21 @@ namespace behavioural { - string Interfaces::get_clock (void) + Signal * Interfaces::get_clock (void) { - string clock = ""; + Signal * clock = NULL; if (not _list_interface->empty()) { - list::iterator i = _list_interface->begin(); + list::iterator i = _list_interface->begin(); while (i != _list_interface->end()) { - string str = (*i)->get_clock (); + Signal * sig = (*i)->get_clock (); - if (str != "") + if (sig != NULL) { - if (clock != "") + if (clock != NULL) throw ErrorMorpheo (" : find too many clock."); - clock = str; + clock = sig; } ++i; @@ -35,5 +35,5 @@ } - if (clock == "") + if (clock == NULL) throw ErrorMorpheo (" : no clock find."); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_interface.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_interface.cpp (revision 42) @@ -47,4 +47,9 @@ }; + list* Interfaces::get_interface_list (void) + { + return _list_interface; + }; + }; // end namespace behavioural }; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_reset.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_reset.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_get_reset.cpp (revision 42) @@ -0,0 +1,45 @@ +#ifdef VHDL_TESTBENCH +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Interfaces.h" + + +namespace morpheo { +namespace behavioural { + + Signal * Interfaces::get_reset (void) + { + Signal * reset = NULL; + + if (not _list_interface->empty()) + { + list::iterator i = _list_interface->begin(); + + while (i != _list_interface->end()) + { + Signal * sig = (*i)->get_reset (); + + if (sig != NULL) + { + if (reset != NULL) + throw ErrorMorpheo (" : find too many reset."); + reset = sig; + } + ++i; + } + } + + if (reset == NULL) + throw ErrorMorpheo (" : no reset find."); + + return reset; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_set_interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_set_interface.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_set_interface.cpp (revision 42) @@ -11,9 +11,17 @@ namespace behavioural { - Interface_fifo * Interfaces::set_interface (string name , - direction_t direction , - localisation_t localisation) + Interface_fifo * Interfaces::set_interface (string name +#ifdef POSITION + ,direction_t direction + ,localisation_t localisation +#endif + ) { - Interface_fifo * interface = new Interface_fifo (name, direction, localisation); + Interface_fifo * interface = new Interface_fifo (name +#ifdef POSITION + ,direction + ,localisation +#endif + ); _list_interface->push_back (interface); @@ -22,4 +30,5 @@ }; +#ifdef POSITION Interface_fifo * Interfaces::set_interface (string name , direction_t direction , @@ -33,5 +42,5 @@ return interface; }; - +#endif }; // end namespace behavioural Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_body.cpp (revision 42) @@ -14,5 +14,6 @@ string Interfaces::testbench_body (Vhdl * & vhdl, - string counter_name) + string counter_name, + string reset_name ) { log_printf(FUNC,Behavioural,"testbench_body","Begin"); @@ -28,6 +29,6 @@ while (i != _list_interface->end()) { - (*i)->testbench_body(vhdl, counter_name); - string str = (*i)->testbench_test(vhdl, counter_name); + (*i)->testbench_body(vhdl, counter_name, reset_name); + string str = (*i)->testbench_test(vhdl, counter_name, reset_name); test += " and "+str; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_generate_file.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_testbench_generate_file.cpp (revision 42) @@ -19,14 +19,18 @@ Vhdl * vhdl = new Vhdl(_name+"_Testbench"); string counter = "counter"; - string clock = this->get_clock(); + Signal * clock = this->get_clock(); + Signal * reset = this->get_reset(); + string clock_name = clock->get_name(); + string reset_name = reset->get_name(); uint32_t cycle = this->get_cycle(); - vhdl ->set_signal (counter, "natural", "0"); - vhdl ->set_signal (clock , 1 , 0); // modif Signal_set_signal + vhdl->set_signal (clock_name, 1, 0); + vhdl->set_signal (reset_name, 1, 0); + vhdl->set_signal (counter, "natural"); this->set_signal (vhdl); vhdl->set_body(""); vhdl->set_body("------------------------------------------------------"); - vhdl->set_body("-- Component"); + vhdl->set_body("-- Component - Intanciation"); vhdl->set_body("------------------------------------------------------"); vhdl->set_body(""); @@ -54,30 +58,49 @@ delete list_signal; - vhdl->set_body(""); - vhdl->set_body("------------------------------------------------------"); - vhdl->set_body("-- Port's affectation"); - vhdl->set_body("------------------------------------------------------"); - vhdl->set_body(""); - string test_name = this->testbench_body(vhdl,counter); + string test_name = this->testbench_body(vhdl,counter, reset_name); vhdl->set_body(""); vhdl->set_body("------------------------------------------------------"); - vhdl->set_body("-- process clock"); + vhdl->set_body("-- reset"); vhdl->set_body("------------------------------------------------------"); vhdl->set_body(""); - vhdl->set_body(clock+" <= not "+clock+" after 50 ns;"); + vhdl->set_body("-- if the systemC simulate have multiple reset, we make the last"); + vhdl->set_body(reset_name+" <= '1' after 150 ns;"); + vhdl->set_body(""); - vhdl->set_body("process ("+clock+")"); + vhdl->set_body("------------------------------------------------------"); + vhdl->set_body("-- process clock_name"); + vhdl->set_body("------------------------------------------------------"); + vhdl->set_body(""); + vhdl->set_body(clock_name+" <= not "+clock_name+" after 50 ns;"); + vhdl->set_body(""); + vhdl->set_body("process ("+clock_name+")"); vhdl->set_body("begin"); - vhdl->set_body("\tif "+clock+"'event and "+clock+" = '1' then"); - vhdl->set_body("\t\t"+counter+" <= "+counter+"+1;"); + vhdl->set_body("\tif ("+clock_name+"'event and "+clock_name+" = '1') then"); vhdl->set_body(""); - vhdl->set_body("\t\tassert ("+test_name+" = '1') report \"Test KO\" severity FAILURE;"); - vhdl->set_body("\t\tassert not ("+counter+" = "+toString(cycle)+") report \"Test OK\" severity FAILURE;"); + vhdl->set_body("\t\tif ("+reset_name+" = '0') then"); vhdl->set_body(""); + vhdl->set_body("\t\t\t"+counter+" <= "+toString(reset->get_reset_cycle(true))+";"); + vhdl->set_body(""); + vhdl->set_body("\t\telse"); + vhdl->set_body(""); + vhdl->set_body("\t\t\t"+counter+" <= "+counter+"+1;"); + vhdl->set_body(""); + vhdl->set_body("\t\t\tassert not ("+counter+" = "+toString(cycle)+") report \"Test OK\" severity FAILURE;"); + vhdl->set_body("\t\t\tassert not ("+test_name+" = '0') report \"Test KO\" severity FAILURE;"); + +#ifdef VHDL_TESTBENCH_ASSERT + vhdl->set_body("\t\t\t-- Assert ..."); + for (uint32_t cpt=0; cpt<=cycle; cpt++) + vhdl->set_body("\t\t\tassert not ("+counter+" = "+toString(cpt)+") report \"===== Test number "+toString(cpt)+" =====\" severity NOTE;"); +#endif + + vhdl->set_body(""); + vhdl->set_body("\t\tend if;"); vhdl->set_body("\tend if;"); vhdl->set_body("end process;"); - vhdl->generate_file(); + + vhdl->generate_file(false,true); delete vhdl; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_toXML.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_toXML.cpp (revision 42) @@ -1,2 +1,3 @@ +#ifdef POSITION /* * $Id$ @@ -29,5 +30,4 @@ }; -#ifdef POSITION XML Interfaces::toXML_mapping (void) { @@ -47,5 +47,5 @@ return xml; }; -#endif }; // end namespace behavioural }; // end namespace morpheo +#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position.cpp (revision 41) +++ (revision ) @@ -1,52 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - Position::Position (void) - { - log_printf(FUNC,Behavioural,"Position","Begin"); - _list_component = new list; - log_printf(FUNC,Behavioural,"Position","End"); - }; - - Position::Position (const Position & position) - { - log_printf(FUNC,Behavioural,"Position (copy)","Begin"); - _entity = position._entity ; - _list_component = position._list_component; - log_printf(FUNC,Behavioural,"Position (copy)","End"); - }; - - Position::~Position () - { - log_printf(FUNC,Behavioural,"~Position","Begin"); - delete _entity; - -// if (_list_component->empty()== false) -// { -// list::iterator i = _list_component->begin(); - -// while (i != _list_component->end()) -// { -// delete (*i); -// ++i; -// } -// } - - delete _list_component; - log_printf(FUNC,Behavioural,"~Position","End"); - }; - - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_find_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_find_entity.cpp (revision 41) +++ (revision ) @@ -1,40 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - Entity * Position::find_entity (string name) - { - - if (_entity->_name == name) - return _entity; - else - if (_list_component->empty()== false) - { - list::iterator i = _list_component->begin(); - - while (i != _list_component->end()) - { - if ((*i)->_name == name) - { - return *i; - break; - } - ++i; - } - } - - return NULL; - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_find_interface.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_find_interface.cpp (revision 41) +++ (revision ) @@ -1,22 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - Interface * Position::find_interface (string name , - Entity * entity) - { - return entity->find_interface(name); - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_generate_file.cpp (revision 41) +++ (revision ) @@ -1,33 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - void Position::generate_file (void) - { - try - { - XML xml = toXML(); - - xml.filename_extension ("pos"); - - xml.generate_file("ISO-8859-1"); - - } - catch (ErrorMorpheo e) - { - throw (ErrorMorpheo ("Position \""+_entity->_name+"\" have a bad mapping : "+e.what())); - } - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_get_component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_get_component.cpp (revision 41) +++ (revision ) @@ -1,51 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - string Position::get_component (void) - { - uint32_t depth = 0; - string separator = "\n"; - bool last_separator = false; - - list::iterator i = _list_component->begin(); - bool empty = _list_component->empty(); - - string tab = string(depth,'\t'); - ostringstream text; - - if (not empty) - { - // First - if (i != _list_component->end()) - { - text << tab << **i; - ++i; - } - - while (i != _list_component->end()) - { - text << separator; - text << tab << **i; - ++i; - } - - if (last_separator) - text << separator; - } - - return text.str(); - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_get_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_get_entity.cpp (revision 41) +++ (revision ) @@ -1,23 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - string Position::get_entity (void) - { - ostringstream text; - text << *(_entity); - return text.str(); - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_port_map.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_port_map.cpp (revision 41) +++ (revision ) @@ -1,56 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - void Position::port_map (string component1, - string signal1 , - string component2, - string signal2 ) - { - Entity * entity1 = find_entity(component1); - - if (entity1 == NULL) - throw (ErrorMorpheo ("Position \""+_entity->_name+"\", port map with unknow component \""+component1+"\".")); - - bool is_top_level1 = _entity->_name == component1; - - Interface * interface1 = find_interface (signal1, entity1); - - if (interface1 == NULL) - throw (ErrorMorpheo ("Position \""+_entity->_name+"\", port map with component \""+component1+"\" and a unknow port \""+signal1+"\".")); - - Entity * entity2 = find_entity(component2); - - if (entity2 == NULL) - throw (ErrorMorpheo ("Position \""+_entity->_name+"\", port map with unknow component \""+component2+"\".")); - - bool is_top_level2 = _entity->_name == component2; - - Interface * interface2 = find_interface (signal2, entity2); - - if (interface2 == NULL) - throw (ErrorMorpheo ("Position \""+_entity->_name+"\", port map with component \""+component2+"\" and a unknow port \""+signal2+"\".")); - - // all is ok - if (is_top_level1 == false) - interface1->port_map(static_cast(entity2 ), - static_cast(interface2)); - - if (is_top_level2 == false) - interface2->port_map(static_cast(entity1 ), - static_cast(interface1)); - - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_print.cpp (revision 41) +++ (revision ) @@ -1,25 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - - -namespace morpheo { -namespace behavioural { - - ostream& operator<< (ostream& output_stream, - morpheo::behavioural::Position & x) - { - output_stream << x.get_entity () << endl; - output_stream << x.get_component () << endl; - return output_stream; - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_set_component.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_set_component.cpp (revision 41) +++ (revision ) @@ -1,29 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - void Position::set_component (Position * position, - uint32_t pos_x , - uint32_t pos_y , - uint32_t size_x , - uint32_t size_y ) - { - Entity * entity = position->_entity; - - _list_component->push_back(entity); - - entity->mapping( pos_x, pos_y, size_x, size_y); - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_set_entity.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_set_entity.cpp (revision 41) +++ (revision ) @@ -1,28 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - Entity * Position::set_entity (string name , - string type , - schema_t schema ) - { - Entity * entity = new Entity (name , - type , - schema ); - _entity = entity; - - return entity; - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_toXML.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Position_toXML.cpp (revision 41) +++ (revision ) @@ -1,41 +1,0 @@ -#ifdef POSITION -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Position.h" - -namespace morpheo { -namespace behavioural { - - XML Position::toXML (void) - { - XML xml (_entity->_name); - - xml.balise_open ("description"); - xml. insert_XML (_entity->toXML()); - xml. balise_open ("architecture"); - - if (_list_component->empty()== false) - { - list::iterator i = _list_component->begin(); - - while (i != _list_component->end()) - { - xml.insert_XML ((*i)->toXML_mapping()); - ++i; - } - } - - xml. balise_close (); - xml.balise_close (); - - return xml; - }; - -}; // end namespace behavioural -}; // end namespace morpheo -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp (revision 42) @@ -18,11 +18,15 @@ _direction (direction ), _size (size ), - _presence_port (presence_port) + _presence_port ((direction==INTERNAL)?PORT_VHDL_NO_TESTBENCH_NO:presence_port) { log_printf(FUNC,Behavioural,"Signal","Begin"); + _is_allocate = false; + _is_map = false; + _signal = NULL; + _sc_signal = NULL; + _sc_signal_map = NULL; + _type_info = UNKNOW; #ifdef VHDL_TESTBENCH - _signal = NULL; - _type_info = UNKNOW; - _list_value = new list; + _list_value = new list; #endif log_printf(FUNC,Behavioural,"Signal","End"); @@ -36,7 +40,10 @@ { log_printf(FUNC,Behavioural,"Signal (copy)","Begin"); + _is_allocate= signal._is_allocate; + _is_map = signal._is_map ; + _sc_signal = signal._sc_signal ; + _sc_signal_map = signal._sc_signal_map; + _type_info = signal._type_info ; #ifdef VHDL_TESTBENCH - _signal = signal._signal ; - _type_info = signal._type_info ; _list_value = signal._list_value; #endif @@ -47,4 +54,50 @@ { log_printf(FUNC,Behavioural,"~Signal","Begin"); + +// if (_is_allocate == true) +// switch (_direction) +// { +// case IN : +// { +// switch (_type_info) +// { +// case BOOL : {delete (static_cast *>(_sc_signal)); break;} +// case UINT8_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT16_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT32_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT64_T : {delete (static_cast *>(_sc_signal)); break;} +// default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} +// } +// break; +// } +// case OUT : +// { +// switch (_type_info) +// { +// case BOOL : {delete (static_cast *>(_sc_signal)); break;} +// case UINT8_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT16_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT32_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT64_T : {delete (static_cast *>(_sc_signal)); break;} +// default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} +// } +// break; +// } +// case INTERNAL : +// { +// switch (_type_info) +// { +// case BOOL : {delete (static_cast *>(_sc_signal)); break;} +// case UINT8_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT16_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT32_T : {delete (static_cast *>(_sc_signal)); break;} +// case UINT64_T : {delete (static_cast *>(_sc_signal)); break;} +// default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} +// } +// break; +// } +// default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : direction unknow.")); break;} +// } + #ifdef VHDL_TESTBENCH delete _list_value; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_clock.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_clock.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_clock.cpp (revision 42) @@ -13,11 +13,11 @@ namespace behavioural { - string Signal::get_clock (void) + Signal * Signal::get_clock (void) { if ((_presence_port == CLOCK_VHDL_YES) or (_presence_port == CLOCK_VHDL_NO )) - return _name; + return this; else - return ""; + return NULL; }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name.cpp (revision 42) @@ -0,0 +1,20 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + string Signal::get_name (void) + { + return _name; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name_vhdl.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_name_vhdl.cpp (revision 42) @@ -1,3 +1,3 @@ -#ifdef VHDL_TESTBENCH +# ifdef VHDL_TESTBENCH /* * $Id$ @@ -17,5 +17,6 @@ if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or (_presence_port == PORT_VHDL_YES_TESTBENCH_NO ) or - (_presence_port == CLOCK_VHDL_YES)) + (_presence_port == CLOCK_VHDL_YES) or + (_presence_port == RESET_VHDL_YES)) list_signal->push_back(_name); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset.cpp (revision 42) @@ -0,0 +1,31 @@ +#ifdef VHDL_TESTBENCH +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + Signal * Signal::get_reset (void) + { + if ((_presence_port == RESET_VHDL_YES) or + (_presence_port == RESET_VHDL_NO )) + { + if (_size != 1) + throw ErrorMorpheo (" : size of signal reset is more than one bit."); + + return this; + } + else + return NULL; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset_cycle.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_reset_cycle.cpp (revision 42) @@ -0,0 +1,43 @@ +#ifdef VHDL_TESTBENCH +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + uint32_t Signal::get_reset_cycle (bool active_low) + { + uint32_t num = 0; + uint32_t cpt = 0; + string cmp = (active_low==true)?"0":"1"; + + if ((_presence_port == RESET_VHDL_YES) or + (_presence_port == RESET_VHDL_NO )) + { + if (_list_value->empty()== false) + { + list::iterator i = _list_value->begin(); + + while (i != _list_value->end()) + { + if ((*i) == cmp) + num = cpt; + cpt ++; + ++i; + } + } + } + + return num; + }; + +}; // end namespace behavioural +}; // end namespace morpheo +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_signal_link.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_signal_link.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_signal_link.cpp (revision 42) @@ -0,0 +1,20 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + Signal * Signal::get_signal_link (void) + { + return _signal; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_size.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_size.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_get_size.cpp (revision 42) @@ -0,0 +1,20 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + uint32_t Signal::get_size (void) + { + return _size; + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp (revision 42) @@ -0,0 +1,71 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + void Signal::link (Signal * signal) + { + if ( _is_allocate == false) + throw (ErrorMorpheo ("Signal \""+_name+"\", can't map with signal \""+ get_name()+"\", because it's not already allocate.")); + if (signal->_is_allocate == false) + throw (ErrorMorpheo ("Signal \""+_name+"\", can't map with signal \""+signal->get_name()+"\", because it's not already allocate.")); + + _signal = signal; + + if ((_direction == IN ) and (signal->_direction == IN )) + switch (_type_info) + { + case BOOL : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT8_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT16_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT32_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT64_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} + } + else + if ((_direction == OUT) and (signal->_direction == OUT)) + switch (_type_info) + { + case BOOL : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT8_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT16_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT32_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT64_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} + } + else + if ((_direction == IN ) and (signal->_direction == OUT)) + switch (_type_info) + { + case BOOL : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT8_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT16_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT32_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT64_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} + } + else + if ((_direction == OUT) and (signal->_direction == IN )) + switch (_type_info) + { + case BOOL : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT8_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT16_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT32_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + case UINT64_T : {(*(static_cast *>(_sc_signal))) (*(static_cast *>(signal->_sc_signal))); break;} + default : {throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.")); break;} + } + else + throw (ErrorMorpheo ("Signal \""+_name+"\" : unsupported direction to link.")); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_mapping.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_mapping.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_mapping.cpp (revision 42) @@ -0,0 +1,34 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + void Signal::mapping (Signal * signal) + { + if (_is_map == true) + throw (ErrorMorpheo ("Signal \""+_name+"\", can't map, because it's already map.")); + + if (signal->_is_allocate == false) + throw (ErrorMorpheo ("Signal \""+_name+"\", can't map with signal \""+signal->get_name()+"\", because it's not already allocate.")); + + if (_direction == OUT) + { + // This output is mapped + _is_map = true; + + if (signal->_direction == OUT) + _sc_signal_map = signal->_sc_signal_map; + } + + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_testbench.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_testbench.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_testbench.cpp (revision 42) @@ -0,0 +1,23 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + bool Signal::presence_vhdl (void) + { + return ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or + (_presence_port == PORT_VHDL_NO_TESTBENCH_YES ) or + (_presence_port == CLOCK_VHDL_YES ) or + (_presence_port == RESET_VHDL_YES ) ); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_vhdl.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_vhdl.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_presence_vhdl.cpp (revision 42) @@ -0,0 +1,23 @@ +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Signal.h" + + +namespace morpheo { +namespace behavioural { + + bool Signal::presence_vhdl (void) + { + return ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or + (_presence_port == PORT_VHDL_YES_TESTBENCH_NO ) or + (_presence_port == CLOCK_VHDL_YES ) or + (_presence_port == RESET_VHDL_YES ) ); + }; + +}; // end namespace behavioural +}; // end namespace morpheo Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_print.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_print.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_print.cpp (revision 42) @@ -21,17 +21,4 @@ << toString(x._presence_port); -// #ifdef VHDL_TESTBENCH -// if (x._list_value->empty()== false) -// { -// list::iterator i = x._list_value->begin(); - -// while (i != x._list_value->end()) -// { -// output_stream << "\n\t" << *i ; -// ++i; -// } -// } -// #endif - log_printf(FUNC,Behavioural,"operator<<","End"); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_set_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_set_port.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_set_port.cpp (revision 42) @@ -19,5 +19,6 @@ if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or (_presence_port == PORT_VHDL_YES_TESTBENCH_NO ) or - (_presence_port == CLOCK_VHDL_YES)) + (_presence_port == CLOCK_VHDL_YES) or + (_presence_port == RESET_VHDL_YES)) vhdl->set_port (_name,_direction,_size); @@ -30,8 +31,10 @@ log_printf(FUNC,Behavioural,"set_signal (Vhdl)","Begin"); - if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or - (_presence_port == PORT_VHDL_NO_TESTBENCH_YES )// or -// (_presence_port == CLOCK_VHDL_YES) or -// (_presence_port == CLOCK_VHDL_NO ) + if ( (_presence_port == PORT_VHDL_YES_TESTBENCH_YES) + or (_presence_port == PORT_VHDL_NO_TESTBENCH_YES ) +// or (_presence_port == CLOCK_VHDL_YES) +// or (_presence_port == CLOCK_VHDL_NO ) +// or (_presence_port == RESET_VHDL_YES) +// or (_presence_port == RESET_VHDL_NO ) ) vhdl->set_signal (_name ,_size); Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench.cpp (revision 42) @@ -18,5 +18,7 @@ if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or - (_presence_port == PORT_VHDL_NO_TESTBENCH_YES )) + (_presence_port == PORT_VHDL_NO_TESTBENCH_YES ) or + (_presence_port == RESET_VHDL_YES ) or + (_presence_port == RESET_VHDL_NO ) ) { string str; @@ -32,5 +34,5 @@ case IN : {str = toBase2 (value); break;} case OUT : {str = toBase2 (value); break;} -// case INOUT : {break;} + default : {break;} } break; @@ -44,5 +46,5 @@ case IN : {str = toBase2 (value,_size); break;} case OUT : {str = toBase2 (value,_size); break;} -// case INOUT : {break;} + default : {break;} } break; @@ -56,5 +58,5 @@ case IN : {str = toBase2 (value,_size); break;} case OUT : {str = toBase2 (value,_size); break;} -// case INOUT : {break;} + default : {break;} } break; @@ -68,5 +70,5 @@ case IN : {str = toBase2 (value,_size); break;} case OUT : {str = toBase2 (value,_size); break;} -// case INOUT : {break;} + default : {break;} } break; @@ -80,5 +82,5 @@ case IN : {str = toBase2 (value,_size); break;} case OUT : {str = toBase2 (value,_size); break;} -// case INOUT : {break;} + default : {break;} } break; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_body.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_body.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_body.cpp (revision 42) @@ -13,39 +13,45 @@ void Signal::testbench_body (Vhdl * & vhdl, - string counter_name) + string counter_name, + string reset_name ) { log_printf(FUNC,Behavioural,"testbench_body","Begin"); // _list_value is empty if we don't trace - if (_list_value->empty()== false) - { - string separator; - if (_size == 1) - separator = "\'"; - else - separator = "\""; - string signame = (_direction==OUT)?(_name+"_test"):_name; - - vhdl->set_body (""); - vhdl->set_body ("with "+counter_name+" select"); - vhdl->set_body ("\t"+signame+" <="); - - uint32_t cpt = 0; - list::iterator i = _list_value->begin(); - - while (i != _list_value->end()) - { - list::iterator j = i; - - ++i; - - if (i != _list_value->end()) + if ((_presence_port == PORT_VHDL_YES_TESTBENCH_YES) or + (_presence_port == PORT_VHDL_NO_TESTBENCH_YES )) + if (_list_value->empty()== false) + { + string separator; + if (_size == 1) + separator = "\'"; + else + separator = "\""; + + string signame = (_direction==OUT)?(_name+"_test"):_name; + + vhdl->set_body (""); + vhdl->set_body ("with "+counter_name+" select"); + vhdl->set_body ("\t"+signame+" <="); + + uint32_t cpt = 0; + list::iterator i = _list_value->begin(); + + while (i != _list_value->end()) + { + list::iterator j = i; + + ++i; + vhdl->set_body ("\t"+separator+*j+separator+" when "+toString(cpt++)+","); - else - vhdl->set_body ("\t"+separator+*j+separator+" when others;"); - } - } - + } + + if (_size == 1) + vhdl->set_body ("\t'0' when others;"); + else + vhdl->set_body ("\t(others => '0') when others;"); + } + log_printf(FUNC,Behavioural,"testbench_body","End"); }; Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_test_ok.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_test_ok.cpp (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_testbench_test_ok.cpp (revision 42) @@ -18,5 +18,5 @@ if (_direction == OUT) - vhdl->set_body ("and "+_name+" = "+_name+"_test"); + vhdl->set_body ("\tand "+_name+" = "+_name+"_test"); log_printf(FUNC,Behavioural,"testbench_test_ok","End"); Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench.cpp (revision 41) +++ (revision ) @@ -1,37 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -namespace morpheo { -namespace behavioural { - -// Vhdl_Testbench::Vhdl_Testbench (string name , -// bool exhaustive ): -// _name (name ), -// _exhaustive (exhaustive ) -// { -// _vhdl = new Vhdl (_name + "_Testbench"); - -// _size_input = 0; -// _size_output = 0; - -// _num_cycle = 0; -// }; - -// Vhdl_Testbench::~Vhdl_Testbench () -// { -// delete _vhdl; -// }; - - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_input.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_input.cpp (revision 41) +++ (revision ) @@ -1,27 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::add_input (uint32_t value) -// { -// _list_input_cycle.push_front(toBase2(value,*_num_input)); -// _num_input++; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_label.cpp (revision 41) +++ (revision ) @@ -1,26 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::add_label (string label) -// { -// _list_label.push_back(label_t(_num_cycle,label)); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_output.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_output.cpp (revision 41) +++ (revision ) @@ -1,27 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::add_output (uint32_t value) -// { -// _list_output_cycle.push_front(toBase2(value,*_num_output)); -// _num_output ++; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_add_test.cpp (revision 41) +++ (revision ) @@ -1,26 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::add_test (bool must_test) -// { -// _list_test.push_back(must_test); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_file.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_file.cpp (revision 41) +++ (revision ) @@ -1,49 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" -#include "Include/ErrorMorpheo.h" - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::generate_file (void) -// { -// _vhdl->set_library_work (_name + "_Pack"); - -// if (_size_input == 0) -// throw (ErrorMorpheo ("No input for the test bench.")); -// if (_size_output == 0) -// throw (ErrorMorpheo ("No output for the test bench.")); - -// // Only 2 signals and a variable -// _vhdl->set_signal ("testbench_input" ,std_logic(_size_input )); -// _vhdl->set_signal ("testbench_output" ,std_logic(_size_output)); -// _vhdl->set_signal ("testbench_test" ,std_logic(_size_output)); -// _vhdl->set_signal ("testbench_must_test" ,std_logic(1)); -// _vhdl->set_signal ("testbench_counter" ,"natural","0"); - -// uint32_t counter = get_input (); -// get_output (); -// get_test (); -// get_label (); - -// // if (counter == get_output ()) -// // throw (ErrorMorpheo ("The number of input is different of number of output.")); - -// generate_instance (); -// generate_process_clock (counter); - -// _vhdl->generate_file(false, true); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_instance.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_instance.cpp (revision 41) +++ (revision ) @@ -1,38 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::generate_instance (void) -// { -// _vhdl->set_body(""); -// _vhdl->set_body("instance_"+_name+" : "+_name); -// _vhdl->set_body("port map ("); - -// list::iterator i = _list_port.begin(); -// if (i != _list_port.end()) -// { -// _vhdl->set_body("\t "+*i+"\t=>\t"+*i); -// ++i; -// } -// while (i != _list_port.end()) -// { -// _vhdl->set_body("\t,"+*i+"\t=>\t"+*i); -// ++i; -// } -// _vhdl->set_body(" );"); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_process_clock.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_generate_process_clock.cpp (revision 41) +++ (revision ) @@ -1,50 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::generate_process_clock (uint32_t counter) -// { -// _vhdl->set_body(""); -// _vhdl->set_body(_clock_name+" <= not "+_clock_name+" after 50 ns;"); -// _vhdl->set_body("testbench_counter <= testbench_counter+1 after 100 ns;"); -// _vhdl->set_body(""); - -// _vhdl->set_body("process ("+_clock_name+")"); -// _vhdl->set_body("begin"); -// _vhdl->set_body("\tif "+_clock_name+"'event and "+_clock_name+" = '1' then"); -// _vhdl->set_body(""); -// _vhdl->set_body("\t\tassert (not ((testbench_must_test = '1') and not (testbench_test = testbench_output)))"); -// _vhdl->set_body("\t\treport \" Test KO - output's test is different of output's component\""); -// _vhdl->set_body("\t\tseverity FAILURE;"); -// _vhdl->set_body(""); -// _vhdl->set_body("\t\tassert (not ((testbench_must_test = '1') and (testbench_test = testbench_output)))"); -// _vhdl->set_body("\t\treport \" Test OK\""); -// _vhdl->set_body("\t\tseverity NOTE;"); -// _vhdl->set_body(""); -// _vhdl->set_body("\t\tassert (not ( testbench_must_test = '0'))"); -// _vhdl->set_body("\t\treport \"No Test\""); -// _vhdl->set_body("\t\tseverity NOTE;"); -// _vhdl->set_body(""); -// _vhdl->set_body("\tend if;"); -// _vhdl->set_body("end process;"); - -// _vhdl->set_body(""); -// _vhdl->set_body("assert (not (testbench_counter = " + toString(counter)+"))"); -// _vhdl->set_body("report \"End of Simulation\""); -// _vhdl->set_body("severity FAILURE;"); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_input.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_input.cpp (revision 41) +++ (revision ) @@ -1,48 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// uint32_t Vhdl_Testbench::get_input (void) -// { -// list::iterator i = _list_input.begin(); - -// uint32_t counter = 0; - -// if (i != _list_input.end()) -// { -// _vhdl->set_body (""); -// _vhdl->set_body ("with testbench_counter select"); -// _vhdl->set_body ("\ttestbench_input <="); - -// while (i != _list_input.end()) -// { -// list::iterator j = i; -// ++i; - -// if (i != _list_input.end()) -// _vhdl->set_body ("\t\""+*j+"\" when "+toString(counter++)+","); -// else -// _vhdl->set_body ("\t\""+*j+"\" when others;"); -// } -// } - -// return counter; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_label.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_label.cpp (revision 41) +++ (revision ) @@ -1,32 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::get_label (void) -// { -// for (list::iterator i = _list_label.begin(); i != _list_label.end(); i++) -// { -// _vhdl->set_body(""); -// _vhdl->set_body("assert (not (testbench_counter = " + toString(i->_cycle)+"))"); -// _vhdl->set_body("report \"***** "+i->_label+" *****\""); -// _vhdl->set_body("severity NOTE;"); -// } -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_output.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_output.cpp (revision 41) +++ (revision ) @@ -1,48 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// uint32_t Vhdl_Testbench::get_output (void) -// { -// list::iterator i = _list_output.begin(); - -// uint32_t counter = 0; - -// if (i != _list_output.end()) -// { -// _vhdl->set_body (""); -// _vhdl->set_body ("with testbench_counter select"); -// _vhdl->set_body ("\ttestbench_test <="); - -// while (i != _list_output.end()) -// { -// list::iterator j = i; -// ++i; - -// if (i != _list_output.end()) -// _vhdl->set_body ("\t\""+*j+"\" when "+toString(counter++)+","); -// else -// _vhdl->set_body ("\t\""+*j+"\" when others;"); -// } -// } - -// return counter; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_test.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_get_test.cpp (revision 41) +++ (revision ) @@ -1,50 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// uint32_t Vhdl_Testbench::get_test (void) -// { -// list::iterator i = _list_test.begin(); - -// uint32_t counter = 0; - -// if (i != _list_test.end()) -// { -// _vhdl->set_body (""); -// _vhdl->set_body ("with testbench_counter select"); -// _vhdl->set_body ("\ttestbench_must_test <="); - -// while (i != _list_test.end()) -// { -// list::iterator j = i; -// ++i; - -// string str = (*j==true)?"1":"0"; - -// if (i != _list_test.end()) -// _vhdl->set_body ("\t'"+str+"' when "+toString(counter++)+","); -// else -// _vhdl->set_body ("\t'"+str+"' when others;"); -// } -// } - -// return counter; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_new_cycle.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_new_cycle.cpp (revision 41) +++ (revision ) @@ -1,32 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::new_cycle (void) -// { -// set_input(); -// set_output(); - -// _num_input = _list_input_size .begin(); -// _num_output = _list_output_size.begin(); - -// _num_cycle ++; -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_clock.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_clock.cpp (revision 41) +++ (revision ) @@ -1,34 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * must be call after all add port - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::set_clock (string name, -// bool model_have_clock) -// { -// _clock_name = name; -// _vhdl->set_signal (name,std_logic(1),"'0'"); - -// if (model_have_clock == true) -// _list_port.push_back(name); - -// _num_input = _list_input_size .begin(); -// _num_output = _list_output_size.begin(); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_input.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_input.cpp (revision 41) +++ (revision ) @@ -1,35 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::set_input (void) -// { -// string text = ""; - -// while (_list_input_cycle.empty() == false) -// { -// text += _list_input_cycle.front(); - -// _list_input_cycle.pop_front(); -// } - -// _list_input.push_back(text); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_output.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_output.cpp (revision 41) +++ (revision ) @@ -1,35 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::set_output (void) -// { -// string text = ""; - -// while (_list_output_cycle.empty() == false) -// { -// text += _list_output_cycle.front(); - -// _list_output_cycle.pop_front(); -// } - -// _list_output.push_back(text); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: unk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_port.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_Testbench_set_port.cpp (revision 41) +++ (revision ) @@ -1,53 +1,0 @@ -#ifdef VHDL_TESTBENCH - -/* - * $Id$ - * - * [ Description ] - * - */ - -#include "Behavioural/include/Vhdl_Testbench.h" - -#include -using namespace std; - -namespace morpheo { -namespace behavioural { - -// void Vhdl_Testbench::set_port (string name , -// direction_t direction, -// uint32_t size ) -// { -// string name2; -// uint32_t size_old; -// if (direction == IN) -// { -// _list_input_size.push_back(size); -// size_old = _size_input; -// _size_input += size; -// name2 = "testbench_input"; -// } -// else -// { -// _list_output_size.push_back(size); -// size_old = _size_output; -// _size_output += size; -// name2 = "testbench_output"; -// } - -// string range; -// if (size == 1) -// range = "("+toString(size_old)+")"; -// else -// range = "("+toString(size_old+size-1)+" downto "+toString(size_old)+")"; - -// _vhdl->set_alias (name, std_logic(size), name2, range); - -// _list_port.push_back(name); -// }; - -}; // end namespace behavioural -}; // end namespace morpheo - -#endif Index: /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_direction_toString.cpp =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_direction_toString.cpp (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_direction_toString.cpp (revision 42) @@ -0,0 +1,31 @@ +#ifdef VHDL + +/* + * $Id$ + * + * [ Description ] + * + */ + +#include "Behavioural/include/Vhdl.h" + +#include +using namespace std; + +namespace morpheo { +namespace behavioural { + + string Vhdl::direction_toString (direction_t direction) + { + switch (direction) + { + case IN : return "in "; break; + case OUT : return "out "; break; + default : return " "; break; + } + }; + +}; // end namespace behavioural +}; // end namespace morpheo + +#endif Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/document-cache-specification/fr/root.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/document-cache-specification/fr/root.tex (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Documents/document-cache-specification/fr/root.tex (revision 42) @@ -0,0 +1,313 @@ +\Section{Introduction - Motivation} +Les processeurs haute performance lancent plusieurs instructions, de manières non ordonnées et spéculativement. Un défaut de cache ne doit pas bloquer le processeur. Le cache doit pouvoir accepter des requêtes pendant le traitement d'un MISS. Il s'agit du concept de cache non bloquant. + +\subSection{Paramètres nécessaires} +\subsubSection{Paramètres interne du cache} +\begin{itemize} +\item Taille du mot +\item Nombre de lignes par mot +\item Nombre de lignes +\item Associativité +\item Nombre d'interface +\item Taille des files internes +\end{itemize} + +\subsubSection{Paramètres de l'interface cache / processeur} +\begin{itemize} +\item Nombre de bits composant une donnée +\item Nombre de bits composant une adresse +\item Nombre de bits composant l'identifiant du propriétaire +\item Nombre de bits composant l'identifiant de transaction +\end{itemize} + +\subSection{Spécification} +\begin{itemize} +\item Write through +\item Write no allocate +\item Les requêtes envoyé par le processeur ne garantisse pas le stricte ordre séquentielle du programme. +\item Associatif : 1, N, Totalement +\end{itemize} + +\Section{Vue d'ensemble - Modèle simplifié} + +\printgraphonly{CACHE_overview_save}{.8} + +Dans un premier temps, nous allons montrer un modèle qui satisfait les cas de requêtes courantes : read hit, write hit, read miss et write miss, sur des adresses non conflictuelles. + +Afin de réaliser un cache non bloquant, nous avons séparé l'interface des requêtes de l'interface des réponses. Pour cela, 4 automates gèrent les interfaces et la gestion des ressources. La micro-architecture du cache ce décompose comme suit : +\begin{itemize} +\item Quatre automates : + \begin{description} + \item[FSM\_DCACHE\_REQ :] Cet automate gère la consommation des requêtes provenant du cache et, suivant le type d'accès et la réussite de l'accès, l'écriture dans les blocs QUEUE\_REQ et QUEUE\_READ\_HIT + \item[FSM\_DCACHE\_RSP :] L'automate gère la consommation de réponses contenue dans la QUEUE\_RSP et s'occupe d'écrire les lignes chargés dans le cache. + \item[FSM\_VCI\_REQ :] L'automate s'occupe de consommer une requête contenue dans la QUEUE\_REQ (si la file n'est pas vide) et la lance sur l'interface VCI\_REQ (si l'interface n'est pas occupée). + \item[FSM\_VCI\_RSP :] L'automate s'occupe de consommer des réponses sur l'interface VCI\_RSP (si l'interface n'est pas occupée) et l'écrit dans  la file QUEUE\_RSP (si la file n'est pas pleine). + \end{description} +\item Trois files d'attentes : + \begin{description} + \item[QUEUE\_READ\_HIT :] Cette file d'attente s'occupe de transmettre le plus tôt possible les requêtes de lectures ayant fait un HIT. + \item[QUEUE\_REQ :] Cette file est utilisée comme tampon d'écriture et de requête de lecture ayant fait un miss. Elle attende leur envoie à la mémoire. + \item[QUEUE\_RSP :] La file est utilisée comme tampon pour les réponses provenant de la mémoire. + \end{description} +\item Trois blocs mémoires : + \begin{description} + \item[RAM\_TAG :] Contient les informations pouvant identifier les adresses contenues dans cette ligne de cache. + \item[RAM\_DATA :] Contient les données de la ligne de cache. + \item[RAM\_INFO :] Contient les informations relative aux requêtes pendantes. + \end{description} +\end{itemize} + +\subSection{Acheminement des requêtes} +Dans cette section, nous allons voir l'acheminement d'une requête suivant son type. + +\begin{description} +\item[Read - Hit :] La requête accède en parralèle aux RAM\_TAG et au RAM\_DATA. La donnée lu est écrite dans la RAM\_INFO, alors que le pointeur vers RAM\_INFO est sauvegardé dans la QUEUE\_READ\_HIT. Ensuite la requête attendra d'être sélectionnée par l'automate FSM\_DCACHE\_RSP, puis va lire les informations à partir de la RAM\_INFO et sera acheminée vers le port de réponse. +\item[Read - Miss :] La requête de lecture réalisant un miss, écrit les informations concernant la requête dans la RAM\_INFO. Le pointeur de RAM\_INFO sera écrit dans la QUEUE\_REQ. L'automate FSM\_VCI\_REQ va envoyer la requête sur le réseau VCI. La réponse reviendra par l'intermédiaire de l'automate FSM\_VCI\_RSP qui enregistre la ligne de cache en cours d'arrivée dans un tampon. Dès la réception de la fin de paquet, le tampon est enregistré dans la QUEUE\_RSP. L'identifiant de requête vci sera un index vers RAM\_INFO, c'est pour cela que lorsque l'automate FSM\_DCACHE\_REQ récupère une réponse dans la QUEUE\_RSP, elle peut retrouver les informations de la requêtes dans RAM\_INFO. +\item[Write - Hit :] Un write hit est équivalent à un read-miss : lors de la requête les informations sont stockées dans la RAM\_INFO (ainsi que la donnée à écrire). Lors de la réponse, (à la différence d'un read-miss, il n'y a pas de retour de ligne) la donnée à écrire va l'être dans le bloc RAM\_DATA. +\item[Write - Miss :] Un échec d'écriture est équivalent à une réussite d'écriture mais sans mise à jour du cache. +\item[Lock et Prefetch :] Ce cache n'implémentant ces fonctionnalités et étant le dernier niveau de cache avant l'accès à l'interconnect, alors ces requêtes sont traitées comme étant des Read Hit (sans lecture du cache) +\item[Invalidate :] Ce cache étant le dernier niveau de cache avant l'accès à l'interconnect, il est transmis à l'interface des réponses au travers de la QUEUE\_READ\_HIT. Lors de la lecture de cette file, on va accéder au cache et mettre le bit valid de la ligne à 0 +\item[Flush :] Le cache étant un cache write through, il y a une cohérence entre le contenu du cache et le contenu de la mémoire. L'effet de cette commande est identique à une commande Invalidate. +\end{description} +Une petite remarque concernant le Write-Hit : + + Quel automate doit gérer la mise à jour du cache : FSM\_DCACHE\_REQ ou FSM\_DCACHE\_RSP? Le premier à l'avantage de rendre la modification de la ligne visible rapidement pour les autres requêtes. Or il faudra soit rajouter un nouveau port d'écriture aux bancs RAM\_TAG et RAM\_DATA, soit synchroniser les automates afin de partager le port d'écriture. Le deuxième cas à pour avantage de n'avoir qu'un seul port d'écriture. + +Nous optons pour la deuxième solution. Ce choix est également motiver pour uniformiser les solutions proposées pour les problèmes de consistances mémoires. + +\Section{Quelques problèmes du modèle simplifié} +Dans cette section, nous allons voir quelques problèmes fonctionnelle du modèle de base et nous allons présenter des solutions. + +\subSection{Requêtes multiples d'échec de lectures} +Supposons le cas où le processeur réalise une suite d'accès en lecture sur des adresses consécutives en mémoire. Par exemple le processeur demande l'adresse 0x100, 0x104, 0x108, 0x10C pour une taille de ligne de 4 mots et un nombre de ligne de 8 lignes. Si la première requête de lecture fait un miss, alors les 3 autres requêtes vont également échouer. + +Il y aura dans ce cas deux problèmes. Le premier étant l'émission, par le cache, de 4 demandes de lignes, alors qu'une seule requête est vraiment utile. Ce n'est pas un problème en soit, mais ceci nous amène au deuxième problème : si le cache n'est pas direct-map, dans ce cas les 4 lignes identiques vont être logées à plusieurs endroit dans le cache. +\begin{itemize} +\item {\it Le premier problème est causé par la non sauvegarde par le cache de l'historique des requêtes. } +\item {\it Le deuxième problème est causé par le non accès à la RAM\_TAG, au moment des réponses. } +\end{itemize} + +Il y a trois solutions pour remédier à ces problèmes : +\begin{enumerate} +\item Ajouter un port de lecture au TAG. Quand les réponses arrivent, il faut tester si la requête de lecture fait toujours un miss. Si ce n'est plus le cas, alors aucune mise à jour de cache sera effectué. + \begin{description} + \item[+ :] coût minimum si on implémente le banc de registre TAG par un banc de registres multi-bancs (mais synchronisation entre les automates FSM\_DCACHE\_REQ et FSM\_DCACHE\_RSP). + \item[- :] accès lecture de mémoire inutile, coût des miss plus long + \end{description} +\item Empêcher ce cas d'arriver en faisant l'allocation de la ligne lors de la requête. Pour cela, nous allons ajouter un bit dans le TAG : "valid\_data", ce bit est mis à 0 lors d'une requête et positionné à 1 lors de la réponse. On accepte une requête si (valid\_data = 1). + \begin{description} + \item[+ :] pas de duplication des requêtes inutile. + \item[- :] coûte 1 bit par ligne de cache, suppression d'une ligne de cache alors qu'elle pouvait encore être utile. Si la requête n'est pas accepté, le processeur peut croire que le cache est bloqué et dans ce cas, maintient la requête. + \end{description} +\item Empêcher ce cas d'arriver en verrouillant les index. Pour chaque index, on rajoute un bit de lock. Ce bit est positionné à 0 lors d'une requête qui fait MISS et remit à 1 lors de la réponse. On accepte une requête qui fait miss si lock[index] = 0 + \begin{description} + \item[+ :] pas de duplication des requêtes, par rapport à la solution précédente, on a pas supprimé une ligne encore utile. + \item[- :] coûte 1 bit par index. Avec l'augmentation de l'associativité, on va diminué le coût mais augmenter le nombre de ligne verrouiller. + \end{description} +\end{enumerate} + +Pour les deux dernières solutions, nous pouvons faire deux remarques : +\begin{itemize} +\item Au lieu de refuser les requêtes qui ne satisfont pas les conditions, nous pouvons les accepter et les indiquer comme "uncached". Ceci aura pour effet de ne pas mettre à jour le cache, d'accepter les requêtes et donc d'avoir les réponses rapidement (car lors d'un accès non caché, nous n'avons pas besoin de chercher une ligne entière). +\item DCACHE.REQ\_ACK ne dépend plus que de l'état des FIFOs (donc disponible au début d'un cycle) mais également des requêtes entrantes (qui sont disponible en fin de cycle). Pour couper cette chaîne critique, nous pouvons pipeliner les accès au port de requêtes. Pour plus d'information, voir la section \ref{pipeline} +\end{itemize} + +La différence principales entre les deux dernières solutions porte sur le nombre de ligne verrouiller. Donc sur le coût du vérrouillage mais engendre des pertes de performances lors d'un cache fortement associatif. De plus, la solution de verrouiller l'index n'oblige pas de faire l'allocation de la ligne de cache lors de la requête. Car la totalité de l'index est verrouillé, alors il ne peut avoir aucune miss. + +\subSection{Évincement précoce de ligne } + +Dans le cas d'un write HIT, lors de la requête, on détermine le numéro de ligne, et le numéro de banc où la donnée doit être écrite. L'écriture effective se fait lors de la réponse. La ligne cible peut pendant ce temps être évincer par une autre réponse (un Read MISS par exemple). +Les solutions apportés par ce problème sont presque les mêmes que pour le problème précèdent : +\begin{enumerate} +\item Ajouter un port d'écriture. Dans ce cas, l'écriture effective se fait lors de la requête. +\item Verrouillage des lignes : ceci va empêcher l'évincement de la ligne concerné par l'écriture. +\item Verrouillage des index : ceci va empêcher les évincements des lignes de cache. +\end{enumerate} + +\subSection{Gestion de la Cohérence et Consistance mémoire} + +Le système mémoire doit assurer la cohérence mémoire (détermine quelle valeur est renvoyé par une lecture) et la consistance mémoire (détermine quand une valeur écrite sera récupérée par une lecture). + +Les problèmes de cohérence mémoire ne survienne que dans le cas d'un environnement multiprocesseur ou avec des périphériques d'entrée/sortie. Nous n'aborderons pas ici les solutions matériels pour résoudre ce problème. Le problème pouvant être résolue de manière logicielle en effectuant la séquence suivante présenté dans le graphe \ref{CACHE_coherence_memoire} + +\printgraphonly{CACHE_coherence_memoire}{.8} + +Nous allons principalement nous intéresser aux problèmes de consistance mémoire. +Le problème est le suivant : le cache lance deux requêtes, une lecture et une écriture. Ces requêtes ciblent le même bloc mémoire. L'interconnect qui relie le cache au bloc mémoire ne garantie pas l'ordre des requêtes. (La norme VCI n'impose pas d'interconnect qui délivre les messages dans l'ordre). La lecture et l'écriture entre en compétition pour l'accès à la zone mémoire, et peuvent accéder à la zone mémoire dans un ordre différent que dans l'ordre d'émission + +Ce problème est amplifié par le fait qu'une demande de lecture va lire une ligne de cache entière, donc il y a également des dépendances si les deux adresses  sont dans la même ligne de cache et que l'un des deux accès est une lecture. + +Il y a 4 types de dépendances : +\begin{description} +\item[RaR (Read after Read) :] Il s'agit de deux lectures successives vers la même ligne de cache. +\item[WaW (Write after Write) :] Il s'agit de deux écritures successives vers la même adresse. +\item[WaR (Write after Read) :] Il s'agit d'une lecture suivit d'une écriture vers la même ligne de cache. +\item[RaW (Read after Write) :] Il s'agit d'une écriture suivit d'une lecture vers la même ligne de cache. +\end{description} + +En reprenant les 4 types de dépendances, nous allons voir comment ces dépendances sont gérées : +\begin{itemize} +\item Dans le cadre d'une dépendance RaR, le seul problème provoqué est le lancement de requête multiple de lecture faisant des miss. (voir la section concerné). +\item Du point de vue du processeur, dans le cadre d'exception précise, une écriture n'a le droit de modifier le contexte visible du programmeur que si les instructions avant l'écriture sont terminée. Dans ce cas, les dépendances WaR sont gérées par le processeur. +\item Les dépendances WaW peuvent être implicitement géré par le processeur si les writes sont bloquants (donc attendent une réponse du cache). Les performances sont alors fortement dégradées car un write aura le même coût qu'un read faisant un MISS dans tous les niveaux de la hiérarchie mémoire. Nous pouvons tout de même noter qu'un write bloquant permet d'avoir une exception précise. +\item Les dépendances RaW sont moins triviale : le cpu peut vérifier les cas de RaW sur la même adresse et bypasser l'accès au cache. Or comme les lectures lisent une ligne de cache entière, deux adresses peuvent être différentes mais cibler la même ligne de cache. +\end{itemize} + +Pour gérer ces différents problèmes, il y a deux solutions : +\begin{enumerate} +\item Gestion par le CPU : les écritures demandent des acquittement une fois que la mémoire à été mise à jour. Dans ce cas à tous moment le processeur peut savoir si une écriture est en cours d'éxècution. Les lectures peuvent être lancées s'il n'y a pas de dépendances au niveau ligne avec des écritures. De même entre deux lectures et écritures. Malheureusement cette méthode à la mauvaise propriété de saturer l'unité de mémoire avec des écritures lancées mais attendant leur écriture en mémoire. Ce problème de latence peut être diminué si l'acquittement des écritures se fait jusqu'au premier niveau de cache qui intègre des mécanismes de consistance mémoire. +\item Gestion par le Cache : les problèmes d'évincement précoce de ligne de cache sont du à des lectures qui évincent une ligne qui aurait du contenir le résultat d'une écriture. C'est donc une dépendance RaW car les deux adresses ont les même index. Donc nous pouvons réutiliser la solution pour les problèmes de consistance mémoire. La solution proposée içi reprend celle proposée pour les deux problèmes analysés aux sections précédentes : +\end{enumerate} + +\begin{tabular}{l|ll} +Cas & Action lors d'une requête du processeur & Action lors d'une réponse du bus \\ +\hline +Read Hit & Lecture de la donnée & Aucune réponse attendue \\ + & Pas de requête envoyée au bus & \\ +Read Miss & Allocation d'une ligne de cache & Écriture de la ligne et déverrouillage \\ + & Verrouillage & \\ +Write Hit & Verrouillage de la ligne de cache & Écriture de la ligne et déverrouillage \\ +Write Miss & Allocation d'une ligne de cache & Invalidation de la ligne (write no-allocate)\\ + & Verrouillage & \\ +\end{tabular} + +Dans la deuxième solution, aucune requête provenant du processeur n'est accepté si elle concerne une ligne de cache verrouillée. + +\subSection{Multi-Contexte } +Ce cache non bloquant doit pouvoir être utilisé dans un environnement multi-contexte (exécution en parallèle de plusieurs threads). L'implication du multi-contexte ne va pas modifier le comportement du cache (Car ce cache est physiquement indéxé et tagué). + +Le cache est optimisé pour utiliser les propriétés de localité spatiale et temporelle d'un programme. Avec le multi-contexte, le cache va être soumit à plusieurs flot qui ne sont pas dépendant entre eux. Ceci va entraîner des évincements de lignes en faveur d'un contexte, alors que la ligne victime pouvait être utilisée par un autre contexte. De plus, ceci va augmenter le phénomène décrit dans la section "Évincement précoce de ligne" : des écritures non encore finalisées vont voir leur lignes cibles évincées. + +\Section{Vue d'ensemble - Modèle complet} +Cette section à pour but de montrer les modifications par rapport au modèle de base. + +\printgraphonly{CACHE_overview}{.8} + +\subSection{Solution retenue} + +Nous allons maintenant modifier le modèle de base en vue d'intégrer la solution retenue. La solution consiste en l'implémentation des deux principaux mécanismes vut précédemment : l'allocation précoce de victime et le verrouillage de lignes. Ces solutions ont l'avantage de garder les structures déjà présente dual-port, et de régler simplement les problèmes de consistance mémoire. + +Pour cela, nous ajoutons un banc de registre, RAM\_LOCK, qui contiendra 3 bits par ligne : +\begin{itemize} +\item Valid : qui est le bit valid anciennement contenu dans la RAM\_TAG. +\item Lock\_by\_read : indique si une lecture est actuellement pendante. +\item Lock\_by\_write : indique si une écriture est actuellement pendante. +\end{itemize} + +Détaillons les différentes actions : + +\printgraphonly{CACHE_protocole}{.6} + +Le choix de la victime est réalisé lors de l'émission de la requête. Un read hit vérifie si une requête de lecture est en cours sur cette même ligne de cache. Si c'est le cas, alors la requête sera non cachée (donc ne mettra pas à jour le cache). +Dans le cas d'un write hit ou d'un read miss, la ligne de cache correspondant va être verrouillée. Il est à noter que dans le cas d'un write qui fait miss, le cache va allouer une ligne pour ce write. Comme le cache est write no allocate, la ligne va être invalidée lors de la réponse. + +Reprenons les différents dépendances entre requêtes mémoires : + +\begin{tabular}{l|ll} +Dépendance & Dépendance de ligne et adresse identique & Dépendance de ligne et adresse différente\\ +\hline +RaR & Bypass dans le processeur & Rend la deuxième lecture non cachée \\ +WaW & Géré par le processeur (mono contexte) & Pas de problème \\ +WaR & Géré par le processeur (mono contexte) & La lecture verrouille la ligne.\\ + & & L'écriture devra attendre la fin de la lecture\\ +RaW & Bypass dans le processeur & L'écriture verrouille la ligne.\\ + & & La lecture devra attendre la fin de l'écriture\\ +\end{tabular} + +\Section{Description détaillée} + +\subSection{Structure interne} +Nous allons maintenant détailler les ressources internes du cache non bloquant : +\begin{itemize} +\item Trois files d'attentes : + \begin{description} + \item[QUEUE\_READ\_HIT :] Cette file d'attente s'occupe de transmettre le plus tôt possible les requêtes de lecture ayant fait un HIT. + \begin{description} + \item {\it Valid : } Indique si l'entrée correspondante contient une donnée valide + \item {\it Index : } Index vers une entrée de RAM\_INFO + \end{description} + \item[QUEUE\_REQ :] Cette file est utilisée comme tampon d'écriture et de requête de lecture ayant fait un miss. Elle attende leur envoie à la mémoire. + \begin{description} + \item {\it Valid : } Indique si l'entrée correspondante contient une donnée valide + \item {\it Index : } Index vers une entrée de RAM\_INFO + \end{description} + \item[QUEUE\_RSP :] La file est utilisée comme tampon pour les réponses provenant de la mémoire. + \begin{description} + \item {\it Valid :} Indique si l'entrée correspondante contient une donnée valide + \item {\it Index :} Index vers une entrée de RAM\_INFO + \item {\it Line :} Contient la donnée retournée par l'interface de réponse + \item {\it Error :} Indique si l'accès effectué à généré une erreur ou pas. + \end{description} + \end{description} +\item Trois blocs mémoires : + \begin{description} + \item[RAM\_TAG :] Contient les informations pouvant identifier les adresses contenus dans cette ligne de cache + \begin{description} + \item {\it Tag :} Numéro du tag correspondant à la ligne + \end{description} + \item[RAM\_DATA :] Contient les données de la ligne de cache + \begin{description} + \item {\it Line :} Contient la ligne de cache proprement dite + \end{description} + \item[RAM\_LOCK :] Contient les bits de gestions de dépendances + \begin{description} + \item {\it Valid :} Indique si la ligne correspondant contient une donnée valide + \item {\it Lock\_by\_read :} Si le bit est positionné, alors il existe une lecture pendante + \item {\it Lock\_by\_write :} Si le bit est positionné, alors il existe une écriture pendante + \end{description} + \item[RAM\_INFO :] Contient les informations relative au requête pendante. Pour plus de détails voir la section \ref{RAM_INFO} + \begin{description} + \item {\it Valid :} Indique si l'entrée correspondante contient une donnée valide + \item {\it Trdid, Pktid :} Identifiant de la requête + \item {\it Address :} Adresse de la requête. Pour une identification rapide de la ligne concernée. + \item {\it Type :} Type de la requête + \item {\it Uncached :} Indique si la réponse doit modifier le cache + \item {\it Data :} Donnée (en cas d'écriture : DCACHE.REQ\_WDATA, en cas de lecture avec succès : contenu d'un mot de la ligne de cache) + \end{description} + \end{description} +\item Quatre automates : + \begin{description} + \item[FSM\_DCACHE\_REQ :] Cet automate gère la consommation des requêtes provenant du cache et, suivant le type d'accès et la réussite de l'accès, l'écriture dans les QUEUE\_REQ et QUEUE\_READ\_HIT + \printgraphonly{CACHE_automate-fsm_dcache_req}{1} + + \item[FSM\_DCACHE\_RSP :] L'automate gère la consommation de donnée de la QUEUE\_RSP et s'occupe d'écrire dans le cache les lignes chargées. + \printgraphonly{CACHE_automate-fsm_dcache_rsp}{.8} + \item[FSM\_VCI\_REQ :] L'automate s'occupe de consommer une donnée de QUEUE\_REQ (si la file n'est pas vide) et la lance sur l'interface VCI\_REQ (si l'interface n'est pas occupée). + \printgraphonly{CACHE_automate-fsm_vci_req}{.8} + \item[FSM\_VCI\_RSP :] L'automate s'occupe de consommer sur l'interface VCI\_RSP (si l'interface n'est pas occupée) et l'écrit dans  la file QUEUE\_RSP (si la file n'est pas pleine). + \printgraphonly{CACHE_automate-fsm_vci_rsp}{.8} + \end{description} +\end{itemize} + +\subSection{RAM\_INFO en détail}\label{RAM_INFO} +La RAM\_INFO contient les informations relative aux requêtes pendantes. Elle possède trois ports : 2 ports de lecture et 1 port d'écriture. +Le numéro de registre dans lequel est écrit les informations est enregistré dans les files QUEUE\_REQ, QUEUE\_RSP et QUEUE\_READ\_HIT. Ceci permet de ne pas dupliquer les informations. + +Pour cela, lors d'une transaction acceptée sur l'interface DCACHE\_REQ, il faut allouer un registre de la RAM\_INFO. La dés-allocation de ce registre aura lieu pendant une transaction acceptée sur l'interface DCACHE\_RSP. +Le numéro de registre sert également comme identifiant de requête lors d'une transaction VCI. (Le cycle de vie de cette identifiant garantie son unicité sur le réseau VCI) + +Nous pouvons noter alors que nous pouvons accepter une requête sur le l'interface DCACHE\_REQ si la file de destination n'est pas vide ET s'il y a encore une place de libre dans RAM\_INFO. + +Dans un premier temps, la taille de RAM\_INFO sera le nombre maximal de requêtes pendantes que le processeur peut admettre soit : \{nombre de contexte\} * \{taille de la load store queue\} (dans ce premier cas, RAM\_INFO n'a pas besoin de contenir le pktid et le trdid de la requête). De plus le nombre de port de lecture sera de 2. + +Les optimisations possibles sont : +\begin{itemize} +\item Diminution du nombre de registres : en pratique, la taille de RAM\_INFO devra être comprit entre max(\{taille de la QUEUE\_REQ\}, \{taille de la QUEUE\_READ\_HIT\}) et \{taille de la QUEUE\_REQ\} * \{taille de la QUEUE\_READ\_HIT\}. +\item Un seul port de lecture : implémentation multi-banc de RAM\_INFO. Pour la gestion de conflit, il faut utiliser la même priorité que pour le choix entre la QUEUE\_READ\_HIT et la QUEUE\_RSP. +\end{itemize} + +\printgraphonly{CACHE_implementation_RAM_INFO}{1} + +\subSection{Pipeliner l'accès au cache}\label{pipeline} +Nous avons vut que DCACHE.REQ\_ACK ne dépend pas que de l'état des FIFOs (donc disponible au début d'un cycle) mais également des requêtes entrantes (qui sont disponible en fin de cycle). Pour couper cette chaîne critique, nous pouvons pipeliner l'accès au port de requêtes ainsi que celui des réponses. + +\subsubSection{DCACHE\_RSP} + +Sur cette interface, les réponses sont maintenues par le cache jusqu'à ce que le processeur accepte la réponse. Pour cela, nous pouvons implémenter une simple barrière de pipeline. + +\subsubSection{DCACHE\_REQ} + +Sur cette interface, les requêtes ne sont pas maintenues par le processeur quand le cache n'accepte pas une requête. Cette spécification permet au processeur de choisir une autre requête si elle n'a pas été acceptée. (Nous rappelons qu'une requête n'est pas acceptée si la file de destination est pleine ou si une requête précedente a verrouillée la ligne.) + +Dans ce cas ajouter une barrière de pipeline va consommer la requête mais le cache va être dans l'imposibilité de l'accepter et va empêcher d'en choisir une autre. + Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty (revision 42) @@ -8,9 +8,13 @@ \usepackage[french]{babel} \usepackage{pgf,pgfarrows,pgfheaps,pgfnodes,pgfpages,pgfshade} - \usepackage{openbib} \bibliographystyle{plain} -\useoutertheme{infolines} +%\useoutertheme{infolines} +%\usetheme{Darmstadt} +%\usetheme{Malmoe} +%\usetheme{Copenhagen} + +%\usebackgroundtemplate{\includegraphics[height=\paperheight] {Include/background}} %% % file, Dimension Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Language/document-cache-specification =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Language/document-cache-specification (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Language/document-cache-specification (revision 42) @@ -0,0 +1,1 @@ +fr Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile (revision 41) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile (revision 42) @@ -30,5 +30,5 @@ DIR_SCHEMA = Schema DIR_SCHEMA_EPS = Schema_eps -DIR_SCHEMA_JPG = Schema_jpg +DIR_SCHEMA_PNG = Schema_png DIR_TEX = Source @@ -58,5 +58,5 @@ #-------------------------------------------------------------------------------- .PHONY : all clean view help doc doc_all new delete -.SECONDARY : $(DVI_FILES) $(PS_FILES) $(PDF_FILES) $(EPS_FILES) $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_JPG) +.SECONDARY : $(DVI_FILES) $(PS_FILES) $(PDF_FILES) $(EPS_FILES) $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_PNG) all : help @@ -365,5 +365,5 @@ @$(MKDIR) $@ -$(DIR_SCHEMA_JPG) : +$(DIR_SCHEMA_PNG) : @$(ECHO) "Make directory : $@" @$(MKDIR) $@ @@ -373,18 +373,18 @@ @$(MKDIR) $@ -$(DIR_SCHEMA_EPS)/%.eps : $(DIR_SCHEMA)/%.eps $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_JPG) +$(DIR_SCHEMA_EPS)/%.eps : $(DIR_SCHEMA)/%.eps $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_PNG) @$(ECHO) "Generate files : $*.eps" @$(CP) $(DIR_SCHEMA)/$*.eps $(DIR_SCHEMA_EPS) - @$(EPS2JPG) $@ $(DIR_SCHEMA_JPG)/$*.jpg - -$(DIR_SCHEMA_EPS)/%.eps : $(DIR_SCHEMA)/%.fig $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_JPG) + @$(EPS2PNG) $@ $(DIR_SCHEMA_PNG)/$*.png + +$(DIR_SCHEMA_EPS)/%.eps : $(DIR_SCHEMA)/%.fig $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_PNG) @$(ECHO) "Generate files : $*.eps" @$(FIG2EPS) $< $@ - @$(EPS2JPG) $@ $(DIR_SCHEMA_JPG)/$*.jpg - -$(DIR_SCHEMA_EPS)/%.eps : $(DIR_GRAPH)/%.p $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_JPG) + @$(EPS2PNG) $@ $(DIR_SCHEMA_PNG)/$*.png + +$(DIR_SCHEMA_EPS)/%.eps : $(DIR_GRAPH)/%.p $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_PNG) @$(ECHO) "Generate files : $*.eps" @$(CD) $(DIR_GRAPH); $(GNUPLOT) $*.p - @$(EPS2JPG) $@ $(DIR_SCHEMA_JPG)/$*.jpg + @$(EPS2PNG) $@ $(DIR_SCHEMA_PNG)/$*.png #-------------------------------------------------------------------------------- @@ -394,5 +394,5 @@ clean : @$(ECHO) "Delete temporary files "$(PWD) - @$(RM) $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_JPG) $(DIR_TEX) $(DIR_PACKAGE)/*.aux + @$(RM) $(DIR_SCHEMA_EPS) $(DIR_SCHEMA_PNG) $(DIR_TEX) $(DIR_PACKAGE)/*.aux @$(RM) $(DVI_FILES) $(PS_FILES) $(PDF_FILES) @$(MAKE) clean_rec DIR_CLEAN=. Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.sty =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.sty (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.sty (revision 42) @@ -0,0 +1,12 @@ +\def\review{2007/07/02} +%\def\review{\number\day/\number\month/\number\year\xspace} + +\title{Cache - Specification} + +\author{} + +\affiliation{Laboratoire d'Informatique de Paris VI - Equipe SOC - France} + +\email{} + +\date{\review} Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.tex =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.tex (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Package/document-cache-specification.tex (revision 42) @@ -0,0 +1,1 @@ +\documentclass[10pt,a4paper,onecolumn]{article} Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_req.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_req.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_req.fig (revision 42) @@ -0,0 +1,61 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 2700.000 5550 2700 5250 2550 5250 2850 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6525.000 4725.000 6450 4200 6900 4350 7050 4800 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6675.000 4425.000 6750 4950 6300 4800 6150 4350 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 7350.000 5512.500 7500 5400 7350 5700 7200 5400 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 4350.000 5512.500 4500 5400 4350 5700 4200 5400 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5025.000 4425.000 4950 4950 5400 4800 5550 4350 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5175.000 4725.000 5250 4200 4800 4350 4650 4800 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 3750.000 5550 3750 5250 3600 5250 3900 + 3 0 1.00 60.00 120.00 +6 5175 3675 6525 4425 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 3750 +4 1 0 50 -1 2 8 0.0000 0 105 420 5850 4050 Request\001 +-6 +6 5175 2625 6525 3375 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 3000 600 300 5850 3000 6450 2700 +4 1 0 50 -1 2 8 0.0000 0 90 210 5850 3000 Init\001 +-6 +6 6675 4725 8025 5475 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 5100 600 300 7350 5100 7950 4800 +4 1 0 50 -1 2 8 0.0000 0 105 1185 7350 5025 QUEUE_READ_HIT\001 +4 1 0 50 -1 2 8 0.0000 0 105 255 7350 5250 Busy\001 +-6 +6 3675 4725 5025 5475 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 4350 5100 600 300 4350 5100 4950 4800 +4 1 0 50 -1 2 8 0.0000 0 105 255 4350 5250 Busy\001 +4 1 0 50 -1 2 8 0.0000 0 105 780 4350 5025 QUEUE_REQ\001 +-6 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 2550 6300 2775 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 3300 5850 3750 +4 0 0 50 -1 0 8 0.0000 0 105 645 5925 3525 (3) : end_init\001 +4 1 0 50 -1 0 8 0.0000 0 120 1230 7350 5850 (5) : queue_read_hit.full\001 +4 2 0 50 -1 0 8 0.0000 0 120 1485 6675 5250 (6) : not(queue_read_hit.full)\001 +4 1 0 50 -1 0 8 0.0000 0 120 990 4350 5850 (8) : queue_req.full\001 +4 0 0 50 -1 0 8 0.0000 0 120 1245 5025 5100 (9) : not(queue_req.full)\001 +4 2 0 50 -1 0 8 0.0000 0 105 885 5175 3525 (10) : not(A or B)\001 +4 0 0 50 -1 0 8 0.0000 0 120 2430 3750 6300 A : ((read and miss) or write).request_queue.full\001 +4 1 0 50 -1 0 8 0.0000 0 105 810 6525 2475 (1) : not(nreset)\001 +4 1 0 50 -1 0 8 0.0000 0 105 900 5175 2475 (2) : not(end_init)\001 +4 0 0 50 -1 0 8 0.0000 0 120 3345 3750 6450 B : ((read and not (miss)) or (type_others)) and queue_read_hit.full\001 +4 0 0 50 -1 0 8 0.0000 0 105 315 6975 4275 (4) : B\001 +4 2 0 50 -1 0 8 0.0000 0 105 330 4725 4275 (7) : A\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_rsp.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_rsp.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_rsp.fig (revision 42) @@ -0,0 +1,64 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 2700.000 5550 2700 5250 2550 5250 2850 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6525.000 4725.000 6450 4200 6900 4350 7050 4800 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6675.000 4425.000 6750 4950 6300 4800 6150 4350 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 7350.000 5512.500 7500 5400 7350 5700 7200 5400 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 4350.000 5512.500 4500 5400 4350 5700 4200 5400 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5025.000 4425.000 4950 4950 5400 4800 5550 4350 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5175.000 4725.000 5250 4200 4800 4350 4650 4800 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 3750.000 5550 3750 5250 3600 5250 3900 + 3 0 1.00 60.00 120.00 +6 5175 2625 6525 3375 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 3000 600 300 5850 3000 6450 2700 +4 1 0 50 -1 2 8 0.0000 0 90 210 5850 3000 Init\001 +-6 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 5100 600 300 7350 5100 7950 4800 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 3750 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 4350 5100 600 300 4350 5100 4950 4800 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 2550 6300 2775 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 3300 5850 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6750 5025 4950 5025 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 5175 6750 5175 +4 0 0 50 -1 0 8 0.0000 0 105 645 5925 3525 (3) : end_init\001 +4 1 0 50 -1 0 8 0.0000 0 105 810 6525 2475 (1) : not(nreset)\001 +4 1 0 50 -1 0 8 0.0000 0 105 900 5175 2475 (2) : not(end_init)\001 +4 1 0 50 -1 2 8 0.0000 0 90 225 5850 4050 Idle\001 +4 1 0 50 -1 2 8 0.0000 0 105 1185 7350 5025 QUEUE_READ_HIT\001 +4 1 0 50 -1 2 8 0.0000 0 90 195 7350 5250 pop\001 +4 1 0 50 -1 2 8 0.0000 0 105 750 4350 5025 QUEUE_RSP\001 +4 1 0 50 -1 2 8 0.0000 0 90 195 4350 5250 pop\001 +4 1 0 50 -1 0 8 0.0000 0 105 315 5850 5325 (7) : B\001 +4 0 0 50 -1 0 8 0.0000 0 120 1320 3750 6150 A : not (queue_rsp.empty)\001 +4 0 0 50 -1 0 8 0.0000 0 120 2610 3750 6300 B : queue_rsp.empty and not(queue_read_hit.empty)\001 +4 0 0 50 -1 0 8 0.0000 0 120 2325 3750 6450 C : queue_rsp.empty and queue_read_hit.empy\001 +4 1 0 50 -1 0 8 0.0000 0 105 330 4350 5850 (6) : A\001 +4 2 0 50 -1 0 8 0.0000 0 105 330 5325 4725 (5) : C\001 +4 2 0 50 -1 0 8 0.0000 0 105 330 4725 4275 (4) : A\001 +4 0 0 50 -1 0 8 0.0000 0 105 315 6975 4275 (8) : B\001 +4 0 0 50 -1 0 8 0.0000 0 105 330 6375 4725 (9) : C\001 +4 1 0 50 -1 0 8 0.0000 0 105 375 7350 5850 (10) : B\001 +4 1 0 50 -1 0 8 0.0000 0 105 390 5850 4950 (11) : A\001 +4 2 0 50 -1 0 8 0.0000 0 105 390 5175 3525 (12) : C\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_req.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_req.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_req.fig (revision 42) @@ -0,0 +1,67 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 2700.000 5550 2700 5250 2550 5250 2850 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 3750.000 5550 3750 5250 3600 5250 3900 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 3637.500 5100.000 3750 4950 3450 5100 3750 5250 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 8062.500 5100.000 7950 4950 8250 5100 7950 5250 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 5850.000 6562.500 6000 6450 5850 6750 5700 6450 + 3 0 1.00 60.00 120.00 +6 5175 2625 6525 3375 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 3000 600 300 5850 3000 6450 2700 +4 1 0 50 -1 2 8 0.0000 0 90 210 5850 3000 Init\001 +-6 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 3750 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 5100 600 300 7350 5100 7950 4800 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 4350 5100 600 300 4350 5100 4950 4800 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 6150 600 300 5850 6150 6450 5850 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 2550 6300 2775 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 3300 5850 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4725 5325 5400 5925 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6900 5325 6300 5925 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6300 4275 6900 4875 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5396 4270 4800 4875 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 5850 5850 4350 +4 0 0 50 -1 0 8 0.0000 0 105 645 5925 3525 (3) : end_init\001 +4 1 0 50 -1 0 8 0.0000 0 105 810 6525 2475 (1) : not(nreset)\001 +4 1 0 50 -1 0 8 0.0000 0 105 900 5175 2475 (2) : not(end_init)\001 +4 1 0 50 -1 2 8 0.0000 0 90 225 5850 4050 Idle\001 +4 1 0 50 -1 2 8 0.0000 0 120 795 5850 6150 QUEUE_Read\001 +4 1 0 50 -1 2 8 0.0000 0 90 315 7350 5100 Word\001 +4 1 0 50 -1 2 8 0.0000 0 90 255 4350 5100 Line\001 +4 2 0 50 -1 0 8 0.0000 0 120 1110 5250 3525 (4) : queue_req.empty\001 +4 0 0 50 -1 0 8 0.0000 0 120 2565 3750 7350 B : not (queue_req_empty) and (write or uncached)\001 +4 0 0 50 -1 0 8 0.0000 0 120 2865 3750 7200 A : not (queue_req_empty) and (read and not (uncached))\001 +4 2 0 50 -1 0 8 0.0000 0 105 330 5025 4575 (5) : A\001 +4 0 0 50 -1 0 8 0.0000 0 105 315 6675 4575 (6) : B\001 +4 2 0 50 -1 0 8 0.0000 0 120 1695 3375 5100 (7) : VCI_REQ_CPT != size_line\001 +4 2 0 50 -1 0 8 0.0000 0 120 2100 4950 5700 (8) : (VCI_REQ_CPT = size_line) and C\001 +4 1 0 50 -1 0 8 0.0000 0 120 1545 5850 6900 (11) : not(queue_req.read_ack)\001 +4 0 0 50 -1 0 8 0.0000 0 105 525 8325 5100 (9) : not C\001 +4 0 0 50 -1 0 8 0.0000 0 105 390 6675 5700 (10) : C\001 +4 1 0 50 -1 0 8 0.0000 0 120 1290 5850 5100 (12) : queue_req.read_ack\001 +4 0 0 50 -1 0 8 0.0000 0 105 960 3750 7500 C : VCI.REQACK\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_rsp.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_rsp.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_vci_rsp.fig (revision 42) @@ -0,0 +1,55 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 2700.000 5550 2700 5250 2550 5250 2850 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 3750.000 5550 3750 5250 3600 5250 3900 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 3637.500 5100.000 3750 4950 3450 5100 3750 5250 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 8062.500 5100.000 7950 4950 8250 5100 7950 5250 + 3 0 1.00 60.00 120.00 +6 5175 2625 6525 3375 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 3000 600 300 5850 3000 6450 2700 +4 1 0 50 -1 2 8 0.0000 0 90 210 5850 3000 Init\001 +-6 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 3750 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 5100 600 300 7350 5100 7950 4800 +1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 4350 5100 600 300 4350 5100 4950 4800 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 2550 6300 2775 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 3300 5850 3750 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 5100 6750 5100 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6900 4875 6300 4275 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5396 4270 4800 4875 +4 0 0 50 -1 0 8 0.0000 0 105 645 5925 3525 (3) : end_init\001 +4 1 0 50 -1 0 8 0.0000 0 105 810 6525 2475 (1) : not(nreset)\001 +4 1 0 50 -1 0 8 0.0000 0 105 900 5175 2475 (2) : not(end_init)\001 +4 1 0 50 -1 2 8 0.0000 0 90 225 5850 4050 Idle\001 +4 1 0 50 -1 2 8 0.0000 0 90 255 4350 5100 Line\001 +4 2 0 50 -1 0 8 0.0000 0 105 330 5025 4575 (5) : A\001 +4 1 0 50 -1 2 8 0.0000 0 120 810 7350 5100 QUEUE_Write\001 +4 2 0 50 -1 0 8 0.0000 0 105 510 3375 5100 (6) : not B\001 +4 1 0 50 -1 0 8 0.0000 0 105 315 5850 5325 (7) : B\001 +4 0 0 50 -1 0 8 0.0000 0 105 525 8325 5100 (8) : not C\001 +4 0 0 50 -1 0 8 0.0000 0 105 330 6675 4575 (9) : C\001 +4 2 0 50 -1 0 8 0.0000 0 105 525 5250 3525 (4) : not A\001 +4 0 0 50 -1 0 8 0.0000 0 105 1365 3750 6150 C : QUEUE_RSP.read_ack\001 +4 0 0 50 -1 0 8 0.0000 0 75 930 3750 6300 D : VCI.RSPVAL\001 +4 0 0 50 -1 0 8 0.0000 0 75 1725 3750 6000 B : VCI.REOP and VCI.RSPVAL\001 +4 0 0 50 -1 0 8 0.0000 0 120 2460 3750 5850 A : not (queue_rsp.full) and not (VCI.RSPVAL)\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_coherence_memoire.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_coherence_memoire.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_coherence_memoire.fig (revision 42) @@ -0,0 +1,27 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 4050.000 4800 3675 4650 4050 4800 4425 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 2700.000 4800 2325 4650 2700 4800 3075 +5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 5100.000 4800 4725 4650 5100 4800 5475 +4 0 0 50 -1 0 12 0.0000 4 135 375 4950 3300 Lock\001 +4 0 0 50 -1 0 12 0.0000 4 135 600 4950 4650 UnLock\001 +4 0 0 50 -1 0 12 0.0000 4 15 135 4950 4050 ...\001 +4 0 0 50 -1 0 12 0.0000 4 15 135 4950 2700 ...\001 +4 0 0 50 -1 0 12 0.0000 4 15 135 4950 5100 ...\001 +4 2 0 50 -1 0 12 0.0000 4 135 585 4500 3900 Access\001 +4 2 0 50 -1 0 12 0.0000 4 135 810 4500 2550 No access\001 +4 2 0 50 -1 0 12 0.0000 4 135 810 4500 4950 No access\001 +4 2 0 50 -1 0 12 0.0000 4 135 690 4500 3000 variables\001 +4 2 0 50 -1 0 12 0.0000 4 135 690 4500 4350 variables\001 +4 2 0 50 -1 0 12 0.0000 4 135 840 4500 4125 to a shared\001 +4 2 0 50 -1 0 12 0.0000 4 135 840 4500 2775 to a shared\001 +4 2 0 50 -1 0 12 0.0000 4 135 840 4500 5175 to a shared\001 +4 2 0 50 -1 0 12 0.0000 4 135 690 4500 5400 variables\001 +4 0 0 50 -1 0 12 0.0000 4 180 2700 4950 3600 Flush (addressof shared variables)\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_implementation_RAM_INFO.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_implementation_RAM_INFO.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_implementation_RAM_INFO.fig (revision 42) @@ -0,0 +1,39 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +1 1 0 1 0 27 50 -1 20 0.000 1 0.0000 5550 4650 300 225 5550 4650 5850 4425 +2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 4575 5850 4575 +2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 6450 4725 5850 4725 +2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5550 4425 5550 4200 +2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5550 4875 5550 5100 +2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 + 6150 5700 6150 5100 4350 5100 4350 5700 6150 5700 +2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 + 6150 4200 6150 3600 4350 3600 4350 4200 6150 4200 +2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4050 4650 4950 4650 4950 4200 +2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4950 4650 4950 5100 +4 1 0 50 -1 0 8 0.0000 0 75 510 5250 5400 bank - odd\001 +4 1 0 50 -1 0 8 0.0000 0 75 570 5250 3900 bank - even\001 +4 1 0 50 -1 0 8 0.0000 0 90 345 5550 4575 conflit\001 +4 1 0 50 -1 0 8 0.0000 0 75 300 5550 4725 check\001 +4 2 0 50 -1 0 8 0.0000 0 90 390 3975 4650 Write 0\001 +4 0 0 50 -1 0 8 0.0000 0 75 345 6525 4575 Read 0\001 +4 0 0 50 -1 0 8 0.0000 0 75 345 6525 4725 Read 1\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview.fig (revision 42) @@ -0,0 +1,179 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +6 6150 3150 6750 3450 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 6150 3450 6750 3450 6750 3150 6150 3150 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 6600 3150 6600 3450 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 6450 3150 6450 3450 +-6 +6 4350 3450 5400 4425 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4875.000 4162.500 4725 4275 4875 4350 5025 4275 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 5043.750 3900.000 5175 3975 5175 3825 5025 3750 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4706.250 3900.000 4725 3750 4575 3825 4575 3975 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4875 3675 150 150 4875 3675 5025 3675 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 5175 4125 150 150 5175 4125 5325 4125 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4575 4125 150 150 4575 4125 4725 4125 +-6 +6 7500 3450 8550 4425 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 4162.500 7875 4275 8025 4350 8175 4275 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 3900.000 7875 3750 7725 3825 7725 3975 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 3900.000 8325 3975 8325 3825 8175 3750 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 3675 150 150 8025 3675 8175 3675 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 4125 150 150 8325 4125 8475 4125 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 7725 4125 150 150 7725 4125 7875 4125 +-6 +6 4425 5025 5325 5475 +1 1 0 1 0 7 50 -1 20 0.000 1 0.0000 4875 5250 375 150 4875 5250 5250 5100 +4 1 0 50 -1 0 8 0.0000 0 90 345 4875 5250 Victim\001 +-6 +6 4050 6300 4350 6900 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 4050 6300 4050 6900 4350 6900 4350 6300 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 4350 6750 4050 6750 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 4350 6600 4050 6600 +-6 +6 8550 6300 8850 6900 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 8550 6900 8550 6300 8850 6300 8850 6900 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 8850 6450 8550 6450 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 8850 6600 8550 6600 +-6 +6 7500 7350 8550 8325 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 8062.500 7875 8175 8025 8250 8175 8175 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 7800.000 8325 7875 8325 7725 8175 7650 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 7800.000 7875 7650 7725 7725 7725 7875 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 7575 150 150 8025 7575 8175 7575 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 8025 150 150 8325 8025 8475 8025 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 7725 8025 150 150 7725 8025 7875 8025 +-6 +6 4350 7350 5400 8325 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 5043.750 7800.000 5175 7875 5175 7725 5025 7650 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4875.000 8062.500 4725 8175 4875 8250 5025 8175 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4706.250 7800.000 4725 7650 4575 7725 4575 7875 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4875 7575 150 150 4875 7575 5025 7575 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 5175 8025 150 150 5175 8025 5325 8025 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4575 8025 150 150 4575 8025 4725 8025 +-6 +1 1 0 1 0 7 50 -1 20 0.000 1 0.0000 4885 4650 365 150 4885 4650 5250 4500 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 3300 6150 3300 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 2700 4200 6300 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8700 6300 8700 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 6750 3300 8550 3300 8550 3075 +2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 + 8475 3075 8775 3075 8775 2925 8475 2925 8475 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8625 2925 8625 2700 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 3 + 8475 3075 8625 2925 8775 3075 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 5850 3900 5550 3900 5550 3300 +2 2 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 5 + 5850 5100 7050 5100 7050 4500 5850 4500 5850 5100 +2 2 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 5 + 5850 4200 7050 4200 7050 3600 5850 3600 5850 4200 +2 2 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 5 + 5850 6000 7050 6000 7050 5400 5850 5400 5850 6000 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4875 4500 4875 4350 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 7 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 4650 5250 4650 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 4950 5850 4950 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4875 5100 4875 4950 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 4 + 3 0 1.00 60.00 120.00 + 8700 4800 7350 4800 7350 3900 7050 3900 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 5550 5850 5550 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 5850 4200 5850 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4875 5400 4875 5550 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 6900 4200 8400 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 6075 5850 6450 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 5850 6750 4200 7125 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8700 8400 8700 6900 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 7050 6450 8700 6075 +2 2 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 5 + 5850 6900 7050 6900 7050 6300 5850 6300 5850 6900 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8700 8250 9450 7950 +2 2 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 5 + 8850 7950 10050 7950 10050 7800 8850 7800 8850 7950 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 9450 7800 8700 7500 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 8700 5700 7050 5700 +4 1 0 50 -1 0 8 0.0000 0 105 1170 4875 3450 FSM_DCACHE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 1155 8025 3450 FSM_DCACHE_RSP\001 +4 1 0 50 -1 0 8 0.0000 0 90 615 6450 4800 RAM_TAG\001 +4 1 0 50 -1 0 8 0.0000 0 90 705 6450 3900 RAM_DATA\001 +4 1 0 50 -1 0 8 0.0000 0 105 1095 6450 3075 QUEUE_READ_HIT\001 +4 1 0 50 -1 0 8 0.0000 0 75 255 4875 4650 HIT?\001 +4 1 0 50 -1 0 8 0.0000 0 90 705 6450 5700 RAM_LOCK\001 +4 1 0 50 -1 0 8 0.0000 0 105 870 4875 7350 FSM_VCI_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 855 8025 7350 FSM_VCI_RSP\001 +4 0 0 50 -1 0 8 0.0000 0 105 735 4425 6600 QUEUE_REQ\001 +4 2 0 50 -1 0 8 0.0000 0 105 720 8475 6600 QUEUE_RSP\001 +4 1 0 50 -1 0 8 0.0000 0 90 660 6450 6600 RAM_INFO\001 +4 1 0 50 -1 0 8 0.0000 0 105 540 4200 8625 VCI_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 525 8700 8625 VCI_RSP\001 +4 1 0 50 -1 0 8 0.0000 0 105 570 9450 8250 line_buffer\001 +4 1 0 50 -1 0 8 0.0000 0 105 840 4200 2550 DCACHE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 825 8625 2550 DCACHE_RSP\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview_save.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview_save.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview_save.fig (revision 42) @@ -0,0 +1,161 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +6 4050 5700 4350 6300 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 4050 5700 4050 6300 4350 6300 4350 5700 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 4350 6150 4050 6150 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 4350 6000 4050 6000 +-6 +6 8550 5700 8850 6300 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 8550 6300 8550 5700 8850 5700 8850 6300 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 8850 5850 8550 5850 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 8850 6000 8550 6000 +-6 +6 6150 3150 6750 3450 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 + 6150 3450 6750 3450 6750 3150 6150 3150 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 6600 3150 6600 3450 +2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 + 6450 3150 6450 3450 +-6 +6 7500 6750 8550 7725 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 7462.500 7875 7575 8025 7650 8175 7575 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 7200.000 8325 7275 8325 7125 8175 7050 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 7200.000 7875 7050 7725 7125 7725 7275 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 6975 150 150 8025 6975 8175 6975 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 7425 150 150 8325 7425 8475 7425 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 7725 7425 150 150 7725 7425 7875 7425 +-6 +6 4350 6750 5400 7725 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 5043.750 7200.000 5175 7275 5175 7125 5025 7050 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4875.000 7462.500 4725 7575 4875 7650 5025 7575 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4706.250 7200.000 4725 7050 4575 7125 4575 7275 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4875 6975 150 150 4875 6975 5025 6975 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 5175 7425 150 150 5175 7425 5325 7425 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4575 7425 150 150 4575 7425 4725 7425 +-6 +6 4350 3450 5400 4425 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4875.000 4162.500 4725 4275 4875 4350 5025 4275 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 5043.750 3900.000 5175 3975 5175 3825 5025 3750 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4706.250 3900.000 4725 3750 4575 3825 4575 3975 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4875 3675 150 150 4875 3675 5025 3675 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 5175 4125 150 150 5175 4125 5325 4125 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4575 4125 150 150 4575 4125 4725 4125 +-6 +6 7500 3450 8550 4425 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 4162.500 7875 4275 8025 4350 8175 4275 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 3900.000 7875 3750 7725 3825 7725 3975 + 3 0 1.00 60.00 120.00 +5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 3900.000 8325 3975 8325 3825 8175 3750 + 3 0 1.00 60.00 120.00 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 3675 150 150 8025 3675 8175 3675 +1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 4125 150 150 8325 4125 8475 4125 +1 3 0 1 0 14 50 -1 20 0.000 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8 0.0000 0 90 705 6450 3900 RAM_DATA\001 +4 1 0 50 -1 0 8 0.0000 0 105 1095 6450 3075 QUEUE_READ_HIT\001 +4 0 0 50 -1 0 8 0.0000 0 105 735 4425 6000 QUEUE_REQ\001 +4 2 0 50 -1 0 8 0.0000 0 105 720 8475 6000 QUEUE_RSP\001 +4 1 0 50 -1 0 8 0.0000 0 90 660 6450 6000 RAM_INFO\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_protocole.fig =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_protocole.fig (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_protocole.fig (revision 42) @@ -0,0 +1,309 @@ +#FIG 3.2 +Landscape +Center +Inches +Letter +100.00 +Single +-2 +1200 2 +6 2625 3750 6525 4650 +6 4275 3750 5550 4350 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 + 5400 4050 4950 3750 4500 4050 4950 4350 5400 4050 +4 1 0 50 -1 0 8 0.0000 0 90 240 4950 4050 Hit ?\001 +4 2 0 50 -1 0 8 0.0000 0 90 165 4500 3975 yes\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 5400 3975 no\001 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 5400 4050 6450 4050 6450 4650 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 4500 4050 2700 4050 2700 4650 +-6 +6 2625 6150 4275 7050 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3000 6450 2700 6450 2700 7050 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3900 6450 4200 6450 4200 7050 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 + 3900 6450 3450 6150 3000 6450 3450 6750 3900 6450 +4 2 0 50 -1 0 8 0.0000 0 90 165 3000 6375 yes\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 3900 6375 no\001 +4 1 0 50 -1 0 8 0.0000 0 75 225 3450 6375 lock\001 +4 1 0 50 -1 0 8 0.0000 0 105 435 3450 6525 by read ?\001 +-6 +6 8625 4650 10275 5550 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 9000 4950 8700 4950 8700 5550 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 9900 4950 10200 4950 10200 5550 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 + 9900 4950 9450 4650 9000 4950 9450 5250 9900 4950 +4 2 0 50 -1 0 8 0.0000 0 90 165 9000 4875 yes\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 9900 4875 no\001 +4 1 0 50 -1 0 8 0.0000 0 75 225 9450 4875 lock\001 +4 1 0 50 -1 0 8 0.0000 0 105 435 9450 5025 by read ?\001 +-6 +6 9600 8100 10800 8400 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 9600 8400 9600 8100 10800 8100 10800 8400 9600 8400 +4 1 0 50 -1 0 8 0.0000 0 105 1005 10200 8250 write RAM_DATA\001 +-6 +6 9600 6450 10800 8100 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 10200 6450 10200 6750 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 9600 7200 9600 6750 10800 6750 10800 7200 9600 7200 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 10200 7200 10200 7500 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 9600 7800 9600 7500 10800 7500 10800 7800 9600 7800 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 10200 7800 10200 8100 +4 1 0 50 -1 0 8 0.0000 0 90 420 10200 6900 write in \001 +4 1 0 50 -1 0 8 0.0000 0 105 735 10200 7125 QUEUE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 120 615 10200 7650 wait respons\001 +-6 +6 10275 3750 11550 4350 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 + 11400 4050 10950 3750 10500 4050 10950 4350 11400 4050 +4 1 0 50 -1 0 8 0.0000 0 90 240 10950 4050 Hit ?\001 +4 2 0 50 -1 0 8 0.0000 0 90 165 10500 3975 yes\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 11400 3975 no\001 +-6 +6 11100 6750 12300 7200 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 11100 7200 11100 6750 12300 6750 12300 7200 11100 7200 +4 1 0 50 -1 0 8 0.0000 0 105 735 11700 7125 QUEUE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 420 11700 6900 write in \001 +-6 +6 11100 7500 12300 7800 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 11100 7800 11100 7500 12300 7500 12300 7800 11100 7800 +4 1 0 50 -1 0 8 0.0000 0 120 615 11700 7650 wait respons\001 +-6 +6 5100 6750 6300 7200 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 5100 7200 5100 6750 6300 6750 6300 7200 5100 7200 +4 1 0 50 -1 0 8 0.0000 0 105 735 5700 7125 QUEUE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 90 420 5700 6900 write in \001 +-6 +6 5100 8100 6300 8400 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 5100 8400 5100 8100 6300 8100 6300 8400 5100 8400 +4 1 0 50 -1 0 8 0.0000 0 105 1005 5700 8250 write RAM_DATA\001 +-6 +6 3600 7650 4800 8100 +2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 + 3600 8100 3600 7650 4800 7650 4800 8100 3600 8100 +4 1 0 50 -1 0 8 0.0000 0 90 420 4200 7800 write in \001 +4 1 0 50 -1 0 8 0.0000 0 105 1095 4200 8025 QUEUE_READ_HIT\001 +-6 +6 5100 6150 6300 6450 +2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 + 5100 6450 5100 6150 6300 6150 6300 6450 5100 6450 +4 1 0 50 -1 0 8 0.0000 0 105 870 5700 6300 lock_by_read = 1\001 +-6 +6 9600 6150 10800 6450 +2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 + 9600 6450 9600 6150 10800 6150 10800 6450 9600 6450 +4 1 0 50 -1 0 8 0.0000 0 120 930 10200 6300 lock_by_write = 1\001 +-6 +6 11100 6150 12300 6450 +2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 + 11100 6450 11100 6150 12300 6150 12300 6450 11100 6450 +4 1 0 50 -1 0 8 0.0000 0 120 930 11700 6300 lock_by_write = 1\001 +-6 +6 9600 8700 10800 9000 +2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 + 9600 9000 9600 8700 10800 8700 10800 9000 9600 9000 +4 1 0 50 -1 0 8 0.0000 0 120 930 10200 8850 lock_by_write = 0\001 +-6 +6 11100 8700 12300 9000 +2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 + 11100 9000 11100 8700 12300 8700 12300 9000 11100 9000 +4 1 0 50 -1 0 8 0.0000 0 90 555 11700 8850 invalid line\001 +-6 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 3450 5850 3450 6150 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 2250 4950 1950 4950 1950 5550 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 + 3 0 1.00 60.00 120.00 + 3150 4950 3450 4950 3450 5550 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 + 3150 4950 2700 4650 2250 4950 2700 5250 3150 4950 +2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 8100 4200 9300 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 4200 7350 4200 7650 +2 1 0 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6600 5550 7800 5550 7800 5850 6600 5850 +2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 + 5100 5850 5100 5550 6300 5550 6300 5850 5100 5850 +2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 + 2850 5850 2850 5550 4050 5550 4050 5850 2850 5850 +2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 + 1350 5850 1350 5550 2550 5550 2550 5850 1350 5850 +2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 + 3 0 1.00 60.00 120.00 + 7950 2550 7950 2850 +4 1 0 50 -1 0 8 0.0000 0 105 585 3450 5700 req_ack = 1\001 +4 2 0 50 -1 0 8 0.0000 0 90 165 2250 4875 yes\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 3150 4875 no\001 +4 1 0 50 -1 0 8 0.0000 0 75 225 2700 4875 lock\001 +4 1 0 50 -1 0 8 0.0000 0 120 495 2700 5025 by write ?\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 1950 5700 req_ack = 0\001 +4 1 0 50 -1 0 8 0.0000 0 75 660 2700 7200 uncached = 1\001 +4 1 0 50 -1 0 8 0.0000 0 90 945 4200 7200 read RAM_DATA\001 +4 1 0 50 -1 0 8 0.0000 0 105 255 7950 3150 Type\001 +4 2 0 50 -1 0 8 0.0000 0 75 210 7500 3075 read\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 8700 5700 req_ack = 0\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 10200 5700 req_ack = 1\001 +4 1 0 50 -1 0 8 0.0000 0 90 240 12450 4875 valid\001 +4 1 0 50 -1 0 8 0.0000 0 90 390 12450 5025 victim ?\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 12900 4875 no\001 +4 2 0 50 -1 0 8 0.0000 0 90 165 12000 4875 yes\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 13200 5700 req_ack = 0\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 11700 5700 req_ack = 1\001 +4 1 0 50 -1 0 8 0.0000 0 75 195 7950 9450 End\001 +4 1 0 50 -1 0 8 0.0000 0 90 420 2700 7800 write in \001 +4 1 0 50 -1 0 8 0.0000 0 105 735 2700 8025 QUEUE_REQ\001 +4 1 0 50 -1 0 8 0.0000 0 120 615 2700 8550 wait respons\001 +4 1 0 50 -1 0 8 0.0000 0 90 240 6450 4875 valid\001 +4 1 0 50 -1 0 8 0.0000 0 90 390 6450 5025 victim ?\001 +4 0 0 50 -1 0 8 0.0000 0 60 120 6900 4875 no\001 +4 2 0 50 -1 0 8 0.0000 0 90 165 6000 4875 yes\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 7200 5700 req_ack = 0\001 +4 1 0 50 -1 0 8 0.0000 0 105 585 5700 5700 req_ack = 1\001 +4 1 0 50 -1 0 8 0.0000 0 120 615 5700 7650 wait respons\001 +4 1 0 50 -1 0 8 0.0000 0 105 870 5700 8850 lock_by_read = 0\001 +4 0 0 50 -1 0 8 0.0000 0 90 270 8400 3075 write\001 Index: /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Type/document-cache-specification =================================================================== --- /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Type/document-cache-specification (revision 42) +++ /trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Type/document-cache-specification (revision 42) @@ -0,0 +1,1 @@ +doc