Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp	(revision 42)
@@ -96,5 +96,4 @@
 
   
-  _Branch_History_Table->vhdl_testbench_label("Initialisation");
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
 
@@ -129,10 +128,8 @@
   sc_start(0);
 
-  _Branch_History_Table->vhdl_testbench_label("Loop of Test");
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl;
 
   for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
     {
-      _Branch_History_Table->vhdl_testbench_label("Iteration "+toString(iteration));
       num_port_branch_complete = rand() % param._nb_branch_complete;
       num_port_predict         = rand() % param._nb_prediction     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h	(revision 42)
@@ -27,7 +27,5 @@
 #include "Behavioural/include/Vhdl.h"
 #endif
-#ifdef VHDL_TESTBENCH
-#include "Behavioural/include/Vhdl_Testbench.h"
-#endif
+#include "Behavioural/include/Component.h"
 
 using namespace std;
@@ -59,7 +57,6 @@
 #endif
 
-#ifdef VHDL_TESTBENCH
-  private   : Vhdl_Testbench                 * _vhdl_testbench;
-#endif
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
 
 #ifdef SYSTEMC
@@ -83,5 +80,4 @@
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_SIGNAL(Thistory_t)        ** signal_BRANCH_COMPLETE_HISTORY;
 #endif
 
@@ -118,20 +114,17 @@
 #endif					       
 					       
-#if VHDL				       
-  public  : void     vhdl                      (void);
-  private : void     vhdl_port                 (Vhdl & vhdl);
-  private : void     vhdl_type                 (Vhdl & vhdl);
-  private : void     vhdl_signal               (Vhdl & vhdl);
-  private : void     vhdl_body                 (Vhdl & vhdl);
-#endif					       
 #ifdef STATISTICS
   public  : string   statistics                (uint32_t depth);
 #endif
-					       
+#if VHDL				       
+  public  : void     vhdl                      (void);
+  private : void     vhdl_port                 (Vhdl * & vhdl);
+  private : void     vhdl_type                 (Vhdl * & vhdl);
+  private : void     vhdl_signal               (Vhdl * & vhdl);
+  private : void     vhdl_body                 (Vhdl * & vhdl);
+#endif					       
 #ifdef VHDL_TESTBENCH			       
-  private : void     vhdl_testbench_port       (void);
   private : void     vhdl_testbench_transition (void);
 #endif
-  public  : void     vhdl_testbench_label      (string label);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp	(revision 42)
@@ -32,4 +32,9 @@
 #endif
   {
+
+#ifdef SYSTEMC
+    allocation ();
+#endif
+
 #ifdef STATISTICS
     // Allocation of statistics
@@ -39,13 +44,4 @@
 #endif
 
-#ifdef VHDL_TESTBENCH
-    // Creation of a testbench
-    //  -> port
-    //  -> clock's signals
-    _vhdl_testbench = new Vhdl_Testbench (_name);
-    vhdl_testbench_port           ();
-    _vhdl_testbench->set_clock    ("in_CLOCK",true);
-#endif
-
 #ifdef VHDL
     // generate the vhdl
@@ -53,7 +49,6 @@
 #endif
 
+
 #ifdef SYSTEMC
-    allocation ();
-
 //     // Constant
 //     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
@@ -77,10 +72,4 @@
   Branch_History_Table::~Branch_History_Table (void)
   {
-#ifdef VHDL_TESTBENCH
-    // generate the test bench
-    _vhdl_testbench->generate_file();
-    delete _vhdl_testbench;
-#endif
-
 #ifdef STATISTICS
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp	(revision 42)
@@ -20,9 +20,30 @@
   void Branch_History_Table::allocation (void)
   {
-    string rename;
-
-     in_CLOCK           = new SC_CLOCK           ("in_CLOCK");
-     in_NRESET          = new SC_IN (Tcontrol_t) ("in_NRESET");
-
+    _component   = new Component ();
+
+    Entity * entity = _component->set_entity (_name                 
+					     ,"Branch_History_Table"
+#ifdef POSITION
+					     ,MIXTE                
+#endif
+					      );
+    
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 , IN  
+							 , SOUTH
+							 , "Generalist interface"
+#endif
+							 );
+      
+      in_CLOCK              = interface->set_signal_clk              ("clock" ,1);
+      in_NRESET             = interface->set_signal_in  <Tcontrol_t> ("nreset",1,RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      in_PREDICT_VAL     = new SC_IN (Tcontrol_t) * [_param._nb_prediction];
     out_PREDICT_ACK     = new SC_OUT(Tcontrol_t) * [_param._nb_prediction];
@@ -32,71 +53,65 @@
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-	rename = "in_PREDICT_VAL["     +toString(i)+"]";
-	 in_PREDICT_VAL     [i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	rename = "out_PREDICT_ACK["    +toString(i)+"]";
-	out_PREDICT_ACK     [i] = new SC_OUT(Tcontrol_t) (rename.c_str());
-
-	rename = "in_PREDICT_ADDRESS["+toString(i)+"]";
-	 in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str());
-
-	rename = "out_PREDICT_HISTORY["+toString(i)+"]";
-	out_PREDICT_HISTORY [i] = new SC_OUT(Thistory_t) (rename.c_str());
-      }
-
-        in_BRANCH_COMPLETE_VAL     = new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
-       out_BRANCH_COMPLETE_ACK     = new SC_OUT    (Tcontrol_t) * [_param._nb_branch_complete];
-        in_BRANCH_COMPLETE_ADDRESS = new SC_IN     (Taddress_t) * [_param._nb_branch_complete];
-        in_BRANCH_COMPLETE_HISTORY = new SC_IN     (Thistory_t) * [_param._nb_branch_complete];
-        in_BRANCH_COMPLETE_DIRECTION= new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
-    signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete];
+	Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i)
+#ifdef POSITION
+								, IN  
+								, WEST
+								, "Interface Predict"
+#endif
+							   );
+
+	 in_PREDICT_VAL     [i] = interface->set_signal_valack_in        ("val"    , VAL);
+	out_PREDICT_ACK     [i] = interface->set_signal_valack_out       ("ack"    , ACK);
+	 in_PREDICT_ADDRESS [i] = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
+	out_PREDICT_HISTORY [i] = interface->set_signal_out <Thistory_t> ("history", _param._size_shifter);
+      }
+
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+        in_BRANCH_COMPLETE_VAL       = new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
+       out_BRANCH_COMPLETE_ACK       = new SC_OUT    (Tcontrol_t) * [_param._nb_branch_complete];
+        in_BRANCH_COMPLETE_ADDRESS   = new SC_IN     (Taddress_t) * [_param._nb_branch_complete];
+        in_BRANCH_COMPLETE_HISTORY   = new SC_IN     (Thistory_t) * [_param._nb_branch_complete];
+        in_BRANCH_COMPLETE_DIRECTION = new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
 
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	 rename = "in_BRANCH_COMPLETE_VAL["    +toString(i)+"]";
-	  in_BRANCH_COMPLETE_VAL     [i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	 rename = "out_BRANCH_COMPLETE_ACK["   +toString(i)+"]";
-	 out_BRANCH_COMPLETE_ACK     [i] = new SC_OUT(Tcontrol_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_ADDRESS["+toString(i)+"]";
-	  in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_HISTORY["+toString(i)+"]";
-	  in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_DIRECTION["    +toString(i)+"]";
-	  in_BRANCH_COMPLETE_DIRECTION[i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	 rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]";
-	 signal_BRANCH_COMPLETE_HISTORY [i] = new SC_SIGNAL (Thistory_t) (rename.c_str());
-
+	Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i)
+#ifdef POSITION
+								, IN  
+								, EAST
+								, "Interface branch complete"
+#endif
+								);
+
+	 in_BRANCH_COMPLETE_VAL        [i] = interface->set_signal_valack_in        ("val"      , VAL);
+	out_BRANCH_COMPLETE_ACK        [i] = interface->set_signal_valack_out       ("ack"      , ACK);
+	 in_BRANCH_COMPLETE_ADDRESS    [i] = interface->set_signal_in  <Taddress_t> ("address"  , static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
+	 in_BRANCH_COMPLETE_HISTORY    [i] = interface->set_signal_in  <Thistory_t> ("history"  , _param._size_shifter);
+	 in_BRANCH_COMPLETE_DIRECTION  [i] = interface->set_signal_in  <Tcontrol_t> ("direction", 1);
       }
     
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     string name_component;
+
     // =====[ component_Shifter ]=========================================    
     
     name_component = _name+"_Shifter";
 
-    component_Shifter = new morpheo::behavioural::generic::shifter::Shifter (name_component.c_str(),
+    component_Shifter = new morpheo::behavioural::generic::shifter::Shifter (name_component.c_str()
 #ifdef STATISTICS
-									     _param_statistics             ,
-#endif
-									     *(_param._param_shifter)      );
-    
-    
-    // Instantiation
-#if (defined(STATISTICS) || defined (VHDL_TESTBENCH))
-    (*(component_Shifter->in_CLOCK))        (*(in_CLOCK));
-#endif
-
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      {
-	(*(component_Shifter-> in_SHIFTER_DATA       [i]))    (*(    in_BRANCH_COMPLETE_HISTORY  [i]));
-	(*(component_Shifter-> in_SHIFTER_CARRY_IN   [i]))    (*(    in_BRANCH_COMPLETE_DIRECTION[i]));
-	(*(component_Shifter->out_SHIFTER_DATA       [i]))    (*(signal_BRANCH_COMPLETE_HISTORY  [i]));
-      }
-    
+									     ,_param_statistics
+#endif
+									     ,*(_param._param_shifter));
+
+    _component->set_component (component_Shifter->_component
+#ifdef POSITION
+			       , 25
+			       , 25
+			       , 10
+			       , 10
+#endif
+			       );
+
      // =====[ component_RegisterFile ]====================================    
     
@@ -105,27 +120,85 @@
     component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(),
 #ifdef STATISTICS
-											    _param_statistics            ,
-#endif
-											    *(_param._param_registerfile));
+															       _param_statistics            ,
+#endif
+															       *(_param._param_registerfile));
+
+    _component->set_component (component_RegisterFile->_component
+#ifdef POSITION
+			       , 75
+			       , 75
+			       , 10
+			       , 10
+#endif
+			       );
      
-    // Instantiation
-    (*(component_RegisterFile->in_CLOCK ))       (*(in_CLOCK ));
-    (*(component_RegisterFile->in_NRESET))       (*(in_NRESET));
+    // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+     // =====[ component_RegisterFile - Instanciation ]====================    
+
+#ifdef POSITION
+    _component->interface_map (_name+"_RegisterFile","",
+			       _name                ,"");
+#endif
+
+    _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" );
+    _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET");
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-	(*(component_RegisterFile-> in_READ_VAL      [i])) (*( in_PREDICT_VAL      [i]));
-	(*(component_RegisterFile->out_READ_ACK      [i])) (*(out_PREDICT_ACK      [i]));
-	(*(component_RegisterFile-> in_READ_ADDRESS  [i])) (*( in_PREDICT_ADDRESS  [i]));
-	(*(component_RegisterFile->out_READ_DATA     [i])) (*(out_PREDICT_HISTORY  [i]));    
+#ifdef POSITION
+	_component->interface_map (_name+"_RegisterFile","read_"   +toString(i),
+				   _name                ,"predict_"+toString(i));
+#endif
+
+ 	_component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL"    , _name, "in_PREDICT_"+toString(i)+"_VAL"    );
+ 	_component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK"    , _name,"out_PREDICT_"+toString(i)+"_ACK"    );
+ 	_component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS");
+ 	_component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA"   , _name,"out_PREDICT_"+toString(i)+"_HISTORY");
       }
     
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	(*(component_RegisterFile-> in_WRITE_VAL     [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
-	(*(component_RegisterFile->out_WRITE_ACK     [i])) (*(   out_BRANCH_COMPLETE_ACK      [i]));
-	(*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*(    in_BRANCH_COMPLETE_ADDRESS  [i]));
-	(*(component_RegisterFile-> in_WRITE_DATA    [i])) (*(signal_BRANCH_COMPLETE_HISTORY  [i]));    
-      }
+#ifdef POSITION
+	_component->interface_map (_name+"_RegisterFile","write_"  +toString(i),
+				   _name+"_Shifter"     ,"shifter_"+toString(i));
+#endif
+
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL"    , _name           , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL"    );
+ 	_component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK"    , _name           ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK"    );
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name           , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS");
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"   , _name+"_Shifter","out_SHIFTER_"        +toString(i)+"_DATA");
+      }
+
+    // =====[ component_Shifter - Instanciation ]=========================    
+
+#if (defined(STATISTICS) || defined (VHDL_TESTBENCH))
+
+#ifdef POSITION
+    _component->interface_map (_name+"_Shifter","",
+			       _name           ,"");
+#endif
+
+    _component->port_map(_name+"_Shifter", "in_CLOCK" , _name,"in_CLOCK" );
+    _component->port_map(_name+"_Shifter", "in_NRESET", _name,"in_NRESET");
+
+#endif
+
+    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+      {
+#ifdef POSITION
+	_component->interface_map (_name+"_Shifter","shifter_"+toString(i),
+				   _name           ,"branch_complete_"+toString(i));
+
+#endif
+
+ 	_component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_DATA"    , _name                , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY");
+ 	_component->port_map(_name+"_Shifter", "in_SHIFTER_" +toString(i)+"_CARRY_IN", _name                , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION");
+ 	_component->port_map(_name+"_Shifter", "out_SHIFTER_"+toString(i)+"_DATA"    , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA");
+      }
+
+#ifdef POSITION
+    _component->generate_file();
+#endif
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp	(revision 42)
@@ -19,37 +19,23 @@
   void Branch_History_Table::deallocation (void)
   {
-    delete in_CLOCK;
-    delete in_NRESET;
+    delete     in_CLOCK;
+    delete     in_NRESET;
 
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	delete  in_PREDICT_VAL     [i];
-	delete out_PREDICT_ACK     [i];
-	delete  in_PREDICT_ADDRESS [i];
-	delete out_PREDICT_HISTORY [i];
-      }
+    delete []  in_PREDICT_VAL    ;
+    delete [] out_PREDICT_ACK    ;
+    delete []  in_PREDICT_ADDRESS;
+    delete [] out_PREDICT_HISTORY;
 
-    delete  in_PREDICT_VAL    ;
-    delete out_PREDICT_ACK    ;
-    delete  in_PREDICT_ADDRESS;
-    delete out_PREDICT_HISTORY;
-
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 delete  in_BRANCH_COMPLETE_VAL     [i];
-	 delete out_BRANCH_COMPLETE_ACK     [i];
-	 delete  in_BRANCH_COMPLETE_ADDRESS [i];
-	 delete  in_BRANCH_COMPLETE_HISTORY [i];
-	 delete  in_BRANCH_COMPLETE_DIRECTION[i];
-       }
-    delete  in_BRANCH_COMPLETE_VAL    ;
-    delete out_BRANCH_COMPLETE_ACK    ;
-    delete  in_BRANCH_COMPLETE_ADDRESS;
-    delete  in_BRANCH_COMPLETE_HISTORY;
-    delete  in_BRANCH_COMPLETE_DIRECTION;
+    delete []  in_BRANCH_COMPLETE_VAL    ;
+    delete [] out_BRANCH_COMPLETE_ACK    ;
+    delete []  in_BRANCH_COMPLETE_ADDRESS;
+    delete []  in_BRANCH_COMPLETE_HISTORY;
+    delete []  in_BRANCH_COMPLETE_DIRECTION;
 
      // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     delete component_Shifter;
     delete component_RegisterFile;
+    
+    delete _component;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl.cpp	(revision 42)
@@ -21,9 +21,9 @@
   void Branch_History_Table::vhdl (void)
   {
-    Vhdl vhdl (_name);
+    Vhdl * vhdl = new Vhdl (_name);
 
-    vhdl.set_library_work (_name + "_Pack");
-    vhdl.set_library_work (_name + "_RegisterFile_Pack");
-    vhdl.set_library_work (_name + "_Shifter_Pack");
+    vhdl->set_library_work (_name + "_Pack");
+    vhdl->set_library_work (_name + "_RegisterFile_Pack");
+    vhdl->set_library_work (_name + "_Shifter_Pack");
 
     vhdl_port   (vhdl);
@@ -32,5 +32,7 @@
     vhdl_body   (vhdl);
 
-    vhdl.generate_file();
+    vhdl->generate_file();
+
+    delete vhdl;
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp	(revision 42)
@@ -18,12 +18,12 @@
 
 
-  void Branch_History_Table::vhdl_body (Vhdl & vhdl)
+  void Branch_History_Table::vhdl_body (Vhdl * & vhdl)
   {
-//     vhdl.set_body ("-- Output : always at '1'");
+//     vhdl->set_body ("-- Output : always at '1'");
 //     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-//       vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
+//       vhdl->set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
 //     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-//       vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
-//     vhdl.set_body ("");
+//       vhdl->set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
+//     vhdl->set_body ("");
 
     list<string> list_port_map;
@@ -31,31 +31,31 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_DATA_"+toString(i)+"     ","    in_BRANCH_COMPLETE_HISTORY_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_CARRY_IN_"+toString(i)+" ","    in_BRANCH_COMPLETE_DIRECTION_"+toString(i)    );
-	vhdl.set_body_component_port_map (list_port_map,"out_SHIFTER_DATA_"+toString(i)+"     ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));
+	vhdl->set_body_component_port_map (list_port_map," in_SHIFTER_"+toString(i)+"_DATA     ","    in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"  );
+	vhdl->set_body_component_port_map (list_port_map," in_SHIFTER_"+toString(i)+"_CARRY_IN ","    in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION");
+	vhdl->set_body_component_port_map (list_port_map,"out_SHIFTER_"+toString(i)+"_DATA     ","signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"  );
       }
 
-    vhdl.set_body_component ("component_Shifter",_name+"_Shifter",list_port_map);
+    vhdl->set_body_component ("component_Shifter",_name+"_Shifter",list_port_map);
 
     list_port_map.clear();
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
-    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
+    vhdl->set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl->set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-	vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+"     "," in_PREDICT_VAL_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+"     ","out_PREDICT_ACK_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+"    ","out_PREDICT_HISTORY_"+toString(i));    
+	vhdl->set_body_component_port_map (list_port_map," in_READ_"+toString(i)+"_VAL     "," In_PREDICT_"+toString(i)+"_VAL");
+	vhdl->set_body_component_port_map (list_port_map,"out_READ_"+toString(i)+"_ACK     ","out_PREDICT_"+toString(i)+"_ACK");
+	vhdl->set_body_component_port_map (list_port_map," in_READ_"+toString(i)+"_ADDRESS "," in_PREDICT_"+toString(i)+"_ADDRESS");
+	vhdl->set_body_component_port_map (list_port_map,"out_READ_"+toString(i)+"_DATA    ","out_PREDICT_"+toString(i)+"_HISTORY");
       }
     
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+"    ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
-	vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+"    ","   out_BRANCH_COMPLETE_ACK_"+toString(i)+"");
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+"","    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+"   ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));
+	vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_VAL    ","    in_BRANCH_COMPLETE_"+toString(i)+"_VAL");
+	vhdl->set_body_component_port_map (list_port_map,"out_WRITE_"+toString(i)+"_ACK    ","   out_BRANCH_COMPLETE_"+toString(i)+"_ACK");
+	vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_ADDRESS","    in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS");
+	vhdl->set_body_component_port_map (list_port_map," in_WRITE_"+toString(i)+"_DATA   ","signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY");
       }
-    vhdl.set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map);
+    vhdl->set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp	(revision 42)
@@ -18,24 +18,7 @@
 
 
-  void Branch_History_Table::vhdl_port (Vhdl & vhdl)
+  void Branch_History_Table::vhdl_port (Vhdl * & vhdl)
   {
-    vhdl.set_port (" in_CLOCK" , IN, 1);
-    vhdl.set_port (" in_NRESET", IN, 1);
-    
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+"               ", IN, 1);
-	vhdl.set_port("out_PREDICT_ACK_"+toString(i)+"               ",OUT, 1);
-	vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+"           ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
-	vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+"           ",OUT, _param._size_shifter);
-      }
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+"      ", IN, 1);
-	 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+"      ",OUT, 1);
-	 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"  ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
-	 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+"  ", IN, _param._size_shifter);
-	 vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1);
-       }
+    _interfaces->set_port(vhdl);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp	(revision 42)
@@ -17,8 +17,8 @@
 namespace branch_history_table {
 
-  void Branch_History_Table::vhdl_signal (Vhdl & vhdl)
+  void Branch_History_Table::vhdl_signal (Vhdl * & vhdl)
   {
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      vhdl.set_signal  ("signal_BRANCH_COMPLETE_HISTORY_"+toString(i), _param._size_shifter);
+      vhdl->set_signal  ("signal_BRANCH_COMPLETE_"+toString(i)+"_HISTORY", _param._size_shifter);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_label.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_label.cpp	(revision 23)
+++ 	(revision )
@@ -1,31 +1,0 @@
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace stage_1_ifetch {
-namespace predictor {
-namespace meta_predictor {
-namespace two_level_branch_predictor {
-namespace branch_history_table {
-
-  void Branch_History_Table::vhdl_testbench_label (string label)
-  {
-#ifdef VHDL_TESTBENCH
-    _vhdl_testbench->add_label(label);
-#endif
-  };
-
-}; // end namespace branch_history_table
-}; // end namespace two_level_branch_predictor
-}; // end namespace meta_predictor
-}; // end namespace predictor
-}; // end namespace stage_1_ifetch
-}; // end namespace behavioural
-}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp	(revision 23)
+++ 	(revision )
@@ -1,47 +1,0 @@
-#ifdef VHDL_TESTBENCH
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace stage_1_ifetch {
-namespace predictor {
-namespace meta_predictor {
-namespace two_level_branch_predictor {
-namespace branch_history_table {
-
-  void Branch_History_Table::vhdl_testbench_port (void)
-  {
-    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	_vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+"               ", IN, 1);
-	_vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+"               ",OUT, 1);
-	_vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+"           ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
-	_vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+"           ",OUT, _param._size_shifter);
-      }
-
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+"      ", IN, 1);
-	 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+"      ",OUT, 1);
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"  ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+"  ", IN, _param._size_shifter);
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1);
-       }
-  };
-
-}; // end namespace branch_history_table
-}; // end namespace two_level_branch_predictor
-}; // end namespace meta_predictor
-}; // end namespace predictor
-}; // end namespace stage_1_ifetch
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp	(revision 42)
@@ -20,35 +20,7 @@
   void Branch_History_Table::vhdl_testbench_transition (void)
   {
-    // In order with file Branch_History_Table_vhdl_testbench_port.cpp
-#ifndef SYSTEMCASS_SPECIFIC
-    sc_cycle(0);
-#endif    
+    sc_start(0);
 
-    _vhdl_testbench->add_input  (PORT_READ( in_NRESET));
-
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	_vhdl_testbench->add_input  (PORT_READ( in_PREDICT_VAL     [i]));
-	_vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK  [i]));
-	_vhdl_testbench->add_input  (PORT_READ( in_PREDICT_ADDRESS [i]));
-	_vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i]));
-      //_vhdl_testbench->add_output (PORT_READ(out_PREDICT_HISTORY [i]));
-      }
-
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_VAL     [i]));
-	 _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i]));
-       }
-    
-    // add_test :
-    //  - True  : the cycle must be compare with the output of systemC
-    //  - False : no test
-    _vhdl_testbench->add_test(true);
-
-    _vhdl_testbench->new_cycle (); // always at the end
+    _interfaces->testbench();
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_type.cpp	(revision 42)
@@ -18,5 +18,5 @@
 
 
-  void Branch_History_Table::vhdl_type (Vhdl & vhdl)
+  void Branch_History_Table::vhdl_type (Vhdl * & vhdl)
   {
   };
