Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/configuration.cfg	(revision 42)
@@ -1,5 +1,5 @@
 Pattern_History_Table
-2	8	*2	# size_counter      	
-2	64	*4	# nb_counter        
-1	2	+1	# nb_prediction     
-1	2	+1	# nb_branch_complete
+8	8	*2	# size_counter      	
+64	64	*4	# nb_counter        
+2	2	+1	# nb_prediction     
+2	2	+1	# nb_branch_complete
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info	(revision 42)
@@ -0,0 +1,6 @@
+
+# Pattern_History_Table_0
+target_dep	all	Pattern_History_Table_0.ngc
+target_dep	Pattern_History_Table_0.ngc	Pattern_History_Table_0.prj
+target_dep	Pattern_History_Table_0.prj	Pattern_History_Table_0_Counter_Pack.vhdl Pattern_History_Table_0_Counter.vhdl Pattern_History_Table_0_Pack.vhdl Pattern_History_Table_0_RegisterFile_Pack.vhdl Pattern_History_Table_0_RegisterFile.vhdl Pattern_History_Table_0.vhdl
+
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp	(revision 42)
@@ -7,5 +7,5 @@
  */
 
-#define NB_ITERATION 1024
+#define NB_ITERATION 512
 
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/include/test.h"
@@ -93,5 +93,4 @@
 
   sc_start(0);
-  _Pattern_History_Table->vhdl_testbench_label("Initialisation");
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
   
@@ -127,10 +126,8 @@
   sc_start(0);
 
-  _Pattern_History_Table->vhdl_testbench_label("Loop of Test");
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl;
 
   for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
     {
-      _Pattern_History_Table->vhdl_testbench_label("Iteration "+toString(iteration));
       num_port_branch_complete = rand() % param._nb_branch_complete;
       num_port_predict         = rand() % param._nb_prediction     ;
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h	(revision 42)
@@ -29,7 +29,5 @@
 #include "Behavioural/include/Vhdl.h"
 #endif
-#ifdef VHDL_TESTBENCH
-#include "Behavioural/include/Vhdl_Testbench.h"
-#endif
+#include "Behavioural/include/Component.h"
 
 using namespace std;
@@ -62,7 +60,6 @@
 #endif
 
-#ifdef VHDL_TESTBENCH
-  private   : Vhdl_Testbench                 * _vhdl_testbench;
-#endif
+  public    : Component                      * _component;
+  private   : Interfaces                     * _interfaces;
 
 #ifdef SYSTEMC
@@ -125,17 +122,12 @@
   public  : string   statistics                (uint32_t depth);
 #endif
-					       
 #if VHDL				       
   public  : void     vhdl                      (void);
-  private : void     vhdl_port                 (Vhdl & vhdl);
-  private : void     vhdl_declaration          (Vhdl & vhdl);
-  private : void     vhdl_body                 (Vhdl & vhdl);
+  private : void     vhdl_declaration          (Vhdl * & vhdl);
+  private : void     vhdl_body                 (Vhdl * & vhdl);
 #endif					       
-					       
 #ifdef VHDL_TESTBENCH			       
-  private : void     vhdl_testbench_port       (void);
   private : void     vhdl_testbench_transition (void);
 #endif
-  public  : void     vhdl_testbench_label      (string label);
   };
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp	(revision 42)
@@ -33,5 +33,9 @@
   {
     log_printf(FUNC,Pattern_History_Table,"Pattern_History_Table","Begin");
-    
+   
+#ifdef SYSTEMC
+    allocation ();
+#endif
+ 
 #ifdef STATISTICS
     // Allocation of statistics
@@ -39,13 +43,4 @@
 			    param_statistics          ,
 			    param);
-#endif
-
-#ifdef VHDL_TESTBENCH
-    // Creation of a testbench
-    //  -> port
-    //  -> clock's signals
-    _vhdl_testbench = new Vhdl_Testbench (_name);
-    vhdl_testbench_port           ();
-    _vhdl_testbench->set_clock    ("in_CLOCK",true);
 #endif
 
@@ -56,6 +51,4 @@
 
 #ifdef SYSTEMC
-    allocation ();
-
 //     // Constant
 //     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
@@ -82,10 +75,4 @@
     log_printf(FUNC,Pattern_History_Table,"~Pattern_History_Table","Begin");
 
-#ifdef VHDL_TESTBENCH
-    // generate the test bench
-    _vhdl_testbench->generate_file();
-    delete _vhdl_testbench;
-#endif
-
 #ifdef STATISTICS
     _stat->generate_file(statistics(0));
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp	(revision 42)
@@ -20,11 +20,32 @@
   void Pattern_History_Table::allocation (void)
   {
-    string rename;
-
     log_printf(FUNC,Pattern_History_Table,"allocation","Begin");
 
-    in_CLOCK  = new SC_CLOCK           ("in_CLOCK");
-    in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");
-
+    _component   = new Component ();
+
+    Entity * entity = _component->set_entity (_name                 
+					     ,"Pattern_History_Table"
+#ifdef POSITION
+					     ,MIXTE                
+#endif
+					      );
+    
+    _interfaces = entity->set_interfaces();
+
+    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    {
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+							 , IN  
+							 , SOUTH
+							 , "Generalist interface"
+#endif
+							 );
+      
+      in_CLOCK              = interface->set_signal_clk              ("clock" ,1);
+      in_NRESET             = interface->set_signal_in  <Tcontrol_t> ("nreset",1,RESET_VHDL_YES);
+    }
+
+    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      in_PREDICT_VAL     = new SC_IN (Tcontrol_t) * [_param._nb_prediction];
     out_PREDICT_ACK     = new SC_OUT(Tcontrol_t) * [_param._nb_prediction];
@@ -34,16 +55,19 @@
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-	rename = "in_PREDICT_VAL["     +toString(i)+"]";
-	 in_PREDICT_VAL     [i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	rename = "out_PREDICT_ACK["    +toString(i)+"]";
-	out_PREDICT_ACK     [i] = new SC_OUT(Tcontrol_t) (rename.c_str());
-
-	rename = "in_PREDICT_ADDRESS["+toString(i)+"]";
-	 in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str());
-
-	rename = "out_PREDICT_HISTORY["+toString(i)+"]";
-	out_PREDICT_HISTORY [i] = new SC_OUT(Thistory_t) (rename.c_str());
-      }
+	Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i)
+#ifdef POSITION
+								, IN  
+								, WEST
+								, "Interface Predict"
+#endif
+								);
+
+	 in_PREDICT_VAL     [i] = interface->set_signal_valack_in        ("val"    , VAL);
+	out_PREDICT_ACK     [i] = interface->set_signal_valack_out       ("ack"    , ACK);
+	 in_PREDICT_ADDRESS [i] = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
+	out_PREDICT_HISTORY [i] = interface->set_signal_out <Thistory_t> ("history", _param._size_counter);
+      }
+    
+    // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
         in_BRANCH_COMPLETE_VAL       = new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
@@ -52,82 +76,131 @@
         in_BRANCH_COMPLETE_HISTORY   = new SC_IN     (Thistory_t) * [_param._nb_branch_complete];
         in_BRANCH_COMPLETE_DIRECTION = new SC_IN     (Tcontrol_t) * [_param._nb_branch_complete];
-    signal_BRANCH_COMPLETE_HISTORY   = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete];
 
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	 rename = "in_BRANCH_COMPLETE_VAL["    +toString(i)+"]";
-	  in_BRANCH_COMPLETE_VAL     [i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	 rename = "out_BRANCH_COMPLETE_ACK["   +toString(i)+"]";
-	 out_BRANCH_COMPLETE_ACK     [i] = new SC_OUT(Tcontrol_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_ADDRESS["+toString(i)+"]";
-	  in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_HISTORY["+toString(i)+"]";
-	  in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str());
-
-	 rename = "in_BRANCH_COMPLETE_DIRECTION["    +toString(i)+"]";
-	  in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str());
-
-	 rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]";
-	 signal_BRANCH_COMPLETE_HISTORY [i] = new SC_SIGNAL (Thistory_t) (rename.c_str());
-
-      }
-    
+	Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i)
+#ifdef POSITION
+								, IN  
+								, EAST
+								, "Interface branch complete"
+#endif
+								);
+
+	 in_BRANCH_COMPLETE_VAL        [i] = interface->set_signal_valack_in        ("val"      , VAL);
+	out_BRANCH_COMPLETE_ACK        [i] = interface->set_signal_valack_out       ("ack"      , ACK);
+	 in_BRANCH_COMPLETE_ADDRESS    [i] = interface->set_signal_in  <Taddress_t> ("address"  , static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
+	 in_BRANCH_COMPLETE_HISTORY    [i] = interface->set_signal_in  <Thistory_t> ("history"  , _param._size_counter);
+	 in_BRANCH_COMPLETE_DIRECTION  [i] = interface->set_signal_in  <Tcontrol_t> ("direction", 1);
+      }
+
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     string name_component;
+
     // =====[ component_Counter ]=========================================    
     
     name_component = _name+"_Counter";
 
-    component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str(),
+    component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str()
 #ifdef STATISTICS
-									     _param_statistics             ,
-#endif
-									     *(_param._param_counter)      );
-    
-    
-    // Instantiation
+									     ,_param_statistics
+#endif
+									     ,*(_param._param_counter));
+
+    _component->set_component (component_Counter->_component
+#ifdef POSITION
+			       , 25
+			       , 25
+			       , 10
+			       , 10
+#endif
+			       );
+
+     // =====[ component_RegisterFile ]====================================    
+    
+    name_component = _name+"_RegisterFile";
+    
+    component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(),
+#ifdef STATISTICS
+															       _param_statistics            ,
+#endif
+															       *(_param._param_registerfile));
+
+    _component->set_component (component_RegisterFile->_component
+#ifdef POSITION
+			       , 75
+			       , 75
+			       , 10
+			       , 10
+#endif
+			       );
+     
+    // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
+
+    // =====[ component_RegisterFile - Instanciation ]====================    
+
+#ifdef POSITION
+    _component->interface_map (_name+"_RegisterFile","",
+			       _name                ,"");
+#endif
+
+    _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" );
+    _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET");
+    
+    for (uint32_t i=0; i<_param._nb_prediction; i++)
+      {
+#ifdef POSITION
+	_component->interface_map (_name+"_RegisterFile","read_"   +toString(i),
+				   _name                ,"predict_"+toString(i));
+#endif
+
+ 	_component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL"    , _name, "in_PREDICT_"+toString(i)+"_VAL"    );
+ 	_component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK"    , _name,"out_PREDICT_"+toString(i)+"_ACK"    );
+ 	_component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS");
+ 	_component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA"   , _name,"out_PREDICT_"+toString(i)+"_HISTORY");
+      }
+    
+    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+      {
+#ifdef POSITION
+	_component->interface_map (_name+"_RegisterFile","write_"  +toString(i),
+				   _name+"_Counter"     ,"counter_"+toString(i));
+#endif
+
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL"    , _name           , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL"    );
+ 	_component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK"    , _name           ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK"    );
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name           , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS");
+ 	_component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"   , _name+"_Counter","out_COUNTER_"        +toString(i)+"_DATA");
+      }
+
+    // =====[ component_Counter - Instanciation ]=========================    
+
 #if (defined(STATISTICS) || defined (VHDL_TESTBENCH))
-    (*(component_Counter->in_CLOCK))        (*(in_CLOCK));
+
+#ifdef POSITION
+    _component->interface_map (_name+"_Counter","",
+			       _name           ,"");
+#endif
+
+    _component->port_map(_name+"_Counter", "in_CLOCK" , _name,"in_CLOCK" );
+    _component->port_map(_name+"_Counter", "in_NRESET", _name,"in_NRESET");
+
 #endif
 
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-	(*(component_Counter-> in_COUNTER_DATA       [i]))    (*(    in_BRANCH_COMPLETE_HISTORY   [i]));
-	(*(component_Counter-> in_COUNTER_ADDSUB     [i]))    (*(    in_BRANCH_COMPLETE_DIRECTION [i]));
-	(*(component_Counter->out_COUNTER_DATA       [i]))    (*(signal_BRANCH_COMPLETE_HISTORY   [i]));
-      }
-    
-     // =====[ component_RegisterFile ]====================================    
-    
-    name_component = _name+"_RegisterFile";
-    
-    component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic (name_component.c_str(),
-#ifdef STATISTICS
-																_param_statistics            ,
-#endif
-																*(_param._param_registerfile));
-    
-    // Instantiation
-    (*(component_RegisterFile->in_CLOCK))        (*(in_CLOCK));
-    (*(component_RegisterFile->in_NRESET))       (*(in_NRESET));
-
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	(*(component_RegisterFile-> in_READ_VAL      [i])) (*( in_PREDICT_VAL      [i]));
-	(*(component_RegisterFile->out_READ_ACK      [i])) (*(out_PREDICT_ACK      [i]));
-	(*(component_RegisterFile-> in_READ_ADDRESS  [i])) (*( in_PREDICT_ADDRESS  [i]));
-	(*(component_RegisterFile->out_READ_DATA     [i])) (*(out_PREDICT_HISTORY  [i]));    
-      }
-    
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      {
-	(*(component_RegisterFile-> in_WRITE_VAL     [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
-	(*(component_RegisterFile->out_WRITE_ACK     [i])) (*(   out_BRANCH_COMPLETE_ACK      [i]));
-	(*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*(    in_BRANCH_COMPLETE_ADDRESS  [i]));
-	(*(component_RegisterFile-> in_WRITE_DATA    [i])) (*(signal_BRANCH_COMPLETE_HISTORY  [i]));    
-      }
+#ifdef POSITION
+	_component->interface_map (_name+"_Counter","counter_"+toString(i),
+				   _name           ,"branch_complete_"+toString(i));
+
+#endif
+
+ 	_component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_DATA"    , _name                , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY");
+ 	_component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_ADDSUB"  , _name                , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION");
+ 	_component->port_map(_name+"_Counter", "out_COUNTER_"+toString(i)+"_DATA"    , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA");
+      }
+
+#ifdef POSITION
+    _component->generate_file();
+#endif
 
     log_printf(FUNC,Pattern_History_Table,"allocation","End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp	(revision 42)
@@ -22,37 +22,23 @@
     log_printf(FUNC,Pattern_History_Table,"deallocation","Begin");
 
-    delete in_CLOCK;
-    delete in_NRESET;
+    delete     in_CLOCK;
+    delete     in_NRESET;
 
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	delete  in_PREDICT_VAL     [i];
-	delete out_PREDICT_ACK     [i];
-	delete  in_PREDICT_ADDRESS [i];
-	delete out_PREDICT_HISTORY [i];
-      }
+    delete []  in_PREDICT_VAL    ;
+    delete [] out_PREDICT_ACK    ;
+    delete []  in_PREDICT_ADDRESS;
+    delete [] out_PREDICT_HISTORY;
 
-    delete  in_PREDICT_VAL    ;
-    delete out_PREDICT_ACK    ;
-    delete  in_PREDICT_ADDRESS;
-    delete out_PREDICT_HISTORY;
-
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 delete  in_BRANCH_COMPLETE_VAL       [i];
-	 delete out_BRANCH_COMPLETE_ACK       [i];
-	 delete  in_BRANCH_COMPLETE_ADDRESS   [i];
-	 delete  in_BRANCH_COMPLETE_HISTORY   [i];
-	 delete  in_BRANCH_COMPLETE_DIRECTION [i];
-       }
-    delete  in_BRANCH_COMPLETE_VAL    ;
-    delete out_BRANCH_COMPLETE_ACK    ;
-    delete  in_BRANCH_COMPLETE_ADDRESS;
-    delete  in_BRANCH_COMPLETE_HISTORY;
-    delete  in_BRANCH_COMPLETE_DIRECTION;
+    delete []  in_BRANCH_COMPLETE_VAL    ;
+    delete [] out_BRANCH_COMPLETE_ACK    ;
+    delete []  in_BRANCH_COMPLETE_ADDRESS;
+    delete []  in_BRANCH_COMPLETE_HISTORY;
+    delete []  in_BRANCH_COMPLETE_DIRECTION;
 
      // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
     delete component_Counter;
     delete component_RegisterFile;
+    
+    delete _component;
 
     log_printf(FUNC,Pattern_History_Table,"deallocation","End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl.cpp	(revision 42)
@@ -22,15 +22,16 @@
   {
     log_printf(FUNC,Pattern_History_Table,"vhdl","Begin");
-    Vhdl vhdl (_name);
+    Vhdl * vhdl = new Vhdl (_name);
 
-    vhdl.set_library_work (_name + "_Pack");
-    vhdl.set_library_work (_name + "_RegisterFile_Pack");
-    vhdl.set_library_work (_name + "_Counter_Pack");
+    _interfaces->set_port(vhdl);
+    _component->vhdl_instance(vhdl);
 
-    vhdl_port        (vhdl);
     vhdl_declaration (vhdl);
     vhdl_body        (vhdl);
 
-    vhdl.generate_file();
+    vhdl->generate_file();
+
+    delete vhdl;
+
     log_printf(FUNC,Pattern_History_Table,"vhdl","End");
 
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp	(revision 42)
@@ -18,46 +18,14 @@
 
 
-  void Pattern_History_Table::vhdl_body (Vhdl & vhdl)
+  void Pattern_History_Table::vhdl_body (Vhdl * & vhdl)
   {
     log_printf(FUNC,Pattern_History_Table,"vhdl_body","Begin");
 
-//     vhdl.set_body ("-- Output : always at '1'");
+//     vhdl->set_body ("-- Output : always at '1'");
 //     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-//       vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
+//       vhdl->set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
 //     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-//       vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
-//     vhdl.set_body ("");
-
-    list<string> list_port_map;
-
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      {
-	vhdl.set_body_component_port_map (list_port_map," in_COUNTER_DATA_"+toString(i)+"     ","    in_BRANCH_COMPLETE_HISTORY_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_COUNTER_ADDSUB_"+toString(i)+"   ","    in_BRANCH_COMPLETE_DIRECTION_"+toString(i)    );
-	vhdl.set_body_component_port_map (list_port_map,"out_COUNTER_DATA_"+toString(i)+"     ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));
-      }
-    vhdl.set_body_component ("component_Counter",_name+"_Counter",list_port_map);
-
-
-    list_port_map.clear();
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
-    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
-
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+"     "," in_PREDICT_VAL_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+"     ","out_PREDICT_ACK_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+"    ","out_PREDICT_HISTORY_"+toString(i));    
-      }
-    
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      {
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+"    ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
-	vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+"    ","   out_BRANCH_COMPLETE_ACK_"+toString(i)+"");
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+"","    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
-	vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+"   ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));
-      }
-    vhdl.set_body_component ("component_RegisterFile",_name+"_RegisterFile",list_port_map);
+//       vhdl->set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
+//     vhdl->set_body ("");
 
     log_printf(FUNC,Pattern_History_Table,"vhdl_body","End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp	(revision 42)
@@ -18,29 +18,12 @@
 
 
-  void Pattern_History_Table::vhdl_port (Vhdl & vhdl)
-  {
-    log_printf(FUNC,Pattern_History_Table,"vhdl_port","Begin");
+//   void Pattern_History_Table::vhdl_port (Vhdl * & vhdl)
+//   {
+//     log_printf(FUNC,Pattern_History_Table,"vhdl_port","Begin");
 
-    vhdl.set_port (" in_CLOCK" , IN, 1);
-    vhdl.set_port (" in_NRESET", IN, 1);
+//     _interfaces->set_port(vhdl);
 
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+"               ", IN, 1);
-	vhdl.set_port("out_PREDICT_ACK_"+toString(i)+"               ",OUT, 1);
-	vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+"           ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
-	vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+"           ",OUT, _param._size_counter);
-      }
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+"      ", IN, 1);
-	 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+"      ",OUT, 1);
-	 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"  ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
-	 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+"  ", IN, _param._size_counter);
-	 vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1);
-       }
-
-    log_printf(FUNC,Pattern_History_Table,"vhdl_port","End");
-  };
+//     log_printf(FUNC,Pattern_History_Table,"vhdl_port","End");
+//   };
 
 }; // end namespace pattern_history_table
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_signal.cpp	(revision 42)
@@ -18,10 +18,7 @@
 
 
-  void Pattern_History_Table::vhdl_declaration (Vhdl & vhdl)
+  void Pattern_History_Table::vhdl_declaration (Vhdl * & vhdl)
   {
     log_printf(FUNC,Pattern_History_Table,"vhdl_declaration","Begin");
-
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      vhdl.set_signal  ("signal_BRANCH_COMPLETE_HISTORY_"+toString(i), _param._size_counter);
 
     log_printf(FUNC,Pattern_History_Table,"vhdl_declaration","End");
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_label.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_label.cpp	(revision 23)
+++ 	(revision )
@@ -1,33 +1,0 @@
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace stage_1_ifetch {
-namespace predictor {
-namespace meta_predictor {
-namespace two_level_branch_predictor {
-namespace pattern_history_table {
-
-
-  void Pattern_History_Table::vhdl_testbench_label (string label)
-  {
-#ifdef VHDL_TESTBENCH
-    _vhdl_testbench->add_label(label);
-#endif
-  };
-
-}; // end namespace pattern_history_table
-}; // end namespace two_level_branch_predictor
-}; // end namespace meta_predictor
-}; // end namespace predictor
-}; // end namespace stage_1_ifetch
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp	(revision 23)
+++ 	(revision )
@@ -1,54 +1,0 @@
-#ifdef VHDL_TESTBENCH
-/*
- * $Id$
- *
- * [ Description ]
- * 
- */
-
-#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h"
-
-namespace morpheo                    {
-namespace behavioural {
-namespace stage_1_ifetch {
-namespace predictor {
-namespace meta_predictor {
-namespace two_level_branch_predictor {
-namespace pattern_history_table {
-
-
-  void Pattern_History_Table::vhdl_testbench_port ()
-  {
-    log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_port","Begin");
-
-    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
-
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	_vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+"              ", IN, 1);
-	_vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+"              ",OUT, 1);
-	_vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+"          ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
-	_vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+"          ",OUT, _param._size_counter);
-      }										  
-										  
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)			  
-       {									  
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+"      ", IN, 1);
-	 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+"      ",OUT, 1);
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"  ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+"  ", IN, _param._size_counter);
-	 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1);
-       }
-
-    log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_port","End");
-  };
-
-}; // end namespace pattern_history_table
-}; // end namespace two_level_branch_predictor
-}; // end namespace meta_predictor
-}; // end namespace predictor
-}; // end namespace stage_1_ifetch
-
-}; // end namespace behavioural
-}; // end namespace morpheo              
-#endif
Index: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp
===================================================================
--- trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp	(revision 23)
+++ trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp	(revision 42)
@@ -22,38 +22,7 @@
     log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","Begin");
 
-#ifndef SYSTEMCASS_SPECIFIC
-    sc_cycle(0);
-#endif    
+    sc_start(0);
 
-    // In order with file Pattern_History_Table_vhdl_testbench_port.cpp
-    // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
-    // (because we have no control on the ordonnancer's policy)
-
-    _vhdl_testbench->add_input  (PORT_READ( in_NRESET));
-
-    for (uint32_t i=0; i<_param._nb_prediction; i++)
-      {
-	_vhdl_testbench->add_input  (PORT_READ( in_PREDICT_VAL     [i]));
-	_vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK  [i]));
-	_vhdl_testbench->add_input  (PORT_READ( in_PREDICT_ADDRESS [i]));
-	_vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i]));
-      //_vhdl_testbench->add_output (PORT_READ(out_PREDICT_HISTORY [i]));
-      }
-
-     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-       {
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_VAL      [i]));
-	 _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_ADDRESS  [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_HISTORY  [i]));
-	 _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i]));
-       }
-        
-    // add_test :
-    //  - True  : the cycle must be compare with the output of systemC
-    //  - False : no test
-    _vhdl_testbench->add_test(true);
-
-    _vhdl_testbench->new_cycle (); // always at the end
+    _interfaces->testbench();
 
     log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","End");
