Changeset 55 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core
- Timestamp:
- Sep 24, 2007, 2:00:35 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit
- Files:
-
- 52 added
- 18 edited
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Read_queue/SelfTest/config0.cfg (modified) (1 diff)
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Read_queue/SelfTest/config1.cfg (modified) (1 diff)
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Read_queue/SelfTest/src/main.cpp (modified) (3 diffs)
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Read_queue/SelfTest/src/test.cpp (modified) (12 diffs)
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Read_queue/include/Parameters.h (modified) (2 diffs)
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Read_queue/include/Read_queue.h (modified) (1 diff)
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Read_queue/include/Types.h (modified) (1 diff)
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Read_queue/src/Parameters.cpp (modified) (3 diffs)
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Read_queue/src/Parameters_msg_error.cpp (modified) (1 diff)
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Read_queue/src/Parameters_print.cpp (modified) (1 diff)
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Read_queue/src/Read_queue.cpp (modified) (6 diffs)
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Read_queue/src/Read_queue_allocation.cpp (modified) (3 diffs)
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Read_queue/src/Read_queue_deallocation.cpp (modified) (1 diff)
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Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp (modified) (1 diff)
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Read_queue/src/Read_queue_genMealy_read_queue_out_spr.cpp (modified) (1 diff)
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Read_queue/src/Read_queue_genMealy_read_queue_out_val.cpp (modified) (2 diffs)
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Read_queue/src/Read_queue_genMoore.cpp (modified) (1 diff)
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Read_queue/src/Read_queue_transition.cpp (modified) (1 diff)
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Reservation_station/Makefile (added)
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Reservation_station/Makefile.defs (added)
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Reservation_station/Makefile.deps (added)
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Reservation_station/SelfTest (added)
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Reservation_station/SelfTest/Makefile (added)
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Reservation_station/SelfTest/configuration (added)
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Reservation_station/SelfTest/configuration.cfg (added)
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Reservation_station/SelfTest/include (added)
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Reservation_station/SelfTest/include/test.h (added)
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Reservation_station/SelfTest/src (added)
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Reservation_station/SelfTest/src/main.cpp (added)
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Reservation_station/SelfTest/src/test.cpp (added)
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Reservation_station/VERSION (added)
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Reservation_station/doc (added)
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Reservation_station/doc/Makefile (added)
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Reservation_station/doc/Reservation_station.tex (added)
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Reservation_station/doc/fig (added)
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Reservation_station/doc/sty (added)
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Reservation_station/doc/sty/header.sty (added)
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Reservation_station/doc/tex (added)
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Reservation_station/doc/tex/01_introduction.tex (added)
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Reservation_station/doc/tex/02_features.tex (added)
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Reservation_station/doc/tex/03_description.tex (added)
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Reservation_station/doc/tex/04_pinout.tex (added)
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Reservation_station/doc/tex/05_parameters.tex (added)
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Reservation_station/doc/tex/06_performance.tex (added)
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Reservation_station/doc/tex/07_details.tex (added)
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Reservation_station/doc/tex/08_history.tex (added)
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Reservation_station/doc/tex/root.tex (added)
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Reservation_station/include (added)
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Reservation_station/include/Parameters.h (added)
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Reservation_station/include/Reservation_station.h (added)
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Reservation_station/include/Statistics.h (added)
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Reservation_station/include/Types.h (added)
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Reservation_station/src (added)
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Reservation_station/src/Parameters.cpp (added)
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Reservation_station/src/Parameters_msg_error.cpp (added)
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Reservation_station/src/Parameters_print.cpp (added)
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Reservation_station/src/Reservation_station.cpp (added)
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Reservation_station/src/Reservation_station_allocation.cpp (added)
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Reservation_station/src/Reservation_station_deallocation.cpp (added)
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Reservation_station/src/Reservation_station_genMoore.cpp (added)
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Reservation_station/src/Reservation_station_statistics.cpp (added)
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Reservation_station/src/Reservation_station_transition.cpp (added)
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Reservation_station/src/Reservation_station_vhdl.cpp (added)
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Reservation_station/src/Reservation_station_vhdl_body.cpp (added)
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Reservation_station/src/Reservation_station_vhdl_declaration.cpp (added)
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Reservation_station/src/Reservation_station_vhdl_testbench_transition.cpp (added)
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Reservation_station/src/Statistics.cpp (added)
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Reservation_station/src/Statistics_add.cpp (added)
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Reservation_station/src/Statistics_print.cpp (added)
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Reservation_station/src/Statistics_print_body.cpp (added)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg
r54 r55 1 1 Read_queue 2 2 8 *2 # size_ read_queue2 2 8 *2 # size_queue 3 3 4 4 *2 # nb_context 4 4 32 32 *2 # nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config1.cfg
r54 r55 1 1 Read_queue 2 4 4 *2 # size_ read_queue2 4 4 *2 # size_queue 3 3 4 4 *2 # nb_context 4 4 32 32 *2 # nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/main.cpp
r54 r55 14 14 cerr << "<Usage> " << argv[0] << " name_instance list_params" << endl 15 15 << "list_params is :" << endl 16 << " - size_ read_queue(unsigned int)" << endl16 << " - size_queue (unsigned int)" << endl 17 17 << " - nb_context (unsigned int)" << endl 18 18 << " - nb_packet (unsigned int)" << endl … … 44 44 45 45 const string name = argv[1]; 46 const uint32_t size_ read_queue= atoi(argv[ 2]);46 const uint32_t size_queue = atoi(argv[ 2]); 47 47 const uint32_t nb_context = atoi(argv[ 3]); 48 48 const uint32_t nb_packet = atoi(argv[ 4]); … … 59 59 { 60 60 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue::Parameters 61 ( size_ read_queue61 ( size_queue 62 62 ,nb_context 63 63 ,nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp
r54 r55 11 11 #include "Common/include/Test.h" 12 12 13 #define NB_ITERATION 51214 #define CYCLE_MAX (1 28*NB_ITERATION)13 #define NB_ITERATION 64 14 #define CYCLE_MAX (1024*NB_ITERATION) 15 15 16 16 #define LABEL(str) \ … … 71 71 sc_signal<Tcontext_t > * READ_QUEUE_IN_CONTEXT_ID = new sc_signal<Tcontext_t > ("READ_QUEUE_IN_CONTEXT_ID "); 72 72 sc_signal<Tpacket_t > * READ_QUEUE_IN_PACKET_ID = new sc_signal<Tpacket_t > ("READ_QUEUE_IN_PACKET_ID "); 73 sc_signal< uint32_t > * READ_QUEUE_IN_OPERATION = new sc_signal<uint32_t> ("READ_QUEUE_IN_OPERATION ");73 sc_signal<Toperation_t > * READ_QUEUE_IN_OPERATION = new sc_signal<Toperation_t > ("READ_QUEUE_IN_OPERATION "); 74 74 sc_signal<Ttype_t > * READ_QUEUE_IN_TYPE = new sc_signal<Ttype_t > ("READ_QUEUE_IN_TYPE "); 75 75 sc_signal<Tcontrol_t > * READ_QUEUE_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > ("READ_QUEUE_IN_HAS_IMMEDIAT"); … … 92 92 sc_signal<Tcontext_t > * READ_QUEUE_OUT_CONTEXT_ID = new sc_signal<Tcontext_t > ("READ_QUEUE_OUT_CONTEXT_ID "); 93 93 sc_signal<Tpacket_t > * READ_QUEUE_OUT_PACKET_ID = new sc_signal<Tpacket_t > ("READ_QUEUE_OUT_PACKET_ID "); 94 sc_signal< uint32_t > * READ_QUEUE_OUT_OPERATION = new sc_signal<uint32_t> ("READ_QUEUE_OUT_OPERATION ");94 sc_signal<Toperation_t > * READ_QUEUE_OUT_OPERATION = new sc_signal<Toperation_t > ("READ_QUEUE_OUT_OPERATION "); 95 95 sc_signal<Ttype_t > * READ_QUEUE_OUT_TYPE = new sc_signal<Ttype_t > ("READ_QUEUE_OUT_TYPE "); 96 96 sc_signal<Tcontrol_t > * READ_QUEUE_OUT_HAS_IMMEDIAT= new sc_signal<Tcontrol_t > ("READ_QUEUE_OUT_HAS_IMMEDIAT"); … … 163 163 } 164 164 165 // ~~~~~[ Interface " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~166 167 sc_signal<Tcontrol_t > ** BYPASS_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];168 sc_signal<Tcontext_t > ** BYPASS_GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];169 sc_signal<Tgeneral_address_t > ** BYPASS_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t > * [_param->_nb_gpr_write];170 sc_signal<Tgeneral_data_t > ** BYPASS_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];165 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 166 167 sc_signal<Tcontrol_t > ** GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; 168 sc_signal<Tcontext_t > ** GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write]; 169 sc_signal<Tgeneral_address_t > ** GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t > * [_param->_nb_gpr_write]; 170 sc_signal<Tgeneral_data_t > ** GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write]; 171 171 172 172 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 173 173 { 174 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_VAL" ;175 BYPASS_GPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());176 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_CONTEXT_ID";177 BYPASS_GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());178 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_NUM_REG" ;179 BYPASS_GPR_WRITE_NUM_REG [i] = new sc_signal<Tgeneral_address_t > (rename.c_str());180 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_DATA" ;181 BYPASS_GPR_WRITE_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());182 } 183 184 // ~~~~~[ Interface " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~185 186 sc_signal<Tcontrol_t > ** BYPASS_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];187 sc_signal<Tcontext_t > ** BYPASS_SPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write];188 sc_signal<Tspecial_address_t > ** BYPASS_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t > * [_param->_nb_spr_write];189 sc_signal<Tspecial_data_t > ** BYPASS_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];174 rename = "GPR_WRITE_"+toString(i)+"_VAL" ; 175 GPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str()); 176 rename = "GPR_WRITE_"+toString(i)+"_CONTEXT_ID"; 177 GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str()); 178 rename = "GPR_WRITE_"+toString(i)+"_NUM_REG" ; 179 GPR_WRITE_NUM_REG [i] = new sc_signal<Tgeneral_address_t > (rename.c_str()); 180 rename = "GPR_WRITE_"+toString(i)+"_DATA" ; 181 GPR_WRITE_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str()); 182 } 183 184 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 185 186 sc_signal<Tcontrol_t > ** SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; 187 sc_signal<Tcontext_t > ** SPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write]; 188 sc_signal<Tspecial_address_t > ** SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t > * [_param->_nb_spr_write]; 189 sc_signal<Tspecial_data_t > ** SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write]; 190 190 191 191 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 192 192 { 193 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_VAL" ;194 BYPASS_SPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());195 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_CONTEXT_ID";196 BYPASS_SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());197 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_NUM_REG" ;198 BYPASS_SPR_WRITE_NUM_REG [i] = new sc_signal<Tspecial_address_t > (rename.c_str());199 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_DATA" ;200 BYPASS_SPR_WRITE_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str());193 rename = "SPR_WRITE_"+toString(i)+"_VAL" ; 194 SPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str()); 195 rename = "SPR_WRITE_"+toString(i)+"_CONTEXT_ID"; 196 SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str()); 197 rename = "SPR_WRITE_"+toString(i)+"_NUM_REG" ; 198 SPR_WRITE_NUM_REG [i] = new sc_signal<Tspecial_address_t > (rename.c_str()); 199 rename = "SPR_WRITE_"+toString(i)+"_DATA" ; 200 SPR_WRITE_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str()); 201 201 } 202 202 … … 277 277 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 278 278 { 279 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_VAL [i])) (*(BYPASS_GPR_WRITE_VAL [i]));280 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])) (*(BYPASS_GPR_WRITE_CONTEXT_ID [i]));281 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_NUM_REG [i])) (*(BYPASS_GPR_WRITE_NUM_REG [i]));282 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_DATA [i])) (*(BYPASS_GPR_WRITE_DATA [i]));279 (*(_Read_queue-> in_GPR_WRITE_VAL [i])) (*(GPR_WRITE_VAL [i])); 280 (*(_Read_queue-> in_GPR_WRITE_CONTEXT_ID [i])) (*(GPR_WRITE_CONTEXT_ID [i])); 281 (*(_Read_queue-> in_GPR_WRITE_NUM_REG [i])) (*(GPR_WRITE_NUM_REG [i])); 282 (*(_Read_queue-> in_GPR_WRITE_DATA [i])) (*(GPR_WRITE_DATA [i])); 283 283 } 284 284 285 285 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 286 286 { 287 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_VAL [i])) (*(BYPASS_SPR_WRITE_VAL [i]));288 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])) (*(BYPASS_SPR_WRITE_CONTEXT_ID [i]));289 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_NUM_REG [i])) (*(BYPASS_SPR_WRITE_NUM_REG [i]));290 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_DATA [i])) (*(BYPASS_SPR_WRITE_DATA [i]));287 (*(_Read_queue-> in_SPR_WRITE_VAL [i])) (*(SPR_WRITE_VAL [i])); 288 (*(_Read_queue-> in_SPR_WRITE_CONTEXT_ID [i])) (*(SPR_WRITE_CONTEXT_ID [i])); 289 (*(_Read_queue-> in_SPR_WRITE_NUM_REG [i])) (*(SPR_WRITE_NUM_REG [i])); 290 (*(_Read_queue-> in_SPR_WRITE_DATA [i])) (*(SPR_WRITE_DATA [i])); 291 291 } 292 292 … … 321 321 322 322 // for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 323 // BYPASS_GPR_WRITE_VAL [i]->write (0);323 // GPR_WRITE_VAL [i]->write (0); 324 324 // for (uint32_t i=0; i<_param->_nb_spr_write; i++) 325 // BYPASS_SPR_WRITE_VAL [i]->write (0);325 // SPR_WRITE_VAL [i]->write (0); 326 326 327 327 NRESET->write(0); … … 337 337 int32_t percent_transaction_queue_out = (rand()%50)+25; 338 338 int32_t percent_registerfile_valid = (rand()%50)+25; 339 int32_t percent_transaction_registerfile = (rand()% 50)+25;339 int32_t percent_transaction_registerfile = (rand()%74)+25; 340 340 int32_t percent_transaction_bypass = (rand()%50)+25; 341 341 … … 368 368 } 369 369 // End initialisation ....... 370 370 371 371 uint32_t request_in = 0; 372 372 uint32_t request_out = 0; … … 437 437 Tgeneral_data_t data = rand()%(1<<_param->_size_general_data); 438 438 439 BYPASS_GPR_WRITE_VAL [i]->write(val);440 BYPASS_GPR_WRITE_CONTEXT_ID [i]->write(context);441 BYPASS_GPR_WRITE_NUM_REG [i]->write(num_reg);442 BYPASS_GPR_WRITE_DATA [i]->write(data);439 GPR_WRITE_VAL [i]->write(val); 440 GPR_WRITE_CONTEXT_ID [i]->write(context); 441 GPR_WRITE_NUM_REG [i]->write(num_reg); 442 GPR_WRITE_DATA [i]->write(data); 443 443 444 444 if (val) … … 455 455 Tspecial_data_t data = rand()%(1<<_param->_size_special_data); 456 456 457 BYPASS_SPR_WRITE_VAL [i]->write(val);458 BYPASS_SPR_WRITE_CONTEXT_ID [i]->write(context);459 BYPASS_SPR_WRITE_NUM_REG [i]->write(num_reg);460 BYPASS_SPR_WRITE_DATA [i]->write(data);457 SPR_WRITE_VAL [i]->write(val); 458 SPR_WRITE_CONTEXT_ID [i]->write(context); 459 SPR_WRITE_NUM_REG [i]->write(num_reg); 460 SPR_WRITE_DATA [i]->write(data); 461 461 462 462 if (val) … … 483 483 484 484 LABEL("Accepted READ_QUEUE_OUT ["+toString(packet_id)+"]"); 485 485 486 486 TEST(uint32_t , packet_id ,request_out); 487 487 … … 579 579 delete [] SPR_READ_DATA_VAL; 580 580 581 delete [] BYPASS_GPR_WRITE_VAL ;582 delete [] BYPASS_GPR_WRITE_CONTEXT_ID ;583 delete [] BYPASS_GPR_WRITE_NUM_REG ;584 delete [] BYPASS_GPR_WRITE_DATA ;585 586 delete [] BYPASS_SPR_WRITE_VAL ;587 delete [] BYPASS_SPR_WRITE_CONTEXT_ID ;588 delete [] BYPASS_SPR_WRITE_NUM_REG ;589 delete [] BYPASS_SPR_WRITE_DATA ;581 delete [] GPR_WRITE_VAL ; 582 delete [] GPR_WRITE_CONTEXT_ID ; 583 delete [] GPR_WRITE_NUM_REG ; 584 delete [] GPR_WRITE_DATA ; 585 586 delete [] SPR_WRITE_VAL ; 587 delete [] SPR_WRITE_CONTEXT_ID ; 588 delete [] SPR_WRITE_NUM_REG ; 589 delete [] SPR_WRITE_DATA ; 590 590 #endif 591 591 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h
r54 r55 26 26 { 27 27 //-----[ fields ]------------------------------------------------------------ 28 public : const uint32_t _size_ read_queue;28 public : const uint32_t _size_queue ; 29 29 public : const uint32_t _nb_context ; 30 30 public : const uint32_t _nb_packet ; … … 48 48 49 49 //-----[ methods ]----------------------------------------------------------- 50 public : Parameters ( uint32_t size_read_queue,51 52 53 54 55 56 57 58 59 60 50 public : Parameters (uint32_t size_queue , 51 uint32_t nb_context , 52 uint32_t nb_packet , 53 uint32_t size_general_data , 54 uint32_t size_special_data , 55 uint32_t nb_general_register, 56 uint32_t nb_special_register, 57 uint32_t nb_operation , 58 uint32_t nb_type , 59 uint32_t nb_gpr_write , 60 uint32_t nb_spr_write ); 61 61 public : Parameters (Parameters & param) ; 62 62 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h
r54 r55 270 270 public : SC_IN (Tcontrol_t ) ** in_SPR_READ_DATA_VAL ; 271 271 272 // ~~~~~[ Interface " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~273 274 public : SC_IN (Tcontrol_t ) ** in_ BYPASS_GPR_WRITE_VAL ;275 public : SC_IN (Tcontext_t ) ** in_ BYPASS_GPR_WRITE_CONTEXT_ID;276 public : SC_IN (Tgeneral_address_t) ** in_ BYPASS_GPR_WRITE_NUM_REG ;277 public : SC_IN (Tgeneral_data_t ) ** in_ BYPASS_GPR_WRITE_DATA ;278 279 // ~~~~~[ Interface " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~280 281 public : SC_IN (Tcontrol_t ) ** in_ BYPASS_SPR_WRITE_VAL ;282 public : SC_IN (Tcontext_t ) ** in_ BYPASS_SPR_WRITE_CONTEXT_ID;283 public : SC_IN (Tspecial_address_t) ** in_ BYPASS_SPR_WRITE_NUM_REG ;284 public : SC_IN (Tspecial_data_t ) ** in_ BYPASS_SPR_WRITE_DATA ;272 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 273 274 public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; 275 public : SC_IN (Tcontext_t ) ** in_GPR_WRITE_CONTEXT_ID; 276 public : SC_IN (Tgeneral_address_t) ** in_GPR_WRITE_NUM_REG ; 277 public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; 278 279 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 280 281 public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; 282 public : SC_IN (Tcontext_t ) ** in_SPR_WRITE_CONTEXT_ID; 283 public : SC_IN (Tspecial_address_t) ** in_SPR_WRITE_NUM_REG ; 284 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 285 285 286 286 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h
r54 r55 26 26 typedef uint32_t Tcontext_t ; 27 27 typedef uint32_t Tpacket_t ; 28 typedef uint32_t Toperation_t ; 28 //typedef uint32_t Toperation_t ; // cf Constant_OpenRISC.h 29 29 typedef uint32_t Ttype_t ; 30 30 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp
r54 r55 18 18 19 19 20 Parameters::Parameters (uint32_t size_ read_queue,20 Parameters::Parameters (uint32_t size_queue , 21 21 uint32_t nb_context , 22 22 uint32_t nb_packet , … … 29 29 uint32_t nb_gpr_write , 30 30 uint32_t nb_spr_write ): 31 _size_ read_queue (size_read_queue),31 _size_queue (size_queue ), 32 32 _nb_context (nb_context ), 33 33 _nb_packet (nb_packet ), … … 56 56 57 57 Parameters::Parameters (Parameters & param): 58 _size_ read_queue (param._size_read_queue),58 _size_queue (param._size_queue ), 59 59 _nb_context (param._nb_context ), 60 60 _nb_packet (param._nb_packet ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp
r54 r55 27 27 string msg = ""; 28 28 29 if (_size_ read_queue < 2)29 if (_size_queue < 2) 30 30 { 31 31 msg += " - The read_queue must be have less a depth of 2"; 32 msg += " * size_ read_queue : " + toString(_size_read_queue) + "\n";32 msg += " * size_queue : " + toString(_size_queue) + "\n"; 33 33 } 34 34 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_print.cpp
r54 r55 27 27 28 28 xml.balise_open("read_queue"); 29 xml.singleton_begin("size_ read_queue "); xml.attribut("value",toString(_size_read_queue)); xml.singleton_end();29 xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); 30 30 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 31 31 xml.singleton_begin("nb_packet "); xml.attribut("value",toString(_nb_packet )); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp
r54 r55 77 77 sensitive << *(in_SPR_READ_ACK [i]); 78 78 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 79 sensitive << *(in_ BYPASS_GPR_WRITE_VAL [i])80 << *(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])81 << *(in_ BYPASS_GPR_WRITE_NUM_REG [i]);79 sensitive << *(in_GPR_WRITE_VAL [i]) 80 << *(in_GPR_WRITE_CONTEXT_ID [i]) 81 << *(in_GPR_WRITE_NUM_REG [i]); 82 82 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 83 sensitive << *(in_ BYPASS_SPR_WRITE_VAL [i])84 << *(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])85 << *(in_ BYPASS_SPR_WRITE_NUM_REG [i]);83 sensitive << *(in_SPR_WRITE_VAL [i]) 84 << *(in_SPR_WRITE_CONTEXT_ID [i]) 85 << *(in_SPR_WRITE_NUM_REG [i]); 86 86 87 87 #ifdef SYSTEMCASS_SPECIFIC … … 93 93 for (uint32_t i=0; i<_param->_nb_gpr_write ; i++) 94 94 { 95 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));96 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));97 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));95 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_VAL [i])); 96 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 97 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 98 98 } 99 99 for (uint32_t i=0; i<_param->_nb_spr_write ; i++) 100 100 { 101 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_VAL [i]));102 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));103 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));101 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_VAL [i])); 102 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_CONTEXT_ID [i])); 103 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_NUM_REG [i])); 104 104 } 105 105 #endif … … 115 115 << *(in_GPR_READ_DATA_VAL [i]); 116 116 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 117 sensitive << *(in_ BYPASS_GPR_WRITE_VAL [i])118 << *(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])119 << *(in_ BYPASS_GPR_WRITE_NUM_REG [i])120 << *(in_ BYPASS_GPR_WRITE_DATA [i]);117 sensitive << *(in_GPR_WRITE_VAL [i]) 118 << *(in_GPR_WRITE_CONTEXT_ID [i]) 119 << *(in_GPR_WRITE_NUM_REG [i]) 120 << *(in_GPR_WRITE_DATA [i]); 121 121 122 122 #ifdef SYSTEMCASS_SPECIFIC … … 133 133 for (uint32_t i=0; i<_param->_nb_gpr_write ; i++) 134 134 { 135 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));136 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));137 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));138 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));139 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));140 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));141 142 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_VAL [i]));143 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));144 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));145 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_DATA [i]));146 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_VAL [i]));147 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));148 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));149 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_DATA [i]));135 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_VAL [i])); 136 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 137 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 138 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_VAL [i])); 139 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 140 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 141 142 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_VAL [i])); 143 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_CONTEXT_ID [i])); 144 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_NUM_REG [i])); 145 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_DATA [i])); 146 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_VAL [i])); 147 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_CONTEXT_ID [i])); 148 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_NUM_REG [i])); 149 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_DATA [i])); 150 150 } 151 151 #endif … … 161 161 << *(in_SPR_READ_DATA_VAL [i]); 162 162 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 163 sensitive << *(in_ BYPASS_SPR_WRITE_VAL [i])164 << *(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])165 << *(in_ BYPASS_SPR_WRITE_NUM_REG [i])166 << *(in_ BYPASS_SPR_WRITE_DATA [i]);163 sensitive << *(in_SPR_WRITE_VAL [i]) 164 << *(in_SPR_WRITE_CONTEXT_ID [i]) 165 << *(in_SPR_WRITE_NUM_REG [i]) 166 << *(in_SPR_WRITE_DATA [i]); 167 167 168 168 #ifdef SYSTEMCASS_SPECIFIC … … 176 176 for (uint32_t i=0; i<_param->_nb_spr_write ; i++) 177 177 { 178 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_VAL [i]));179 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));180 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));181 182 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_VAL [i]));183 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));184 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));185 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_DATA [i]));178 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_VAL [i])); 179 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_CONTEXT_ID [i])); 180 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_NUM_REG [i])); 181 182 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_VAL [i])); 183 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_CONTEXT_ID [i])); 184 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_NUM_REG [i])); 185 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_DATA [i])); 186 186 } 187 187 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp
r54 r55 170 170 } 171 171 172 // ~~~~~[ Interface : " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~173 174 in_ BYPASS_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write];175 in_ BYPASS_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write];176 in_ BYPASS_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];177 in_ BYPASS_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write];172 // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 173 174 in_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write]; 175 in_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write]; 176 in_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write]; 177 in_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write]; 178 178 179 179 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 180 180 { 181 Interface_fifo * interface = _interfaces->set_interface(" bypass_gpr_write_"+toString(i)181 Interface_fifo * interface = _interfaces->set_interface("gpr_write_"+toString(i) 182 182 #ifdef POSITION 183 183 , IN … … 187 187 ); 188 188 189 in_ BYPASS_GPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL);190 in_ BYPASS_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id);191 in_ BYPASS_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register);192 in_ BYPASS_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data);193 } 194 195 // ~~~~~[ Interface : " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~196 197 in_ BYPASS_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write];198 in_ BYPASS_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write];199 in_ BYPASS_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];200 in_ BYPASS_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write];189 in_GPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 190 in_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id); 191 in_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); 192 in_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); 193 } 194 195 // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 196 197 in_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write]; 198 in_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write]; 199 in_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write]; 200 in_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write]; 201 201 202 202 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 203 203 { 204 Interface_fifo * interface = _interfaces->set_interface(" bypass_spr_write_"+toString(i)204 Interface_fifo * interface = _interfaces->set_interface("spr_write_"+toString(i) 205 205 #ifdef POSITION 206 206 , IN … … 210 210 ); 211 211 212 in_ BYPASS_SPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL);213 in_ BYPASS_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id);214 in_ BYPASS_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register);215 in_ BYPASS_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data);212 in_SPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 213 in_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id); 214 in_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register); 215 in_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data); 216 216 } 217 217 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp
r54 r55 91 91 delete [] in_SPR_READ_DATA_VAL ; 92 92 93 // ~~~~~[ Interface : " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~93 // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 94 94 95 delete [] in_ BYPASS_GPR_WRITE_VAL ;96 delete [] in_ BYPASS_GPR_WRITE_CONTEXT_ID;97 delete [] in_ BYPASS_GPR_WRITE_NUM_REG ;98 delete [] in_ BYPASS_GPR_WRITE_DATA ;95 delete [] in_GPR_WRITE_VAL ; 96 delete [] in_GPR_WRITE_CONTEXT_ID; 97 delete [] in_GPR_WRITE_NUM_REG ; 98 delete [] in_GPR_WRITE_DATA ; 99 99 100 // ~~~~~[ Interface : " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~100 // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 101 101 102 delete [] in_ BYPASS_SPR_WRITE_VAL ;103 delete [] in_ BYPASS_SPR_WRITE_CONTEXT_ID;104 delete [] in_ BYPASS_SPR_WRITE_NUM_REG ;105 delete [] in_ BYPASS_SPR_WRITE_DATA ;102 delete [] in_SPR_WRITE_VAL ; 103 delete [] in_SPR_WRITE_CONTEXT_ID; 104 delete [] in_SPR_WRITE_NUM_REG ; 105 delete [] in_SPR_WRITE_DATA ; 106 106 107 107 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp
r54 r55 66 66 { 67 67 // Test if this bypass is valid 68 if ( (PORT_READ (in_ BYPASS_GPR_WRITE_VAL [i]) == 1) and69 (PORT_READ (in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)68 if ( (PORT_READ (in_GPR_WRITE_VAL [i]) == 1) and 69 (PORT_READ (in_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 70 70 ) 71 71 { 72 Tgeneral_address_t bypass_gpr_write_num_reg = PORT_READ(in_BYPASS_GPR_WRITE_NUM_REG [i]);73 Tgeneral_data_t bypass_gpr_write_data = PORT_READ(in_BYPASS_GPR_WRITE_DATA [i]);72 Tgeneral_address_t gpr_write_num_reg = PORT_READ(in_GPR_WRITE_NUM_REG [i]); 73 Tgeneral_data_t gpr_write_data = PORT_READ(in_GPR_WRITE_DATA [i]); 74 74 75 if (_queue_head->_num_reg_ra == bypass_gpr_write_num_reg)75 if (_queue_head->_num_reg_ra == gpr_write_num_reg) 76 76 { 77 77 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RA_VAL - bypass hit (%d)",i); 78 78 79 79 internal_READ_QUEUE_OUT_DATA_RA_VAL = 1; 80 internal_READ_QUEUE_OUT_DATA_RA = bypass_gpr_write_data;80 internal_READ_QUEUE_OUT_DATA_RA = gpr_write_data; 81 81 } 82 if (_queue_head->_num_reg_rb == bypass_gpr_write_num_reg)82 if (_queue_head->_num_reg_rb == gpr_write_num_reg) 83 83 { 84 84 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RB_VAL - bypass hit (%d)",i); 85 85 internal_READ_QUEUE_OUT_DATA_RB_VAL = 1; 86 internal_READ_QUEUE_OUT_DATA_RB = bypass_gpr_write_data;86 internal_READ_QUEUE_OUT_DATA_RB = gpr_write_data; 87 87 } 88 88 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_spr.cpp
r54 r55 51 51 { 52 52 // Test if this bypass is valid 53 if ( (PORT_READ (in_ BYPASS_SPR_WRITE_VAL [i]) == 1) and54 (PORT_READ (in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)53 if ( (PORT_READ (in_SPR_WRITE_VAL [i]) == 1) and 54 (PORT_READ (in_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 55 55 ) 56 56 { 57 if (_queue_head->_num_reg_rc == PORT_READ(in_ BYPASS_SPR_WRITE_NUM_REG [i]))57 if (_queue_head->_num_reg_rc == PORT_READ(in_SPR_WRITE_NUM_REG [i])) 58 58 { 59 59 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RC_VAL - bypass hit (%d)",i); 60 60 internal_READ_QUEUE_OUT_DATA_RC_VAL = 1; 61 internal_READ_QUEUE_OUT_DATA_RC = PORT_READ(in_ BYPASS_SPR_WRITE_DATA [i]);61 internal_READ_QUEUE_OUT_DATA_RC = PORT_READ(in_SPR_WRITE_DATA [i]); 62 62 } 63 63 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_val.cpp
r54 r55 42 42 { 43 43 // Test if this bypass is valid 44 if ( (PORT_READ (in_ BYPASS_GPR_WRITE_VAL [i]) == 1) and45 (PORT_READ (in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)44 if ( (PORT_READ (in_GPR_WRITE_VAL [i]) == 1) and 45 (PORT_READ (in_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 46 46 ) 47 47 { 48 Tgeneral_address_t bypass_gpr_write_num_reg = PORT_READ(in_BYPASS_GPR_WRITE_NUM_REG [i]);48 Tgeneral_address_t gpr_write_num_reg = PORT_READ(in_GPR_WRITE_NUM_REG [i]); 49 49 50 if (_queue_head->_num_reg_ra == bypass_gpr_write_num_reg)50 if (_queue_head->_num_reg_ra == gpr_write_num_reg) 51 51 internal_READ_QUEUE_OUT_READ_RA_VAL = 0; 52 52 53 if (_queue_head->_num_reg_rb == bypass_gpr_write_num_reg)53 if (_queue_head->_num_reg_rb == gpr_write_num_reg) 54 54 internal_READ_QUEUE_OUT_READ_RB_VAL = 0; 55 55 } … … 59 59 { 60 60 // Test if this bypass is valid 61 if ( (PORT_READ (in_ BYPASS_SPR_WRITE_VAL [i]) == 1) and62 (PORT_READ (in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)61 if ( (PORT_READ (in_SPR_WRITE_VAL [i]) == 1) and 62 (PORT_READ (in_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 63 63 ) 64 64 { 65 Tspecial_address_t bypass_spr_write_num_reg = PORT_READ(in_BYPASS_SPR_WRITE_NUM_REG [i]);65 Tspecial_address_t spr_write_num_reg = PORT_READ(in_SPR_WRITE_NUM_REG [i]); 66 66 67 if (_queue_head->_num_reg_rc == bypass_spr_write_num_reg)67 if (_queue_head->_num_reg_rc == spr_write_num_reg) 68 68 internal_READ_QUEUE_OUT_READ_RC_VAL = 0; 69 69 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp
r54 r55 24 24 log_printf(FUNC,Read_queue,FUNCTION,"Begin"); 25 25 26 bool not_full = not (_queue->size() == _param->_size_ read_queue);26 bool not_full = not (_queue->size() == _param->_size_queue); 27 27 bool not_empty = not _queue->empty(); 28 28 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
r54 r55 47 47 // Write to read_queue 48 48 49 bool not_full = not (_queue->size() == _param->_size_ read_queue);49 bool not_full = not (_queue->size() == _param->_size_queue); 50 50 bool empty = _queue->empty(); 51 51 bool nead_new_head = false;
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